
The sde_hw_blk was meant to be a generic base object for all SDE HW blocks, however, it enforces using a common set of ops which is not practical when blocks have different capabilities. Since this object was never used as intended and is not doing anything functional today, remove the dead weight. Change-Id: If76006c1ae5c62e8d7d77b100837dbaf6c661bd3 Signed-off-by: Steve Cohen <quic_cohens@quicinc.com>
203 lines
5.0 KiB
C
203 lines
5.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
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*/
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#ifndef _SDE_HW_PINGPONG_H
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#define _SDE_HW_PINGPONG_H
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#include "sde_hw_catalog.h"
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#include "sde_hw_mdss.h"
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#include "sde_hw_util.h"
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#include <drm/msm_drm_pp.h>
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struct sde_hw_pingpong;
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struct sde_hw_merge_3d;
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#define DITHER_DEPTH_MAP_INDEX 9
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static u32 dither_depth_map[DITHER_DEPTH_MAP_INDEX] = {
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0, 0, 0, 0, 0, 1, 2, 3, 3
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};
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struct sde_hw_dsc_cfg {
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u8 enable;
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};
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/**
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*
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* struct sde_hw_pingpong_ops : Interface to the pingpong Hw driver functions
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* Assumption is these functions will be called after clocks are enabled
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* @setup_tearcheck : program tear check values
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* @enable_tearcheck : enables tear check
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* @get_vsync_info : retries timing info of the panel
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* @setup_autorefresh : program auto refresh
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* @setup_dsc : program DSC block with encoding details
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* @enable_dsc : enables DSC encoder
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* @disable_dsc : disables DSC encoder
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* @setup_dither : function to program the dither hw block
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* @get_line_count: obtain current vertical line counter
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* @get_hw_caps: returns features supported by this pp block
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*/
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struct sde_hw_pingpong_ops {
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/**
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* enables vysnc generation and sets up init value of
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* read pointer and programs the tear check cofiguration
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*/
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int (*setup_tearcheck)(struct sde_hw_pingpong *pp,
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struct sde_hw_tear_check *cfg);
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/**
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* enables tear check block
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*/
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int (*enable_tearcheck)(struct sde_hw_pingpong *pp,
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bool enable);
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/**
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* updates tearcheck configuration
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*/
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void (*update_tearcheck)(struct sde_hw_pingpong *pp,
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struct sde_hw_tear_check *cfg);
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/**
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* read, modify, write to either set or clear listening to external TE
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* @Return: 1 if TE was originally connected, 0 if not, or -ERROR
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*/
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int (*connect_external_te)(struct sde_hw_pingpong *pp,
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bool enable_external_te);
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/**
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* provides the programmed and current
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* line_count
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*/
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int (*get_vsync_info)(struct sde_hw_pingpong *pp,
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struct sde_hw_pp_vsync_info *info);
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/**
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* configure and enable the autorefresh config
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*/
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int (*setup_autorefresh)(struct sde_hw_pingpong *pp,
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struct sde_hw_autorefresh *cfg);
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/**
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* retrieve autorefresh config from hardware
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*/
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int (*get_autorefresh)(struct sde_hw_pingpong *pp,
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struct sde_hw_autorefresh *cfg);
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/**
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* poll until write pointer transmission starts
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* @Return: 0 on success, -ETIMEDOUT on timeout
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*/
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int (*poll_timeout_wr_ptr)(struct sde_hw_pingpong *pp, u32 timeout_us);
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/**
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* Program the dsc compression block
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*/
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int (*setup_dsc)(struct sde_hw_pingpong *pp);
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/**
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* Enables DSC encoder
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*/
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void (*enable_dsc)(struct sde_hw_pingpong *pp);
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/**
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* Disables DSC encoder
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*/
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void (*disable_dsc)(struct sde_hw_pingpong *pp);
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/**
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* Program the dither hw block
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*/
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int (*setup_dither)(struct sde_hw_pingpong *pp, void *cfg, size_t len);
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/**
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* Obtain current vertical line counter
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*/
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u32 (*get_line_count)(struct sde_hw_pingpong *pp);
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/**
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* Programs the 3d blend configuration
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*/
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void (*setup_3d_mode)(struct sde_hw_pingpong *pp,
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enum sde_3d_blend_mode cfg);
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/**
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* reset 3d blend configuration
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*/
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void (*reset_3d_mode)(struct sde_hw_pingpong *pp);
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/**
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* get PP features supported by this instance
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*/
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unsigned long (*get_hw_caps)(struct sde_hw_pingpong *pp);
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};
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struct sde_hw_merge_3d_ops {
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/**
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* setup the 3d blend mode configuration
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*/
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void (*setup_blend_mode)(struct sde_hw_merge_3d *id,
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enum sde_3d_blend_mode cfg);
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/**
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* reset 3d blend mode configuration
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*/
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void (*reset_blend_mode)(struct sde_hw_merge_3d *id);
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};
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struct sde_hw_merge_3d {
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struct sde_hw_blk_reg_map hw;
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/* merge_3d */
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enum sde_merge_3d idx;
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const struct sde_merge_3d_cfg *caps;
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/* ops */
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struct sde_hw_merge_3d_ops ops;
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};
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struct sde_hw_pingpong {
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struct sde_hw_blk_reg_map hw;
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/* pingpong */
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enum sde_pingpong idx;
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const struct sde_pingpong_cfg *caps;
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/* associated 3d_merge */
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struct sde_hw_merge_3d *merge_3d;
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/* ops */
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struct sde_hw_pingpong_ops ops;
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};
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/**
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* to_sde_hw_pingpong - convert base hw object to sde_hw_pingpong container
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* @hw: Pointer to hardware block register map object
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* return: Pointer to hardware block container
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*/
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static inline struct sde_hw_pingpong *to_sde_hw_pingpong(struct sde_hw_blk_reg_map *hw)
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{
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return container_of(hw, struct sde_hw_pingpong, hw);
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}
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/**
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* sde_hw_pingpong_init - initializes the pingpong driver for the passed
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* pingpong idx.
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* @idx: Pingpong index for which driver object is required
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* @addr: Mapped register io address of MDP
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* @m: Pointer to mdss catalog data
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* Returns: Error code or allocated sde_hw_pingpong context
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*/
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struct sde_hw_blk_reg_map *sde_hw_pingpong_init(enum sde_pingpong idx,
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void __iomem *addr,
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struct sde_mdss_cfg *m);
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/**
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* sde_hw_pingpong_destroy - destroys pingpong driver context
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* should be called to free the context
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* @hw: Pointer to hardware block register map object
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*/
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void sde_hw_pingpong_destroy(struct sde_hw_blk_reg_map *hw);
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#endif /*_SDE_HW_PINGPONG_H */
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