e8380bbece
Disable CHK_2K_MODE and OOR_MODE in REO descriptor. Also set RTY bit for non-BA TID queues as temporary WAR for duplicate detection issue. Change-Id: Ifa51c20ffbfe31c807d4e7f99014cb76f411e066
687 lines
19 KiB
C
687 lines
19 KiB
C
/*
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* Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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* above copyright notice and this permission notice appear in all
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* copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
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* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
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* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
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* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
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* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
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* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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* PERFORMANCE OF THIS SOFTWARE.
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*/
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#include "dp_types.h"
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#include "dp_rx.h"
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#include "dp_peer.h"
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#include "dp_internal.h"
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#include "hal_api.h"
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#include "qdf_trace.h"
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#include "qdf_nbuf.h"
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#ifdef CONFIG_MCL
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#include <cds_ieee80211_common.h>
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#else
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#include <ieee80211.h>
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#endif
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/**
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* dp_rx_cookie_2_link_desc_va() - Converts cookie to a virtual address of
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* the MSDU Link Descriptor
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* @soc: core txrx main context
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* @cookie: cookie used to lookup virtual address of link descriptor
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* Normally this is just an index into a per SOC array.
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*
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* This is the VA of the link descriptor, that HAL layer later uses to
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* retrieve the list of MSDU's for a given .
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*
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* Return: void *: Virtual Address of the Rx descriptor
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*/
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static inline
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void *dp_rx_cookie_2_link_desc_va(struct dp_soc *soc,
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struct hal_buf_info *buf_info)
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{
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void *link_desc_va;
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/* TODO */
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/* Add sanity for cookie */
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link_desc_va = soc->link_desc_banks[buf_info->sw_cookie].base_vaddr +
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(buf_info->paddr -
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soc->link_desc_banks[buf_info->sw_cookie].base_paddr);
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return link_desc_va;
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}
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/**
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* dp_rx_frag_handle() - Handles fragmented Rx frames
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*
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* @soc: core txrx main context
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* @ring_desc: opaque pointer to the REO error ring descriptor
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* @mpdu_desc_info: MPDU descriptor information from ring descriptor
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* @head: head of the local descriptor free-list
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* @tail: tail of the local descriptor free-list
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* @quota: No. of units (packets) that can be serviced in one shot.
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*
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* This function implements RX 802.11 fragmentation handling
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* The handling is mostly same as legacy fragmentation handling.
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* If required, this function can re-inject the frames back to
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* REO ring (with proper setting to by-pass fragmentation check
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* but use duplicate detection / re-ordering and routing these frames
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* to a different core.
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*
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* Return: uint32_t: No. of elements processed
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*/
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static uint32_t
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dp_rx_frag_handle(struct dp_soc *soc, void *ring_desc,
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struct hal_rx_mpdu_desc_info *mpdu_desc_info,
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union dp_rx_desc_list_elem_t **head,
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union dp_rx_desc_list_elem_t **tail,
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uint32_t quota)
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{
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uint32_t rx_bufs_used = 0;
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return rx_bufs_used;
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}
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/**
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* dp_rx_msdus_drop() - Drops all MSDU's per MPDU
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*
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* @soc: core txrx main context
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* @ring_desc: opaque pointer to the REO error ring descriptor
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* @mpdu_desc_info: MPDU descriptor information from ring descriptor
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* @head: head of the local descriptor free-list
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* @tail: tail of the local descriptor free-list
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* @quota: No. of units (packets) that can be serviced in one shot.
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*
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* This function is used to drop all MSDU in an MPDU
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*
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* Return: uint32_t: No. of elements processed
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*/
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static uint32_t
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dp_rx_msdus_drop(struct dp_soc *soc, void *ring_desc,
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struct hal_rx_mpdu_desc_info *mpdu_desc_info,
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union dp_rx_desc_list_elem_t **head,
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union dp_rx_desc_list_elem_t **tail,
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uint32_t quota)
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{
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uint8_t num_msdus;
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uint32_t rx_bufs_used = 0;
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void *link_desc_va;
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struct hal_buf_info buf_info;
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struct hal_rx_msdu_list msdu_list; /* MSDU's per MPDU */
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int i;
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hal_rx_reo_buf_paddr_get(ring_desc, &buf_info);
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link_desc_va = dp_rx_cookie_2_link_desc_va(soc, &buf_info);
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qdf_assert(rx_msdu_link_desc);
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/* No UNMAP required -- this is "malloc_consistent" memory */
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hal_rx_msdu_list_get(link_desc_va, &msdu_list, &num_msdus);
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for (i = 0; (i < HAL_RX_NUM_MSDU_DESC) && quota--; i++) {
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struct dp_rx_desc *rx_desc =
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dp_rx_cookie_2_va(soc, msdu_list.sw_cookie[i]);
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qdf_assert(rx_desc);
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rx_bufs_used++;
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/* Just free the buffers */
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qdf_nbuf_free(rx_desc->nbuf);
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dp_rx_add_to_free_desc_list(head, tail, rx_desc);
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}
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return rx_bufs_used;
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}
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/**
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* dp_rx_pn_error_handle() - Handles PN check errors
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*
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* @soc: core txrx main context
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* @ring_desc: opaque pointer to the REO error ring descriptor
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* @mpdu_desc_info: MPDU descriptor information from ring descriptor
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* @head: head of the local descriptor free-list
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* @tail: tail of the local descriptor free-list
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* @quota: No. of units (packets) that can be serviced in one shot.
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*
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* This function implements PN error handling
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* If the peer is configured to ignore the PN check errors
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* or if DP feels, that this frame is still OK, the frame can be
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* re-injected back to REO to use some of the other features
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* of REO e.g. duplicate detection/routing to other cores
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*
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* Return: uint32_t: No. of elements processed
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*/
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static uint32_t
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dp_rx_pn_error_handle(struct dp_soc *soc, void *ring_desc,
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struct hal_rx_mpdu_desc_info *mpdu_desc_info,
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union dp_rx_desc_list_elem_t **head,
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union dp_rx_desc_list_elem_t **tail,
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uint32_t quota)
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{
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uint16_t peer_id;
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uint32_t rx_bufs_used = 0;
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struct dp_peer *peer;
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bool peer_pn_policy = false;
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peer_id = DP_PEER_METADATA_PEER_ID_GET(
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mpdu_desc_info->peer_meta_data);
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peer = dp_peer_find_by_id(soc, peer_id);
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if (qdf_likely(peer)) {
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/*
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* TODO: Check for peer specific policies & set peer_pn_policy
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*/
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}
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/* No peer PN policy -- definitely drop */
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if (!peer_pn_policy)
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rx_bufs_used = dp_rx_msdus_drop(soc, ring_desc,
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mpdu_desc_info,
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head, tail, quota);
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return rx_bufs_used;
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}
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/**
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* dp_rx_2k_jump_handle() - Handles Sequence Number Jump by 2K
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*
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* @soc: core txrx main context
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* @ring_desc: opaque pointer to the REO error ring descriptor
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* @mpdu_desc_info: MPDU descriptor information from ring descriptor
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* @head: head of the local descriptor free-list
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* @tail: tail of the local descriptor free-list
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* @quota: No. of units (packets) that can be serviced in one shot.
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*
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* This function implements the error handling when sequence number
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* of the MPDU jumps suddenly by 2K.Today there are 2 cases that
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* need to be handled:
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* A) CSN (Current Sequence Number) = Last Valid SN (LSN) + 2K
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* B) CSN = LSN + 2K, but falls within a "BA sized window" of the SSN
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* For case A) the protocol stack is invoked to generate DELBA/DEAUTH frame
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* For case B), the frame is normally dropped, no more action is taken
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*
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* Return: uint32_t: No. of elements processed
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*/
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static uint32_t
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dp_rx_2k_jump_handle(struct dp_soc *soc, void *ring_desc,
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struct hal_rx_mpdu_desc_info *mpdu_desc_info,
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union dp_rx_desc_list_elem_t **head,
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union dp_rx_desc_list_elem_t **tail,
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uint32_t quota)
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{
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return dp_rx_msdus_drop(soc, ring_desc, mpdu_desc_info,
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head, tail, quota);
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}
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/**
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* dp_rx_null_q_desc_handle() - Function to handle NULL Queue
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* descriptor violation on either a
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* REO or WBM ring
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*
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* @soc: core DP main context
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* @ring_desc: opaque pointer to the REO error ring descriptor
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* @head: pointer to head of rx descriptors to be added to free list
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* @tail: pointer to tail of rx descriptors to be added to free list
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* quota: upper limit of descriptors that can be reaped
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*
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* This function handles NULL queue descriptor violations arising out
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* a missing REO queue for a given peer or a given TID. This typically
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* may happen if a packet is received on a QOS enabled TID before the
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* ADDBA negotiation for that TID, when the TID queue is setup. Or
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* it may also happen for MC/BC frames if they are not routed to the
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* non-QOS TID queue, in the absence of any other default TID queue.
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* This error can show up both in a REO destination or WBM release ring.
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*
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* Return: uint32_t: No. of Rx buffers reaped
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*/
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static uint32_t
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dp_rx_null_q_desc_handle(struct dp_soc *soc, void *ring_desc,
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union dp_rx_desc_list_elem_t **head,
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union dp_rx_desc_list_elem_t **tail,
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uint32_t quota)
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{
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uint32_t rx_buf_cookie;
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struct dp_rx_desc *rx_desc;
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uint32_t rx_bufs_used = 0;
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uint32_t pkt_len, l2_hdr_offset;
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uint16_t msdu_len;
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qdf_nbuf_t nbuf;
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struct dp_pdev *pdev0;
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struct dp_vdev *vdev0;
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uint32_t tid = 0;
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uint16_t peer_id;
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struct dp_peer *peer = NULL;
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rx_buf_cookie = HAL_RX_WBM_BUF_COOKIE_GET(ring_desc);
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rx_desc = dp_rx_cookie_2_va(soc, rx_buf_cookie);
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qdf_assert(rx_desc);
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rx_bufs_used++;
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nbuf = rx_desc->nbuf;
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qdf_nbuf_unmap_single(soc->osdev, nbuf,
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QDF_DMA_BIDIRECTIONAL);
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rx_desc->rx_buf_start = qdf_nbuf_data(nbuf);
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l2_hdr_offset =
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hal_rx_msdu_end_l3_hdr_padding_get(rx_desc->rx_buf_start);
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msdu_len = hal_rx_msdu_start_msdu_len_get(rx_desc->rx_buf_start);
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pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
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/* Set length in nbuf */
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qdf_nbuf_set_pktlen(nbuf, pkt_len);
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/*
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* Check if DMA completed -- msdu_done is the last bit
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* to be written
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*/
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if (!hal_rx_attn_msdu_done_get(rx_desc->rx_buf_start)) {
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QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
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FL("nbuf->data 0x%p"), rx_desc->rx_buf_start);
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qdf_assert(0);
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}
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/*
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* Advance the packet start pointer by total size of
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* pre-header TLV's
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*/
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qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
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if (l2_hdr_offset)
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qdf_nbuf_pull_head(nbuf, l2_hdr_offset);
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if (hal_rx_mpdu_start_mpdu_qos_control_valid_get(
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rx_desc->rx_buf_start)) {
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/* TODO: Assuming that qos_control_valid also indicates
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* unicast. Should we check this?
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*/
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tid = hal_rx_mpdu_start_tid_get(rx_desc->rx_buf_start);
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peer_id = hal_rx_mpdu_start_sw_peer_id_get(
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rx_desc->rx_buf_start);
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peer = dp_peer_find_by_id(soc, peer_id);
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if (peer &&
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peer->rx_tid[tid].hw_qdesc_vaddr_unaligned == NULL) {
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/* IEEE80211_SEQ_MAX indicates invalid start_seq */
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dp_rx_tid_setup_wifi3(peer, tid, 1, IEEE80211_SEQ_MAX);
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}
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}
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pdev0 = soc->pdev_list[0];/* Hard code 0th elem */
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if (pdev0) {
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vdev0 = (struct dp_vdev *)TAILQ_FIRST(&pdev0->vdev_list);
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if (vdev0 && vdev0->osif_rx) {
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QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
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FL("pdev0 %p vdev0 %p osif_rx %p"), pdev0, vdev0,
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vdev0->osif_rx);
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vdev0->osif_rx(vdev0->osif_vdev, nbuf);
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} else {
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QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
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FL("INVALID vdev0 %p OR osif_rx"), vdev0);
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}
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} else {
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QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
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FL("INVALID pdev %p"), pdev0);
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}
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dp_rx_add_to_free_desc_list(head, tail, rx_desc);
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return rx_bufs_used;
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}
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/**
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* dp_rx_link_desc_return() - Return a MPDU link descriptor to HW
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* (WBM), following error handling
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*
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* @soc: core DP main context
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* @ring_desc: opaque pointer to the REO error ring descriptor
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*
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* Return: QDF_STATUS
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*/
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static QDF_STATUS
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dp_rx_link_desc_return(struct dp_soc *soc, void *ring_desc)
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{
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void *buf_addr_info = HAL_RX_REO_BUF_ADDR_INFO_GET(ring_desc);
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struct dp_srng *wbm_desc_rel_ring = &soc->wbm_desc_rel_ring;
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void *wbm_rel_srng = wbm_desc_rel_ring->hal_srng;
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void *hal_soc = soc->hal_soc;
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QDF_STATUS status = QDF_STATUS_E_FAILURE;
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void *src_srng_desc;
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if (!wbm_rel_srng) {
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QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
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"WBM RELEASE RING not initialized");
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return status;
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}
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if (qdf_unlikely(hal_srng_access_start(hal_soc, wbm_rel_srng))) {
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/* TODO */
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/*
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* Need API to convert from hal_ring pointer to
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* Ring Type / Ring Id combo
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*/
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QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
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FL("HAL RING Access For WBM Release SRNG Failed - %p"),
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wbm_rel_srng);
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goto done;
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}
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src_srng_desc = hal_srng_src_get_next(hal_soc, wbm_rel_srng);
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if (qdf_likely(src_srng_desc)) {
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/* Return link descriptor through WBM ring (SW2WBM)*/
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hal_rx_msdu_link_desc_set(hal_soc,
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src_srng_desc, buf_addr_info);
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status = QDF_STATUS_SUCCESS;
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} else {
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struct hal_srng *srng = (struct hal_srng *)wbm_rel_srng;
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QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
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FL("WBM Release Ring (Id %d) Full"), srng->ring_id);
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QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
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"HP 0x%x Reap HP 0x%x TP 0x%x Cached TP 0x%x",
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*srng->u.src_ring.hp_addr, srng->u.src_ring.reap_hp,
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*srng->u.src_ring.tp_addr, srng->u.src_ring.cached_tp);
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}
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done:
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hal_srng_access_end(hal_soc, wbm_rel_srng);
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return status;
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}
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/**
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* dp_rx_err_process() - Processes error frames routed to REO error ring
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*
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* @soc: core txrx main context
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* @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
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* @quota: No. of units (packets) that can be serviced in one shot.
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*
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* This function implements error processing and top level demultiplexer
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* for all the frames routed to REO error ring.
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*
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* Return: uint32_t: No. of elements processed
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*/
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uint32_t
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dp_rx_err_process(struct dp_soc *soc, void *hal_ring, uint32_t quota)
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{
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void *hal_soc;
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void *ring_desc;
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union dp_rx_desc_list_elem_t *head = NULL;
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union dp_rx_desc_list_elem_t *tail = NULL;
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uint32_t rx_bufs_used = 0;
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uint8_t buf_type;
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uint8_t error, rbm;
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struct hal_rx_mpdu_desc_info mpdu_desc_info;
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struct hal_buf_info hbi;
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/* Debug -- Remove later */
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qdf_assert(soc && hal_ring);
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hal_soc = soc->hal_soc;
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/* Debug -- Remove later */
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qdf_assert(hal_soc);
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if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_ring))) {
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/* TODO */
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/*
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* Need API to convert from hal_ring pointer to
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* Ring Type / Ring Id combo
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*/
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QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
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FL("HAL RING Access Failed -- %p"), hal_ring);
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goto done;
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}
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while (qdf_likely((ring_desc =
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hal_srng_dst_get_next(hal_soc, hal_ring))
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&& quota--)) {
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error = HAL_RX_ERROR_STATUS_GET(ring_desc);
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qdf_assert(error == HAL_REO_ERROR_DETECTED);
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|
|
/*
|
|
* Check if the buffer is to be processed on this processor
|
|
*/
|
|
rbm = hal_rx_ret_buf_manager_get(ring_desc);
|
|
|
|
if (qdf_unlikely(rbm != HAL_RX_BUF_RBM_SW3_BM)) {
|
|
/* TODO */
|
|
/* Call appropriate handler */
|
|
|
|
QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
|
|
FL("Invalid RBM %d"), rbm);
|
|
continue;
|
|
}
|
|
|
|
buf_type = HAL_RX_REO_BUF_TYPE_GET(ring_desc);
|
|
/*
|
|
* For REO error ring, expect only MSDU LINK DESC
|
|
*/
|
|
qdf_assert(buf_type == HAL_RX_REO_MSDU_LINK_DESC_TYPE);
|
|
|
|
hal_rx_reo_buf_paddr_get(ring_desc, &hbi);
|
|
|
|
/* Get the MPDU DESC info */
|
|
hal_rx_mpdu_desc_info_get(ring_desc, &mpdu_desc_info);
|
|
|
|
if (mpdu_desc_info.mpdu_flags & HAL_MPDU_F_FRAGMENT) {
|
|
/* TODO */
|
|
rx_bufs_used += dp_rx_frag_handle(soc,
|
|
ring_desc, &mpdu_desc_info,
|
|
&head, &tail, quota);
|
|
continue;
|
|
}
|
|
|
|
if (hal_rx_reo_is_pn_error(ring_desc)) {
|
|
/* TOD0 */
|
|
rx_bufs_used += dp_rx_pn_error_handle(soc,
|
|
ring_desc, &mpdu_desc_info,
|
|
&head, &tail, quota);
|
|
continue;
|
|
}
|
|
|
|
if (hal_rx_reo_is_2k_jump(ring_desc)) {
|
|
/* TOD0 */
|
|
rx_bufs_used += dp_rx_2k_jump_handle(soc,
|
|
ring_desc, &mpdu_desc_info,
|
|
&head, &tail, quota);
|
|
continue;
|
|
}
|
|
|
|
/* Return link descriptor through WBM ring (SW2WBM)*/
|
|
dp_rx_link_desc_return(soc, ring_desc);
|
|
}
|
|
|
|
done:
|
|
hal_srng_access_end(hal_soc, hal_ring);
|
|
|
|
/* Assume MAC id = 0, owner = 0 */
|
|
if (rx_bufs_used)
|
|
dp_rx_buffers_replenish(soc, 0, rx_bufs_used, &head, &tail,
|
|
HAL_RX_BUF_RBM_SW3_BM);
|
|
|
|
return rx_bufs_used; /* Assume no scale factor for now */
|
|
}
|
|
|
|
/**
|
|
* dp_rx_wbm_err_process() - Processes error frames routed to WBM release ring
|
|
*
|
|
* @soc: core txrx main context
|
|
* @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
|
|
* @quota: No. of units (packets) that can be serviced in one shot.
|
|
*
|
|
* This function implements error processing and top level demultiplexer
|
|
* for all the frames routed to WBM2HOST sw release ring.
|
|
*
|
|
* Return: uint32_t: No. of elements processed
|
|
*/
|
|
uint32_t
|
|
dp_rx_wbm_err_process(struct dp_soc *soc, void *hal_ring, uint32_t quota)
|
|
{
|
|
void *hal_soc;
|
|
void *ring_desc;
|
|
struct dp_rx_desc *rx_desc;
|
|
union dp_rx_desc_list_elem_t *head = NULL;
|
|
union dp_rx_desc_list_elem_t *tail = NULL;
|
|
uint32_t rx_bufs_used = 0;
|
|
uint8_t buf_type, rbm;
|
|
uint8_t wbm_err_src;
|
|
uint32_t rx_buf_cookie;
|
|
|
|
/* Debug -- Remove later */
|
|
qdf_assert(soc && hal_ring);
|
|
|
|
hal_soc = soc->hal_soc;
|
|
|
|
/* Debug -- Remove later */
|
|
qdf_assert(hal_soc);
|
|
|
|
if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_ring))) {
|
|
|
|
/* TODO */
|
|
/*
|
|
* Need API to convert from hal_ring pointer to
|
|
* Ring Type / Ring Id combo
|
|
*/
|
|
QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
|
|
FL("HAL RING Access Failed -- %p"), hal_ring);
|
|
goto done;
|
|
}
|
|
|
|
while (qdf_likely((ring_desc =
|
|
hal_srng_dst_get_next(hal_soc, hal_ring))
|
|
&& quota--)) {
|
|
|
|
/* XXX */
|
|
wbm_err_src = HAL_RX_WBM_ERR_SRC_GET(ring_desc);
|
|
|
|
qdf_assert((wbm_err_src == HAL_RX_WBM_ERR_SRC_RXDMA) ||
|
|
(wbm_err_src == HAL_RX_WBM_ERR_SRC_REO));
|
|
|
|
/*
|
|
* Check if the buffer is to be processed on this processor
|
|
*/
|
|
rbm = hal_rx_ret_buf_manager_get(ring_desc);
|
|
|
|
if (qdf_unlikely(rbm != HAL_RX_BUF_RBM_SW3_BM)) {
|
|
/* TODO */
|
|
/* Call appropriate handler */
|
|
|
|
QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
|
|
FL("Invalid RBM %d"), rbm);
|
|
continue;
|
|
}
|
|
|
|
/* XXX */
|
|
buf_type = HAL_RX_WBM_BUF_TYPE_GET(ring_desc);
|
|
/*
|
|
* For WBM ring, expect only MSDU buffers
|
|
*/
|
|
qdf_assert(buf_type == HAL_RX_WBM_BUF_TYPE_REL_BUF);
|
|
|
|
if (wbm_err_src == HAL_RX_WBM_ERR_SRC_REO) {
|
|
|
|
uint8_t push_reason =
|
|
HAL_RX_WBM_REO_PUSH_REASON_GET(ring_desc);
|
|
|
|
if (push_reason == HAL_RX_WBM_REO_PSH_RSN_ERROR) {
|
|
|
|
uint8_t reo_error_code =
|
|
HAL_RX_WBM_REO_ERROR_CODE_GET(ring_desc);
|
|
|
|
switch (reo_error_code) {
|
|
/*
|
|
* Handling for packets which have NULL REO
|
|
* queue descriptor
|
|
*/
|
|
case HAL_REO_ERR_QUEUE_DESC_ADDR_0:
|
|
QDF_TRACE(QDF_MODULE_ID_DP,
|
|
QDF_TRACE_LEVEL_WARN,
|
|
"Got pkt with REO ERROR: %d",
|
|
reo_error_code);
|
|
rx_bufs_used +=
|
|
dp_rx_null_q_desc_handle(soc,
|
|
ring_desc, &head, &tail, quota);
|
|
continue;
|
|
/* TODO */
|
|
/* Add per error code accounting */
|
|
|
|
default:
|
|
QDF_TRACE(QDF_MODULE_ID_DP,
|
|
QDF_TRACE_LEVEL_ERROR,
|
|
"REO error %d detected",
|
|
reo_error_code);
|
|
}
|
|
}
|
|
} else if (wbm_err_src == HAL_RX_WBM_ERR_SRC_RXDMA) {
|
|
uint8_t push_reason =
|
|
HAL_RX_WBM_RXDMA_PUSH_REASON_GET(ring_desc);
|
|
|
|
if (push_reason == HAL_RX_WBM_RXDMA_PSH_RSN_ERROR) {
|
|
|
|
uint8_t rxdma_error_code =
|
|
HAL_RX_WBM_RXDMA_ERROR_CODE_GET(ring_desc);
|
|
|
|
switch (rxdma_error_code) {
|
|
|
|
/* TODO */
|
|
/* Add per error code accounting */
|
|
|
|
default:
|
|
QDF_TRACE(QDF_MODULE_ID_DP,
|
|
QDF_TRACE_LEVEL_ERROR,
|
|
"RXDMA error %d detected",
|
|
rxdma_error_code);
|
|
}
|
|
}
|
|
} else {
|
|
/* Should not come here */
|
|
qdf_assert(0);
|
|
}
|
|
rx_buf_cookie = HAL_RX_WBM_BUF_COOKIE_GET(ring_desc);
|
|
|
|
rx_desc = dp_rx_cookie_2_va(soc, rx_buf_cookie);
|
|
|
|
qdf_assert(rx_desc);
|
|
|
|
rx_bufs_used++;
|
|
|
|
qdf_nbuf_unmap_single(soc->osdev, rx_desc->nbuf,
|
|
QDF_DMA_BIDIRECTIONAL);
|
|
|
|
qdf_nbuf_free(rx_desc->nbuf);
|
|
|
|
dp_rx_add_to_free_desc_list(&head, &tail, rx_desc);
|
|
}
|
|
|
|
done:
|
|
hal_srng_access_end(hal_soc, hal_ring);
|
|
|
|
/* Assume MAC id = 0, owner = 0 */
|
|
if (rx_bufs_used)
|
|
dp_rx_buffers_replenish(soc, 0, rx_bufs_used, &head, &tail,
|
|
HAL_RX_BUF_RBM_SW3_BM);
|
|
|
|
return rx_bufs_used; /* Assume no scale factor for now */
|
|
}
|