3e0952dacc
In VP9 superframe usecase one ETB has multiple FBDs, and the EBD is after the first FBD.When driver receives first FBD that is not in DPB_LIST, it releases this buffer. Later on when the EBD arrives with dpb list property and it turns out that first FBD for which release was sent is actually in DPB_LIST, causing FW assertion. To fix this issue, in the reverse path, when handling dpb list property, mark those read only buffers which are not in dpb list as release eligible. Later, in the qbuf path for output buffers, send release for all those buffers which were earlier marked as release eligible. Change-Id: I5d6035b808653478311f41ebe53f60e728c7dd2a Signed-off-by: Darshana Patil <quic_darshana@quicinc.com>
152 lines
6.6 KiB
C
152 lines
6.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved.
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*/
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/* Copyright (c) 2022-2023. Qualcomm Innovation Center, Inc. All rights reserved. */
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#ifndef _MSM_VIDC_INST_H_
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#define _MSM_VIDC_INST_H_
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#include "msm_vidc_internal.h"
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#include "msm_vidc_memory.h"
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#include "msm_vidc_state.h"
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#include "hfi_property.h"
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struct msm_vidc_inst;
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#define call_session_op(c, op, ...) \
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(((c) && (c)->session_ops && (c)->session_ops->op) ? \
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((c)->session_ops->op(__VA_ARGS__)) : 0)
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struct msm_vidc_session_ops {
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u64 (*calc_freq)(struct msm_vidc_inst *inst, u32 data_size);
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int (*calc_bw)(struct msm_vidc_inst *inst,
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struct vidc_bus_vote_data* vote_data);
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int (*decide_work_route)(struct msm_vidc_inst *inst);
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int (*decide_work_mode)(struct msm_vidc_inst *inst);
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int (*decide_quality_mode)(struct msm_vidc_inst *inst);
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int (*buffer_size)(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type type);
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int (*min_count)(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type type);
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int (*extra_count)(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type type);
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int (*ring_buf_count)(struct msm_vidc_inst *inst, u32 data_size);
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};
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struct msm_vidc_mem_list_info {
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struct msm_vidc_mem_list bin;
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struct msm_vidc_mem_list arp;
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struct msm_vidc_mem_list comv;
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struct msm_vidc_mem_list non_comv;
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struct msm_vidc_mem_list line;
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struct msm_vidc_mem_list dpb;
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struct msm_vidc_mem_list persist;
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struct msm_vidc_mem_list vpss;
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struct msm_vidc_mem_list partial_data;
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};
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struct msm_vidc_buffers_info {
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struct msm_vidc_buffers input;
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struct msm_vidc_buffers output;
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struct msm_vidc_buffers read_only;
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struct msm_vidc_buffers input_meta;
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struct msm_vidc_buffers output_meta;
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struct msm_vidc_buffers bin;
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struct msm_vidc_buffers arp;
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struct msm_vidc_buffers comv;
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struct msm_vidc_buffers non_comv;
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struct msm_vidc_buffers line;
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struct msm_vidc_buffers dpb;
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struct msm_vidc_buffers persist;
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struct msm_vidc_buffers vpss;
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struct msm_vidc_buffers partial_data;
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};
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struct buf_queue {
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struct vb2_queue *vb2q;
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};
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struct msm_vidc_inst {
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struct list_head list;
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struct mutex lock;
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struct mutex request_lock;
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struct mutex client_lock;
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enum msm_vidc_state state;
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int (*event_handle)(struct msm_vidc_inst *inst,
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enum msm_vidc_event event, void *data);
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enum msm_vidc_sub_state sub_state;
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char sub_state_name[MAX_NAME_LENGTH];
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enum msm_vidc_domain_type domain;
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enum msm_vidc_codec_type codec;
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void *core;
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struct kref kref;
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u32 session_id;
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u8 debug_str[24];
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void *packet;
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u32 packet_size;
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struct v4l2_format fmts[MAX_PORT];
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struct v4l2_ctrl_handler ctrl_handler;
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struct v4l2_fh event_handler;
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struct v4l2_m2m_dev *m2m_dev;
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struct v4l2_m2m_ctx *m2m_ctx;
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struct v4l2_ctrl **ctrls;
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u32 num_ctrls;
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enum hfi_rate_control hfi_rc_type;
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enum hfi_layer_encoding_type hfi_layer_type;
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bool request;
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struct buf_queue bufq[MAX_PORT];
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struct msm_vidc_rectangle crop;
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struct msm_vidc_rectangle compose;
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struct msm_vidc_power power;
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struct vidc_bus_vote_data bus_data;
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struct msm_memory_pool pool[MSM_MEM_POOL_MAX];
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struct msm_vidc_buffers_info buffers;
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struct msm_vidc_mem_list_info mem_info;
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struct msm_vidc_timestamps timestamps;
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struct msm_vidc_timestamps ts_reorder; /* list of struct msm_vidc_timestamp */
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struct msm_vidc_subscription_params subcr_params[MAX_PORT];
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struct msm_vidc_hfi_frame_info hfi_frame_info;
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struct msm_vidc_decode_batch decode_batch;
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struct msm_vidc_decode_vpp_delay decode_vpp_delay;
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struct msm_vidc_session_idle session_idle;
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struct delayed_work stats_work;
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struct work_struct stability_work;
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struct msm_vidc_stability stability;
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struct workqueue_struct *workq;
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struct list_head enc_input_crs;
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struct list_head dmabuf_tracker; /* list of struct msm_memory_dmabuf */
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struct list_head input_timer_list; /* list of struct msm_vidc_input_timer */
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struct list_head caps_list;
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struct list_head children_list; /* struct msm_vidc_inst_cap_entry */
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struct list_head firmware_list; /* struct msm_vidc_inst_cap_entry */
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struct list_head pending_pkts; /* list of struct hfi_pending_packet */
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struct list_head fence_list; /* list of struct msm_vidc_fence */
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struct list_head buffer_stats_list; /* struct msm_vidc_buffer_stats */
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bool once_per_session_set;
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bool ipsc_properties_set;
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bool opsc_properties_set;
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bool caps_list_prepared;
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struct dentry *debugfs_root;
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struct msm_vidc_debug debug;
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struct debug_buf_count debug_count;
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struct msm_vidc_statistics stats;
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struct msm_vidc_inst_cap capabilities[INST_CAP_MAX+1];
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struct completion completions[MAX_SIGNAL];
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struct msm_vidc_fence_context fence_context;
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bool active;
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u64 last_qbuf_time_ns;
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u64 initial_time_us;
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u32 max_input_data_size;
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u32 dpb_list_payload[MAX_DPB_LIST_ARRAY_SIZE];
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bool input_dpb_list_enabled;
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bool output_dpb_list_enabled;
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u32 max_map_output_count;
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u32 auto_framerate;
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u32 max_rate;
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bool has_bframe;
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bool ir_enabled;
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u32 adjust_priority;
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bool iframe;
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u32 fw_min_count;
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};
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#endif // _MSM_VIDC_INST_H_
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