Files
android_kernel_samsung_sm86…/hal/wifi3.0/qca6390/hal_6390_tx.h
Balamurugan Mahalingam 6cf4c27417 qcacmn: add HAL support for qca6390
hal_hw_srng table and register offsets array, some target specific
functions  are defined separately for each new target.
define the same for qca6290.

Change-Id: I08c1243bc50460fac776e28186acfa192fb1ff66
2018-07-21 00:03:30 -07:00

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/*
* Copyright (c) 2018 The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* * Neither the name of The Linux Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "tcl_data_cmd.h"
#include "mac_tcl_reg_seq_hwioreg.h"
#include "phyrx_rssi_legacy.h"
#include "hal_hw_headers.h"
#include "hal_internal.h"
#include "cdp_txrx_mon_struct.h"
#include "qdf_trace.h"
#include "hal_rx.h"
#include "hal_tx.h"
#include "dp_types.h"
#include "hal_api_mon.h"
/**
* hal_tx_desc_set_dscp_tid_table_id_6390() - Sets DSCP to TID conversion
* table ID
* @desc: Handle to Tx Descriptor
* @id: DSCP to tid conversion table to be used for this frame
*
* Return: void
*/
void hal_tx_desc_set_dscp_tid_table_id_6390(void *desc,
uint8_t id)
{
HAL_SET_FLD(desc, TCL_DATA_CMD_5,
DSCP_TID_TABLE_NUM) |=
HAL_TX_SM(TCL_DATA_CMD_5,
DSCP_TID_TABLE_NUM, id);
}
qdf_export_symbol(hal_tx_desc_set_dscp_tid_table_id_6390);
#define DSCP_TID_TABLE_SIZE 24
#define NUM_WORDS_PER_DSCP_TID_TABLE (DSCP_TID_TABLE_SIZE / 4)
/**
* hal_tx_set_dscp_tid_map_6390() - Configure default DSCP to TID map table
* @soc: HAL SoC context
* @map: DSCP-TID mapping table
* @id: mapping table ID - 0-31
*
* DSCP are mapped to 8 TID values using TID values programmed
* in any of the 32 DSCP_TID_MAPS (id = 0-31).
*
* Return: none
*/
void hal_tx_set_dscp_tid_map_6390(void *hal_soc, uint8_t *map,
uint8_t id)
{
int i;
uint32_t addr, cmn_reg_addr;
uint32_t value = 0, regval;
uint8_t val[DSCP_TID_TABLE_SIZE], cnt = 0;
struct hal_soc *soc = (struct hal_soc *)hal_soc;
if (id >= HAL_MAX_HW_DSCP_TID_MAPS_11AX)
return;
cmn_reg_addr = HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ADDR(
SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET);
addr = HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(
SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET,
id * NUM_WORDS_PER_DSCP_TID_TABLE);
/* Enable read/write access */
regval = HAL_REG_READ(soc, cmn_reg_addr);
regval |=
(1 << HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_DSCP_TID_MAP_PROGRAM_EN_SHFT);
HAL_REG_WRITE(soc, cmn_reg_addr, regval);
/* Write 8 (24 bits) DSCP-TID mappings in each interation */
for (i = 0; i < 64; i += 8) {
value = (map[i] |
(map[i + 1] << 0x3) |
(map[i + 2] << 0x6) |
(map[i + 3] << 0x9) |
(map[i + 4] << 0xc) |
(map[i + 5] << 0xf) |
(map[i + 6] << 0x12) |
(map[i + 7] << 0x15));
qdf_mem_copy(&val[cnt], (void *)&value, 3);
cnt += 3;
}
for (i = 0; i < DSCP_TID_TABLE_SIZE; i += 4) {
regval = *(uint32_t *)(val + i);
HAL_REG_WRITE(soc, addr,
(regval & HWIO_TCL_R0_DSCP_TID_MAP_n_RMSK));
addr += 4;
}
/* Diasble read/write access */
regval = HAL_REG_READ(soc, cmn_reg_addr);
regval &=
~(HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_DSCP_TID_MAP_PROGRAM_EN_BMSK);
HAL_REG_WRITE(soc, cmn_reg_addr, regval);
}
qdf_export_symbol(hal_tx_set_dscp_tid_map_6390);
/**
* hal_tx_update_dscp_tid_6390() - Update the dscp tid map table as updated
* by the user
* @soc: HAL SoC context
* @map: DSCP-TID mapping table
* @id : MAP ID
* @dscp: DSCP_TID map index
*
* Return: void
*/
void hal_tx_update_dscp_tid_6390(void *hal_soc, uint8_t tid,
uint8_t id, uint8_t dscp)
{
int index;
uint32_t addr;
uint32_t value;
uint32_t regval;
struct hal_soc *soc = (struct hal_soc *)hal_soc;
addr = HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(
SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET, id);
index = dscp % HAL_TX_NUM_DSCP_PER_REGISTER;
addr += 4 * (dscp / HAL_TX_NUM_DSCP_PER_REGISTER);
value = tid << (HAL_TX_BITS_PER_TID * index);
regval = HAL_REG_READ(soc, addr);
regval &= ~(HAL_TX_TID_BITS_MASK << (HAL_TX_BITS_PER_TID * index));
regval |= value;
HAL_REG_WRITE(soc, addr, (regval & HWIO_TCL_R0_DSCP_TID_MAP_n_RMSK));
}
qdf_export_symbol(hal_tx_update_dscp_tid_6390);
/**
* hal_tx_desc_set_lmac_id - Set the lmac_id value
* @desc: Handle to Tx Descriptor
* @lmac_id: mac Id to ast matching
* b00 mac 0
* b01 mac 1
* b10 mac 2
* b11 all macs (legacy HK way)
*
* Return: void
*/
void hal_tx_desc_set_lmac_id_6390(void *desc,
uint8_t lmac_id)
{
HAL_SET_FLD(desc, TCL_DATA_CMD_4, LMAC_ID) |=
HAL_TX_SM(TCL_DATA_CMD_4, LMAC_ID, lmac_id);
}
qdf_export_symbol(hal_tx_desc_set_lmac_id_6390);