6a50aedbfa
Add support for all 4LM topologies in new DCE encoder framework. This change also aligns with the new way of checking topology information. Change-Id: I20785c96569fd07cbd8016d244a7e4c929bfa071 Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
414 lines
14 KiB
C
414 lines
14 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
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*/
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#ifndef __SDE_RM_H__
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#define __SDE_RM_H__
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#include <linux/list.h>
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#include "msm_kms.h"
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#include "sde_hw_top.h"
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#define SINGLE_CTL 1
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#define DUAL_CTL 2
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#define TOPOLOGY_QUADPIPE_MERGE_MODE(x) \
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(x == SDE_RM_TOPOLOGY_QUADPIPE_3DMERGE ||\
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x == SDE_RM_TOPOLOGY_QUADPIPE_3DMERGE_DSC ||\
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x == SDE_RM_TOPOLOGY_QUADPIPE_DSCMERGE ||\
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x == SDE_RM_TOPOLOGY_QUADPIPE_DSC4HSMERGE)
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#define TOPOLOGY_DUALPIPE_MERGE_MODE(x) \
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(x == SDE_RM_TOPOLOGY_DUALPIPE_DSCMERGE || \
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x == SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE || \
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x == SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE_VDC || \
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x == SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE_DSC)
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/**
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* enum sde_rm_topology_name - HW resource use case in use by connector
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* @SDE_RM_TOPOLOGY_NONE: No topology in use currently
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* @SDE_RM_TOPOLOGY_SINGLEPIPE: 1 LM, 1 PP, 1 INTF/WB
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* @SDE_RM_TOPOLOGY_SINGLEPIPE_DSC: 1 LM, 1 DSC, 1 PP, 1 INTF/WB
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* @SDE_RM_TOPOLOGY_SINGLEPIPE_VDC: 1 LM, 1 VDC, 1 PP, 1 INTF/WB
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* @SDE_RM_TOPOLOGY_DUALPIPE: 2 LM, 2 PP, 2 INTF/WB
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* @SDE_RM_TOPOLOGY_DUALPIPE_DSC: 2 LM, 2 DSC, 2 PP, 2 INTF/WB
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* @SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE: 2 LM, 2 PP, 3DMux, 1 INTF/WB
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* @SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE_DSC: 2 LM, 2 PP, 3DMux, 1 DSC, 1 INTF/WB
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* @SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE_VDC: 2 LM, 2 PP, 3DMux, 1 VDC, 1 INTF/WB
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* @SDE_RM_TOPOLOGY_DUALPIPE_DSCMERGE: 2 LM, 2 PP, 2 DSC Merge, 1 INTF/WB
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* @SDE_RM_TOPOLOGY_PPSPLIT: 1 LM, 2 PPs, 2 INTF/WB
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* @SDE_RM_TOPOLOGY_QUADPIPE_3DMERGE 4 LM, 4 PP, 3DMux, 2 INTF
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* @SDE_RM_TOPOLOGY_QUADPIPE_3DMERGE_DSC 4 LM, 4 PP, 3DMux, 3 DSC, 2 INTF
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* @SDE_RM_TOPOLOGY_QUADPIPE_DSCMERE 4 LM, 4 PP, 4 DSC Merge, 2 INTF
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* @SDE_RM_TOPOLOGY_QUADPIPE_DSC4HSMERGE 4 LM, 4 PP, 4 DSC Merge, 1 INTF
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*/
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enum sde_rm_topology_name {
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SDE_RM_TOPOLOGY_NONE = 0,
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SDE_RM_TOPOLOGY_SINGLEPIPE,
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SDE_RM_TOPOLOGY_SINGLEPIPE_DSC,
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SDE_RM_TOPOLOGY_SINGLEPIPE_VDC,
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SDE_RM_TOPOLOGY_DUALPIPE,
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SDE_RM_TOPOLOGY_DUALPIPE_DSC,
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SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE,
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SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE_DSC,
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SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE_VDC,
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SDE_RM_TOPOLOGY_DUALPIPE_DSCMERGE,
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SDE_RM_TOPOLOGY_PPSPLIT,
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SDE_RM_TOPOLOGY_QUADPIPE_3DMERGE,
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SDE_RM_TOPOLOGY_QUADPIPE_3DMERGE_DSC,
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SDE_RM_TOPOLOGY_QUADPIPE_DSCMERGE,
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SDE_RM_TOPOLOGY_QUADPIPE_DSC4HSMERGE,
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SDE_RM_TOPOLOGY_MAX,
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};
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/**
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* enum sde_rm_topology_control - HW resource use case in use by connector
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* @SDE_RM_TOPCTL_RESERVE_LOCK: If set, in AtomicTest phase, after a successful
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* test, reserve the resources for this display.
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* Normal behavior would not impact the reservation
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* list during the AtomicTest phase.
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* @SDE_RM_TOPCTL_RESERVE_CLEAR: If set, in AtomicTest phase, before testing,
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* release any reservation held by this display.
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* Normal behavior would not impact the
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* reservation list during the AtomicTest phase.
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* @SDE_RM_TOPCTL_DSPP: Require layer mixers with DSPP capabilities
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* @SDE_RM_TOPCTL_DS : Require layer mixers with DS capabilities
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* @SDE_RM_TOPCTL_CWB : Require layer mixers with CWB capabilities
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*/
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enum sde_rm_topology_control {
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SDE_RM_TOPCTL_RESERVE_LOCK,
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SDE_RM_TOPCTL_RESERVE_CLEAR,
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SDE_RM_TOPCTL_DSPP,
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SDE_RM_TOPCTL_DS,
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SDE_RM_TOPCTL_CWB,
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};
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/**
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* enum sde_rm_topology_control - HW resource use case in use by connector
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* @SDE_RM_QSYNC_DISABLED: If set, Qsync feature is supported and in
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* disable state.
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* @SDE_RM_QSYNC_CONTINUOUS_MODE: If set, Qsync is enabled in continuous
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* mode.
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* @SDE_RM_QSYNC_ONE_SHOT_MODE: If set, Qsync is enabled in one shot mode.
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*
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*/
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enum sde_rm_qsync_modes {
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SDE_RM_QSYNC_DISABLED,
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SDE_RM_QSYNC_CONTINUOUS_MODE,
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SDE_RM_QSYNC_ONE_SHOT_MODE
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};
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/**
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* struct sde_rm_topology_def - Topology table definition
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* @top_name: name identifying this topology
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* @num_lm: number of layer mixers used
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* @num_comp_enc: number of encoders used
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* @num_intf: number of interface used
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* @num_ctl: number of control path used
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* @needs_split_display: If set split display is enabled
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* @comp_type: type of compression supported
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*/
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struct sde_rm_topology_def {
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enum sde_rm_topology_name top_name;
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int num_lm;
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int num_comp_enc;
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int num_intf;
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int num_ctl;
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bool needs_split_display;
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enum msm_display_compression_type comp_type;
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};
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/**
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* struct sde_rm - SDE dynamic hardware resource manager
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* @dev: device handle for event logging purposes
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* @rsvps: list of hardware reservations by each crtc->encoder->connector
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* @hw_blks: array of lists of hardware resources present in the system, one
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* list per type of hardware block
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* @hw_mdp: hardware object for mdp_top
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* @lm_max_width: cached layer mixer maximum width
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* @rsvp_next_seq: sequence number for next reservation for debugging purposes
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* @rm_lock: resource manager mutex
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* @avail_res: Pointer with curr available resources
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*/
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struct sde_rm {
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struct drm_device *dev;
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struct list_head rsvps;
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struct list_head hw_blks[SDE_HW_BLK_MAX];
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struct sde_hw_mdp *hw_mdp;
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uint32_t lm_max_width;
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uint32_t rsvp_next_seq;
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struct mutex rm_lock;
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const struct sde_rm_topology_def *topology_tbl;
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struct msm_resource_caps_info avail_res;
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};
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/**
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* struct sde_rm_hw_blk - resource manager internal structure
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* forward declaration for single iterator definition without void pointer
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*/
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struct sde_rm_hw_blk;
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/**
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* struct sde_rm_hw_iter - iterator for use with sde_rm
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* @hw: sde_hw object requested, or NULL on failure
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* @blk: sde_rm internal block representation. Clients ignore. Used as iterator.
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* @enc_id: DRM ID of Encoder client wishes to search for, or 0 for Any Encoder
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* @type: Hardware Block Type client wishes to search for.
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*/
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struct sde_rm_hw_iter {
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void *hw;
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struct sde_rm_hw_blk *blk;
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uint32_t enc_id;
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enum sde_hw_blk_type type;
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};
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/**
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* struct sde_rm_hw_request - data for requesting hw blk
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* @hw: sde_hw object requested, or NULL on failure
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* @type: Hardware Block Type client wishes to search for
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* @id: Hardware block id
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*/
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struct sde_rm_hw_request {
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void *hw;
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enum sde_hw_blk_type type;
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int id;
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};
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/**
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* sde_rm_get_topology_name - get the name of the given topology config
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* @rm: SDE resource manager handle
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* @topology: msm_display_topology topology config
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* @Return: name of the given topology
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*/
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enum sde_rm_topology_name sde_rm_get_topology_name(struct sde_rm *rm,
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struct msm_display_topology topology);
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/**
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* sde_rm_init - Read hardware catalog and create reservation tracking objects
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* for all HW blocks.
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* @rm: SDE Resource Manager handle
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* @cat: Pointer to hardware catalog
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* @mmio: mapped register io address of MDP
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* @dev: device handle for event logging purposes
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* @Return: 0 on Success otherwise -ERROR
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*/
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int sde_rm_init(struct sde_rm *rm,
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struct sde_mdss_cfg *cat,
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void __iomem *mmio,
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struct drm_device *dev);
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/**
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* sde_rm_destroy - Free all memory allocated by sde_rm_init
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* @rm: SDE Resource Manager handle
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* @Return: 0 on Success otherwise -ERROR
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*/
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int sde_rm_destroy(struct sde_rm *rm);
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/**
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* sde_rm_reserve - Given a CRTC->Encoder->Connector display chain, analyze
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* the use connections and user requirements, specified through related
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* topology control properties, and reserve hardware blocks to that
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* display chain.
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* HW blocks can then be accessed through sde_rm_get_* functions.
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* HW Reservations should be released via sde_rm_release_hw.
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* @rm: SDE Resource Manager handle
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* @drm_enc: DRM Encoder handle
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* @crtc_state: Proposed Atomic DRM CRTC State handle
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* @conn_state: Proposed Atomic DRM Connector State handle
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* @test_only: Atomic-Test phase, discard results (unless property overrides)
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* @Return: 0 on Success otherwise -ERROR
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*/
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int sde_rm_reserve(struct sde_rm *rm,
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struct drm_encoder *drm_enc,
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struct drm_crtc_state *crtc_state,
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struct drm_connector_state *conn_state,
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bool test_only);
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/**
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* sde_rm_release - Given the encoder for the display chain, release any
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* HW blocks previously reserved for that use case.
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* @rm: SDE Resource Manager handle
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* @enc: DRM Encoder handle
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* @nxt: Choose option to release rsvp_nxt
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* @Return: 0 on Success otherwise -ERROR
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*/
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void sde_rm_release(struct sde_rm *rm, struct drm_encoder *enc, bool nxt);
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/**
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* sde_rm_get_mdp - Retrieve HW block for MDP TOP.
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* This is never reserved, and is usable by any display.
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* @rm: SDE Resource Manager handle
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* @Return: Pointer to hw block or NULL
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*/
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struct sde_hw_mdp *sde_rm_get_mdp(struct sde_rm *rm);
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/**
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* sde_rm_init_hw_iter - setup given iterator for new iteration over hw list
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* using sde_rm_get_hw
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* @iter: iter object to initialize
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* @enc_id: DRM ID of Encoder client wishes to search for, or 0 for Any Encoder
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* @type: Hardware Block Type client wishes to search for.
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*/
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void sde_rm_init_hw_iter(
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struct sde_rm_hw_iter *iter,
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uint32_t enc_id,
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enum sde_hw_blk_type type);
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/**
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* sde_rm_get_hw - retrieve reserved hw object given encoder and hw type
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* Meant to do a single pass through the hardware list to iteratively
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* retrieve hardware blocks of a given type for a given encoder.
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* Initialize an iterator object.
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* Set hw block type of interest. Set encoder id of interest, 0 for any.
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* Function returns first hw of type for that encoder.
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* Subsequent calls will return the next reserved hw of that type in-order.
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* Iterator HW pointer will be null on failure to find hw.
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* @rm: SDE Resource Manager handle
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* @iter: iterator object
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* @Return: true on match found, false on no match found
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*/
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bool sde_rm_get_hw(struct sde_rm *rm, struct sde_rm_hw_iter *iter);
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/**
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* sde_rm_request_hw_blk - retrieve the requested hardware block
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* @rm: SDE Resource Manager handle
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* @hw: holds the input and output information of the requested hw block
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* @Return: true on match found, false on no match found
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*/
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bool sde_rm_request_hw_blk(struct sde_rm *rm, struct sde_rm_hw_request *hw);
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/**
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* sde_rm_cont_splash_res_init - Read the current MDSS configuration
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* to update the splash data structure with the topology
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* configured by the bootloader.
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* @priv: DRM private structure handle
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* @rm: SDE Resource Manager handle
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* @splash_data: Pointer to the splash_data structure to be updated.
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* @cat: Pointer to the SDE catalog
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* @Return: 0 on success or error
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*/
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int sde_rm_cont_splash_res_init(struct msm_drm_private *priv,
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struct sde_rm *rm,
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struct sde_splash_data *splash_data,
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struct sde_mdss_cfg *cat);
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/**
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* sde_rm_update_topology - sets topology property of the connector
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* @rm: SDE resource manager handle
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* @conn_state: drm state of the connector
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* @topology: topology selected for the display
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* @return: 0 on success or error
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*/
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int sde_rm_update_topology(struct sde_rm *rm,
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struct drm_connector_state *conn_state,
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struct msm_display_topology *topology);
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/**
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* sde_rm_topology_get_topology_def - returns the information about num
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* of hw blocks used in this topology
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* @rm: SDE Resource Manager handle
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* @topology: topology selected for the display
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* @return: pointer to struct containing topology definition
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*/
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static inline const struct sde_rm_topology_def*
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sde_rm_topology_get_topology_def(
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struct sde_rm *rm,
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enum sde_rm_topology_name topology)
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{
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if ((!rm) || (topology <= SDE_RM_TOPOLOGY_NONE) ||
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(topology >= SDE_RM_TOPOLOGY_MAX)) {
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pr_err("invalid arguments: rm:%d topology:%d\n",
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rm == NULL, topology);
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return ERR_PTR(-EINVAL);
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}
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return &rm->topology_tbl[topology];
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}
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/**
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* sde_rm_topology_get_num_lm - returns number of mixers
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* used for this topology
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* @rm: SDE Resource Manager handle
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* @topology: topology selected for the display
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* @return: number of lms
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*/
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static inline int sde_rm_topology_get_num_lm(struct sde_rm *rm,
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enum sde_rm_topology_name topology)
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{
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if ((!rm) || (topology <= SDE_RM_TOPOLOGY_NONE) ||
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(topology >= SDE_RM_TOPOLOGY_MAX)) {
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pr_err("invalid arguments: rm:%d topology:%d\n",
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rm == NULL, topology);
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return -EINVAL;
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}
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return rm->topology_tbl[topology].num_lm;
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}
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/**
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* sde_rm_topology_is_dual_pipe - check if the topology used
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* is a dual-pipe mode one
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* @rm: SDE Resource Manager handle
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* @state: drm state of the crtc
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* @return: true if attached connector is in dual-pipe mode
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*/
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bool sde_rm_topology_is_dual_pipe(struct sde_rm *rm,
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struct drm_crtc_state *state);
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/**
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* sde_rm_topology_is_3dmux_dsc - check if the topology used
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* is a 3dmerge dsc mode one
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* @rm: SDE Resource Manager handle
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* @state: drm state of the crtc
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* @return: true if attached connector is in 3DMERGE DSC mode
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*/
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bool sde_rm_topology_is_3dmux_dsc(struct sde_rm *rm,
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struct drm_crtc_state *state);
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/**
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* sde_rm_topology_is_quad_pipe - check if the topology used
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* is a quad-pipe mode one
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* @rm: SDE Resource Manager handle
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* @state: drm state of the crtc
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* @return: true if attached connector is in quad-pipe mode
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*/
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bool sde_rm_topology_is_quad_pipe(struct sde_rm *rm,
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struct drm_crtc_state *state);
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/**
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* sde_rm_ext_blk_create_reserve - Create external HW blocks
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* in resource manager and reserve for specific encoder.
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* @rm: SDE Resource Manager handle
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* @hw: external HW block
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* @drm_enc: DRM Encoder handle
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* @Return: 0 on Success otherwise -ERROR
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*/
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int sde_rm_ext_blk_create_reserve(struct sde_rm *rm,
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struct sde_hw_blk *hw,
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struct drm_encoder *enc);
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/**
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* sde_rm_ext_blk_destroy - Given the encoder for the display chain, release
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* external HW blocks created for that.
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* @rm: SDE Resource Manager handle
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* @enc: DRM Encoder handle
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* @Return: 0 on Success otherwise -ERROR
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*/
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int sde_rm_ext_blk_destroy(struct sde_rm *rm,
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struct drm_encoder *enc);
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/**
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* sde_rm_get_resource_info - returns avail hw resource info
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* @mr: sde rm object
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* @drm_enc: drm encoder object
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* @avail_res: out parameter, available resource object
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*/
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void sde_rm_get_resource_info(struct sde_rm *rm,
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struct drm_encoder *drm_enc,
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struct msm_resource_caps_info *avail_res);
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#endif /* __SDE_RM_H__ */
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