9cbeb97832
Initial commit to add wcd9360 audio codec driver. Change-Id: Ib4e5e41ce7e540e4426c9ca26db8e834edc3d4da Signed-off-by: Vidyakumar Athota <vathota@codeaurora.org>
111 lines
2.8 KiB
C
111 lines
2.8 KiB
C
/*
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* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/regmap.h>
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#include <linux/device.h>
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#include <asoc/wcd9360-registers.h>
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#include "../core.h"
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#include "../wcd9xxx-regmap.h"
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#include "wcd9360-defaults.h"
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static bool wcd9360_is_readable_register(struct device *dev, unsigned int reg)
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{
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u8 pg_num, reg_offset;
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const u8 *reg_tbl = NULL;
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/*
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* Get the page number from MSB of codec register. If its 0x80, assign
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* the corresponding page index PAGE_0x80.
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*/
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pg_num = reg >> 8;
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if (pg_num == 128)
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pg_num = WCD9360_PAGE_128;
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else if (pg_num == 80)
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pg_num = WCD9360_PAGE_80;
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else if (pg_num > 15)
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return false;
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reg_tbl = wcd9360_reg[pg_num];
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reg_offset = reg & 0xFF;
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if (reg_tbl && reg_tbl[reg_offset])
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return true;
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else
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return false;
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}
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static bool wcd9360_is_volatile_register(struct device *dev, unsigned int reg)
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{
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u8 pg_num, reg_offset;
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const u8 *reg_tbl = NULL;
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pg_num = reg >> 8;
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if (pg_num == 1 || pg_num == 2 ||
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pg_num == 6 || pg_num == 7)
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return true;
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else if (pg_num == 128)
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pg_num = WCD9360_PAGE_128;
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else if (pg_num == 80)
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pg_num = WCD9360_PAGE_80;
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else if (pg_num > 15)
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return false;
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reg_tbl = wcd9360_reg[pg_num];
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reg_offset = reg & 0xFF;
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if (reg_tbl && reg_tbl[reg_offset] == WCD9360_RO)
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return true;
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if ((reg >= WCD9360_CODEC_RPM_RST_CTL) &&
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(reg <= WCD9360_CHIP_TIER_CTRL_ALT_FUNC_EN))
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return true;
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if ((reg >= WCD9360_CDC_ANC0_IIR_COEFF_1_CTL) &&
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(reg <= WCD9360_CDC_ANC0_FB_GAIN_CTL))
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return true;
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if ((reg >= WCD9360_CODEC_CPR_WR_DATA_0) &&
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(reg <= WCD9360_CODEC_CPR_RD_DATA_3))
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return true;
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/*
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* Need to mark volatile for registers that are writable but
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* only few bits are read-only
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*/
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switch (reg) {
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case WCD9360_CODEC_RPM_CLK_BYPASS:
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case WCD9360_CODEC_RPM_CLK_GATE:
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case WCD9360_CODEC_RPM_CLK_MCLK_CFG:
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case WCD9360_CODEC_CPR_SVS_CX_VDD:
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case WCD9360_CODEC_CPR_SVS2_CX_VDD:
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case WCD9360_CDC_SIDETONE_IIR0_IIR_COEF_B1_CTL:
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case WCD9360_CDC_SIDETONE_IIR0_IIR_COEF_B2_CTL:
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return true;
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}
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return false;
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}
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struct regmap_config wcd9360_regmap_config = {
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.reg_bits = 16,
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.val_bits = 8,
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.cache_type = REGCACHE_RBTREE,
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.reg_defaults = wcd9360_defaults,
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.num_reg_defaults = ARRAY_SIZE(wcd9360_defaults),
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.max_register = WCD9360_MAX_REGISTER,
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.volatile_reg = wcd9360_is_volatile_register,
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.readable_reg = wcd9360_is_readable_register,
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.can_multi_write = true,
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};
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