605b42f92c
Kernel audio drivers can be categorised into below folders. asoc - ALSA based drivers, asoc/codecs - codec drivers, ipc - APR IPC communication drivers, dsp - DSP low level drivers/Audio ION/ADSP Loader, dsp/codecs - Native encoders and decoders, soc - SoC based drivers(pinctrl/regmap/soundwire) Restructure drivers to above folder format. Include directories also follow above format. Change-Id: I8fa0857baaacd47db126fb5c1f1f5ed7e886dbc0 Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
68 lines
1.7 KiB
C
68 lines
1.7 KiB
C
/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/regmap.h>
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#include "sdm660-cdc-registers.h"
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extern struct reg_default
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msm89xx_cdc_core_defaults[MSM89XX_CDC_CORE_CACHE_SIZE];
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extern struct reg_default
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msm89xx_pmic_cdc_defaults[MSM89XX_PMIC_CDC_CACHE_SIZE];
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bool msm89xx_cdc_core_readable_reg(struct device *dev, unsigned int reg);
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bool msm89xx_cdc_core_writeable_reg(struct device *dev, unsigned int reg);
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bool msm89xx_cdc_core_volatile_reg(struct device *dev, unsigned int reg);
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enum {
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AIF1_PB = 0,
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AIF1_CAP,
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AIF2_VIFEED,
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AIF3_SVA,
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NUM_CODEC_DAIS,
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};
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enum codec_versions {
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TOMBAK_1_0,
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TOMBAK_2_0,
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CONGA,
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CAJON,
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CAJON_2_0,
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DIANGU,
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DRAX_CDC,
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UNSUPPORTED,
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};
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/* Support different hph modes */
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enum {
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NORMAL_MODE = 0,
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HD2_MODE,
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};
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enum dig_cdc_notify_event {
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DIG_CDC_EVENT_INVALID,
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DIG_CDC_EVENT_CLK_ON,
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DIG_CDC_EVENT_CLK_OFF,
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DIG_CDC_EVENT_RX1_MUTE_ON,
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DIG_CDC_EVENT_RX1_MUTE_OFF,
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DIG_CDC_EVENT_RX2_MUTE_ON,
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DIG_CDC_EVENT_RX2_MUTE_OFF,
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DIG_CDC_EVENT_RX3_MUTE_ON,
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DIG_CDC_EVENT_RX3_MUTE_OFF,
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DIG_CDC_EVENT_PRE_RX1_INT_ON,
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DIG_CDC_EVENT_PRE_RX2_INT_ON,
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DIG_CDC_EVENT_POST_RX1_INT_OFF,
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DIG_CDC_EVENT_POST_RX2_INT_OFF,
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DIG_CDC_EVENT_SSR_DOWN,
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DIG_CDC_EVENT_SSR_UP,
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DIG_CDC_EVENT_LAST,
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};
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