4a6c3e8568
Put MCL specific cfg default values under feaature flag WLAN_MAX_PDEVS. Change-Id: If34c10ca37e67fbd5fa36d04059be79600c3c328 CRs-Fixed: 2477486
693 行
22 KiB
C
693 行
22 KiB
C
/*
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* Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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* above copyright notice and this permission notice appear in all
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* copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
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* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
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* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
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* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
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* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
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* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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* PERFORMANCE OF THIS SOFTWARE.
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*/
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/**
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* DOC: This file contains definitions of Data Path configuration.
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*/
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#ifndef _CFG_DP_H_
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#define _CFG_DP_H_
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#include "cfg_define.h"
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#define WLAN_CFG_MAX_CLIENTS 64
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#define WLAN_CFG_MAX_CLIENTS_MIN 8
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#define WLAN_CFG_MAX_CLIENTS_MAX 64
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/* Change this to a lower value to enforce scattered idle list mode */
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#define WLAN_CFG_MAX_ALLOC_SIZE 0x200000
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#define WLAN_CFG_MAX_ALLOC_SIZE_MIN 0x80000
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#define WLAN_CFG_MAX_ALLOC_SIZE_MAX 0x200000
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#define WLAN_CFG_NUM_TCL_DATA_RINGS 3
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#define WLAN_CFG_NUM_TCL_DATA_RINGS_MIN 3
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#define WLAN_CFG_NUM_TCL_DATA_RINGS_MAX 3
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#if defined(QCA_LL_TX_FLOW_CONTROL_V2) || \
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defined(QCA_LL_PDEV_TX_FLOW_CONTROL)
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#define WLAN_CFG_TX_FLOW_START_QUEUE_OFFSET 10
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#define WLAN_CFG_TX_FLOW_STOP_QUEUE_TH 15
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#else
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#define WLAN_CFG_TX_FLOW_START_QUEUE_OFFSET 0
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#define WLAN_CFG_TX_FLOW_STOP_QUEUE_TH 0
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#endif
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#define WLAN_CFG_PER_PDEV_TX_RING_MIN 0
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#define WLAN_CFG_PER_PDEV_TX_RING_MAX 1
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#if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
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#define WLAN_CFG_PER_PDEV_RX_RING 0
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#define WLAN_CFG_PER_PDEV_LMAC_RING 0
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#define WLAN_LRO_ENABLE 0
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#define WLAN_CFG_MAC_PER_TARGET 2
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#ifdef IPA_OFFLOAD
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/* Size of TCL TX Ring */
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#define WLAN_CFG_TX_RING_SIZE 1024
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#define WLAN_CFG_PER_PDEV_TX_RING 0
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#define WLAN_CFG_IPA_UC_TX_BUF_SIZE 2048
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#define WLAN_CFG_IPA_UC_TX_PARTITION_BASE 3000
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#define WLAN_CFG_IPA_UC_RX_IND_RING_COUNT 1024
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#else
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#define WLAN_CFG_TX_RING_SIZE 512
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#define WLAN_CFG_PER_PDEV_TX_RING 1
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#define WLAN_CFG_IPA_UC_TX_BUF_SIZE 0
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#define WLAN_CFG_IPA_UC_TX_PARTITION_BASE 0
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#define WLAN_CFG_IPA_UC_RX_IND_RING_COUNT 0
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#endif
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#define WLAN_CFG_TX_COMP_RING_SIZE 1024
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/* Tx Descriptor and Tx Extension Descriptor pool sizes */
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#define WLAN_CFG_NUM_TX_DESC 1024
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#define WLAN_CFG_NUM_TX_EXT_DESC 1024
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/* Interrupt Mitigation - Batch threshold in terms of number of frames */
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#define WLAN_CFG_INT_BATCH_THRESHOLD_TX 1
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#define WLAN_CFG_INT_BATCH_THRESHOLD_RX 1
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#define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER 1
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/* Interrupt Mitigation - Timer threshold in us */
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#define WLAN_CFG_INT_TIMER_THRESHOLD_TX 8
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#define WLAN_CFG_INT_TIMER_THRESHOLD_RX 8
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#define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER 8
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#endif
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#define WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING 256
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#define WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING 256
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#define WLAN_CFG_PER_PDEV_RX_RING_MIN 0
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#define WLAN_CFG_PER_PDEV_RX_RING_MAX 0
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#define WLAN_CFG_PER_PDEV_LMAC_RING_MIN 0
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#define WLAN_CFG_PER_PDEV_LMAC_RING_MAX 1
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#define WLAN_CFG_TX_RING_SIZE_MIN 512
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#define WLAN_CFG_TX_RING_SIZE_MAX 2048
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#define WLAN_CFG_TX_COMP_RING_SIZE_MIN 512
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#define WLAN_CFG_TX_COMP_RING_SIZE_MAX 0x80000
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#define WLAN_CFG_NUM_TX_DESC_MIN 1024
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#define WLAN_CFG_NUM_TX_DESC_MAX 32768
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#define WLAN_CFG_NUM_TX_EXT_DESC_MIN 1024
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#define WLAN_CFG_NUM_TX_EXT_DESC_MAX 0x80000
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#define WLAN_CFG_INT_BATCH_THRESHOLD_TX_MIN 1
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#define WLAN_CFG_INT_BATCH_THRESHOLD_TX_MAX 256
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#define WLAN_CFG_INT_BATCH_THRESHOLD_RX_MIN 1
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#define WLAN_CFG_INT_BATCH_THRESHOLD_RX_MAX 128
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#define WLAN_CFG_INT_BATCH_THRESHOLD_REO_RING_MIN 1
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#define WLAN_CFG_INT_BATCH_THRESHOLD_REO_RING_MAX 128
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#define WLAN_CFG_INT_BATCH_THRESHOLD_WBM_RELEASE_RING_MIN 1
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#define WLAN_CFG_INT_BATCH_THRESHOLD_WBM_RELEASE_RING_MAX 128
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#define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MIN 1
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#define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MAX 1
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#define WLAN_CFG_INT_TIMER_THRESHOLD_TX_MIN 8
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#define WLAN_CFG_INT_TIMER_THRESHOLD_TX_MAX 100
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#define WLAN_CFG_INT_TIMER_THRESHOLD_RX_MIN 8
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#define WLAN_CFG_INT_TIMER_THRESHOLD_RX_MAX 500
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#define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MIN 8
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#define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MAX 1000
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#define WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING_MIN 8
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#define WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING_MAX 500
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#define WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING_MIN 8
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#define WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING_MAX 500
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#define WLAN_CFG_NSS_TX_COMP_RING_SIZE 0x2000
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#define WLAN_CFG_NSS_TX_COMP_RING_SIZE_MIN 0x2000
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#define WLAN_CFG_NSS_TX_COMP_RING_SIZE_MAX 0xc000
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#ifdef QCA_LL_TX_FLOW_CONTROL_V2
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/* Per vdev pools */
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#define WLAN_CFG_NUM_TX_DESC_POOL 3
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#define WLAN_CFG_NUM_TXEXT_DESC_POOL 3
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#else /* QCA_LL_TX_FLOW_CONTROL_V2 */
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#ifdef TX_PER_PDEV_DESC_POOL
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#define WLAN_CFG_NUM_TX_DESC_POOL MAX_PDEV_CNT
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#define WLAN_CFG_NUM_TXEXT_DESC_POOL MAX_PDEV_CNT
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#else /* TX_PER_PDEV_DESC_POOL */
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#define WLAN_CFG_NUM_TX_DESC_POOL 3
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#define WLAN_CFG_NUM_TXEXT_DESC_POOL 3
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#endif /* TX_PER_PDEV_DESC_POOL */
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#endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
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#define WLAN_CFG_NUM_TXEXT_DESC_POOL_MIN 1
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#define WLAN_CFG_NUM_TXEXT_DESC_POOL_MAX 4
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#define WLAN_CFG_HTT_PKT_TYPE 2
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#define WLAN_CFG_HTT_PKT_TYPE_MIN 2
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#define WLAN_CFG_HTT_PKT_TYPE_MAX 2
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#define WLAN_CFG_MAX_PEER_ID 64
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#define WLAN_CFG_MAX_PEER_ID_MIN 64
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#define WLAN_CFG_MAX_PEER_ID_MAX 64
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#define WLAN_CFG_RX_DEFRAG_TIMEOUT 100
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#define WLAN_CFG_RX_DEFRAG_TIMEOUT_MIN 100
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#define WLAN_CFG_RX_DEFRAG_TIMEOUT_MAX 100
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#define WLAN_CFG_NUM_TCL_DATA_RINGS 3
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#define WLAN_CFG_NUM_TCL_DATA_RINGS_MIN 3
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#define WLAN_CFG_NUM_TCL_DATA_RINGS_MAX 3
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#define WLAN_CFG_NUM_REO_DEST_RING 4
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#define WLAN_CFG_NUM_REO_DEST_RING_MIN 4
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#define WLAN_CFG_NUM_REO_DEST_RING_MAX 4
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#define WLAN_CFG_WBM_RELEASE_RING_SIZE 64
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#define WLAN_CFG_WBM_RELEASE_RING_SIZE_MIN 64
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#define WLAN_CFG_WBM_RELEASE_RING_SIZE_MAX 64
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#define WLAN_CFG_TCL_CMD_RING_SIZE 32
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#define WLAN_CFG_TCL_CMD_RING_SIZE_MIN 32
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#define WLAN_CFG_TCL_CMD_RING_SIZE_MAX 32
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#define WLAN_CFG_TCL_STATUS_RING_SIZE 32
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#define WLAN_CFG_TCL_STATUS_RING_SIZE_MIN 32
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#define WLAN_CFG_TCL_STATUS_RING_SIZE_MAX 32
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#if defined(QCA_WIFI_QCA6290)
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#define WLAN_CFG_REO_DST_RING_SIZE 1024
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#else
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#define WLAN_CFG_REO_DST_RING_SIZE 2048
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#endif
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#define WLAN_CFG_REO_DST_RING_SIZE_MIN 1024
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#define WLAN_CFG_REO_DST_RING_SIZE_MAX 2048
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#define WLAN_CFG_REO_REINJECT_RING_SIZE 32
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#define WLAN_CFG_REO_REINJECT_RING_SIZE_MIN 32
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#define WLAN_CFG_REO_REINJECT_RING_SIZE_MAX 32
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#define WLAN_CFG_RX_RELEASE_RING_SIZE 1024
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#define WLAN_CFG_RX_RELEASE_RING_SIZE_MIN 8
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#if defined(QCA_WIFI_QCA6390)
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#define WLAN_CFG_RX_RELEASE_RING_SIZE_MAX 1024
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#else
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#define WLAN_CFG_RX_RELEASE_RING_SIZE_MAX 8192
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#endif
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#define WLAN_CFG_REO_EXCEPTION_RING_SIZE 128
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#define WLAN_CFG_REO_EXCEPTION_RING_SIZE_MIN 128
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#define WLAN_CFG_REO_EXCEPTION_RING_SIZE_MAX 128
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#define WLAN_CFG_REO_CMD_RING_SIZE 128
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#define WLAN_CFG_REO_CMD_RING_SIZE_MIN 64
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#define WLAN_CFG_REO_CMD_RING_SIZE_MAX 128
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#define WLAN_CFG_REO_STATUS_RING_SIZE 256
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#define WLAN_CFG_REO_STATUS_RING_SIZE_MIN 128
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#define WLAN_CFG_REO_STATUS_RING_SIZE_MAX 2048
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#define WLAN_CFG_RXDMA_BUF_RING_SIZE 1024
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#define WLAN_CFG_RXDMA_BUF_RING_SIZE_MIN 1024
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#define WLAN_CFG_RXDMA_BUF_RING_SIZE_MAX 1024
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#define WLAN_CFG_RXDMA_REFILL_RING_SIZE 4096
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#define WLAN_CFG_RXDMA_REFILL_RING_SIZE_MIN 16
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#define WLAN_CFG_RXDMA_REFILL_RING_SIZE_MAX 4096
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#define WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE 4096
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#define WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MIN 16
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#define WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MAX 8192
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#define WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE 2048
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#define WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MIN 48
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#define WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MAX 8192
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#define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE 1024
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#define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MIN 16
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#define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MAX 8192
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#define WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE 4096
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#define WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MIN 4096
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#define WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MAX 16384
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#define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE 1024
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#define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MIN 1024
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#define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MAX 8192
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/* DP INI Declerations */
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#define CFG_DP_HTT_PACKET_TYPE \
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CFG_INI_UINT("dp_htt_packet_type", \
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WLAN_CFG_HTT_PKT_TYPE_MIN, \
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WLAN_CFG_HTT_PKT_TYPE_MAX, \
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WLAN_CFG_HTT_PKT_TYPE, \
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CFG_VALUE_OR_DEFAULT, "DP HTT packet type")
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#define CFG_DP_INT_BATCH_THRESHOLD_OTHER \
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CFG_INI_UINT("dp_int_batch_threshold_other", \
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WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MIN, \
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WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MAX, \
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WLAN_CFG_INT_BATCH_THRESHOLD_OTHER, \
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CFG_VALUE_OR_DEFAULT, "DP INT batch threshold Other")
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#define CFG_DP_INT_BATCH_THRESHOLD_RX \
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CFG_INI_UINT("dp_int_batch_threshold_rx", \
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WLAN_CFG_INT_BATCH_THRESHOLD_RX_MIN, \
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WLAN_CFG_INT_BATCH_THRESHOLD_RX_MAX, \
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WLAN_CFG_INT_BATCH_THRESHOLD_RX, \
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CFG_VALUE_OR_DEFAULT, "DP INT batch threshold Rx")
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#define CFG_DP_INT_BATCH_THRESHOLD_TX \
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CFG_INI_UINT("dp_int_batch_threshold_tx", \
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WLAN_CFG_INT_BATCH_THRESHOLD_TX_MIN, \
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WLAN_CFG_INT_BATCH_THRESHOLD_TX_MAX, \
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WLAN_CFG_INT_BATCH_THRESHOLD_TX, \
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CFG_VALUE_OR_DEFAULT, "DP INT threshold Tx")
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#define CFG_DP_INT_TIMER_THRESHOLD_OTHER \
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CFG_INI_UINT("dp_int_timer_threshold_other", \
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WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MIN, \
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WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MAX, \
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WLAN_CFG_INT_TIMER_THRESHOLD_OTHER, \
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CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Other")
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#define CFG_DP_INT_TIMER_THRESHOLD_RX \
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CFG_INI_UINT("dp_int_timer_threshold_rx", \
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WLAN_CFG_INT_TIMER_THRESHOLD_RX_MIN, \
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WLAN_CFG_INT_TIMER_THRESHOLD_RX_MAX, \
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WLAN_CFG_INT_TIMER_THRESHOLD_RX, \
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CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Rx")
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#define CFG_DP_INT_TIMER_THRESHOLD_REO_RING \
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CFG_INI_UINT("dp_int_timer_threshold_reo_ring", \
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WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING_MIN, \
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WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING_MAX, \
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WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING, \
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CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Reo ring")
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#define CFG_DP_INT_TIMER_THRESHOLD_WBM_RELEASE_RING \
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CFG_INI_UINT("dp_int_timer_threshold_wbm_release_ring", \
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WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING_MIN, \
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WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING_MAX, \
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WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING, \
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CFG_VALUE_OR_DEFAULT, "DP INT timer threshold wbm release ring")
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#define CFG_DP_INT_TIMER_THRESHOLD_TX \
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CFG_INI_UINT("dp_int_timer_threshold_tx", \
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WLAN_CFG_INT_TIMER_THRESHOLD_TX_MIN, \
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WLAN_CFG_INT_TIMER_THRESHOLD_TX_MAX, \
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WLAN_CFG_INT_TIMER_THRESHOLD_TX, \
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CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Tx")
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#define CFG_DP_MAX_ALLOC_SIZE \
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CFG_INI_UINT("dp_max_alloc_size", \
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WLAN_CFG_MAX_ALLOC_SIZE_MIN, \
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WLAN_CFG_MAX_ALLOC_SIZE_MAX, \
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WLAN_CFG_MAX_ALLOC_SIZE, \
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CFG_VALUE_OR_DEFAULT, "DP Max Alloc Size")
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#define CFG_DP_MAX_CLIENTS \
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CFG_INI_UINT("dp_max_clients", \
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WLAN_CFG_MAX_CLIENTS_MIN, \
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WLAN_CFG_MAX_CLIENTS_MAX, \
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WLAN_CFG_MAX_CLIENTS, \
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CFG_VALUE_OR_DEFAULT, "DP Max Clients")
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#define CFG_DP_MAX_PEER_ID \
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CFG_INI_UINT("dp_max_peer_id", \
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WLAN_CFG_MAX_PEER_ID_MIN, \
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WLAN_CFG_MAX_PEER_ID_MAX, \
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WLAN_CFG_MAX_PEER_ID, \
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CFG_VALUE_OR_DEFAULT, "DP Max Peer ID")
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#define CFG_DP_REO_DEST_RINGS \
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CFG_INI_UINT("dp_reo_dest_rings", \
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WLAN_CFG_NUM_REO_DEST_RING_MIN, \
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WLAN_CFG_NUM_REO_DEST_RING_MAX, \
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WLAN_CFG_NUM_REO_DEST_RING, \
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CFG_VALUE_OR_DEFAULT, "DP REO Destination Rings")
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#define CFG_DP_TCL_DATA_RINGS \
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CFG_INI_UINT("dp_tcl_data_rings", \
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WLAN_CFG_NUM_TCL_DATA_RINGS_MIN, \
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WLAN_CFG_NUM_TCL_DATA_RINGS_MAX, \
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WLAN_CFG_NUM_TCL_DATA_RINGS, \
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CFG_VALUE_OR_DEFAULT, "DP TCL Data Rings")
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#define CFG_DP_TX_DESC \
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CFG_INI_UINT("dp_tx_desc", \
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WLAN_CFG_NUM_TX_DESC_MIN, \
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WLAN_CFG_NUM_TX_DESC_MAX, \
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WLAN_CFG_NUM_TX_DESC, \
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CFG_VALUE_OR_DEFAULT, "DP Tx Descriptors")
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#define CFG_DP_TX_EXT_DESC \
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CFG_INI_UINT("dp_tx_ext_desc", \
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WLAN_CFG_NUM_TX_EXT_DESC_MIN, \
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WLAN_CFG_NUM_TX_EXT_DESC_MAX, \
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WLAN_CFG_NUM_TX_EXT_DESC, \
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CFG_VALUE_OR_DEFAULT, "DP Tx Ext Descriptors")
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#define CFG_DP_TX_EXT_DESC_POOLS \
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CFG_INI_UINT("dp_tx_ext_desc_pool", \
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WLAN_CFG_NUM_TXEXT_DESC_POOL_MIN, \
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WLAN_CFG_NUM_TXEXT_DESC_POOL_MAX, \
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WLAN_CFG_NUM_TXEXT_DESC_POOL, \
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CFG_VALUE_OR_DEFAULT, "DP Tx Ext Descriptors Pool")
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#define CFG_DP_PDEV_RX_RING \
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CFG_INI_UINT("dp_pdev_rx_ring", \
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WLAN_CFG_PER_PDEV_RX_RING_MIN, \
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WLAN_CFG_PER_PDEV_RX_RING_MAX, \
|
|
WLAN_CFG_PER_PDEV_RX_RING, \
|
|
CFG_VALUE_OR_DEFAULT, "DP PDEV Rx Ring")
|
|
|
|
#define CFG_DP_PDEV_TX_RING \
|
|
CFG_INI_UINT("dp_pdev_tx_ring", \
|
|
WLAN_CFG_PER_PDEV_TX_RING_MIN, \
|
|
WLAN_CFG_PER_PDEV_TX_RING_MAX, \
|
|
WLAN_CFG_PER_PDEV_TX_RING, \
|
|
CFG_VALUE_OR_DEFAULT, \
|
|
"DP PDEV Tx Ring")
|
|
|
|
#define CFG_DP_RX_DEFRAG_TIMEOUT \
|
|
CFG_INI_UINT("dp_rx_defrag_timeout", \
|
|
WLAN_CFG_RX_DEFRAG_TIMEOUT_MIN, \
|
|
WLAN_CFG_RX_DEFRAG_TIMEOUT_MAX, \
|
|
WLAN_CFG_RX_DEFRAG_TIMEOUT, \
|
|
CFG_VALUE_OR_DEFAULT, "DP Rx Defrag Timeout")
|
|
|
|
#define CFG_DP_TX_COMPL_RING_SIZE \
|
|
CFG_INI_UINT("dp_tx_compl_ring_size", \
|
|
WLAN_CFG_TX_COMP_RING_SIZE_MIN, \
|
|
WLAN_CFG_TX_COMP_RING_SIZE_MAX, \
|
|
WLAN_CFG_TX_COMP_RING_SIZE, \
|
|
CFG_VALUE_OR_DEFAULT, "DP Tx Completion Ring Size")
|
|
|
|
#define CFG_DP_TX_RING_SIZE \
|
|
CFG_INI_UINT("dp_tx_ring_size", \
|
|
WLAN_CFG_TX_RING_SIZE_MIN,\
|
|
WLAN_CFG_TX_RING_SIZE_MAX,\
|
|
WLAN_CFG_TX_RING_SIZE,\
|
|
CFG_VALUE_OR_DEFAULT, "DP Tx Ring Size")
|
|
|
|
#define CFG_DP_NSS_COMP_RING_SIZE \
|
|
CFG_INI_UINT("dp_nss_comp_ring_size", \
|
|
WLAN_CFG_NSS_TX_COMP_RING_SIZE_MIN, \
|
|
WLAN_CFG_NSS_TX_COMP_RING_SIZE_MAX, \
|
|
WLAN_CFG_NSS_TX_COMP_RING_SIZE, \
|
|
CFG_VALUE_OR_DEFAULT, "DP NSS completion Ring Size")
|
|
|
|
#define CFG_DP_PDEV_LMAC_RING \
|
|
CFG_INI_UINT("dp_pdev_lmac_ring", \
|
|
WLAN_CFG_PER_PDEV_LMAC_RING_MIN, \
|
|
WLAN_CFG_PER_PDEV_LMAC_RING_MAX, \
|
|
WLAN_CFG_PER_PDEV_LMAC_RING, \
|
|
CFG_VALUE_OR_DEFAULT, "DP pdev LMAC ring")
|
|
|
|
#define CFG_DP_BASE_HW_MAC_ID \
|
|
CFG_INI_UINT("dp_base_hw_macid", \
|
|
0, 1, 1, \
|
|
CFG_VALUE_OR_DEFAULT, "DP Base HW Mac ID")
|
|
|
|
#define CFG_DP_RX_HASH \
|
|
CFG_INI_BOOL("dp_rx_hash", true, \
|
|
"DP Rx Hash")
|
|
|
|
#define CFG_DP_TSO \
|
|
CFG_INI_BOOL("TSOEnable", false, \
|
|
"DP TSO Enabled")
|
|
|
|
#define CFG_DP_LRO \
|
|
CFG_INI_BOOL("LROEnable", WLAN_LRO_ENABLE, \
|
|
"DP LRO Enable")
|
|
|
|
#define CFG_DP_SG \
|
|
CFG_INI_BOOL("dp_sg_support", false, \
|
|
"DP SG Enable")
|
|
|
|
#define CFG_DP_GRO \
|
|
CFG_INI_BOOL("GROEnable", false, \
|
|
"DP GRO Enable")
|
|
|
|
#define CFG_DP_OL_TX_CSUM \
|
|
CFG_INI_BOOL("dp_offload_tx_csum_support", false, \
|
|
"DP tx csum Enable")
|
|
|
|
#define CFG_DP_OL_RX_CSUM \
|
|
CFG_INI_BOOL("dp_offload_rx_csum_support", false, \
|
|
"DP rx csum Enable")
|
|
|
|
#define CFG_DP_RAWMODE \
|
|
CFG_INI_BOOL("dp_rawmode_support", false, \
|
|
"DP rawmode Enable")
|
|
|
|
#define CFG_DP_PEER_FLOW_CTRL \
|
|
CFG_INI_BOOL("dp_peer_flow_control_support", false, \
|
|
"DP peer flow ctrl Enable")
|
|
|
|
#define CFG_DP_NAPI \
|
|
CFG_INI_BOOL("dp_napi_enabled", MCL_OR_WIN_VALUE(true, false), \
|
|
"DP Napi Enabled")
|
|
|
|
#define CFG_DP_TCP_UDP_CKSUM_OFFLOAD \
|
|
CFG_INI_BOOL("gEnableIpTcpUdpChecksumOffload", true, \
|
|
"DP TCP UDP Checksum Offload")
|
|
|
|
#define CFG_DP_DEFRAG_TIMEOUT_CHECK \
|
|
CFG_INI_BOOL("dp_defrag_timeout_check", true, \
|
|
"DP Defrag Timeout Check")
|
|
|
|
#define CFG_DP_WBM_RELEASE_RING \
|
|
CFG_INI_UINT("dp_wbm_release_ring", \
|
|
WLAN_CFG_WBM_RELEASE_RING_SIZE_MIN, \
|
|
WLAN_CFG_WBM_RELEASE_RING_SIZE_MAX, \
|
|
WLAN_CFG_WBM_RELEASE_RING_SIZE, \
|
|
CFG_VALUE_OR_DEFAULT, "DP WBM Release Ring")
|
|
|
|
#define CFG_DP_TCL_CMD_RING \
|
|
CFG_INI_UINT("dp_tcl_cmd_ring", \
|
|
WLAN_CFG_TCL_CMD_RING_SIZE_MIN, \
|
|
WLAN_CFG_TCL_CMD_RING_SIZE_MAX, \
|
|
WLAN_CFG_TCL_CMD_RING_SIZE, \
|
|
CFG_VALUE_OR_DEFAULT, "DP TCL command ring")
|
|
|
|
#define CFG_DP_TCL_STATUS_RING \
|
|
CFG_INI_UINT("dp_tcl_status_ring",\
|
|
WLAN_CFG_TCL_STATUS_RING_SIZE_MIN, \
|
|
WLAN_CFG_TCL_STATUS_RING_SIZE_MAX, \
|
|
WLAN_CFG_TCL_STATUS_RING_SIZE, \
|
|
CFG_VALUE_OR_DEFAULT, "DP TCL status ring")
|
|
|
|
#define CFG_DP_REO_REINJECT_RING \
|
|
CFG_INI_UINT("dp_reo_reinject_ring", \
|
|
WLAN_CFG_REO_REINJECT_RING_SIZE_MIN, \
|
|
WLAN_CFG_REO_REINJECT_RING_SIZE_MAX, \
|
|
WLAN_CFG_REO_REINJECT_RING_SIZE, \
|
|
CFG_VALUE_OR_DEFAULT, "DP REO reinject ring")
|
|
|
|
#define CFG_DP_RX_RELEASE_RING \
|
|
CFG_INI_UINT("dp_rx_release_ring", \
|
|
WLAN_CFG_RX_RELEASE_RING_SIZE_MIN, \
|
|
WLAN_CFG_RX_RELEASE_RING_SIZE_MAX, \
|
|
WLAN_CFG_RX_RELEASE_RING_SIZE, \
|
|
CFG_VALUE_OR_DEFAULT, "DP Rx release ring")
|
|
|
|
#define CFG_DP_REO_EXCEPTION_RING \
|
|
CFG_INI_UINT("dp_reo_exception_ring", \
|
|
WLAN_CFG_REO_EXCEPTION_RING_SIZE_MIN, \
|
|
WLAN_CFG_REO_EXCEPTION_RING_SIZE_MAX, \
|
|
WLAN_CFG_REO_EXCEPTION_RING_SIZE, \
|
|
CFG_VALUE_OR_DEFAULT, "DP REO exception ring")
|
|
|
|
#define CFG_DP_REO_CMD_RING \
|
|
CFG_INI_UINT("dp_reo_cmd_ring", \
|
|
WLAN_CFG_REO_CMD_RING_SIZE_MIN, \
|
|
WLAN_CFG_REO_CMD_RING_SIZE_MAX, \
|
|
WLAN_CFG_REO_CMD_RING_SIZE, \
|
|
CFG_VALUE_OR_DEFAULT, "DP REO command ring")
|
|
|
|
#define CFG_DP_REO_STATUS_RING \
|
|
CFG_INI_UINT("dp_reo_status_ring", \
|
|
WLAN_CFG_REO_STATUS_RING_SIZE_MIN, \
|
|
WLAN_CFG_REO_STATUS_RING_SIZE_MAX, \
|
|
WLAN_CFG_REO_STATUS_RING_SIZE, \
|
|
CFG_VALUE_OR_DEFAULT, "DP REO status ring")
|
|
|
|
#define CFG_DP_RXDMA_BUF_RING \
|
|
CFG_INI_UINT("dp_rxdma_buf_ring", \
|
|
WLAN_CFG_RXDMA_BUF_RING_SIZE_MIN, \
|
|
WLAN_CFG_RXDMA_BUF_RING_SIZE_MAX, \
|
|
WLAN_CFG_RXDMA_BUF_RING_SIZE, \
|
|
CFG_VALUE_OR_DEFAULT, "DP RXDMA buffer ring")
|
|
|
|
#define CFG_DP_RXDMA_REFILL_RING \
|
|
CFG_INI_UINT("dp_rxdma_refill_ring", \
|
|
WLAN_CFG_RXDMA_REFILL_RING_SIZE_MIN, \
|
|
WLAN_CFG_RXDMA_REFILL_RING_SIZE_MAX, \
|
|
WLAN_CFG_RXDMA_REFILL_RING_SIZE, \
|
|
CFG_VALUE_OR_DEFAULT, "DP RXDMA refilll ring")
|
|
|
|
#define CFG_DP_RXDMA_MONITOR_BUF_RING \
|
|
CFG_INI_UINT("dp_rxdma_monitor_buf_ring", \
|
|
WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MIN, \
|
|
WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MAX, \
|
|
WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE, \
|
|
CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor buffer ring")
|
|
|
|
#define CFG_DP_RXDMA_MONITOR_DST_RING \
|
|
CFG_INI_UINT("dp_rxdma_monitor_dst_ring", \
|
|
WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MIN, \
|
|
WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MAX, \
|
|
WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE, \
|
|
CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor destination ring")
|
|
|
|
#define CFG_DP_RXDMA_MONITOR_STATUS_RING \
|
|
CFG_INI_UINT("dp_rxdma_monitor_status_ring", \
|
|
WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MIN, \
|
|
WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MAX, \
|
|
WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE, \
|
|
CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor status ring")
|
|
|
|
#define CFG_DP_RXDMA_MONITOR_DESC_RING \
|
|
CFG_INI_UINT("dp_rxdma_monitor_desc_ring", \
|
|
WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MIN, \
|
|
WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MAX, \
|
|
WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE, \
|
|
CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor destination ring")
|
|
|
|
#define CFG_DP_RXDMA_ERR_DST_RING \
|
|
CFG_INI_UINT("dp_rxdma_err_dst_ring", \
|
|
WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MIN, \
|
|
WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MAX, \
|
|
WLAN_CFG_RXDMA_ERR_DST_RING_SIZE, \
|
|
CFG_VALUE_OR_DEFAULT, "RXDMA err destination ring")
|
|
|
|
#define CFG_DP_PER_PKT_LOGGING \
|
|
CFG_INI_UINT("enable_verbose_debug", \
|
|
0, 0xffff, 0, \
|
|
CFG_VALUE_OR_DEFAULT, "Enable excessive per packet logging")
|
|
|
|
#define CFG_DP_TX_FLOW_START_QUEUE_OFFSET \
|
|
CFG_INI_UINT("TxFlowStartQueueOffset", \
|
|
0, 30, WLAN_CFG_TX_FLOW_START_QUEUE_OFFSET, \
|
|
CFG_VALUE_OR_DEFAULT, "Start queue offset")
|
|
|
|
#define CFG_DP_TX_FLOW_STOP_QUEUE_TH \
|
|
CFG_INI_UINT("TxFlowStopQueueThreshold", \
|
|
0, 50, 15, \
|
|
CFG_VALUE_OR_DEFAULT, "Stop queue Threshold")
|
|
|
|
#define CFG_DP_IPA_UC_TX_BUF_SIZE \
|
|
CFG_INI_UINT("IpaUcTxBufSize", \
|
|
0, 4096, WLAN_CFG_IPA_UC_TX_BUF_SIZE, \
|
|
CFG_VALUE_OR_DEFAULT, "IPA tx buffer size")
|
|
|
|
#define CFG_DP_IPA_UC_TX_PARTITION_BASE \
|
|
CFG_INI_UINT("IpaUcTxPartitionBase", \
|
|
0, 9000, WLAN_CFG_IPA_UC_TX_PARTITION_BASE, \
|
|
CFG_VALUE_OR_DEFAULT, "IPA tx partition base")
|
|
|
|
#define CFG_DP_IPA_UC_RX_IND_RING_COUNT \
|
|
CFG_INI_UINT("IpaUcRxIndRingCount", \
|
|
0, 2048, WLAN_CFG_IPA_UC_RX_IND_RING_COUNT, \
|
|
CFG_VALUE_OR_DEFAULT, "IPA rx indication ring count")
|
|
|
|
#define CFG_DP_REORDER_OFFLOAD_SUPPORT \
|
|
CFG_INI_UINT("gReorderOffloadSupported", \
|
|
0, 1, 1, \
|
|
CFG_VALUE_OR_DEFAULT, "Packet reordering offload to firmware")
|
|
|
|
#define CFG_DP_AP_STA_SECURITY_SEPERATION \
|
|
CFG_INI_BOOL("gDisableIntraBssFwd", \
|
|
false, "Disable intrs BSS Rx packets")
|
|
|
|
#define CFG_DP_ENABLE_DATA_STALL_DETECTION \
|
|
CFG_INI_BOOL("gEnableDataStallDetection", \
|
|
true, "Enable/Disable Data stall detection")
|
|
|
|
#define CFG_DP \
|
|
CFG(CFG_DP_HTT_PACKET_TYPE) \
|
|
CFG(CFG_DP_INT_BATCH_THRESHOLD_OTHER) \
|
|
CFG(CFG_DP_INT_BATCH_THRESHOLD_RX) \
|
|
CFG(CFG_DP_INT_BATCH_THRESHOLD_TX) \
|
|
CFG(CFG_DP_INT_TIMER_THRESHOLD_OTHER) \
|
|
CFG(CFG_DP_INT_TIMER_THRESHOLD_RX) \
|
|
CFG(CFG_DP_INT_TIMER_THRESHOLD_TX) \
|
|
CFG(CFG_DP_MAX_ALLOC_SIZE) \
|
|
CFG(CFG_DP_MAX_CLIENTS) \
|
|
CFG(CFG_DP_MAX_PEER_ID) \
|
|
CFG(CFG_DP_REO_DEST_RINGS) \
|
|
CFG(CFG_DP_TCL_DATA_RINGS) \
|
|
CFG(CFG_DP_TX_DESC) \
|
|
CFG(CFG_DP_TX_EXT_DESC) \
|
|
CFG(CFG_DP_TX_EXT_DESC_POOLS) \
|
|
CFG(CFG_DP_PDEV_RX_RING) \
|
|
CFG(CFG_DP_PDEV_TX_RING) \
|
|
CFG(CFG_DP_RX_DEFRAG_TIMEOUT) \
|
|
CFG(CFG_DP_TX_COMPL_RING_SIZE) \
|
|
CFG(CFG_DP_TX_RING_SIZE) \
|
|
CFG(CFG_DP_NSS_COMP_RING_SIZE) \
|
|
CFG(CFG_DP_PDEV_LMAC_RING) \
|
|
CFG(CFG_DP_BASE_HW_MAC_ID) \
|
|
CFG(CFG_DP_RX_HASH) \
|
|
CFG(CFG_DP_TSO) \
|
|
CFG(CFG_DP_LRO) \
|
|
CFG(CFG_DP_SG) \
|
|
CFG(CFG_DP_GRO) \
|
|
CFG(CFG_DP_OL_TX_CSUM) \
|
|
CFG(CFG_DP_OL_RX_CSUM) \
|
|
CFG(CFG_DP_RAWMODE) \
|
|
CFG(CFG_DP_PEER_FLOW_CTRL) \
|
|
CFG(CFG_DP_NAPI) \
|
|
CFG(CFG_DP_TCP_UDP_CKSUM_OFFLOAD) \
|
|
CFG(CFG_DP_DEFRAG_TIMEOUT_CHECK) \
|
|
CFG(CFG_DP_WBM_RELEASE_RING) \
|
|
CFG(CFG_DP_TCL_CMD_RING) \
|
|
CFG(CFG_DP_TCL_STATUS_RING) \
|
|
CFG(CFG_DP_REO_REINJECT_RING) \
|
|
CFG(CFG_DP_RX_RELEASE_RING) \
|
|
CFG(CFG_DP_REO_EXCEPTION_RING) \
|
|
CFG(CFG_DP_REO_CMD_RING) \
|
|
CFG(CFG_DP_REO_STATUS_RING) \
|
|
CFG(CFG_DP_RXDMA_BUF_RING) \
|
|
CFG(CFG_DP_RXDMA_REFILL_RING) \
|
|
CFG(CFG_DP_RXDMA_MONITOR_BUF_RING) \
|
|
CFG(CFG_DP_RXDMA_MONITOR_DST_RING) \
|
|
CFG(CFG_DP_RXDMA_MONITOR_STATUS_RING) \
|
|
CFG(CFG_DP_RXDMA_MONITOR_DESC_RING) \
|
|
CFG(CFG_DP_RXDMA_ERR_DST_RING) \
|
|
CFG(CFG_DP_PER_PKT_LOGGING) \
|
|
CFG(CFG_DP_TX_FLOW_START_QUEUE_OFFSET) \
|
|
CFG(CFG_DP_TX_FLOW_STOP_QUEUE_TH) \
|
|
CFG(CFG_DP_IPA_UC_TX_BUF_SIZE) \
|
|
CFG(CFG_DP_IPA_UC_TX_PARTITION_BASE) \
|
|
CFG(CFG_DP_IPA_UC_RX_IND_RING_COUNT) \
|
|
CFG(CFG_DP_REORDER_OFFLOAD_SUPPORT) \
|
|
CFG(CFG_DP_AP_STA_SECURITY_SEPERATION) \
|
|
CFG(CFG_DP_ENABLE_DATA_STALL_DETECTION)
|
|
|
|
#endif /* _CFG_DP_H_ */
|