a0e560c475
Add arch ops for dp_mlo_chip_id to avoid access of dp_soc_be struct for LI platforms Change-Id: Idc7612ef3c517aa62668fe15e51b5e5ec74bb253 CRs-Fixed: 3582795
263 lines
7.1 KiB
C
263 lines
7.1 KiB
C
/*
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* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef __DP_MLO_H
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#define __DP_MLO_H
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#include <dp_types.h>
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#include <dp_peer.h>
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/* Max number of chips that can participate in MLO */
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#define DP_MAX_MLO_CHIPS WLAN_MAX_MLO_CHIPS
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/* Max number of peers supported */
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#define DP_MAX_MLO_PEER 512
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/* Max number of chips supported */
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#define DP_MLO_MAX_DEST_CHIP_ID 4
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/*
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* NB: intentionally not using kernel-doc comment because the kernel-doc
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* script does not handle the TAILQ_HEAD macro
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* struct dp_mlo_ctxt - datapath MLO context
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*
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* @ctrl_ctxt: opaque handle of cp mlo mgr
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* @ml_soc_list: list of socs which are mlo enabled. This also maintains
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* mlo_chip_id to dp_soc mapping
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* @ml_soc_cnt: number of SOCs
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* @ml_soc_list_lock: lock to protect ml_soc_list
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* @mld_peer_hash: peer hash table for ML peers
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* Associated peer with this MAC address)
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* @mld_peer_hash_lock: lock to protect mld_peer_hash
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* @toeplitz_hash_ipv4:
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* @toeplitz_hash_ipv6:
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* @link_to_pdev_map: link to pdev mapping
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* @rx_fst: pointer to rx_fst handle
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* @rx_fst_ref_cnt: ref count of rx_fst
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* @grp_umac_reset_ctx: UMAC reset context at mlo group level
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* @mlo_dev_list: list of MLO device context
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* @mlo_dev_list_lock: lock to protect MLO device ctxt
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*/
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struct dp_mlo_ctxt {
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struct cdp_ctrl_mlo_mgr *ctrl_ctxt;
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struct dp_soc *ml_soc_list[DP_MAX_MLO_CHIPS];
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uint8_t ml_soc_cnt;
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qdf_spinlock_t ml_soc_list_lock;
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struct {
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uint32_t mask;
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uint32_t idx_bits;
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TAILQ_HEAD(, dp_peer) * bins;
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} mld_peer_hash;
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qdf_spinlock_t mld_peer_hash_lock;
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uint32_t toeplitz_hash_ipv4[LRO_IPV4_SEED_ARR_SZ];
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uint32_t toeplitz_hash_ipv6[LRO_IPV6_SEED_ARR_SZ];
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struct dp_pdev_be *link_to_pdev_map[WLAN_MAX_MLO_CHIPS *
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WLAN_MAX_MLO_LINKS_PER_SOC];
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#ifdef DP_UMAC_HW_RESET_SUPPORT
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struct dp_soc_mlo_umac_reset_ctx grp_umac_reset_ctx;
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#endif
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/* MLO device ctxt list */
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TAILQ_HEAD(, dp_mlo_dev_ctxt) mlo_dev_list;
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qdf_spinlock_t mlo_dev_list_lock;
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};
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/**
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* dp_mlo_ctx_to_cdp() - typecast dp mlo context to CDP context
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* @mlo_ctxt: DP MLO context
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*
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* Return: struct cdp_mlo_ctxt pointer
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*/
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static inline
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struct cdp_mlo_ctxt *dp_mlo_ctx_to_cdp(struct dp_mlo_ctxt *mlo_ctxt)
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{
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return (struct cdp_mlo_ctxt *)mlo_ctxt;
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}
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/**
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* cdp_mlo_ctx_to_dp() - typecast CDP MLO context to DP MLO context
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* @mlo_ctxt: CDP MLO context
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*
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* Return: struct dp_soc pointer
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*/
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static inline
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struct dp_mlo_ctxt *cdp_mlo_ctx_to_dp(struct cdp_mlo_ctxt *mlo_ctxt)
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{
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return (struct dp_mlo_ctxt *)mlo_ctxt;
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}
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/**
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* dp_soc_mlo_fill_params() - update SOC mlo params
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* @soc: DP soc
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* @params: soc attach params
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*
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* Return: struct dp_soc pointer
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*/
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void dp_soc_mlo_fill_params(struct dp_soc *soc,
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struct cdp_soc_attach_params *params);
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/**
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* dp_pdev_mlo_fill_params() - update PDEV mlo params
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* @pdev: DP PDEV
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* @params: PDEV attach params
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*
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* Return: struct dp_soc pointer
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*/
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void dp_pdev_mlo_fill_params(struct dp_pdev *pdev,
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struct cdp_pdev_attach_params *params);
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/**
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* dp_mlo_get_soc_ref_by_chip_id() - Get DP soc from DP ML context.
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* @ml_ctxt: DP ML context handle
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* @chip_id: MLO chip id
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*
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* This API will increment a reference count for DP soc. Caller has
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* to take care for decrementing refcount.
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*
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* Return: dp_soc
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*/
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struct dp_soc*
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dp_mlo_get_soc_ref_by_chip_id(struct dp_mlo_ctxt *ml_ctxt, uint8_t chip_id);
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/**
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* dp_mlo_get_rx_hash_key() - Get Rx hash key from MLO context
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* @soc: DP SOC
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* @lro_hash: Hash params
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*
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*/
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void dp_mlo_get_rx_hash_key(struct dp_soc *soc,
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struct cdp_lro_hash_config *lro_hash);
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/**
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* dp_mlo_rx_fst_deref() - decrement rx_fst
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* @soc: dp soc
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*
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* return: soc cnt
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*/
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uint8_t dp_mlo_rx_fst_deref(struct dp_soc *soc);
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/**
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* dp_mlo_rx_fst_ref() - increment ref of rx_fst
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* @soc: dp soc
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*
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*/
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void dp_mlo_rx_fst_ref(struct dp_soc *soc);
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/**
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* dp_mlo_get_rx_fst() - Get Rx FST from MLO context
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* @soc: DP SOC
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*
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* Return: struct dp_rx_fst pointer
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*/
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struct dp_rx_fst *dp_mlo_get_rx_fst(struct dp_soc *soc);
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/**
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* dp_mlo_set_rx_fst() - Set Rx FST in MLO context
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* @soc: DP SOC
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* @fst: pointer dp_rx_fst
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*
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*/
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void dp_mlo_set_rx_fst(struct dp_soc *soc, struct dp_rx_fst *fst);
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/**
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* dp_mlo_update_link_to_pdev_map() - map link-id to pdev mapping
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* @soc: DP SOC
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* @pdev: DP PDEV
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*
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* Return: none
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*/
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void dp_mlo_update_link_to_pdev_map(struct dp_soc *soc, struct dp_pdev *pdev);
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/**
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* dp_mlo_update_link_to_pdev_unmap() - unmap link-id to pdev mapping
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* @soc: DP SOC
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* @pdev: DP PDEV
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*
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* Return: none
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*/
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void dp_mlo_update_link_to_pdev_unmap(struct dp_soc *soc, struct dp_pdev *pdev);
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/**
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* dp_mlo_get_delta_tsf2_wrt_mlo_offset() - Get delta between mlo timestamp
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* offset and delta tsf2
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* @soc: DP SOC
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* @hw_link_id: link id
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*
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* Return: int32_t
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*/
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int32_t dp_mlo_get_delta_tsf2_wrt_mlo_offset(struct dp_soc *soc,
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uint8_t hw_link_id);
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/**
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* dp_mlo_get_delta_tqm_wrt_mlo_offset() - Get delta between mlo timestamp
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* offset and delta tqm
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* @soc: DP SOC
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*
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* Return: int32_t
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*/
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int32_t dp_mlo_get_delta_tqm_wrt_mlo_offset(struct dp_soc *soc);
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/**
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* dp_get_interface_stats_be() - get vdev stats for ath interface
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* @soc_hdl: CDP SoC handle
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* @vdev_id: vdev Id
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* @buf: buffer for vdev stats
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* @is_aggregate: for aggregation
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*
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* Return: QDF_STATUS
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*/
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QDF_STATUS
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dp_get_interface_stats_be(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
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void *buf, bool is_aggregate);
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/*
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* dp_mlo_debug_print_ptnr_info() - print partner info
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* @vdev: DP VDEV
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*
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* Return: none
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*/
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void dp_mlo_debug_print_ptnr_info(struct dp_vdev *vdev);
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/*
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* dp_mlo_get_chip_id() - return MLO chip id
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* @soc: DP soc
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*
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* Return: chip_id
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*/
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uint8_t dp_mlo_get_chip_id(struct dp_soc *soc);
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/*
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* dp_mlo_link_peer_hash_find_by_chip_id() - returns mlo link peer on chip_id
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* peer_hash_table matching vdev_id and mac_address
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* @soc: partner soc handle in MLO
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* @peer_mac_addr: peer mac address
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* @mac_addr_is_aligned: is mac addr aligned
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* @vdev_id: vdev_id
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* @chip_id: mlo_chip_id
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* @mod_id: id of module requesting reference
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*
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* return: peer in success
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* NULL in failure
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*/
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struct dp_peer *
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dp_mlo_link_peer_hash_find_by_chip_id(struct dp_soc *soc,
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uint8_t *peer_mac_addr,
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int mac_addr_is_aligned,
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uint8_t vdev_id,
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uint8_t chip_id,
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enum dp_mod_id mod_id);
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#endif /* __DP_MLO_H */
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