3eec5f3273
Add required WMI commands to communicate support of EXT NSS Signaling between host and FW. Also, if EXT NSS Signaling is supported the use new WMI to communicate the required information between host and FW. Change-Id: If3e1ef11a55f8fbdffddb3b10963878a6a2ca415 CRs-Fixed: 2089043
510 lines
16 KiB
C
510 lines
16 KiB
C
/*
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* Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
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*
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* Previously licensed under the ISC license by Qualcomm Atheros, Inc.
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*
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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* above copyright notice and this permission notice appear in all
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* copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
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* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
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* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
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* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
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* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
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* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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* PERFORMANCE OF THIS SOFTWARE.
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*/
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/*
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* This file was originally distributed by Qualcomm Atheros, Inc.
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* under proprietary terms before Copyright ownership was assigned
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* to the Linux Foundation.
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*/
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/**
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* @file cdp_txrx_stats_struct.h
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* @brief Define the host data path stats API functions
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* called by the host control SW and the OS interface module
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*/
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#ifndef _CDP_TXRX_STATS_STRUCT_H_
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#define _CDP_TXRX_STATS_STRUCT_H_
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#ifndef CONFIG_WIN
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#include <wlan_defs.h>
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#endif
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#define TXRX_STATS_LEVEL_OFF 0
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#define TXRX_STATS_LEVEL_BASIC 1
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#define TXRX_STATS_LEVEL_FULL 2
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#define BSS_CHAN_INFO_READ 1
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#define BSS_CHAN_INFO_READ_AND_CLEAR 2
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#define TX_FRAME_TYPE_DATA 0
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#define TX_FRAME_TYPE_MGMT 1
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#define TX_FRAME_TYPE_BEACON 2
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#ifndef TXRX_STATS_LEVEL
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#define TXRX_STATS_LEVEL TXRX_STATS_LEVEL_BASIC
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#endif
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#ifndef BIG_ENDIAN_HOST
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typedef struct {
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uint64_t pkts;
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uint64_t bytes;
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} ol_txrx_stats_elem;
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#else
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struct ol_txrx_elem_t {
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uint64_t pkts;
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uint64_t bytes;
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};
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typedef struct ol_txrx_elem_t ol_txrx_stats_elem;
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#endif
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/**
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* @brief data stats published by the host txrx layer
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*/
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struct ol_txrx_stats {
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struct {
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/* MSDUs received from the stack */
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ol_txrx_stats_elem from_stack;
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/* MSDUs successfully sent across the WLAN */
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ol_txrx_stats_elem delivered;
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struct {
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/* MSDUs that the host did not accept */
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ol_txrx_stats_elem host_reject;
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/* MSDUs which could not be downloaded to the target */
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ol_txrx_stats_elem download_fail;
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/*
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* MSDUs which the target discarded
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* (lack of mem or old age)
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*/
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ol_txrx_stats_elem target_discard;
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/*
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* MSDUs which the target sent but couldn't get
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* an ack for
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*/
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ol_txrx_stats_elem no_ack;
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/* MSDUs dropped in NSS-FW */
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ol_txrx_stats_elem nss_ol_dropped;
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} dropped;
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u_int32_t desc_in_use;
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u_int32_t desc_alloc_fails;
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u_int32_t ce_ring_full;
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u_int32_t dma_map_error;
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/* MSDUs given to the txrx layer by the management stack */
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ol_txrx_stats_elem mgmt;
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struct {
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/* TSO applied jumbo packets received from NW Stack */
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ol_txrx_stats_elem tso_pkts;
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/* Non - TSO packets */
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ol_txrx_stats_elem non_tso_pkts;
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/* TSO packets : Dropped during TCP segmentation*/
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ol_txrx_stats_elem tso_dropped;
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/* TSO Descriptors */
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u_int32_t tso_desc_cnt;
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} tso;
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struct {
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/* TSO applied jumbo packets received from NW Stack */
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ol_txrx_stats_elem sg_pkts;
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/* Non - TSO packets */
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ol_txrx_stats_elem non_sg_pkts;
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/* TSO packets : Dropped during TCP segmentation*/
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ol_txrx_stats_elem sg_dropped;
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/* TSO Descriptors */
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u_int32_t sg_desc_cnt;
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} sg;
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struct {
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/* packets enqueued for flow control */
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u_int32_t fl_ctrl_enqueue;
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/* packets discarded for flow control is full */
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u_int32_t fl_ctrl_discard;
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/* packets sent to CE without flow control */
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u_int32_t fl_ctrl_avoid;
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} fl_ctrl;
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} tx;
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struct {
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/* MSDUs given to the OS shim */
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ol_txrx_stats_elem delivered;
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/* MSDUs forwarded from the rx path to the tx path */
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ol_txrx_stats_elem forwarded;
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/* MSDUs in which ipv4 chksum error detected by HW */
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ol_txrx_stats_elem ipv4_cksum_err;
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/* MSDUs in which tcp chksum error detected by HW */
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ol_txrx_stats_elem tcp_ipv4_cksum_err;
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/* MSDUs in which udp chksum error detected by HW */
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ol_txrx_stats_elem udp_ipv4_cksum_err;
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/* MSDUs in which tcp V6 chksum error detected by HW */
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ol_txrx_stats_elem tcp_ipv6_cksum_err;
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/* MSDUs in which UDP V6 chksum error detected by HW */
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ol_txrx_stats_elem udp_ipv6_cksum_err;
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} rx;
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struct {
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/* Number of mcast received for conversion */
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u_int32_t num_me_rcvd;
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/* Number of unicast sent as part of mcast conversion */
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u_int32_t num_me_ucast;
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/* Number of multicast frames dropped due to dma_map failure */
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u_int32_t num_me_dropped_m;
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/*
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* Number of multicast frames dropped due to allocation
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* failure
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*/
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u_int32_t num_me_dropped_a;
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/* Number of multicast frames dropped due to internal failure */
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u_int32_t num_me_dropped_i;
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/* Number of me buf currently in use */
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u_int32_t num_me_buf;
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/* Number of me buf frames to self mac address */
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u_int32_t num_me_dropped_s;
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/* Number of me buf in use in non pool based allocation*/
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u_int32_t num_me_nonpool;
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/* Number of me buf allocated using non pool based allocation*/
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u_int32_t num_me_nonpool_count;
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} mcast_enhance;
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};
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struct ol_ath_dbg_rx_rssi {
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A_UINT8 rx_rssi_pri20;
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A_UINT8 rx_rssi_sec20;
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A_UINT8 rx_rssi_sec40;
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A_UINT8 rx_rssi_sec80;
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};
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struct ol_ath_radiostats {
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A_UINT64 tx_beacon;
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A_UINT32 be_nobuf;
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A_UINT32 tx_buf_count;
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A_UINT32 tx_packets;
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A_UINT32 rx_packets;
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A_INT32 tx_mgmt;
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A_UINT32 tx_num_data;
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A_UINT32 rx_num_data;
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A_INT32 rx_mgmt;
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A_UINT32 rx_num_mgmt;
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A_UINT32 rx_num_ctl;
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A_UINT32 tx_rssi;
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A_UINT32 tx_mcs[10];
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A_UINT32 rx_mcs[10];
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A_UINT32 rx_rssi_comb;
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struct ol_ath_dbg_rx_rssi rx_rssi_chain0;
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struct ol_ath_dbg_rx_rssi rx_rssi_chain1;
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struct ol_ath_dbg_rx_rssi rx_rssi_chain2;
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struct ol_ath_dbg_rx_rssi rx_rssi_chain3;
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A_UINT64 rx_bytes;
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A_UINT64 tx_bytes;
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A_UINT32 tx_compaggr;
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A_UINT32 rx_aggr;
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A_UINT32 tx_bawadv;
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A_UINT32 tx_compunaggr;
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A_UINT32 rx_overrun;
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A_UINT32 rx_badcrypt;
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A_UINT32 rx_badmic;
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A_UINT32 rx_crcerr;
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A_UINT32 rx_phyerr;
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A_UINT32 ackRcvBad;
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A_UINT32 rtsBad;
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A_UINT32 rtsGood;
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A_UINT32 fcsBad;
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A_UINT32 noBeacons;
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A_UINT32 mib_int_count;
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A_UINT32 rx_looplimit_start;
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A_UINT32 rx_looplimit_end;
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A_UINT8 ap_stats_tx_cal_enable;
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A_UINT32 tgt_asserts;
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A_INT16 chan_nf;
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A_UINT32 rx_last_msdu_unset_cnt;
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A_INT16 chan_nf_sec80;
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A_UINT64 wmi_tx_mgmt;
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A_UINT64 wmi_tx_mgmt_completions;
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A_UINT32 wmi_tx_mgmt_completion_err;
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A_UINT32 peer_delete_req;
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A_UINT32 peer_delete_resp;
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A_UINT32 rx_mgmt_rssi_drop;
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};
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#ifndef CONFIG_WIN
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/*
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* structure to hold all stats information
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* for offload device interface
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*/
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struct ol_stats {
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int txrx_stats_level;
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struct ol_txrx_stats txrx_stats;
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struct wlan_dbg_stats stats;
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struct ol_ath_radiostats interface_stats;
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struct wlan_dbg_tidq_stats tidq_stats;
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};
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#endif
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/*
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* Enumeration of PDEV Configuration parameter
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*/
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enum _ol_ath_param_t {
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OL_ATH_PARAM_TXCHAINMASK = 1,
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OL_ATH_PARAM_RXCHAINMASK = 2,
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OL_ATH_PARAM_AMPDU = 6,
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OL_ATH_PARAM_AMPDU_LIMIT = 7,
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OL_ATH_PARAM_AMPDU_SUBFRAMES = 8,
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OL_ATH_PARAM_TXPOWER_LIMIT2G = 12,
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OL_ATH_PARAM_TXPOWER_LIMIT5G = 13,
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OL_ATH_PARAM_LDPC = 32,
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OL_ATH_PARAM_VOW_EXT_STATS = 45,
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OL_ATH_PARAM_DYN_TX_CHAINMASK = 73,
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OL_ATH_PARAM_BURST_ENABLE = 77,
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OL_ATH_PARAM_BURST_DUR = 78,
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OL_ATH_PARAM_BCN_BURST = 80,
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OL_ATH_PARAM_DCS = 82,
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#if UMAC_SUPPORT_PERIODIC_PERFSTATS
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OL_ATH_PARAM_PRDPERFSTAT_THRPUT_ENAB = 83,
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OL_ATH_PARAM_PRDPERFSTAT_THRPUT_WIN = 84,
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OL_ATH_PARAM_PRDPERFSTAT_THRPUT = 85,
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OL_ATH_PARAM_PRDPERFSTAT_PER_ENAB = 86,
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OL_ATH_PARAM_PRDPERFSTAT_PER_WIN = 87,
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OL_ATH_PARAM_PRDPERFSTAT_PER = 88,
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#endif
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/* UMAC_SUPPORT_PERIODIC_PERFSTATS */
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OL_ATH_PARAM_TOTAL_PER = 89,
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/* set manual rate for rts frame */
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OL_ATH_PARAM_RTS_CTS_RATE = 92,
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/* co channel interference threshold level */
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OL_ATH_PARAM_DCS_COCH_THR = 93,
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/* transmit error threshold */
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OL_ATH_PARAM_DCS_TXERR_THR = 94,
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/* phy error threshold */
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OL_ATH_PARAM_DCS_PHYERR_THR = 95,
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/*
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* The IOCTL number is 114, it is made 114, inorder to make the IOCTL
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* number same as Direct-attach IOCTL.
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* Please, don't change number. This IOCTL gets the Interface code path
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* it should be either DIRECT-ATTACH or OFF-LOAD.
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*/
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OL_ATH_PARAM_GET_IF_ID = 114,
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/* Enable Acs back Ground Channel selection Scan timer in AP mode*/
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OL_ATH_PARAM_ACS_ENABLE_BK_SCANTIMEREN = 118,
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/* ACS scan timer value in Seconds */
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OL_ATH_PARAM_ACS_SCANTIME = 119,
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/* Negligence Delta RSSI between two channel */
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OL_ATH_PARAM_ACS_RSSIVAR = 120,
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/* Negligence Delta Channel load between two channel*/
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OL_ATH_PARAM_ACS_CHLOADVAR = 121,
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/* Enable Limited OBSS check */
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OL_ATH_PARAM_ACS_LIMITEDOBSS = 122,
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/* Acs control flag for Scan timer */
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OL_ATH_PARAM_ACS_CTRLFLAG = 123,
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/* Acs Run time Debug level*/
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OL_ATH_PARAM_ACS_DEBUGTRACE = 124,
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OL_ATH_PARAM_SET_FW_HANG_ID = 137,
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/* Radio type 1:11ac 0:11abgn */
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OL_ATH_PARAM_RADIO_TYPE = 138,
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OL_ATH_PARAM_IGMPMLD_OVERRIDE, /* IGMP/MLD packet override */
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OL_ATH_PARAM_IGMPMLD_TID, /* IGMP/MLD packet TID no */
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OL_ATH_PARAM_ARPDHCP_AC_OVERRIDE,
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OL_ATH_PARAM_NON_AGG_SW_RETRY_TH,
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OL_ATH_PARAM_AGG_SW_RETRY_TH,
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/* Dont change this number it as per sync with DA
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Blocking certian channel from ic channel list */
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OL_ATH_PARAM_DISABLE_DFS = 144,
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OL_ATH_PARAM_ENABLE_AMSDU = 145,
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OL_ATH_PARAM_ENABLE_AMPDU = 146,
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OL_ATH_PARAM_STA_KICKOUT_TH,
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OL_ATH_PARAM_WLAN_PROF_ENABLE,
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OL_ATH_PARAM_LTR_ENABLE,
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OL_ATH_PARAM_LTR_AC_LATENCY_BE = 150,
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OL_ATH_PARAM_LTR_AC_LATENCY_BK,
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OL_ATH_PARAM_LTR_AC_LATENCY_VI,
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OL_ATH_PARAM_LTR_AC_LATENCY_VO,
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OL_ATH_PARAM_LTR_AC_LATENCY_TIMEOUT,
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OL_ATH_PARAM_LTR_TX_ACTIVITY_TIMEOUT = 155,
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OL_ATH_PARAM_LTR_SLEEP_OVERRIDE,
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OL_ATH_PARAM_LTR_RX_OVERRIDE,
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OL_ATH_PARAM_L1SS_ENABLE,
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OL_ATH_PARAM_DSLEEP_ENABLE,
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/* radar error threshold */
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OL_ATH_PARAM_DCS_RADAR_ERR_THR = 160,
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/* Tx channel utilization due to AP's tx and rx */
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OL_ATH_PARAM_DCS_USERMAX_CU_THR,
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/* interference detection threshold */
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OL_ATH_PARAM_DCS_INTR_DETECT_THR,
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/* sampling window, default 10secs */
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OL_ATH_PARAM_DCS_SAMPLE_WINDOW,
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/* debug logs enable/disable */
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OL_ATH_PARAM_DCS_DEBUG,
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OL_ATH_PARAM_ANI_ENABLE = 165,
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OL_ATH_PARAM_ANI_POLL_PERIOD,
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OL_ATH_PARAM_ANI_LISTEN_PERIOD,
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OL_ATH_PARAM_ANI_OFDM_LEVEL,
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OL_ATH_PARAM_ANI_CCK_LEVEL,
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OL_ATH_PARAM_DSCP_TID_MAP = 170,
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OL_ATH_PARAM_TXPOWER_SCALE,
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/* Phy error penalty */
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OL_ATH_PARAM_DCS_PHYERR_PENALTY,
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#if ATH_SUPPORT_DSCP_OVERRIDE
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/* set/get TID for sending HMMC packets */
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OL_ATH_PARAM_HMMC_DSCP_TID_MAP,
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/* set/get DSCP mapping override */
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OL_ATH_PARAM_DSCP_OVERRIDE,
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/* set/get HMMC-DSCP mapping override */
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OL_ATH_PARAM_HMMC_DSCP_OVERRIDE = 175,
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#endif
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#if ATH_RX_LOOPLIMIT_TIMER
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OL_ATH_PARAM_LOOPLIMIT_NUM,
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#endif
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OL_ATH_PARAM_ANTENNA_GAIN_2G,
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OL_ATH_PARAM_ANTENNA_GAIN_5G,
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OL_ATH_PARAM_RX_FILTER,
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#if ATH_SUPPORT_HYFI_ENHANCEMENTS
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OL_ATH_PARAM_BUFF_THRESH = 180,
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OL_ATH_PARAM_BLK_REPORT_FLOOD,
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OL_ATH_PARAM_DROP_STA_QUERY,
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#endif
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OL_ATH_PARAM_QBOOST,
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OL_ATH_PARAM_SIFS_FRMTYPE,
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OL_ATH_PARAM_SIFS_UAPSD = 185,
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OL_ATH_PARAM_FW_RECOVERY_ID,
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OL_ATH_PARAM_RESET_OL_STATS,
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OL_ATH_PARAM_AGGR_BURST,
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/* Number of deauth sent in consecutive rx_peer_invalid */
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OL_ATH_PARAM_DEAUTH_COUNT,
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OL_ATH_PARAM_BLOCK_INTERBSS = 190,
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/* Firmware reset control for Bmiss / timeout / reset */
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OL_ATH_PARAM_FW_DISABLE_RESET,
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OL_ATH_PARAM_MSDU_TTL,
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OL_ATH_PARAM_PPDU_DURATION,
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OL_ATH_PARAM_SET_TXBF_SND_PERIOD,
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OL_ATH_PARAM_ALLOW_PROMISC = 195,
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OL_ATH_PARAM_BURST_MODE,
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OL_ATH_PARAM_DYN_GROUPING,
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OL_ATH_PARAM_DPD_ENABLE,
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OL_ATH_PARAM_DBGLOG_RATELIM,
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/* firmware should intimate us about ps state change for node */
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OL_ATH_PARAM_PS_STATE_CHANGE = 200,
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OL_ATH_PARAM_MCAST_BCAST_ECHO,
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/* OBSS RSSI threshold for 20/40 coexistance */
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OL_ATH_PARAM_OBSS_RSSI_THRESHOLD,
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/* Link/node RX RSSI threshold for 20/40 coexistance */
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OL_ATH_PARAM_OBSS_RX_RSSI_THRESHOLD,
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#if ATH_CHANNEL_BLOCKING
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OL_ATH_PARAM_ACS_BLOCK_MODE = 205,
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#endif
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OL_ATH_PARAM_ACS_TX_POWER_OPTION,
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/*
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* Default Antenna Polarization MSB 8 bits (24:31) specifying
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* enable/disable ; LSB 24 bits (0:23) antenna mask value
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*/
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OL_ATH_PARAM_ANT_POLARIZATION,
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/* rate limit mute type error prints */
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OL_ATH_PARAM_PRINT_RATE_LIMIT,
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OL_ATH_PARAM_PDEV_RESET, /* Reset FW PDEV*/
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/* Do not crash host when target assert happened*/
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OL_ATH_PARAM_FW_DUMP_NO_HOST_CRASH = 210,
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/* Consider OBSS non-erp to change to long slot*/
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OL_ATH_PARAM_CONSIDER_OBSS_NON_ERP_LONG_SLOT = 211,
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OL_ATH_PARAM_STATS_FC,
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OL_ATH_PARAM_QFLUSHINTERVAL,
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OL_ATH_PARAM_TOTAL_Q_SIZE,
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OL_ATH_PARAM_TOTAL_Q_SIZE_RANGE0,
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OL_ATH_PARAM_TOTAL_Q_SIZE_RANGE1,
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OL_ATH_PARAM_TOTAL_Q_SIZE_RANGE2,
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OL_ATH_PARAM_TOTAL_Q_SIZE_RANGE3,
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OL_ATH_PARAM_MIN_THRESHOLD,
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OL_ATH_PARAM_MAX_Q_LIMIT,
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OL_ATH_PARAM_MIN_Q_LIMIT,
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OL_ATH_PARAM_CONG_CTRL_TIMER_INTV,
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OL_ATH_PARAM_STATS_TIMER_INTV,
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OL_ATH_PARAM_ROTTING_TIMER_INTV,
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OL_ATH_PARAM_LATENCY_PROFILE,
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OL_ATH_PARAM_HOSTQ_DUMP,
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OL_ATH_PARAM_TIDQ_MAP,
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OL_ATH_PARAM_DBG_ARP_SRC_ADDR, /* ARP DEBUG source address*/
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OL_ATH_PARAM_DBG_ARP_DST_ADDR, /* ARP DEBUG destination address*/
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OL_ATH_PARAM_ARP_DBG_CONF, /* ARP debug configuration */
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OL_ATH_PARAM_DISABLE_STA_VAP_AMSDU, /* Disable AMSDU for station vap */
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#if ATH_SUPPORT_DFS && ATH_SUPPORT_STA_DFS
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OL_ATH_PARAM_STADFS_ENABLE = 300, /* STA DFS is enabled or not */
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#endif
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#if QCA_AIRTIME_FAIRNESS
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OL_ATH_PARAM_ATF_STRICT_SCHED = 301,
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OL_ATH_PARAM_ATF_GROUP_POLICY = 302,
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#endif
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#if DBDC_REPEATER_SUPPORT
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OL_ATH_PARAM_PRIMARY_RADIO,
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OL_ATH_PARAM_DBDC_ENABLE,
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#endif
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OL_ATH_PARAM_TXPOWER_DBSCALE,
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OL_ATH_PARAM_CTL_POWER_SCALE,
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#if QCA_AIRTIME_FAIRNESS
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OL_ATH_PARAM_ATF_OBSS_SCHED = 307,
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OL_ATH_PARAM_ATF_OBSS_SCALE = 308,
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#endif
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OL_ATH_PARAM_PHY_OFDM_ERR = 309,
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OL_ATH_PARAM_PHY_CCK_ERR = 310,
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OL_ATH_PARAM_FCS_ERR = 311,
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OL_ATH_PARAM_CHAN_UTIL = 312,
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#if DBDC_REPEATER_SUPPORT
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OL_ATH_PARAM_CLIENT_MCAST,
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#endif
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OL_ATH_PARAM_EMIWAR_80P80 = 314,
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OL_ATH_PARAM_BATCHMODE = 315,
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OL_ATH_PARAM_PACK_AGGR_DELAY = 316,
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#if UMAC_SUPPORT_ACFG
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OL_ATH_PARAM_DIAG_ENABLE = 317,
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#endif
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#if ATH_SUPPORT_VAP_QOS
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OL_ATH_PARAM_VAP_QOS = 318,
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#endif
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OL_ATH_PARAM_CHAN_STATS_TH = 319,
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/* Passive scan is enabled or disabled */
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OL_ATH_PARAM_PASSIVE_SCAN_ENABLE = 320,
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OL_ATH_MIN_RSSI_ENABLE = 321,
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OL_ATH_MIN_RSSI = 322,
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OL_ATH_PARAM_ACS_2G_ALLCHAN = 323,
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#if DBDC_REPEATER_SUPPORT
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OL_ATH_PARAM_DELAY_STAVAP_UP = 324,
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#endif
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/* Can be used to configure transmit power for management frames */
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OL_ATH_PARAM_TXPOW_MGMT = 326,
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/* It is used to set the channel switch options */
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OL_ATH_PARAM_CHANSWITCH_OPTIONS = 327,
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OL_ATH_BTCOEX_ENABLE = 328,
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OL_ATH_BTCOEX_WL_PRIORITY = 329,
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OL_ATH_PARAM_TID_OVERRIDE_QUEUE_MAPPING = 330,
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OL_ATH_PARAM_CAL_VER_CHECK = 331,
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OL_ATH_PARAM_NO_VLAN = 332,
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OL_ATH_PARAM_CCA_THRESHOLD = 333,
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OL_ATH_PARAM_ATF_LOGGING = 334,
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OL_ATH_PARAM_STRICT_DOTH = 335,
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OL_ATH_PARAM_DISCONNECTION_TIMEOUT = 336,
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OL_ATH_PARAM_RECONFIGURATION_TIMEOUT = 337,
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OL_ATH_PARAM_CHANNEL_SWITCH_COUNT = 338,
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OL_ATH_PARAM_ALWAYS_PRIMARY = 339,
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OL_ATH_PARAM_FAST_LANE = 340,
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OL_ATH_GET_BTCOEX_DUTY_CYCLE = 341,
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OL_ATH_PARAM_SECONDARY_OFFSET_IE = 342,
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OL_ATH_PARAM_WIDE_BAND_SUB_ELEMENT = 343,
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OL_ATH_PARAM_PREFERRED_UPLINK = 344,
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OL_ATH_PARAM_PRECAC_ENABLE = 345,
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OL_ATH_PARAM_PRECAC_TIMEOUT = 346,
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OL_ATH_COEX_VER_CFG = 347,
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OL_ATH_PARAM_DUMP_TARGET = 348,
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OL_ATH_PARAM_PDEV_TO_REO_DEST = 349,
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OL_ATH_PARAM_DUMP_CHAINMASK_TABLES = 350,
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OL_ATH_PARAM_DUMP_OBJECTS = 351,
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OL_ATH_PARAM_ACS_SRLOADVAR = 352,
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OL_ATH_PARAM_MGMT_RSSI_THRESHOLD = 353,
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OL_ATH_PARAM_EXT_NSS_CAPABLE = 354,
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};
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/* Enumeration of PDEV Configuration parameter */
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enum _ol_hal_param_t {
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OL_HAL_CONFIG_DMA_BEACON_RESPONSE_TIME = 0
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};
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/* Bitmasks for stats that can block */
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#define EXT_TXRX_FW_STATS 0x0001
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#endif
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