2d29d9afc7
Add HW header files to bring-in support for Peach WIFI. Change-Id: I73ee0a2c4f22a90013b441ecd5e666d673d77ae0 CRs-Fixed: 3580269
380 lines
27 KiB
C
380 lines
27 KiB
C
/*
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* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef _RX_ATTENTION_H_
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#define _RX_ATTENTION_H_
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#define NUM_OF_DWORDS_RX_ATTENTION 3
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struct rx_attention {
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#ifndef WIFI_BIT_ORDER_BIG_ENDIAN
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uint32_t rxpcu_mpdu_filter_in_category : 2,
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sw_frame_group_id : 7,
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reserved_0 : 7,
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phy_ppdu_id : 16;
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uint32_t first_mpdu : 1,
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reserved_1a : 1,
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mcast_bcast : 1,
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ast_index_not_found : 1,
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ast_index_timeout : 1,
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power_mgmt : 1,
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non_qos : 1,
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null_data : 1,
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mgmt_type : 1,
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ctrl_type : 1,
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more_data : 1,
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eosp : 1,
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a_msdu_error : 1,
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fragment_flag : 1,
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order : 1,
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cce_match : 1,
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overflow_err : 1,
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msdu_length_err : 1,
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tcp_udp_chksum_fail : 1,
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ip_chksum_fail : 1,
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sa_idx_invalid : 1,
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da_idx_invalid : 1,
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reserved_1b : 1,
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rx_in_tx_decrypt_byp : 1,
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encrypt_required : 1,
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directed : 1,
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buffer_fragment : 1,
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mpdu_length_err : 1,
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tkip_mic_err : 1,
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decrypt_err : 1,
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unencrypted_frame_err : 1,
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fcs_err : 1;
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uint32_t flow_idx_timeout : 1,
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flow_idx_invalid : 1,
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wifi_parser_error : 1,
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amsdu_parser_error : 1,
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sa_idx_timeout : 1,
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da_idx_timeout : 1,
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msdu_limit_error : 1,
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da_is_valid : 1,
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da_is_mcbc : 1,
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sa_is_valid : 1,
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decrypt_status_code : 3,
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rx_bitmap_not_updated : 1,
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reserved_2 : 17,
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msdu_done : 1;
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#else
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uint32_t phy_ppdu_id : 16,
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reserved_0 : 7,
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sw_frame_group_id : 7,
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rxpcu_mpdu_filter_in_category : 2;
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uint32_t fcs_err : 1,
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unencrypted_frame_err : 1,
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decrypt_err : 1,
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tkip_mic_err : 1,
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mpdu_length_err : 1,
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buffer_fragment : 1,
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directed : 1,
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encrypt_required : 1,
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rx_in_tx_decrypt_byp : 1,
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reserved_1b : 1,
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da_idx_invalid : 1,
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sa_idx_invalid : 1,
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ip_chksum_fail : 1,
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tcp_udp_chksum_fail : 1,
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msdu_length_err : 1,
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overflow_err : 1,
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cce_match : 1,
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order : 1,
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fragment_flag : 1,
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a_msdu_error : 1,
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eosp : 1,
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more_data : 1,
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ctrl_type : 1,
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mgmt_type : 1,
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null_data : 1,
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non_qos : 1,
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power_mgmt : 1,
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ast_index_timeout : 1,
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ast_index_not_found : 1,
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mcast_bcast : 1,
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reserved_1a : 1,
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first_mpdu : 1;
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uint32_t msdu_done : 1,
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reserved_2 : 17,
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rx_bitmap_not_updated : 1,
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decrypt_status_code : 3,
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sa_is_valid : 1,
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da_is_mcbc : 1,
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da_is_valid : 1,
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msdu_limit_error : 1,
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da_idx_timeout : 1,
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sa_idx_timeout : 1,
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amsdu_parser_error : 1,
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wifi_parser_error : 1,
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flow_idx_invalid : 1,
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flow_idx_timeout : 1;
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#endif
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};
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#define RX_ATTENTION_RXPCU_MPDU_FILTER_IN_CATEGORY_OFFSET 0x00000000
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#define RX_ATTENTION_RXPCU_MPDU_FILTER_IN_CATEGORY_LSB 0
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#define RX_ATTENTION_RXPCU_MPDU_FILTER_IN_CATEGORY_MSB 1
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#define RX_ATTENTION_RXPCU_MPDU_FILTER_IN_CATEGORY_MASK 0x00000003
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#define RX_ATTENTION_SW_FRAME_GROUP_ID_OFFSET 0x00000000
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#define RX_ATTENTION_SW_FRAME_GROUP_ID_LSB 2
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#define RX_ATTENTION_SW_FRAME_GROUP_ID_MSB 8
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#define RX_ATTENTION_SW_FRAME_GROUP_ID_MASK 0x000001fc
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#define RX_ATTENTION_RESERVED_0_OFFSET 0x00000000
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#define RX_ATTENTION_RESERVED_0_LSB 9
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#define RX_ATTENTION_RESERVED_0_MSB 15
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#define RX_ATTENTION_RESERVED_0_MASK 0x0000fe00
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#define RX_ATTENTION_PHY_PPDU_ID_OFFSET 0x00000000
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#define RX_ATTENTION_PHY_PPDU_ID_LSB 16
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#define RX_ATTENTION_PHY_PPDU_ID_MSB 31
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#define RX_ATTENTION_PHY_PPDU_ID_MASK 0xffff0000
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#define RX_ATTENTION_FIRST_MPDU_OFFSET 0x00000004
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#define RX_ATTENTION_FIRST_MPDU_LSB 0
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#define RX_ATTENTION_FIRST_MPDU_MSB 0
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#define RX_ATTENTION_FIRST_MPDU_MASK 0x00000001
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#define RX_ATTENTION_RESERVED_1A_OFFSET 0x00000004
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#define RX_ATTENTION_RESERVED_1A_LSB 1
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#define RX_ATTENTION_RESERVED_1A_MSB 1
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#define RX_ATTENTION_RESERVED_1A_MASK 0x00000002
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#define RX_ATTENTION_MCAST_BCAST_OFFSET 0x00000004
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#define RX_ATTENTION_MCAST_BCAST_LSB 2
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#define RX_ATTENTION_MCAST_BCAST_MSB 2
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#define RX_ATTENTION_MCAST_BCAST_MASK 0x00000004
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#define RX_ATTENTION_AST_INDEX_NOT_FOUND_OFFSET 0x00000004
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#define RX_ATTENTION_AST_INDEX_NOT_FOUND_LSB 3
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#define RX_ATTENTION_AST_INDEX_NOT_FOUND_MSB 3
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#define RX_ATTENTION_AST_INDEX_NOT_FOUND_MASK 0x00000008
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#define RX_ATTENTION_AST_INDEX_TIMEOUT_OFFSET 0x00000004
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#define RX_ATTENTION_AST_INDEX_TIMEOUT_LSB 4
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#define RX_ATTENTION_AST_INDEX_TIMEOUT_MSB 4
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#define RX_ATTENTION_AST_INDEX_TIMEOUT_MASK 0x00000010
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#define RX_ATTENTION_POWER_MGMT_OFFSET 0x00000004
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#define RX_ATTENTION_POWER_MGMT_LSB 5
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#define RX_ATTENTION_POWER_MGMT_MSB 5
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#define RX_ATTENTION_POWER_MGMT_MASK 0x00000020
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#define RX_ATTENTION_NON_QOS_OFFSET 0x00000004
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#define RX_ATTENTION_NON_QOS_LSB 6
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#define RX_ATTENTION_NON_QOS_MSB 6
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#define RX_ATTENTION_NON_QOS_MASK 0x00000040
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#define RX_ATTENTION_NULL_DATA_OFFSET 0x00000004
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#define RX_ATTENTION_NULL_DATA_LSB 7
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#define RX_ATTENTION_NULL_DATA_MSB 7
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#define RX_ATTENTION_NULL_DATA_MASK 0x00000080
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#define RX_ATTENTION_MGMT_TYPE_OFFSET 0x00000004
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#define RX_ATTENTION_MGMT_TYPE_LSB 8
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#define RX_ATTENTION_MGMT_TYPE_MSB 8
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#define RX_ATTENTION_MGMT_TYPE_MASK 0x00000100
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#define RX_ATTENTION_CTRL_TYPE_OFFSET 0x00000004
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#define RX_ATTENTION_CTRL_TYPE_LSB 9
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#define RX_ATTENTION_CTRL_TYPE_MSB 9
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#define RX_ATTENTION_CTRL_TYPE_MASK 0x00000200
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#define RX_ATTENTION_MORE_DATA_OFFSET 0x00000004
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#define RX_ATTENTION_MORE_DATA_LSB 10
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#define RX_ATTENTION_MORE_DATA_MSB 10
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#define RX_ATTENTION_MORE_DATA_MASK 0x00000400
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#define RX_ATTENTION_EOSP_OFFSET 0x00000004
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#define RX_ATTENTION_EOSP_LSB 11
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#define RX_ATTENTION_EOSP_MSB 11
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#define RX_ATTENTION_EOSP_MASK 0x00000800
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#define RX_ATTENTION_A_MSDU_ERROR_OFFSET 0x00000004
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#define RX_ATTENTION_A_MSDU_ERROR_LSB 12
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#define RX_ATTENTION_A_MSDU_ERROR_MSB 12
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#define RX_ATTENTION_A_MSDU_ERROR_MASK 0x00001000
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#define RX_ATTENTION_FRAGMENT_FLAG_OFFSET 0x00000004
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#define RX_ATTENTION_FRAGMENT_FLAG_LSB 13
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#define RX_ATTENTION_FRAGMENT_FLAG_MSB 13
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#define RX_ATTENTION_FRAGMENT_FLAG_MASK 0x00002000
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#define RX_ATTENTION_ORDER_OFFSET 0x00000004
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#define RX_ATTENTION_ORDER_LSB 14
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#define RX_ATTENTION_ORDER_MSB 14
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#define RX_ATTENTION_ORDER_MASK 0x00004000
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#define RX_ATTENTION_CCE_MATCH_OFFSET 0x00000004
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#define RX_ATTENTION_CCE_MATCH_LSB 15
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#define RX_ATTENTION_CCE_MATCH_MSB 15
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#define RX_ATTENTION_CCE_MATCH_MASK 0x00008000
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#define RX_ATTENTION_OVERFLOW_ERR_OFFSET 0x00000004
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#define RX_ATTENTION_OVERFLOW_ERR_LSB 16
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#define RX_ATTENTION_OVERFLOW_ERR_MSB 16
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#define RX_ATTENTION_OVERFLOW_ERR_MASK 0x00010000
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#define RX_ATTENTION_MSDU_LENGTH_ERR_OFFSET 0x00000004
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#define RX_ATTENTION_MSDU_LENGTH_ERR_LSB 17
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#define RX_ATTENTION_MSDU_LENGTH_ERR_MSB 17
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#define RX_ATTENTION_MSDU_LENGTH_ERR_MASK 0x00020000
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#define RX_ATTENTION_TCP_UDP_CHKSUM_FAIL_OFFSET 0x00000004
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#define RX_ATTENTION_TCP_UDP_CHKSUM_FAIL_LSB 18
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#define RX_ATTENTION_TCP_UDP_CHKSUM_FAIL_MSB 18
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#define RX_ATTENTION_TCP_UDP_CHKSUM_FAIL_MASK 0x00040000
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#define RX_ATTENTION_IP_CHKSUM_FAIL_OFFSET 0x00000004
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#define RX_ATTENTION_IP_CHKSUM_FAIL_LSB 19
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#define RX_ATTENTION_IP_CHKSUM_FAIL_MSB 19
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#define RX_ATTENTION_IP_CHKSUM_FAIL_MASK 0x00080000
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#define RX_ATTENTION_SA_IDX_INVALID_OFFSET 0x00000004
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#define RX_ATTENTION_SA_IDX_INVALID_LSB 20
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#define RX_ATTENTION_SA_IDX_INVALID_MSB 20
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#define RX_ATTENTION_SA_IDX_INVALID_MASK 0x00100000
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#define RX_ATTENTION_DA_IDX_INVALID_OFFSET 0x00000004
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#define RX_ATTENTION_DA_IDX_INVALID_LSB 21
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#define RX_ATTENTION_DA_IDX_INVALID_MSB 21
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#define RX_ATTENTION_DA_IDX_INVALID_MASK 0x00200000
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#define RX_ATTENTION_RESERVED_1B_OFFSET 0x00000004
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#define RX_ATTENTION_RESERVED_1B_LSB 22
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#define RX_ATTENTION_RESERVED_1B_MSB 22
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#define RX_ATTENTION_RESERVED_1B_MASK 0x00400000
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#define RX_ATTENTION_RX_IN_TX_DECRYPT_BYP_OFFSET 0x00000004
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#define RX_ATTENTION_RX_IN_TX_DECRYPT_BYP_LSB 23
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#define RX_ATTENTION_RX_IN_TX_DECRYPT_BYP_MSB 23
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#define RX_ATTENTION_RX_IN_TX_DECRYPT_BYP_MASK 0x00800000
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#define RX_ATTENTION_ENCRYPT_REQUIRED_OFFSET 0x00000004
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#define RX_ATTENTION_ENCRYPT_REQUIRED_LSB 24
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#define RX_ATTENTION_ENCRYPT_REQUIRED_MSB 24
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#define RX_ATTENTION_ENCRYPT_REQUIRED_MASK 0x01000000
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#define RX_ATTENTION_DIRECTED_OFFSET 0x00000004
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#define RX_ATTENTION_DIRECTED_LSB 25
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#define RX_ATTENTION_DIRECTED_MSB 25
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#define RX_ATTENTION_DIRECTED_MASK 0x02000000
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#define RX_ATTENTION_BUFFER_FRAGMENT_OFFSET 0x00000004
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#define RX_ATTENTION_BUFFER_FRAGMENT_LSB 26
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#define RX_ATTENTION_BUFFER_FRAGMENT_MSB 26
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#define RX_ATTENTION_BUFFER_FRAGMENT_MASK 0x04000000
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#define RX_ATTENTION_MPDU_LENGTH_ERR_OFFSET 0x00000004
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#define RX_ATTENTION_MPDU_LENGTH_ERR_LSB 27
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#define RX_ATTENTION_MPDU_LENGTH_ERR_MSB 27
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#define RX_ATTENTION_MPDU_LENGTH_ERR_MASK 0x08000000
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#define RX_ATTENTION_TKIP_MIC_ERR_OFFSET 0x00000004
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#define RX_ATTENTION_TKIP_MIC_ERR_LSB 28
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#define RX_ATTENTION_TKIP_MIC_ERR_MSB 28
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#define RX_ATTENTION_TKIP_MIC_ERR_MASK 0x10000000
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#define RX_ATTENTION_DECRYPT_ERR_OFFSET 0x00000004
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#define RX_ATTENTION_DECRYPT_ERR_LSB 29
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#define RX_ATTENTION_DECRYPT_ERR_MSB 29
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#define RX_ATTENTION_DECRYPT_ERR_MASK 0x20000000
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#define RX_ATTENTION_UNENCRYPTED_FRAME_ERR_OFFSET 0x00000004
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#define RX_ATTENTION_UNENCRYPTED_FRAME_ERR_LSB 30
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#define RX_ATTENTION_UNENCRYPTED_FRAME_ERR_MSB 30
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#define RX_ATTENTION_UNENCRYPTED_FRAME_ERR_MASK 0x40000000
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#define RX_ATTENTION_FCS_ERR_OFFSET 0x00000004
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#define RX_ATTENTION_FCS_ERR_LSB 31
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#define RX_ATTENTION_FCS_ERR_MSB 31
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#define RX_ATTENTION_FCS_ERR_MASK 0x80000000
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#define RX_ATTENTION_FLOW_IDX_TIMEOUT_OFFSET 0x00000008
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#define RX_ATTENTION_FLOW_IDX_TIMEOUT_LSB 0
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#define RX_ATTENTION_FLOW_IDX_TIMEOUT_MSB 0
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#define RX_ATTENTION_FLOW_IDX_TIMEOUT_MASK 0x00000001
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#define RX_ATTENTION_FLOW_IDX_INVALID_OFFSET 0x00000008
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#define RX_ATTENTION_FLOW_IDX_INVALID_LSB 1
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#define RX_ATTENTION_FLOW_IDX_INVALID_MSB 1
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#define RX_ATTENTION_FLOW_IDX_INVALID_MASK 0x00000002
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#define RX_ATTENTION_WIFI_PARSER_ERROR_OFFSET 0x00000008
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#define RX_ATTENTION_WIFI_PARSER_ERROR_LSB 2
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#define RX_ATTENTION_WIFI_PARSER_ERROR_MSB 2
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#define RX_ATTENTION_WIFI_PARSER_ERROR_MASK 0x00000004
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#define RX_ATTENTION_AMSDU_PARSER_ERROR_OFFSET 0x00000008
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#define RX_ATTENTION_AMSDU_PARSER_ERROR_LSB 3
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#define RX_ATTENTION_AMSDU_PARSER_ERROR_MSB 3
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#define RX_ATTENTION_AMSDU_PARSER_ERROR_MASK 0x00000008
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#define RX_ATTENTION_SA_IDX_TIMEOUT_OFFSET 0x00000008
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#define RX_ATTENTION_SA_IDX_TIMEOUT_LSB 4
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#define RX_ATTENTION_SA_IDX_TIMEOUT_MSB 4
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#define RX_ATTENTION_SA_IDX_TIMEOUT_MASK 0x00000010
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#define RX_ATTENTION_DA_IDX_TIMEOUT_OFFSET 0x00000008
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#define RX_ATTENTION_DA_IDX_TIMEOUT_LSB 5
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#define RX_ATTENTION_DA_IDX_TIMEOUT_MSB 5
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#define RX_ATTENTION_DA_IDX_TIMEOUT_MASK 0x00000020
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#define RX_ATTENTION_MSDU_LIMIT_ERROR_OFFSET 0x00000008
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#define RX_ATTENTION_MSDU_LIMIT_ERROR_LSB 6
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#define RX_ATTENTION_MSDU_LIMIT_ERROR_MSB 6
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#define RX_ATTENTION_MSDU_LIMIT_ERROR_MASK 0x00000040
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#define RX_ATTENTION_DA_IS_VALID_OFFSET 0x00000008
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#define RX_ATTENTION_DA_IS_VALID_LSB 7
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#define RX_ATTENTION_DA_IS_VALID_MSB 7
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#define RX_ATTENTION_DA_IS_VALID_MASK 0x00000080
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#define RX_ATTENTION_DA_IS_MCBC_OFFSET 0x00000008
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#define RX_ATTENTION_DA_IS_MCBC_LSB 8
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#define RX_ATTENTION_DA_IS_MCBC_MSB 8
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#define RX_ATTENTION_DA_IS_MCBC_MASK 0x00000100
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#define RX_ATTENTION_SA_IS_VALID_OFFSET 0x00000008
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#define RX_ATTENTION_SA_IS_VALID_LSB 9
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#define RX_ATTENTION_SA_IS_VALID_MSB 9
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#define RX_ATTENTION_SA_IS_VALID_MASK 0x00000200
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#define RX_ATTENTION_DECRYPT_STATUS_CODE_OFFSET 0x00000008
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#define RX_ATTENTION_DECRYPT_STATUS_CODE_LSB 10
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#define RX_ATTENTION_DECRYPT_STATUS_CODE_MSB 12
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#define RX_ATTENTION_DECRYPT_STATUS_CODE_MASK 0x00001c00
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#define RX_ATTENTION_RX_BITMAP_NOT_UPDATED_OFFSET 0x00000008
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#define RX_ATTENTION_RX_BITMAP_NOT_UPDATED_LSB 13
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#define RX_ATTENTION_RX_BITMAP_NOT_UPDATED_MSB 13
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#define RX_ATTENTION_RX_BITMAP_NOT_UPDATED_MASK 0x00002000
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#define RX_ATTENTION_RESERVED_2_OFFSET 0x00000008
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#define RX_ATTENTION_RESERVED_2_LSB 14
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#define RX_ATTENTION_RESERVED_2_MSB 30
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#define RX_ATTENTION_RESERVED_2_MASK 0x7fffc000
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#define RX_ATTENTION_MSDU_DONE_OFFSET 0x00000008
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#define RX_ATTENTION_MSDU_DONE_LSB 31
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#define RX_ATTENTION_MSDU_DONE_MSB 31
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#define RX_ATTENTION_MSDU_DONE_MASK 0x80000000
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#endif
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