2d29d9afc7
Add HW header files to bring-in support for Peach WIFI. Change-Id: I73ee0a2c4f22a90013b441ecd5e666d673d77ae0 CRs-Fixed: 3580269
121 lines
7.7 KiB
C
121 lines
7.7 KiB
C
/*
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* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef _COEX_TX_STATUS_H_
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#define _COEX_TX_STATUS_H_
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#define NUM_OF_DWORDS_COEX_TX_STATUS 3
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struct coex_tx_status {
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#ifndef WIFI_BIT_ORDER_BIG_ENDIAN
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uint32_t reserved_0a : 7,
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tx_bw : 3,
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tx_status_reason : 3,
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tx_wait_ack : 1,
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fes_tx_is_gen_frame : 1,
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sch_tx_burst_ongoing : 1,
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current_tx_duration : 16;
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uint32_t next_rx_active_time : 16,
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remaining_fes_time : 16;
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uint32_t tx_antenna_mask : 8,
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shared_ant_tx_pwr : 8,
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other_ant_tx_pwr : 8,
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reserved_2 : 8;
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#else
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uint32_t current_tx_duration : 16,
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sch_tx_burst_ongoing : 1,
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fes_tx_is_gen_frame : 1,
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tx_wait_ack : 1,
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tx_status_reason : 3,
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tx_bw : 3,
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reserved_0a : 7;
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uint32_t remaining_fes_time : 16,
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next_rx_active_time : 16;
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uint32_t reserved_2 : 8,
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other_ant_tx_pwr : 8,
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shared_ant_tx_pwr : 8,
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tx_antenna_mask : 8;
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#endif
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};
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#define COEX_TX_STATUS_RESERVED_0A_OFFSET 0x00000000
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#define COEX_TX_STATUS_RESERVED_0A_LSB 0
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#define COEX_TX_STATUS_RESERVED_0A_MSB 6
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#define COEX_TX_STATUS_RESERVED_0A_MASK 0x0000007f
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#define COEX_TX_STATUS_TX_BW_OFFSET 0x00000000
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#define COEX_TX_STATUS_TX_BW_LSB 7
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#define COEX_TX_STATUS_TX_BW_MSB 9
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#define COEX_TX_STATUS_TX_BW_MASK 0x00000380
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#define COEX_TX_STATUS_TX_STATUS_REASON_OFFSET 0x00000000
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#define COEX_TX_STATUS_TX_STATUS_REASON_LSB 10
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#define COEX_TX_STATUS_TX_STATUS_REASON_MSB 12
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#define COEX_TX_STATUS_TX_STATUS_REASON_MASK 0x00001c00
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#define COEX_TX_STATUS_TX_WAIT_ACK_OFFSET 0x00000000
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#define COEX_TX_STATUS_TX_WAIT_ACK_LSB 13
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#define COEX_TX_STATUS_TX_WAIT_ACK_MSB 13
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#define COEX_TX_STATUS_TX_WAIT_ACK_MASK 0x00002000
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#define COEX_TX_STATUS_FES_TX_IS_GEN_FRAME_OFFSET 0x00000000
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#define COEX_TX_STATUS_FES_TX_IS_GEN_FRAME_LSB 14
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#define COEX_TX_STATUS_FES_TX_IS_GEN_FRAME_MSB 14
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#define COEX_TX_STATUS_FES_TX_IS_GEN_FRAME_MASK 0x00004000
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#define COEX_TX_STATUS_SCH_TX_BURST_ONGOING_OFFSET 0x00000000
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#define COEX_TX_STATUS_SCH_TX_BURST_ONGOING_LSB 15
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#define COEX_TX_STATUS_SCH_TX_BURST_ONGOING_MSB 15
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#define COEX_TX_STATUS_SCH_TX_BURST_ONGOING_MASK 0x00008000
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#define COEX_TX_STATUS_CURRENT_TX_DURATION_OFFSET 0x00000000
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#define COEX_TX_STATUS_CURRENT_TX_DURATION_LSB 16
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#define COEX_TX_STATUS_CURRENT_TX_DURATION_MSB 31
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#define COEX_TX_STATUS_CURRENT_TX_DURATION_MASK 0xffff0000
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#define COEX_TX_STATUS_NEXT_RX_ACTIVE_TIME_OFFSET 0x00000004
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#define COEX_TX_STATUS_NEXT_RX_ACTIVE_TIME_LSB 0
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#define COEX_TX_STATUS_NEXT_RX_ACTIVE_TIME_MSB 15
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#define COEX_TX_STATUS_NEXT_RX_ACTIVE_TIME_MASK 0x0000ffff
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#define COEX_TX_STATUS_REMAINING_FES_TIME_OFFSET 0x00000004
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#define COEX_TX_STATUS_REMAINING_FES_TIME_LSB 16
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#define COEX_TX_STATUS_REMAINING_FES_TIME_MSB 31
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#define COEX_TX_STATUS_REMAINING_FES_TIME_MASK 0xffff0000
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#define COEX_TX_STATUS_TX_ANTENNA_MASK_OFFSET 0x00000008
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#define COEX_TX_STATUS_TX_ANTENNA_MASK_LSB 0
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#define COEX_TX_STATUS_TX_ANTENNA_MASK_MSB 7
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#define COEX_TX_STATUS_TX_ANTENNA_MASK_MASK 0x000000ff
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#define COEX_TX_STATUS_SHARED_ANT_TX_PWR_OFFSET 0x00000008
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#define COEX_TX_STATUS_SHARED_ANT_TX_PWR_LSB 8
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#define COEX_TX_STATUS_SHARED_ANT_TX_PWR_MSB 15
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#define COEX_TX_STATUS_SHARED_ANT_TX_PWR_MASK 0x0000ff00
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#define COEX_TX_STATUS_OTHER_ANT_TX_PWR_OFFSET 0x00000008
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#define COEX_TX_STATUS_OTHER_ANT_TX_PWR_LSB 16
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#define COEX_TX_STATUS_OTHER_ANT_TX_PWR_MSB 23
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#define COEX_TX_STATUS_OTHER_ANT_TX_PWR_MASK 0x00ff0000
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#define COEX_TX_STATUS_RESERVED_2_OFFSET 0x00000008
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#define COEX_TX_STATUS_RESERVED_2_LSB 24
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#define COEX_TX_STATUS_RESERVED_2_MSB 31
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#define COEX_TX_STATUS_RESERVED_2_MASK 0xff000000
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#endif
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