f7fece8238
Parse the display peripheral related SPMI SID/Peripheral mask from device-tree and get the dynamic register range of these peripherals using the SPMI API. These registers are appended to the list of display IO ranges that is lent from HLOS to trusted VM during trusted UI. This would help in adding restrictions for SPMI registers on HLOS during the trusted UI use case along with validation of the register ranges in trusted VM. Change-Id: I7077dac7962466e845d061e9ccd205f1bc0ce3ea Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
115 行
3.4 KiB
C
115 行
3.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2012, 2017-2020, The Linux Foundation. All rights reserved.
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*/
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#ifndef __SDE_IO_UTIL_H__
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#define __SDE_IO_UTIL_H__
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#include <linux/gpio.h>
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#include <linux/platform_device.h>
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#include <linux/regulator/consumer.h>
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#include <linux/i2c.h>
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#include <linux/types.h>
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#ifdef DEBUG
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#define DEV_DBG(fmt, args...) pr_err(fmt, ##args)
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#else
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#define DEV_DBG(fmt, args...) pr_debug(fmt, ##args)
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#endif
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#define DEV_INFO(fmt, args...) pr_info(fmt, ##args)
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#define DEV_WARN(fmt, args...) pr_warn(fmt, ##args)
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#define DEV_ERR(fmt, args...) pr_err(fmt, ##args)
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struct dss_io_data {
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u32 len;
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void __iomem *base;
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};
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void dss_reg_w(struct dss_io_data *io, u32 offset, u32 value, u32 debug);
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u32 dss_reg_r(struct dss_io_data *io, u32 offset, u32 debug);
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void dss_reg_dump(void __iomem *base, u32 len, const char *prefix, u32 debug);
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#define DSS_REG_W_ND(io, offset, val) dss_reg_w(io, offset, val, false)
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#define DSS_REG_W(io, offset, val) dss_reg_w(io, offset, val, true)
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#define DSS_REG_R_ND(io, offset) dss_reg_r(io, offset, false)
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#define DSS_REG_R(io, offset) dss_reg_r(io, offset, true)
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enum dss_vreg_type {
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DSS_REG_LDO,
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DSS_REG_VS,
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};
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struct dss_vreg {
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struct regulator *vreg; /* vreg handle */
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char vreg_name[32];
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int min_voltage;
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int max_voltage;
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int enable_load;
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int disable_load;
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int pre_on_sleep;
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int post_on_sleep;
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int pre_off_sleep;
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int post_off_sleep;
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};
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struct dss_gpio {
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unsigned int gpio;
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unsigned int value;
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char gpio_name[32];
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};
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enum dss_clk_type {
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DSS_CLK_AHB, /* no set rate. rate controlled through rpm */
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DSS_CLK_PCLK,
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DSS_CLK_OTHER,
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};
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struct dss_clk {
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struct clk *clk; /* clk handle */
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char clk_name[32];
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enum dss_clk_type type;
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unsigned long rate;
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unsigned long max_rate;
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};
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struct dss_module_power {
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unsigned int num_vreg;
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struct dss_vreg *vreg_config;
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unsigned int num_gpio;
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struct dss_gpio *gpio_config;
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unsigned int num_clk;
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struct dss_clk *clk_config;
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};
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int msm_dss_ioremap_byname(struct platform_device *pdev,
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struct dss_io_data *io_data, const char *name);
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void msm_dss_iounmap(struct dss_io_data *io_data);
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int msm_dss_get_io_mem(struct platform_device *pdev,
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struct list_head *mem_list);
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void msm_dss_clean_io_mem(struct list_head *mem_list);
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int msm_dss_get_pmic_io_mem(struct platform_device *pdev,
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struct list_head *mem_list);
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int msm_dss_get_io_irq(struct platform_device *pdev,
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struct list_head *irq_list, u32 label);
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void msm_dss_clean_io_irq(struct list_head *irq_list);
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int msm_dss_enable_gpio(struct dss_gpio *in_gpio, int num_gpio, int enable);
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int msm_dss_gpio_enable(struct dss_gpio *in_gpio, int num_gpio, int enable);
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int msm_dss_get_vreg(struct device *dev, struct dss_vreg *in_vreg,
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int num_vreg, int enable);
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int msm_dss_enable_vreg(struct dss_vreg *in_vreg, int num_vreg, int enable);
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int msm_dss_get_clk(struct device *dev, struct dss_clk *clk_arry, int num_clk);
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void msm_dss_put_clk(struct dss_clk *clk_arry, int num_clk);
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int msm_dss_clk_set_rate(struct dss_clk *clk_arry, int num_clk);
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int msm_dss_single_clk_set_rate(struct dss_clk *clk);
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int msm_dss_enable_clk(struct dss_clk *clk_arry, int num_clk, int enable);
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int sde_i2c_byte_read(struct i2c_client *client, uint8_t slave_addr,
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uint8_t reg_offset, uint8_t *read_buf);
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int sde_i2c_byte_write(struct i2c_client *client, uint8_t slave_addr,
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uint8_t reg_offset, uint8_t *value);
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#endif /* __SDE_IO_UTIL_H__ */
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