16630d2422
1. Changes to move hal_tx_config_rbm_mapping_be function from common to device specific as it has ppe related snippets. 2. Changes to remove all PPE related codes in QCA5332 hal code. 3. Changes to correct macros according to fw_hrs. 4. Changes to move functions with device specific Macros to header files so that it gets compiled with respective device's FW headers and gets correct Macros Change-Id: I479b406f318aa42d2b1032349aaf42d95b8c18e5 CRs-Fixed: 3235966
144 lines
4.4 KiB
C
144 lines
4.4 KiB
C
/*
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* Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
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* Copyright (c) 2021-2022, Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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* above copyright notice and this permission notice appear in all
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* copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
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* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
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* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
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* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
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* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
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* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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* PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef _HAL_BE_API_H_
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#define _HAL_BE_API_H_
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#include "hal_hw_headers.h"
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#include "hal_rx.h"
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#define HAL_RX_MSDU_EXT_DESC_INFO_GET(msdu_details_ptr) \
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((struct rx_msdu_ext_desc_info *) \
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_OFFSET_TO_BYTE_PTR(msdu_details_ptr, \
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RX_MSDU_DETAILS_RX_MSDU_EXT_DESC_INFO_DETAILS_RESERVED_0A_OFFSET))
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/**
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* hal_reo_setup_generic_be - Initialize HW REO block
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*
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* @hal_soc: Opaque HAL SOC handle
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* @reo_params: parameters needed by HAL for REO config
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*/
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void hal_reo_setup_generic_be(struct hal_soc *soc,
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void *reoparams);
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/**
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* hal_rx_msdu_ext_desc_info_get_ptr_be() - Get the msdu extension
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* descriptor pointer.
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* @msdu_details_ptr: msdu details
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*
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* Return: msdu exntension descriptor pointer.
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*/
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void *hal_rx_msdu_ext_desc_info_get_ptr_be(void *msdu_details_ptr);
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/**
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* hal_set_link_desc_addr_be - Setup link descriptor in a buffer_addr_info
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* HW structure
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*
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* @desc: Descriptor entry (from WBM_IDLE_LINK ring)
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* @cookie: SW cookie for the buffer/descriptor
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* @link_desc_paddr: Physical address of link descriptor entry
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* @bm_id: idle link BM id
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*
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*/
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void hal_set_link_desc_addr_be(void *desc, uint32_t cookie,
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qdf_dma_addr_t link_desc_paddr,
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uint8_t bm_id);
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/**
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* hal_hw_txrx_default_ops_attach_be(): Add default ops for BE chips
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* @ hal_soc_hdl: hal_soc handle
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*
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* Return: None
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*/
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void hal_hw_txrx_default_ops_attach_be(struct hal_soc *soc);
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uint32_t hal_tx_comp_get_buffer_source_generic_be(void *hal_desc);
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uint8_t hal_rx_ret_buf_manager_get_be(hal_ring_desc_t ring_desc);
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void hal_rx_wbm_err_info_get_generic_be(void *wbm_desc, void *wbm_er_info1);
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/**
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* hal_reo_qdesc_setup - Setup HW REO queue descriptor
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*
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* @hal_soc: Opaque HAL SOC handle
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* @ba_window_size: BlockAck window size
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* @start_seq: Starting sequence number
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* @hw_qdesc_vaddr: Virtual address of REO queue descriptor memory
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* @hw_qdesc_paddr: Physical address of REO queue descriptor memory
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* @pn_type: PN type (one of the types defined in 'enum hal_pn_type')
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* @vdev_stats_id: vdev_stats_id to be programmed in REO Queue Descriptor
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*/
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void hal_reo_qdesc_setup_be(hal_soc_handle_t hal_soc_hdl,
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int tid, uint32_t ba_window_size,
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uint32_t start_seq, void *hw_qdesc_vaddr,
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qdf_dma_addr_t hw_qdesc_paddr,
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int pn_type, uint8_t vdev_stats_id);
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/**
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* hal_cookie_conversion_reg_cfg_be() - set cookie conversion relevant register
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* for REO/WBM
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* @soc: HAL soc handle
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* @cc_cfg: structure pointer for HW cookie conversion configuration
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*
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* Return: None
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*/
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void hal_cookie_conversion_reg_cfg_be(hal_soc_handle_t hal_soc_hdl,
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struct hal_hw_cc_config *cc_cfg);
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/**
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* hal_reo_ix_remap_value_get() - Calculate reo remap register value from
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* ring_id_mask which is used for hash based
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* reo distribution
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*
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* @hal_soc: Handle to HAL SoC structure
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* @ring_id_mask: mask value indicating the rx rings 0th bit set indicate
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* REO2SW1 is included in hash distribution
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*
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* Return: REO remap value
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*/
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uint32_t
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hal_reo_ix_remap_value_get_be(hal_soc_handle_t hal_soc_hdl,
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uint8_t rx_ring_mask);
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/**
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* hal_reo_ring_remap_value_get_be() - return REO remap value
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*
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* @ring_id: REO2SW ring id
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*
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* Return: REO remap value
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*/
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uint8_t
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hal_reo_ring_remap_value_get_be(uint8_t rx_ring_id);
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/**
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* hal_setup_reo_swap() - Set the swap flag for big endian machines
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* @soc: HAL soc handle
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*
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* Return: None
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*/
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void hal_setup_reo_swap(struct hal_soc *soc);
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/**
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* hal_get_idle_link_bm_id_be() - Get idle link BM id from chid_id
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* @chip_id: mlo chip_id
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*
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* Returns: RBM ID
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*/
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uint8_t hal_get_idle_link_bm_id_be(uint8_t chip_id);
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#endif /* _HAL_BE_API_H_ */
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