
- hierarchical state model which comprises of top level states and sub states - top level states include OPEN, CLOSE, ERROR, INPUT_STREAMING, OUTPUT_STREAMING, STREAMING. - sub states include DRAIN, DRC, DRAIN_LAST_BUFFER, DRC_LAST_BUFFER, INPUT_PAUSE, OUTPUT_PAUSE. - follows deterministic approach for key sequences like DRC, DRAIN and last flag handling i.e none of these events are ignored or discarded. - removal of auto start of firmware input port as part of ipsc handling. - introduction of hfi commands for host controlled PAUSE and RESUME of firmware ports. - introduction of information last flag packets for DRC and DRAIN when FW has insufficient output buffers. Change-Id: Ie8c8f44af464d06f5a7bb76822f749c9874f869a Signed-off-by: Darshana Patil <quic_darshana@quicinc.com>
189 lines
7.6 KiB
C
189 lines
7.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved.
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*/
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/* Copyright (c) 2022. Qualcomm Innovation Center, Inc. All rights reserved. */
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#ifndef _MSM_VIDC_INST_H_
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#define _MSM_VIDC_INST_H_
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#include "msm_vidc_internal.h"
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#include "msm_vidc_memory.h"
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#include "hfi_property.h"
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struct msm_vidc_inst;
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#define call_session_op(c, op, ...) \
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(((c) && (c)->session_ops && (c)->session_ops->op) ? \
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((c)->session_ops->op(__VA_ARGS__)) : 0)
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struct msm_vidc_session_ops {
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u64 (*calc_freq)(struct msm_vidc_inst *inst, u32 data_size);
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int (*calc_bw)(struct msm_vidc_inst *inst,
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struct vidc_bus_vote_data* vote_data);
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int (*decide_work_route)(struct msm_vidc_inst *inst);
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int (*decide_work_mode)(struct msm_vidc_inst *inst);
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int (*decide_quality_mode)(struct msm_vidc_inst *inst);
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int (*buffer_size)(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type type);
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int (*min_count)(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type type);
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int (*extra_count)(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type type);
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};
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struct msm_vidc_allocations_info {
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struct msm_vidc_allocations bin;
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struct msm_vidc_allocations arp;
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struct msm_vidc_allocations comv;
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struct msm_vidc_allocations non_comv;
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struct msm_vidc_allocations line;
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struct msm_vidc_allocations dpb;
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struct msm_vidc_allocations persist;
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struct msm_vidc_allocations vpss;
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struct msm_vidc_allocations partial_data;
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};
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struct msm_vidc_mappings_info {
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struct msm_vidc_mappings input;
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struct msm_vidc_mappings output;
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struct msm_vidc_mappings input_meta;
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struct msm_vidc_mappings output_meta;
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struct msm_vidc_mappings bin;
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struct msm_vidc_mappings arp;
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struct msm_vidc_mappings comv;
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struct msm_vidc_mappings non_comv;
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struct msm_vidc_mappings line;
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struct msm_vidc_mappings dpb;
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struct msm_vidc_mappings persist;
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struct msm_vidc_mappings vpss;
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struct msm_vidc_mappings partial_data;
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};
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struct msm_vidc_buffers_info {
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struct msm_vidc_buffers input;
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struct msm_vidc_buffers output;
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struct msm_vidc_buffers read_only;
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struct msm_vidc_buffers release;
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struct msm_vidc_buffers input_meta;
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struct msm_vidc_buffers output_meta;
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struct msm_vidc_buffers bin;
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struct msm_vidc_buffers arp;
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struct msm_vidc_buffers comv;
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struct msm_vidc_buffers non_comv;
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struct msm_vidc_buffers line;
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struct msm_vidc_buffers dpb;
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struct msm_vidc_buffers persist;
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struct msm_vidc_buffers vpss;
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struct msm_vidc_buffers partial_data;
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};
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enum msm_vidc_state {
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MSM_VIDC_OPEN = 1,
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MSM_VIDC_INPUT_STREAMING = 2,
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MSM_VIDC_OUTPUT_STREAMING = 3,
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MSM_VIDC_STREAMING = 4,
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MSM_VIDC_CLOSE = 5,
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MSM_VIDC_ERROR = 6,
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};
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#define MSM_VIDC_SUB_STATE_NONE 0
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#define MSM_VIDC_MAX_SUB_STATES 6
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/*
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* max value of inst->sub_state if all
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* the 6 valid bits are set i.e 111111==>63
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*/
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#define MSM_VIDC_MAX_SUB_STATE_VALUE ((1 << MSM_VIDC_MAX_SUB_STATES) - 1)
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enum msm_vidc_sub_state {
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MSM_VIDC_DRAIN = BIT(0),
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MSM_VIDC_DRC = BIT(1),
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MSM_VIDC_DRAIN_LAST_BUFFER = BIT(2),
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MSM_VIDC_DRC_LAST_BUFFER = BIT(3),
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MSM_VIDC_INPUT_PAUSE = BIT(4),
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MSM_VIDC_OUTPUT_PAUSE = BIT(5),
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};
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struct buf_queue {
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struct vb2_queue *vb2q;
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};
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struct msm_vidc_inst {
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struct list_head list;
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struct mutex lock;
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struct mutex request_lock;
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struct mutex client_lock;
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enum msm_vidc_state state;
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enum msm_vidc_sub_state sub_state;
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char sub_state_name[MAX_NAME_LENGTH];
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enum msm_vidc_domain_type domain;
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enum msm_vidc_codec_type codec;
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void *core;
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struct kref kref;
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u32 session_id;
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u8 debug_str[24];
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void *packet;
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u32 packet_size;
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struct v4l2_format fmts[MAX_PORT];
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struct v4l2_ctrl_handler ctrl_handler;
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struct v4l2_fh event_handler;
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struct v4l2_m2m_dev *m2m_dev;
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struct v4l2_m2m_ctx *m2m_ctx;
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struct v4l2_ctrl **ctrls;
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u32 num_ctrls;
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enum hfi_rate_control hfi_rc_type;
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enum hfi_layer_encoding_type hfi_layer_type;
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bool request;
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struct buf_queue bufq[MAX_PORT];
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struct msm_vidc_rectangle crop;
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struct msm_vidc_rectangle compose;
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struct msm_vidc_power power;
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struct vidc_bus_vote_data bus_data;
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struct msm_memory_pool pool[MSM_MEM_POOL_MAX];
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struct msm_vidc_buffers_info buffers;
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struct msm_vidc_mappings_info mappings;
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struct msm_vidc_allocations_info allocations;
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struct msm_vidc_timestamps timestamps;
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struct msm_vidc_timestamps ts_reorder; /* list of struct msm_vidc_timestamp */
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bool subscribed_input_psc;
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bool subscribed_output_psc;
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bool subscribed_input_prop;
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bool subscribed_output_prop;
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struct msm_vidc_subscription_params subcr_params[MAX_PORT];
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struct msm_vidc_hfi_frame_info hfi_frame_info;
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struct msm_vidc_decode_batch decode_batch;
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struct msm_vidc_decode_vpp_delay decode_vpp_delay;
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struct msm_vidc_session_idle session_idle;
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struct delayed_work stats_work;
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struct work_struct stability_work;
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struct msm_vidc_stability stability;
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struct workqueue_struct *workq;
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struct list_head enc_input_crs;
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struct list_head dmabuf_tracker; /* list of struct msm_memory_dmabuf */
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struct list_head input_timer_list; /* list of struct msm_vidc_input_timer */
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struct list_head caps_list;
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struct list_head children_list; /* struct msm_vidc_inst_cap_entry */
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struct list_head firmware_list; /* struct msm_vidc_inst_cap_entry */
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struct list_head pending_pkts; /* list of struct hfi_pending_packet */
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struct list_head fence_list; /* list of struct msm_vidc_fence */
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bool once_per_session_set;
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bool ipsc_properties_set;
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bool opsc_properties_set;
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struct dentry *debugfs_root;
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struct msm_vidc_debug debug;
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struct debug_buf_count debug_count;
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struct msm_vidc_statistics stats;
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struct msm_vidc_inst_capability *capabilities;
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struct completion completions[MAX_SIGNAL];
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struct msm_vidc_fence_context fence_context;
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bool active;
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u64 last_qbuf_time_ns;
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bool vb2q_init;
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u32 max_input_data_size;
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u32 dpb_list_payload[MAX_DPB_LIST_ARRAY_SIZE];
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u32 max_map_output_count;
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u32 auto_framerate;
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u32 max_rate;
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bool has_bframe;
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bool ir_enabled;
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u32 adjust_priority;
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};
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#endif // _MSM_VIDC_INST_H_
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