dp_tx.h 36 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #ifndef __DP_TX_H
  20. #define __DP_TX_H
  21. #include <qdf_types.h>
  22. #include <qdf_nbuf.h>
  23. #include "dp_types.h"
  24. #ifdef FEATURE_PERPKT_INFO
  25. #if defined(QCA_SUPPORT_LATENCY_CAPTURE) || \
  26. defined(QCA_TX_CAPTURE_SUPPORT) || \
  27. defined(QCA_MCOPY_SUPPORT)
  28. #include "if_meta_hdr.h"
  29. #endif
  30. #endif
  31. #include "dp_internal.h"
  32. #include "hal_tx.h"
  33. #include <qdf_tracepoint.h>
  34. #ifdef CONFIG_SAWF
  35. #include "dp_sawf.h"
  36. #endif
  37. #include <qdf_pkt_add_timestamp.h>
  38. #define DP_INVALID_VDEV_ID 0xFF
  39. #define DP_TX_MAX_NUM_FRAGS 6
  40. /*
  41. * DP_TX_DESC_FLAG_FRAG flags should always be defined to 0x1
  42. * please do not change this flag's definition
  43. */
  44. #define DP_TX_DESC_FLAG_FRAG 0x1
  45. #define DP_TX_DESC_FLAG_TO_FW 0x2
  46. #define DP_TX_DESC_FLAG_SIMPLE 0x4
  47. #define DP_TX_DESC_FLAG_RAW 0x8
  48. #define DP_TX_DESC_FLAG_MESH 0x10
  49. #define DP_TX_DESC_FLAG_QUEUED_TX 0x20
  50. #define DP_TX_DESC_FLAG_COMPLETED_TX 0x40
  51. #define DP_TX_DESC_FLAG_ME 0x80
  52. #define DP_TX_DESC_FLAG_TDLS_FRAME 0x100
  53. #define DP_TX_DESC_FLAG_ALLOCATED 0x200
  54. #define DP_TX_DESC_FLAG_MESH_MODE 0x400
  55. #define DP_TX_DESC_FLAG_UNMAP_DONE 0x800
  56. #define DP_TX_DESC_FLAG_TX_COMP_ERR 0x1000
  57. #define DP_TX_DESC_FLAG_FLUSH 0x2000
  58. #define DP_TX_DESC_FLAG_TRAFFIC_END_IND 0x4000
  59. /*
  60. * Since the Tx descriptor flag is of only 16-bit and no more bit is free for
  61. * any new flag, therefore for time being overloading PPEDS flag with that of
  62. * FLUSH flag.
  63. */
  64. #define DP_TX_DESC_FLAG_PPEDS 0x2000
  65. #define DP_TX_EXT_DESC_FLAG_METADATA_VALID 0x1
  66. #define DP_TX_FREE_SINGLE_BUF(soc, buf) \
  67. do { \
  68. qdf_nbuf_unmap(soc->osdev, buf, QDF_DMA_TO_DEVICE); \
  69. qdf_nbuf_free(buf); \
  70. } while (0)
  71. #define OCB_HEADER_VERSION 1
  72. #ifdef TX_PER_PDEV_DESC_POOL
  73. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  74. #define DP_TX_GET_DESC_POOL_ID(vdev) (vdev->vdev_id)
  75. #else /* QCA_LL_TX_FLOW_CONTROL_V2 */
  76. #define DP_TX_GET_DESC_POOL_ID(vdev) (vdev->pdev->pdev_id)
  77. #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
  78. #define DP_TX_GET_RING_ID(vdev) (vdev->pdev->pdev_id)
  79. #else
  80. #ifdef TX_PER_VDEV_DESC_POOL
  81. #define DP_TX_GET_DESC_POOL_ID(vdev) (vdev->vdev_id)
  82. #define DP_TX_GET_RING_ID(vdev) (vdev->pdev->pdev_id)
  83. #endif /* TX_PER_VDEV_DESC_POOL */
  84. #endif /* TX_PER_PDEV_DESC_POOL */
  85. #define DP_TX_QUEUE_MASK 0x3
  86. #define MAX_CDP_SEC_TYPE 12
  87. /* number of dwords for htt_tx_msdu_desc_ext2_t */
  88. #define DP_TX_MSDU_INFO_META_DATA_DWORDS 7
  89. #define dp_tx_alert(params...) QDF_TRACE_FATAL(QDF_MODULE_ID_DP_TX, params)
  90. #define dp_tx_err(params...) QDF_TRACE_ERROR(QDF_MODULE_ID_DP_TX, params)
  91. #define dp_tx_err_rl(params...) QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP_TX, params)
  92. #define dp_tx_warn(params...) QDF_TRACE_WARN(QDF_MODULE_ID_DP_TX, params)
  93. #define dp_tx_info(params...) \
  94. __QDF_TRACE_FL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_TX, ## params)
  95. #define dp_tx_debug(params...) QDF_TRACE_DEBUG(QDF_MODULE_ID_DP_TX, params)
  96. #define dp_tx_comp_alert(params...) QDF_TRACE_FATAL(QDF_MODULE_ID_DP_TX_COMP, params)
  97. #define dp_tx_comp_err(params...) QDF_TRACE_ERROR(QDF_MODULE_ID_DP_TX_COMP, params)
  98. #define dp_tx_comp_warn(params...) QDF_TRACE_WARN(QDF_MODULE_ID_DP_TX_COMP, params)
  99. #define dp_tx_comp_info(params...) \
  100. __QDF_TRACE_FL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_TX_COMP, ## params)
  101. #define dp_tx_comp_info_rl(params...) \
  102. __QDF_TRACE_RL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_TX_COMP, ## params)
  103. #define dp_tx_comp_debug(params...) QDF_TRACE_DEBUG(QDF_MODULE_ID_DP_TX_COMP, params)
  104. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  105. /**
  106. * struct dp_tx_frag_info_s
  107. * @vaddr: hlos virtual address for buffer
  108. * @paddr_lo: physical address lower 32bits
  109. * @paddr_hi: physical address higher bits
  110. * @len: length of the buffer
  111. */
  112. struct dp_tx_frag_info_s {
  113. uint8_t *vaddr;
  114. uint32_t paddr_lo;
  115. uint16_t paddr_hi;
  116. uint16_t len;
  117. };
  118. /**
  119. * struct dp_tx_seg_info_s - Segmentation Descriptor
  120. * @nbuf: NBUF pointer if segment corresponds to separate nbuf
  121. * @frag_cnt: Fragment count in this segment
  122. * @total_len: Total length of segment
  123. * @frags: per-Fragment information
  124. * @next: pointer to next MSDU segment
  125. */
  126. struct dp_tx_seg_info_s {
  127. qdf_nbuf_t nbuf;
  128. uint16_t frag_cnt;
  129. uint16_t total_len;
  130. struct dp_tx_frag_info_s frags[DP_TX_MAX_NUM_FRAGS];
  131. struct dp_tx_seg_info_s *next;
  132. };
  133. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  134. /**
  135. * struct dp_tx_sg_info_s - Scatter Gather Descriptor
  136. * @num_segs: Number of segments (TSO/ME) in the frame
  137. * @total_len: Total length of the frame
  138. * @curr_seg: Points to current segment descriptor to be processed. Chain of
  139. * descriptors for SG frames/multicast-unicast converted packets.
  140. *
  141. * Used for SG (802.3 or Raw) frames and Multicast-Unicast converted frames to
  142. * carry fragmentation information
  143. * Raw Frames will be handed over to driver as an SKB chain with MPDU boundaries
  144. * indicated through flags in SKB CB (first_msdu and last_msdu). This will be
  145. * converted into set of skb sg (nr_frags) structures.
  146. */
  147. struct dp_tx_sg_info_s {
  148. uint32_t num_segs;
  149. uint32_t total_len;
  150. struct dp_tx_seg_info_s *curr_seg;
  151. };
  152. /**
  153. * struct dp_tx_queue - Tx queue
  154. * @desc_pool_id: Descriptor Pool to be used for the tx queue
  155. * @ring_id: TCL descriptor ring ID corresponding to the tx queue
  156. *
  157. * Tx queue contains information of the software (Descriptor pool)
  158. * and hardware resources (TCL ring id) to be used for a particular
  159. * transmit queue (obtained from skb_queue_mapping in case of linux)
  160. */
  161. struct dp_tx_queue {
  162. uint8_t desc_pool_id;
  163. uint8_t ring_id;
  164. };
  165. /**
  166. * struct dp_tx_msdu_info_s - MSDU Descriptor
  167. * @frm_type: Frame type - Regular/TSO/SG/Multicast enhancement
  168. * @tx_queue: Tx queue on which this MSDU should be transmitted
  169. * @num_seg: Number of segments (TSO)
  170. * @tid: TID (override) that is sent from HLOS
  171. * @u.tso_info: TSO information for TSO frame types
  172. * (chain of the TSO segments, number of segments)
  173. * @u.sg_info: Scatter Gather information for non-TSO SG frames
  174. * @meta_data: Mesh meta header information
  175. * @exception_fw: Duplicate frame to be sent to firmware
  176. * @ppdu_cookie: 16-bit ppdu_cookie that has to be replayed back in completions
  177. * @ix_tx_sniffer: Indicates if the packet has to be sniffed
  178. * @gsn: global sequence for reinjected mcast packets
  179. * @vdev_id : vdev_id for reinjected mcast packets
  180. * @skip_hp_update : Skip HP update for TSO segments and update in last segment
  181. *
  182. * This structure holds the complete MSDU information needed to program the
  183. * Hardware TCL and MSDU extension descriptors for different frame types
  184. *
  185. */
  186. struct dp_tx_msdu_info_s {
  187. enum dp_tx_frm_type frm_type;
  188. struct dp_tx_queue tx_queue;
  189. uint32_t num_seg;
  190. uint8_t tid;
  191. uint8_t exception_fw;
  192. uint8_t is_tx_sniffer;
  193. union {
  194. struct qdf_tso_info_t tso_info;
  195. struct dp_tx_sg_info_s sg_info;
  196. } u;
  197. uint32_t meta_data[DP_TX_MSDU_INFO_META_DATA_DWORDS];
  198. uint16_t ppdu_cookie;
  199. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP)
  200. #ifdef WLAN_MCAST_MLO
  201. uint16_t gsn;
  202. uint8_t vdev_id;
  203. #endif
  204. #endif
  205. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  206. uint8_t skip_hp_update;
  207. #endif
  208. };
  209. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  210. /**
  211. * dp_tx_deinit_pair_by_index() - Deinit TX rings based on index
  212. * @soc: core txrx context
  213. * @index: index of ring to deinit
  214. *
  215. * Deinit 1 TCL and 1 WBM2SW release ring on as needed basis using
  216. * index of the respective TCL/WBM2SW release in soc structure.
  217. * For example, if the index is 2 then &soc->tcl_data_ring[2]
  218. * and &soc->tx_comp_ring[2] will be deinitialized.
  219. *
  220. * Return: none
  221. */
  222. void dp_tx_deinit_pair_by_index(struct dp_soc *soc, int index);
  223. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  224. void dp_tx_tso_cmn_desc_pool_deinit(struct dp_soc *soc, uint8_t num_pool);
  225. void dp_tx_tso_cmn_desc_pool_free(struct dp_soc *soc, uint8_t num_pool);
  226. void dp_tx_tso_cmn_desc_pool_deinit(struct dp_soc *soc, uint8_t num_pool);
  227. void dp_tx_tso_cmn_desc_pool_free(struct dp_soc *soc, uint8_t num_pool);
  228. QDF_STATUS dp_tx_tso_cmn_desc_pool_alloc(struct dp_soc *soc,
  229. uint8_t num_pool,
  230. uint32_t num_desc);
  231. QDF_STATUS dp_tx_tso_cmn_desc_pool_init(struct dp_soc *soc,
  232. uint8_t num_pool,
  233. uint32_t num_desc);
  234. qdf_nbuf_t dp_tx_comp_free_buf(struct dp_soc *soc, struct dp_tx_desc_s *desc,
  235. bool delayed_free);
  236. void dp_tx_desc_release(struct dp_tx_desc_s *tx_desc, uint8_t desc_pool_id);
  237. void dp_tx_compute_delay(struct dp_vdev *vdev, struct dp_tx_desc_s *tx_desc,
  238. uint8_t tid, uint8_t ring_id);
  239. void dp_tx_comp_process_tx_status(struct dp_soc *soc,
  240. struct dp_tx_desc_s *tx_desc,
  241. struct hal_tx_completion_status *ts,
  242. struct dp_txrx_peer *txrx_peer,
  243. uint8_t ring_id);
  244. void dp_tx_comp_process_desc(struct dp_soc *soc,
  245. struct dp_tx_desc_s *desc,
  246. struct hal_tx_completion_status *ts,
  247. struct dp_txrx_peer *txrx_peer);
  248. void dp_tx_reinject_handler(struct dp_soc *soc,
  249. struct dp_vdev *vdev,
  250. struct dp_tx_desc_s *tx_desc,
  251. uint8_t *status,
  252. uint8_t reinject_reason);
  253. void dp_tx_inspect_handler(struct dp_soc *soc,
  254. struct dp_vdev *vdev,
  255. struct dp_tx_desc_s *tx_desc,
  256. uint8_t *status);
  257. void dp_tx_update_peer_basic_stats(struct dp_txrx_peer *txrx_peer,
  258. uint32_t length, uint8_t tx_status,
  259. bool update);
  260. #ifdef DP_UMAC_HW_RESET_SUPPORT
  261. qdf_nbuf_t dp_tx_drop(struct cdp_soc_t *soc, uint8_t vdev_id, qdf_nbuf_t nbuf);
  262. qdf_nbuf_t dp_tx_exc_drop(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  263. qdf_nbuf_t nbuf,
  264. struct cdp_tx_exception_metadata *tx_exc_metadata);
  265. #endif
  266. #ifdef WLAN_SUPPORT_PPEDS
  267. void dp_ppeds_tx_desc_free(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc);
  268. #else
  269. static inline
  270. void dp_ppeds_tx_desc_free(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc)
  271. {
  272. }
  273. #endif
  274. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  275. /**
  276. * dp_tso_attach() - TSO Attach handler
  277. * @txrx_soc: Opaque Dp handle
  278. *
  279. * Reserve TSO descriptor buffers
  280. *
  281. * Return: QDF_STATUS_E_FAILURE on failure or
  282. * QDF_STATUS_SUCCESS on success
  283. */
  284. QDF_STATUS dp_tso_soc_attach(struct cdp_soc_t *txrx_soc);
  285. /**
  286. * dp_tso_detach() - TSO Detach handler
  287. * @txrx_soc: Opaque Dp handle
  288. *
  289. * Deallocate TSO descriptor buffers
  290. *
  291. * Return: QDF_STATUS_E_FAILURE on failure or
  292. * QDF_STATUS_SUCCESS on success
  293. */
  294. QDF_STATUS dp_tso_soc_detach(struct cdp_soc_t *txrx_soc);
  295. qdf_nbuf_t dp_tx_send(struct cdp_soc_t *soc, uint8_t vdev_id, qdf_nbuf_t nbuf);
  296. qdf_nbuf_t dp_tx_send_vdev_id_check(struct cdp_soc_t *soc, uint8_t vdev_id,
  297. qdf_nbuf_t nbuf);
  298. qdf_nbuf_t dp_tx_send_exception(struct cdp_soc_t *soc, uint8_t vdev_id,
  299. qdf_nbuf_t nbuf,
  300. struct cdp_tx_exception_metadata *tx_exc);
  301. qdf_nbuf_t dp_tx_send_exception_vdev_id_check(struct cdp_soc_t *soc,
  302. uint8_t vdev_id,
  303. qdf_nbuf_t nbuf,
  304. struct cdp_tx_exception_metadata *tx_exc);
  305. qdf_nbuf_t dp_tx_send_mesh(struct cdp_soc_t *soc, uint8_t vdev_id,
  306. qdf_nbuf_t nbuf);
  307. qdf_nbuf_t
  308. dp_tx_send_msdu_single(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  309. struct dp_tx_msdu_info_s *msdu_info, uint16_t peer_id,
  310. struct cdp_tx_exception_metadata *tx_exc_metadata);
  311. #if QDF_LOCK_STATS
  312. noinline qdf_nbuf_t
  313. dp_tx_send_msdu_multiple(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  314. struct dp_tx_msdu_info_s *msdu_info);
  315. #else
  316. qdf_nbuf_t dp_tx_send_msdu_multiple(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  317. struct dp_tx_msdu_info_s *msdu_info);
  318. #endif
  319. #ifdef FEATURE_WLAN_TDLS
  320. /**
  321. * dp_tx_non_std() - Allow the control-path SW to send data frames
  322. * @soc_hdl: Datapath soc handle
  323. * @vdev_id: id of vdev
  324. * @tx_spec: what non-standard handling to apply to the tx data frames
  325. * @msdu_list: NULL-terminated list of tx MSDUs
  326. *
  327. * Return: NULL on success,
  328. * nbuf when it fails to send
  329. */
  330. qdf_nbuf_t dp_tx_non_std(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  331. enum ol_tx_spec tx_spec, qdf_nbuf_t msdu_list);
  332. #endif
  333. int dp_tx_frame_is_drop(struct dp_vdev *vdev, uint8_t *srcmac, uint8_t *dstmac);
  334. /**
  335. * dp_tx_comp_handler() - Tx completion handler
  336. * @int_ctx: pointer to DP interrupt context
  337. * @soc: core txrx main context
  338. * @hal_srng: Opaque HAL SRNG pointer
  339. * @ring_id: completion ring id
  340. * @quota: No. of packets/descriptors that can be serviced in one loop
  341. *
  342. * This function will collect hardware release ring element contents and
  343. * handle descriptor contents. Based on contents, free packet or handle error
  344. * conditions
  345. *
  346. * Return: Number of TX completions processed
  347. */
  348. uint32_t dp_tx_comp_handler(struct dp_intr *int_ctx, struct dp_soc *soc,
  349. hal_ring_handle_t hal_srng, uint8_t ring_id,
  350. uint32_t quota);
  351. QDF_STATUS
  352. dp_tx_prepare_send_me(struct dp_vdev *vdev, qdf_nbuf_t nbuf);
  353. QDF_STATUS
  354. dp_tx_prepare_send_igmp_me(struct dp_vdev *vdev, qdf_nbuf_t nbuf);
  355. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  356. #if defined(QCA_HOST_MODE_WIFI_DISABLED) || !defined(ATH_SUPPORT_IQUE)
  357. static inline void dp_tx_me_exit(struct dp_pdev *pdev)
  358. {
  359. return;
  360. }
  361. #endif
  362. /**
  363. * dp_tx_pdev_init() - dp tx pdev init
  364. * @pdev: physical device instance
  365. *
  366. * Return: QDF_STATUS_SUCCESS: success
  367. * QDF_STATUS_E_RESOURCES: Error return
  368. */
  369. static inline QDF_STATUS dp_tx_pdev_init(struct dp_pdev *pdev)
  370. {
  371. struct dp_soc *soc = pdev->soc;
  372. /* Initialize Flow control counters */
  373. qdf_atomic_init(&pdev->num_tx_outstanding);
  374. pdev->tx_descs_max = 0;
  375. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  376. /* Initialize descriptors in TCL Ring */
  377. hal_tx_init_data_ring(soc->hal_soc,
  378. soc->tcl_data_ring[pdev->pdev_id].hal_srng);
  379. }
  380. return QDF_STATUS_SUCCESS;
  381. }
  382. /**
  383. * dp_tx_prefetch_hw_sw_nbuf_desc() - function to prefetch HW and SW desc
  384. * @soc: Handle to HAL Soc structure
  385. * @hal_soc: HAL SOC handle
  386. * @num_avail_for_reap: descriptors available for reap
  387. * @hal_ring_hdl: ring pointer
  388. * @last_prefetched_hw_desc: pointer to the last prefetched HW descriptor
  389. * @last_prefetched_sw_desc: pointer to last prefetch SW desc
  390. *
  391. * Return: None
  392. */
  393. #ifdef QCA_DP_TX_HW_SW_NBUF_DESC_PREFETCH
  394. static inline
  395. void dp_tx_prefetch_hw_sw_nbuf_desc(struct dp_soc *soc,
  396. hal_soc_handle_t hal_soc,
  397. uint32_t num_avail_for_reap,
  398. hal_ring_handle_t hal_ring_hdl,
  399. void **last_prefetched_hw_desc,
  400. struct dp_tx_desc_s
  401. **last_prefetched_sw_desc)
  402. {
  403. if (*last_prefetched_sw_desc) {
  404. qdf_prefetch((uint8_t *)(*last_prefetched_sw_desc)->nbuf);
  405. qdf_prefetch((uint8_t *)(*last_prefetched_sw_desc)->nbuf + 64);
  406. }
  407. if (num_avail_for_reap && *last_prefetched_hw_desc) {
  408. soc->arch_ops.tx_comp_get_params_from_hal_desc(soc,
  409. *last_prefetched_hw_desc,
  410. last_prefetched_sw_desc);
  411. if ((uintptr_t)*last_prefetched_hw_desc & 0x3f)
  412. *last_prefetched_hw_desc =
  413. hal_srng_dst_prefetch_next_cached_desc(
  414. hal_soc,
  415. hal_ring_hdl,
  416. (uint8_t *)*last_prefetched_hw_desc);
  417. else
  418. *last_prefetched_hw_desc =
  419. hal_srng_dst_get_next_32_byte_desc(hal_soc,
  420. hal_ring_hdl,
  421. (uint8_t *)*last_prefetched_hw_desc);
  422. }
  423. }
  424. #else
  425. static inline
  426. void dp_tx_prefetch_hw_sw_nbuf_desc(struct dp_soc *soc,
  427. hal_soc_handle_t hal_soc,
  428. uint32_t num_avail_for_reap,
  429. hal_ring_handle_t hal_ring_hdl,
  430. void **last_prefetched_hw_desc,
  431. struct dp_tx_desc_s
  432. **last_prefetched_sw_desc)
  433. {
  434. }
  435. #endif
  436. #ifndef FEATURE_WDS
  437. static inline void dp_tx_mec_handler(struct dp_vdev *vdev, uint8_t *status)
  438. {
  439. return;
  440. }
  441. #endif
  442. #ifndef QCA_MULTIPASS_SUPPORT
  443. static inline
  444. bool dp_tx_multipass_process(struct dp_soc *soc, struct dp_vdev *vdev,
  445. qdf_nbuf_t nbuf,
  446. struct dp_tx_msdu_info_s *msdu_info)
  447. {
  448. return true;
  449. }
  450. static inline
  451. void dp_tx_vdev_multipass_deinit(struct dp_vdev *vdev)
  452. {
  453. }
  454. #else
  455. bool dp_tx_multipass_process(struct dp_soc *soc, struct dp_vdev *vdev,
  456. qdf_nbuf_t nbuf,
  457. struct dp_tx_msdu_info_s *msdu_info);
  458. void dp_tx_vdev_multipass_deinit(struct dp_vdev *vdev);
  459. void dp_tx_remove_vlan_tag(struct dp_vdev *vdev, qdf_nbuf_t nbuf);
  460. void dp_tx_add_groupkey_metadata(struct dp_vdev *vdev,
  461. struct dp_tx_msdu_info_s *msdu_info,
  462. uint16_t group_key);
  463. #endif
  464. /**
  465. * dp_tx_hw_to_qdf()- convert hw status to qdf status
  466. * @status: hw status
  467. *
  468. * Return: qdf tx rx status
  469. */
  470. static inline enum qdf_dp_tx_rx_status dp_tx_hw_to_qdf(uint16_t status)
  471. {
  472. switch (status) {
  473. case HAL_TX_TQM_RR_FRAME_ACKED:
  474. return QDF_TX_RX_STATUS_OK;
  475. case HAL_TX_TQM_RR_REM_CMD_TX:
  476. return QDF_TX_RX_STATUS_NO_ACK;
  477. case HAL_TX_TQM_RR_REM_CMD_REM:
  478. case HAL_TX_TQM_RR_REM_CMD_NOTX:
  479. case HAL_TX_TQM_RR_REM_CMD_AGED:
  480. return QDF_TX_RX_STATUS_FW_DISCARD;
  481. default:
  482. return QDF_TX_RX_STATUS_DEFAULT;
  483. }
  484. }
  485. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  486. /**
  487. * dp_tx_get_queue() - Returns Tx queue IDs to be used for this Tx frame
  488. * @vdev: DP Virtual device handle
  489. * @nbuf: Buffer pointer
  490. * @queue: queue ids container for nbuf
  491. *
  492. * TX packet queue has 2 instances, software descriptors id and dma ring id
  493. * Based on tx feature and hardware configuration queue id combination could be
  494. * different.
  495. * For example -
  496. * With XPS enabled,all TX descriptor pools and dma ring are assigned per cpu id
  497. * With no XPS,lock based resource protection, Descriptor pool ids are different
  498. * for each vdev, dma ring id will be same as single pdev id
  499. *
  500. * Return: None
  501. */
  502. #ifdef QCA_OL_TX_MULTIQ_SUPPORT
  503. static inline void dp_tx_get_queue(struct dp_vdev *vdev,
  504. qdf_nbuf_t nbuf, struct dp_tx_queue *queue)
  505. {
  506. queue->ring_id = qdf_get_cpu();
  507. queue->desc_pool_id = queue->ring_id;
  508. }
  509. /*
  510. * dp_tx_get_hal_ring_hdl()- Get the hal_tx_ring_hdl for data transmission
  511. * @dp_soc - DP soc structure pointer
  512. * @ring_id - Transmit Queue/ring_id to be used when XPS is enabled
  513. *
  514. * Return - HAL ring handle
  515. */
  516. static inline hal_ring_handle_t dp_tx_get_hal_ring_hdl(struct dp_soc *soc,
  517. uint8_t ring_id)
  518. {
  519. if (ring_id == soc->num_tcl_data_rings)
  520. return soc->tcl_cmd_credit_ring.hal_srng;
  521. return soc->tcl_data_ring[ring_id].hal_srng;
  522. }
  523. #else /* QCA_OL_TX_MULTIQ_SUPPORT */
  524. #ifdef TX_MULTI_TCL
  525. #ifdef IPA_OFFLOAD
  526. static inline void dp_tx_get_queue(struct dp_vdev *vdev,
  527. qdf_nbuf_t nbuf, struct dp_tx_queue *queue)
  528. {
  529. /* get flow id */
  530. queue->desc_pool_id = DP_TX_GET_DESC_POOL_ID(vdev);
  531. if (vdev->pdev->soc->wlan_cfg_ctx->ipa_enabled)
  532. queue->ring_id = DP_TX_GET_RING_ID(vdev);
  533. else
  534. queue->ring_id = (qdf_nbuf_get_queue_mapping(nbuf) %
  535. vdev->pdev->soc->num_tcl_data_rings);
  536. }
  537. #else
  538. static inline void dp_tx_get_queue(struct dp_vdev *vdev,
  539. qdf_nbuf_t nbuf, struct dp_tx_queue *queue)
  540. {
  541. /* get flow id */
  542. queue->desc_pool_id = DP_TX_GET_DESC_POOL_ID(vdev);
  543. queue->ring_id = (qdf_nbuf_get_queue_mapping(nbuf) %
  544. vdev->pdev->soc->num_tcl_data_rings);
  545. }
  546. #endif
  547. #else
  548. static inline void dp_tx_get_queue(struct dp_vdev *vdev,
  549. qdf_nbuf_t nbuf, struct dp_tx_queue *queue)
  550. {
  551. /* get flow id */
  552. queue->desc_pool_id = DP_TX_GET_DESC_POOL_ID(vdev);
  553. queue->ring_id = DP_TX_GET_RING_ID(vdev);
  554. }
  555. #endif
  556. static inline hal_ring_handle_t dp_tx_get_hal_ring_hdl(struct dp_soc *soc,
  557. uint8_t ring_id)
  558. {
  559. return soc->tcl_data_ring[ring_id].hal_srng;
  560. }
  561. #endif
  562. #ifdef QCA_OL_TX_LOCK_LESS_ACCESS
  563. /*
  564. * dp_tx_hal_ring_access_start()- hal_tx_ring access for data transmission
  565. * @dp_soc - DP soc structure pointer
  566. * @hal_ring_hdl - HAL ring handle
  567. *
  568. * Return - None
  569. */
  570. static inline int dp_tx_hal_ring_access_start(struct dp_soc *soc,
  571. hal_ring_handle_t hal_ring_hdl)
  572. {
  573. return hal_srng_access_start_unlocked(soc->hal_soc, hal_ring_hdl);
  574. }
  575. /*
  576. * dp_tx_hal_ring_access_end()- hal_tx_ring access for data transmission
  577. * @dp_soc - DP soc structure pointer
  578. * @hal_ring_hdl - HAL ring handle
  579. *
  580. * Return - None
  581. */
  582. static inline void dp_tx_hal_ring_access_end(struct dp_soc *soc,
  583. hal_ring_handle_t hal_ring_hdl)
  584. {
  585. hal_srng_access_end_unlocked(soc->hal_soc, hal_ring_hdl);
  586. }
  587. /*
  588. * dp_tx_hal_ring_access_reap()- hal_tx_ring access for data transmission
  589. * @dp_soc - DP soc structure pointer
  590. * @hal_ring_hdl - HAL ring handle
  591. *
  592. * Return - None
  593. */
  594. static inline void dp_tx_hal_ring_access_end_reap(struct dp_soc *soc,
  595. hal_ring_handle_t
  596. hal_ring_hdl)
  597. {
  598. }
  599. #else
  600. static inline int dp_tx_hal_ring_access_start(struct dp_soc *soc,
  601. hal_ring_handle_t hal_ring_hdl)
  602. {
  603. return hal_srng_access_start(soc->hal_soc, hal_ring_hdl);
  604. }
  605. static inline void dp_tx_hal_ring_access_end(struct dp_soc *soc,
  606. hal_ring_handle_t hal_ring_hdl)
  607. {
  608. hal_srng_access_end(soc->hal_soc, hal_ring_hdl);
  609. }
  610. static inline void dp_tx_hal_ring_access_end_reap(struct dp_soc *soc,
  611. hal_ring_handle_t
  612. hal_ring_hdl)
  613. {
  614. hal_srng_access_end_reap(soc->hal_soc, hal_ring_hdl);
  615. }
  616. #endif
  617. #ifdef ATH_TX_PRI_OVERRIDE
  618. #define DP_TX_TID_OVERRIDE(_msdu_info, _nbuf) \
  619. ((_msdu_info)->tid = qdf_nbuf_get_priority(_nbuf))
  620. #else
  621. #define DP_TX_TID_OVERRIDE(_msdu_info, _nbuf)
  622. #endif
  623. /* TODO TX_FEATURE_NOT_YET */
  624. static inline void dp_tx_comp_process_exception(struct dp_tx_desc_s *tx_desc)
  625. {
  626. return;
  627. }
  628. /* TODO TX_FEATURE_NOT_YET */
  629. void dp_tx_desc_flush(struct dp_pdev *pdev, struct dp_vdev *vdev,
  630. bool force_free);
  631. QDF_STATUS dp_tx_vdev_attach(struct dp_vdev *vdev);
  632. QDF_STATUS dp_tx_vdev_detach(struct dp_vdev *vdev);
  633. void dp_tx_vdev_update_search_flags(struct dp_vdev *vdev);
  634. QDF_STATUS dp_soc_tx_desc_sw_pools_alloc(struct dp_soc *soc);
  635. QDF_STATUS dp_soc_tx_desc_sw_pools_init(struct dp_soc *soc);
  636. void dp_soc_tx_desc_sw_pools_free(struct dp_soc *soc);
  637. void dp_soc_tx_desc_sw_pools_deinit(struct dp_soc *soc);
  638. void
  639. dp_handle_wbm_internal_error(struct dp_soc *soc, void *hal_desc,
  640. uint32_t buf_type);
  641. #else /* QCA_HOST_MODE_WIFI_DISABLED */
  642. static inline
  643. QDF_STATUS dp_soc_tx_desc_sw_pools_alloc(struct dp_soc *soc)
  644. {
  645. return QDF_STATUS_SUCCESS;
  646. }
  647. static inline
  648. QDF_STATUS dp_soc_tx_desc_sw_pools_init(struct dp_soc *soc)
  649. {
  650. return QDF_STATUS_SUCCESS;
  651. }
  652. static inline void dp_soc_tx_desc_sw_pools_free(struct dp_soc *soc)
  653. {
  654. }
  655. static inline void dp_soc_tx_desc_sw_pools_deinit(struct dp_soc *soc)
  656. {
  657. }
  658. static inline
  659. void dp_tx_desc_flush(struct dp_pdev *pdev, struct dp_vdev *vdev,
  660. bool force_free)
  661. {
  662. }
  663. static inline QDF_STATUS dp_tx_vdev_attach(struct dp_vdev *vdev)
  664. {
  665. return QDF_STATUS_SUCCESS;
  666. }
  667. static inline QDF_STATUS dp_tx_vdev_detach(struct dp_vdev *vdev)
  668. {
  669. return QDF_STATUS_SUCCESS;
  670. }
  671. static inline void dp_tx_vdev_update_search_flags(struct dp_vdev *vdev)
  672. {
  673. }
  674. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  675. #if defined(QCA_SUPPORT_LATENCY_CAPTURE) || \
  676. defined(QCA_TX_CAPTURE_SUPPORT) || \
  677. defined(QCA_MCOPY_SUPPORT)
  678. #ifdef FEATURE_PERPKT_INFO
  679. QDF_STATUS
  680. dp_get_completion_indication_for_stack(struct dp_soc *soc,
  681. struct dp_pdev *pdev,
  682. struct dp_txrx_peer *peer,
  683. struct hal_tx_completion_status *ts,
  684. qdf_nbuf_t netbuf,
  685. uint64_t time_latency);
  686. void dp_send_completion_to_stack(struct dp_soc *soc, struct dp_pdev *pdev,
  687. uint16_t peer_id, uint32_t ppdu_id,
  688. qdf_nbuf_t netbuf);
  689. #endif
  690. #else
  691. static inline
  692. QDF_STATUS dp_get_completion_indication_for_stack(struct dp_soc *soc,
  693. struct dp_pdev *pdev,
  694. struct dp_txrx_peer *peer,
  695. struct hal_tx_completion_status *ts,
  696. qdf_nbuf_t netbuf,
  697. uint64_t time_latency)
  698. {
  699. return QDF_STATUS_E_NOSUPPORT;
  700. }
  701. static inline
  702. void dp_send_completion_to_stack(struct dp_soc *soc, struct dp_pdev *pdev,
  703. uint16_t peer_id, uint32_t ppdu_id,
  704. qdf_nbuf_t netbuf)
  705. {
  706. }
  707. #endif
  708. #ifdef WLAN_FEATURE_PKT_CAPTURE_V2
  709. void dp_send_completion_to_pkt_capture(struct dp_soc *soc,
  710. struct dp_tx_desc_s *desc,
  711. struct hal_tx_completion_status *ts);
  712. #else
  713. static inline void
  714. dp_send_completion_to_pkt_capture(struct dp_soc *soc,
  715. struct dp_tx_desc_s *desc,
  716. struct hal_tx_completion_status *ts)
  717. {
  718. }
  719. #endif
  720. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  721. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  722. /**
  723. * dp_tx_update_stats() - Update soc level tx stats
  724. * @soc: DP soc handle
  725. * @tx_desc: TX descriptor reference
  726. * @ring_id: TCL ring id
  727. *
  728. * Returns: none
  729. */
  730. void dp_tx_update_stats(struct dp_soc *soc,
  731. struct dp_tx_desc_s *tx_desc,
  732. uint8_t ring_id);
  733. /**
  734. * dp_tx_attempt_coalescing() - Check and attempt TCL register write coalescing
  735. * @soc: Datapath soc handle
  736. * @tx_desc: tx packet descriptor
  737. * @tid: TID for pkt transmission
  738. * @msdu_info: MSDU info of tx packet
  739. * @ring_id: TCL ring id
  740. *
  741. * Returns: 1, if coalescing is to be done
  742. * 0, if coalescing is not to be done
  743. */
  744. int
  745. dp_tx_attempt_coalescing(struct dp_soc *soc, struct dp_vdev *vdev,
  746. struct dp_tx_desc_s *tx_desc,
  747. uint8_t tid,
  748. struct dp_tx_msdu_info_s *msdu_info,
  749. uint8_t ring_id);
  750. /**
  751. * dp_tx_ring_access_end() - HAL ring access end for data transmission
  752. * @soc: Datapath soc handle
  753. * @hal_ring_hdl: HAL ring handle
  754. * @coalesce: Coalesce the current write or not
  755. *
  756. * Returns: none
  757. */
  758. void
  759. dp_tx_ring_access_end(struct dp_soc *soc, hal_ring_handle_t hal_ring_hdl,
  760. int coalesce);
  761. #else
  762. /**
  763. * dp_tx_update_stats() - Update soc level tx stats
  764. * @soc: DP soc handle
  765. * @tx_desc: TX descriptor reference
  766. * @ring_id: TCL ring id
  767. *
  768. * Returns: none
  769. */
  770. static inline void dp_tx_update_stats(struct dp_soc *soc,
  771. struct dp_tx_desc_s *tx_desc,
  772. uint8_t ring_id){ }
  773. static inline void
  774. dp_tx_ring_access_end(struct dp_soc *soc, hal_ring_handle_t hal_ring_hdl,
  775. int coalesce)
  776. {
  777. dp_tx_hal_ring_access_end(soc, hal_ring_hdl);
  778. }
  779. static inline int
  780. dp_tx_attempt_coalescing(struct dp_soc *soc, struct dp_vdev *vdev,
  781. struct dp_tx_desc_s *tx_desc,
  782. uint8_t tid,
  783. struct dp_tx_msdu_info_s *msdu_info,
  784. uint8_t ring_id)
  785. {
  786. return 0;
  787. }
  788. #endif /* WLAN_DP_FEATURE_SW_LATENCY_MGR */
  789. #ifdef FEATURE_RUNTIME_PM
  790. /**
  791. * dp_set_rtpm_tput_policy_requirement() - Update RTPM throughput policy
  792. * @soc_hdl: DP soc handle
  793. * @is_high_tput: flag to indicate whether throughput is high
  794. *
  795. * Returns: none
  796. */
  797. static inline
  798. void dp_set_rtpm_tput_policy_requirement(struct cdp_soc_t *soc_hdl,
  799. bool is_high_tput)
  800. {
  801. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  802. qdf_atomic_set(&soc->rtpm_high_tput_flag, is_high_tput);
  803. }
  804. void
  805. dp_tx_ring_access_end_wrapper(struct dp_soc *soc,
  806. hal_ring_handle_t hal_ring_hdl,
  807. int coalesce);
  808. #else
  809. #ifdef DP_POWER_SAVE
  810. void
  811. dp_tx_ring_access_end_wrapper(struct dp_soc *soc,
  812. hal_ring_handle_t hal_ring_hdl,
  813. int coalesce);
  814. #else
  815. static inline void
  816. dp_tx_ring_access_end_wrapper(struct dp_soc *soc,
  817. hal_ring_handle_t hal_ring_hdl,
  818. int coalesce)
  819. {
  820. dp_tx_ring_access_end(soc, hal_ring_hdl, coalesce);
  821. }
  822. #endif
  823. static inline void
  824. dp_set_rtpm_tput_policy_requirement(struct cdp_soc_t *soc_hdl,
  825. bool is_high_tput)
  826. { }
  827. #endif
  828. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  829. #ifdef DP_TX_HW_DESC_HISTORY
  830. static inline void
  831. dp_tx_hw_desc_update_evt(uint8_t *hal_tx_desc_cached,
  832. hal_ring_handle_t hal_ring_hdl,
  833. struct dp_soc *soc, uint8_t ring_id)
  834. {
  835. struct dp_tx_hw_desc_history *tx_hw_desc_history =
  836. &soc->tx_hw_desc_history;
  837. struct dp_tx_hw_desc_evt *evt;
  838. uint32_t idx = 0;
  839. uint16_t slot = 0;
  840. if (!tx_hw_desc_history->allocated)
  841. return;
  842. dp_get_frag_hist_next_atomic_idx(&tx_hw_desc_history->index, &idx,
  843. &slot,
  844. DP_TX_HW_DESC_HIST_SLOT_SHIFT,
  845. DP_TX_HW_DESC_HIST_PER_SLOT_MAX,
  846. DP_TX_HW_DESC_HIST_MAX);
  847. evt = &tx_hw_desc_history->entry[slot][idx];
  848. qdf_mem_copy(evt->tcl_desc, hal_tx_desc_cached, HAL_TX_DESC_LEN_BYTES);
  849. evt->posted = qdf_get_log_timestamp();
  850. evt->tcl_ring_id = ring_id;
  851. hal_get_sw_hptp(soc->hal_soc, hal_ring_hdl, &evt->tp, &evt->hp);
  852. }
  853. #else
  854. static inline void
  855. dp_tx_hw_desc_update_evt(uint8_t *hal_tx_desc_cached,
  856. hal_ring_handle_t hal_ring_hdl,
  857. struct dp_soc *soc, uint8_t ring_id)
  858. {
  859. }
  860. #endif
  861. #if defined(WLAN_FEATURE_TSF_UPLINK_DELAY) || defined(WLAN_CONFIG_TX_DELAY)
  862. /**
  863. * dp_tx_compute_hw_delay_us() - Compute hardware Tx completion delay
  864. * @ts: Tx completion status
  865. * @delta_tsf: Difference between TSF clock and qtimer
  866. * @delay_us: Delay in microseconds
  867. *
  868. * Return: QDF_STATUS_SUCCESS : Success
  869. * QDF_STATUS_E_INVAL : Tx completion status is invalid or
  870. * delay_us is NULL
  871. * QDF_STATUS_E_FAILURE : Error in delay calculation
  872. */
  873. QDF_STATUS
  874. dp_tx_compute_hw_delay_us(struct hal_tx_completion_status *ts,
  875. uint32_t delta_tsf,
  876. uint32_t *delay_us);
  877. /**
  878. * dp_set_delta_tsf() - Set delta_tsf to dp_soc structure
  879. * @soc_hdl: cdp soc pointer
  880. * @vdev_id: vdev id
  881. * @delta_tsf: difference between TSF clock and qtimer
  882. *
  883. * Return: None
  884. */
  885. void dp_set_delta_tsf(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  886. uint32_t delta_tsf);
  887. #endif
  888. #ifdef WLAN_FEATURE_TSF_UPLINK_DELAY
  889. /**
  890. * dp_set_tsf_report_ul_delay() - Enable or disable reporting uplink delay
  891. * @soc_hdl: cdp soc pointer
  892. * @vdev_id: vdev id
  893. * @enable: true to enable and false to disable
  894. *
  895. * Return: QDF_STATUS
  896. */
  897. QDF_STATUS dp_set_tsf_ul_delay_report(struct cdp_soc_t *soc_hdl,
  898. uint8_t vdev_id, bool enable);
  899. /**
  900. * dp_get_uplink_delay() - Get uplink delay value
  901. * @soc_hdl: cdp soc pointer
  902. * @vdev_id: vdev id
  903. * @val: pointer to save uplink delay value
  904. *
  905. * Return: QDF_STATUS
  906. */
  907. QDF_STATUS dp_get_uplink_delay(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  908. uint32_t *val);
  909. #endif /* WLAN_FEATURE_TSF_UPLINK_TSF */
  910. /**
  911. * dp_tx_pkt_tracepoints_enabled() - Get the state of tx pkt tracepoint
  912. *
  913. * Return: True if any tx pkt tracepoint is enabled else false
  914. */
  915. static inline
  916. bool dp_tx_pkt_tracepoints_enabled(void)
  917. {
  918. return (qdf_trace_dp_tx_comp_tcp_pkt_enabled() ||
  919. qdf_trace_dp_tx_comp_udp_pkt_enabled() ||
  920. qdf_trace_dp_tx_comp_pkt_enabled());
  921. }
  922. #ifdef DP_TX_TRACKING
  923. /**
  924. * dp_tx_desc_set_timestamp() - set timestamp in tx descriptor
  925. * @tx_desc - tx descriptor
  926. *
  927. * Return: None
  928. */
  929. static inline
  930. void dp_tx_desc_set_timestamp(struct dp_tx_desc_s *tx_desc)
  931. {
  932. tx_desc->timestamp_tick = qdf_system_ticks();
  933. }
  934. /**
  935. * dp_tx_desc_check_corruption() - Verify magic pattern in tx descriptor
  936. * @tx_desc: tx descriptor
  937. *
  938. * Check for corruption in tx descriptor, if magic pattern is not matching
  939. * trigger self recovery
  940. *
  941. * Return: none
  942. */
  943. void dp_tx_desc_check_corruption(struct dp_tx_desc_s *tx_desc);
  944. #else
  945. static inline
  946. void dp_tx_desc_set_timestamp(struct dp_tx_desc_s *tx_desc)
  947. {
  948. }
  949. static inline
  950. void dp_tx_desc_check_corruption(struct dp_tx_desc_s *tx_desc)
  951. {
  952. }
  953. #endif
  954. #ifndef CONFIG_SAWF
  955. static inline bool dp_sawf_tag_valid_get(qdf_nbuf_t nbuf)
  956. {
  957. return false;
  958. }
  959. #endif
  960. #ifdef HW_TX_DELAY_STATS_ENABLE
  961. /**
  962. * dp_tx_desc_set_ktimestamp() - set kernel timestamp in tx descriptor
  963. * @vdev: DP vdev handle
  964. * @tx_desc: tx descriptor
  965. *
  966. * Return: true when descriptor is timestamped, false otherwise
  967. */
  968. static inline
  969. bool dp_tx_desc_set_ktimestamp(struct dp_vdev *vdev,
  970. struct dp_tx_desc_s *tx_desc)
  971. {
  972. if (qdf_unlikely(vdev->pdev->delay_stats_flag) ||
  973. qdf_unlikely(vdev->pdev->soc->wlan_cfg_ctx->pext_stats_enabled) ||
  974. qdf_unlikely(dp_tx_pkt_tracepoints_enabled()) ||
  975. qdf_unlikely(vdev->pdev->soc->peerstats_enabled) ||
  976. qdf_unlikely(dp_is_vdev_tx_delay_stats_enabled(vdev))) {
  977. tx_desc->timestamp = qdf_ktime_real_get();
  978. return true;
  979. }
  980. return false;
  981. }
  982. #else
  983. static inline
  984. bool dp_tx_desc_set_ktimestamp(struct dp_vdev *vdev,
  985. struct dp_tx_desc_s *tx_desc)
  986. {
  987. if (qdf_unlikely(vdev->pdev->delay_stats_flag) ||
  988. qdf_unlikely(vdev->pdev->soc->wlan_cfg_ctx->pext_stats_enabled) ||
  989. qdf_unlikely(dp_tx_pkt_tracepoints_enabled()) ||
  990. qdf_unlikely(vdev->pdev->soc->peerstats_enabled)) {
  991. tx_desc->timestamp = qdf_ktime_real_get();
  992. return true;
  993. }
  994. return false;
  995. }
  996. #endif
  997. #ifdef CONFIG_DP_PKT_ADD_TIMESTAMP
  998. /**
  999. * dp_pkt_add_timestamp() - add timestamp in data payload
  1000. *
  1001. * @vdev: dp vdev
  1002. * @index: index to decide offset in payload
  1003. * @time: timestamp to add in data payload
  1004. * @nbuf: network buffer
  1005. *
  1006. * Return: none
  1007. */
  1008. void dp_pkt_add_timestamp(struct dp_vdev *vdev,
  1009. enum qdf_pkt_timestamp_index index, uint64_t time,
  1010. qdf_nbuf_t nbuf);
  1011. /**
  1012. * dp_pkt_get_timestamp() - get current system time
  1013. *
  1014. * @time: return current system time
  1015. *
  1016. * Return: none
  1017. */
  1018. void dp_pkt_get_timestamp(uint64_t *time);
  1019. #else
  1020. #define dp_pkt_add_timestamp(vdev, index, time, nbuf)
  1021. static inline
  1022. void dp_pkt_get_timestamp(uint64_t *time)
  1023. {
  1024. }
  1025. #endif
  1026. #ifdef CONFIG_WLAN_SYSFS_MEM_STATS
  1027. /**
  1028. * dp_update_tx_desc_stats - Update the increase or decrease in
  1029. * outstanding tx desc count
  1030. * values on pdev and soc
  1031. * @vdev: DP pdev handle
  1032. *
  1033. * Return: void
  1034. */
  1035. static inline void
  1036. dp_update_tx_desc_stats(struct dp_pdev *pdev)
  1037. {
  1038. int32_t tx_descs_cnt =
  1039. qdf_atomic_read(&pdev->num_tx_outstanding);
  1040. if (pdev->tx_descs_max < tx_descs_cnt)
  1041. pdev->tx_descs_max = tx_descs_cnt;
  1042. qdf_mem_tx_desc_cnt_update(pdev->num_tx_outstanding,
  1043. pdev->tx_descs_max);
  1044. }
  1045. #else /* CONFIG_WLAN_SYSFS_MEM_STATS */
  1046. static inline void
  1047. dp_update_tx_desc_stats(struct dp_pdev *pdev)
  1048. {
  1049. }
  1050. #endif /* CONFIG_WLAN_SYSFS_MEM_STATS */
  1051. #ifdef QCA_TX_LIMIT_CHECK
  1052. /**
  1053. * dp_tx_limit_check - Check if allocated tx descriptors reached
  1054. * soc max limit and pdev max limit
  1055. * @vdev: DP vdev handle
  1056. *
  1057. * Return: true if allocated tx descriptors reached max configured value, else
  1058. * false
  1059. */
  1060. static inline bool
  1061. dp_tx_limit_check(struct dp_vdev *vdev)
  1062. {
  1063. struct dp_pdev *pdev = vdev->pdev;
  1064. struct dp_soc *soc = pdev->soc;
  1065. if (qdf_atomic_read(&soc->num_tx_outstanding) >=
  1066. soc->num_tx_allowed) {
  1067. dp_tx_info("queued packets are more than max tx, drop the frame");
  1068. DP_STATS_INC(vdev, tx_i.dropped.desc_na.num, 1);
  1069. return true;
  1070. }
  1071. if (qdf_atomic_read(&pdev->num_tx_outstanding) >=
  1072. pdev->num_tx_allowed) {
  1073. dp_tx_info("queued packets are more than max tx, drop the frame");
  1074. DP_STATS_INC(vdev, tx_i.dropped.desc_na.num, 1);
  1075. DP_STATS_INC(vdev, tx_i.dropped.desc_na_exc_outstand.num, 1);
  1076. return true;
  1077. }
  1078. return false;
  1079. }
  1080. /**
  1081. * dp_tx_exception_limit_check - Check if allocated tx exception descriptors
  1082. * reached soc max limit
  1083. * @vdev: DP vdev handle
  1084. *
  1085. * Return: true if allocated tx descriptors reached max configured value, else
  1086. * false
  1087. */
  1088. static inline bool
  1089. dp_tx_exception_limit_check(struct dp_vdev *vdev)
  1090. {
  1091. struct dp_pdev *pdev = vdev->pdev;
  1092. struct dp_soc *soc = pdev->soc;
  1093. if (qdf_atomic_read(&soc->num_tx_exception) >=
  1094. soc->num_msdu_exception_desc) {
  1095. dp_info("exc packets are more than max drop the exc pkt");
  1096. DP_STATS_INC(vdev, tx_i.dropped.exc_desc_na.num, 1);
  1097. return true;
  1098. }
  1099. return false;
  1100. }
  1101. /**
  1102. * dp_tx_outstanding_inc - Increment outstanding tx desc values on pdev and soc
  1103. * @vdev: DP pdev handle
  1104. *
  1105. * Return: void
  1106. */
  1107. static inline void
  1108. dp_tx_outstanding_inc(struct dp_pdev *pdev)
  1109. {
  1110. struct dp_soc *soc = pdev->soc;
  1111. qdf_atomic_inc(&pdev->num_tx_outstanding);
  1112. qdf_atomic_inc(&soc->num_tx_outstanding);
  1113. dp_update_tx_desc_stats(pdev);
  1114. }
  1115. /**
  1116. * dp_tx_outstanding__dec - Decrement outstanding tx desc values on pdev and soc
  1117. * @vdev: DP pdev handle
  1118. *
  1119. * Return: void
  1120. */
  1121. static inline void
  1122. dp_tx_outstanding_dec(struct dp_pdev *pdev)
  1123. {
  1124. struct dp_soc *soc = pdev->soc;
  1125. qdf_atomic_dec(&pdev->num_tx_outstanding);
  1126. qdf_atomic_dec(&soc->num_tx_outstanding);
  1127. dp_update_tx_desc_stats(pdev);
  1128. }
  1129. #else //QCA_TX_LIMIT_CHECK
  1130. static inline bool
  1131. dp_tx_limit_check(struct dp_vdev *vdev)
  1132. {
  1133. return false;
  1134. }
  1135. static inline bool
  1136. dp_tx_exception_limit_check(struct dp_vdev *vdev)
  1137. {
  1138. return false;
  1139. }
  1140. static inline void
  1141. dp_tx_outstanding_inc(struct dp_pdev *pdev)
  1142. {
  1143. qdf_atomic_inc(&pdev->num_tx_outstanding);
  1144. dp_update_tx_desc_stats(pdev);
  1145. }
  1146. static inline void
  1147. dp_tx_outstanding_dec(struct dp_pdev *pdev)
  1148. {
  1149. qdf_atomic_dec(&pdev->num_tx_outstanding);
  1150. dp_update_tx_desc_stats(pdev);
  1151. }
  1152. #endif //QCA_TX_LIMIT_CHECK
  1153. #endif