sde_power_handle.c 22 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2014-2020, The Linux Foundation. All rights reserved.
  4. */
  5. #define pr_fmt(fmt) "[drm:%s:%d]: " fmt, __func__, __LINE__
  6. #include <linux/clk.h>
  7. #include <linux/kernel.h>
  8. #include <linux/of.h>
  9. #include <linux/string.h>
  10. #include <linux/of_address.h>
  11. #include <linux/slab.h>
  12. #include <linux/mutex.h>
  13. #include <linux/of_platform.h>
  14. #include <linux/sde_io_util.h>
  15. #include <linux/sde_rsc.h>
  16. #include "sde_power_handle.h"
  17. #include "sde_trace.h"
  18. #include "sde_dbg.h"
  19. static const struct sde_power_bus_scaling_data sde_reg_bus_table[] = {
  20. {0, 0},
  21. {0, 76800},
  22. {0, 150000},
  23. {0, 300000},
  24. };
  25. static const char *data_bus_name[SDE_POWER_HANDLE_DBUS_ID_MAX] = {
  26. [SDE_POWER_HANDLE_DBUS_ID_MNOC] = "qcom,sde-data-bus",
  27. [SDE_POWER_HANDLE_DBUS_ID_LLCC] = "qcom,sde-llcc-bus",
  28. [SDE_POWER_HANDLE_DBUS_ID_EBI] = "qcom,sde-ebi-bus",
  29. };
  30. const char *sde_power_handle_get_dbus_name(u32 bus_id)
  31. {
  32. if (bus_id < SDE_POWER_HANDLE_DBUS_ID_MAX)
  33. return data_bus_name[bus_id];
  34. return NULL;
  35. }
  36. static void sde_power_event_trigger_locked(struct sde_power_handle *phandle,
  37. u32 event_type)
  38. {
  39. struct sde_power_event *event;
  40. phandle->last_event_handled = event_type;
  41. list_for_each_entry(event, &phandle->event_list, list) {
  42. if (event->event_type & event_type) {
  43. event->cb_fnc(event_type, event->usr);
  44. }
  45. }
  46. }
  47. static inline void sde_power_rsc_client_init(struct sde_power_handle *phandle)
  48. {
  49. /* creates the rsc client */
  50. if (!phandle->rsc_client_init) {
  51. phandle->rsc_client = sde_rsc_client_create(SDE_RSC_INDEX,
  52. "sde_power_handle", SDE_RSC_CLK_CLIENT, 0);
  53. if (IS_ERR_OR_NULL(phandle->rsc_client)) {
  54. pr_debug("sde rsc client create failed :%ld\n",
  55. PTR_ERR(phandle->rsc_client));
  56. phandle->rsc_client = NULL;
  57. }
  58. phandle->rsc_client_init = true;
  59. }
  60. }
  61. static int sde_power_rsc_update(struct sde_power_handle *phandle, bool enable)
  62. {
  63. u32 rsc_state;
  64. int ret = 0;
  65. rsc_state = enable ? SDE_RSC_CLK_STATE : SDE_RSC_IDLE_STATE;
  66. if (phandle->rsc_client)
  67. ret = sde_rsc_client_state_update(phandle->rsc_client,
  68. rsc_state, NULL, SDE_RSC_INVALID_CRTC_ID, NULL);
  69. return ret;
  70. }
  71. static int sde_power_parse_dt_supply(struct platform_device *pdev,
  72. struct dss_module_power *mp)
  73. {
  74. int i = 0, rc = 0;
  75. u32 tmp = 0;
  76. struct device_node *of_node = NULL, *supply_root_node = NULL;
  77. struct device_node *supply_node = NULL;
  78. if (!pdev || !mp) {
  79. pr_err("invalid input param pdev:%pK mp:%pK\n", pdev, mp);
  80. return -EINVAL;
  81. }
  82. of_node = pdev->dev.of_node;
  83. mp->num_vreg = 0;
  84. supply_root_node = of_get_child_by_name(of_node,
  85. "qcom,platform-supply-entries");
  86. if (!supply_root_node) {
  87. pr_debug("no supply entry present\n");
  88. return rc;
  89. }
  90. for_each_child_of_node(supply_root_node, supply_node)
  91. mp->num_vreg++;
  92. if (mp->num_vreg == 0) {
  93. pr_debug("no vreg\n");
  94. return rc;
  95. }
  96. pr_debug("vreg found. count=%d\n", mp->num_vreg);
  97. mp->vreg_config = devm_kzalloc(&pdev->dev, sizeof(struct dss_vreg) *
  98. mp->num_vreg, GFP_KERNEL);
  99. if (!mp->vreg_config) {
  100. rc = -ENOMEM;
  101. return rc;
  102. }
  103. for_each_child_of_node(supply_root_node, supply_node) {
  104. const char *st = NULL;
  105. rc = of_property_read_string(supply_node,
  106. "qcom,supply-name", &st);
  107. if (rc) {
  108. pr_err("error reading name. rc=%d\n", rc);
  109. goto error;
  110. }
  111. strlcpy(mp->vreg_config[i].vreg_name, st,
  112. sizeof(mp->vreg_config[i].vreg_name));
  113. rc = of_property_read_u32(supply_node,
  114. "qcom,supply-min-voltage", &tmp);
  115. if (rc) {
  116. pr_err("error reading min volt. rc=%d\n", rc);
  117. goto error;
  118. }
  119. mp->vreg_config[i].min_voltage = tmp;
  120. rc = of_property_read_u32(supply_node,
  121. "qcom,supply-max-voltage", &tmp);
  122. if (rc) {
  123. pr_err("error reading max volt. rc=%d\n", rc);
  124. goto error;
  125. }
  126. mp->vreg_config[i].max_voltage = tmp;
  127. rc = of_property_read_u32(supply_node,
  128. "qcom,supply-enable-load", &tmp);
  129. if (rc) {
  130. pr_err("error reading enable load. rc=%d\n", rc);
  131. goto error;
  132. }
  133. mp->vreg_config[i].enable_load = tmp;
  134. rc = of_property_read_u32(supply_node,
  135. "qcom,supply-disable-load", &tmp);
  136. if (rc) {
  137. pr_err("error reading disable load. rc=%d\n", rc);
  138. goto error;
  139. }
  140. mp->vreg_config[i].disable_load = tmp;
  141. rc = of_property_read_u32(supply_node,
  142. "qcom,supply-pre-on-sleep", &tmp);
  143. if (rc)
  144. pr_debug("error reading supply pre sleep value. rc=%d\n",
  145. rc);
  146. mp->vreg_config[i].pre_on_sleep = (!rc ? tmp : 0);
  147. rc = of_property_read_u32(supply_node,
  148. "qcom,supply-pre-off-sleep", &tmp);
  149. if (rc)
  150. pr_debug("error reading supply pre sleep value. rc=%d\n",
  151. rc);
  152. mp->vreg_config[i].pre_off_sleep = (!rc ? tmp : 0);
  153. rc = of_property_read_u32(supply_node,
  154. "qcom,supply-post-on-sleep", &tmp);
  155. if (rc)
  156. pr_debug("error reading supply post sleep value. rc=%d\n",
  157. rc);
  158. mp->vreg_config[i].post_on_sleep = (!rc ? tmp : 0);
  159. rc = of_property_read_u32(supply_node,
  160. "qcom,supply-post-off-sleep", &tmp);
  161. if (rc)
  162. pr_debug("error reading supply post sleep value. rc=%d\n",
  163. rc);
  164. mp->vreg_config[i].post_off_sleep = (!rc ? tmp : 0);
  165. pr_debug("%s min=%d, max=%d, enable=%d, disable=%d, preonsleep=%d, postonsleep=%d, preoffsleep=%d, postoffsleep=%d\n",
  166. mp->vreg_config[i].vreg_name,
  167. mp->vreg_config[i].min_voltage,
  168. mp->vreg_config[i].max_voltage,
  169. mp->vreg_config[i].enable_load,
  170. mp->vreg_config[i].disable_load,
  171. mp->vreg_config[i].pre_on_sleep,
  172. mp->vreg_config[i].post_on_sleep,
  173. mp->vreg_config[i].pre_off_sleep,
  174. mp->vreg_config[i].post_off_sleep);
  175. ++i;
  176. rc = 0;
  177. }
  178. return rc;
  179. error:
  180. if (mp->vreg_config) {
  181. devm_kfree(&pdev->dev, mp->vreg_config);
  182. mp->vreg_config = NULL;
  183. mp->num_vreg = 0;
  184. }
  185. return rc;
  186. }
  187. static int sde_power_parse_dt_clock(struct platform_device *pdev,
  188. struct dss_module_power *mp)
  189. {
  190. u32 i = 0, rc = 0;
  191. const char *clock_name;
  192. u32 clock_rate = 0;
  193. u32 clock_max_rate = 0;
  194. int num_clk = 0;
  195. if (!pdev || !mp) {
  196. pr_err("invalid input param pdev:%pK mp:%pK\n", pdev, mp);
  197. return -EINVAL;
  198. }
  199. mp->num_clk = 0;
  200. num_clk = of_property_count_strings(pdev->dev.of_node,
  201. "clock-names");
  202. if (num_clk <= 0) {
  203. pr_debug("clocks are not defined\n");
  204. goto clk_err;
  205. }
  206. mp->num_clk = num_clk;
  207. mp->clk_config = devm_kzalloc(&pdev->dev,
  208. sizeof(struct dss_clk) * num_clk, GFP_KERNEL);
  209. if (!mp->clk_config) {
  210. rc = -ENOMEM;
  211. mp->num_clk = 0;
  212. goto clk_err;
  213. }
  214. for (i = 0; i < num_clk; i++) {
  215. of_property_read_string_index(pdev->dev.of_node, "clock-names",
  216. i, &clock_name);
  217. strlcpy(mp->clk_config[i].clk_name, clock_name,
  218. sizeof(mp->clk_config[i].clk_name));
  219. of_property_read_u32_index(pdev->dev.of_node, "clock-rate",
  220. i, &clock_rate);
  221. mp->clk_config[i].rate = clock_rate;
  222. if (!clock_rate)
  223. mp->clk_config[i].type = DSS_CLK_AHB;
  224. else
  225. mp->clk_config[i].type = DSS_CLK_PCLK;
  226. clock_max_rate = 0;
  227. of_property_read_u32_index(pdev->dev.of_node, "clock-max-rate",
  228. i, &clock_max_rate);
  229. mp->clk_config[i].max_rate = clock_max_rate;
  230. }
  231. clk_err:
  232. return rc;
  233. }
  234. #define MAX_AXI_PORT_COUNT 3
  235. static int _sde_power_data_bus_set_quota(
  236. struct sde_power_data_bus_handle *pdbus,
  237. u64 in_ab_quota, u64 in_ib_quota)
  238. {
  239. int rc = 0, i = 0;
  240. u32 paths = pdbus->data_paths_cnt;
  241. if (!paths || paths > DATA_BUS_PATH_MAX) {
  242. pr_err("invalid data bus handle, paths %d\n", paths);
  243. return -EINVAL;
  244. }
  245. in_ab_quota = div_u64(in_ab_quota, paths);
  246. SDE_ATRACE_BEGIN("msm_bus_scale_req");
  247. for (i = 0; i < paths; i++) {
  248. if (pdbus->data_bus_hdl[i]) {
  249. rc = icc_set_bw(pdbus->data_bus_hdl[i], in_ab_quota,
  250. in_ib_quota);
  251. if (rc)
  252. goto err;
  253. }
  254. }
  255. pdbus->curr_val.ab = in_ab_quota;
  256. pdbus->curr_val.ib = in_ib_quota;
  257. SDE_ATRACE_END("msm_bus_scale_req");
  258. return rc;
  259. err:
  260. for (; i >= 0; --i)
  261. if (pdbus->data_bus_hdl[i])
  262. icc_set_bw(pdbus->data_bus_hdl[i],
  263. pdbus->curr_val.ab,
  264. pdbus->curr_val.ib);
  265. SDE_ATRACE_END("msm_bus_scale_req");
  266. pr_err("failed to set data bus vote ab=%llu ib=%llu rc=%d\n",
  267. rc, in_ab_quota, in_ib_quota);
  268. return rc;
  269. }
  270. int sde_power_data_bus_set_quota(struct sde_power_handle *phandle,
  271. u32 bus_id, u64 ab_quota, u64 ib_quota)
  272. {
  273. int rc = 0;
  274. u32 paths;
  275. if (!phandle || bus_id >= SDE_POWER_HANDLE_DBUS_ID_MAX) {
  276. pr_err("invalid parameters\n");
  277. return -EINVAL;
  278. }
  279. paths = phandle->data_bus_handle[bus_id].data_paths_cnt;
  280. if (!paths)
  281. goto skip_vote;
  282. trace_sde_perf_update_bus(bus_id, ab_quota, ib_quota, paths);
  283. mutex_lock(&phandle->phandle_lock);
  284. rc = _sde_power_data_bus_set_quota(&phandle->data_bus_handle[bus_id],
  285. ab_quota, ib_quota);
  286. mutex_unlock(&phandle->phandle_lock);
  287. skip_vote:
  288. pr_debug("bus=%d, ab=%llu, ib=%llu, paths=%d\n", bus_id, ab_quota,
  289. ib_quota, paths);
  290. return rc;
  291. }
  292. /**
  293. * sde_power_icc_get - get the interconnect path for the given bus_name
  294. * @pdev - platform device
  295. * @bus_name - bus name for the corresponding interconnect
  296. * @path - the icc_path object we want to obtain for this @bus_name (output)
  297. * @count - if given, incremented only if the path was successfully retrieved
  298. **/
  299. static int sde_power_icc_get(struct platform_device *pdev,
  300. const char *bus_name, struct icc_path **path, u32 *count)
  301. {
  302. int rc = of_property_match_string(pdev->dev.of_node,
  303. "interconnect-names", bus_name);
  304. /* bus_names are optional for any given device node, skip if missing */
  305. if (rc < 0)
  306. goto end;
  307. *path = of_icc_get(&pdev->dev, bus_name);
  308. if (IS_ERR_OR_NULL(*path)) {
  309. rc = PTR_ERR(*path);
  310. pr_err("bus %s parsing failed, rc:%d\n", bus_name, rc);
  311. *path = NULL;
  312. return rc;
  313. }
  314. if (count)
  315. (*count)++;
  316. end:
  317. pr_debug("bus %s dt node %s(%d), icc_path is %s, count:%d\n",
  318. bus_name, rc < 0 ? "missing" : "found", rc,
  319. *path ? "valid" : "NULL", count ? *count : -1);
  320. return 0;
  321. }
  322. static int sde_power_mnoc_bus_parse(struct platform_device *pdev,
  323. struct sde_power_data_bus_handle *pdbus, const char *name)
  324. {
  325. int i, rc = 0;
  326. char bus_name[32];
  327. for (i = 0; i < DATA_BUS_PATH_MAX; ++i) {
  328. snprintf(bus_name, sizeof(bus_name), "%s%d", name, i);
  329. rc = sde_power_icc_get(pdev, bus_name, &pdbus->data_bus_hdl[i],
  330. &pdbus->data_paths_cnt);
  331. if (rc)
  332. break;
  333. }
  334. /* at least one databus path is required */
  335. if (!pdbus->data_paths_cnt) {
  336. pr_err("missing required interconnect:%s, rc:%d\n", name, rc);
  337. return -EINVAL;
  338. } else if (rc) {
  339. pr_info("ignoring error %d for non-primary data path\n", rc);
  340. rc = 0;
  341. }
  342. return rc;
  343. }
  344. static int sde_power_bus_parse(struct platform_device *pdev,
  345. struct sde_power_handle *phandle)
  346. {
  347. int i, j, rc = 0;
  348. bool active_only = false;
  349. const char *bus_name = "qcom,sde-reg-bus";
  350. struct sde_power_data_bus_handle *pdbus = phandle->data_bus_handle;
  351. /* reg bus */
  352. rc = sde_power_icc_get(pdev, bus_name, &phandle->reg_bus_hdl, NULL);
  353. if (rc)
  354. return rc;
  355. /* data buses */
  356. if (of_find_property(pdev->dev.of_node,
  357. "qcom,msm-bus,active-only", NULL))
  358. active_only = true;
  359. for (i = SDE_POWER_HANDLE_DBUS_ID_MNOC;
  360. i < SDE_POWER_HANDLE_DBUS_ID_MAX; ++i) {
  361. if (i == SDE_POWER_HANDLE_DBUS_ID_MNOC)
  362. rc = sde_power_mnoc_bus_parse(pdev, &pdbus[i],
  363. data_bus_name[i]);
  364. else
  365. rc = sde_power_icc_get(pdev, data_bus_name[i],
  366. &pdbus[i].data_bus_hdl[0],
  367. &pdbus[i].data_paths_cnt);
  368. if (rc)
  369. break;
  370. if (active_only) {
  371. pdbus[i].bus_active_only = true;
  372. for (j = 0; j < pdbus[i].data_paths_cnt; ++j)
  373. icc_set_tag(pdbus[i].data_bus_hdl[j],
  374. QCOM_ICC_TAG_ACTIVE_ONLY);
  375. }
  376. pr_debug("found %d paths for %s\n", pdbus[i].data_paths_cnt,
  377. data_bus_name[i]);
  378. }
  379. return rc;
  380. }
  381. static void sde_power_bus_unregister(struct sde_power_handle *phandle)
  382. {
  383. int i, j;
  384. struct sde_power_data_bus_handle *pdbus = phandle->data_bus_handle;
  385. icc_put(phandle->reg_bus_hdl);
  386. phandle->reg_bus_hdl = NULL;
  387. for (i = SDE_POWER_HANDLE_DBUS_ID_MAX - 1;
  388. i >= SDE_POWER_HANDLE_DBUS_ID_MNOC; i--) {
  389. for (j = 0; j < pdbus[i].data_paths_cnt; j++) {
  390. if (pdbus[i].data_bus_hdl[j]) {
  391. icc_put(pdbus[i].data_bus_hdl[j]);
  392. pdbus[i].data_bus_hdl[j] = NULL;
  393. }
  394. }
  395. }
  396. }
  397. static int sde_power_reg_bus_update(struct icc_path *reg_bus_hdl,
  398. u32 usecase_ndx)
  399. {
  400. int rc = 0;
  401. if (reg_bus_hdl) {
  402. SDE_ATRACE_BEGIN("msm_bus_scale_req");
  403. rc = icc_set_bw(reg_bus_hdl,
  404. sde_reg_bus_table[usecase_ndx].ab,
  405. sde_reg_bus_table[usecase_ndx].ib);
  406. SDE_ATRACE_END("msm_bus_scale_req");
  407. }
  408. if (rc)
  409. pr_err("failed to set reg bus vote rc=%d\n", rc);
  410. return rc;
  411. }
  412. int sde_power_resource_init(struct platform_device *pdev,
  413. struct sde_power_handle *phandle)
  414. {
  415. int rc = 0;
  416. struct dss_module_power *mp;
  417. if (!phandle || !pdev) {
  418. pr_err("invalid input param\n");
  419. rc = -EINVAL;
  420. goto end;
  421. }
  422. mp = &phandle->mp;
  423. phandle->dev = &pdev->dev;
  424. rc = sde_power_parse_dt_clock(pdev, mp);
  425. if (rc) {
  426. pr_err("device clock parsing failed\n");
  427. goto end;
  428. }
  429. rc = sde_power_parse_dt_supply(pdev, mp);
  430. if (rc) {
  431. pr_err("device vreg supply parsing failed\n");
  432. goto parse_vreg_err;
  433. }
  434. rc = msm_dss_config_vreg(&pdev->dev,
  435. mp->vreg_config, mp->num_vreg, 1);
  436. if (rc) {
  437. pr_err("vreg config failed rc=%d\n", rc);
  438. goto vreg_err;
  439. }
  440. rc = msm_dss_get_clk(&pdev->dev, mp->clk_config, mp->num_clk);
  441. if (rc) {
  442. pr_err("clock get failed rc=%d\n", rc);
  443. goto clkget_err;
  444. }
  445. rc = msm_dss_clk_set_rate(mp->clk_config, mp->num_clk);
  446. if (rc) {
  447. pr_err("clock set rate failed rc=%d\n", rc);
  448. goto clkset_err;
  449. }
  450. rc = sde_power_bus_parse(pdev, phandle);
  451. if (rc) {
  452. pr_err("bus parse failed rc=%d\n", rc);
  453. goto bus_err;
  454. }
  455. INIT_LIST_HEAD(&phandle->event_list);
  456. phandle->rsc_client = NULL;
  457. phandle->rsc_client_init = false;
  458. mutex_init(&phandle->phandle_lock);
  459. return rc;
  460. bus_err:
  461. sde_power_bus_unregister(phandle);
  462. clkset_err:
  463. msm_dss_put_clk(mp->clk_config, mp->num_clk);
  464. clkget_err:
  465. msm_dss_config_vreg(&pdev->dev, mp->vreg_config, mp->num_vreg, 0);
  466. vreg_err:
  467. if (mp->vreg_config)
  468. devm_kfree(&pdev->dev, mp->vreg_config);
  469. mp->num_vreg = 0;
  470. parse_vreg_err:
  471. if (mp->clk_config)
  472. devm_kfree(&pdev->dev, mp->clk_config);
  473. mp->num_clk = 0;
  474. end:
  475. return rc;
  476. }
  477. void sde_power_resource_deinit(struct platform_device *pdev,
  478. struct sde_power_handle *phandle)
  479. {
  480. struct dss_module_power *mp;
  481. struct sde_power_event *curr_event, *next_event;
  482. if (!phandle || !pdev) {
  483. pr_err("invalid input param\n");
  484. return;
  485. }
  486. mp = &phandle->mp;
  487. mutex_lock(&phandle->phandle_lock);
  488. list_for_each_entry_safe(curr_event, next_event,
  489. &phandle->event_list, list) {
  490. pr_err("event:%d, client:%s still registered\n",
  491. curr_event->event_type,
  492. curr_event->client_name);
  493. curr_event->active = false;
  494. list_del(&curr_event->list);
  495. }
  496. mutex_unlock(&phandle->phandle_lock);
  497. sde_power_bus_unregister(phandle);
  498. msm_dss_put_clk(mp->clk_config, mp->num_clk);
  499. msm_dss_config_vreg(&pdev->dev, mp->vreg_config, mp->num_vreg, 0);
  500. if (mp->clk_config)
  501. devm_kfree(&pdev->dev, mp->clk_config);
  502. if (mp->vreg_config)
  503. devm_kfree(&pdev->dev, mp->vreg_config);
  504. mp->num_vreg = 0;
  505. mp->num_clk = 0;
  506. if (phandle->rsc_client)
  507. sde_rsc_client_destroy(phandle->rsc_client);
  508. }
  509. int sde_power_scale_reg_bus(struct sde_power_handle *phandle,
  510. u32 usecase_ndx, bool skip_lock)
  511. {
  512. int rc = 0;
  513. if (!skip_lock)
  514. mutex_lock(&phandle->phandle_lock);
  515. pr_debug("%pS: requested:%d\n",
  516. __builtin_return_address(0), usecase_ndx);
  517. rc = sde_power_reg_bus_update(phandle->reg_bus_hdl,
  518. usecase_ndx);
  519. if (rc)
  520. pr_err("failed to set reg bus vote rc=%d\n", rc);
  521. else {
  522. phandle->reg_bus_curr_val.ab =
  523. sde_reg_bus_table[usecase_ndx].ab;
  524. phandle->reg_bus_curr_val.ib =
  525. sde_reg_bus_table[usecase_ndx].ib;
  526. phandle->current_usecase_ndx = usecase_ndx;
  527. }
  528. if (!skip_lock)
  529. mutex_unlock(&phandle->phandle_lock);
  530. return rc;
  531. }
  532. static inline bool _resource_changed(u32 current_usecase_ndx,
  533. u32 max_usecase_ndx)
  534. {
  535. WARN_ON((current_usecase_ndx >= VOTE_INDEX_MAX)
  536. || (max_usecase_ndx >= VOTE_INDEX_MAX));
  537. if (((current_usecase_ndx >= VOTE_INDEX_LOW) && /* enabled */
  538. (max_usecase_ndx == VOTE_INDEX_DISABLE)) || /* max disabled */
  539. ((current_usecase_ndx == VOTE_INDEX_DISABLE) && /* disabled */
  540. (max_usecase_ndx >= VOTE_INDEX_LOW))) /* max enabled */
  541. return true;
  542. return false;
  543. }
  544. int sde_power_resource_enable(struct sde_power_handle *phandle, bool enable)
  545. {
  546. int rc = 0, i = 0;
  547. struct dss_module_power *mp;
  548. if (!phandle) {
  549. pr_err("invalid input argument\n");
  550. return -EINVAL;
  551. }
  552. mp = &phandle->mp;
  553. mutex_lock(&phandle->phandle_lock);
  554. pr_debug("enable:%d\n", enable);
  555. SDE_ATRACE_BEGIN("sde_power_resource_enable");
  556. /* RSC client init */
  557. sde_power_rsc_client_init(phandle);
  558. if (enable) {
  559. sde_power_event_trigger_locked(phandle,
  560. SDE_POWER_EVENT_PRE_ENABLE);
  561. for (i = 0; i < SDE_POWER_HANDLE_DBUS_ID_MAX &&
  562. phandle->data_bus_handle[i].data_paths_cnt > 0; i++) {
  563. rc = _sde_power_data_bus_set_quota(
  564. &phandle->data_bus_handle[i],
  565. SDE_POWER_HANDLE_ENABLE_BUS_AB_QUOTA,
  566. SDE_POWER_HANDLE_ENABLE_BUS_IB_QUOTA);
  567. if (rc) {
  568. pr_err("failed to set data bus vote id=%d rc=%d\n",
  569. i, rc);
  570. goto vreg_err;
  571. }
  572. }
  573. rc = msm_dss_enable_vreg(mp->vreg_config, mp->num_vreg,
  574. enable);
  575. if (rc) {
  576. pr_err("failed to enable vregs rc=%d\n", rc);
  577. goto vreg_err;
  578. }
  579. rc = sde_power_scale_reg_bus(phandle, VOTE_INDEX_LOW, true);
  580. if (rc) {
  581. pr_err("failed to set reg bus vote rc=%d\n", rc);
  582. goto reg_bus_hdl_err;
  583. }
  584. SDE_EVT32_VERBOSE(enable, SDE_EVTLOG_FUNC_CASE1);
  585. rc = sde_power_rsc_update(phandle, true);
  586. if (rc) {
  587. pr_err("failed to update rsc\n");
  588. goto rsc_err;
  589. }
  590. rc = msm_dss_enable_clk(mp->clk_config, mp->num_clk, enable);
  591. if (rc) {
  592. pr_err("clock enable failed rc:%d\n", rc);
  593. goto clk_err;
  594. }
  595. sde_power_event_trigger_locked(phandle,
  596. SDE_POWER_EVENT_POST_ENABLE);
  597. } else {
  598. sde_power_event_trigger_locked(phandle,
  599. SDE_POWER_EVENT_PRE_DISABLE);
  600. SDE_EVT32_VERBOSE(enable, SDE_EVTLOG_FUNC_CASE2);
  601. sde_power_rsc_update(phandle, false);
  602. msm_dss_enable_clk(mp->clk_config, mp->num_clk, enable);
  603. sde_power_scale_reg_bus(phandle, VOTE_INDEX_DISABLE, true);
  604. msm_dss_enable_vreg(mp->vreg_config, mp->num_vreg, enable);
  605. for (i = SDE_POWER_HANDLE_DBUS_ID_MAX - 1; i >= 0; i--)
  606. if (phandle->data_bus_handle[i].data_paths_cnt > 0)
  607. _sde_power_data_bus_set_quota(
  608. &phandle->data_bus_handle[i],
  609. SDE_POWER_HANDLE_DISABLE_BUS_AB_QUOTA,
  610. SDE_POWER_HANDLE_DISABLE_BUS_IB_QUOTA);
  611. sde_power_event_trigger_locked(phandle,
  612. SDE_POWER_EVENT_POST_DISABLE);
  613. }
  614. SDE_EVT32_VERBOSE(enable, SDE_EVTLOG_FUNC_EXIT);
  615. SDE_ATRACE_END("sde_power_resource_enable");
  616. mutex_unlock(&phandle->phandle_lock);
  617. return rc;
  618. clk_err:
  619. sde_power_rsc_update(phandle, false);
  620. rsc_err:
  621. sde_power_scale_reg_bus(phandle, VOTE_INDEX_DISABLE, true);
  622. reg_bus_hdl_err:
  623. msm_dss_enable_vreg(mp->vreg_config, mp->num_vreg, 0);
  624. vreg_err:
  625. for (i-- ; i >= 0 && phandle->data_bus_handle[i].data_paths_cnt > 0; i--)
  626. _sde_power_data_bus_set_quota(
  627. &phandle->data_bus_handle[i],
  628. SDE_POWER_HANDLE_DISABLE_BUS_AB_QUOTA,
  629. SDE_POWER_HANDLE_DISABLE_BUS_IB_QUOTA);
  630. SDE_ATRACE_END("sde_power_resource_enable");
  631. mutex_unlock(&phandle->phandle_lock);
  632. return rc;
  633. }
  634. int sde_power_clk_set_rate(struct sde_power_handle *phandle, char *clock_name,
  635. u64 rate)
  636. {
  637. int i, rc = -EINVAL;
  638. struct dss_module_power *mp;
  639. if (!phandle) {
  640. pr_err("invalid input power handle\n");
  641. return -EINVAL;
  642. }
  643. mutex_lock(&phandle->phandle_lock);
  644. if (phandle->last_event_handled & SDE_POWER_EVENT_POST_DISABLE) {
  645. pr_debug("invalid power state %u\n",
  646. phandle->last_event_handled);
  647. SDE_EVT32(phandle->last_event_handled, SDE_EVTLOG_ERROR);
  648. mutex_unlock(&phandle->phandle_lock);
  649. return -EINVAL;
  650. }
  651. mp = &phandle->mp;
  652. for (i = 0; i < mp->num_clk; i++) {
  653. if (!strcmp(mp->clk_config[i].clk_name, clock_name)) {
  654. if (mp->clk_config[i].max_rate &&
  655. (rate > mp->clk_config[i].max_rate))
  656. rate = mp->clk_config[i].max_rate;
  657. mp->clk_config[i].rate = rate;
  658. rc = msm_dss_single_clk_set_rate(&mp->clk_config[i]);
  659. break;
  660. }
  661. }
  662. mutex_unlock(&phandle->phandle_lock);
  663. return rc;
  664. }
  665. u64 sde_power_clk_get_rate(struct sde_power_handle *phandle, char *clock_name)
  666. {
  667. int i;
  668. struct dss_module_power *mp;
  669. u64 rate = -EINVAL;
  670. if (!phandle) {
  671. pr_err("invalid input power handle\n");
  672. return -EINVAL;
  673. }
  674. mp = &phandle->mp;
  675. for (i = 0; i < mp->num_clk; i++) {
  676. if (!strcmp(mp->clk_config[i].clk_name, clock_name)) {
  677. rate = clk_get_rate(mp->clk_config[i].clk);
  678. break;
  679. }
  680. }
  681. return rate;
  682. }
  683. u64 sde_power_clk_get_max_rate(struct sde_power_handle *phandle,
  684. char *clock_name)
  685. {
  686. int i;
  687. struct dss_module_power *mp;
  688. u64 rate = 0;
  689. if (!phandle) {
  690. pr_err("invalid input power handle\n");
  691. return 0;
  692. }
  693. mp = &phandle->mp;
  694. for (i = 0; i < mp->num_clk; i++) {
  695. if (!strcmp(mp->clk_config[i].clk_name, clock_name)) {
  696. rate = mp->clk_config[i].max_rate;
  697. break;
  698. }
  699. }
  700. return rate;
  701. }
  702. struct clk *sde_power_clk_get_clk(struct sde_power_handle *phandle,
  703. char *clock_name)
  704. {
  705. int i;
  706. struct dss_module_power *mp;
  707. struct clk *clk = NULL;
  708. if (!phandle) {
  709. pr_err("invalid input power handle\n");
  710. return 0;
  711. }
  712. mp = &phandle->mp;
  713. for (i = 0; i < mp->num_clk; i++) {
  714. if (!strcmp(mp->clk_config[i].clk_name, clock_name)) {
  715. clk = mp->clk_config[i].clk;
  716. break;
  717. }
  718. }
  719. return clk;
  720. }
  721. struct sde_power_event *sde_power_handle_register_event(
  722. struct sde_power_handle *phandle,
  723. u32 event_type, void (*cb_fnc)(u32 event_type, void *usr),
  724. void *usr, char *client_name)
  725. {
  726. struct sde_power_event *event;
  727. if (!phandle) {
  728. pr_err("invalid power handle\n");
  729. return ERR_PTR(-EINVAL);
  730. } else if (!cb_fnc || !event_type) {
  731. pr_err("no callback fnc or event type\n");
  732. return ERR_PTR(-EINVAL);
  733. }
  734. event = kzalloc(sizeof(struct sde_power_event), GFP_KERNEL);
  735. if (!event)
  736. return ERR_PTR(-ENOMEM);
  737. event->event_type = event_type;
  738. event->cb_fnc = cb_fnc;
  739. event->usr = usr;
  740. strlcpy(event->client_name, client_name, MAX_CLIENT_NAME_LEN);
  741. event->active = true;
  742. mutex_lock(&phandle->phandle_lock);
  743. list_add(&event->list, &phandle->event_list);
  744. mutex_unlock(&phandle->phandle_lock);
  745. return event;
  746. }
  747. void sde_power_handle_unregister_event(
  748. struct sde_power_handle *phandle,
  749. struct sde_power_event *event)
  750. {
  751. if (!phandle || !event) {
  752. pr_err("invalid phandle or event\n");
  753. } else if (!event->active) {
  754. pr_err("power handle deinit already done\n");
  755. kfree(event);
  756. } else {
  757. mutex_lock(&phandle->phandle_lock);
  758. list_del_init(&event->list);
  759. mutex_unlock(&phandle->phandle_lock);
  760. kfree(event);
  761. }
  762. }