dp_mlo.c 37 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383
  1. /*
  2. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <wlan_utility.h>
  17. #include <dp_internal.h>
  18. #include <dp_htt.h>
  19. #include <hal_be_api.h>
  20. #include "dp_mlo.h"
  21. #include <dp_be.h>
  22. #include <dp_be_rx.h>
  23. #include <dp_htt.h>
  24. #include <dp_internal.h>
  25. #include <wlan_cfg.h>
  26. #include <wlan_mlo_mgr_cmn.h>
  27. #include "dp_umac_reset.h"
  28. #ifdef DP_UMAC_HW_RESET_SUPPORT
  29. /**
  30. * dp_umac_reset_update_partner_map() - Update Umac reset partner map
  31. * @mlo_ctx: mlo soc context
  32. * @chip_id: chip id
  33. * @set: flag indicating whether to set or clear the bit
  34. *
  35. * Return: void
  36. */
  37. static void dp_umac_reset_update_partner_map(struct dp_mlo_ctxt *mlo_ctx,
  38. int chip_id, bool set);
  39. #endif
  40. /**
  41. * dp_mlo_ctxt_attach_wifi3() - Attach DP MLO context
  42. * @ctrl_ctxt: CDP control context
  43. *
  44. * Return: DP MLO context handle on success, NULL on failure
  45. */
  46. static struct cdp_mlo_ctxt *
  47. dp_mlo_ctxt_attach_wifi3(struct cdp_ctrl_mlo_mgr *ctrl_ctxt)
  48. {
  49. struct dp_mlo_ctxt *mlo_ctxt =
  50. qdf_mem_malloc(sizeof(struct dp_mlo_ctxt));
  51. if (!mlo_ctxt) {
  52. dp_err("Failed to allocate DP MLO Context");
  53. return NULL;
  54. }
  55. mlo_ctxt->ctrl_ctxt = ctrl_ctxt;
  56. if (dp_mlo_peer_find_hash_attach_be
  57. (mlo_ctxt, DP_MAX_MLO_PEER) != QDF_STATUS_SUCCESS) {
  58. dp_err("Failed to allocate peer hash");
  59. qdf_mem_free(mlo_ctxt);
  60. return NULL;
  61. }
  62. qdf_get_random_bytes(mlo_ctxt->toeplitz_hash_ipv4,
  63. (sizeof(mlo_ctxt->toeplitz_hash_ipv4[0]) *
  64. LRO_IPV4_SEED_ARR_SZ));
  65. qdf_get_random_bytes(mlo_ctxt->toeplitz_hash_ipv6,
  66. (sizeof(mlo_ctxt->toeplitz_hash_ipv6[0]) *
  67. LRO_IPV6_SEED_ARR_SZ));
  68. qdf_spinlock_create(&mlo_ctxt->ml_soc_list_lock);
  69. qdf_spinlock_create(&mlo_ctxt->grp_umac_reset_ctx.grp_ctx_lock);
  70. return dp_mlo_ctx_to_cdp(mlo_ctxt);
  71. }
  72. /**
  73. * dp_mlo_ctxt_detach_wifi3() - Detach DP MLO context
  74. * @cdp_ml_ctxt: pointer to CDP DP MLO context
  75. *
  76. * Return: void
  77. */
  78. static void dp_mlo_ctxt_detach_wifi3(struct cdp_mlo_ctxt *cdp_ml_ctxt)
  79. {
  80. struct dp_mlo_ctxt *mlo_ctxt = cdp_mlo_ctx_to_dp(cdp_ml_ctxt);
  81. if (!cdp_ml_ctxt)
  82. return;
  83. qdf_spinlock_destroy(&mlo_ctxt->grp_umac_reset_ctx.grp_ctx_lock);
  84. qdf_spinlock_destroy(&mlo_ctxt->ml_soc_list_lock);
  85. dp_mlo_peer_find_hash_detach_be(mlo_ctxt);
  86. qdf_mem_free(mlo_ctxt);
  87. }
  88. /**
  89. * dp_mlo_set_soc_by_chip_id() - Add DP soc to ML context soc list
  90. * @ml_ctxt: DP ML context handle
  91. * @soc: DP soc handle
  92. * @chip_id: MLO chip id
  93. *
  94. * Return: void
  95. */
  96. static void dp_mlo_set_soc_by_chip_id(struct dp_mlo_ctxt *ml_ctxt,
  97. struct dp_soc *soc,
  98. uint8_t chip_id)
  99. {
  100. qdf_spin_lock_bh(&ml_ctxt->ml_soc_list_lock);
  101. ml_ctxt->ml_soc_list[chip_id] = soc;
  102. /* The same API is called during soc_attach and soc_detach
  103. * soc parameter is non-null or null accordingly.
  104. */
  105. if (soc)
  106. ml_ctxt->ml_soc_cnt++;
  107. else
  108. ml_ctxt->ml_soc_cnt--;
  109. dp_umac_reset_update_partner_map(ml_ctxt, chip_id, !!soc);
  110. qdf_spin_unlock_bh(&ml_ctxt->ml_soc_list_lock);
  111. }
  112. struct dp_soc*
  113. dp_mlo_get_soc_ref_by_chip_id(struct dp_mlo_ctxt *ml_ctxt,
  114. uint8_t chip_id)
  115. {
  116. struct dp_soc *soc = NULL;
  117. if (!ml_ctxt) {
  118. dp_warn("MLO context not created, MLO not enabled");
  119. return NULL;
  120. }
  121. qdf_spin_lock_bh(&ml_ctxt->ml_soc_list_lock);
  122. soc = ml_ctxt->ml_soc_list[chip_id];
  123. if (!soc) {
  124. qdf_spin_unlock_bh(&ml_ctxt->ml_soc_list_lock);
  125. return NULL;
  126. }
  127. qdf_atomic_inc(&soc->ref_count);
  128. qdf_spin_unlock_bh(&ml_ctxt->ml_soc_list_lock);
  129. return soc;
  130. }
  131. static QDF_STATUS dp_partner_soc_rx_hw_cc_init(struct dp_mlo_ctxt *mlo_ctxt,
  132. struct dp_soc_be *be_soc)
  133. {
  134. uint8_t i;
  135. struct dp_soc *partner_soc;
  136. struct dp_soc_be *be_partner_soc;
  137. uint8_t pool_id;
  138. QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
  139. for (i = 0; i < WLAN_MAX_MLO_CHIPS; i++) {
  140. partner_soc = dp_mlo_get_soc_ref_by_chip_id(mlo_ctxt, i);
  141. if (!partner_soc) {
  142. dp_err("partner_soc is NULL");
  143. continue;
  144. }
  145. be_partner_soc = dp_get_be_soc_from_dp_soc(partner_soc);
  146. for (pool_id = 0; pool_id < MAX_RXDESC_POOLS; pool_id++) {
  147. qdf_status =
  148. dp_hw_cookie_conversion_init
  149. (be_soc,
  150. &be_partner_soc->rx_cc_ctx[pool_id]);
  151. if (!QDF_IS_STATUS_SUCCESS(qdf_status)) {
  152. dp_alert("MLO partner soc RX CC init failed");
  153. return qdf_status;
  154. }
  155. }
  156. }
  157. return qdf_status;
  158. }
  159. static void dp_mlo_soc_drain_rx_buf(struct dp_soc *soc, void *arg, int chip_id)
  160. {
  161. uint8_t i = 0;
  162. uint8_t cpu = 0;
  163. uint8_t rx_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = {0};
  164. uint8_t rx_err_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = {0};
  165. uint8_t rx_wbm_rel_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = {0};
  166. uint8_t reo_status_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = {0};
  167. /* Save the current interrupt mask and disable the interrupts */
  168. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  169. rx_ring_mask[i] = soc->intr_ctx[i].rx_ring_mask;
  170. rx_err_ring_mask[i] = soc->intr_ctx[i].rx_err_ring_mask;
  171. rx_wbm_rel_ring_mask[i] = soc->intr_ctx[i].rx_wbm_rel_ring_mask;
  172. reo_status_ring_mask[i] = soc->intr_ctx[i].reo_status_ring_mask;
  173. soc->intr_ctx[i].rx_ring_mask = 0;
  174. soc->intr_ctx[i].rx_err_ring_mask = 0;
  175. soc->intr_ctx[i].rx_wbm_rel_ring_mask = 0;
  176. soc->intr_ctx[i].reo_status_ring_mask = 0;
  177. }
  178. /* make sure dp_service_srngs not running on any of the CPU */
  179. for (cpu = 0; cpu < NR_CPUS; cpu++) {
  180. while (qdf_atomic_test_bit(cpu,
  181. &soc->service_rings_running))
  182. ;
  183. }
  184. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  185. uint8_t ring = 0;
  186. uint32_t num_entries = 0;
  187. hal_ring_handle_t hal_ring_hdl = NULL;
  188. uint8_t rx_mask = wlan_cfg_get_rx_ring_mask(
  189. soc->wlan_cfg_ctx, i);
  190. uint8_t rx_err_mask = wlan_cfg_get_rx_err_ring_mask(
  191. soc->wlan_cfg_ctx, i);
  192. uint8_t rx_wbm_rel_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  193. soc->wlan_cfg_ctx, i);
  194. if (rx_mask) {
  195. /* iterate through each reo ring and process the buf */
  196. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  197. if (!(rx_mask & (1 << ring)))
  198. continue;
  199. hal_ring_hdl =
  200. soc->reo_dest_ring[ring].hal_srng;
  201. num_entries = hal_srng_get_num_entries(
  202. soc->hal_soc,
  203. hal_ring_hdl);
  204. dp_rx_process_be(&soc->intr_ctx[i],
  205. hal_ring_hdl,
  206. ring,
  207. num_entries);
  208. }
  209. }
  210. /* Process REO Exception ring */
  211. if (rx_err_mask) {
  212. hal_ring_hdl = soc->reo_exception_ring.hal_srng;
  213. num_entries = hal_srng_get_num_entries(
  214. soc->hal_soc,
  215. hal_ring_hdl);
  216. dp_rx_err_process(&soc->intr_ctx[i], soc,
  217. hal_ring_hdl, num_entries);
  218. }
  219. /* Process Rx WBM release ring */
  220. if (rx_wbm_rel_mask) {
  221. hal_ring_hdl = soc->rx_rel_ring.hal_srng;
  222. num_entries = hal_srng_get_num_entries(
  223. soc->hal_soc,
  224. hal_ring_hdl);
  225. dp_rx_wbm_err_process(&soc->intr_ctx[i], soc,
  226. hal_ring_hdl, num_entries);
  227. }
  228. }
  229. /* restore the interrupt mask */
  230. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  231. soc->intr_ctx[i].rx_ring_mask = rx_ring_mask[i];
  232. soc->intr_ctx[i].rx_err_ring_mask = rx_err_ring_mask[i];
  233. soc->intr_ctx[i].rx_wbm_rel_ring_mask = rx_wbm_rel_ring_mask[i];
  234. soc->intr_ctx[i].reo_status_ring_mask = reo_status_ring_mask[i];
  235. }
  236. }
  237. static void dp_mlo_soc_setup(struct cdp_soc_t *soc_hdl,
  238. struct cdp_mlo_ctxt *cdp_ml_ctxt)
  239. {
  240. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  241. struct dp_mlo_ctxt *mlo_ctxt = cdp_mlo_ctx_to_dp(cdp_ml_ctxt);
  242. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  243. uint8_t pdev_id;
  244. if (!cdp_ml_ctxt)
  245. return;
  246. be_soc->ml_ctxt = mlo_ctxt;
  247. for (pdev_id = 0; pdev_id < MAX_PDEV_CNT; pdev_id++) {
  248. if (soc->pdev_list[pdev_id])
  249. dp_mlo_update_link_to_pdev_map(soc,
  250. soc->pdev_list[pdev_id]);
  251. }
  252. dp_mlo_set_soc_by_chip_id(mlo_ctxt, soc, be_soc->mlo_chip_id);
  253. }
  254. static void dp_mlo_soc_teardown(struct cdp_soc_t *soc_hdl,
  255. struct cdp_mlo_ctxt *cdp_ml_ctxt,
  256. bool is_force_down)
  257. {
  258. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  259. struct dp_mlo_ctxt *mlo_ctxt = cdp_mlo_ctx_to_dp(cdp_ml_ctxt);
  260. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  261. if (!cdp_ml_ctxt)
  262. return;
  263. /* During the teardown drain the Rx buffers if any exist in the ring */
  264. dp_mlo_iter_ptnr_soc(be_soc,
  265. dp_mlo_soc_drain_rx_buf,
  266. NULL);
  267. dp_mlo_set_soc_by_chip_id(mlo_ctxt, NULL, be_soc->mlo_chip_id);
  268. be_soc->ml_ctxt = NULL;
  269. }
  270. static QDF_STATUS dp_mlo_add_ptnr_vdev(struct dp_vdev *vdev1,
  271. struct dp_vdev *vdev2,
  272. struct dp_soc *soc, uint8_t pdev_id)
  273. {
  274. struct dp_soc_be *soc_be = dp_get_be_soc_from_dp_soc(soc);
  275. struct dp_vdev_be *vdev2_be = dp_get_be_vdev_from_dp_vdev(vdev2);
  276. /* return when valid entry exists */
  277. if (vdev2_be->partner_vdev_list[soc_be->mlo_chip_id][pdev_id] !=
  278. CDP_INVALID_VDEV_ID)
  279. return QDF_STATUS_SUCCESS;
  280. vdev2_be->partner_vdev_list[soc_be->mlo_chip_id][pdev_id] =
  281. vdev1->vdev_id;
  282. mlo_debug("Add vdev%d to vdev%d list, mlo_chip_id = %d pdev_id = %d\n",
  283. vdev1->vdev_id, vdev2->vdev_id, soc_be->mlo_chip_id, pdev_id);
  284. return QDF_STATUS_SUCCESS;
  285. }
  286. QDF_STATUS dp_update_mlo_ptnr_list(struct cdp_soc_t *soc_hdl,
  287. int8_t partner_vdev_ids[], uint8_t num_vdevs,
  288. uint8_t self_vdev_id)
  289. {
  290. int i, j;
  291. struct dp_soc *self_soc = cdp_soc_t_to_dp_soc(soc_hdl);
  292. struct dp_vdev *self_vdev;
  293. QDF_STATUS ret = QDF_STATUS_SUCCESS;
  294. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(self_soc);
  295. struct dp_mlo_ctxt *dp_mlo = be_soc->ml_ctxt;
  296. if (!dp_mlo)
  297. return QDF_STATUS_E_FAILURE;
  298. self_vdev = dp_vdev_get_ref_by_id(self_soc, self_vdev_id, DP_MOD_ID_RX);
  299. if (!self_vdev)
  300. return QDF_STATUS_E_FAILURE;
  301. /* go through the input vdev id list and if there are partner vdevs,
  302. * - then add the current vdev's id to partner vdev's list using pdev_id and
  303. * increase the reference
  304. * - add partner vdev to self list and increase the reference
  305. */
  306. for (i = 0; i < num_vdevs; i++) {
  307. if (partner_vdev_ids[i] == CDP_INVALID_VDEV_ID)
  308. continue;
  309. for (j = 0; j < WLAN_MAX_MLO_CHIPS; j++) {
  310. struct dp_soc *soc =
  311. dp_mlo_get_soc_ref_by_chip_id(dp_mlo, j);
  312. if (soc) {
  313. struct dp_vdev *vdev;
  314. vdev = dp_vdev_get_ref_by_id(soc,
  315. partner_vdev_ids[i], DP_MOD_ID_RX);
  316. if (vdev) {
  317. if (vdev == self_vdev) {
  318. dp_vdev_unref_delete(soc,
  319. vdev, DP_MOD_ID_RX);
  320. /*dp_soc_unref_delete(soc); */
  321. continue;
  322. }
  323. if (qdf_is_macaddr_equal(
  324. (struct qdf_mac_addr *)self_vdev->mld_mac_addr.raw,
  325. (struct qdf_mac_addr *)vdev->mld_mac_addr.raw)) {
  326. if (dp_mlo_add_ptnr_vdev(self_vdev,
  327. vdev, self_soc,
  328. self_vdev->pdev->pdev_id) !=
  329. QDF_STATUS_SUCCESS) {
  330. dp_err("Unable to add self to partner vdev's list");
  331. dp_vdev_unref_delete(soc,
  332. vdev, DP_MOD_ID_RX);
  333. /* TODO - release soc ref here */
  334. /* dp_soc_unref_delete(soc);*/
  335. ret = QDF_STATUS_E_FAILURE;
  336. goto exit;
  337. }
  338. /* add to self list */
  339. if (dp_mlo_add_ptnr_vdev(vdev, self_vdev, soc,
  340. vdev->pdev->pdev_id) !=
  341. QDF_STATUS_SUCCESS) {
  342. dp_err("Unable to add vdev to self vdev's list");
  343. dp_vdev_unref_delete(self_soc,
  344. vdev, DP_MOD_ID_RX);
  345. /* TODO - release soc ref here */
  346. /* dp_soc_unref_delete(soc);*/
  347. ret = QDF_STATUS_E_FAILURE;
  348. goto exit;
  349. }
  350. }
  351. dp_vdev_unref_delete(soc, vdev,
  352. DP_MOD_ID_RX);
  353. } /* vdev */
  354. /* TODO - release soc ref here */
  355. /* dp_soc_unref_delete(soc); */
  356. } /* soc */
  357. } /* for */
  358. } /* for */
  359. exit:
  360. dp_vdev_unref_delete(self_soc, self_vdev, DP_MOD_ID_RX);
  361. return ret;
  362. }
  363. void dp_clr_mlo_ptnr_list(struct dp_soc *soc, struct dp_vdev *vdev)
  364. {
  365. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  366. struct dp_vdev_be *vdev_be = dp_get_be_vdev_from_dp_vdev(vdev);
  367. struct dp_mlo_ctxt *dp_mlo = be_soc->ml_ctxt;
  368. uint8_t soc_id = be_soc->mlo_chip_id;
  369. uint8_t pdev_id = vdev->pdev->pdev_id;
  370. int i, j;
  371. for (i = 0; i < WLAN_MAX_MLO_CHIPS; i++) {
  372. for (j = 0; j < WLAN_MAX_MLO_LINKS_PER_SOC; j++) {
  373. struct dp_vdev *pr_vdev;
  374. struct dp_soc *pr_soc;
  375. struct dp_soc_be *pr_soc_be;
  376. struct dp_pdev *pr_pdev;
  377. struct dp_vdev_be *pr_vdev_be;
  378. if (vdev_be->partner_vdev_list[i][j] ==
  379. CDP_INVALID_VDEV_ID)
  380. continue;
  381. pr_soc = dp_mlo_get_soc_ref_by_chip_id(dp_mlo, i);
  382. if (!pr_soc)
  383. continue;
  384. pr_soc_be = dp_get_be_soc_from_dp_soc(pr_soc);
  385. pr_vdev = dp_vdev_get_ref_by_id(pr_soc,
  386. vdev_be->partner_vdev_list[i][j],
  387. DP_MOD_ID_RX);
  388. if (!pr_vdev)
  389. continue;
  390. /* remove self vdev from partner list */
  391. pr_vdev_be = dp_get_be_vdev_from_dp_vdev(pr_vdev);
  392. pr_vdev_be->partner_vdev_list[soc_id][pdev_id] =
  393. CDP_INVALID_VDEV_ID;
  394. /* remove partner vdev from self list */
  395. pr_pdev = pr_vdev->pdev;
  396. vdev_be->partner_vdev_list[pr_soc_be->mlo_chip_id][pr_pdev->pdev_id] =
  397. CDP_INVALID_VDEV_ID;
  398. dp_vdev_unref_delete(pr_soc, pr_vdev, DP_MOD_ID_RX);
  399. }
  400. }
  401. }
  402. static QDF_STATUS
  403. dp_clear_mlo_ptnr_list(struct cdp_soc_t *soc_hdl, uint8_t self_vdev_id)
  404. {
  405. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  406. struct dp_vdev *vdev;
  407. vdev = dp_vdev_get_ref_by_id(soc, self_vdev_id, DP_MOD_ID_RX);
  408. if (!vdev)
  409. return QDF_STATUS_E_FAILURE;
  410. dp_clr_mlo_ptnr_list(soc, vdev);
  411. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_RX);
  412. return QDF_STATUS_SUCCESS;
  413. }
  414. static void dp_mlo_setup_complete(struct cdp_mlo_ctxt *cdp_ml_ctxt)
  415. {
  416. struct dp_mlo_ctxt *mlo_ctxt = cdp_mlo_ctx_to_dp(cdp_ml_ctxt);
  417. int i;
  418. struct dp_soc *soc;
  419. struct dp_soc_be *be_soc;
  420. QDF_STATUS qdf_status;
  421. if (!cdp_ml_ctxt)
  422. return;
  423. for (i = 0; i < WLAN_MAX_MLO_CHIPS; i++) {
  424. soc = dp_mlo_get_soc_ref_by_chip_id(mlo_ctxt, i);
  425. if (!soc)
  426. continue;
  427. be_soc = dp_get_be_soc_from_dp_soc(soc);
  428. qdf_status = dp_partner_soc_rx_hw_cc_init(mlo_ctxt, be_soc);
  429. if (!QDF_IS_STATUS_SUCCESS(qdf_status)) {
  430. dp_alert("MLO partner SOC Rx desc CC init failed");
  431. qdf_assert_always(0);
  432. }
  433. }
  434. }
  435. static void dp_mlo_update_delta_tsf2(struct cdp_soc_t *soc_hdl,
  436. uint8_t pdev_id, uint64_t delta_tsf2)
  437. {
  438. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  439. struct dp_pdev *pdev;
  440. struct dp_pdev_be *be_pdev;
  441. pdev = dp_get_pdev_from_soc_pdev_id_wifi3((struct dp_soc *)soc,
  442. pdev_id);
  443. if (!pdev) {
  444. dp_err("pdev is NULL for pdev_id %u", pdev_id);
  445. return;
  446. }
  447. be_pdev = dp_get_be_pdev_from_dp_pdev(pdev);
  448. be_pdev->delta_tsf2 = delta_tsf2;
  449. }
  450. static void dp_mlo_update_delta_tqm(struct cdp_soc_t *soc_hdl,
  451. uint64_t delta_tqm)
  452. {
  453. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  454. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  455. be_soc->delta_tqm = delta_tqm;
  456. }
  457. static void dp_mlo_update_mlo_ts_offset(struct cdp_soc_t *soc_hdl,
  458. uint64_t offset)
  459. {
  460. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  461. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  462. be_soc->mlo_tstamp_offset = offset;
  463. }
  464. #ifdef CONFIG_MLO_SINGLE_DEV
  465. static void dp_mlo_aggregate_mld_vdev_stats(struct dp_vdev_be *be_vdev,
  466. struct dp_vdev *ptnr_vdev,
  467. void *arg)
  468. {
  469. struct cdp_vdev_stats *tgt_vdev_stats = (struct cdp_vdev_stats *)arg;
  470. struct cdp_vdev_stats *src_vdev_stats = &ptnr_vdev->stats;
  471. /* Aggregate vdev ingress stats */
  472. DP_UPDATE_INGRESS_STATS(tgt_vdev_stats, src_vdev_stats);
  473. /* Aggregate unmapped peers stats */
  474. DP_UPDATE_PER_PKT_STATS(tgt_vdev_stats, src_vdev_stats);
  475. DP_UPDATE_EXTD_STATS(tgt_vdev_stats, src_vdev_stats);
  476. /* Aggregate associated peers stats */
  477. dp_vdev_iterate_peer(ptnr_vdev, dp_update_vdev_stats, tgt_vdev_stats,
  478. DP_MOD_ID_GENERIC_STATS);
  479. }
  480. static QDF_STATUS dp_mlo_get_mld_vdev_stats(struct cdp_soc_t *soc_hdl,
  481. uint8_t vdev_id, void *buf)
  482. {
  483. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  484. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  485. struct cdp_vdev_stats *vdev_stats;
  486. struct dp_vdev *vdev = dp_vdev_get_ref_by_id(soc, vdev_id,
  487. DP_MOD_ID_GENERIC_STATS);
  488. struct dp_vdev_be *vdev_be = NULL;
  489. if (!vdev)
  490. return QDF_STATUS_E_FAILURE;
  491. vdev_be = dp_get_be_vdev_from_dp_vdev(vdev);
  492. if (!vdev_be) {
  493. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_GENERIC_STATS);
  494. return QDF_STATUS_E_FAILURE;
  495. }
  496. vdev_stats = (struct cdp_vdev_stats *)buf;
  497. dp_aggregate_vdev_stats(vdev, buf);
  498. /* Aggregate stats from partner vdevs */
  499. dp_mlo_iter_ptnr_vdev(be_soc, vdev_be,
  500. dp_mlo_aggregate_mld_vdev_stats, buf,
  501. DP_MOD_ID_GENERIC_STATS);
  502. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_GENERIC_STATS);
  503. return QDF_STATUS_SUCCESS;
  504. }
  505. #endif
  506. static struct cdp_mlo_ops dp_mlo_ops = {
  507. .mlo_soc_setup = dp_mlo_soc_setup,
  508. .mlo_soc_teardown = dp_mlo_soc_teardown,
  509. .update_mlo_ptnr_list = dp_update_mlo_ptnr_list,
  510. .clear_mlo_ptnr_list = dp_clear_mlo_ptnr_list,
  511. .mlo_setup_complete = dp_mlo_setup_complete,
  512. .mlo_update_delta_tsf2 = dp_mlo_update_delta_tsf2,
  513. .mlo_update_delta_tqm = dp_mlo_update_delta_tqm,
  514. .mlo_update_mlo_ts_offset = dp_mlo_update_mlo_ts_offset,
  515. .mlo_ctxt_attach = dp_mlo_ctxt_attach_wifi3,
  516. .mlo_ctxt_detach = dp_mlo_ctxt_detach_wifi3,
  517. #ifdef CONFIG_MLO_SINGLE_DEV
  518. .mlo_get_mld_vdev_stats = dp_mlo_get_mld_vdev_stats,
  519. #endif
  520. };
  521. void dp_soc_mlo_fill_params(struct dp_soc *soc,
  522. struct cdp_soc_attach_params *params)
  523. {
  524. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  525. if (!params->mlo_enabled) {
  526. dp_warn("MLO not enabled on SOC");
  527. return;
  528. }
  529. be_soc->mlo_chip_id = params->mlo_chip_id;
  530. be_soc->ml_ctxt = cdp_mlo_ctx_to_dp(params->ml_context);
  531. be_soc->mlo_enabled = 1;
  532. soc->cdp_soc.ops->mlo_ops = &dp_mlo_ops;
  533. }
  534. void dp_mlo_update_link_to_pdev_map(struct dp_soc *soc, struct dp_pdev *pdev)
  535. {
  536. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  537. struct dp_pdev_be *be_pdev = dp_get_be_pdev_from_dp_pdev(pdev);
  538. struct dp_mlo_ctxt *ml_ctxt = be_soc->ml_ctxt;
  539. uint8_t link_id;
  540. if (!be_soc->mlo_enabled)
  541. return;
  542. if (!ml_ctxt)
  543. return;
  544. link_id = be_pdev->mlo_link_id;
  545. if (link_id < WLAN_MAX_MLO_CHIPS * WLAN_MAX_MLO_LINKS_PER_SOC) {
  546. if (!ml_ctxt->link_to_pdev_map[link_id])
  547. ml_ctxt->link_to_pdev_map[link_id] = be_pdev;
  548. else
  549. dp_alert("Attempt to update existing map for link %u",
  550. link_id);
  551. }
  552. }
  553. void dp_mlo_update_link_to_pdev_unmap(struct dp_soc *soc, struct dp_pdev *pdev)
  554. {
  555. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  556. struct dp_pdev_be *be_pdev = dp_get_be_pdev_from_dp_pdev(pdev);
  557. struct dp_mlo_ctxt *ml_ctxt = be_soc->ml_ctxt;
  558. uint8_t link_id;
  559. if (!be_soc->mlo_enabled)
  560. return;
  561. if (!ml_ctxt)
  562. return;
  563. link_id = be_pdev->mlo_link_id;
  564. if (link_id < WLAN_MAX_MLO_CHIPS * WLAN_MAX_MLO_LINKS_PER_SOC)
  565. ml_ctxt->link_to_pdev_map[link_id] = NULL;
  566. }
  567. static struct dp_pdev_be *
  568. dp_mlo_get_be_pdev_from_link_id(struct dp_mlo_ctxt *ml_ctxt, uint8_t link_id)
  569. {
  570. if (link_id < WLAN_MAX_MLO_CHIPS * WLAN_MAX_MLO_LINKS_PER_SOC)
  571. return ml_ctxt->link_to_pdev_map[link_id];
  572. return NULL;
  573. }
  574. void dp_pdev_mlo_fill_params(struct dp_pdev *pdev,
  575. struct cdp_pdev_attach_params *params)
  576. {
  577. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(pdev->soc);
  578. struct dp_pdev_be *be_pdev = dp_get_be_pdev_from_dp_pdev(pdev);
  579. if (!be_soc->mlo_enabled) {
  580. dp_info("MLO not enabled on SOC");
  581. return;
  582. }
  583. be_pdev->mlo_link_id = params->mlo_link_id;
  584. }
  585. void dp_mlo_partner_chips_map(struct dp_soc *soc,
  586. struct dp_peer *peer,
  587. uint16_t peer_id)
  588. {
  589. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  590. struct dp_mlo_ctxt *mlo_ctxt = NULL;
  591. bool is_ml_peer_id =
  592. HTT_RX_PEER_META_DATA_V1_ML_PEER_VALID_GET(peer_id);
  593. uint8_t chip_id;
  594. struct dp_soc *temp_soc;
  595. /* for non ML peer dont map on partner chips*/
  596. if (!is_ml_peer_id)
  597. return;
  598. mlo_ctxt = be_soc->ml_ctxt;
  599. if (!mlo_ctxt)
  600. return;
  601. qdf_spin_lock_bh(&mlo_ctxt->ml_soc_list_lock);
  602. for (chip_id = 0; chip_id < DP_MAX_MLO_CHIPS; chip_id++) {
  603. temp_soc = mlo_ctxt->ml_soc_list[chip_id];
  604. if (!temp_soc)
  605. continue;
  606. /* skip if this is current soc */
  607. if (temp_soc == soc)
  608. continue;
  609. dp_peer_find_id_to_obj_add(temp_soc, peer, peer_id);
  610. }
  611. qdf_spin_unlock_bh(&mlo_ctxt->ml_soc_list_lock);
  612. }
  613. qdf_export_symbol(dp_mlo_partner_chips_map);
  614. void dp_mlo_partner_chips_unmap(struct dp_soc *soc,
  615. uint16_t peer_id)
  616. {
  617. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  618. struct dp_mlo_ctxt *mlo_ctxt = be_soc->ml_ctxt;
  619. bool is_ml_peer_id =
  620. HTT_RX_PEER_META_DATA_V1_ML_PEER_VALID_GET(peer_id);
  621. uint8_t chip_id;
  622. struct dp_soc *temp_soc;
  623. if (!is_ml_peer_id)
  624. return;
  625. if (!mlo_ctxt)
  626. return;
  627. qdf_spin_lock_bh(&mlo_ctxt->ml_soc_list_lock);
  628. for (chip_id = 0; chip_id < DP_MAX_MLO_CHIPS; chip_id++) {
  629. temp_soc = mlo_ctxt->ml_soc_list[chip_id];
  630. if (!temp_soc)
  631. continue;
  632. /* skip if this is current soc */
  633. if (temp_soc == soc)
  634. continue;
  635. dp_peer_find_id_to_obj_remove(temp_soc, peer_id);
  636. }
  637. qdf_spin_unlock_bh(&mlo_ctxt->ml_soc_list_lock);
  638. }
  639. qdf_export_symbol(dp_mlo_partner_chips_unmap);
  640. uint8_t dp_mlo_get_chip_id(struct dp_soc *soc)
  641. {
  642. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  643. return be_soc->mlo_chip_id;
  644. }
  645. qdf_export_symbol(dp_mlo_get_chip_id);
  646. struct dp_peer *
  647. dp_link_peer_hash_find_by_chip_id(struct dp_soc *soc,
  648. uint8_t *peer_mac_addr,
  649. int mac_addr_is_aligned,
  650. uint8_t vdev_id,
  651. uint8_t chip_id,
  652. enum dp_mod_id mod_id)
  653. {
  654. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  655. struct dp_mlo_ctxt *mlo_ctxt = be_soc->ml_ctxt;
  656. struct dp_soc *link_peer_soc = NULL;
  657. struct dp_peer *peer = NULL;
  658. if (!mlo_ctxt)
  659. return NULL;
  660. link_peer_soc = dp_mlo_get_soc_ref_by_chip_id(mlo_ctxt, chip_id);
  661. if (!link_peer_soc)
  662. return NULL;
  663. peer = dp_peer_find_hash_find(link_peer_soc, peer_mac_addr,
  664. mac_addr_is_aligned, vdev_id,
  665. mod_id);
  666. qdf_atomic_dec(&link_peer_soc->ref_count);
  667. return peer;
  668. }
  669. qdf_export_symbol(dp_link_peer_hash_find_by_chip_id);
  670. void dp_mlo_get_rx_hash_key(struct dp_soc *soc,
  671. struct cdp_lro_hash_config *lro_hash)
  672. {
  673. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  674. struct dp_mlo_ctxt *ml_ctxt = be_soc->ml_ctxt;
  675. if (!be_soc->mlo_enabled || !ml_ctxt)
  676. return dp_get_rx_hash_key_bytes(lro_hash);
  677. qdf_mem_copy(lro_hash->toeplitz_hash_ipv4, ml_ctxt->toeplitz_hash_ipv4,
  678. (sizeof(lro_hash->toeplitz_hash_ipv4[0]) *
  679. LRO_IPV4_SEED_ARR_SZ));
  680. qdf_mem_copy(lro_hash->toeplitz_hash_ipv6, ml_ctxt->toeplitz_hash_ipv6,
  681. (sizeof(lro_hash->toeplitz_hash_ipv6[0]) *
  682. LRO_IPV6_SEED_ARR_SZ));
  683. }
  684. struct dp_soc *
  685. dp_rx_replensih_soc_get(struct dp_soc *soc, uint8_t chip_id)
  686. {
  687. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  688. struct dp_mlo_ctxt *mlo_ctxt = be_soc->ml_ctxt;
  689. struct dp_soc *replenish_soc;
  690. if (!be_soc->mlo_enabled || !mlo_ctxt)
  691. return soc;
  692. if (be_soc->mlo_chip_id == chip_id)
  693. return soc;
  694. replenish_soc = dp_mlo_get_soc_ref_by_chip_id(mlo_ctxt, chip_id);
  695. if (qdf_unlikely(!replenish_soc)) {
  696. dp_alert("replenish SOC is NULL");
  697. qdf_assert_always(0);
  698. }
  699. return replenish_soc;
  700. }
  701. uint8_t dp_soc_get_num_soc_be(struct dp_soc *soc)
  702. {
  703. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  704. struct dp_mlo_ctxt *mlo_ctxt = be_soc->ml_ctxt;
  705. if (!be_soc->mlo_enabled || !mlo_ctxt)
  706. return 1;
  707. return mlo_ctxt->ml_soc_cnt;
  708. }
  709. struct dp_soc *
  710. dp_soc_get_by_idle_bm_id(struct dp_soc *soc, uint8_t idle_bm_id)
  711. {
  712. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  713. struct dp_mlo_ctxt *mlo_ctxt = be_soc->ml_ctxt;
  714. struct dp_soc *partner_soc = NULL;
  715. uint8_t chip_id;
  716. if (!be_soc->mlo_enabled || !mlo_ctxt)
  717. return soc;
  718. for (chip_id = 0; chip_id < WLAN_MAX_MLO_CHIPS; chip_id++) {
  719. partner_soc = dp_mlo_get_soc_ref_by_chip_id(mlo_ctxt, chip_id);
  720. if (!partner_soc)
  721. continue;
  722. if (partner_soc->idle_link_bm_id == idle_bm_id)
  723. return partner_soc;
  724. }
  725. return NULL;
  726. }
  727. #ifdef WLAN_MLO_MULTI_CHIP
  728. void dp_mlo_iter_ptnr_vdev(struct dp_soc_be *be_soc,
  729. struct dp_vdev_be *be_vdev,
  730. dp_ptnr_vdev_iter_func func,
  731. void *arg,
  732. enum dp_mod_id mod_id)
  733. {
  734. int i = 0;
  735. int j = 0;
  736. struct dp_mlo_ctxt *dp_mlo = be_soc->ml_ctxt;
  737. for (i = 0; i < WLAN_MAX_MLO_CHIPS ; i++) {
  738. struct dp_soc *ptnr_soc =
  739. dp_mlo_get_soc_ref_by_chip_id(dp_mlo, i);
  740. if (!ptnr_soc)
  741. continue;
  742. for (j = 0 ; j < WLAN_MAX_MLO_LINKS_PER_SOC ; j++) {
  743. struct dp_vdev *ptnr_vdev;
  744. ptnr_vdev = dp_vdev_get_ref_by_id(
  745. ptnr_soc,
  746. be_vdev->partner_vdev_list[i][j],
  747. mod_id);
  748. if (!ptnr_vdev)
  749. continue;
  750. (*func)(be_vdev, ptnr_vdev, arg);
  751. dp_vdev_unref_delete(ptnr_vdev->pdev->soc,
  752. ptnr_vdev,
  753. mod_id);
  754. }
  755. }
  756. }
  757. qdf_export_symbol(dp_mlo_iter_ptnr_vdev);
  758. #endif
  759. #ifdef WLAN_MCAST_MLO
  760. struct dp_vdev *dp_mlo_get_mcast_primary_vdev(struct dp_soc_be *be_soc,
  761. struct dp_vdev_be *be_vdev,
  762. enum dp_mod_id mod_id)
  763. {
  764. int i = 0;
  765. int j = 0;
  766. struct dp_mlo_ctxt *dp_mlo = be_soc->ml_ctxt;
  767. struct dp_vdev *vdev = (struct dp_vdev *)be_vdev;
  768. if (be_vdev->mcast_primary) {
  769. if (dp_vdev_get_ref((struct dp_soc *)be_soc, vdev, mod_id) !=
  770. QDF_STATUS_SUCCESS)
  771. return NULL;
  772. return vdev;
  773. }
  774. for (i = 0; i < WLAN_MAX_MLO_CHIPS ; i++) {
  775. struct dp_soc *ptnr_soc =
  776. dp_mlo_get_soc_ref_by_chip_id(dp_mlo, i);
  777. if (!ptnr_soc)
  778. continue;
  779. for (j = 0 ; j < WLAN_MAX_MLO_LINKS_PER_SOC ; j++) {
  780. struct dp_vdev *ptnr_vdev = NULL;
  781. struct dp_vdev_be *be_ptnr_vdev = NULL;
  782. ptnr_vdev = dp_vdev_get_ref_by_id(
  783. ptnr_soc,
  784. be_vdev->partner_vdev_list[i][j],
  785. mod_id);
  786. if (!ptnr_vdev)
  787. continue;
  788. be_ptnr_vdev = dp_get_be_vdev_from_dp_vdev(ptnr_vdev);
  789. if (be_ptnr_vdev->mcast_primary)
  790. return ptnr_vdev;
  791. dp_vdev_unref_delete(be_ptnr_vdev->vdev.pdev->soc,
  792. &be_ptnr_vdev->vdev,
  793. mod_id);
  794. }
  795. }
  796. return NULL;
  797. }
  798. qdf_export_symbol(dp_mlo_get_mcast_primary_vdev);
  799. #endif
  800. /**
  801. * dp_mlo_iter_ptnr_soc() - iterate through mlo soc list and call the callback
  802. * @be_soc: dp_soc_be pointer
  803. * @func: Function to be called for each soc
  804. * @arg: context to be passed to the callback
  805. *
  806. * Return: true if mlo is enabled, false if mlo is disabled
  807. */
  808. bool dp_mlo_iter_ptnr_soc(struct dp_soc_be *be_soc, dp_ptnr_soc_iter_func func,
  809. void *arg)
  810. {
  811. int i = 0;
  812. struct dp_mlo_ctxt *dp_mlo = be_soc->ml_ctxt;
  813. if (!be_soc->mlo_enabled || !be_soc->ml_ctxt)
  814. return false;
  815. for (i = 0; i < WLAN_MAX_MLO_CHIPS ; i++) {
  816. struct dp_soc *ptnr_soc =
  817. dp_mlo_get_soc_ref_by_chip_id(dp_mlo, i);
  818. if (!ptnr_soc)
  819. continue;
  820. (*func)(ptnr_soc, arg, i);
  821. }
  822. return true;
  823. }
  824. qdf_export_symbol(dp_mlo_iter_ptnr_soc);
  825. static inline uint64_t dp_mlo_get_mlo_ts_offset(struct dp_pdev_be *be_pdev)
  826. {
  827. struct dp_soc *soc;
  828. struct dp_pdev *pdev;
  829. struct dp_soc_be *be_soc;
  830. uint32_t mlo_offset;
  831. pdev = &be_pdev->pdev;
  832. soc = pdev->soc;
  833. be_soc = dp_get_be_soc_from_dp_soc(soc);
  834. mlo_offset = be_soc->mlo_tstamp_offset;
  835. return mlo_offset;
  836. }
  837. int32_t dp_mlo_get_delta_tsf2_wrt_mlo_offset(struct dp_soc *soc,
  838. uint8_t hw_link_id)
  839. {
  840. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  841. struct dp_mlo_ctxt *ml_ctxt = be_soc->ml_ctxt;
  842. struct dp_pdev_be *be_pdev;
  843. int32_t delta_tsf2_mlo_offset;
  844. int32_t mlo_offset, delta_tsf2;
  845. if (!ml_ctxt)
  846. return 0;
  847. be_pdev = dp_mlo_get_be_pdev_from_link_id(ml_ctxt, hw_link_id);
  848. if (!be_pdev)
  849. return 0;
  850. mlo_offset = dp_mlo_get_mlo_ts_offset(be_pdev);
  851. delta_tsf2 = be_pdev->delta_tsf2;
  852. delta_tsf2_mlo_offset = mlo_offset - delta_tsf2;
  853. return delta_tsf2_mlo_offset;
  854. }
  855. int32_t dp_mlo_get_delta_tqm_wrt_mlo_offset(struct dp_soc *soc)
  856. {
  857. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  858. int32_t delta_tqm_mlo_offset;
  859. int32_t mlo_offset, delta_tqm;
  860. mlo_offset = be_soc->mlo_tstamp_offset;
  861. delta_tqm = be_soc->delta_tqm;
  862. delta_tqm_mlo_offset = mlo_offset - delta_tqm;
  863. return delta_tqm_mlo_offset;
  864. }
  865. #ifdef DP_UMAC_HW_RESET_SUPPORT
  866. /**
  867. * dp_umac_reset_update_partner_map() - Update Umac reset partner map
  868. * @mlo_ctx: DP ML context handle
  869. * @chip_id: chip id
  870. * @set: flag indicating whether to set or clear the bit
  871. *
  872. * Return: void
  873. */
  874. static void dp_umac_reset_update_partner_map(struct dp_mlo_ctxt *mlo_ctx,
  875. int chip_id, bool set)
  876. {
  877. struct dp_soc_mlo_umac_reset_ctx *grp_umac_reset_ctx =
  878. &mlo_ctx->grp_umac_reset_ctx;
  879. if (set)
  880. qdf_atomic_set_bit(chip_id, &grp_umac_reset_ctx->partner_map);
  881. else
  882. qdf_atomic_clear_bit(chip_id, &grp_umac_reset_ctx->partner_map);
  883. }
  884. QDF_STATUS dp_umac_reset_notify_asserted_soc(struct dp_soc *soc)
  885. {
  886. struct dp_mlo_ctxt *mlo_ctx;
  887. struct dp_soc_be *be_soc;
  888. be_soc = dp_get_be_soc_from_dp_soc(soc);
  889. if (!be_soc) {
  890. dp_umac_reset_err("null be_soc");
  891. return QDF_STATUS_E_NULL_VALUE;
  892. }
  893. mlo_ctx = be_soc->ml_ctxt;
  894. if (!mlo_ctx) {
  895. /* This API can be called for non-MLO SOC as well. Hence, return
  896. * the status as success when mlo_ctx is NULL.
  897. */
  898. return QDF_STATUS_SUCCESS;
  899. }
  900. dp_umac_reset_update_partner_map(mlo_ctx, be_soc->mlo_chip_id, false);
  901. return QDF_STATUS_SUCCESS;
  902. }
  903. /**
  904. * dp_umac_reset_complete_umac_recovery() - Complete Umac reset session
  905. * @soc: dp soc handle
  906. *
  907. * Return: void
  908. */
  909. void dp_umac_reset_complete_umac_recovery(struct dp_soc *soc)
  910. {
  911. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  912. struct dp_mlo_ctxt *mlo_ctx = be_soc->ml_ctxt;
  913. struct dp_soc_mlo_umac_reset_ctx *grp_umac_reset_ctx;
  914. if (!mlo_ctx) {
  915. dp_umac_reset_alert("Umac reset was handled on soc %pK", soc);
  916. return;
  917. }
  918. grp_umac_reset_ctx = &mlo_ctx->grp_umac_reset_ctx;
  919. qdf_spin_lock_bh(&grp_umac_reset_ctx->grp_ctx_lock);
  920. grp_umac_reset_ctx->umac_reset_in_progress = false;
  921. grp_umac_reset_ctx->is_target_recovery = false;
  922. grp_umac_reset_ctx->response_map = 0;
  923. grp_umac_reset_ctx->request_map = 0;
  924. grp_umac_reset_ctx->initiator_chip_id = 0;
  925. qdf_spin_unlock_bh(&grp_umac_reset_ctx->grp_ctx_lock);
  926. dp_umac_reset_alert("Umac reset was handled on mlo group ctxt %pK",
  927. mlo_ctx);
  928. }
  929. /**
  930. * dp_umac_reset_initiate_umac_recovery() - Initiate Umac reset session
  931. * @soc: dp soc handle
  932. * @is_target_recovery: Flag to indicate if it is triggered for target recovery
  933. *
  934. * Return: void
  935. */
  936. void dp_umac_reset_initiate_umac_recovery(struct dp_soc *soc,
  937. bool is_target_recovery)
  938. {
  939. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  940. struct dp_mlo_ctxt *mlo_ctx = be_soc->ml_ctxt;
  941. struct dp_soc_mlo_umac_reset_ctx *grp_umac_reset_ctx;
  942. if (!mlo_ctx)
  943. return;
  944. grp_umac_reset_ctx = &mlo_ctx->grp_umac_reset_ctx;
  945. qdf_spin_lock_bh(&grp_umac_reset_ctx->grp_ctx_lock);
  946. if (grp_umac_reset_ctx->umac_reset_in_progress) {
  947. qdf_spin_unlock_bh(&grp_umac_reset_ctx->grp_ctx_lock);
  948. return;
  949. }
  950. grp_umac_reset_ctx->umac_reset_in_progress = true;
  951. grp_umac_reset_ctx->is_target_recovery = is_target_recovery;
  952. /* We don't wait for the 'Umac trigger' message from all socs */
  953. grp_umac_reset_ctx->request_map = grp_umac_reset_ctx->partner_map;
  954. grp_umac_reset_ctx->response_map = grp_umac_reset_ctx->partner_map;
  955. grp_umac_reset_ctx->initiator_chip_id = dp_mlo_get_chip_id(soc);
  956. grp_umac_reset_ctx->umac_reset_count++;
  957. qdf_spin_unlock_bh(&grp_umac_reset_ctx->grp_ctx_lock);
  958. }
  959. /**
  960. * dp_umac_reset_handle_action_cb() - Function to call action callback
  961. * @soc: dp soc handle
  962. * @umac_reset_ctx: Umac reset context
  963. * @action: Action to call the callback for
  964. *
  965. * Return: QDF_STATUS status
  966. */
  967. QDF_STATUS
  968. dp_umac_reset_handle_action_cb(struct dp_soc *soc,
  969. struct dp_soc_umac_reset_ctx *umac_reset_ctx,
  970. enum umac_reset_action action)
  971. {
  972. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  973. struct dp_mlo_ctxt *mlo_ctx = be_soc->ml_ctxt;
  974. struct dp_soc_mlo_umac_reset_ctx *grp_umac_reset_ctx;
  975. if (!mlo_ctx) {
  976. dp_umac_reset_debug("MLO context is Null");
  977. goto handle;
  978. }
  979. grp_umac_reset_ctx = &mlo_ctx->grp_umac_reset_ctx;
  980. qdf_spin_lock_bh(&grp_umac_reset_ctx->grp_ctx_lock);
  981. qdf_atomic_set_bit(dp_mlo_get_chip_id(soc),
  982. &grp_umac_reset_ctx->request_map);
  983. dp_umac_reset_debug("partner_map %u request_map %u",
  984. grp_umac_reset_ctx->partner_map,
  985. grp_umac_reset_ctx->request_map);
  986. /* This logic is needed for synchronization between mlo socs */
  987. if ((grp_umac_reset_ctx->partner_map & grp_umac_reset_ctx->request_map)
  988. != grp_umac_reset_ctx->partner_map) {
  989. struct hif_softc *hif_sc = HIF_GET_SOFTC(soc->hif_handle);
  990. struct hif_umac_reset_ctx *hif_umac_reset_ctx;
  991. if (!hif_sc) {
  992. hif_err("scn is null");
  993. qdf_assert_always(0);
  994. return QDF_STATUS_E_FAILURE;
  995. }
  996. hif_umac_reset_ctx = &hif_sc->umac_reset_ctx;
  997. /* Mark the action as pending */
  998. umac_reset_ctx->pending_action = action;
  999. /* Reschedule the tasklet and exit */
  1000. tasklet_hi_schedule(&hif_umac_reset_ctx->intr_tq);
  1001. qdf_spin_unlock_bh(&grp_umac_reset_ctx->grp_ctx_lock);
  1002. return QDF_STATUS_SUCCESS;
  1003. }
  1004. qdf_spin_unlock_bh(&grp_umac_reset_ctx->grp_ctx_lock);
  1005. umac_reset_ctx->pending_action = UMAC_RESET_ACTION_NONE;
  1006. handle:
  1007. if (!umac_reset_ctx->rx_actions.cb[action]) {
  1008. dp_umac_reset_err("rx callback is NULL");
  1009. return QDF_STATUS_E_FAILURE;
  1010. }
  1011. return umac_reset_ctx->rx_actions.cb[action](soc);
  1012. }
  1013. /**
  1014. * dp_umac_reset_post_tx_cmd() - Iterate partner socs and post Tx command
  1015. * @umac_reset_ctx: UMAC reset context
  1016. * @tx_cmd: Tx command to be posted
  1017. *
  1018. * Return: QDF status of operation
  1019. */
  1020. QDF_STATUS
  1021. dp_umac_reset_post_tx_cmd(struct dp_soc_umac_reset_ctx *umac_reset_ctx,
  1022. enum umac_reset_tx_cmd tx_cmd)
  1023. {
  1024. struct dp_soc *soc = container_of(umac_reset_ctx, struct dp_soc,
  1025. umac_reset_ctx);
  1026. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1027. struct dp_mlo_ctxt *mlo_ctx = be_soc->ml_ctxt;
  1028. struct dp_soc_mlo_umac_reset_ctx *grp_umac_reset_ctx;
  1029. if (!mlo_ctx) {
  1030. dp_umac_reset_post_tx_cmd_via_shmem(soc, &tx_cmd, 0);
  1031. return QDF_STATUS_SUCCESS;
  1032. }
  1033. grp_umac_reset_ctx = &mlo_ctx->grp_umac_reset_ctx;
  1034. qdf_spin_lock_bh(&grp_umac_reset_ctx->grp_ctx_lock);
  1035. qdf_atomic_set_bit(dp_mlo_get_chip_id(soc),
  1036. &grp_umac_reset_ctx->response_map);
  1037. /* This logic is needed for synchronization between mlo socs */
  1038. if ((grp_umac_reset_ctx->partner_map & grp_umac_reset_ctx->response_map)
  1039. != grp_umac_reset_ctx->partner_map) {
  1040. dp_umac_reset_debug(
  1041. "Response(s) pending : expected map %u current map %u",
  1042. grp_umac_reset_ctx->partner_map,
  1043. grp_umac_reset_ctx->response_map);
  1044. qdf_spin_unlock_bh(&grp_umac_reset_ctx->grp_ctx_lock);
  1045. return QDF_STATUS_SUCCESS;
  1046. }
  1047. dp_umac_reset_debug(
  1048. "All responses received: expected map %u current map %u",
  1049. grp_umac_reset_ctx->partner_map,
  1050. grp_umac_reset_ctx->response_map);
  1051. grp_umac_reset_ctx->response_map = 0;
  1052. grp_umac_reset_ctx->request_map = 0;
  1053. qdf_spin_unlock_bh(&grp_umac_reset_ctx->grp_ctx_lock);
  1054. dp_mlo_iter_ptnr_soc(be_soc, &dp_umac_reset_post_tx_cmd_via_shmem,
  1055. &tx_cmd);
  1056. if (tx_cmd == UMAC_RESET_TX_CMD_POST_RESET_COMPLETE_DONE)
  1057. dp_umac_reset_complete_umac_recovery(soc);
  1058. return QDF_STATUS_SUCCESS;
  1059. }
  1060. /**
  1061. * dp_umac_reset_initiator_check() - Check if soc is the Umac reset initiator
  1062. * @soc: dp soc handle
  1063. *
  1064. * Return: true if the soc is initiator or false otherwise
  1065. */
  1066. bool dp_umac_reset_initiator_check(struct dp_soc *soc)
  1067. {
  1068. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1069. struct dp_mlo_ctxt *mlo_ctx = be_soc->ml_ctxt;
  1070. if (!mlo_ctx)
  1071. return true;
  1072. return (mlo_ctx->grp_umac_reset_ctx.initiator_chip_id ==
  1073. dp_mlo_get_chip_id(soc));
  1074. }
  1075. /**
  1076. * dp_umac_reset_target_recovery_check() - Check if this is for target recovery
  1077. * @soc: dp soc handle
  1078. *
  1079. * Return: true if the session is for target recovery or false otherwise
  1080. */
  1081. bool dp_umac_reset_target_recovery_check(struct dp_soc *soc)
  1082. {
  1083. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1084. struct dp_mlo_ctxt *mlo_ctx = be_soc->ml_ctxt;
  1085. if (!mlo_ctx)
  1086. return false;
  1087. return mlo_ctx->grp_umac_reset_ctx.is_target_recovery;
  1088. }
  1089. /**
  1090. * dp_umac_reset_is_soc_ignored() - Check if this soc is to be ignored
  1091. * @soc: dp soc handle
  1092. *
  1093. * Return: true if the soc is ignored or false otherwise
  1094. */
  1095. bool dp_umac_reset_is_soc_ignored(struct dp_soc *soc)
  1096. {
  1097. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1098. struct dp_mlo_ctxt *mlo_ctx = be_soc->ml_ctxt;
  1099. if (!mlo_ctx)
  1100. return false;
  1101. return !qdf_atomic_test_bit(dp_mlo_get_chip_id(soc),
  1102. &mlo_ctx->grp_umac_reset_ctx.partner_map);
  1103. }
  1104. QDF_STATUS dp_mlo_umac_reset_stats_print(struct dp_soc *soc)
  1105. {
  1106. struct dp_mlo_ctxt *mlo_ctx;
  1107. struct dp_soc_be *be_soc;
  1108. struct dp_soc_mlo_umac_reset_ctx *grp_umac_reset_ctx;
  1109. be_soc = dp_get_be_soc_from_dp_soc(soc);
  1110. if (!be_soc) {
  1111. dp_umac_reset_err("null be_soc");
  1112. return QDF_STATUS_E_NULL_VALUE;
  1113. }
  1114. mlo_ctx = be_soc->ml_ctxt;
  1115. if (!mlo_ctx) {
  1116. /* This API can be called for non-MLO SOC as well. Hence, return
  1117. * the status as success when mlo_ctx is NULL.
  1118. */
  1119. return QDF_STATUS_SUCCESS;
  1120. }
  1121. grp_umac_reset_ctx = &mlo_ctx->grp_umac_reset_ctx;
  1122. DP_UMAC_RESET_PRINT_STATS("MLO UMAC RESET stats\n"
  1123. "\t\tPartner map :%x\n"
  1124. "\t\tRequest map :%x\n"
  1125. "\t\tResponse map :%x\n"
  1126. "\t\tIs target recovery :%d\n"
  1127. "\t\tIs Umac reset inprogress :%d\n"
  1128. "\t\tNumber of UMAC reset triggered:%d\n"
  1129. "\t\tInitiator chip ID :%d\n",
  1130. grp_umac_reset_ctx->partner_map,
  1131. grp_umac_reset_ctx->request_map,
  1132. grp_umac_reset_ctx->response_map,
  1133. grp_umac_reset_ctx->is_target_recovery,
  1134. grp_umac_reset_ctx->umac_reset_in_progress,
  1135. grp_umac_reset_ctx->umac_reset_count,
  1136. grp_umac_reset_ctx->initiator_chip_id);
  1137. return QDF_STATUS_SUCCESS;
  1138. }
  1139. #endif