dp_tx.h 55 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #ifndef __DP_TX_H
  20. #define __DP_TX_H
  21. #include <qdf_types.h>
  22. #include <qdf_nbuf.h>
  23. #include "dp_types.h"
  24. #ifdef FEATURE_PERPKT_INFO
  25. #if defined(QCA_SUPPORT_LATENCY_CAPTURE) || \
  26. defined(QCA_TX_CAPTURE_SUPPORT) || \
  27. defined(QCA_MCOPY_SUPPORT)
  28. #include "if_meta_hdr.h"
  29. #endif
  30. #endif
  31. #include "dp_internal.h"
  32. #include "hal_tx.h"
  33. #include <qdf_tracepoint.h>
  34. #ifdef CONFIG_SAWF
  35. #include "dp_sawf.h"
  36. #endif
  37. #include <qdf_pkt_add_timestamp.h>
  38. #include "dp_ipa.h"
  39. #define DP_INVALID_VDEV_ID 0xFF
  40. #define DP_TX_MAX_NUM_FRAGS 6
  41. /* invalid peer id for reinject*/
  42. #define DP_INVALID_PEER 0XFFFE
  43. void dp_tx_nawds_handler(struct dp_soc *soc, struct dp_vdev *vdev,
  44. struct dp_tx_msdu_info_s *msdu_info,
  45. qdf_nbuf_t nbuf, uint16_t sa_peer_id);
  46. int dp_tx_proxy_arp(struct dp_vdev *vdev, qdf_nbuf_t nbuf);
  47. /*
  48. * DP_TX_DESC_FLAG_FRAG flags should always be defined to 0x1
  49. * please do not change this flag's definition
  50. */
  51. #define DP_TX_DESC_FLAG_FRAG 0x1
  52. #define DP_TX_DESC_FLAG_TO_FW 0x2
  53. #define DP_TX_DESC_FLAG_SIMPLE 0x4
  54. #define DP_TX_DESC_FLAG_RAW 0x8
  55. #define DP_TX_DESC_FLAG_MESH 0x10
  56. #define DP_TX_DESC_FLAG_QUEUED_TX 0x20
  57. #define DP_TX_DESC_FLAG_COMPLETED_TX 0x40
  58. #define DP_TX_DESC_FLAG_ME 0x80
  59. #define DP_TX_DESC_FLAG_TDLS_FRAME 0x100
  60. #define DP_TX_DESC_FLAG_ALLOCATED 0x200
  61. #define DP_TX_DESC_FLAG_MESH_MODE 0x400
  62. #define DP_TX_DESC_FLAG_UNMAP_DONE 0x800
  63. #define DP_TX_DESC_FLAG_TX_COMP_ERR 0x1000
  64. #define DP_TX_DESC_FLAG_FLUSH 0x2000
  65. #define DP_TX_DESC_FLAG_TRAFFIC_END_IND 0x4000
  66. #define DP_TX_DESC_FLAG_RMNET 0x8000
  67. /*
  68. * Since the Tx descriptor flag is of only 16-bit and no more bit is free for
  69. * any new flag, therefore for time being overloading PPEDS flag with that of
  70. * FLUSH flag and FLAG_FAST with TDLS which is not enabled for WIN.
  71. */
  72. #define DP_TX_DESC_FLAG_PPEDS 0x2000
  73. #define DP_TX_DESC_FLAG_FAST 0x100
  74. #define DP_TX_EXT_DESC_FLAG_METADATA_VALID 0x1
  75. #define DP_TX_FREE_SINGLE_BUF(soc, buf) \
  76. do { \
  77. qdf_nbuf_unmap(soc->osdev, buf, QDF_DMA_TO_DEVICE); \
  78. qdf_nbuf_free(buf); \
  79. } while (0)
  80. #define OCB_HEADER_VERSION 1
  81. #ifdef TX_PER_PDEV_DESC_POOL
  82. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  83. #define DP_TX_GET_DESC_POOL_ID(vdev) (vdev->vdev_id)
  84. #else /* QCA_LL_TX_FLOW_CONTROL_V2 */
  85. #define DP_TX_GET_DESC_POOL_ID(vdev) (vdev->pdev->pdev_id)
  86. #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
  87. #define DP_TX_GET_RING_ID(vdev) (vdev->pdev->pdev_id)
  88. #else
  89. #ifdef TX_PER_VDEV_DESC_POOL
  90. #define DP_TX_GET_DESC_POOL_ID(vdev) (vdev->vdev_id)
  91. #define DP_TX_GET_RING_ID(vdev) (vdev->pdev->pdev_id)
  92. #endif /* TX_PER_VDEV_DESC_POOL */
  93. #endif /* TX_PER_PDEV_DESC_POOL */
  94. #define DP_TX_QUEUE_MASK 0x3
  95. #define MAX_CDP_SEC_TYPE 12
  96. /* number of dwords for htt_tx_msdu_desc_ext2_t */
  97. #define DP_TX_MSDU_INFO_META_DATA_DWORDS 7
  98. #define dp_tx_alert(params...) QDF_TRACE_FATAL(QDF_MODULE_ID_DP_TX, params)
  99. #define dp_tx_err(params...) QDF_TRACE_ERROR(QDF_MODULE_ID_DP_TX, params)
  100. #define dp_tx_err_rl(params...) QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP_TX, params)
  101. #define dp_tx_warn(params...) QDF_TRACE_WARN(QDF_MODULE_ID_DP_TX, params)
  102. #define dp_tx_info(params...) \
  103. __QDF_TRACE_FL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_TX, ## params)
  104. #define dp_tx_debug(params...) QDF_TRACE_DEBUG(QDF_MODULE_ID_DP_TX, params)
  105. #define dp_tx_comp_alert(params...) QDF_TRACE_FATAL(QDF_MODULE_ID_DP_TX_COMP, params)
  106. #define dp_tx_comp_err(params...) QDF_TRACE_ERROR(QDF_MODULE_ID_DP_TX_COMP, params)
  107. #define dp_tx_comp_warn(params...) QDF_TRACE_WARN(QDF_MODULE_ID_DP_TX_COMP, params)
  108. #define dp_tx_comp_info(params...) \
  109. __QDF_TRACE_FL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_TX_COMP, ## params)
  110. #define dp_tx_comp_info_rl(params...) \
  111. __QDF_TRACE_RL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_TX_COMP, ## params)
  112. #define dp_tx_comp_debug(params...) QDF_TRACE_DEBUG(QDF_MODULE_ID_DP_TX_COMP, params)
  113. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  114. /**
  115. * struct dp_tx_frag_info_s
  116. * @vaddr: hlos virtual address for buffer
  117. * @paddr_lo: physical address lower 32bits
  118. * @paddr_hi: physical address higher bits
  119. * @len: length of the buffer
  120. */
  121. struct dp_tx_frag_info_s {
  122. uint8_t *vaddr;
  123. uint32_t paddr_lo;
  124. uint16_t paddr_hi;
  125. uint16_t len;
  126. };
  127. /**
  128. * struct dp_tx_seg_info_s - Segmentation Descriptor
  129. * @nbuf: NBUF pointer if segment corresponds to separate nbuf
  130. * @frag_cnt: Fragment count in this segment
  131. * @total_len: Total length of segment
  132. * @frags: per-Fragment information
  133. * @next: pointer to next MSDU segment
  134. */
  135. struct dp_tx_seg_info_s {
  136. qdf_nbuf_t nbuf;
  137. uint16_t frag_cnt;
  138. uint16_t total_len;
  139. struct dp_tx_frag_info_s frags[DP_TX_MAX_NUM_FRAGS];
  140. struct dp_tx_seg_info_s *next;
  141. };
  142. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  143. /**
  144. * struct dp_tx_sg_info_s - Scatter Gather Descriptor
  145. * @num_segs: Number of segments (TSO/ME) in the frame
  146. * @total_len: Total length of the frame
  147. * @curr_seg: Points to current segment descriptor to be processed. Chain of
  148. * descriptors for SG frames/multicast-unicast converted packets.
  149. *
  150. * Used for SG (802.3 or Raw) frames and Multicast-Unicast converted frames to
  151. * carry fragmentation information
  152. * Raw Frames will be handed over to driver as an SKB chain with MPDU boundaries
  153. * indicated through flags in SKB CB (first_msdu and last_msdu). This will be
  154. * converted into set of skb sg (nr_frags) structures.
  155. */
  156. struct dp_tx_sg_info_s {
  157. uint32_t num_segs;
  158. uint32_t total_len;
  159. struct dp_tx_seg_info_s *curr_seg;
  160. };
  161. /**
  162. * struct dp_tx_queue - Tx queue
  163. * @desc_pool_id: Descriptor Pool to be used for the tx queue
  164. * @ring_id: TCL descriptor ring ID corresponding to the tx queue
  165. *
  166. * Tx queue contains information of the software (Descriptor pool)
  167. * and hardware resources (TCL ring id) to be used for a particular
  168. * transmit queue (obtained from skb_queue_mapping in case of linux)
  169. */
  170. struct dp_tx_queue {
  171. uint8_t desc_pool_id;
  172. uint8_t ring_id;
  173. };
  174. /**
  175. * struct dp_tx_msdu_info_s - MSDU Descriptor
  176. * @frm_type: Frame type - Regular/TSO/SG/Multicast enhancement
  177. * @tx_queue: Tx queue on which this MSDU should be transmitted
  178. * @num_seg: Number of segments (TSO)
  179. * @tid: TID (override) that is sent from HLOS
  180. * @exception_fw: Duplicate frame to be sent to firmware
  181. * @is_tx_sniffer: Indicates if the packet has to be sniffed
  182. * @u: union of frame information structs
  183. * @u.tso_info: TSO information for TSO frame types
  184. * (chain of the TSO segments, number of segments)
  185. * @u.sg_info: Scatter Gather information for non-TSO SG frames
  186. * @meta_data: Mesh meta header information
  187. * @ppdu_cookie: 16-bit ppdu_cookie that has to be replayed back in completions
  188. * @gsn: global sequence for reinjected mcast packets
  189. * @vdev_id : vdev_id for reinjected mcast packets
  190. * @skip_hp_update : Skip HP update for TSO segments and update in last segment
  191. * @buf_len:
  192. * @payload_addr:
  193. *
  194. * This structure holds the complete MSDU information needed to program the
  195. * Hardware TCL and MSDU extension descriptors for different frame types
  196. *
  197. */
  198. struct dp_tx_msdu_info_s {
  199. enum dp_tx_frm_type frm_type;
  200. struct dp_tx_queue tx_queue;
  201. uint32_t num_seg;
  202. uint8_t tid;
  203. uint8_t exception_fw;
  204. uint8_t is_tx_sniffer;
  205. union {
  206. struct qdf_tso_info_t tso_info;
  207. struct dp_tx_sg_info_s sg_info;
  208. } u;
  209. uint32_t meta_data[DP_TX_MSDU_INFO_META_DATA_DWORDS];
  210. uint16_t ppdu_cookie;
  211. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP)
  212. #ifdef WLAN_MCAST_MLO
  213. uint16_t gsn;
  214. uint8_t vdev_id;
  215. #endif
  216. #endif
  217. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  218. uint8_t skip_hp_update;
  219. #endif
  220. #ifdef QCA_DP_TX_RMNET_OPTIMIZATION
  221. uint16_t buf_len;
  222. uint8_t *payload_addr;
  223. #endif
  224. };
  225. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  226. /**
  227. * dp_tx_deinit_pair_by_index() - Deinit TX rings based on index
  228. * @soc: core txrx context
  229. * @index: index of ring to deinit
  230. *
  231. * Deinit 1 TCL and 1 WBM2SW release ring on as needed basis using
  232. * index of the respective TCL/WBM2SW release in soc structure.
  233. * For example, if the index is 2 then &soc->tcl_data_ring[2]
  234. * and &soc->tx_comp_ring[2] will be deinitialized.
  235. *
  236. * Return: none
  237. */
  238. void dp_tx_deinit_pair_by_index(struct dp_soc *soc, int index);
  239. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  240. /**
  241. * dp_tx_comp_process_desc_list() - Tx complete software descriptor handler
  242. * @soc: core txrx main context
  243. * @comp_head: software descriptor head pointer
  244. * @ring_id: ring number
  245. *
  246. * This function will process batch of descriptors reaped by dp_tx_comp_handler
  247. * and release the software descriptors after processing is complete
  248. *
  249. * Return: none
  250. */
  251. void
  252. dp_tx_comp_process_desc_list(struct dp_soc *soc,
  253. struct dp_tx_desc_s *comp_head, uint8_t ring_id);
  254. /**
  255. * dp_tx_comp_free_buf() - Free nbuf associated with the Tx Descriptor
  256. * @soc: Soc handle
  257. * @desc: software Tx descriptor to be processed
  258. * @delayed_free: defer freeing of nbuf
  259. *
  260. * Return: nbuf to be freed later
  261. */
  262. qdf_nbuf_t dp_tx_comp_free_buf(struct dp_soc *soc, struct dp_tx_desc_s *desc,
  263. bool delayed_free);
  264. /**
  265. * dp_tx_desc_release() - Release Tx Descriptor
  266. * @soc: Soc handle
  267. * @tx_desc: Tx Descriptor
  268. * @desc_pool_id: Descriptor Pool ID
  269. *
  270. * Deallocate all resources attached to Tx descriptor and free the Tx
  271. * descriptor.
  272. *
  273. * Return:
  274. */
  275. void dp_tx_desc_release(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc,
  276. uint8_t desc_pool_id);
  277. /**
  278. * dp_tx_compute_delay() - Compute and fill in all timestamps
  279. * to pass in correct fields
  280. * @vdev: pdev handle
  281. * @tx_desc: tx descriptor
  282. * @tid: tid value
  283. * @ring_id: TCL or WBM ring number for transmit path
  284. *
  285. * Return: none
  286. */
  287. void dp_tx_compute_delay(struct dp_vdev *vdev, struct dp_tx_desc_s *tx_desc,
  288. uint8_t tid, uint8_t ring_id);
  289. /**
  290. * dp_tx_comp_process_tx_status() - Parse and Dump Tx completion status info
  291. * @soc: DP soc handle
  292. * @tx_desc: software descriptor head pointer
  293. * @ts: Tx completion status
  294. * @txrx_peer: txrx peer handle
  295. * @ring_id: ring number
  296. *
  297. * Return: none
  298. */
  299. void dp_tx_comp_process_tx_status(struct dp_soc *soc,
  300. struct dp_tx_desc_s *tx_desc,
  301. struct hal_tx_completion_status *ts,
  302. struct dp_txrx_peer *txrx_peer,
  303. uint8_t ring_id);
  304. /**
  305. * dp_tx_comp_process_desc() - Process tx descriptor and free associated nbuf
  306. * @soc: DP Soc handle
  307. * @desc: software Tx descriptor
  308. * @ts: Tx completion status from HAL/HTT descriptor
  309. * @txrx_peer: DP peer context
  310. *
  311. * Return: none
  312. */
  313. void dp_tx_comp_process_desc(struct dp_soc *soc,
  314. struct dp_tx_desc_s *desc,
  315. struct hal_tx_completion_status *ts,
  316. struct dp_txrx_peer *txrx_peer);
  317. /**
  318. * dp_tx_reinject_handler() - Tx Reinject Handler
  319. * @soc: datapath soc handle
  320. * @vdev: datapath vdev handle
  321. * @tx_desc: software descriptor head pointer
  322. * @status: Tx completion status from HTT descriptor
  323. * @reinject_reason: reinject reason from HTT descriptor
  324. *
  325. * This function reinjects frames back to Target.
  326. * Todo - Host queue needs to be added
  327. *
  328. * Return: none
  329. */
  330. void dp_tx_reinject_handler(struct dp_soc *soc,
  331. struct dp_vdev *vdev,
  332. struct dp_tx_desc_s *tx_desc,
  333. uint8_t *status,
  334. uint8_t reinject_reason);
  335. /**
  336. * dp_tx_inspect_handler() - Tx Inspect Handler
  337. * @soc: datapath soc handle
  338. * @vdev: datapath vdev handle
  339. * @tx_desc: software descriptor head pointer
  340. * @status: Tx completion status from HTT descriptor
  341. *
  342. * Handles Tx frames sent back to Host for inspection
  343. * (ProxyARP)
  344. *
  345. * Return: none
  346. */
  347. void dp_tx_inspect_handler(struct dp_soc *soc,
  348. struct dp_vdev *vdev,
  349. struct dp_tx_desc_s *tx_desc,
  350. uint8_t *status);
  351. /**
  352. * dp_tx_update_peer_basic_stats() - Update peer basic stats
  353. * @txrx_peer: Datapath txrx_peer handle
  354. * @length: Length of the packet
  355. * @tx_status: Tx status from TQM/FW
  356. * @update: enhanced flag value present in dp_pdev
  357. *
  358. * Return: none
  359. */
  360. void dp_tx_update_peer_basic_stats(struct dp_txrx_peer *txrx_peer,
  361. uint32_t length, uint8_t tx_status,
  362. bool update);
  363. #ifdef DP_UMAC_HW_RESET_SUPPORT
  364. /**
  365. * dp_tx_drop() - Drop the frame on a given VAP
  366. * @soc: DP soc handle
  367. * @vdev_id: id of DP vdev handle
  368. * @nbuf: skb
  369. *
  370. * Drop all the incoming packets
  371. *
  372. * Return: nbuf
  373. */
  374. qdf_nbuf_t dp_tx_drop(struct cdp_soc_t *soc, uint8_t vdev_id, qdf_nbuf_t nbuf);
  375. /**
  376. * dp_tx_exc_drop() - Drop the frame on a given VAP
  377. * @soc_hdl: DP soc handle
  378. * @vdev_id: id of DP vdev handle
  379. * @nbuf: skb
  380. * @tx_exc_metadata: Handle that holds exception path meta data
  381. *
  382. * Drop all the incoming packets
  383. *
  384. * Return: nbuf
  385. */
  386. qdf_nbuf_t dp_tx_exc_drop(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  387. qdf_nbuf_t nbuf,
  388. struct cdp_tx_exception_metadata *tx_exc_metadata);
  389. #endif
  390. #ifdef WLAN_SUPPORT_PPEDS
  391. qdf_nbuf_t
  392. dp_ppeds_tx_desc_free(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc);
  393. #else
  394. static inline qdf_nbuf_t
  395. dp_ppeds_tx_desc_free(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc)
  396. {
  397. return NULL;
  398. }
  399. #endif
  400. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  401. /**
  402. * dp_tso_soc_attach() - TSO Attach handler
  403. * @txrx_soc: Opaque Dp handle
  404. *
  405. * Reserve TSO descriptor buffers
  406. *
  407. * Return: QDF_STATUS_E_FAILURE on failure or
  408. * QDF_STATUS_SUCCESS on success
  409. */
  410. QDF_STATUS dp_tso_soc_attach(struct cdp_soc_t *txrx_soc);
  411. /**
  412. * dp_tso_soc_detach() - TSO Detach handler
  413. * @txrx_soc: Opaque Dp handle
  414. *
  415. * Deallocate TSO descriptor buffers
  416. *
  417. * Return: QDF_STATUS_E_FAILURE on failure or
  418. * QDF_STATUS_SUCCESS on success
  419. */
  420. QDF_STATUS dp_tso_soc_detach(struct cdp_soc_t *txrx_soc);
  421. /**
  422. * dp_tx_send() - Transmit a frame on a given VAP
  423. * @soc_hdl: DP soc handle
  424. * @vdev_id: id of DP vdev handle
  425. * @nbuf: skb
  426. *
  427. * Entry point for Core Tx layer (DP_TX) invoked from
  428. * hard_start_xmit in OSIF/HDD or from dp_rx_process for intravap forwarding
  429. * cases
  430. *
  431. * Return: NULL on success,
  432. * nbuf when it fails to send
  433. */
  434. qdf_nbuf_t dp_tx_send(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  435. qdf_nbuf_t nbuf);
  436. /**
  437. * dp_tx_send_vdev_id_check() - Transmit a frame on a given VAP in special
  438. * case to avoid check in per-packet path.
  439. * @soc_hdl: DP soc handle
  440. * @vdev_id: id of DP vdev handle
  441. * @nbuf: skb
  442. *
  443. * Entry point for Core Tx layer (DP_TX) invoked from
  444. * hard_start_xmit in OSIF/HDD to transmit packet through dp_tx_send
  445. * with special condition to avoid per pkt check in dp_tx_send
  446. *
  447. * Return: NULL on success,
  448. * nbuf when it fails to send
  449. */
  450. qdf_nbuf_t dp_tx_send_vdev_id_check(struct cdp_soc_t *soc_hdl,
  451. uint8_t vdev_id, qdf_nbuf_t nbuf);
  452. /**
  453. * dp_tx_send_exception() - Transmit a frame on a given VAP in exception path
  454. * @soc_hdl: DP soc handle
  455. * @vdev_id: id of DP vdev handle
  456. * @nbuf: skb
  457. * @tx_exc_metadata: Handle that holds exception path meta data
  458. *
  459. * Entry point for Core Tx layer (DP_TX) invoked from
  460. * hard_start_xmit in OSIF/HDD to transmit frames through fw
  461. *
  462. * Return: NULL on success,
  463. * nbuf when it fails to send
  464. */
  465. qdf_nbuf_t
  466. dp_tx_send_exception(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  467. qdf_nbuf_t nbuf,
  468. struct cdp_tx_exception_metadata *tx_exc_metadata);
  469. /**
  470. * dp_tx_send_exception_vdev_id_check() - Transmit a frame on a given VAP
  471. * in exception path in special case to avoid regular exception path chk.
  472. * @soc_hdl: DP soc handle
  473. * @vdev_id: id of DP vdev handle
  474. * @nbuf: skb
  475. * @tx_exc_metadata: Handle that holds exception path meta data
  476. *
  477. * Entry point for Core Tx layer (DP_TX) invoked from
  478. * hard_start_xmit in OSIF/HDD to transmit frames through fw
  479. *
  480. * Return: NULL on success,
  481. * nbuf when it fails to send
  482. */
  483. qdf_nbuf_t
  484. dp_tx_send_exception_vdev_id_check(struct cdp_soc_t *soc_hdl,
  485. uint8_t vdev_id, qdf_nbuf_t nbuf,
  486. struct cdp_tx_exception_metadata *tx_exc_metadata);
  487. /**
  488. * dp_tx_send_mesh() - Transmit mesh frame on a given VAP
  489. * @soc_hdl: DP soc handle
  490. * @vdev_id: DP vdev handle
  491. * @nbuf: skb
  492. *
  493. * Entry point for Core Tx layer (DP_TX) invoked from
  494. * hard_start_xmit in OSIF/HDD
  495. *
  496. * Return: NULL on success,
  497. * nbuf when it fails to send
  498. */
  499. qdf_nbuf_t dp_tx_send_mesh(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  500. qdf_nbuf_t nbuf);
  501. /**
  502. * dp_tx_send_msdu_single() - Setup descriptor and enqueue single MSDU to TCL
  503. * @vdev: DP vdev handle
  504. * @nbuf: skb
  505. * @msdu_info: MSDU information
  506. * @peer_id: peer_id of the peer in case of NAWDS frames
  507. * @tx_exc_metadata: Handle that holds exception path metadata
  508. *
  509. * Return: NULL on success,
  510. * nbuf when it fails to send
  511. */
  512. qdf_nbuf_t
  513. dp_tx_send_msdu_single(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  514. struct dp_tx_msdu_info_s *msdu_info, uint16_t peer_id,
  515. struct cdp_tx_exception_metadata *tx_exc_metadata);
  516. /**
  517. * dp_tx_mcast_enhance() - Multicast enhancement on TX
  518. * @vdev: DP vdev handle
  519. * @nbuf: network buffer to be transmitted
  520. *
  521. * Return: true on success
  522. * false on failure
  523. */
  524. bool dp_tx_mcast_enhance(struct dp_vdev *vdev, qdf_nbuf_t nbuf);
  525. /**
  526. * dp_tx_send_msdu_multiple() - Enqueue multiple MSDUs
  527. * @vdev: DP vdev handle
  528. * @nbuf: skb
  529. * @msdu_info: MSDU info to be setup in MSDU extension descriptor
  530. *
  531. * Prepare descriptors for multiple MSDUs (TSO segments) and enqueue to TCL
  532. *
  533. * Return: NULL on success,
  534. * nbuf when it fails to send
  535. */
  536. #if QDF_LOCK_STATS
  537. noinline qdf_nbuf_t
  538. dp_tx_send_msdu_multiple(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  539. struct dp_tx_msdu_info_s *msdu_info);
  540. #else
  541. qdf_nbuf_t dp_tx_send_msdu_multiple(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  542. struct dp_tx_msdu_info_s *msdu_info);
  543. #endif
  544. #ifdef FEATURE_WLAN_TDLS
  545. /**
  546. * dp_tx_non_std() - Allow the control-path SW to send data frames
  547. * @soc_hdl: Datapath soc handle
  548. * @vdev_id: id of vdev
  549. * @tx_spec: what non-standard handling to apply to the tx data frames
  550. * @msdu_list: NULL-terminated list of tx MSDUs
  551. *
  552. * Return: NULL on success,
  553. * nbuf when it fails to send
  554. */
  555. qdf_nbuf_t dp_tx_non_std(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  556. enum ol_tx_spec tx_spec, qdf_nbuf_t msdu_list);
  557. #endif
  558. /**
  559. * dp_tx_frame_is_drop() - checks if the packet is loopback
  560. * @vdev: DP vdev handle
  561. * @srcmac: source MAC address
  562. * @dstmac: destination MAC address
  563. *
  564. * Return: 1 if frame needs to be dropped else 0
  565. */
  566. int dp_tx_frame_is_drop(struct dp_vdev *vdev, uint8_t *srcmac, uint8_t *dstmac);
  567. #ifndef WLAN_SOFTUMAC_SUPPORT
  568. /**
  569. * dp_tx_comp_handler() - Tx completion handler
  570. * @int_ctx: pointer to DP interrupt context
  571. * @soc: core txrx main context
  572. * @hal_srng: Opaque HAL SRNG pointer
  573. * @ring_id: completion ring id
  574. * @quota: No. of packets/descriptors that can be serviced in one loop
  575. *
  576. * This function will collect hardware release ring element contents and
  577. * handle descriptor contents. Based on contents, free packet or handle error
  578. * conditions
  579. *
  580. * Return: Number of TX completions processed
  581. */
  582. uint32_t dp_tx_comp_handler(struct dp_intr *int_ctx, struct dp_soc *soc,
  583. hal_ring_handle_t hal_srng, uint8_t ring_id,
  584. uint32_t quota);
  585. #endif
  586. void
  587. dp_tx_comp_process_desc_list(struct dp_soc *soc,
  588. struct dp_tx_desc_s *comp_head, uint8_t ring_id);
  589. QDF_STATUS
  590. dp_tx_prepare_send_me(struct dp_vdev *vdev, qdf_nbuf_t nbuf);
  591. QDF_STATUS
  592. dp_tx_prepare_send_igmp_me(struct dp_vdev *vdev, qdf_nbuf_t nbuf);
  593. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  594. #if defined(QCA_HOST_MODE_WIFI_DISABLED) || !defined(ATH_SUPPORT_IQUE)
  595. static inline void dp_tx_me_exit(struct dp_pdev *pdev)
  596. {
  597. return;
  598. }
  599. #endif
  600. /**
  601. * dp_tx_pdev_init() - dp tx pdev init
  602. * @pdev: physical device instance
  603. *
  604. * Return: QDF_STATUS_SUCCESS: success
  605. * QDF_STATUS_E_RESOURCES: Error return
  606. */
  607. static inline QDF_STATUS dp_tx_pdev_init(struct dp_pdev *pdev)
  608. {
  609. struct dp_soc *soc = pdev->soc;
  610. /* Initialize Flow control counters */
  611. qdf_atomic_init(&pdev->num_tx_outstanding);
  612. pdev->tx_descs_max = 0;
  613. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  614. /* Initialize descriptors in TCL Ring */
  615. hal_tx_init_data_ring(soc->hal_soc,
  616. soc->tcl_data_ring[pdev->pdev_id].hal_srng);
  617. }
  618. return QDF_STATUS_SUCCESS;
  619. }
  620. /**
  621. * dp_tx_prefetch_hw_sw_nbuf_desc() - function to prefetch HW and SW desc
  622. * @soc: Handle to HAL Soc structure
  623. * @hal_soc: HAL SOC handle
  624. * @num_avail_for_reap: descriptors available for reap
  625. * @hal_ring_hdl: ring pointer
  626. * @last_prefetched_hw_desc: pointer to the last prefetched HW descriptor
  627. * @last_prefetched_sw_desc: pointer to last prefetch SW desc
  628. *
  629. * Return: None
  630. */
  631. #ifdef QCA_DP_TX_HW_SW_NBUF_DESC_PREFETCH
  632. static inline
  633. void dp_tx_prefetch_hw_sw_nbuf_desc(struct dp_soc *soc,
  634. hal_soc_handle_t hal_soc,
  635. uint32_t num_avail_for_reap,
  636. hal_ring_handle_t hal_ring_hdl,
  637. void **last_prefetched_hw_desc,
  638. struct dp_tx_desc_s
  639. **last_prefetched_sw_desc)
  640. {
  641. if (*last_prefetched_sw_desc) {
  642. qdf_prefetch((uint8_t *)(*last_prefetched_sw_desc)->nbuf);
  643. qdf_prefetch((uint8_t *)(*last_prefetched_sw_desc)->nbuf + 64);
  644. }
  645. if (num_avail_for_reap && *last_prefetched_hw_desc) {
  646. soc->arch_ops.tx_comp_get_params_from_hal_desc(soc,
  647. *last_prefetched_hw_desc,
  648. last_prefetched_sw_desc);
  649. if ((uintptr_t)*last_prefetched_hw_desc & 0x3f)
  650. *last_prefetched_hw_desc =
  651. hal_srng_dst_prefetch_next_cached_desc(
  652. hal_soc,
  653. hal_ring_hdl,
  654. (uint8_t *)*last_prefetched_hw_desc);
  655. else
  656. *last_prefetched_hw_desc =
  657. hal_srng_dst_get_next_32_byte_desc(hal_soc,
  658. hal_ring_hdl,
  659. (uint8_t *)*last_prefetched_hw_desc);
  660. }
  661. }
  662. #else
  663. static inline
  664. void dp_tx_prefetch_hw_sw_nbuf_desc(struct dp_soc *soc,
  665. hal_soc_handle_t hal_soc,
  666. uint32_t num_avail_for_reap,
  667. hal_ring_handle_t hal_ring_hdl,
  668. void **last_prefetched_hw_desc,
  669. struct dp_tx_desc_s
  670. **last_prefetched_sw_desc)
  671. {
  672. }
  673. #endif
  674. #ifndef FEATURE_WDS
  675. static inline void dp_tx_mec_handler(struct dp_vdev *vdev, uint8_t *status)
  676. {
  677. return;
  678. }
  679. #endif
  680. #ifndef QCA_MULTIPASS_SUPPORT
  681. static inline
  682. bool dp_tx_multipass_process(struct dp_soc *soc, struct dp_vdev *vdev,
  683. qdf_nbuf_t nbuf,
  684. struct dp_tx_msdu_info_s *msdu_info)
  685. {
  686. return true;
  687. }
  688. static inline
  689. void dp_tx_vdev_multipass_deinit(struct dp_vdev *vdev)
  690. {
  691. }
  692. #else
  693. /**
  694. * dp_tx_multipass_process() - Process vlan frames in tx path
  695. * @soc: dp soc handle
  696. * @vdev: DP vdev handle
  697. * @nbuf: skb
  698. * @msdu_info: msdu descriptor
  699. *
  700. * Return: status whether frame needs to be dropped or transmitted
  701. */
  702. bool dp_tx_multipass_process(struct dp_soc *soc, struct dp_vdev *vdev,
  703. qdf_nbuf_t nbuf,
  704. struct dp_tx_msdu_info_s *msdu_info);
  705. /**
  706. * dp_tx_vdev_multipass_deinit() - set vlan map for vdev
  707. * @vdev: pointer to vdev
  708. *
  709. * return: void
  710. */
  711. void dp_tx_vdev_multipass_deinit(struct dp_vdev *vdev);
  712. /**
  713. * dp_tx_add_groupkey_metadata() - Add group key in metadata
  714. * @vdev: DP vdev handle
  715. * @msdu_info: MSDU info to be setup in MSDU descriptor
  716. * @group_key: Group key index programmed in metadata
  717. *
  718. * Return: void
  719. */
  720. void dp_tx_add_groupkey_metadata(struct dp_vdev *vdev,
  721. struct dp_tx_msdu_info_s *msdu_info,
  722. uint16_t group_key);
  723. #endif
  724. /**
  725. * dp_tx_hw_to_qdf()- convert hw status to qdf status
  726. * @status: hw status
  727. *
  728. * Return: qdf tx rx status
  729. */
  730. static inline enum qdf_dp_tx_rx_status dp_tx_hw_to_qdf(uint16_t status)
  731. {
  732. switch (status) {
  733. case HAL_TX_TQM_RR_FRAME_ACKED:
  734. return QDF_TX_RX_STATUS_OK;
  735. case HAL_TX_TQM_RR_REM_CMD_TX:
  736. return QDF_TX_RX_STATUS_NO_ACK;
  737. case HAL_TX_TQM_RR_REM_CMD_REM:
  738. case HAL_TX_TQM_RR_REM_CMD_NOTX:
  739. case HAL_TX_TQM_RR_REM_CMD_AGED:
  740. return QDF_TX_RX_STATUS_FW_DISCARD;
  741. default:
  742. return QDF_TX_RX_STATUS_DEFAULT;
  743. }
  744. }
  745. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  746. /**
  747. * dp_tx_get_queue() - Returns Tx queue IDs to be used for this Tx frame
  748. * @vdev: DP Virtual device handle
  749. * @nbuf: Buffer pointer
  750. * @queue: queue ids container for nbuf
  751. *
  752. * TX packet queue has 2 instances, software descriptors id and dma ring id
  753. * Based on tx feature and hardware configuration queue id combination could be
  754. * different.
  755. * For example -
  756. * With XPS enabled,all TX descriptor pools and dma ring are assigned per cpu id
  757. * With no XPS,lock based resource protection, Descriptor pool ids are different
  758. * for each vdev, dma ring id will be same as single pdev id
  759. *
  760. * Return: None
  761. */
  762. #ifdef QCA_OL_TX_MULTIQ_SUPPORT
  763. #if defined(IPA_OFFLOAD) && defined(QCA_IPA_LL_TX_FLOW_CONTROL)
  764. #ifdef IPA_WDI3_TX_TWO_PIPES
  765. static inline void dp_tx_get_queue(struct dp_vdev *vdev,
  766. qdf_nbuf_t nbuf, struct dp_tx_queue *queue)
  767. {
  768. queue->ring_id = qdf_get_cpu();
  769. if (vdev->pdev->soc->wlan_cfg_ctx->ipa_enabled)
  770. if ((queue->ring_id == IPA_TCL_DATA_RING_IDX) ||
  771. (queue->ring_id == IPA_TX_ALT_RING_IDX))
  772. queue->ring_id = 0;
  773. queue->desc_pool_id = queue->ring_id;
  774. }
  775. #else
  776. static inline void dp_tx_get_queue(struct dp_vdev *vdev,
  777. qdf_nbuf_t nbuf, struct dp_tx_queue *queue)
  778. {
  779. queue->ring_id = qdf_get_cpu();
  780. if (vdev->pdev->soc->wlan_cfg_ctx->ipa_enabled)
  781. if (queue->ring_id == IPA_TCL_DATA_RING_IDX)
  782. queue->ring_id = 0;
  783. queue->desc_pool_id = queue->ring_id;
  784. }
  785. #endif
  786. #else
  787. static inline void dp_tx_get_queue(struct dp_vdev *vdev,
  788. qdf_nbuf_t nbuf, struct dp_tx_queue *queue)
  789. {
  790. queue->ring_id = qdf_get_cpu();
  791. queue->desc_pool_id = queue->ring_id;
  792. }
  793. #endif
  794. /**
  795. * dp_tx_get_hal_ring_hdl() - Get the hal_tx_ring_hdl for data transmission
  796. * @soc: DP soc structure pointer
  797. * @ring_id: Transmit Queue/ring_id to be used when XPS is enabled
  798. *
  799. * Return: HAL ring handle
  800. */
  801. static inline hal_ring_handle_t dp_tx_get_hal_ring_hdl(struct dp_soc *soc,
  802. uint8_t ring_id)
  803. {
  804. if (ring_id == soc->num_tcl_data_rings)
  805. return soc->tcl_cmd_credit_ring.hal_srng;
  806. return soc->tcl_data_ring[ring_id].hal_srng;
  807. }
  808. #else /* QCA_OL_TX_MULTIQ_SUPPORT */
  809. #ifdef TX_MULTI_TCL
  810. #ifdef IPA_OFFLOAD
  811. static inline void dp_tx_get_queue(struct dp_vdev *vdev,
  812. qdf_nbuf_t nbuf, struct dp_tx_queue *queue)
  813. {
  814. /* get flow id */
  815. queue->desc_pool_id = DP_TX_GET_DESC_POOL_ID(vdev);
  816. if (vdev->pdev->soc->wlan_cfg_ctx->ipa_enabled)
  817. queue->ring_id = DP_TX_GET_RING_ID(vdev);
  818. else
  819. queue->ring_id = (qdf_nbuf_get_queue_mapping(nbuf) %
  820. vdev->pdev->soc->num_tcl_data_rings);
  821. }
  822. #else
  823. static inline void dp_tx_get_queue(struct dp_vdev *vdev,
  824. qdf_nbuf_t nbuf, struct dp_tx_queue *queue)
  825. {
  826. /* get flow id */
  827. queue->desc_pool_id = DP_TX_GET_DESC_POOL_ID(vdev);
  828. queue->ring_id = (qdf_nbuf_get_queue_mapping(nbuf) %
  829. vdev->pdev->soc->num_tcl_data_rings);
  830. }
  831. #endif
  832. #else
  833. static inline void dp_tx_get_queue(struct dp_vdev *vdev,
  834. qdf_nbuf_t nbuf, struct dp_tx_queue *queue)
  835. {
  836. /* get flow id */
  837. queue->desc_pool_id = DP_TX_GET_DESC_POOL_ID(vdev);
  838. queue->ring_id = DP_TX_GET_RING_ID(vdev);
  839. }
  840. #endif
  841. static inline hal_ring_handle_t dp_tx_get_hal_ring_hdl(struct dp_soc *soc,
  842. uint8_t ring_id)
  843. {
  844. return soc->tcl_data_ring[ring_id].hal_srng;
  845. }
  846. #endif
  847. #ifdef QCA_OL_TX_LOCK_LESS_ACCESS
  848. /**
  849. * dp_tx_hal_ring_access_start() - hal_tx_ring access for data transmission
  850. * @soc: DP soc structure pointer
  851. * @hal_ring_hdl: HAL ring handle
  852. *
  853. * Return: None
  854. */
  855. static inline int dp_tx_hal_ring_access_start(struct dp_soc *soc,
  856. hal_ring_handle_t hal_ring_hdl)
  857. {
  858. return hal_srng_access_start_unlocked(soc->hal_soc, hal_ring_hdl);
  859. }
  860. /**
  861. * dp_tx_hal_ring_access_end() - hal_tx_ring access for data transmission
  862. * @soc: DP soc structure pointer
  863. * @hal_ring_hdl: HAL ring handle
  864. *
  865. * Return: None
  866. */
  867. static inline void dp_tx_hal_ring_access_end(struct dp_soc *soc,
  868. hal_ring_handle_t hal_ring_hdl)
  869. {
  870. hal_srng_access_end_unlocked(soc->hal_soc, hal_ring_hdl);
  871. }
  872. /**
  873. * dp_tx_hal_ring_access_end_reap() - hal_tx_ring access for data transmission
  874. * @soc: DP soc structure pointer
  875. * @hal_ring_hdl: HAL ring handle
  876. *
  877. * Return: None
  878. */
  879. static inline void dp_tx_hal_ring_access_end_reap(struct dp_soc *soc,
  880. hal_ring_handle_t
  881. hal_ring_hdl)
  882. {
  883. }
  884. #else
  885. static inline int dp_tx_hal_ring_access_start(struct dp_soc *soc,
  886. hal_ring_handle_t hal_ring_hdl)
  887. {
  888. return hal_srng_access_start(soc->hal_soc, hal_ring_hdl);
  889. }
  890. static inline void dp_tx_hal_ring_access_end(struct dp_soc *soc,
  891. hal_ring_handle_t hal_ring_hdl)
  892. {
  893. hal_srng_access_end(soc->hal_soc, hal_ring_hdl);
  894. }
  895. static inline void dp_tx_hal_ring_access_end_reap(struct dp_soc *soc,
  896. hal_ring_handle_t
  897. hal_ring_hdl)
  898. {
  899. hal_srng_access_end_reap(soc->hal_soc, hal_ring_hdl);
  900. }
  901. #endif
  902. #ifdef ATH_TX_PRI_OVERRIDE
  903. #define DP_TX_TID_OVERRIDE(_msdu_info, _nbuf) \
  904. ((_msdu_info)->tid = qdf_nbuf_get_priority(_nbuf))
  905. #else
  906. #define DP_TX_TID_OVERRIDE(_msdu_info, _nbuf)
  907. #endif
  908. /* TODO TX_FEATURE_NOT_YET */
  909. static inline void dp_tx_comp_process_exception(struct dp_tx_desc_s *tx_desc)
  910. {
  911. return;
  912. }
  913. /* TODO TX_FEATURE_NOT_YET */
  914. /**
  915. * dp_tx_desc_flush() - release resources associated
  916. * to TX Desc
  917. *
  918. * @pdev: Handle to DP pdev structure
  919. * @vdev: virtual device instance
  920. * NULL: no specific Vdev is required and check all allcated TX desc
  921. * on this pdev.
  922. * Non-NULL: only check the allocated TX Desc associated to this Vdev.
  923. *
  924. * @force_free:
  925. * true: flush the TX desc.
  926. * false: only reset the Vdev in each allocated TX desc
  927. * that associated to current Vdev.
  928. *
  929. * This function will go through the TX desc pool to flush
  930. * the outstanding TX data or reset Vdev to NULL in associated TX
  931. * Desc.
  932. */
  933. void dp_tx_desc_flush(struct dp_pdev *pdev, struct dp_vdev *vdev,
  934. bool force_free);
  935. /**
  936. * dp_tx_vdev_attach() - attach vdev to dp tx
  937. * @vdev: virtual device instance
  938. *
  939. * Return: QDF_STATUS_SUCCESS: success
  940. * QDF_STATUS_E_RESOURCES: Error return
  941. */
  942. QDF_STATUS dp_tx_vdev_attach(struct dp_vdev *vdev);
  943. /**
  944. * dp_tx_vdev_detach() - detach vdev from dp tx
  945. * @vdev: virtual device instance
  946. *
  947. * Return: QDF_STATUS_SUCCESS: success
  948. * QDF_STATUS_E_RESOURCES: Error return
  949. */
  950. QDF_STATUS dp_tx_vdev_detach(struct dp_vdev *vdev);
  951. /**
  952. * dp_tx_vdev_update_search_flags() - Update vdev flags as per opmode
  953. * @vdev: virtual device instance
  954. *
  955. * Return: void
  956. *
  957. */
  958. void dp_tx_vdev_update_search_flags(struct dp_vdev *vdev);
  959. /**
  960. * dp_soc_tx_desc_sw_pools_alloc() - Allocate tx descriptor pool memory
  961. * @soc: core txrx main context
  962. *
  963. * This function allocates memory for following descriptor pools
  964. * 1. regular sw tx descriptor pools (static pools)
  965. * 2. TX extension descriptor pools (ME, RAW, TSO etc...)
  966. * 3. TSO descriptor pools
  967. *
  968. * Return: QDF_STATUS_SUCCESS: success
  969. * QDF_STATUS_E_RESOURCES: Error return
  970. */
  971. QDF_STATUS dp_soc_tx_desc_sw_pools_alloc(struct dp_soc *soc);
  972. /**
  973. * dp_soc_tx_desc_sw_pools_init() - Initialise TX descriptor pools
  974. * @soc: core txrx main context
  975. *
  976. * This function initializes the following TX descriptor pools
  977. * 1. regular sw tx descriptor pools (static pools)
  978. * 2. TX extension descriptor pools (ME, RAW, TSO etc...)
  979. * 3. TSO descriptor pools
  980. *
  981. * Return: QDF_STATUS_SUCCESS: success
  982. * QDF_STATUS_E_RESOURCES: Error return
  983. */
  984. QDF_STATUS dp_soc_tx_desc_sw_pools_init(struct dp_soc *soc);
  985. /**
  986. * dp_soc_tx_desc_sw_pools_free() - free all TX descriptors
  987. * @soc: core txrx main context
  988. *
  989. * This function frees all tx related descriptors as below
  990. * 1. Regular TX descriptors (static pools)
  991. * 2. extension TX descriptors (used for ME, RAW, TSO etc...)
  992. * 3. TSO descriptors
  993. *
  994. */
  995. void dp_soc_tx_desc_sw_pools_free(struct dp_soc *soc);
  996. /**
  997. * dp_soc_tx_desc_sw_pools_deinit() - de-initialize all TX descriptors
  998. * @soc: core txrx main context
  999. *
  1000. * This function de-initializes all tx related descriptors as below
  1001. * 1. Regular TX descriptors (static pools)
  1002. * 2. extension TX descriptors (used for ME, RAW, TSO etc...)
  1003. * 3. TSO descriptors
  1004. *
  1005. */
  1006. void dp_soc_tx_desc_sw_pools_deinit(struct dp_soc *soc);
  1007. #ifndef WLAN_SOFTUMAC_SUPPORT
  1008. /**
  1009. * dp_handle_wbm_internal_error() - handles wbm_internal_error case
  1010. * @soc: core DP main context
  1011. * @hal_desc: hal descriptor
  1012. * @buf_type: indicates if the buffer is of type link disc or msdu
  1013. *
  1014. * wbm_internal_error is seen in following scenarios :
  1015. *
  1016. * 1. Null pointers detected in WBM_RELEASE_RING descriptors
  1017. * 2. Null pointers detected during delinking process
  1018. *
  1019. * Some null pointer cases:
  1020. *
  1021. * a. MSDU buffer pointer is NULL
  1022. * b. Next_MSDU_Link_Desc pointer is NULL, with no last msdu flag
  1023. * c. MSDU buffer pointer is NULL or Next_Link_Desc pointer is NULL
  1024. *
  1025. * Return: None
  1026. */
  1027. void
  1028. dp_handle_wbm_internal_error(struct dp_soc *soc, void *hal_desc,
  1029. uint32_t buf_type);
  1030. #endif
  1031. #else /* QCA_HOST_MODE_WIFI_DISABLED */
  1032. static inline
  1033. QDF_STATUS dp_soc_tx_desc_sw_pools_alloc(struct dp_soc *soc)
  1034. {
  1035. return QDF_STATUS_SUCCESS;
  1036. }
  1037. static inline
  1038. QDF_STATUS dp_soc_tx_desc_sw_pools_init(struct dp_soc *soc)
  1039. {
  1040. return QDF_STATUS_SUCCESS;
  1041. }
  1042. static inline void dp_soc_tx_desc_sw_pools_free(struct dp_soc *soc)
  1043. {
  1044. }
  1045. static inline void dp_soc_tx_desc_sw_pools_deinit(struct dp_soc *soc)
  1046. {
  1047. }
  1048. static inline
  1049. void dp_tx_desc_flush(struct dp_pdev *pdev, struct dp_vdev *vdev,
  1050. bool force_free)
  1051. {
  1052. }
  1053. static inline QDF_STATUS dp_tx_vdev_attach(struct dp_vdev *vdev)
  1054. {
  1055. return QDF_STATUS_SUCCESS;
  1056. }
  1057. static inline QDF_STATUS dp_tx_vdev_detach(struct dp_vdev *vdev)
  1058. {
  1059. return QDF_STATUS_SUCCESS;
  1060. }
  1061. static inline void dp_tx_vdev_update_search_flags(struct dp_vdev *vdev)
  1062. {
  1063. }
  1064. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1065. #if defined(QCA_SUPPORT_LATENCY_CAPTURE) || \
  1066. defined(QCA_TX_CAPTURE_SUPPORT) || \
  1067. defined(QCA_MCOPY_SUPPORT)
  1068. #ifdef FEATURE_PERPKT_INFO
  1069. /**
  1070. * dp_get_completion_indication_for_stack() - send completion to stack
  1071. * @soc : dp_soc handle
  1072. * @pdev: dp_pdev handle
  1073. * @txrx_peer: dp peer handle
  1074. * @ts: transmit completion status structure
  1075. * @netbuf: Buffer pointer for free
  1076. * @time_latency:
  1077. *
  1078. * This function is used for indication whether buffer needs to be
  1079. * sent to stack for freeing or not
  1080. *
  1081. * Return: QDF_STATUS
  1082. */
  1083. QDF_STATUS
  1084. dp_get_completion_indication_for_stack(struct dp_soc *soc,
  1085. struct dp_pdev *pdev,
  1086. struct dp_txrx_peer *txrx_peer,
  1087. struct hal_tx_completion_status *ts,
  1088. qdf_nbuf_t netbuf,
  1089. uint64_t time_latency);
  1090. /**
  1091. * dp_send_completion_to_stack() - send completion to stack
  1092. * @soc : dp_soc handle
  1093. * @pdev: dp_pdev handle
  1094. * @peer_id: peer_id of the peer for which completion came
  1095. * @ppdu_id: ppdu_id
  1096. * @netbuf: Buffer pointer for free
  1097. *
  1098. * This function is used to send completion to stack
  1099. * to free buffer
  1100. *
  1101. * Return: QDF_STATUS
  1102. */
  1103. void dp_send_completion_to_stack(struct dp_soc *soc, struct dp_pdev *pdev,
  1104. uint16_t peer_id, uint32_t ppdu_id,
  1105. qdf_nbuf_t netbuf);
  1106. #endif
  1107. #else
  1108. static inline
  1109. QDF_STATUS dp_get_completion_indication_for_stack(struct dp_soc *soc,
  1110. struct dp_pdev *pdev,
  1111. struct dp_txrx_peer *peer,
  1112. struct hal_tx_completion_status *ts,
  1113. qdf_nbuf_t netbuf,
  1114. uint64_t time_latency)
  1115. {
  1116. return QDF_STATUS_E_NOSUPPORT;
  1117. }
  1118. static inline
  1119. void dp_send_completion_to_stack(struct dp_soc *soc, struct dp_pdev *pdev,
  1120. uint16_t peer_id, uint32_t ppdu_id,
  1121. qdf_nbuf_t netbuf)
  1122. {
  1123. }
  1124. #endif
  1125. #ifdef WLAN_FEATURE_PKT_CAPTURE_V2
  1126. /**
  1127. * dp_send_completion_to_pkt_capture() - send tx completion to packet capture
  1128. * @soc: dp_soc handle
  1129. * @desc: Tx Descriptor
  1130. * @ts: HAL Tx completion descriptor contents
  1131. *
  1132. * This function is used to send tx completion to packet capture
  1133. */
  1134. void dp_send_completion_to_pkt_capture(struct dp_soc *soc,
  1135. struct dp_tx_desc_s *desc,
  1136. struct hal_tx_completion_status *ts);
  1137. #else
  1138. static inline void
  1139. dp_send_completion_to_pkt_capture(struct dp_soc *soc,
  1140. struct dp_tx_desc_s *desc,
  1141. struct hal_tx_completion_status *ts)
  1142. {
  1143. }
  1144. #endif
  1145. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1146. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  1147. /**
  1148. * dp_tx_update_stats() - Update soc level tx stats
  1149. * @soc: DP soc handle
  1150. * @tx_desc: TX descriptor reference
  1151. * @ring_id: TCL ring id
  1152. *
  1153. * Return: none
  1154. */
  1155. void dp_tx_update_stats(struct dp_soc *soc,
  1156. struct dp_tx_desc_s *tx_desc,
  1157. uint8_t ring_id);
  1158. /**
  1159. * dp_tx_attempt_coalescing() - Check and attempt TCL register write coalescing
  1160. * @soc: Datapath soc handle
  1161. * @vdev: DP vdev handle
  1162. * @tx_desc: tx packet descriptor
  1163. * @tid: TID for pkt transmission
  1164. * @msdu_info: MSDU info of tx packet
  1165. * @ring_id: TCL ring id
  1166. *
  1167. * Return: 1, if coalescing is to be done
  1168. * 0, if coalescing is not to be done
  1169. */
  1170. int
  1171. dp_tx_attempt_coalescing(struct dp_soc *soc, struct dp_vdev *vdev,
  1172. struct dp_tx_desc_s *tx_desc,
  1173. uint8_t tid,
  1174. struct dp_tx_msdu_info_s *msdu_info,
  1175. uint8_t ring_id);
  1176. /**
  1177. * dp_tx_ring_access_end() - HAL ring access end for data transmission
  1178. * @soc: Datapath soc handle
  1179. * @hal_ring_hdl: HAL ring handle
  1180. * @coalesce: Coalesce the current write or not
  1181. *
  1182. * Return: none
  1183. */
  1184. void
  1185. dp_tx_ring_access_end(struct dp_soc *soc, hal_ring_handle_t hal_ring_hdl,
  1186. int coalesce);
  1187. #else
  1188. /**
  1189. * dp_tx_update_stats() - Update soc level tx stats
  1190. * @soc: DP soc handle
  1191. * @tx_desc: TX descriptor reference
  1192. * @ring_id: TCL ring id
  1193. *
  1194. * Return: none
  1195. */
  1196. static inline void dp_tx_update_stats(struct dp_soc *soc,
  1197. struct dp_tx_desc_s *tx_desc,
  1198. uint8_t ring_id){ }
  1199. static inline void
  1200. dp_tx_ring_access_end(struct dp_soc *soc, hal_ring_handle_t hal_ring_hdl,
  1201. int coalesce)
  1202. {
  1203. dp_tx_hal_ring_access_end(soc, hal_ring_hdl);
  1204. }
  1205. static inline int
  1206. dp_tx_attempt_coalescing(struct dp_soc *soc, struct dp_vdev *vdev,
  1207. struct dp_tx_desc_s *tx_desc,
  1208. uint8_t tid,
  1209. struct dp_tx_msdu_info_s *msdu_info,
  1210. uint8_t ring_id)
  1211. {
  1212. return 0;
  1213. }
  1214. #endif /* WLAN_DP_FEATURE_SW_LATENCY_MGR */
  1215. #ifdef FEATURE_RUNTIME_PM
  1216. /**
  1217. * dp_set_rtpm_tput_policy_requirement() - Update RTPM throughput policy
  1218. * @soc_hdl: DP soc handle
  1219. * @is_high_tput: flag to indicate whether throughput is high
  1220. *
  1221. * Return: none
  1222. */
  1223. static inline
  1224. void dp_set_rtpm_tput_policy_requirement(struct cdp_soc_t *soc_hdl,
  1225. bool is_high_tput)
  1226. {
  1227. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  1228. qdf_atomic_set(&soc->rtpm_high_tput_flag, is_high_tput);
  1229. }
  1230. /**
  1231. * dp_tx_ring_access_end_wrapper() - Wrapper for ring access end
  1232. * @soc: Datapath soc handle
  1233. * @hal_ring_hdl: HAL ring handle
  1234. * @coalesce: Coalesce the current write or not
  1235. *
  1236. * Feature-specific wrapper for HAL ring access end for data
  1237. * transmission
  1238. *
  1239. * Return: none
  1240. */
  1241. void
  1242. dp_tx_ring_access_end_wrapper(struct dp_soc *soc,
  1243. hal_ring_handle_t hal_ring_hdl,
  1244. int coalesce);
  1245. #else
  1246. #ifdef DP_POWER_SAVE
  1247. void
  1248. dp_tx_ring_access_end_wrapper(struct dp_soc *soc,
  1249. hal_ring_handle_t hal_ring_hdl,
  1250. int coalesce);
  1251. #else
  1252. static inline void
  1253. dp_tx_ring_access_end_wrapper(struct dp_soc *soc,
  1254. hal_ring_handle_t hal_ring_hdl,
  1255. int coalesce)
  1256. {
  1257. dp_tx_ring_access_end(soc, hal_ring_hdl, coalesce);
  1258. }
  1259. #endif
  1260. static inline void
  1261. dp_set_rtpm_tput_policy_requirement(struct cdp_soc_t *soc_hdl,
  1262. bool is_high_tput)
  1263. { }
  1264. #endif
  1265. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1266. #ifdef DP_TX_HW_DESC_HISTORY
  1267. static inline void
  1268. dp_tx_hw_desc_update_evt(uint8_t *hal_tx_desc_cached,
  1269. hal_ring_handle_t hal_ring_hdl,
  1270. struct dp_soc *soc, uint8_t ring_id)
  1271. {
  1272. struct dp_tx_hw_desc_history *tx_hw_desc_history =
  1273. &soc->tx_hw_desc_history;
  1274. struct dp_tx_hw_desc_evt *evt;
  1275. uint32_t idx = 0;
  1276. uint16_t slot = 0;
  1277. if (!tx_hw_desc_history->allocated)
  1278. return;
  1279. dp_get_frag_hist_next_atomic_idx(&tx_hw_desc_history->index, &idx,
  1280. &slot,
  1281. DP_TX_HW_DESC_HIST_SLOT_SHIFT,
  1282. DP_TX_HW_DESC_HIST_PER_SLOT_MAX,
  1283. DP_TX_HW_DESC_HIST_MAX);
  1284. evt = &tx_hw_desc_history->entry[slot][idx];
  1285. qdf_mem_copy(evt->tcl_desc, hal_tx_desc_cached, HAL_TX_DESC_LEN_BYTES);
  1286. evt->posted = qdf_get_log_timestamp();
  1287. evt->tcl_ring_id = ring_id;
  1288. hal_get_sw_hptp(soc->hal_soc, hal_ring_hdl, &evt->tp, &evt->hp);
  1289. }
  1290. #else
  1291. static inline void
  1292. dp_tx_hw_desc_update_evt(uint8_t *hal_tx_desc_cached,
  1293. hal_ring_handle_t hal_ring_hdl,
  1294. struct dp_soc *soc, uint8_t ring_id)
  1295. {
  1296. }
  1297. #endif
  1298. #if defined(WLAN_FEATURE_TSF_UPLINK_DELAY) || defined(WLAN_CONFIG_TX_DELAY)
  1299. /**
  1300. * dp_tx_compute_hw_delay_us() - Compute hardware Tx completion delay
  1301. * @ts: Tx completion status
  1302. * @delta_tsf: Difference between TSF clock and qtimer
  1303. * @delay_us: Delay in microseconds
  1304. *
  1305. * Return: QDF_STATUS_SUCCESS : Success
  1306. * QDF_STATUS_E_INVAL : Tx completion status is invalid or
  1307. * delay_us is NULL
  1308. * QDF_STATUS_E_FAILURE : Error in delay calculation
  1309. */
  1310. QDF_STATUS
  1311. dp_tx_compute_hw_delay_us(struct hal_tx_completion_status *ts,
  1312. uint32_t delta_tsf,
  1313. uint32_t *delay_us);
  1314. /**
  1315. * dp_set_delta_tsf() - Set delta_tsf to dp_soc structure
  1316. * @soc_hdl: cdp soc pointer
  1317. * @vdev_id: vdev id
  1318. * @delta_tsf: difference between TSF clock and qtimer
  1319. *
  1320. * Return: None
  1321. */
  1322. void dp_set_delta_tsf(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  1323. uint32_t delta_tsf);
  1324. #endif
  1325. #ifdef WLAN_FEATURE_TSF_UPLINK_DELAY
  1326. /**
  1327. * dp_set_tsf_ul_delay_report() - Enable or disable reporting uplink delay
  1328. * @soc_hdl: cdp soc pointer
  1329. * @vdev_id: vdev id
  1330. * @enable: true to enable and false to disable
  1331. *
  1332. * Return: QDF_STATUS
  1333. */
  1334. QDF_STATUS dp_set_tsf_ul_delay_report(struct cdp_soc_t *soc_hdl,
  1335. uint8_t vdev_id, bool enable);
  1336. /**
  1337. * dp_get_uplink_delay() - Get uplink delay value
  1338. * @soc_hdl: cdp soc pointer
  1339. * @vdev_id: vdev id
  1340. * @val: pointer to save uplink delay value
  1341. *
  1342. * Return: QDF_STATUS
  1343. */
  1344. QDF_STATUS dp_get_uplink_delay(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  1345. uint32_t *val);
  1346. #endif /* WLAN_FEATURE_TSF_UPLINK_TSF */
  1347. /**
  1348. * dp_tx_pkt_tracepoints_enabled() - Get the state of tx pkt tracepoint
  1349. *
  1350. * Return: True if any tx pkt tracepoint is enabled else false
  1351. */
  1352. static inline
  1353. bool dp_tx_pkt_tracepoints_enabled(void)
  1354. {
  1355. return (qdf_trace_dp_tx_comp_tcp_pkt_enabled() ||
  1356. qdf_trace_dp_tx_comp_udp_pkt_enabled() ||
  1357. qdf_trace_dp_tx_comp_pkt_enabled());
  1358. }
  1359. #ifdef DP_TX_TRACKING
  1360. /**
  1361. * dp_tx_desc_set_timestamp() - set timestamp in tx descriptor
  1362. * @tx_desc: tx descriptor
  1363. *
  1364. * Return: None
  1365. */
  1366. static inline
  1367. void dp_tx_desc_set_timestamp(struct dp_tx_desc_s *tx_desc)
  1368. {
  1369. tx_desc->timestamp_tick = qdf_system_ticks();
  1370. }
  1371. /**
  1372. * dp_tx_desc_check_corruption() - Verify magic pattern in tx descriptor
  1373. * @tx_desc: tx descriptor
  1374. *
  1375. * Check for corruption in tx descriptor, if magic pattern is not matching
  1376. * trigger self recovery
  1377. *
  1378. * Return: none
  1379. */
  1380. void dp_tx_desc_check_corruption(struct dp_tx_desc_s *tx_desc);
  1381. #else
  1382. static inline
  1383. void dp_tx_desc_set_timestamp(struct dp_tx_desc_s *tx_desc)
  1384. {
  1385. }
  1386. static inline
  1387. void dp_tx_desc_check_corruption(struct dp_tx_desc_s *tx_desc)
  1388. {
  1389. }
  1390. #endif
  1391. #ifndef CONFIG_SAWF
  1392. static inline bool dp_sawf_tag_valid_get(qdf_nbuf_t nbuf)
  1393. {
  1394. return false;
  1395. }
  1396. #endif
  1397. #ifdef HW_TX_DELAY_STATS_ENABLE
  1398. /**
  1399. * dp_tx_desc_set_ktimestamp() - set kernel timestamp in tx descriptor
  1400. * @vdev: DP vdev handle
  1401. * @tx_desc: tx descriptor
  1402. *
  1403. * Return: true when descriptor is timestamped, false otherwise
  1404. */
  1405. static inline
  1406. bool dp_tx_desc_set_ktimestamp(struct dp_vdev *vdev,
  1407. struct dp_tx_desc_s *tx_desc)
  1408. {
  1409. if (qdf_unlikely(vdev->pdev->delay_stats_flag) ||
  1410. qdf_unlikely(vdev->pdev->soc->wlan_cfg_ctx->pext_stats_enabled) ||
  1411. qdf_unlikely(dp_tx_pkt_tracepoints_enabled()) ||
  1412. qdf_unlikely(vdev->pdev->soc->peerstats_enabled) ||
  1413. qdf_unlikely(dp_is_vdev_tx_delay_stats_enabled(vdev))) {
  1414. tx_desc->timestamp = qdf_ktime_real_get();
  1415. return true;
  1416. }
  1417. return false;
  1418. }
  1419. #else
  1420. static inline
  1421. bool dp_tx_desc_set_ktimestamp(struct dp_vdev *vdev,
  1422. struct dp_tx_desc_s *tx_desc)
  1423. {
  1424. if (qdf_unlikely(vdev->pdev->delay_stats_flag) ||
  1425. qdf_unlikely(vdev->pdev->soc->wlan_cfg_ctx->pext_stats_enabled) ||
  1426. qdf_unlikely(dp_tx_pkt_tracepoints_enabled()) ||
  1427. qdf_unlikely(vdev->pdev->soc->peerstats_enabled)) {
  1428. tx_desc->timestamp = qdf_ktime_real_get();
  1429. return true;
  1430. }
  1431. return false;
  1432. }
  1433. #endif
  1434. #ifdef CONFIG_DP_PKT_ADD_TIMESTAMP
  1435. /**
  1436. * dp_pkt_add_timestamp() - add timestamp in data payload
  1437. *
  1438. * @vdev: dp vdev
  1439. * @index: index to decide offset in payload
  1440. * @time: timestamp to add in data payload
  1441. * @nbuf: network buffer
  1442. *
  1443. * Return: none
  1444. */
  1445. void dp_pkt_add_timestamp(struct dp_vdev *vdev,
  1446. enum qdf_pkt_timestamp_index index, uint64_t time,
  1447. qdf_nbuf_t nbuf);
  1448. /**
  1449. * dp_pkt_get_timestamp() - get current system time
  1450. *
  1451. * @time: return current system time
  1452. *
  1453. * Return: none
  1454. */
  1455. void dp_pkt_get_timestamp(uint64_t *time);
  1456. #else
  1457. #define dp_pkt_add_timestamp(vdev, index, time, nbuf)
  1458. static inline
  1459. void dp_pkt_get_timestamp(uint64_t *time)
  1460. {
  1461. }
  1462. #endif
  1463. #ifdef CONFIG_WLAN_SYSFS_MEM_STATS
  1464. /**
  1465. * dp_update_tx_desc_stats - Update the increase or decrease in
  1466. * outstanding tx desc count
  1467. * values on pdev and soc
  1468. * @pdev: DP pdev handle
  1469. *
  1470. * Return: void
  1471. */
  1472. static inline void
  1473. dp_update_tx_desc_stats(struct dp_pdev *pdev)
  1474. {
  1475. int32_t tx_descs_cnt =
  1476. qdf_atomic_read(&pdev->num_tx_outstanding);
  1477. if (pdev->tx_descs_max < tx_descs_cnt)
  1478. pdev->tx_descs_max = tx_descs_cnt;
  1479. qdf_mem_tx_desc_cnt_update(pdev->num_tx_outstanding,
  1480. pdev->tx_descs_max);
  1481. }
  1482. #else /* CONFIG_WLAN_SYSFS_MEM_STATS */
  1483. static inline void
  1484. dp_update_tx_desc_stats(struct dp_pdev *pdev)
  1485. {
  1486. }
  1487. #endif /* CONFIG_WLAN_SYSFS_MEM_STATS */
  1488. #ifdef QCA_SUPPORT_DP_GLOBAL_CTX
  1489. /**
  1490. * dp_tx_get_global_desc_in_use() - read global descriptors in usage
  1491. * @dp_global: Datapath global context
  1492. *
  1493. * Return: global descriptors in use
  1494. */
  1495. static inline int32_t
  1496. dp_tx_get_global_desc_in_use(struct dp_global_context *dp_global)
  1497. {
  1498. return qdf_atomic_read(&dp_global->global_descriptor_in_use);
  1499. }
  1500. #endif
  1501. #ifdef QCA_TX_LIMIT_CHECK
  1502. static inline bool is_spl_packet(qdf_nbuf_t nbuf)
  1503. {
  1504. if (qdf_nbuf_is_ipv4_eapol_pkt(nbuf))
  1505. return true;
  1506. return false;
  1507. }
  1508. #ifdef QCA_SUPPORT_DP_GLOBAL_CTX
  1509. /**
  1510. * is_dp_spl_tx_limit_reached - Check if the packet is a special packet to allow
  1511. * allocation if allocated tx descriptors are within the global max limit
  1512. * and pdev max limit.
  1513. * @vdev: DP vdev handle
  1514. * @nbuf: network buffer
  1515. *
  1516. * Return: true if allocated tx descriptors reached max configured value, else
  1517. * false
  1518. */
  1519. static inline bool
  1520. is_dp_spl_tx_limit_reached(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  1521. {
  1522. struct dp_pdev *pdev = vdev->pdev;
  1523. struct dp_soc *soc = pdev->soc;
  1524. struct dp_global_context *dp_global;
  1525. uint32_t global_tx_desc_allowed;
  1526. dp_global = wlan_objmgr_get_global_ctx();
  1527. global_tx_desc_allowed =
  1528. wlan_cfg_get_num_global_tx_desc(soc->wlan_cfg_ctx);
  1529. if (is_spl_packet(nbuf)) {
  1530. if (dp_tx_get_global_desc_in_use(dp_global) >=
  1531. global_tx_desc_allowed)
  1532. return true;
  1533. if (qdf_atomic_read(&pdev->num_tx_outstanding) >=
  1534. pdev->num_tx_allowed)
  1535. return true;
  1536. return false;
  1537. }
  1538. return true;
  1539. }
  1540. static inline bool
  1541. __dp_tx_limit_check(struct dp_soc *soc)
  1542. {
  1543. struct dp_global_context *dp_global;
  1544. uint32_t global_tx_desc_allowed;
  1545. uint32_t global_tx_desc_reg_allowed;
  1546. uint32_t global_tx_desc_spcl_allowed;
  1547. dp_global = wlan_objmgr_get_global_ctx();
  1548. global_tx_desc_allowed =
  1549. wlan_cfg_get_num_global_tx_desc(soc->wlan_cfg_ctx);
  1550. global_tx_desc_spcl_allowed =
  1551. wlan_cfg_get_num_global_spcl_tx_desc(soc->wlan_cfg_ctx);
  1552. global_tx_desc_reg_allowed = global_tx_desc_allowed -
  1553. global_tx_desc_spcl_allowed;
  1554. return (dp_tx_get_global_desc_in_use(dp_global) >=
  1555. global_tx_desc_reg_allowed);
  1556. }
  1557. /**
  1558. * dp_tx_limit_check - Check if allocated tx descriptors reached
  1559. * global max reg limit and pdev max reg limit for regular packets. Also check
  1560. * if the limit is reached for special packets.
  1561. * @vdev: DP vdev handle
  1562. * @nbuf: network buffer
  1563. *
  1564. * Return: true if allocated tx descriptors reached max limit for regular
  1565. * packets and in case of special packets, if the limit is reached max
  1566. * configured vale for the soc/pdev, else false
  1567. */
  1568. static inline bool
  1569. dp_tx_limit_check(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  1570. {
  1571. struct dp_pdev *pdev = vdev->pdev;
  1572. struct dp_soc *soc = pdev->soc;
  1573. if (__dp_tx_limit_check(soc)) {
  1574. if (is_dp_spl_tx_limit_reached(vdev, nbuf)) {
  1575. dp_tx_info("queued packets are more than max tx, drop the frame");
  1576. DP_STATS_INC(vdev, tx_i.dropped.desc_na.num, 1);
  1577. return true;
  1578. }
  1579. }
  1580. if (qdf_atomic_read(&pdev->num_tx_outstanding) >=
  1581. pdev->num_reg_tx_allowed) {
  1582. if (is_dp_spl_tx_limit_reached(vdev, nbuf)) {
  1583. dp_tx_info("queued packets are more than max tx, drop the frame");
  1584. DP_STATS_INC(vdev, tx_i.dropped.desc_na.num, 1);
  1585. DP_STATS_INC(vdev,
  1586. tx_i.dropped.desc_na_exc_outstand.num, 1);
  1587. return true;
  1588. }
  1589. }
  1590. return false;
  1591. }
  1592. #else
  1593. /**
  1594. * is_dp_spl_tx_limit_reached - Check if the packet is a special packet to allow
  1595. * allocation if allocated tx descriptors are within the soc max limit
  1596. * and pdev max limit.
  1597. * @vdev: DP vdev handle
  1598. * @nbuf: network buffer
  1599. *
  1600. * Return: true if allocated tx descriptors reached max configured value, else
  1601. * false
  1602. */
  1603. static inline bool
  1604. is_dp_spl_tx_limit_reached(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  1605. {
  1606. struct dp_pdev *pdev = vdev->pdev;
  1607. struct dp_soc *soc = pdev->soc;
  1608. if (is_spl_packet(nbuf)) {
  1609. if (qdf_atomic_read(&soc->num_tx_outstanding) >=
  1610. soc->num_tx_allowed)
  1611. return true;
  1612. if (qdf_atomic_read(&pdev->num_tx_outstanding) >=
  1613. pdev->num_tx_allowed)
  1614. return true;
  1615. return false;
  1616. }
  1617. return true;
  1618. }
  1619. static inline bool
  1620. __dp_tx_limit_check(struct dp_soc *soc)
  1621. {
  1622. return (qdf_atomic_read(&soc->num_tx_outstanding) >=
  1623. soc->num_reg_tx_allowed);
  1624. }
  1625. /**
  1626. * dp_tx_limit_check - Check if allocated tx descriptors reached
  1627. * soc max reg limit and pdev max reg limit for regular packets. Also check if
  1628. * the limit is reached for special packets.
  1629. * @vdev: DP vdev handle
  1630. * @nbuf: network buffer
  1631. *
  1632. * Return: true if allocated tx descriptors reached max limit for regular
  1633. * packets and in case of special packets, if the limit is reached max
  1634. * configured vale for the soc/pdev, else false
  1635. */
  1636. static inline bool
  1637. dp_tx_limit_check(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  1638. {
  1639. struct dp_pdev *pdev = vdev->pdev;
  1640. struct dp_soc *soc = pdev->soc;
  1641. if (__dp_tx_limit_check(soc)) {
  1642. if (is_dp_spl_tx_limit_reached(vdev, nbuf)) {
  1643. dp_tx_info("queued packets are more than max tx, drop the frame");
  1644. DP_STATS_INC(vdev, tx_i.dropped.desc_na.num, 1);
  1645. return true;
  1646. }
  1647. }
  1648. if (qdf_atomic_read(&pdev->num_tx_outstanding) >=
  1649. pdev->num_reg_tx_allowed) {
  1650. if (is_dp_spl_tx_limit_reached(vdev, nbuf)) {
  1651. dp_tx_info("queued packets are more than max tx, drop the frame");
  1652. DP_STATS_INC(vdev, tx_i.dropped.desc_na.num, 1);
  1653. DP_STATS_INC(vdev,
  1654. tx_i.dropped.desc_na_exc_outstand.num, 1);
  1655. return true;
  1656. }
  1657. }
  1658. return false;
  1659. }
  1660. #endif
  1661. /**
  1662. * dp_tx_exception_limit_check - Check if allocated tx exception descriptors
  1663. * reached soc max limit
  1664. * @vdev: DP vdev handle
  1665. *
  1666. * Return: true if allocated tx descriptors reached max configured value, else
  1667. * false
  1668. */
  1669. static inline bool
  1670. dp_tx_exception_limit_check(struct dp_vdev *vdev)
  1671. {
  1672. struct dp_pdev *pdev = vdev->pdev;
  1673. struct dp_soc *soc = pdev->soc;
  1674. if (qdf_atomic_read(&soc->num_tx_exception) >=
  1675. soc->num_msdu_exception_desc) {
  1676. dp_info("exc packets are more than max drop the exc pkt");
  1677. DP_STATS_INC(vdev, tx_i.dropped.exc_desc_na.num, 1);
  1678. return true;
  1679. }
  1680. return false;
  1681. }
  1682. #ifdef QCA_SUPPORT_DP_GLOBAL_CTX
  1683. static inline void
  1684. __dp_tx_outstanding_inc(struct dp_soc *soc)
  1685. {
  1686. struct dp_global_context *dp_global;
  1687. dp_global = wlan_objmgr_get_global_ctx();
  1688. qdf_atomic_inc(&dp_global->global_descriptor_in_use);
  1689. }
  1690. /**
  1691. * dp_tx_outstanding_inc - Inc outstanding tx desc values on global and pdev
  1692. * @pdev: DP pdev handle
  1693. *
  1694. * Return: void
  1695. */
  1696. static inline void
  1697. dp_tx_outstanding_inc(struct dp_pdev *pdev)
  1698. {
  1699. __dp_tx_outstanding_inc(pdev->soc);
  1700. qdf_atomic_inc(&pdev->num_tx_outstanding);
  1701. dp_update_tx_desc_stats(pdev);
  1702. }
  1703. static inline void
  1704. __dp_tx_outstanding_dec(struct dp_soc *soc)
  1705. {
  1706. struct dp_global_context *dp_global;
  1707. dp_global = wlan_objmgr_get_global_ctx();
  1708. qdf_atomic_dec(&dp_global->global_descriptor_in_use);
  1709. }
  1710. /**
  1711. * dp_tx_outstanding_dec - Dec outstanding tx desc values on global and pdev
  1712. * @pdev: DP pdev handle
  1713. *
  1714. * Return: void
  1715. */
  1716. static inline void
  1717. dp_tx_outstanding_dec(struct dp_pdev *pdev)
  1718. {
  1719. struct dp_soc *soc = pdev->soc;
  1720. __dp_tx_outstanding_dec(soc);
  1721. qdf_atomic_dec(&pdev->num_tx_outstanding);
  1722. dp_update_tx_desc_stats(pdev);
  1723. }
  1724. #else
  1725. static inline void
  1726. __dp_tx_outstanding_inc(struct dp_soc *soc)
  1727. {
  1728. qdf_atomic_inc(&soc->num_tx_outstanding);
  1729. }
  1730. /**
  1731. * dp_tx_outstanding_inc - Increment outstanding tx desc values on pdev and soc
  1732. * @pdev: DP pdev handle
  1733. *
  1734. * Return: void
  1735. */
  1736. static inline void
  1737. dp_tx_outstanding_inc(struct dp_pdev *pdev)
  1738. {
  1739. struct dp_soc *soc = pdev->soc;
  1740. __dp_tx_outstanding_inc(soc);
  1741. qdf_atomic_inc(&pdev->num_tx_outstanding);
  1742. dp_update_tx_desc_stats(pdev);
  1743. }
  1744. static inline void
  1745. __dp_tx_outstanding_dec(struct dp_soc *soc)
  1746. {
  1747. qdf_atomic_dec(&soc->num_tx_outstanding);
  1748. }
  1749. /**
  1750. * dp_tx_outstanding_dec - Decrement outstanding tx desc values on pdev and soc
  1751. * @pdev: DP pdev handle
  1752. *
  1753. * Return: void
  1754. */
  1755. static inline void
  1756. dp_tx_outstanding_dec(struct dp_pdev *pdev)
  1757. {
  1758. struct dp_soc *soc = pdev->soc;
  1759. __dp_tx_outstanding_dec(soc);
  1760. qdf_atomic_dec(&pdev->num_tx_outstanding);
  1761. dp_update_tx_desc_stats(pdev);
  1762. }
  1763. #endif /* QCA_SUPPORT_DP_GLOBAL_CTX */
  1764. #else //QCA_TX_LIMIT_CHECK
  1765. static inline bool
  1766. __dp_tx_limit_check(struct dp_soc *soc)
  1767. {
  1768. return false;
  1769. }
  1770. static inline bool
  1771. dp_tx_limit_check(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  1772. {
  1773. return false;
  1774. }
  1775. static inline bool
  1776. dp_tx_exception_limit_check(struct dp_vdev *vdev)
  1777. {
  1778. return false;
  1779. }
  1780. static inline void
  1781. __dp_tx_outstanding_inc(struct dp_soc *soc)
  1782. {
  1783. }
  1784. static inline void
  1785. dp_tx_outstanding_inc(struct dp_pdev *pdev)
  1786. {
  1787. qdf_atomic_inc(&pdev->num_tx_outstanding);
  1788. dp_update_tx_desc_stats(pdev);
  1789. }
  1790. static inline void
  1791. __dp_tx_outstanding_dec(struct dp_soc *soc)
  1792. {
  1793. }
  1794. static inline void
  1795. dp_tx_outstanding_dec(struct dp_pdev *pdev)
  1796. {
  1797. qdf_atomic_dec(&pdev->num_tx_outstanding);
  1798. dp_update_tx_desc_stats(pdev);
  1799. }
  1800. #endif //QCA_TX_LIMIT_CHECK
  1801. /**
  1802. * dp_tx_get_pkt_len() - Get the packet length of a msdu
  1803. * @tx_desc: tx descriptor
  1804. *
  1805. * Return: Packet length of a msdu. If the packet is fragmented,
  1806. * it will return the single fragment length.
  1807. *
  1808. * In TSO mode, the msdu from stack will be fragmented into small
  1809. * fragments and each of these new fragments will be transmitted
  1810. * as an individual msdu.
  1811. *
  1812. * Please note that the length of a msdu from stack may be smaller
  1813. * than the length of the total length of the fragments it has been
  1814. * fragmentted because each of the fragments has a nbuf header.
  1815. */
  1816. static inline uint32_t dp_tx_get_pkt_len(struct dp_tx_desc_s *tx_desc)
  1817. {
  1818. return tx_desc->frm_type == dp_tx_frm_tso ?
  1819. tx_desc->msdu_ext_desc->tso_desc->seg.total_len :
  1820. qdf_nbuf_len(tx_desc->nbuf);
  1821. }
  1822. #ifdef FEATURE_RUNTIME_PM
  1823. static inline int dp_get_rtpm_tput_policy_requirement(struct dp_soc *soc)
  1824. {
  1825. return qdf_atomic_read(&soc->rtpm_high_tput_flag) &&
  1826. (hif_rtpm_get_state() <= HIF_RTPM_STATE_ON);
  1827. }
  1828. #else
  1829. static inline int dp_get_rtpm_tput_policy_requirement(struct dp_soc *soc)
  1830. {
  1831. return 0;
  1832. }
  1833. #endif
  1834. #endif