dp_tx.c 182 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include "htt.h"
  20. #include "dp_htt.h"
  21. #include "hal_hw_headers.h"
  22. #include "dp_tx.h"
  23. #include "dp_tx_desc.h"
  24. #include "dp_peer.h"
  25. #include "dp_types.h"
  26. #include "hal_tx.h"
  27. #include "qdf_mem.h"
  28. #include "qdf_nbuf.h"
  29. #include "qdf_net_types.h"
  30. #include "qdf_module.h"
  31. #include <wlan_cfg.h>
  32. #include "dp_ipa.h"
  33. #if defined(MESH_MODE_SUPPORT) || defined(FEATURE_PERPKT_INFO)
  34. #include "if_meta_hdr.h"
  35. #endif
  36. #include "enet.h"
  37. #include "dp_internal.h"
  38. #ifdef ATH_SUPPORT_IQUE
  39. #include "dp_txrx_me.h"
  40. #endif
  41. #include "dp_hist.h"
  42. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  43. #include <wlan_dp_swlm.h>
  44. #endif
  45. #ifdef WIFI_MONITOR_SUPPORT
  46. #include <dp_mon.h>
  47. #endif
  48. #ifdef FEATURE_WDS
  49. #include "dp_txrx_wds.h"
  50. #endif
  51. #include "cdp_txrx_cmn_reg.h"
  52. #ifdef CONFIG_SAWF
  53. #include <dp_sawf.h>
  54. #endif
  55. /* Flag to skip CCE classify when mesh or tid override enabled */
  56. #define DP_TX_SKIP_CCE_CLASSIFY \
  57. (DP_TXRX_HLOS_TID_OVERRIDE_ENABLED | DP_TX_MESH_ENABLED)
  58. /* TODO Add support in TSO */
  59. #define DP_DESC_NUM_FRAG(x) 0
  60. /* disable TQM_BYPASS */
  61. #define TQM_BYPASS_WAR 0
  62. #define DP_RETRY_COUNT 7
  63. #ifdef WLAN_PEER_JITTER
  64. #define DP_AVG_JITTER_WEIGHT_DENOM 4
  65. #define DP_AVG_DELAY_WEIGHT_DENOM 3
  66. #endif
  67. #ifdef QCA_DP_TX_FW_METADATA_V2
  68. #define DP_TX_TCL_METADATA_PDEV_ID_SET(_var, _val)\
  69. HTT_TX_TCL_METADATA_V2_PDEV_ID_SET(_var, _val)
  70. #define DP_TX_TCL_METADATA_VALID_HTT_SET(_var, _val) \
  71. HTT_TX_TCL_METADATA_V2_VALID_HTT_SET(_var, _val)
  72. #define DP_TX_TCL_METADATA_TYPE_SET(_var, _val) \
  73. HTT_TX_TCL_METADATA_TYPE_V2_SET(_var, _val)
  74. #define DP_TX_TCL_METADATA_HOST_INSPECTED_SET(_var, _val) \
  75. HTT_TX_TCL_METADATA_V2_HOST_INSPECTED_SET(_var, _val)
  76. #define DP_TX_TCL_METADATA_PEER_ID_SET(_var, _val) \
  77. HTT_TX_TCL_METADATA_V2_PEER_ID_SET(_var, _val)
  78. #define DP_TX_TCL_METADATA_VDEV_ID_SET(_var, _val) \
  79. HTT_TX_TCL_METADATA_V2_VDEV_ID_SET(_var, _val)
  80. #define DP_TCL_METADATA_TYPE_PEER_BASED \
  81. HTT_TCL_METADATA_V2_TYPE_PEER_BASED
  82. #define DP_TCL_METADATA_TYPE_VDEV_BASED \
  83. HTT_TCL_METADATA_V2_TYPE_VDEV_BASED
  84. #else
  85. #define DP_TX_TCL_METADATA_PDEV_ID_SET(_var, _val)\
  86. HTT_TX_TCL_METADATA_PDEV_ID_SET(_var, _val)
  87. #define DP_TX_TCL_METADATA_VALID_HTT_SET(_var, _val) \
  88. HTT_TX_TCL_METADATA_VALID_HTT_SET(_var, _val)
  89. #define DP_TX_TCL_METADATA_TYPE_SET(_var, _val) \
  90. HTT_TX_TCL_METADATA_TYPE_SET(_var, _val)
  91. #define DP_TX_TCL_METADATA_HOST_INSPECTED_SET(_var, _val) \
  92. HTT_TX_TCL_METADATA_HOST_INSPECTED_SET(_var, _val)
  93. #define DP_TX_TCL_METADATA_PEER_ID_SET(_var, _val) \
  94. HTT_TX_TCL_METADATA_PEER_ID_SET(_var, _val)
  95. #define DP_TX_TCL_METADATA_VDEV_ID_SET(_var, _val) \
  96. HTT_TX_TCL_METADATA_VDEV_ID_SET(_var, _val)
  97. #define DP_TCL_METADATA_TYPE_PEER_BASED \
  98. HTT_TCL_METADATA_TYPE_PEER_BASED
  99. #define DP_TCL_METADATA_TYPE_VDEV_BASED \
  100. HTT_TCL_METADATA_TYPE_VDEV_BASED
  101. #endif
  102. #define DP_GET_HW_LINK_ID_FRM_PPDU_ID(PPDU_ID, LINK_ID_OFFSET, LINK_ID_BITS) \
  103. (((PPDU_ID) >> (LINK_ID_OFFSET)) & ((1 << (LINK_ID_BITS)) - 1))
  104. /*mapping between hal encrypt type and cdp_sec_type*/
  105. uint8_t sec_type_map[MAX_CDP_SEC_TYPE] = {HAL_TX_ENCRYPT_TYPE_NO_CIPHER,
  106. HAL_TX_ENCRYPT_TYPE_WEP_128,
  107. HAL_TX_ENCRYPT_TYPE_WEP_104,
  108. HAL_TX_ENCRYPT_TYPE_WEP_40,
  109. HAL_TX_ENCRYPT_TYPE_TKIP_WITH_MIC,
  110. HAL_TX_ENCRYPT_TYPE_TKIP_NO_MIC,
  111. HAL_TX_ENCRYPT_TYPE_AES_CCMP_128,
  112. HAL_TX_ENCRYPT_TYPE_WAPI,
  113. HAL_TX_ENCRYPT_TYPE_AES_CCMP_256,
  114. HAL_TX_ENCRYPT_TYPE_AES_GCMP_128,
  115. HAL_TX_ENCRYPT_TYPE_AES_GCMP_256,
  116. HAL_TX_ENCRYPT_TYPE_WAPI_GCM_SM4};
  117. qdf_export_symbol(sec_type_map);
  118. #ifdef WLAN_FEATURE_DP_TX_DESC_HISTORY
  119. static inline enum dp_tx_event_type dp_tx_get_event_type(uint32_t flags)
  120. {
  121. enum dp_tx_event_type type;
  122. if (flags & DP_TX_DESC_FLAG_FLUSH)
  123. type = DP_TX_DESC_FLUSH;
  124. else if (flags & DP_TX_DESC_FLAG_TX_COMP_ERR)
  125. type = DP_TX_COMP_UNMAP_ERR;
  126. else if (flags & DP_TX_DESC_FLAG_COMPLETED_TX)
  127. type = DP_TX_COMP_UNMAP;
  128. else
  129. type = DP_TX_DESC_UNMAP;
  130. return type;
  131. }
  132. static inline void
  133. dp_tx_desc_history_add(struct dp_soc *soc, dma_addr_t paddr,
  134. qdf_nbuf_t skb, uint32_t sw_cookie,
  135. enum dp_tx_event_type type)
  136. {
  137. struct dp_tx_tcl_history *tx_tcl_history = &soc->tx_tcl_history;
  138. struct dp_tx_comp_history *tx_comp_history = &soc->tx_comp_history;
  139. struct dp_tx_desc_event *entry;
  140. uint32_t idx;
  141. uint16_t slot;
  142. switch (type) {
  143. case DP_TX_COMP_UNMAP:
  144. case DP_TX_COMP_UNMAP_ERR:
  145. case DP_TX_COMP_MSDU_EXT:
  146. if (qdf_unlikely(!tx_comp_history->allocated))
  147. return;
  148. dp_get_frag_hist_next_atomic_idx(&tx_comp_history->index, &idx,
  149. &slot,
  150. DP_TX_COMP_HIST_SLOT_SHIFT,
  151. DP_TX_COMP_HIST_PER_SLOT_MAX,
  152. DP_TX_COMP_HISTORY_SIZE);
  153. entry = &tx_comp_history->entry[slot][idx];
  154. break;
  155. case DP_TX_DESC_MAP:
  156. case DP_TX_DESC_UNMAP:
  157. case DP_TX_DESC_COOKIE:
  158. case DP_TX_DESC_FLUSH:
  159. if (qdf_unlikely(!tx_tcl_history->allocated))
  160. return;
  161. dp_get_frag_hist_next_atomic_idx(&tx_tcl_history->index, &idx,
  162. &slot,
  163. DP_TX_TCL_HIST_SLOT_SHIFT,
  164. DP_TX_TCL_HIST_PER_SLOT_MAX,
  165. DP_TX_TCL_HISTORY_SIZE);
  166. entry = &tx_tcl_history->entry[slot][idx];
  167. break;
  168. default:
  169. dp_info_rl("Invalid dp_tx_event_type: %d", type);
  170. return;
  171. }
  172. entry->skb = skb;
  173. entry->paddr = paddr;
  174. entry->sw_cookie = sw_cookie;
  175. entry->type = type;
  176. entry->ts = qdf_get_log_timestamp();
  177. }
  178. static inline void
  179. dp_tx_tso_seg_history_add(struct dp_soc *soc,
  180. struct qdf_tso_seg_elem_t *tso_seg,
  181. qdf_nbuf_t skb, uint32_t sw_cookie,
  182. enum dp_tx_event_type type)
  183. {
  184. int i;
  185. for (i = 1; i < tso_seg->seg.num_frags; i++) {
  186. dp_tx_desc_history_add(soc, tso_seg->seg.tso_frags[i].paddr,
  187. skb, sw_cookie, type);
  188. }
  189. if (!tso_seg->next)
  190. dp_tx_desc_history_add(soc, tso_seg->seg.tso_frags[0].paddr,
  191. skb, 0xFFFFFFFF, type);
  192. }
  193. static inline void
  194. dp_tx_tso_history_add(struct dp_soc *soc, struct qdf_tso_info_t tso_info,
  195. qdf_nbuf_t skb, uint32_t sw_cookie,
  196. enum dp_tx_event_type type)
  197. {
  198. struct qdf_tso_seg_elem_t *curr_seg = tso_info.tso_seg_list;
  199. uint32_t num_segs = tso_info.num_segs;
  200. while (num_segs) {
  201. dp_tx_tso_seg_history_add(soc, curr_seg, skb, sw_cookie, type);
  202. curr_seg = curr_seg->next;
  203. num_segs--;
  204. }
  205. }
  206. #else
  207. static inline enum dp_tx_event_type dp_tx_get_event_type(uint32_t flags)
  208. {
  209. return DP_TX_DESC_INVAL_EVT;
  210. }
  211. static inline void
  212. dp_tx_desc_history_add(struct dp_soc *soc, dma_addr_t paddr,
  213. qdf_nbuf_t skb, uint32_t sw_cookie,
  214. enum dp_tx_event_type type)
  215. {
  216. }
  217. static inline void
  218. dp_tx_tso_seg_history_add(struct dp_soc *soc,
  219. struct qdf_tso_seg_elem_t *tso_seg,
  220. qdf_nbuf_t skb, uint32_t sw_cookie,
  221. enum dp_tx_event_type type)
  222. {
  223. }
  224. static inline void
  225. dp_tx_tso_history_add(struct dp_soc *soc, struct qdf_tso_info_t tso_info,
  226. qdf_nbuf_t skb, uint32_t sw_cookie,
  227. enum dp_tx_event_type type)
  228. {
  229. }
  230. #endif /* WLAN_FEATURE_DP_TX_DESC_HISTORY */
  231. /**
  232. * dp_is_tput_high() - Check if throughput is high
  233. *
  234. * @soc: core txrx main context
  235. *
  236. * The current function is based of the RTPM tput policy variable where RTPM is
  237. * avoided based on throughput.
  238. */
  239. static inline int dp_is_tput_high(struct dp_soc *soc)
  240. {
  241. return dp_get_rtpm_tput_policy_requirement(soc);
  242. }
  243. #if defined(FEATURE_TSO)
  244. /**
  245. * dp_tx_tso_unmap_segment() - Unmap TSO segment
  246. *
  247. * @soc: core txrx main context
  248. * @seg_desc: tso segment descriptor
  249. * @num_seg_desc: tso number segment descriptor
  250. */
  251. static void dp_tx_tso_unmap_segment(
  252. struct dp_soc *soc,
  253. struct qdf_tso_seg_elem_t *seg_desc,
  254. struct qdf_tso_num_seg_elem_t *num_seg_desc)
  255. {
  256. TSO_DEBUG("%s: Unmap the tso segment", __func__);
  257. if (qdf_unlikely(!seg_desc)) {
  258. DP_TRACE(ERROR, "%s %d TSO desc is NULL!",
  259. __func__, __LINE__);
  260. qdf_assert(0);
  261. } else if (qdf_unlikely(!num_seg_desc)) {
  262. DP_TRACE(ERROR, "%s %d TSO num desc is NULL!",
  263. __func__, __LINE__);
  264. qdf_assert(0);
  265. } else {
  266. bool is_last_seg;
  267. /* no tso segment left to do dma unmap */
  268. if (num_seg_desc->num_seg.tso_cmn_num_seg < 1)
  269. return;
  270. is_last_seg = (num_seg_desc->num_seg.tso_cmn_num_seg == 1) ?
  271. true : false;
  272. qdf_nbuf_unmap_tso_segment(soc->osdev,
  273. seg_desc, is_last_seg);
  274. num_seg_desc->num_seg.tso_cmn_num_seg--;
  275. }
  276. }
  277. /**
  278. * dp_tx_tso_desc_release() - Release the tso segment and tso_cmn_num_seg
  279. * back to the freelist
  280. *
  281. * @soc: soc device handle
  282. * @tx_desc: Tx software descriptor
  283. */
  284. static void dp_tx_tso_desc_release(struct dp_soc *soc,
  285. struct dp_tx_desc_s *tx_desc)
  286. {
  287. TSO_DEBUG("%s: Free the tso descriptor", __func__);
  288. if (qdf_unlikely(!tx_desc->msdu_ext_desc->tso_desc)) {
  289. dp_tx_err("SO desc is NULL!");
  290. qdf_assert(0);
  291. } else if (qdf_unlikely(!tx_desc->msdu_ext_desc->tso_num_desc)) {
  292. dp_tx_err("TSO num desc is NULL!");
  293. qdf_assert(0);
  294. } else {
  295. struct qdf_tso_num_seg_elem_t *tso_num_desc =
  296. (struct qdf_tso_num_seg_elem_t *)tx_desc->
  297. msdu_ext_desc->tso_num_desc;
  298. /* Add the tso num segment into the free list */
  299. if (tso_num_desc->num_seg.tso_cmn_num_seg == 0) {
  300. dp_tso_num_seg_free(soc, tx_desc->pool_id,
  301. tx_desc->msdu_ext_desc->
  302. tso_num_desc);
  303. tx_desc->msdu_ext_desc->tso_num_desc = NULL;
  304. DP_STATS_INC(tx_desc->pdev, tso_stats.tso_comp, 1);
  305. }
  306. /* Add the tso segment into the free list*/
  307. dp_tx_tso_desc_free(soc,
  308. tx_desc->pool_id, tx_desc->msdu_ext_desc->
  309. tso_desc);
  310. tx_desc->msdu_ext_desc->tso_desc = NULL;
  311. }
  312. }
  313. #else
  314. static void dp_tx_tso_unmap_segment(
  315. struct dp_soc *soc,
  316. struct qdf_tso_seg_elem_t *seg_desc,
  317. struct qdf_tso_num_seg_elem_t *num_seg_desc)
  318. {
  319. }
  320. static void dp_tx_tso_desc_release(struct dp_soc *soc,
  321. struct dp_tx_desc_s *tx_desc)
  322. {
  323. }
  324. #endif
  325. #ifdef WLAN_SUPPORT_PPEDS
  326. static inline int
  327. dp_tx_release_ds_tx_desc(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc,
  328. uint8_t desc_pool_id)
  329. {
  330. if (tx_desc->flags & DP_TX_DESC_FLAG_PPEDS) {
  331. __dp_tx_outstanding_dec(soc);
  332. dp_tx_desc_free(soc, tx_desc, desc_pool_id);
  333. return 1;
  334. }
  335. return 0;
  336. }
  337. #else
  338. static inline int
  339. dp_tx_release_ds_tx_desc(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc,
  340. uint8_t desc_pool_id)
  341. {
  342. return 0;
  343. }
  344. #endif
  345. void
  346. dp_tx_desc_release(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc,
  347. uint8_t desc_pool_id)
  348. {
  349. struct dp_pdev *pdev = tx_desc->pdev;
  350. uint8_t comp_status = 0;
  351. if (dp_tx_release_ds_tx_desc(soc, tx_desc, desc_pool_id))
  352. return;
  353. qdf_assert(pdev);
  354. soc = pdev->soc;
  355. dp_tx_outstanding_dec(pdev);
  356. if (tx_desc->msdu_ext_desc) {
  357. if (tx_desc->frm_type == dp_tx_frm_tso)
  358. dp_tx_tso_desc_release(soc, tx_desc);
  359. if (tx_desc->flags & DP_TX_DESC_FLAG_ME)
  360. dp_tx_me_free_buf(tx_desc->pdev,
  361. tx_desc->msdu_ext_desc->me_buffer);
  362. dp_tx_ext_desc_free(soc, tx_desc->msdu_ext_desc, desc_pool_id);
  363. }
  364. if (tx_desc->flags & DP_TX_DESC_FLAG_TO_FW)
  365. qdf_atomic_dec(&soc->num_tx_exception);
  366. if (HAL_TX_COMP_RELEASE_SOURCE_TQM ==
  367. tx_desc->buffer_src)
  368. comp_status = hal_tx_comp_get_release_reason(&tx_desc->comp,
  369. soc->hal_soc);
  370. else
  371. comp_status = HAL_TX_COMP_RELEASE_REASON_FW;
  372. dp_tx_debug("Tx Completion Release desc %d status %d outstanding %d",
  373. tx_desc->id, comp_status,
  374. qdf_atomic_read(&pdev->num_tx_outstanding));
  375. dp_tx_desc_free(soc, tx_desc, desc_pool_id);
  376. return;
  377. }
  378. /**
  379. * dp_tx_prepare_htt_metadata() - Prepare HTT metadata for special frames
  380. * @vdev: DP vdev Handle
  381. * @nbuf: skb
  382. * @msdu_info: msdu_info required to create HTT metadata
  383. *
  384. * Prepares and fills HTT metadata in the frame pre-header for special frames
  385. * that should be transmitted using varying transmit parameters.
  386. * There are 2 VDEV modes that currently needs this special metadata -
  387. * 1) Mesh Mode
  388. * 2) DSRC Mode
  389. *
  390. * Return: HTT metadata size
  391. *
  392. */
  393. static uint8_t dp_tx_prepare_htt_metadata(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  394. struct dp_tx_msdu_info_s *msdu_info)
  395. {
  396. uint32_t *meta_data = msdu_info->meta_data;
  397. struct htt_tx_msdu_desc_ext2_t *desc_ext =
  398. (struct htt_tx_msdu_desc_ext2_t *) meta_data;
  399. uint8_t htt_desc_size;
  400. /* Size rounded of multiple of 8 bytes */
  401. uint8_t htt_desc_size_aligned;
  402. uint8_t *hdr = NULL;
  403. /*
  404. * Metadata - HTT MSDU Extension header
  405. */
  406. htt_desc_size = sizeof(struct htt_tx_msdu_desc_ext2_t);
  407. htt_desc_size_aligned = (htt_desc_size + 7) & ~0x7;
  408. if (vdev->mesh_vdev || msdu_info->is_tx_sniffer ||
  409. HTT_TX_MSDU_EXT2_DESC_FLAG_VALID_KEY_FLAGS_GET(msdu_info->
  410. meta_data[0]) ||
  411. msdu_info->exception_fw) {
  412. if (qdf_unlikely(qdf_nbuf_headroom(nbuf) <
  413. htt_desc_size_aligned)) {
  414. nbuf = qdf_nbuf_realloc_headroom(nbuf,
  415. htt_desc_size_aligned);
  416. if (!nbuf) {
  417. /*
  418. * qdf_nbuf_realloc_headroom won't do skb_clone
  419. * as skb_realloc_headroom does. so, no free is
  420. * needed here.
  421. */
  422. DP_STATS_INC(vdev,
  423. tx_i.dropped.headroom_insufficient,
  424. 1);
  425. qdf_print(" %s[%d] skb_realloc_headroom failed",
  426. __func__, __LINE__);
  427. return 0;
  428. }
  429. }
  430. /* Fill and add HTT metaheader */
  431. hdr = qdf_nbuf_push_head(nbuf, htt_desc_size_aligned);
  432. if (!hdr) {
  433. dp_tx_err("Error in filling HTT metadata");
  434. return 0;
  435. }
  436. qdf_mem_copy(hdr, desc_ext, htt_desc_size);
  437. } else if (vdev->opmode == wlan_op_mode_ocb) {
  438. /* Todo - Add support for DSRC */
  439. }
  440. return htt_desc_size_aligned;
  441. }
  442. /**
  443. * dp_tx_prepare_tso_ext_desc() - Prepare MSDU extension descriptor for TSO
  444. * @tso_seg: TSO segment to process
  445. * @ext_desc: Pointer to MSDU extension descriptor
  446. *
  447. * Return: void
  448. */
  449. #if defined(FEATURE_TSO)
  450. static void dp_tx_prepare_tso_ext_desc(struct qdf_tso_seg_t *tso_seg,
  451. void *ext_desc)
  452. {
  453. uint8_t num_frag;
  454. uint32_t tso_flags;
  455. /*
  456. * Set tso_en, tcp_flags(NS, CWR, ECE, URG, ACK, PSH, RST, SYN, FIN),
  457. * tcp_flag_mask
  458. *
  459. * Checksum enable flags are set in TCL descriptor and not in Extension
  460. * Descriptor (H/W ignores checksum_en flags in MSDU ext descriptor)
  461. */
  462. tso_flags = *(uint32_t *) &tso_seg->tso_flags;
  463. hal_tx_ext_desc_set_tso_flags(ext_desc, tso_flags);
  464. hal_tx_ext_desc_set_msdu_length(ext_desc, tso_seg->tso_flags.l2_len,
  465. tso_seg->tso_flags.ip_len);
  466. hal_tx_ext_desc_set_tcp_seq(ext_desc, tso_seg->tso_flags.tcp_seq_num);
  467. hal_tx_ext_desc_set_ip_id(ext_desc, tso_seg->tso_flags.ip_id);
  468. for (num_frag = 0; num_frag < tso_seg->num_frags; num_frag++) {
  469. uint32_t lo = 0;
  470. uint32_t hi = 0;
  471. qdf_assert_always((tso_seg->tso_frags[num_frag].paddr) &&
  472. (tso_seg->tso_frags[num_frag].length));
  473. qdf_dmaaddr_to_32s(
  474. tso_seg->tso_frags[num_frag].paddr, &lo, &hi);
  475. hal_tx_ext_desc_set_buffer(ext_desc, num_frag, lo, hi,
  476. tso_seg->tso_frags[num_frag].length);
  477. }
  478. return;
  479. }
  480. #else
  481. static void dp_tx_prepare_tso_ext_desc(struct qdf_tso_seg_t *tso_seg,
  482. void *ext_desc)
  483. {
  484. return;
  485. }
  486. #endif
  487. #if defined(FEATURE_TSO)
  488. /**
  489. * dp_tx_free_tso_seg_list() - Loop through the tso segments
  490. * allocated and free them
  491. * @soc: soc handle
  492. * @free_seg: list of tso segments
  493. * @msdu_info: msdu descriptor
  494. *
  495. * Return: void
  496. */
  497. static void dp_tx_free_tso_seg_list(
  498. struct dp_soc *soc,
  499. struct qdf_tso_seg_elem_t *free_seg,
  500. struct dp_tx_msdu_info_s *msdu_info)
  501. {
  502. struct qdf_tso_seg_elem_t *next_seg;
  503. while (free_seg) {
  504. next_seg = free_seg->next;
  505. dp_tx_tso_desc_free(soc,
  506. msdu_info->tx_queue.desc_pool_id,
  507. free_seg);
  508. free_seg = next_seg;
  509. }
  510. }
  511. /**
  512. * dp_tx_free_tso_num_seg_list() - Loop through the tso num segments
  513. * allocated and free them
  514. * @soc: soc handle
  515. * @free_num_seg: list of tso number segments
  516. * @msdu_info: msdu descriptor
  517. *
  518. * Return: void
  519. */
  520. static void dp_tx_free_tso_num_seg_list(
  521. struct dp_soc *soc,
  522. struct qdf_tso_num_seg_elem_t *free_num_seg,
  523. struct dp_tx_msdu_info_s *msdu_info)
  524. {
  525. struct qdf_tso_num_seg_elem_t *next_num_seg;
  526. while (free_num_seg) {
  527. next_num_seg = free_num_seg->next;
  528. dp_tso_num_seg_free(soc,
  529. msdu_info->tx_queue.desc_pool_id,
  530. free_num_seg);
  531. free_num_seg = next_num_seg;
  532. }
  533. }
  534. /**
  535. * dp_tx_unmap_tso_seg_list() - Loop through the tso segments
  536. * do dma unmap for each segment
  537. * @soc: soc handle
  538. * @free_seg: list of tso segments
  539. * @num_seg_desc: tso number segment descriptor
  540. *
  541. * Return: void
  542. */
  543. static void dp_tx_unmap_tso_seg_list(
  544. struct dp_soc *soc,
  545. struct qdf_tso_seg_elem_t *free_seg,
  546. struct qdf_tso_num_seg_elem_t *num_seg_desc)
  547. {
  548. struct qdf_tso_seg_elem_t *next_seg;
  549. if (qdf_unlikely(!num_seg_desc)) {
  550. DP_TRACE(ERROR, "TSO number seg desc is NULL!");
  551. return;
  552. }
  553. while (free_seg) {
  554. next_seg = free_seg->next;
  555. dp_tx_tso_unmap_segment(soc, free_seg, num_seg_desc);
  556. free_seg = next_seg;
  557. }
  558. }
  559. #ifdef FEATURE_TSO_STATS
  560. /**
  561. * dp_tso_get_stats_idx() - Retrieve the tso packet id
  562. * @pdev: pdev handle
  563. *
  564. * Return: id
  565. */
  566. static uint32_t dp_tso_get_stats_idx(struct dp_pdev *pdev)
  567. {
  568. uint32_t stats_idx;
  569. stats_idx = (((uint32_t)qdf_atomic_inc_return(&pdev->tso_idx))
  570. % CDP_MAX_TSO_PACKETS);
  571. return stats_idx;
  572. }
  573. #else
  574. static int dp_tso_get_stats_idx(struct dp_pdev *pdev)
  575. {
  576. return 0;
  577. }
  578. #endif /* FEATURE_TSO_STATS */
  579. /**
  580. * dp_tx_free_remaining_tso_desc() - do dma unmap for tso segments if any,
  581. * free the tso segments descriptor and
  582. * tso num segments descriptor
  583. * @soc: soc handle
  584. * @msdu_info: msdu descriptor
  585. * @tso_seg_unmap: flag to show if dma unmap is necessary
  586. *
  587. * Return: void
  588. */
  589. static void dp_tx_free_remaining_tso_desc(struct dp_soc *soc,
  590. struct dp_tx_msdu_info_s *msdu_info,
  591. bool tso_seg_unmap)
  592. {
  593. struct qdf_tso_info_t *tso_info = &msdu_info->u.tso_info;
  594. struct qdf_tso_seg_elem_t *free_seg = tso_info->tso_seg_list;
  595. struct qdf_tso_num_seg_elem_t *tso_num_desc =
  596. tso_info->tso_num_seg_list;
  597. /* do dma unmap for each segment */
  598. if (tso_seg_unmap)
  599. dp_tx_unmap_tso_seg_list(soc, free_seg, tso_num_desc);
  600. /* free all tso number segment descriptor though looks only have 1 */
  601. dp_tx_free_tso_num_seg_list(soc, tso_num_desc, msdu_info);
  602. /* free all tso segment descriptor */
  603. dp_tx_free_tso_seg_list(soc, free_seg, msdu_info);
  604. }
  605. /**
  606. * dp_tx_prepare_tso() - Given a jumbo msdu, prepare the TSO info
  607. * @vdev: virtual device handle
  608. * @msdu: network buffer
  609. * @msdu_info: meta data associated with the msdu
  610. *
  611. * Return: QDF_STATUS_SUCCESS success
  612. */
  613. static QDF_STATUS dp_tx_prepare_tso(struct dp_vdev *vdev,
  614. qdf_nbuf_t msdu, struct dp_tx_msdu_info_s *msdu_info)
  615. {
  616. struct qdf_tso_seg_elem_t *tso_seg;
  617. int num_seg = qdf_nbuf_get_tso_num_seg(msdu);
  618. struct dp_soc *soc = vdev->pdev->soc;
  619. struct dp_pdev *pdev = vdev->pdev;
  620. struct qdf_tso_info_t *tso_info;
  621. struct qdf_tso_num_seg_elem_t *tso_num_seg;
  622. tso_info = &msdu_info->u.tso_info;
  623. tso_info->curr_seg = NULL;
  624. tso_info->tso_seg_list = NULL;
  625. tso_info->num_segs = num_seg;
  626. msdu_info->frm_type = dp_tx_frm_tso;
  627. tso_info->tso_num_seg_list = NULL;
  628. TSO_DEBUG(" %s: num_seg: %d", __func__, num_seg);
  629. while (num_seg) {
  630. tso_seg = dp_tx_tso_desc_alloc(
  631. soc, msdu_info->tx_queue.desc_pool_id);
  632. if (tso_seg) {
  633. tso_seg->next = tso_info->tso_seg_list;
  634. tso_info->tso_seg_list = tso_seg;
  635. num_seg--;
  636. } else {
  637. dp_err_rl("Failed to alloc tso seg desc");
  638. DP_STATS_INC_PKT(vdev->pdev,
  639. tso_stats.tso_no_mem_dropped, 1,
  640. qdf_nbuf_len(msdu));
  641. dp_tx_free_remaining_tso_desc(soc, msdu_info, false);
  642. return QDF_STATUS_E_NOMEM;
  643. }
  644. }
  645. TSO_DEBUG(" %s: num_seg: %d", __func__, num_seg);
  646. tso_num_seg = dp_tso_num_seg_alloc(soc,
  647. msdu_info->tx_queue.desc_pool_id);
  648. if (tso_num_seg) {
  649. tso_num_seg->next = tso_info->tso_num_seg_list;
  650. tso_info->tso_num_seg_list = tso_num_seg;
  651. } else {
  652. DP_TRACE(ERROR, "%s: Failed to alloc - Number of segs desc",
  653. __func__);
  654. dp_tx_free_remaining_tso_desc(soc, msdu_info, false);
  655. return QDF_STATUS_E_NOMEM;
  656. }
  657. msdu_info->num_seg =
  658. qdf_nbuf_get_tso_info(soc->osdev, msdu, tso_info);
  659. TSO_DEBUG(" %s: msdu_info->num_seg: %d", __func__,
  660. msdu_info->num_seg);
  661. if (!(msdu_info->num_seg)) {
  662. /*
  663. * Free allocated TSO seg desc and number seg desc,
  664. * do unmap for segments if dma map has done.
  665. */
  666. DP_TRACE(ERROR, "%s: Failed to get tso info", __func__);
  667. dp_tx_free_remaining_tso_desc(soc, msdu_info, true);
  668. return QDF_STATUS_E_INVAL;
  669. }
  670. dp_tx_tso_history_add(soc, msdu_info->u.tso_info,
  671. msdu, 0, DP_TX_DESC_MAP);
  672. tso_info->curr_seg = tso_info->tso_seg_list;
  673. tso_info->msdu_stats_idx = dp_tso_get_stats_idx(pdev);
  674. dp_tso_packet_update(pdev, tso_info->msdu_stats_idx,
  675. msdu, msdu_info->num_seg);
  676. dp_tso_segment_stats_update(pdev, tso_info->tso_seg_list,
  677. tso_info->msdu_stats_idx);
  678. dp_stats_tso_segment_histogram_update(pdev, msdu_info->num_seg);
  679. return QDF_STATUS_SUCCESS;
  680. }
  681. #else
  682. static QDF_STATUS dp_tx_prepare_tso(struct dp_vdev *vdev,
  683. qdf_nbuf_t msdu, struct dp_tx_msdu_info_s *msdu_info)
  684. {
  685. return QDF_STATUS_E_NOMEM;
  686. }
  687. #endif
  688. QDF_COMPILE_TIME_ASSERT(dp_tx_htt_metadata_len_check,
  689. (DP_TX_MSDU_INFO_META_DATA_DWORDS * 4 >=
  690. sizeof(struct htt_tx_msdu_desc_ext2_t)));
  691. /**
  692. * dp_tx_prepare_ext_desc() - Allocate and prepare MSDU extension descriptor
  693. * @vdev: DP Vdev handle
  694. * @msdu_info: MSDU info to be setup in MSDU extension descriptor
  695. * @desc_pool_id: Descriptor Pool ID
  696. *
  697. * Return:
  698. */
  699. static
  700. struct dp_tx_ext_desc_elem_s *dp_tx_prepare_ext_desc(struct dp_vdev *vdev,
  701. struct dp_tx_msdu_info_s *msdu_info, uint8_t desc_pool_id)
  702. {
  703. uint8_t i;
  704. uint8_t cached_ext_desc[HAL_TX_EXT_DESC_WITH_META_DATA];
  705. struct dp_tx_seg_info_s *seg_info;
  706. struct dp_tx_ext_desc_elem_s *msdu_ext_desc;
  707. struct dp_soc *soc = vdev->pdev->soc;
  708. /* Allocate an extension descriptor */
  709. msdu_ext_desc = dp_tx_ext_desc_alloc(soc, desc_pool_id);
  710. qdf_mem_zero(&cached_ext_desc[0], HAL_TX_EXT_DESC_WITH_META_DATA);
  711. if (!msdu_ext_desc) {
  712. DP_STATS_INC(vdev, tx_i.dropped.desc_na.num, 1);
  713. return NULL;
  714. }
  715. if (msdu_info->exception_fw &&
  716. qdf_unlikely(vdev->mesh_vdev)) {
  717. qdf_mem_copy(&cached_ext_desc[HAL_TX_EXTENSION_DESC_LEN_BYTES],
  718. &msdu_info->meta_data[0],
  719. sizeof(struct htt_tx_msdu_desc_ext2_t));
  720. qdf_atomic_inc(&soc->num_tx_exception);
  721. msdu_ext_desc->flags |= DP_TX_EXT_DESC_FLAG_METADATA_VALID;
  722. }
  723. switch (msdu_info->frm_type) {
  724. case dp_tx_frm_sg:
  725. case dp_tx_frm_me:
  726. case dp_tx_frm_raw:
  727. seg_info = msdu_info->u.sg_info.curr_seg;
  728. /* Update the buffer pointers in MSDU Extension Descriptor */
  729. for (i = 0; i < seg_info->frag_cnt; i++) {
  730. hal_tx_ext_desc_set_buffer(&cached_ext_desc[0], i,
  731. seg_info->frags[i].paddr_lo,
  732. seg_info->frags[i].paddr_hi,
  733. seg_info->frags[i].len);
  734. }
  735. break;
  736. case dp_tx_frm_tso:
  737. dp_tx_prepare_tso_ext_desc(&msdu_info->u.tso_info.curr_seg->seg,
  738. &cached_ext_desc[0]);
  739. break;
  740. default:
  741. break;
  742. }
  743. QDF_TRACE_HEX_DUMP(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  744. cached_ext_desc, HAL_TX_EXT_DESC_WITH_META_DATA);
  745. hal_tx_ext_desc_sync(&cached_ext_desc[0],
  746. msdu_ext_desc->vaddr);
  747. return msdu_ext_desc;
  748. }
  749. /**
  750. * dp_tx_trace_pkt() - Trace TX packet at DP layer
  751. * @soc: datapath SOC
  752. * @skb: skb to be traced
  753. * @msdu_id: msdu_id of the packet
  754. * @vdev_id: vdev_id of the packet
  755. *
  756. * Return: None
  757. */
  758. #ifdef DP_DISABLE_TX_PKT_TRACE
  759. static void dp_tx_trace_pkt(struct dp_soc *soc,
  760. qdf_nbuf_t skb, uint16_t msdu_id,
  761. uint8_t vdev_id)
  762. {
  763. }
  764. #else
  765. static void dp_tx_trace_pkt(struct dp_soc *soc,
  766. qdf_nbuf_t skb, uint16_t msdu_id,
  767. uint8_t vdev_id)
  768. {
  769. if (dp_is_tput_high(soc))
  770. return;
  771. QDF_NBUF_CB_TX_PACKET_TRACK(skb) = QDF_NBUF_TX_PKT_DATA_TRACK;
  772. QDF_NBUF_CB_TX_DP_TRACE(skb) = 1;
  773. DPTRACE(qdf_dp_trace_ptr(skb,
  774. QDF_DP_TRACE_LI_DP_TX_PACKET_PTR_RECORD,
  775. QDF_TRACE_DEFAULT_PDEV_ID,
  776. qdf_nbuf_data_addr(skb),
  777. sizeof(qdf_nbuf_data(skb)),
  778. msdu_id, vdev_id, 0));
  779. qdf_dp_trace_log_pkt(vdev_id, skb, QDF_TX, QDF_TRACE_DEFAULT_PDEV_ID);
  780. DPTRACE(qdf_dp_trace_data_pkt(skb, QDF_TRACE_DEFAULT_PDEV_ID,
  781. QDF_DP_TRACE_LI_DP_TX_PACKET_RECORD,
  782. msdu_id, QDF_TX));
  783. }
  784. #endif
  785. #ifdef WLAN_DP_FEATURE_MARK_ICMP_REQ_TO_FW
  786. /**
  787. * dp_tx_is_nbuf_marked_exception() - Check if the packet has been marked as
  788. * exception by the upper layer (OS_IF)
  789. * @soc: DP soc handle
  790. * @nbuf: packet to be transmitted
  791. *
  792. * Return: 1 if the packet is marked as exception,
  793. * 0, if the packet is not marked as exception.
  794. */
  795. static inline int dp_tx_is_nbuf_marked_exception(struct dp_soc *soc,
  796. qdf_nbuf_t nbuf)
  797. {
  798. return QDF_NBUF_CB_TX_PACKET_TO_FW(nbuf);
  799. }
  800. #else
  801. static inline int dp_tx_is_nbuf_marked_exception(struct dp_soc *soc,
  802. qdf_nbuf_t nbuf)
  803. {
  804. return 0;
  805. }
  806. #endif
  807. #ifdef DP_TRAFFIC_END_INDICATION
  808. /**
  809. * dp_tx_get_traffic_end_indication_pkt() - Allocate and prepare packet to send
  810. * as indication to fw to inform that
  811. * data stream has ended
  812. * @vdev: DP vdev handle
  813. * @nbuf: original buffer from network stack
  814. *
  815. * Return: NULL on failure,
  816. * nbuf on success
  817. */
  818. static inline qdf_nbuf_t
  819. dp_tx_get_traffic_end_indication_pkt(struct dp_vdev *vdev,
  820. qdf_nbuf_t nbuf)
  821. {
  822. /* Packet length should be enough to copy upto L3 header */
  823. uint8_t end_nbuf_len = 64;
  824. uint8_t htt_desc_size_aligned;
  825. uint8_t htt_desc_size;
  826. qdf_nbuf_t end_nbuf;
  827. if (qdf_unlikely(QDF_NBUF_CB_GET_PACKET_TYPE(nbuf) ==
  828. QDF_NBUF_CB_PACKET_TYPE_END_INDICATION)) {
  829. htt_desc_size = sizeof(struct htt_tx_msdu_desc_ext2_t);
  830. htt_desc_size_aligned = (htt_desc_size + 7) & ~0x7;
  831. end_nbuf = qdf_nbuf_queue_remove(&vdev->end_ind_pkt_q);
  832. if (!end_nbuf) {
  833. end_nbuf = qdf_nbuf_alloc(NULL,
  834. (htt_desc_size_aligned +
  835. end_nbuf_len),
  836. htt_desc_size_aligned,
  837. 8, false);
  838. if (!end_nbuf) {
  839. dp_err("Packet allocation failed");
  840. goto out;
  841. }
  842. } else {
  843. qdf_nbuf_reset(end_nbuf, htt_desc_size_aligned, 8);
  844. }
  845. qdf_mem_copy(qdf_nbuf_data(end_nbuf), qdf_nbuf_data(nbuf),
  846. end_nbuf_len);
  847. qdf_nbuf_set_pktlen(end_nbuf, end_nbuf_len);
  848. return end_nbuf;
  849. }
  850. out:
  851. return NULL;
  852. }
  853. /**
  854. * dp_tx_send_traffic_end_indication_pkt() - Send indication packet to FW
  855. * via exception path.
  856. * @vdev: DP vdev handle
  857. * @end_nbuf: skb to send as indication
  858. * @msdu_info: msdu_info of original nbuf
  859. * @peer_id: peer id
  860. *
  861. * Return: None
  862. */
  863. static inline void
  864. dp_tx_send_traffic_end_indication_pkt(struct dp_vdev *vdev,
  865. qdf_nbuf_t end_nbuf,
  866. struct dp_tx_msdu_info_s *msdu_info,
  867. uint16_t peer_id)
  868. {
  869. struct dp_tx_msdu_info_s e_msdu_info = {0};
  870. qdf_nbuf_t nbuf;
  871. struct htt_tx_msdu_desc_ext2_t *desc_ext =
  872. (struct htt_tx_msdu_desc_ext2_t *)(e_msdu_info.meta_data);
  873. e_msdu_info.tx_queue = msdu_info->tx_queue;
  874. e_msdu_info.tid = msdu_info->tid;
  875. e_msdu_info.exception_fw = 1;
  876. desc_ext->host_tx_desc_pool = 1;
  877. desc_ext->traffic_end_indication = 1;
  878. nbuf = dp_tx_send_msdu_single(vdev, end_nbuf, &e_msdu_info,
  879. peer_id, NULL);
  880. if (nbuf) {
  881. dp_err("Traffic end indication packet tx failed");
  882. qdf_nbuf_free(nbuf);
  883. }
  884. }
  885. /**
  886. * dp_tx_traffic_end_indication_set_desc_flag() - Set tx descriptor flag to
  887. * mark it traffic end indication
  888. * packet.
  889. * @tx_desc: Tx descriptor pointer
  890. * @msdu_info: msdu_info structure pointer
  891. *
  892. * Return: None
  893. */
  894. static inline void
  895. dp_tx_traffic_end_indication_set_desc_flag(struct dp_tx_desc_s *tx_desc,
  896. struct dp_tx_msdu_info_s *msdu_info)
  897. {
  898. struct htt_tx_msdu_desc_ext2_t *desc_ext =
  899. (struct htt_tx_msdu_desc_ext2_t *)(msdu_info->meta_data);
  900. if (qdf_unlikely(desc_ext->traffic_end_indication))
  901. tx_desc->flags |= DP_TX_DESC_FLAG_TRAFFIC_END_IND;
  902. }
  903. /**
  904. * dp_tx_traffic_end_indication_enq_ind_pkt() - Enqueue the packet instead of
  905. * freeing which are associated
  906. * with traffic end indication
  907. * flagged descriptor.
  908. * @soc: dp soc handle
  909. * @desc: Tx descriptor pointer
  910. * @nbuf: buffer pointer
  911. *
  912. * Return: True if packet gets enqueued else false
  913. */
  914. static bool
  915. dp_tx_traffic_end_indication_enq_ind_pkt(struct dp_soc *soc,
  916. struct dp_tx_desc_s *desc,
  917. qdf_nbuf_t nbuf)
  918. {
  919. struct dp_vdev *vdev = NULL;
  920. if (qdf_unlikely((desc->flags &
  921. DP_TX_DESC_FLAG_TRAFFIC_END_IND) != 0)) {
  922. vdev = dp_vdev_get_ref_by_id(soc, desc->vdev_id,
  923. DP_MOD_ID_TX_COMP);
  924. if (vdev) {
  925. qdf_nbuf_queue_add(&vdev->end_ind_pkt_q, nbuf);
  926. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_TX_COMP);
  927. return true;
  928. }
  929. }
  930. return false;
  931. }
  932. /**
  933. * dp_tx_traffic_end_indication_is_enabled() - get the feature
  934. * enable/disable status
  935. * @vdev: dp vdev handle
  936. *
  937. * Return: True if feature is enable else false
  938. */
  939. static inline bool
  940. dp_tx_traffic_end_indication_is_enabled(struct dp_vdev *vdev)
  941. {
  942. return qdf_unlikely(vdev->traffic_end_ind_en);
  943. }
  944. static inline qdf_nbuf_t
  945. dp_tx_send_msdu_single_wrapper(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  946. struct dp_tx_msdu_info_s *msdu_info,
  947. uint16_t peer_id, qdf_nbuf_t end_nbuf)
  948. {
  949. if (dp_tx_traffic_end_indication_is_enabled(vdev))
  950. end_nbuf = dp_tx_get_traffic_end_indication_pkt(vdev, nbuf);
  951. nbuf = dp_tx_send_msdu_single(vdev, nbuf, msdu_info, peer_id, NULL);
  952. if (qdf_unlikely(end_nbuf))
  953. dp_tx_send_traffic_end_indication_pkt(vdev, end_nbuf,
  954. msdu_info, peer_id);
  955. return nbuf;
  956. }
  957. #else
  958. static inline qdf_nbuf_t
  959. dp_tx_get_traffic_end_indication_pkt(struct dp_vdev *vdev,
  960. qdf_nbuf_t nbuf)
  961. {
  962. return NULL;
  963. }
  964. static inline void
  965. dp_tx_send_traffic_end_indication_pkt(struct dp_vdev *vdev,
  966. qdf_nbuf_t end_nbuf,
  967. struct dp_tx_msdu_info_s *msdu_info,
  968. uint16_t peer_id)
  969. {}
  970. static inline void
  971. dp_tx_traffic_end_indication_set_desc_flag(struct dp_tx_desc_s *tx_desc,
  972. struct dp_tx_msdu_info_s *msdu_info)
  973. {}
  974. static inline bool
  975. dp_tx_traffic_end_indication_enq_ind_pkt(struct dp_soc *soc,
  976. struct dp_tx_desc_s *desc,
  977. qdf_nbuf_t nbuf)
  978. {
  979. return false;
  980. }
  981. static inline bool
  982. dp_tx_traffic_end_indication_is_enabled(struct dp_vdev *vdev)
  983. {
  984. return false;
  985. }
  986. static inline qdf_nbuf_t
  987. dp_tx_send_msdu_single_wrapper(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  988. struct dp_tx_msdu_info_s *msdu_info,
  989. uint16_t peer_id, qdf_nbuf_t end_nbuf)
  990. {
  991. return dp_tx_send_msdu_single(vdev, nbuf, msdu_info, peer_id, NULL);
  992. }
  993. #endif
  994. #if defined(QCA_SUPPORT_WDS_EXTENDED)
  995. static bool
  996. dp_tx_is_wds_ast_override_en(struct dp_soc *soc,
  997. struct cdp_tx_exception_metadata *tx_exc_metadata)
  998. {
  999. if (soc->features.wds_ext_ast_override_enable &&
  1000. tx_exc_metadata && tx_exc_metadata->is_wds_extended)
  1001. return true;
  1002. return false;
  1003. }
  1004. #else
  1005. static bool
  1006. dp_tx_is_wds_ast_override_en(struct dp_soc *soc,
  1007. struct cdp_tx_exception_metadata *tx_exc_metadata)
  1008. {
  1009. return false;
  1010. }
  1011. #endif
  1012. /**
  1013. * dp_tx_prepare_desc_single() - Allocate and prepare Tx descriptor
  1014. * @vdev: DP vdev handle
  1015. * @nbuf: skb
  1016. * @desc_pool_id: Descriptor pool ID
  1017. * @msdu_info: Metadata to the fw
  1018. * @tx_exc_metadata: Handle that holds exception path metadata
  1019. *
  1020. * Allocate and prepare Tx descriptor with msdu information.
  1021. *
  1022. * Return: Pointer to Tx Descriptor on success,
  1023. * NULL on failure
  1024. */
  1025. static
  1026. struct dp_tx_desc_s *dp_tx_prepare_desc_single(struct dp_vdev *vdev,
  1027. qdf_nbuf_t nbuf, uint8_t desc_pool_id,
  1028. struct dp_tx_msdu_info_s *msdu_info,
  1029. struct cdp_tx_exception_metadata *tx_exc_metadata)
  1030. {
  1031. uint8_t align_pad;
  1032. uint8_t is_exception = 0;
  1033. uint8_t htt_hdr_size;
  1034. struct dp_tx_desc_s *tx_desc;
  1035. struct dp_pdev *pdev = vdev->pdev;
  1036. struct dp_soc *soc = pdev->soc;
  1037. if (dp_tx_limit_check(vdev, nbuf))
  1038. return NULL;
  1039. /* Allocate software Tx descriptor */
  1040. tx_desc = dp_tx_desc_alloc(soc, desc_pool_id);
  1041. if (qdf_unlikely(!tx_desc)) {
  1042. DP_STATS_INC(vdev, tx_i.dropped.desc_na.num, 1);
  1043. DP_STATS_INC(vdev, tx_i.dropped.desc_na_exc_alloc_fail.num, 1);
  1044. return NULL;
  1045. }
  1046. dp_tx_outstanding_inc(pdev);
  1047. /* Initialize the SW tx descriptor */
  1048. tx_desc->nbuf = nbuf;
  1049. tx_desc->frm_type = dp_tx_frm_std;
  1050. tx_desc->tx_encap_type = ((tx_exc_metadata &&
  1051. (tx_exc_metadata->tx_encap_type != CDP_INVALID_TX_ENCAP_TYPE)) ?
  1052. tx_exc_metadata->tx_encap_type : vdev->tx_encap_type);
  1053. tx_desc->vdev_id = vdev->vdev_id;
  1054. tx_desc->pdev = pdev;
  1055. tx_desc->msdu_ext_desc = NULL;
  1056. tx_desc->pkt_offset = 0;
  1057. tx_desc->length = qdf_nbuf_headlen(nbuf);
  1058. tx_desc->shinfo_addr = skb_end_pointer(nbuf);
  1059. dp_tx_trace_pkt(soc, nbuf, tx_desc->id, vdev->vdev_id);
  1060. if (qdf_unlikely(vdev->multipass_en)) {
  1061. if (!dp_tx_multipass_process(soc, vdev, nbuf, msdu_info))
  1062. goto failure;
  1063. }
  1064. /* Packets marked by upper layer (OS-IF) to be sent to FW */
  1065. if (dp_tx_is_nbuf_marked_exception(soc, nbuf))
  1066. is_exception = 1;
  1067. /* for BE chipsets if wds extension was enbled will not mark FW
  1068. * in desc will mark ast index based search for ast index.
  1069. */
  1070. if (dp_tx_is_wds_ast_override_en(soc, tx_exc_metadata))
  1071. return tx_desc;
  1072. /*
  1073. * For special modes (vdev_type == ocb or mesh), data frames should be
  1074. * transmitted using varying transmit parameters (tx spec) which include
  1075. * transmit rate, power, priority, channel, channel bandwidth , nss etc.
  1076. * These are filled in HTT MSDU descriptor and sent in frame pre-header.
  1077. * These frames are sent as exception packets to firmware.
  1078. *
  1079. * HW requirement is that metadata should always point to a
  1080. * 8-byte aligned address. So we add alignment pad to start of buffer.
  1081. * HTT Metadata should be ensured to be multiple of 8-bytes,
  1082. * to get 8-byte aligned start address along with align_pad added
  1083. *
  1084. * |-----------------------------|
  1085. * | |
  1086. * |-----------------------------| <-----Buffer Pointer Address given
  1087. * | | ^ in HW descriptor (aligned)
  1088. * | HTT Metadata | |
  1089. * | | |
  1090. * | | | Packet Offset given in descriptor
  1091. * | | |
  1092. * |-----------------------------| |
  1093. * | Alignment Pad | v
  1094. * |-----------------------------| <----- Actual buffer start address
  1095. * | SKB Data | (Unaligned)
  1096. * | |
  1097. * | |
  1098. * | |
  1099. * | |
  1100. * | |
  1101. * |-----------------------------|
  1102. */
  1103. if (qdf_unlikely((msdu_info->exception_fw)) ||
  1104. (vdev->opmode == wlan_op_mode_ocb) ||
  1105. (tx_exc_metadata &&
  1106. tx_exc_metadata->is_tx_sniffer)) {
  1107. align_pad = ((unsigned long) qdf_nbuf_data(nbuf)) & 0x7;
  1108. if (qdf_unlikely(qdf_nbuf_headroom(nbuf) < align_pad)) {
  1109. DP_STATS_INC(vdev,
  1110. tx_i.dropped.headroom_insufficient, 1);
  1111. goto failure;
  1112. }
  1113. if (qdf_nbuf_push_head(nbuf, align_pad) == NULL) {
  1114. dp_tx_err("qdf_nbuf_push_head failed");
  1115. goto failure;
  1116. }
  1117. htt_hdr_size = dp_tx_prepare_htt_metadata(vdev, nbuf,
  1118. msdu_info);
  1119. if (htt_hdr_size == 0)
  1120. goto failure;
  1121. tx_desc->length = qdf_nbuf_headlen(nbuf);
  1122. tx_desc->pkt_offset = align_pad + htt_hdr_size;
  1123. tx_desc->flags |= DP_TX_DESC_FLAG_TO_FW;
  1124. dp_tx_traffic_end_indication_set_desc_flag(tx_desc,
  1125. msdu_info);
  1126. is_exception = 1;
  1127. tx_desc->length -= tx_desc->pkt_offset;
  1128. }
  1129. #if !TQM_BYPASS_WAR
  1130. if (is_exception || tx_exc_metadata)
  1131. #endif
  1132. {
  1133. /* Temporary WAR due to TQM VP issues */
  1134. tx_desc->flags |= DP_TX_DESC_FLAG_TO_FW;
  1135. qdf_atomic_inc(&soc->num_tx_exception);
  1136. }
  1137. return tx_desc;
  1138. failure:
  1139. dp_tx_desc_release(soc, tx_desc, desc_pool_id);
  1140. return NULL;
  1141. }
  1142. /**
  1143. * dp_tx_prepare_desc() - Allocate and prepare Tx descriptor for multisegment
  1144. * frame
  1145. * @vdev: DP vdev handle
  1146. * @nbuf: skb
  1147. * @msdu_info: Info to be setup in MSDU descriptor and MSDU extension descriptor
  1148. * @desc_pool_id : Descriptor Pool ID
  1149. *
  1150. * Allocate and prepare Tx descriptor with msdu and fragment descritor
  1151. * information. For frames with fragments, allocate and prepare
  1152. * an MSDU extension descriptor
  1153. *
  1154. * Return: Pointer to Tx Descriptor on success,
  1155. * NULL on failure
  1156. */
  1157. static struct dp_tx_desc_s *dp_tx_prepare_desc(struct dp_vdev *vdev,
  1158. qdf_nbuf_t nbuf, struct dp_tx_msdu_info_s *msdu_info,
  1159. uint8_t desc_pool_id)
  1160. {
  1161. struct dp_tx_desc_s *tx_desc;
  1162. struct dp_tx_ext_desc_elem_s *msdu_ext_desc;
  1163. struct dp_pdev *pdev = vdev->pdev;
  1164. struct dp_soc *soc = pdev->soc;
  1165. if (dp_tx_limit_check(vdev, nbuf))
  1166. return NULL;
  1167. /* Allocate software Tx descriptor */
  1168. tx_desc = dp_tx_desc_alloc(soc, desc_pool_id);
  1169. if (!tx_desc) {
  1170. DP_STATS_INC(vdev, tx_i.dropped.desc_na.num, 1);
  1171. return NULL;
  1172. }
  1173. dp_tx_tso_seg_history_add(soc, msdu_info->u.tso_info.curr_seg,
  1174. nbuf, tx_desc->id, DP_TX_DESC_COOKIE);
  1175. dp_tx_outstanding_inc(pdev);
  1176. /* Initialize the SW tx descriptor */
  1177. tx_desc->nbuf = nbuf;
  1178. tx_desc->frm_type = msdu_info->frm_type;
  1179. tx_desc->tx_encap_type = vdev->tx_encap_type;
  1180. tx_desc->vdev_id = vdev->vdev_id;
  1181. tx_desc->pdev = pdev;
  1182. tx_desc->pkt_offset = 0;
  1183. dp_tx_trace_pkt(soc, nbuf, tx_desc->id, vdev->vdev_id);
  1184. /* Handle scattered frames - TSO/SG/ME */
  1185. /* Allocate and prepare an extension descriptor for scattered frames */
  1186. msdu_ext_desc = dp_tx_prepare_ext_desc(vdev, msdu_info, desc_pool_id);
  1187. if (!msdu_ext_desc) {
  1188. dp_tx_info("Tx Extension Descriptor Alloc Fail");
  1189. goto failure;
  1190. }
  1191. #if !TQM_BYPASS_WAR
  1192. if (qdf_unlikely(msdu_info->exception_fw) ||
  1193. dp_tx_is_nbuf_marked_exception(soc, nbuf))
  1194. #endif
  1195. {
  1196. /* Temporary WAR due to TQM VP issues */
  1197. tx_desc->flags |= DP_TX_DESC_FLAG_TO_FW;
  1198. qdf_atomic_inc(&soc->num_tx_exception);
  1199. }
  1200. tx_desc->msdu_ext_desc = msdu_ext_desc;
  1201. tx_desc->flags |= DP_TX_DESC_FLAG_FRAG;
  1202. msdu_ext_desc->tso_desc = msdu_info->u.tso_info.curr_seg;
  1203. msdu_ext_desc->tso_num_desc = msdu_info->u.tso_info.tso_num_seg_list;
  1204. tx_desc->dma_addr = msdu_ext_desc->paddr;
  1205. if (msdu_ext_desc->flags & DP_TX_EXT_DESC_FLAG_METADATA_VALID)
  1206. tx_desc->length = HAL_TX_EXT_DESC_WITH_META_DATA;
  1207. else
  1208. tx_desc->length = HAL_TX_EXTENSION_DESC_LEN_BYTES;
  1209. return tx_desc;
  1210. failure:
  1211. dp_tx_desc_release(soc, tx_desc, desc_pool_id);
  1212. return NULL;
  1213. }
  1214. /**
  1215. * dp_tx_prepare_raw() - Prepare RAW packet TX
  1216. * @vdev: DP vdev handle
  1217. * @nbuf: buffer pointer
  1218. * @seg_info: Pointer to Segment info Descriptor to be prepared
  1219. * @msdu_info: MSDU info to be setup in MSDU descriptor and MSDU extension
  1220. * descriptor
  1221. *
  1222. * Return:
  1223. */
  1224. static qdf_nbuf_t dp_tx_prepare_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1225. struct dp_tx_seg_info_s *seg_info, struct dp_tx_msdu_info_s *msdu_info)
  1226. {
  1227. qdf_nbuf_t curr_nbuf = NULL;
  1228. uint16_t total_len = 0;
  1229. qdf_dma_addr_t paddr;
  1230. int32_t i;
  1231. int32_t mapped_buf_num = 0;
  1232. struct dp_tx_sg_info_s *sg_info = &msdu_info->u.sg_info;
  1233. qdf_dot3_qosframe_t *qos_wh = (qdf_dot3_qosframe_t *) nbuf->data;
  1234. DP_STATS_INC_PKT(vdev, tx_i.raw.raw_pkt, 1, qdf_nbuf_len(nbuf));
  1235. /* Continue only if frames are of DATA type */
  1236. if (!DP_FRAME_IS_DATA(qos_wh)) {
  1237. DP_STATS_INC(vdev, tx_i.raw.invalid_raw_pkt_datatype, 1);
  1238. dp_tx_debug("Pkt. recd is of not data type");
  1239. goto error;
  1240. }
  1241. /* SWAR for HW: Enable WEP bit in the AMSDU frames for RAW mode */
  1242. if (vdev->raw_mode_war &&
  1243. (qos_wh->i_fc[0] & QDF_IEEE80211_FC0_SUBTYPE_QOS) &&
  1244. (qos_wh->i_qos[0] & IEEE80211_QOS_AMSDU))
  1245. qos_wh->i_fc[1] |= IEEE80211_FC1_WEP;
  1246. for (curr_nbuf = nbuf, i = 0; curr_nbuf;
  1247. curr_nbuf = qdf_nbuf_next(curr_nbuf), i++) {
  1248. /*
  1249. * Number of nbuf's must not exceed the size of the frags
  1250. * array in seg_info.
  1251. */
  1252. if (i >= DP_TX_MAX_NUM_FRAGS) {
  1253. dp_err_rl("nbuf cnt exceeds the max number of segs");
  1254. DP_STATS_INC(vdev, tx_i.raw.num_frags_overflow_err, 1);
  1255. goto error;
  1256. }
  1257. if (QDF_STATUS_SUCCESS !=
  1258. qdf_nbuf_map_nbytes_single(vdev->osdev,
  1259. curr_nbuf,
  1260. QDF_DMA_TO_DEVICE,
  1261. curr_nbuf->len)) {
  1262. dp_tx_err("%s dma map error ", __func__);
  1263. DP_STATS_INC(vdev, tx_i.raw.dma_map_error, 1);
  1264. goto error;
  1265. }
  1266. /* Update the count of mapped nbuf's */
  1267. mapped_buf_num++;
  1268. paddr = qdf_nbuf_get_frag_paddr(curr_nbuf, 0);
  1269. seg_info->frags[i].paddr_lo = paddr;
  1270. seg_info->frags[i].paddr_hi = ((uint64_t)paddr >> 32);
  1271. seg_info->frags[i].len = qdf_nbuf_len(curr_nbuf);
  1272. seg_info->frags[i].vaddr = (void *) curr_nbuf;
  1273. total_len += qdf_nbuf_len(curr_nbuf);
  1274. }
  1275. seg_info->frag_cnt = i;
  1276. seg_info->total_len = total_len;
  1277. seg_info->next = NULL;
  1278. sg_info->curr_seg = seg_info;
  1279. msdu_info->frm_type = dp_tx_frm_raw;
  1280. msdu_info->num_seg = 1;
  1281. return nbuf;
  1282. error:
  1283. i = 0;
  1284. while (nbuf) {
  1285. curr_nbuf = nbuf;
  1286. if (i < mapped_buf_num) {
  1287. qdf_nbuf_unmap_nbytes_single(vdev->osdev, curr_nbuf,
  1288. QDF_DMA_TO_DEVICE,
  1289. curr_nbuf->len);
  1290. i++;
  1291. }
  1292. nbuf = qdf_nbuf_next(nbuf);
  1293. qdf_nbuf_free(curr_nbuf);
  1294. }
  1295. return NULL;
  1296. }
  1297. /**
  1298. * dp_tx_raw_prepare_unset() - unmap the chain of nbufs belonging to RAW frame.
  1299. * @soc: DP soc handle
  1300. * @nbuf: Buffer pointer
  1301. *
  1302. * unmap the chain of nbufs that belong to this RAW frame.
  1303. *
  1304. * Return: None
  1305. */
  1306. static void dp_tx_raw_prepare_unset(struct dp_soc *soc,
  1307. qdf_nbuf_t nbuf)
  1308. {
  1309. qdf_nbuf_t cur_nbuf = nbuf;
  1310. do {
  1311. qdf_nbuf_unmap_nbytes_single(soc->osdev, cur_nbuf,
  1312. QDF_DMA_TO_DEVICE,
  1313. cur_nbuf->len);
  1314. cur_nbuf = qdf_nbuf_next(cur_nbuf);
  1315. } while (cur_nbuf);
  1316. }
  1317. #ifdef VDEV_PEER_PROTOCOL_COUNT
  1318. void dp_vdev_peer_stats_update_protocol_cnt_tx(struct dp_vdev *vdev_hdl,
  1319. qdf_nbuf_t nbuf)
  1320. {
  1321. qdf_nbuf_t nbuf_local;
  1322. struct dp_vdev *vdev_local = vdev_hdl;
  1323. do {
  1324. if (qdf_likely(!((vdev_local)->peer_protocol_count_track)))
  1325. break;
  1326. nbuf_local = nbuf;
  1327. if (qdf_unlikely(((vdev_local)->tx_encap_type) ==
  1328. htt_cmn_pkt_type_raw))
  1329. break;
  1330. else if (qdf_unlikely(qdf_nbuf_is_nonlinear((nbuf_local))))
  1331. break;
  1332. else if (qdf_nbuf_is_tso((nbuf_local)))
  1333. break;
  1334. dp_vdev_peer_stats_update_protocol_cnt((vdev_local),
  1335. (nbuf_local),
  1336. NULL, 1, 0);
  1337. } while (0);
  1338. }
  1339. #endif
  1340. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  1341. void dp_tx_update_stats(struct dp_soc *soc,
  1342. struct dp_tx_desc_s *tx_desc,
  1343. uint8_t ring_id)
  1344. {
  1345. uint32_t stats_len = dp_tx_get_pkt_len(tx_desc);
  1346. DP_STATS_INC_PKT(soc, tx.egress[ring_id], 1, stats_len);
  1347. }
  1348. int
  1349. dp_tx_attempt_coalescing(struct dp_soc *soc, struct dp_vdev *vdev,
  1350. struct dp_tx_desc_s *tx_desc,
  1351. uint8_t tid,
  1352. struct dp_tx_msdu_info_s *msdu_info,
  1353. uint8_t ring_id)
  1354. {
  1355. struct dp_swlm *swlm = &soc->swlm;
  1356. union swlm_data swlm_query_data;
  1357. struct dp_swlm_tcl_data tcl_data;
  1358. QDF_STATUS status;
  1359. int ret;
  1360. if (!swlm->is_enabled)
  1361. return msdu_info->skip_hp_update;
  1362. tcl_data.nbuf = tx_desc->nbuf;
  1363. tcl_data.tid = tid;
  1364. tcl_data.ring_id = ring_id;
  1365. tcl_data.pkt_len = dp_tx_get_pkt_len(tx_desc);
  1366. tcl_data.num_ll_connections = vdev->num_latency_critical_conn;
  1367. swlm_query_data.tcl_data = &tcl_data;
  1368. status = dp_swlm_tcl_pre_check(soc, &tcl_data);
  1369. if (QDF_IS_STATUS_ERROR(status)) {
  1370. dp_swlm_tcl_reset_session_data(soc, ring_id);
  1371. DP_STATS_INC(swlm, tcl[ring_id].coalesce_fail, 1);
  1372. return 0;
  1373. }
  1374. ret = dp_swlm_query_policy(soc, TCL_DATA, swlm_query_data);
  1375. if (ret) {
  1376. DP_STATS_INC(swlm, tcl[ring_id].coalesce_success, 1);
  1377. } else {
  1378. DP_STATS_INC(swlm, tcl[ring_id].coalesce_fail, 1);
  1379. }
  1380. return ret;
  1381. }
  1382. void
  1383. dp_tx_ring_access_end(struct dp_soc *soc, hal_ring_handle_t hal_ring_hdl,
  1384. int coalesce)
  1385. {
  1386. if (coalesce)
  1387. dp_tx_hal_ring_access_end_reap(soc, hal_ring_hdl);
  1388. else
  1389. dp_tx_hal_ring_access_end(soc, hal_ring_hdl);
  1390. }
  1391. static inline void
  1392. dp_tx_is_hp_update_required(uint32_t i, struct dp_tx_msdu_info_s *msdu_info)
  1393. {
  1394. if (((i + 1) < msdu_info->num_seg))
  1395. msdu_info->skip_hp_update = 1;
  1396. else
  1397. msdu_info->skip_hp_update = 0;
  1398. }
  1399. static inline void
  1400. dp_flush_tcp_hp(struct dp_soc *soc, uint8_t ring_id)
  1401. {
  1402. hal_ring_handle_t hal_ring_hdl =
  1403. dp_tx_get_hal_ring_hdl(soc, ring_id);
  1404. if (dp_tx_hal_ring_access_start(soc, hal_ring_hdl)) {
  1405. dp_err("Fillmore: SRNG access start failed");
  1406. return;
  1407. }
  1408. dp_tx_ring_access_end_wrapper(soc, hal_ring_hdl, 0);
  1409. }
  1410. static inline void
  1411. dp_tx_check_and_flush_hp(struct dp_soc *soc,
  1412. QDF_STATUS status,
  1413. struct dp_tx_msdu_info_s *msdu_info)
  1414. {
  1415. if (QDF_IS_STATUS_ERROR(status) && !msdu_info->skip_hp_update) {
  1416. dp_flush_tcp_hp(soc,
  1417. (msdu_info->tx_queue.ring_id & DP_TX_QUEUE_MASK));
  1418. }
  1419. }
  1420. #else
  1421. static inline void
  1422. dp_tx_is_hp_update_required(uint32_t i, struct dp_tx_msdu_info_s *msdu_info)
  1423. {
  1424. }
  1425. static inline void
  1426. dp_tx_check_and_flush_hp(struct dp_soc *soc,
  1427. QDF_STATUS status,
  1428. struct dp_tx_msdu_info_s *msdu_info)
  1429. {
  1430. }
  1431. #endif
  1432. #ifdef FEATURE_RUNTIME_PM
  1433. void
  1434. dp_tx_ring_access_end_wrapper(struct dp_soc *soc,
  1435. hal_ring_handle_t hal_ring_hdl,
  1436. int coalesce)
  1437. {
  1438. int ret;
  1439. /*
  1440. * Avoid runtime get and put APIs under high throughput scenarios.
  1441. */
  1442. if (dp_get_rtpm_tput_policy_requirement(soc)) {
  1443. dp_tx_ring_access_end(soc, hal_ring_hdl, coalesce);
  1444. return;
  1445. }
  1446. ret = hif_rtpm_get(HIF_RTPM_GET_ASYNC, HIF_RTPM_ID_DP);
  1447. if (QDF_IS_STATUS_SUCCESS(ret)) {
  1448. if (hif_system_pm_state_check(soc->hif_handle)) {
  1449. dp_tx_hal_ring_access_end_reap(soc, hal_ring_hdl);
  1450. hal_srng_set_event(hal_ring_hdl, HAL_SRNG_FLUSH_EVENT);
  1451. hal_srng_inc_flush_cnt(hal_ring_hdl);
  1452. } else {
  1453. dp_tx_ring_access_end(soc, hal_ring_hdl, coalesce);
  1454. }
  1455. hif_rtpm_put(HIF_RTPM_PUT_ASYNC, HIF_RTPM_ID_DP);
  1456. } else {
  1457. dp_runtime_get(soc);
  1458. dp_tx_hal_ring_access_end_reap(soc, hal_ring_hdl);
  1459. hal_srng_set_event(hal_ring_hdl, HAL_SRNG_FLUSH_EVENT);
  1460. qdf_atomic_inc(&soc->tx_pending_rtpm);
  1461. hal_srng_inc_flush_cnt(hal_ring_hdl);
  1462. dp_runtime_put(soc);
  1463. }
  1464. }
  1465. #else
  1466. #ifdef DP_POWER_SAVE
  1467. void
  1468. dp_tx_ring_access_end_wrapper(struct dp_soc *soc,
  1469. hal_ring_handle_t hal_ring_hdl,
  1470. int coalesce)
  1471. {
  1472. if (hif_system_pm_state_check(soc->hif_handle)) {
  1473. dp_tx_hal_ring_access_end_reap(soc, hal_ring_hdl);
  1474. hal_srng_set_event(hal_ring_hdl, HAL_SRNG_FLUSH_EVENT);
  1475. hal_srng_inc_flush_cnt(hal_ring_hdl);
  1476. } else {
  1477. dp_tx_ring_access_end(soc, hal_ring_hdl, coalesce);
  1478. }
  1479. }
  1480. #endif
  1481. #endif
  1482. /**
  1483. * dp_tx_get_tid() - Obtain TID to be used for this frame
  1484. * @vdev: DP vdev handle
  1485. * @nbuf: skb
  1486. * @msdu_info: msdu descriptor
  1487. *
  1488. * Extract the DSCP or PCP information from frame and map into TID value.
  1489. *
  1490. * Return: void
  1491. */
  1492. static void dp_tx_get_tid(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1493. struct dp_tx_msdu_info_s *msdu_info)
  1494. {
  1495. uint8_t tos = 0, dscp_tid_override = 0;
  1496. uint8_t *hdr_ptr, *L3datap;
  1497. uint8_t is_mcast = 0;
  1498. qdf_ether_header_t *eh = NULL;
  1499. qdf_ethervlan_header_t *evh = NULL;
  1500. uint16_t ether_type;
  1501. qdf_llc_t *llcHdr;
  1502. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  1503. DP_TX_TID_OVERRIDE(msdu_info, nbuf);
  1504. if (qdf_likely(vdev->tx_encap_type != htt_cmn_pkt_type_raw)) {
  1505. eh = (qdf_ether_header_t *)nbuf->data;
  1506. hdr_ptr = (uint8_t *)(eh->ether_dhost);
  1507. L3datap = hdr_ptr + sizeof(qdf_ether_header_t);
  1508. } else {
  1509. qdf_dot3_qosframe_t *qos_wh =
  1510. (qdf_dot3_qosframe_t *) nbuf->data;
  1511. msdu_info->tid = qos_wh->i_fc[0] & DP_FC0_SUBTYPE_QOS ?
  1512. qos_wh->i_qos[0] & DP_QOS_TID : 0;
  1513. return;
  1514. }
  1515. is_mcast = DP_FRAME_IS_MULTICAST(hdr_ptr);
  1516. ether_type = eh->ether_type;
  1517. llcHdr = (qdf_llc_t *)(nbuf->data + sizeof(qdf_ether_header_t));
  1518. /*
  1519. * Check if packet is dot3 or eth2 type.
  1520. */
  1521. if (DP_FRAME_IS_LLC(ether_type) && DP_FRAME_IS_SNAP(llcHdr)) {
  1522. ether_type = (uint16_t)*(nbuf->data + 2*QDF_MAC_ADDR_SIZE +
  1523. sizeof(*llcHdr));
  1524. if (ether_type == htons(ETHERTYPE_VLAN)) {
  1525. L3datap = hdr_ptr + sizeof(qdf_ethervlan_header_t) +
  1526. sizeof(*llcHdr);
  1527. ether_type = (uint16_t)*(nbuf->data + 2*QDF_MAC_ADDR_SIZE
  1528. + sizeof(*llcHdr) +
  1529. sizeof(qdf_net_vlanhdr_t));
  1530. } else {
  1531. L3datap = hdr_ptr + sizeof(qdf_ether_header_t) +
  1532. sizeof(*llcHdr);
  1533. }
  1534. } else {
  1535. if (ether_type == htons(ETHERTYPE_VLAN)) {
  1536. evh = (qdf_ethervlan_header_t *) eh;
  1537. ether_type = evh->ether_type;
  1538. L3datap = hdr_ptr + sizeof(qdf_ethervlan_header_t);
  1539. }
  1540. }
  1541. /*
  1542. * Find priority from IP TOS DSCP field
  1543. */
  1544. if (qdf_nbuf_is_ipv4_pkt(nbuf)) {
  1545. qdf_net_iphdr_t *ip = (qdf_net_iphdr_t *) L3datap;
  1546. if (qdf_nbuf_is_ipv4_dhcp_pkt(nbuf)) {
  1547. /* Only for unicast frames */
  1548. if (!is_mcast) {
  1549. /* send it on VO queue */
  1550. msdu_info->tid = DP_VO_TID;
  1551. }
  1552. } else {
  1553. /*
  1554. * IP frame: exclude ECN bits 0-1 and map DSCP bits 2-7
  1555. * from TOS byte.
  1556. */
  1557. tos = ip->ip_tos;
  1558. dscp_tid_override = 1;
  1559. }
  1560. } else if (qdf_nbuf_is_ipv6_pkt(nbuf)) {
  1561. /* TODO
  1562. * use flowlabel
  1563. *igmpmld cases to be handled in phase 2
  1564. */
  1565. unsigned long ver_pri_flowlabel;
  1566. unsigned long pri;
  1567. ver_pri_flowlabel = *(unsigned long *) L3datap;
  1568. pri = (ntohl(ver_pri_flowlabel) & IPV6_FLOWINFO_PRIORITY) >>
  1569. DP_IPV6_PRIORITY_SHIFT;
  1570. tos = pri;
  1571. dscp_tid_override = 1;
  1572. } else if (qdf_nbuf_is_ipv4_eapol_pkt(nbuf))
  1573. msdu_info->tid = DP_VO_TID;
  1574. else if (qdf_nbuf_is_ipv4_arp_pkt(nbuf)) {
  1575. /* Only for unicast frames */
  1576. if (!is_mcast) {
  1577. /* send ucast arp on VO queue */
  1578. msdu_info->tid = DP_VO_TID;
  1579. }
  1580. }
  1581. /*
  1582. * Assign all MCAST packets to BE
  1583. */
  1584. if (qdf_unlikely(vdev->tx_encap_type != htt_cmn_pkt_type_raw)) {
  1585. if (is_mcast) {
  1586. tos = 0;
  1587. dscp_tid_override = 1;
  1588. }
  1589. }
  1590. if (dscp_tid_override == 1) {
  1591. tos = (tos >> DP_IP_DSCP_SHIFT) & DP_IP_DSCP_MASK;
  1592. msdu_info->tid = pdev->dscp_tid_map[vdev->dscp_tid_map_id][tos];
  1593. }
  1594. if (msdu_info->tid >= CDP_MAX_DATA_TIDS)
  1595. msdu_info->tid = CDP_MAX_DATA_TIDS - 1;
  1596. return;
  1597. }
  1598. /**
  1599. * dp_tx_classify_tid() - Obtain TID to be used for this frame
  1600. * @vdev: DP vdev handle
  1601. * @nbuf: skb
  1602. * @msdu_info: msdu descriptor
  1603. *
  1604. * Software based TID classification is required when more than 2 DSCP-TID
  1605. * mapping tables are needed.
  1606. * Hardware supports 2 DSCP-TID mapping tables for HKv1 and 48 for HKv2.
  1607. *
  1608. * Return: void
  1609. */
  1610. static inline void dp_tx_classify_tid(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1611. struct dp_tx_msdu_info_s *msdu_info)
  1612. {
  1613. DP_TX_TID_OVERRIDE(msdu_info, nbuf);
  1614. /*
  1615. * skip_sw_tid_classification flag will set in below cases-
  1616. * 1. vdev->dscp_tid_map_id < pdev->soc->num_hw_dscp_tid_map
  1617. * 2. hlos_tid_override enabled for vdev
  1618. * 3. mesh mode enabled for vdev
  1619. */
  1620. if (qdf_likely(vdev->skip_sw_tid_classification)) {
  1621. /* Update tid in msdu_info from skb priority */
  1622. if (qdf_unlikely(vdev->skip_sw_tid_classification
  1623. & DP_TXRX_HLOS_TID_OVERRIDE_ENABLED)) {
  1624. uint32_t tid = qdf_nbuf_get_priority(nbuf);
  1625. if (tid == DP_TX_INVALID_QOS_TAG)
  1626. return;
  1627. msdu_info->tid = tid;
  1628. return;
  1629. }
  1630. return;
  1631. }
  1632. dp_tx_get_tid(vdev, nbuf, msdu_info);
  1633. }
  1634. #ifdef FEATURE_WLAN_TDLS
  1635. /**
  1636. * dp_tx_update_tdls_flags() - Update descriptor flags for TDLS frame
  1637. * @soc: datapath SOC
  1638. * @vdev: datapath vdev
  1639. * @tx_desc: TX descriptor
  1640. *
  1641. * Return: None
  1642. */
  1643. static void dp_tx_update_tdls_flags(struct dp_soc *soc,
  1644. struct dp_vdev *vdev,
  1645. struct dp_tx_desc_s *tx_desc)
  1646. {
  1647. if (vdev) {
  1648. if (vdev->is_tdls_frame) {
  1649. tx_desc->flags |= DP_TX_DESC_FLAG_TDLS_FRAME;
  1650. vdev->is_tdls_frame = false;
  1651. }
  1652. }
  1653. }
  1654. static uint8_t dp_htt_tx_comp_get_status(struct dp_soc *soc, char *htt_desc)
  1655. {
  1656. uint8_t tx_status = HTT_TX_FW2WBM_TX_STATUS_MAX;
  1657. switch (soc->arch_id) {
  1658. case CDP_ARCH_TYPE_LI:
  1659. tx_status = HTT_TX_WBM_COMPLETION_V2_TX_STATUS_GET(htt_desc[0]);
  1660. break;
  1661. case CDP_ARCH_TYPE_BE:
  1662. tx_status = HTT_TX_WBM_COMPLETION_V3_TX_STATUS_GET(htt_desc[0]);
  1663. break;
  1664. case CDP_ARCH_TYPE_RH:
  1665. {
  1666. uint32_t *msg_word = (uint32_t *)htt_desc;
  1667. tx_status = HTT_TX_MSDU_INFO_RELEASE_REASON_GET(
  1668. *(msg_word + 3));
  1669. }
  1670. break;
  1671. default:
  1672. dp_err("Incorrect CDP_ARCH %d", soc->arch_id);
  1673. QDF_BUG(0);
  1674. }
  1675. return tx_status;
  1676. }
  1677. /**
  1678. * dp_non_std_htt_tx_comp_free_buff() - Free the non std tx packet buffer
  1679. * @soc: dp_soc handle
  1680. * @tx_desc: TX descriptor
  1681. *
  1682. * Return: None
  1683. */
  1684. static void dp_non_std_htt_tx_comp_free_buff(struct dp_soc *soc,
  1685. struct dp_tx_desc_s *tx_desc)
  1686. {
  1687. uint8_t tx_status = 0;
  1688. uint8_t htt_tx_status[HAL_TX_COMP_HTT_STATUS_LEN];
  1689. qdf_nbuf_t nbuf = tx_desc->nbuf;
  1690. struct dp_vdev *vdev = dp_vdev_get_ref_by_id(soc, tx_desc->vdev_id,
  1691. DP_MOD_ID_TDLS);
  1692. if (qdf_unlikely(!vdev)) {
  1693. dp_err_rl("vdev is null!");
  1694. goto error;
  1695. }
  1696. hal_tx_comp_get_htt_desc(&tx_desc->comp, htt_tx_status);
  1697. tx_status = dp_htt_tx_comp_get_status(soc, htt_tx_status);
  1698. dp_debug("vdev_id: %d tx_status: %d", tx_desc->vdev_id, tx_status);
  1699. if (vdev->tx_non_std_data_callback.func) {
  1700. qdf_nbuf_set_next(nbuf, NULL);
  1701. vdev->tx_non_std_data_callback.func(
  1702. vdev->tx_non_std_data_callback.ctxt,
  1703. nbuf, tx_status);
  1704. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_TDLS);
  1705. return;
  1706. } else {
  1707. dp_err_rl("callback func is null");
  1708. }
  1709. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_TDLS);
  1710. error:
  1711. qdf_nbuf_unmap_single(soc->osdev, nbuf, QDF_DMA_TO_DEVICE);
  1712. qdf_nbuf_free(nbuf);
  1713. }
  1714. /**
  1715. * dp_tx_msdu_single_map() - do nbuf map
  1716. * @vdev: DP vdev handle
  1717. * @tx_desc: DP TX descriptor pointer
  1718. * @nbuf: skb pointer
  1719. *
  1720. * For TDLS frame, use qdf_nbuf_map_single() to align with the unmap
  1721. * operation done in other component.
  1722. *
  1723. * Return: QDF_STATUS
  1724. */
  1725. static inline QDF_STATUS dp_tx_msdu_single_map(struct dp_vdev *vdev,
  1726. struct dp_tx_desc_s *tx_desc,
  1727. qdf_nbuf_t nbuf)
  1728. {
  1729. if (qdf_likely(!(tx_desc->flags & DP_TX_DESC_FLAG_TDLS_FRAME)))
  1730. return qdf_nbuf_map_nbytes_single(vdev->osdev,
  1731. nbuf,
  1732. QDF_DMA_TO_DEVICE,
  1733. nbuf->len);
  1734. else
  1735. return qdf_nbuf_map_single(vdev->osdev, nbuf,
  1736. QDF_DMA_TO_DEVICE);
  1737. }
  1738. #else
  1739. static inline void dp_tx_update_tdls_flags(struct dp_soc *soc,
  1740. struct dp_vdev *vdev,
  1741. struct dp_tx_desc_s *tx_desc)
  1742. {
  1743. }
  1744. static inline void dp_non_std_htt_tx_comp_free_buff(struct dp_soc *soc,
  1745. struct dp_tx_desc_s *tx_desc)
  1746. {
  1747. }
  1748. static inline QDF_STATUS dp_tx_msdu_single_map(struct dp_vdev *vdev,
  1749. struct dp_tx_desc_s *tx_desc,
  1750. qdf_nbuf_t nbuf)
  1751. {
  1752. return qdf_nbuf_map_nbytes_single(vdev->osdev,
  1753. nbuf,
  1754. QDF_DMA_TO_DEVICE,
  1755. nbuf->len);
  1756. }
  1757. #endif
  1758. static inline
  1759. qdf_dma_addr_t dp_tx_nbuf_map_regular(struct dp_vdev *vdev,
  1760. struct dp_tx_desc_s *tx_desc,
  1761. qdf_nbuf_t nbuf)
  1762. {
  1763. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  1764. ret = dp_tx_msdu_single_map(vdev, tx_desc, nbuf);
  1765. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret)))
  1766. return 0;
  1767. return qdf_nbuf_mapped_paddr_get(nbuf);
  1768. }
  1769. static inline
  1770. void dp_tx_nbuf_unmap_regular(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  1771. {
  1772. qdf_nbuf_unmap_nbytes_single_paddr(soc->osdev,
  1773. desc->nbuf,
  1774. desc->dma_addr,
  1775. QDF_DMA_TO_DEVICE,
  1776. desc->length);
  1777. }
  1778. #ifdef QCA_DP_TX_RMNET_OPTIMIZATION
  1779. static inline bool
  1780. is_nbuf_frm_rmnet(qdf_nbuf_t nbuf, struct dp_tx_msdu_info_s *msdu_info)
  1781. {
  1782. struct net_device *ingress_dev;
  1783. skb_frag_t *frag;
  1784. uint16_t buf_len = 0;
  1785. uint16_t linear_data_len = 0;
  1786. uint8_t *payload_addr = NULL;
  1787. ingress_dev = dev_get_by_index(dev_net(nbuf->dev), nbuf->skb_iif);
  1788. if (!ingress_dev)
  1789. return false;
  1790. if ((ingress_dev->priv_flags & IFF_PHONY_HEADROOM)) {
  1791. dev_put(ingress_dev);
  1792. frag = &(skb_shinfo(nbuf)->frags[0]);
  1793. buf_len = skb_frag_size(frag);
  1794. payload_addr = (uint8_t *)skb_frag_address(frag);
  1795. linear_data_len = skb_headlen(nbuf);
  1796. buf_len += linear_data_len;
  1797. payload_addr = payload_addr - linear_data_len;
  1798. memcpy(payload_addr, nbuf->data, linear_data_len);
  1799. msdu_info->frm_type = dp_tx_frm_rmnet;
  1800. msdu_info->buf_len = buf_len;
  1801. msdu_info->payload_addr = payload_addr;
  1802. return true;
  1803. }
  1804. dev_put(ingress_dev);
  1805. return false;
  1806. }
  1807. static inline
  1808. qdf_dma_addr_t dp_tx_rmnet_nbuf_map(struct dp_tx_msdu_info_s *msdu_info,
  1809. struct dp_tx_desc_s *tx_desc)
  1810. {
  1811. qdf_dma_addr_t paddr;
  1812. paddr = (qdf_dma_addr_t)qdf_mem_virt_to_phys(msdu_info->payload_addr);
  1813. tx_desc->length = msdu_info->buf_len;
  1814. qdf_nbuf_dma_clean_range((void *)msdu_info->payload_addr,
  1815. (void *)(msdu_info->payload_addr +
  1816. msdu_info->buf_len));
  1817. tx_desc->flags |= DP_TX_DESC_FLAG_RMNET;
  1818. return paddr;
  1819. }
  1820. #else
  1821. static inline bool
  1822. is_nbuf_frm_rmnet(qdf_nbuf_t nbuf, struct dp_tx_msdu_info_s *msdu_info)
  1823. {
  1824. return false;
  1825. }
  1826. static inline
  1827. qdf_dma_addr_t dp_tx_rmnet_nbuf_map(struct dp_tx_msdu_info_s *msdu_info,
  1828. struct dp_tx_desc_s *tx_desc)
  1829. {
  1830. return 0;
  1831. }
  1832. #endif
  1833. #if defined(QCA_DP_TX_NBUF_NO_MAP_UNMAP) && !defined(BUILD_X86)
  1834. static inline
  1835. qdf_dma_addr_t dp_tx_nbuf_map(struct dp_vdev *vdev,
  1836. struct dp_tx_desc_s *tx_desc,
  1837. qdf_nbuf_t nbuf)
  1838. {
  1839. if (qdf_likely(tx_desc->flags & DP_TX_DESC_FLAG_SIMPLE)) {
  1840. qdf_nbuf_dma_clean_range((void *)nbuf->data,
  1841. (void *)(nbuf->data + nbuf->len));
  1842. return (qdf_dma_addr_t)qdf_mem_virt_to_phys(nbuf->data);
  1843. } else {
  1844. return dp_tx_nbuf_map_regular(vdev, tx_desc, nbuf);
  1845. }
  1846. }
  1847. static inline
  1848. void dp_tx_nbuf_unmap(struct dp_soc *soc,
  1849. struct dp_tx_desc_s *desc)
  1850. {
  1851. if (qdf_unlikely(!(desc->flags &
  1852. (DP_TX_DESC_FLAG_SIMPLE | DP_TX_DESC_FLAG_RMNET))))
  1853. return dp_tx_nbuf_unmap_regular(soc, desc);
  1854. }
  1855. #else
  1856. static inline
  1857. qdf_dma_addr_t dp_tx_nbuf_map(struct dp_vdev *vdev,
  1858. struct dp_tx_desc_s *tx_desc,
  1859. qdf_nbuf_t nbuf)
  1860. {
  1861. return dp_tx_nbuf_map_regular(vdev, tx_desc, nbuf);
  1862. }
  1863. static inline
  1864. void dp_tx_nbuf_unmap(struct dp_soc *soc,
  1865. struct dp_tx_desc_s *desc)
  1866. {
  1867. return dp_tx_nbuf_unmap_regular(soc, desc);
  1868. }
  1869. #endif
  1870. #if defined(WLAN_TX_PKT_CAPTURE_ENH) || defined(FEATURE_PERPKT_INFO)
  1871. static inline
  1872. void dp_tx_enh_unmap(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  1873. {
  1874. dp_tx_nbuf_unmap(soc, desc);
  1875. desc->flags |= DP_TX_DESC_FLAG_UNMAP_DONE;
  1876. }
  1877. static inline void dp_tx_unmap(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  1878. {
  1879. if (qdf_likely(!(desc->flags & DP_TX_DESC_FLAG_UNMAP_DONE)))
  1880. dp_tx_nbuf_unmap(soc, desc);
  1881. }
  1882. #else
  1883. static inline
  1884. void dp_tx_enh_unmap(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  1885. {
  1886. }
  1887. static inline void dp_tx_unmap(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  1888. {
  1889. dp_tx_nbuf_unmap(soc, desc);
  1890. }
  1891. #endif
  1892. #ifdef MESH_MODE_SUPPORT
  1893. /**
  1894. * dp_tx_update_mesh_flags() - Update descriptor flags for mesh VAP
  1895. * @soc: datapath SOC
  1896. * @vdev: datapath vdev
  1897. * @tx_desc: TX descriptor
  1898. *
  1899. * Return: None
  1900. */
  1901. static inline void dp_tx_update_mesh_flags(struct dp_soc *soc,
  1902. struct dp_vdev *vdev,
  1903. struct dp_tx_desc_s *tx_desc)
  1904. {
  1905. if (qdf_unlikely(vdev->mesh_vdev))
  1906. tx_desc->flags |= DP_TX_DESC_FLAG_MESH_MODE;
  1907. }
  1908. /**
  1909. * dp_mesh_tx_comp_free_buff() - Free the mesh tx packet buffer
  1910. * @soc: dp_soc handle
  1911. * @tx_desc: TX descriptor
  1912. * @delayed_free: delay the nbuf free
  1913. *
  1914. * Return: nbuf to be freed late
  1915. */
  1916. static inline qdf_nbuf_t dp_mesh_tx_comp_free_buff(struct dp_soc *soc,
  1917. struct dp_tx_desc_s *tx_desc,
  1918. bool delayed_free)
  1919. {
  1920. qdf_nbuf_t nbuf = tx_desc->nbuf;
  1921. struct dp_vdev *vdev = NULL;
  1922. vdev = dp_vdev_get_ref_by_id(soc, tx_desc->vdev_id, DP_MOD_ID_MESH);
  1923. if (tx_desc->flags & DP_TX_DESC_FLAG_TO_FW) {
  1924. if (vdev)
  1925. DP_STATS_INC(vdev, tx_i.mesh.completion_fw, 1);
  1926. if (delayed_free)
  1927. return nbuf;
  1928. qdf_nbuf_free(nbuf);
  1929. } else {
  1930. if (vdev && vdev->osif_tx_free_ext) {
  1931. vdev->osif_tx_free_ext((nbuf));
  1932. } else {
  1933. if (delayed_free)
  1934. return nbuf;
  1935. qdf_nbuf_free(nbuf);
  1936. }
  1937. }
  1938. if (vdev)
  1939. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_MESH);
  1940. return NULL;
  1941. }
  1942. #else
  1943. static inline void dp_tx_update_mesh_flags(struct dp_soc *soc,
  1944. struct dp_vdev *vdev,
  1945. struct dp_tx_desc_s *tx_desc)
  1946. {
  1947. }
  1948. static inline qdf_nbuf_t dp_mesh_tx_comp_free_buff(struct dp_soc *soc,
  1949. struct dp_tx_desc_s *tx_desc,
  1950. bool delayed_free)
  1951. {
  1952. return NULL;
  1953. }
  1954. #endif
  1955. int dp_tx_frame_is_drop(struct dp_vdev *vdev, uint8_t *srcmac, uint8_t *dstmac)
  1956. {
  1957. struct dp_pdev *pdev = NULL;
  1958. struct dp_ast_entry *src_ast_entry = NULL;
  1959. struct dp_ast_entry *dst_ast_entry = NULL;
  1960. struct dp_soc *soc = NULL;
  1961. qdf_assert(vdev);
  1962. pdev = vdev->pdev;
  1963. qdf_assert(pdev);
  1964. soc = pdev->soc;
  1965. dst_ast_entry = dp_peer_ast_hash_find_by_pdevid
  1966. (soc, dstmac, vdev->pdev->pdev_id);
  1967. src_ast_entry = dp_peer_ast_hash_find_by_pdevid
  1968. (soc, srcmac, vdev->pdev->pdev_id);
  1969. if (dst_ast_entry && src_ast_entry) {
  1970. if (dst_ast_entry->peer_id ==
  1971. src_ast_entry->peer_id)
  1972. return 1;
  1973. }
  1974. return 0;
  1975. }
  1976. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP) && \
  1977. defined(WLAN_MCAST_MLO)
  1978. /* MLO peer id for reinject*/
  1979. #define DP_MLO_MCAST_REINJECT_PEER_ID 0XFFFD
  1980. /* MLO vdev id inc offset */
  1981. #define DP_MLO_VDEV_ID_OFFSET 0x80
  1982. #ifdef QCA_SUPPORT_WDS_EXTENDED
  1983. static inline bool
  1984. dp_tx_wds_ext_check(struct cdp_tx_exception_metadata *tx_exc_metadata)
  1985. {
  1986. if (tx_exc_metadata && tx_exc_metadata->is_wds_extended)
  1987. return true;
  1988. return false;
  1989. }
  1990. #else
  1991. static inline bool
  1992. dp_tx_wds_ext_check(struct cdp_tx_exception_metadata *tx_exc_metadata)
  1993. {
  1994. return false;
  1995. }
  1996. #endif
  1997. static inline void
  1998. dp_tx_bypass_reinjection(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc,
  1999. struct cdp_tx_exception_metadata *tx_exc_metadata)
  2000. {
  2001. /* wds ext enabled will not set the TO_FW bit */
  2002. if (dp_tx_wds_ext_check(tx_exc_metadata))
  2003. return;
  2004. if (!(tx_desc->flags & DP_TX_DESC_FLAG_TO_FW)) {
  2005. tx_desc->flags |= DP_TX_DESC_FLAG_TO_FW;
  2006. qdf_atomic_inc(&soc->num_tx_exception);
  2007. }
  2008. }
  2009. static inline void
  2010. dp_tx_update_mcast_param(uint16_t peer_id,
  2011. uint16_t *htt_tcl_metadata,
  2012. struct dp_vdev *vdev,
  2013. struct dp_tx_msdu_info_s *msdu_info)
  2014. {
  2015. if (peer_id == DP_MLO_MCAST_REINJECT_PEER_ID) {
  2016. *htt_tcl_metadata = 0;
  2017. DP_TX_TCL_METADATA_TYPE_SET(
  2018. *htt_tcl_metadata,
  2019. HTT_TCL_METADATA_V2_TYPE_GLOBAL_SEQ_BASED);
  2020. HTT_TX_TCL_METADATA_GLBL_SEQ_NO_SET(*htt_tcl_metadata,
  2021. msdu_info->gsn);
  2022. msdu_info->vdev_id = vdev->vdev_id + DP_MLO_VDEV_ID_OFFSET;
  2023. HTT_TX_TCL_METADATA_GLBL_SEQ_HOST_INSPECTED_SET(
  2024. *htt_tcl_metadata, 1);
  2025. } else {
  2026. msdu_info->vdev_id = vdev->vdev_id;
  2027. }
  2028. }
  2029. #else
  2030. static inline void
  2031. dp_tx_bypass_reinjection(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc,
  2032. struct cdp_tx_exception_metadata *tx_exc_metadata)
  2033. {
  2034. }
  2035. static inline void
  2036. dp_tx_update_mcast_param(uint16_t peer_id,
  2037. uint16_t *htt_tcl_metadata,
  2038. struct dp_vdev *vdev,
  2039. struct dp_tx_msdu_info_s *msdu_info)
  2040. {
  2041. }
  2042. #endif
  2043. #ifdef DP_TX_SW_DROP_STATS_INC
  2044. static void tx_sw_drop_stats_inc(struct dp_pdev *pdev,
  2045. qdf_nbuf_t nbuf,
  2046. enum cdp_tx_sw_drop drop_code)
  2047. {
  2048. /* EAPOL Drop stats */
  2049. if (qdf_nbuf_is_ipv4_eapol_pkt(nbuf)) {
  2050. switch (drop_code) {
  2051. case TX_DESC_ERR:
  2052. DP_STATS_INC(pdev, eap_drop_stats.tx_desc_err, 1);
  2053. break;
  2054. case TX_HAL_RING_ACCESS_ERR:
  2055. DP_STATS_INC(pdev,
  2056. eap_drop_stats.tx_hal_ring_access_err, 1);
  2057. break;
  2058. case TX_DMA_MAP_ERR:
  2059. DP_STATS_INC(pdev, eap_drop_stats.tx_dma_map_err, 1);
  2060. break;
  2061. case TX_HW_ENQUEUE:
  2062. DP_STATS_INC(pdev, eap_drop_stats.tx_hw_enqueue, 1);
  2063. break;
  2064. case TX_SW_ENQUEUE:
  2065. DP_STATS_INC(pdev, eap_drop_stats.tx_sw_enqueue, 1);
  2066. break;
  2067. default:
  2068. dp_info_rl("Invalid eapol_drop code: %d", drop_code);
  2069. break;
  2070. }
  2071. }
  2072. }
  2073. #else
  2074. static void tx_sw_drop_stats_inc(struct dp_pdev *pdev,
  2075. qdf_nbuf_t nbuf,
  2076. enum cdp_tx_sw_drop drop_code)
  2077. {
  2078. }
  2079. #endif
  2080. qdf_nbuf_t
  2081. dp_tx_send_msdu_single(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  2082. struct dp_tx_msdu_info_s *msdu_info, uint16_t peer_id,
  2083. struct cdp_tx_exception_metadata *tx_exc_metadata)
  2084. {
  2085. struct dp_pdev *pdev = vdev->pdev;
  2086. struct dp_soc *soc = pdev->soc;
  2087. struct dp_tx_desc_s *tx_desc;
  2088. QDF_STATUS status;
  2089. struct dp_tx_queue *tx_q = &(msdu_info->tx_queue);
  2090. uint16_t htt_tcl_metadata = 0;
  2091. enum cdp_tx_sw_drop drop_code = TX_MAX_DROP;
  2092. uint8_t tid = msdu_info->tid;
  2093. struct cdp_tid_tx_stats *tid_stats = NULL;
  2094. qdf_dma_addr_t paddr;
  2095. /* Setup Tx descriptor for an MSDU, and MSDU extension descriptor */
  2096. tx_desc = dp_tx_prepare_desc_single(vdev, nbuf, tx_q->desc_pool_id,
  2097. msdu_info, tx_exc_metadata);
  2098. if (!tx_desc) {
  2099. dp_err_rl("Tx_desc prepare Fail vdev_id %d vdev %pK queue %d",
  2100. vdev->vdev_id, vdev, tx_q->desc_pool_id);
  2101. drop_code = TX_DESC_ERR;
  2102. goto fail_return;
  2103. }
  2104. dp_tx_update_tdls_flags(soc, vdev, tx_desc);
  2105. if (qdf_unlikely(peer_id == DP_INVALID_PEER)) {
  2106. htt_tcl_metadata = vdev->htt_tcl_metadata;
  2107. DP_TX_TCL_METADATA_HOST_INSPECTED_SET(htt_tcl_metadata, 1);
  2108. } else if (qdf_unlikely(peer_id != HTT_INVALID_PEER)) {
  2109. DP_TX_TCL_METADATA_TYPE_SET(htt_tcl_metadata,
  2110. DP_TCL_METADATA_TYPE_PEER_BASED);
  2111. DP_TX_TCL_METADATA_PEER_ID_SET(htt_tcl_metadata,
  2112. peer_id);
  2113. dp_tx_bypass_reinjection(soc, tx_desc, tx_exc_metadata);
  2114. } else
  2115. htt_tcl_metadata = vdev->htt_tcl_metadata;
  2116. if (msdu_info->exception_fw)
  2117. DP_TX_TCL_METADATA_VALID_HTT_SET(htt_tcl_metadata, 1);
  2118. dp_tx_desc_update_fast_comp_flag(soc, tx_desc,
  2119. !pdev->enhanced_stats_en);
  2120. dp_tx_update_mesh_flags(soc, vdev, tx_desc);
  2121. if (qdf_unlikely(msdu_info->frm_type == dp_tx_frm_rmnet))
  2122. paddr = dp_tx_rmnet_nbuf_map(msdu_info, tx_desc);
  2123. else
  2124. paddr = dp_tx_nbuf_map(vdev, tx_desc, nbuf);
  2125. if (!paddr) {
  2126. /* Handle failure */
  2127. dp_err("qdf_nbuf_map failed");
  2128. DP_STATS_INC(vdev, tx_i.dropped.dma_error, 1);
  2129. drop_code = TX_DMA_MAP_ERR;
  2130. goto release_desc;
  2131. }
  2132. tx_desc->dma_addr = paddr;
  2133. dp_tx_desc_history_add(soc, tx_desc->dma_addr, nbuf,
  2134. tx_desc->id, DP_TX_DESC_MAP);
  2135. dp_tx_update_mcast_param(peer_id, &htt_tcl_metadata, vdev, msdu_info);
  2136. /* Enqueue the Tx MSDU descriptor to HW for transmit */
  2137. status = soc->arch_ops.tx_hw_enqueue(soc, vdev, tx_desc,
  2138. htt_tcl_metadata,
  2139. tx_exc_metadata, msdu_info);
  2140. if (status != QDF_STATUS_SUCCESS) {
  2141. dp_tx_err_rl("Tx_hw_enqueue Fail tx_desc %pK queue %d",
  2142. tx_desc, tx_q->ring_id);
  2143. dp_tx_desc_history_add(soc, tx_desc->dma_addr, nbuf,
  2144. tx_desc->id, DP_TX_DESC_UNMAP);
  2145. dp_tx_nbuf_unmap(soc, tx_desc);
  2146. drop_code = TX_HW_ENQUEUE;
  2147. goto release_desc;
  2148. }
  2149. tx_sw_drop_stats_inc(pdev, nbuf, drop_code);
  2150. return NULL;
  2151. release_desc:
  2152. dp_tx_desc_release(soc, tx_desc, tx_q->desc_pool_id);
  2153. fail_return:
  2154. dp_tx_get_tid(vdev, nbuf, msdu_info);
  2155. tx_sw_drop_stats_inc(pdev, nbuf, drop_code);
  2156. tid_stats = &pdev->stats.tid_stats.
  2157. tid_tx_stats[tx_q->ring_id][tid];
  2158. tid_stats->swdrop_cnt[drop_code]++;
  2159. return nbuf;
  2160. }
  2161. /**
  2162. * dp_tdls_tx_comp_free_buff() - Free non std buffer when TDLS flag is set
  2163. * @soc: Soc handle
  2164. * @desc: software Tx descriptor to be processed
  2165. *
  2166. * Return: 0 if Success
  2167. */
  2168. #ifdef FEATURE_WLAN_TDLS
  2169. static inline int
  2170. dp_tdls_tx_comp_free_buff(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  2171. {
  2172. /* If it is TDLS mgmt, don't unmap or free the frame */
  2173. if (desc->flags & DP_TX_DESC_FLAG_TDLS_FRAME) {
  2174. dp_non_std_htt_tx_comp_free_buff(soc, desc);
  2175. return 0;
  2176. }
  2177. return 1;
  2178. }
  2179. #else
  2180. static inline int
  2181. dp_tdls_tx_comp_free_buff(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  2182. {
  2183. return 1;
  2184. }
  2185. #endif
  2186. qdf_nbuf_t dp_tx_comp_free_buf(struct dp_soc *soc, struct dp_tx_desc_s *desc,
  2187. bool delayed_free)
  2188. {
  2189. qdf_nbuf_t nbuf = desc->nbuf;
  2190. enum dp_tx_event_type type = dp_tx_get_event_type(desc->flags);
  2191. /* nbuf already freed in vdev detach path */
  2192. if (!nbuf)
  2193. return NULL;
  2194. if (!dp_tdls_tx_comp_free_buff(soc, desc))
  2195. return NULL;
  2196. /* 0 : MSDU buffer, 1 : MLE */
  2197. if (desc->msdu_ext_desc) {
  2198. /* TSO free */
  2199. if (hal_tx_ext_desc_get_tso_enable(
  2200. desc->msdu_ext_desc->vaddr)) {
  2201. dp_tx_desc_history_add(soc, desc->dma_addr, desc->nbuf,
  2202. desc->id, DP_TX_COMP_MSDU_EXT);
  2203. dp_tx_tso_seg_history_add(soc,
  2204. desc->msdu_ext_desc->tso_desc,
  2205. desc->nbuf, desc->id, type);
  2206. /* unmap eash TSO seg before free the nbuf */
  2207. dp_tx_tso_unmap_segment(soc,
  2208. desc->msdu_ext_desc->tso_desc,
  2209. desc->msdu_ext_desc->
  2210. tso_num_desc);
  2211. goto nbuf_free;
  2212. }
  2213. if (qdf_unlikely(desc->frm_type == dp_tx_frm_sg)) {
  2214. void *msdu_ext_desc = desc->msdu_ext_desc->vaddr;
  2215. qdf_dma_addr_t iova;
  2216. uint32_t frag_len;
  2217. uint32_t i;
  2218. qdf_nbuf_unmap_nbytes_single(soc->osdev, nbuf,
  2219. QDF_DMA_TO_DEVICE,
  2220. qdf_nbuf_headlen(nbuf));
  2221. for (i = 1; i < DP_TX_MAX_NUM_FRAGS; i++) {
  2222. hal_tx_ext_desc_get_frag_info(msdu_ext_desc, i,
  2223. &iova,
  2224. &frag_len);
  2225. if (!iova || !frag_len)
  2226. break;
  2227. qdf_mem_unmap_page(soc->osdev, iova, frag_len,
  2228. QDF_DMA_TO_DEVICE);
  2229. }
  2230. goto nbuf_free;
  2231. }
  2232. }
  2233. /* If it's ME frame, dont unmap the cloned nbuf's */
  2234. if ((desc->flags & DP_TX_DESC_FLAG_ME) && qdf_nbuf_is_cloned(nbuf))
  2235. goto nbuf_free;
  2236. dp_tx_desc_history_add(soc, desc->dma_addr, desc->nbuf, desc->id, type);
  2237. dp_tx_unmap(soc, desc);
  2238. if (desc->flags & DP_TX_DESC_FLAG_MESH_MODE)
  2239. return dp_mesh_tx_comp_free_buff(soc, desc, delayed_free);
  2240. if (dp_tx_traffic_end_indication_enq_ind_pkt(soc, desc, nbuf))
  2241. return NULL;
  2242. nbuf_free:
  2243. if (delayed_free)
  2244. return nbuf;
  2245. qdf_nbuf_free(nbuf);
  2246. return NULL;
  2247. }
  2248. /**
  2249. * dp_tx_sg_unmap_buf() - Unmap scatter gather fragments
  2250. * @soc: DP soc handle
  2251. * @nbuf: skb
  2252. * @msdu_info: MSDU info
  2253. *
  2254. * Return: None
  2255. */
  2256. static inline void
  2257. dp_tx_sg_unmap_buf(struct dp_soc *soc, qdf_nbuf_t nbuf,
  2258. struct dp_tx_msdu_info_s *msdu_info)
  2259. {
  2260. uint32_t cur_idx;
  2261. struct dp_tx_seg_info_s *seg = msdu_info->u.sg_info.curr_seg;
  2262. qdf_nbuf_unmap_nbytes_single(soc->osdev, nbuf, QDF_DMA_TO_DEVICE,
  2263. qdf_nbuf_headlen(nbuf));
  2264. for (cur_idx = 1; cur_idx < seg->frag_cnt; cur_idx++)
  2265. qdf_mem_unmap_page(soc->osdev, (qdf_dma_addr_t)
  2266. (seg->frags[cur_idx].paddr_lo | ((uint64_t)
  2267. seg->frags[cur_idx].paddr_hi) << 32),
  2268. seg->frags[cur_idx].len,
  2269. QDF_DMA_TO_DEVICE);
  2270. }
  2271. #if QDF_LOCK_STATS
  2272. noinline
  2273. #else
  2274. #endif
  2275. qdf_nbuf_t dp_tx_send_msdu_multiple(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  2276. struct dp_tx_msdu_info_s *msdu_info)
  2277. {
  2278. uint32_t i;
  2279. struct dp_pdev *pdev = vdev->pdev;
  2280. struct dp_soc *soc = pdev->soc;
  2281. struct dp_tx_desc_s *tx_desc;
  2282. bool is_cce_classified = false;
  2283. QDF_STATUS status;
  2284. uint16_t htt_tcl_metadata = 0;
  2285. struct dp_tx_queue *tx_q = &msdu_info->tx_queue;
  2286. struct cdp_tid_tx_stats *tid_stats = NULL;
  2287. uint8_t prep_desc_fail = 0, hw_enq_fail = 0;
  2288. if (msdu_info->frm_type == dp_tx_frm_me)
  2289. nbuf = msdu_info->u.sg_info.curr_seg->nbuf;
  2290. i = 0;
  2291. /* Print statement to track i and num_seg */
  2292. /*
  2293. * For each segment (maps to 1 MSDU) , prepare software and hardware
  2294. * descriptors using information in msdu_info
  2295. */
  2296. while (i < msdu_info->num_seg) {
  2297. /*
  2298. * Setup Tx descriptor for an MSDU, and MSDU extension
  2299. * descriptor
  2300. */
  2301. tx_desc = dp_tx_prepare_desc(vdev, nbuf, msdu_info,
  2302. tx_q->desc_pool_id);
  2303. if (!tx_desc) {
  2304. if (msdu_info->frm_type == dp_tx_frm_me) {
  2305. prep_desc_fail++;
  2306. dp_tx_me_free_buf(pdev,
  2307. (void *)(msdu_info->u.sg_info
  2308. .curr_seg->frags[0].vaddr));
  2309. if (prep_desc_fail == msdu_info->num_seg) {
  2310. /*
  2311. * Unmap is needed only if descriptor
  2312. * preparation failed for all segments.
  2313. */
  2314. qdf_nbuf_unmap(soc->osdev,
  2315. msdu_info->u.sg_info.
  2316. curr_seg->nbuf,
  2317. QDF_DMA_TO_DEVICE);
  2318. }
  2319. /*
  2320. * Free the nbuf for the current segment
  2321. * and make it point to the next in the list.
  2322. * For me, there are as many segments as there
  2323. * are no of clients.
  2324. */
  2325. qdf_nbuf_free(msdu_info->u.sg_info
  2326. .curr_seg->nbuf);
  2327. if (msdu_info->u.sg_info.curr_seg->next) {
  2328. msdu_info->u.sg_info.curr_seg =
  2329. msdu_info->u.sg_info
  2330. .curr_seg->next;
  2331. nbuf = msdu_info->u.sg_info
  2332. .curr_seg->nbuf;
  2333. }
  2334. i++;
  2335. continue;
  2336. }
  2337. if (msdu_info->frm_type == dp_tx_frm_tso) {
  2338. dp_tx_tso_seg_history_add(
  2339. soc,
  2340. msdu_info->u.tso_info.curr_seg,
  2341. nbuf, 0, DP_TX_DESC_UNMAP);
  2342. dp_tx_tso_unmap_segment(soc,
  2343. msdu_info->u.tso_info.
  2344. curr_seg,
  2345. msdu_info->u.tso_info.
  2346. tso_num_seg_list);
  2347. if (msdu_info->u.tso_info.curr_seg->next) {
  2348. msdu_info->u.tso_info.curr_seg =
  2349. msdu_info->u.tso_info.curr_seg->next;
  2350. i++;
  2351. continue;
  2352. }
  2353. }
  2354. if (msdu_info->frm_type == dp_tx_frm_sg)
  2355. dp_tx_sg_unmap_buf(soc, nbuf, msdu_info);
  2356. goto done;
  2357. }
  2358. if (msdu_info->frm_type == dp_tx_frm_me) {
  2359. tx_desc->msdu_ext_desc->me_buffer =
  2360. (struct dp_tx_me_buf_t *)msdu_info->
  2361. u.sg_info.curr_seg->frags[0].vaddr;
  2362. tx_desc->flags |= DP_TX_DESC_FLAG_ME;
  2363. }
  2364. if (is_cce_classified)
  2365. tx_desc->flags |= DP_TX_DESC_FLAG_TO_FW;
  2366. htt_tcl_metadata = vdev->htt_tcl_metadata;
  2367. if (msdu_info->exception_fw) {
  2368. DP_TX_TCL_METADATA_VALID_HTT_SET(htt_tcl_metadata, 1);
  2369. }
  2370. dp_tx_is_hp_update_required(i, msdu_info);
  2371. /*
  2372. * For frames with multiple segments (TSO, ME), jump to next
  2373. * segment.
  2374. */
  2375. if (msdu_info->frm_type == dp_tx_frm_tso) {
  2376. if (msdu_info->u.tso_info.curr_seg->next) {
  2377. msdu_info->u.tso_info.curr_seg =
  2378. msdu_info->u.tso_info.curr_seg->next;
  2379. /*
  2380. * If this is a jumbo nbuf, then increment the
  2381. * number of nbuf users for each additional
  2382. * segment of the msdu. This will ensure that
  2383. * the skb is freed only after receiving tx
  2384. * completion for all segments of an nbuf
  2385. */
  2386. qdf_nbuf_inc_users(nbuf);
  2387. /* Check with MCL if this is needed */
  2388. /* nbuf = msdu_info->u.tso_info.curr_seg->nbuf;
  2389. */
  2390. }
  2391. }
  2392. dp_tx_update_mcast_param(DP_INVALID_PEER,
  2393. &htt_tcl_metadata,
  2394. vdev,
  2395. msdu_info);
  2396. /*
  2397. * Enqueue the Tx MSDU descriptor to HW for transmit
  2398. */
  2399. status = soc->arch_ops.tx_hw_enqueue(soc, vdev, tx_desc,
  2400. htt_tcl_metadata,
  2401. NULL, msdu_info);
  2402. dp_tx_check_and_flush_hp(soc, status, msdu_info);
  2403. if (status != QDF_STATUS_SUCCESS) {
  2404. dp_info_rl("Tx_hw_enqueue Fail tx_desc %pK queue %d",
  2405. tx_desc, tx_q->ring_id);
  2406. dp_tx_get_tid(vdev, nbuf, msdu_info);
  2407. tid_stats = &pdev->stats.tid_stats.
  2408. tid_tx_stats[tx_q->ring_id][msdu_info->tid];
  2409. tid_stats->swdrop_cnt[TX_HW_ENQUEUE]++;
  2410. if (msdu_info->frm_type == dp_tx_frm_me) {
  2411. hw_enq_fail++;
  2412. if (hw_enq_fail == msdu_info->num_seg) {
  2413. /*
  2414. * Unmap is needed only if enqueue
  2415. * failed for all segments.
  2416. */
  2417. qdf_nbuf_unmap(soc->osdev,
  2418. msdu_info->u.sg_info.
  2419. curr_seg->nbuf,
  2420. QDF_DMA_TO_DEVICE);
  2421. }
  2422. /*
  2423. * Free the nbuf for the current segment
  2424. * and make it point to the next in the list.
  2425. * For me, there are as many segments as there
  2426. * are no of clients.
  2427. */
  2428. qdf_nbuf_free(msdu_info->u.sg_info
  2429. .curr_seg->nbuf);
  2430. dp_tx_desc_release(soc, tx_desc,
  2431. tx_q->desc_pool_id);
  2432. if (msdu_info->u.sg_info.curr_seg->next) {
  2433. msdu_info->u.sg_info.curr_seg =
  2434. msdu_info->u.sg_info
  2435. .curr_seg->next;
  2436. nbuf = msdu_info->u.sg_info
  2437. .curr_seg->nbuf;
  2438. } else
  2439. break;
  2440. i++;
  2441. continue;
  2442. }
  2443. /*
  2444. * For TSO frames, the nbuf users increment done for
  2445. * the current segment has to be reverted, since the
  2446. * hw enqueue for this segment failed
  2447. */
  2448. if (msdu_info->frm_type == dp_tx_frm_tso &&
  2449. msdu_info->u.tso_info.curr_seg) {
  2450. /*
  2451. * unmap and free current,
  2452. * retransmit remaining segments
  2453. */
  2454. dp_tx_comp_free_buf(soc, tx_desc, false);
  2455. i++;
  2456. dp_tx_desc_release(soc, tx_desc,
  2457. tx_q->desc_pool_id);
  2458. continue;
  2459. }
  2460. if (msdu_info->frm_type == dp_tx_frm_sg)
  2461. dp_tx_sg_unmap_buf(soc, nbuf, msdu_info);
  2462. dp_tx_desc_release(soc, tx_desc, tx_q->desc_pool_id);
  2463. goto done;
  2464. }
  2465. /*
  2466. * TODO
  2467. * if tso_info structure can be modified to have curr_seg
  2468. * as first element, following 2 blocks of code (for TSO and SG)
  2469. * can be combined into 1
  2470. */
  2471. /*
  2472. * For Multicast-Unicast converted packets,
  2473. * each converted frame (for a client) is represented as
  2474. * 1 segment
  2475. */
  2476. if ((msdu_info->frm_type == dp_tx_frm_sg) ||
  2477. (msdu_info->frm_type == dp_tx_frm_me)) {
  2478. if (msdu_info->u.sg_info.curr_seg->next) {
  2479. msdu_info->u.sg_info.curr_seg =
  2480. msdu_info->u.sg_info.curr_seg->next;
  2481. nbuf = msdu_info->u.sg_info.curr_seg->nbuf;
  2482. } else
  2483. break;
  2484. }
  2485. i++;
  2486. }
  2487. nbuf = NULL;
  2488. done:
  2489. return nbuf;
  2490. }
  2491. /**
  2492. * dp_tx_prepare_sg()- Extract SG info from NBUF and prepare msdu_info
  2493. * for SG frames
  2494. * @vdev: DP vdev handle
  2495. * @nbuf: skb
  2496. * @seg_info: Pointer to Segment info Descriptor to be prepared
  2497. * @msdu_info: MSDU info to be setup in MSDU descriptor and MSDU extension desc.
  2498. *
  2499. * Return: NULL on success,
  2500. * nbuf when it fails to send
  2501. */
  2502. static qdf_nbuf_t dp_tx_prepare_sg(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  2503. struct dp_tx_seg_info_s *seg_info, struct dp_tx_msdu_info_s *msdu_info)
  2504. {
  2505. uint32_t cur_frag, nr_frags, i;
  2506. qdf_dma_addr_t paddr;
  2507. struct dp_tx_sg_info_s *sg_info;
  2508. sg_info = &msdu_info->u.sg_info;
  2509. nr_frags = qdf_nbuf_get_nr_frags(nbuf);
  2510. if (QDF_STATUS_SUCCESS !=
  2511. qdf_nbuf_map_nbytes_single(vdev->osdev, nbuf,
  2512. QDF_DMA_TO_DEVICE,
  2513. qdf_nbuf_headlen(nbuf))) {
  2514. dp_tx_err("dma map error");
  2515. DP_STATS_INC(vdev, tx_i.sg.dma_map_error, 1);
  2516. qdf_nbuf_free(nbuf);
  2517. return NULL;
  2518. }
  2519. paddr = qdf_nbuf_mapped_paddr_get(nbuf);
  2520. seg_info->frags[0].paddr_lo = paddr;
  2521. seg_info->frags[0].paddr_hi = ((uint64_t) paddr) >> 32;
  2522. seg_info->frags[0].len = qdf_nbuf_headlen(nbuf);
  2523. seg_info->frags[0].vaddr = (void *) nbuf;
  2524. for (cur_frag = 0; cur_frag < nr_frags; cur_frag++) {
  2525. if (QDF_STATUS_SUCCESS != qdf_nbuf_frag_map(vdev->osdev,
  2526. nbuf, 0,
  2527. QDF_DMA_TO_DEVICE,
  2528. cur_frag)) {
  2529. dp_tx_err("frag dma map error");
  2530. DP_STATS_INC(vdev, tx_i.sg.dma_map_error, 1);
  2531. goto map_err;
  2532. }
  2533. paddr = qdf_nbuf_get_tx_frag_paddr(nbuf);
  2534. seg_info->frags[cur_frag + 1].paddr_lo = paddr;
  2535. seg_info->frags[cur_frag + 1].paddr_hi =
  2536. ((uint64_t) paddr) >> 32;
  2537. seg_info->frags[cur_frag + 1].len =
  2538. qdf_nbuf_get_frag_size(nbuf, cur_frag);
  2539. }
  2540. seg_info->frag_cnt = (cur_frag + 1);
  2541. seg_info->total_len = qdf_nbuf_len(nbuf);
  2542. seg_info->next = NULL;
  2543. sg_info->curr_seg = seg_info;
  2544. msdu_info->frm_type = dp_tx_frm_sg;
  2545. msdu_info->num_seg = 1;
  2546. return nbuf;
  2547. map_err:
  2548. /* restore paddr into nbuf before calling unmap */
  2549. qdf_nbuf_mapped_paddr_set(nbuf,
  2550. (qdf_dma_addr_t)(seg_info->frags[0].paddr_lo |
  2551. ((uint64_t)
  2552. seg_info->frags[0].paddr_hi) << 32));
  2553. qdf_nbuf_unmap_nbytes_single(vdev->osdev, nbuf,
  2554. QDF_DMA_TO_DEVICE,
  2555. seg_info->frags[0].len);
  2556. for (i = 1; i <= cur_frag; i++) {
  2557. qdf_mem_unmap_page(vdev->osdev, (qdf_dma_addr_t)
  2558. (seg_info->frags[i].paddr_lo | ((uint64_t)
  2559. seg_info->frags[i].paddr_hi) << 32),
  2560. seg_info->frags[i].len,
  2561. QDF_DMA_TO_DEVICE);
  2562. }
  2563. qdf_nbuf_free(nbuf);
  2564. return NULL;
  2565. }
  2566. /**
  2567. * dp_tx_add_tx_sniffer_meta_data()- Add tx_sniffer meta hdr info
  2568. * @vdev: DP vdev handle
  2569. * @msdu_info: MSDU info to be setup in MSDU descriptor and MSDU extension desc.
  2570. * @ppdu_cookie: PPDU cookie that should be replayed in the ppdu completions
  2571. *
  2572. * Return: NULL on failure,
  2573. * nbuf when extracted successfully
  2574. */
  2575. static
  2576. void dp_tx_add_tx_sniffer_meta_data(struct dp_vdev *vdev,
  2577. struct dp_tx_msdu_info_s *msdu_info,
  2578. uint16_t ppdu_cookie)
  2579. {
  2580. struct htt_tx_msdu_desc_ext2_t *meta_data =
  2581. (struct htt_tx_msdu_desc_ext2_t *)&msdu_info->meta_data[0];
  2582. qdf_mem_zero(meta_data, sizeof(struct htt_tx_msdu_desc_ext2_t));
  2583. HTT_TX_MSDU_EXT2_DESC_FLAG_SEND_AS_STANDALONE_SET
  2584. (msdu_info->meta_data[5], 1);
  2585. HTT_TX_MSDU_EXT2_DESC_FLAG_HOST_OPAQUE_VALID_SET
  2586. (msdu_info->meta_data[5], 1);
  2587. HTT_TX_MSDU_EXT2_DESC_HOST_OPAQUE_COOKIE_SET
  2588. (msdu_info->meta_data[6], ppdu_cookie);
  2589. msdu_info->exception_fw = 1;
  2590. msdu_info->is_tx_sniffer = 1;
  2591. }
  2592. #ifdef MESH_MODE_SUPPORT
  2593. /**
  2594. * dp_tx_extract_mesh_meta_data()- Extract mesh meta hdr info from nbuf
  2595. * and prepare msdu_info for mesh frames.
  2596. * @vdev: DP vdev handle
  2597. * @nbuf: skb
  2598. * @msdu_info: MSDU info to be setup in MSDU descriptor and MSDU extension desc.
  2599. *
  2600. * Return: NULL on failure,
  2601. * nbuf when extracted successfully
  2602. */
  2603. static
  2604. qdf_nbuf_t dp_tx_extract_mesh_meta_data(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  2605. struct dp_tx_msdu_info_s *msdu_info)
  2606. {
  2607. struct meta_hdr_s *mhdr;
  2608. struct htt_tx_msdu_desc_ext2_t *meta_data =
  2609. (struct htt_tx_msdu_desc_ext2_t *)&msdu_info->meta_data[0];
  2610. mhdr = (struct meta_hdr_s *)qdf_nbuf_data(nbuf);
  2611. if (CB_FTYPE_MESH_TX_INFO != qdf_nbuf_get_tx_ftype(nbuf)) {
  2612. msdu_info->exception_fw = 0;
  2613. goto remove_meta_hdr;
  2614. }
  2615. msdu_info->exception_fw = 1;
  2616. qdf_mem_zero(meta_data, sizeof(struct htt_tx_msdu_desc_ext2_t));
  2617. meta_data->host_tx_desc_pool = 1;
  2618. meta_data->update_peer_cache = 1;
  2619. meta_data->learning_frame = 1;
  2620. if (!(mhdr->flags & METAHDR_FLAG_AUTO_RATE)) {
  2621. meta_data->power = mhdr->power;
  2622. meta_data->mcs_mask = 1 << mhdr->rate_info[0].mcs;
  2623. meta_data->nss_mask = 1 << mhdr->rate_info[0].nss;
  2624. meta_data->pream_type = mhdr->rate_info[0].preamble_type;
  2625. meta_data->retry_limit = mhdr->rate_info[0].max_tries;
  2626. meta_data->dyn_bw = 1;
  2627. meta_data->valid_pwr = 1;
  2628. meta_data->valid_mcs_mask = 1;
  2629. meta_data->valid_nss_mask = 1;
  2630. meta_data->valid_preamble_type = 1;
  2631. meta_data->valid_retries = 1;
  2632. meta_data->valid_bw_info = 1;
  2633. }
  2634. if (mhdr->flags & METAHDR_FLAG_NOENCRYPT) {
  2635. meta_data->encrypt_type = 0;
  2636. meta_data->valid_encrypt_type = 1;
  2637. meta_data->learning_frame = 0;
  2638. }
  2639. meta_data->valid_key_flags = 1;
  2640. meta_data->key_flags = (mhdr->keyix & 0x3);
  2641. remove_meta_hdr:
  2642. if (qdf_nbuf_pull_head(nbuf, sizeof(struct meta_hdr_s)) == NULL) {
  2643. dp_tx_err("qdf_nbuf_pull_head failed");
  2644. qdf_nbuf_free(nbuf);
  2645. return NULL;
  2646. }
  2647. msdu_info->tid = qdf_nbuf_get_priority(nbuf);
  2648. dp_tx_info("Meta hdr %0x %0x %0x %0x %0x %0x"
  2649. " tid %d to_fw %d",
  2650. msdu_info->meta_data[0],
  2651. msdu_info->meta_data[1],
  2652. msdu_info->meta_data[2],
  2653. msdu_info->meta_data[3],
  2654. msdu_info->meta_data[4],
  2655. msdu_info->meta_data[5],
  2656. msdu_info->tid, msdu_info->exception_fw);
  2657. return nbuf;
  2658. }
  2659. #else
  2660. static
  2661. qdf_nbuf_t dp_tx_extract_mesh_meta_data(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  2662. struct dp_tx_msdu_info_s *msdu_info)
  2663. {
  2664. return nbuf;
  2665. }
  2666. #endif
  2667. /**
  2668. * dp_check_exc_metadata() - Checks if parameters are valid
  2669. * @tx_exc: holds all exception path parameters
  2670. *
  2671. * Return: true when all the parameters are valid else false
  2672. *
  2673. */
  2674. static bool dp_check_exc_metadata(struct cdp_tx_exception_metadata *tx_exc)
  2675. {
  2676. bool invalid_tid = (tx_exc->tid >= DP_MAX_TIDS && tx_exc->tid !=
  2677. HTT_INVALID_TID);
  2678. bool invalid_encap_type =
  2679. (tx_exc->tx_encap_type > htt_cmn_pkt_num_types &&
  2680. tx_exc->tx_encap_type != CDP_INVALID_TX_ENCAP_TYPE);
  2681. bool invalid_sec_type = (tx_exc->sec_type > cdp_num_sec_types &&
  2682. tx_exc->sec_type != CDP_INVALID_SEC_TYPE);
  2683. bool invalid_cookie = (tx_exc->is_tx_sniffer == 1 &&
  2684. tx_exc->ppdu_cookie == 0);
  2685. if (tx_exc->is_intrabss_fwd)
  2686. return true;
  2687. if (invalid_tid || invalid_encap_type || invalid_sec_type ||
  2688. invalid_cookie) {
  2689. return false;
  2690. }
  2691. return true;
  2692. }
  2693. #ifdef ATH_SUPPORT_IQUE
  2694. bool dp_tx_mcast_enhance(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  2695. {
  2696. qdf_ether_header_t *eh;
  2697. /* Mcast to Ucast Conversion*/
  2698. if (qdf_likely(!vdev->mcast_enhancement_en))
  2699. return true;
  2700. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  2701. if (DP_FRAME_IS_MULTICAST((eh)->ether_dhost) &&
  2702. !DP_FRAME_IS_BROADCAST((eh)->ether_dhost)) {
  2703. dp_verbose_debug("Mcast frm for ME %pK", vdev);
  2704. qdf_nbuf_set_next(nbuf, NULL);
  2705. DP_STATS_INC_PKT(vdev, tx_i.mcast_en.mcast_pkt, 1,
  2706. qdf_nbuf_len(nbuf));
  2707. if (dp_tx_prepare_send_me(vdev, nbuf) ==
  2708. QDF_STATUS_SUCCESS) {
  2709. return false;
  2710. }
  2711. if (qdf_unlikely(vdev->igmp_mcast_enhanc_en > 0)) {
  2712. if (dp_tx_prepare_send_igmp_me(vdev, nbuf) ==
  2713. QDF_STATUS_SUCCESS) {
  2714. return false;
  2715. }
  2716. }
  2717. }
  2718. return true;
  2719. }
  2720. #else
  2721. bool dp_tx_mcast_enhance(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  2722. {
  2723. return true;
  2724. }
  2725. #endif
  2726. #ifdef QCA_SUPPORT_WDS_EXTENDED
  2727. /**
  2728. * dp_tx_mcast_drop() - Drop mcast frame if drop_tx_mcast is set in WDS_EXT
  2729. * @vdev: vdev handle
  2730. * @nbuf: skb
  2731. *
  2732. * Return: true if frame is dropped, false otherwise
  2733. */
  2734. static inline bool dp_tx_mcast_drop(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  2735. {
  2736. /* Drop tx mcast and WDS Extended feature check */
  2737. if (qdf_unlikely((vdev->drop_tx_mcast) && (vdev->wds_ext_enabled))) {
  2738. qdf_ether_header_t *eh = (qdf_ether_header_t *)
  2739. qdf_nbuf_data(nbuf);
  2740. if (DP_FRAME_IS_MULTICAST((eh)->ether_dhost)) {
  2741. DP_STATS_INC(vdev, tx_i.dropped.tx_mcast_drop, 1);
  2742. return true;
  2743. }
  2744. }
  2745. return false;
  2746. }
  2747. #else
  2748. static inline bool dp_tx_mcast_drop(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  2749. {
  2750. return false;
  2751. }
  2752. #endif
  2753. /**
  2754. * dp_tx_per_pkt_vdev_id_check() - vdev id check for frame
  2755. * @nbuf: qdf_nbuf_t
  2756. * @vdev: struct dp_vdev *
  2757. *
  2758. * Allow packet for processing only if it is for peer client which is
  2759. * connected with same vap. Drop packet if client is connected to
  2760. * different vap.
  2761. *
  2762. * Return: QDF_STATUS
  2763. */
  2764. static inline QDF_STATUS
  2765. dp_tx_per_pkt_vdev_id_check(qdf_nbuf_t nbuf, struct dp_vdev *vdev)
  2766. {
  2767. struct dp_ast_entry *dst_ast_entry = NULL;
  2768. qdf_ether_header_t *eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  2769. if (DP_FRAME_IS_MULTICAST((eh)->ether_dhost) ||
  2770. DP_FRAME_IS_BROADCAST((eh)->ether_dhost))
  2771. return QDF_STATUS_SUCCESS;
  2772. qdf_spin_lock_bh(&vdev->pdev->soc->ast_lock);
  2773. dst_ast_entry = dp_peer_ast_hash_find_by_vdevid(vdev->pdev->soc,
  2774. eh->ether_dhost,
  2775. vdev->vdev_id);
  2776. /* If there is no ast entry, return failure */
  2777. if (qdf_unlikely(!dst_ast_entry)) {
  2778. qdf_spin_unlock_bh(&vdev->pdev->soc->ast_lock);
  2779. return QDF_STATUS_E_FAILURE;
  2780. }
  2781. qdf_spin_unlock_bh(&vdev->pdev->soc->ast_lock);
  2782. return QDF_STATUS_SUCCESS;
  2783. }
  2784. /**
  2785. * dp_tx_nawds_handler() - NAWDS handler
  2786. *
  2787. * @soc: DP soc handle
  2788. * @vdev: DP vdev handle
  2789. * @msdu_info: msdu_info required to create HTT metadata
  2790. * @nbuf: skb
  2791. * @sa_peer_id:
  2792. *
  2793. * This API transfers the multicast frames with the peer id
  2794. * on NAWDS enabled peer.
  2795. *
  2796. * Return: none
  2797. */
  2798. void dp_tx_nawds_handler(struct dp_soc *soc, struct dp_vdev *vdev,
  2799. struct dp_tx_msdu_info_s *msdu_info,
  2800. qdf_nbuf_t nbuf, uint16_t sa_peer_id)
  2801. {
  2802. struct dp_peer *peer = NULL;
  2803. qdf_nbuf_t nbuf_clone = NULL;
  2804. uint16_t peer_id = DP_INVALID_PEER;
  2805. struct dp_txrx_peer *txrx_peer;
  2806. uint8_t link_id = 0;
  2807. /* This check avoids pkt forwarding which is entered
  2808. * in the ast table but still doesn't have valid peerid.
  2809. */
  2810. if (sa_peer_id == HTT_INVALID_PEER)
  2811. return;
  2812. qdf_spin_lock_bh(&vdev->peer_list_lock);
  2813. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2814. txrx_peer = dp_get_txrx_peer(peer);
  2815. if (!txrx_peer)
  2816. continue;
  2817. if (!txrx_peer->bss_peer && txrx_peer->nawds_enabled) {
  2818. peer_id = peer->peer_id;
  2819. if (!dp_peer_is_primary_link_peer(peer))
  2820. continue;
  2821. /* In the case of wds ext peer mcast traffic will be
  2822. * sent as part of VLAN interface
  2823. */
  2824. if (dp_peer_is_wds_ext_peer(txrx_peer))
  2825. continue;
  2826. /* Multicast packets needs to be
  2827. * dropped in case of intra bss forwarding
  2828. */
  2829. if (sa_peer_id == txrx_peer->peer_id) {
  2830. dp_tx_debug("multicast packet");
  2831. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  2832. tx.nawds_mcast_drop,
  2833. 1, link_id);
  2834. continue;
  2835. }
  2836. nbuf_clone = qdf_nbuf_clone(nbuf);
  2837. if (!nbuf_clone) {
  2838. QDF_TRACE(QDF_MODULE_ID_DP,
  2839. QDF_TRACE_LEVEL_ERROR,
  2840. FL("nbuf clone failed"));
  2841. break;
  2842. }
  2843. nbuf_clone = dp_tx_send_msdu_single(vdev, nbuf_clone,
  2844. msdu_info, peer_id,
  2845. NULL);
  2846. if (nbuf_clone) {
  2847. dp_tx_debug("pkt send failed");
  2848. qdf_nbuf_free(nbuf_clone);
  2849. } else {
  2850. if (peer_id != DP_INVALID_PEER)
  2851. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  2852. tx.nawds_mcast,
  2853. 1, qdf_nbuf_len(nbuf), link_id);
  2854. }
  2855. }
  2856. }
  2857. qdf_spin_unlock_bh(&vdev->peer_list_lock);
  2858. }
  2859. #ifdef WLAN_MCAST_MLO
  2860. static inline bool
  2861. dp_tx_check_mesh_vdev(struct dp_vdev *vdev,
  2862. struct cdp_tx_exception_metadata *tx_exc_metadata)
  2863. {
  2864. if (!tx_exc_metadata->is_mlo_mcast && qdf_unlikely(vdev->mesh_vdev))
  2865. return true;
  2866. return false;
  2867. }
  2868. #else
  2869. static inline bool
  2870. dp_tx_check_mesh_vdev(struct dp_vdev *vdev,
  2871. struct cdp_tx_exception_metadata *tx_exc_metadata)
  2872. {
  2873. if (qdf_unlikely(vdev->mesh_vdev))
  2874. return true;
  2875. return false;
  2876. }
  2877. #endif
  2878. qdf_nbuf_t
  2879. dp_tx_send_exception(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  2880. qdf_nbuf_t nbuf,
  2881. struct cdp_tx_exception_metadata *tx_exc_metadata)
  2882. {
  2883. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  2884. struct dp_tx_msdu_info_s msdu_info;
  2885. struct dp_vdev *vdev = dp_vdev_get_ref_by_id(soc, vdev_id,
  2886. DP_MOD_ID_TX_EXCEPTION);
  2887. if (qdf_unlikely(!vdev))
  2888. goto fail;
  2889. qdf_mem_zero(&msdu_info, sizeof(msdu_info));
  2890. if (!tx_exc_metadata)
  2891. goto fail;
  2892. msdu_info.tid = tx_exc_metadata->tid;
  2893. dp_verbose_debug("skb "QDF_MAC_ADDR_FMT,
  2894. QDF_MAC_ADDR_REF(nbuf->data));
  2895. DP_STATS_INC_PKT(vdev, tx_i.rcvd, 1, qdf_nbuf_len(nbuf));
  2896. if (qdf_unlikely(!dp_check_exc_metadata(tx_exc_metadata))) {
  2897. dp_tx_err("Invalid parameters in exception path");
  2898. goto fail;
  2899. }
  2900. /* for peer based metadata check if peer is valid */
  2901. if (tx_exc_metadata->peer_id != CDP_INVALID_PEER) {
  2902. struct dp_peer *peer = NULL;
  2903. peer = dp_peer_get_ref_by_id(vdev->pdev->soc,
  2904. tx_exc_metadata->peer_id,
  2905. DP_MOD_ID_TX_EXCEPTION);
  2906. if (qdf_unlikely(!peer)) {
  2907. DP_STATS_INC(vdev,
  2908. tx_i.dropped.invalid_peer_id_in_exc_path,
  2909. 1);
  2910. goto fail;
  2911. }
  2912. dp_peer_unref_delete(peer, DP_MOD_ID_TX_EXCEPTION);
  2913. }
  2914. /* Basic sanity checks for unsupported packets */
  2915. /* MESH mode */
  2916. if (dp_tx_check_mesh_vdev(vdev, tx_exc_metadata)) {
  2917. dp_tx_err("Mesh mode is not supported in exception path");
  2918. goto fail;
  2919. }
  2920. /*
  2921. * Classify the frame and call corresponding
  2922. * "prepare" function which extracts the segment (TSO)
  2923. * and fragmentation information (for TSO , SG, ME, or Raw)
  2924. * into MSDU_INFO structure which is later used to fill
  2925. * SW and HW descriptors.
  2926. */
  2927. if (qdf_nbuf_is_tso(nbuf)) {
  2928. dp_verbose_debug("TSO frame %pK", vdev);
  2929. DP_STATS_INC_PKT(vdev->pdev, tso_stats.num_tso_pkts, 1,
  2930. qdf_nbuf_len(nbuf));
  2931. if (dp_tx_prepare_tso(vdev, nbuf, &msdu_info)) {
  2932. DP_STATS_INC_PKT(vdev->pdev, tso_stats.dropped_host, 1,
  2933. qdf_nbuf_len(nbuf));
  2934. goto fail;
  2935. }
  2936. DP_STATS_INC(vdev, tx_i.rcvd.num, msdu_info.num_seg - 1);
  2937. goto send_multiple;
  2938. }
  2939. /* SG */
  2940. if (qdf_unlikely(qdf_nbuf_is_nonlinear(nbuf))) {
  2941. struct dp_tx_seg_info_s seg_info = {0};
  2942. nbuf = dp_tx_prepare_sg(vdev, nbuf, &seg_info, &msdu_info);
  2943. if (!nbuf)
  2944. goto fail;
  2945. dp_verbose_debug("non-TSO SG frame %pK", vdev);
  2946. DP_STATS_INC_PKT(vdev, tx_i.sg.sg_pkt, 1,
  2947. qdf_nbuf_len(nbuf));
  2948. goto send_multiple;
  2949. }
  2950. if (qdf_likely(tx_exc_metadata->is_tx_sniffer)) {
  2951. DP_STATS_INC_PKT(vdev, tx_i.sniffer_rcvd, 1,
  2952. qdf_nbuf_len(nbuf));
  2953. dp_tx_add_tx_sniffer_meta_data(vdev, &msdu_info,
  2954. tx_exc_metadata->ppdu_cookie);
  2955. }
  2956. /*
  2957. * Get HW Queue to use for this frame.
  2958. * TCL supports upto 4 DMA rings, out of which 3 rings are
  2959. * dedicated for data and 1 for command.
  2960. * "queue_id" maps to one hardware ring.
  2961. * With each ring, we also associate a unique Tx descriptor pool
  2962. * to minimize lock contention for these resources.
  2963. */
  2964. dp_tx_get_queue(vdev, nbuf, &msdu_info.tx_queue);
  2965. /*
  2966. * if the packet is mcast packet send through mlo_macst handler
  2967. * for all prnt_vdevs
  2968. */
  2969. if (soc->arch_ops.dp_tx_mlo_mcast_send) {
  2970. nbuf = soc->arch_ops.dp_tx_mlo_mcast_send(soc, vdev,
  2971. nbuf,
  2972. tx_exc_metadata);
  2973. if (!nbuf)
  2974. goto fail;
  2975. }
  2976. if (qdf_likely(tx_exc_metadata->is_intrabss_fwd)) {
  2977. if (qdf_unlikely(vdev->nawds_enabled)) {
  2978. /*
  2979. * This is a multicast packet
  2980. */
  2981. dp_tx_nawds_handler(soc, vdev, &msdu_info, nbuf,
  2982. tx_exc_metadata->peer_id);
  2983. DP_STATS_INC_PKT(vdev, tx_i.nawds_mcast,
  2984. 1, qdf_nbuf_len(nbuf));
  2985. }
  2986. nbuf = dp_tx_send_msdu_single(vdev, nbuf, &msdu_info,
  2987. DP_INVALID_PEER, NULL);
  2988. } else {
  2989. /*
  2990. * Check exception descriptors
  2991. */
  2992. if (dp_tx_exception_limit_check(vdev))
  2993. goto fail;
  2994. /* Single linear frame */
  2995. /*
  2996. * If nbuf is a simple linear frame, use send_single function to
  2997. * prepare direct-buffer type TCL descriptor and enqueue to TCL
  2998. * SRNG. There is no need to setup a MSDU extension descriptor.
  2999. */
  3000. nbuf = dp_tx_send_msdu_single(vdev, nbuf, &msdu_info,
  3001. tx_exc_metadata->peer_id,
  3002. tx_exc_metadata);
  3003. }
  3004. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_TX_EXCEPTION);
  3005. return nbuf;
  3006. send_multiple:
  3007. nbuf = dp_tx_send_msdu_multiple(vdev, nbuf, &msdu_info);
  3008. fail:
  3009. if (vdev)
  3010. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_TX_EXCEPTION);
  3011. dp_verbose_debug("pkt send failed");
  3012. return nbuf;
  3013. }
  3014. qdf_nbuf_t
  3015. dp_tx_send_exception_vdev_id_check(struct cdp_soc_t *soc_hdl,
  3016. uint8_t vdev_id, qdf_nbuf_t nbuf,
  3017. struct cdp_tx_exception_metadata *tx_exc_metadata)
  3018. {
  3019. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  3020. struct dp_vdev *vdev = dp_vdev_get_ref_by_id(soc, vdev_id,
  3021. DP_MOD_ID_TX_EXCEPTION);
  3022. if (qdf_unlikely(!vdev))
  3023. goto fail;
  3024. if (qdf_unlikely(dp_tx_per_pkt_vdev_id_check(nbuf, vdev)
  3025. == QDF_STATUS_E_FAILURE)) {
  3026. DP_STATS_INC(vdev, tx_i.dropped.fail_per_pkt_vdev_id_check, 1);
  3027. goto fail;
  3028. }
  3029. /* Unref count as it will again be taken inside dp_tx_exception */
  3030. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_TX_EXCEPTION);
  3031. return dp_tx_send_exception(soc_hdl, vdev_id, nbuf, tx_exc_metadata);
  3032. fail:
  3033. if (vdev)
  3034. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_TX_EXCEPTION);
  3035. dp_verbose_debug("pkt send failed");
  3036. return nbuf;
  3037. }
  3038. #ifdef MESH_MODE_SUPPORT
  3039. qdf_nbuf_t dp_tx_send_mesh(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  3040. qdf_nbuf_t nbuf)
  3041. {
  3042. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  3043. struct meta_hdr_s *mhdr;
  3044. qdf_nbuf_t nbuf_mesh = NULL;
  3045. qdf_nbuf_t nbuf_clone = NULL;
  3046. struct dp_vdev *vdev;
  3047. uint8_t no_enc_frame = 0;
  3048. nbuf_mesh = qdf_nbuf_unshare(nbuf);
  3049. if (!nbuf_mesh) {
  3050. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3051. "qdf_nbuf_unshare failed");
  3052. return nbuf;
  3053. }
  3054. vdev = dp_vdev_get_ref_by_id(soc, vdev_id, DP_MOD_ID_MESH);
  3055. if (!vdev) {
  3056. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3057. "vdev is NULL for vdev_id %d", vdev_id);
  3058. return nbuf;
  3059. }
  3060. nbuf = nbuf_mesh;
  3061. mhdr = (struct meta_hdr_s *)qdf_nbuf_data(nbuf);
  3062. if ((vdev->sec_type != cdp_sec_type_none) &&
  3063. (mhdr->flags & METAHDR_FLAG_NOENCRYPT))
  3064. no_enc_frame = 1;
  3065. if (mhdr->flags & METAHDR_FLAG_NOQOS)
  3066. qdf_nbuf_set_priority(nbuf, HTT_TX_EXT_TID_NON_QOS_MCAST_BCAST);
  3067. if ((mhdr->flags & METAHDR_FLAG_INFO_UPDATED) &&
  3068. !no_enc_frame) {
  3069. nbuf_clone = qdf_nbuf_clone(nbuf);
  3070. if (!nbuf_clone) {
  3071. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3072. "qdf_nbuf_clone failed");
  3073. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_MESH);
  3074. return nbuf;
  3075. }
  3076. qdf_nbuf_set_tx_ftype(nbuf_clone, CB_FTYPE_MESH_TX_INFO);
  3077. }
  3078. if (nbuf_clone) {
  3079. if (!dp_tx_send(soc_hdl, vdev_id, nbuf_clone)) {
  3080. DP_STATS_INC(vdev, tx_i.mesh.exception_fw, 1);
  3081. } else {
  3082. qdf_nbuf_free(nbuf_clone);
  3083. }
  3084. }
  3085. if (no_enc_frame)
  3086. qdf_nbuf_set_tx_ftype(nbuf, CB_FTYPE_MESH_TX_INFO);
  3087. else
  3088. qdf_nbuf_set_tx_ftype(nbuf, CB_FTYPE_INVALID);
  3089. nbuf = dp_tx_send(soc_hdl, vdev_id, nbuf);
  3090. if ((!nbuf) && no_enc_frame) {
  3091. DP_STATS_INC(vdev, tx_i.mesh.exception_fw, 1);
  3092. }
  3093. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_MESH);
  3094. return nbuf;
  3095. }
  3096. #else
  3097. qdf_nbuf_t dp_tx_send_mesh(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  3098. qdf_nbuf_t nbuf)
  3099. {
  3100. return dp_tx_send(soc_hdl, vdev_id, nbuf);
  3101. }
  3102. #endif
  3103. #ifdef QCA_DP_TX_NBUF_AND_NBUF_DATA_PREFETCH
  3104. static inline
  3105. void dp_tx_prefetch_nbuf_data(qdf_nbuf_t nbuf)
  3106. {
  3107. if (nbuf) {
  3108. qdf_prefetch(&nbuf->len);
  3109. qdf_prefetch(&nbuf->data);
  3110. }
  3111. }
  3112. #else
  3113. static inline
  3114. void dp_tx_prefetch_nbuf_data(qdf_nbuf_t nbuf)
  3115. {
  3116. }
  3117. #endif
  3118. #ifdef DP_UMAC_HW_RESET_SUPPORT
  3119. qdf_nbuf_t dp_tx_drop(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  3120. qdf_nbuf_t nbuf)
  3121. {
  3122. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  3123. struct dp_vdev *vdev = NULL;
  3124. vdev = soc->vdev_id_map[vdev_id];
  3125. if (qdf_unlikely(!vdev))
  3126. return nbuf;
  3127. DP_STATS_INC(vdev, tx_i.dropped.drop_ingress, 1);
  3128. return nbuf;
  3129. }
  3130. qdf_nbuf_t dp_tx_exc_drop(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  3131. qdf_nbuf_t nbuf,
  3132. struct cdp_tx_exception_metadata *tx_exc_metadata)
  3133. {
  3134. return dp_tx_drop(soc_hdl, vdev_id, nbuf);
  3135. }
  3136. #endif
  3137. #ifdef FEATURE_DIRECT_LINK
  3138. /**
  3139. * dp_vdev_tx_mark_to_fw() - Mark to_fw bit for the tx packet
  3140. * @nbuf: skb
  3141. * @vdev: DP vdev handle
  3142. *
  3143. * Return: None
  3144. */
  3145. static inline void dp_vdev_tx_mark_to_fw(qdf_nbuf_t nbuf, struct dp_vdev *vdev)
  3146. {
  3147. if (qdf_unlikely(vdev->to_fw))
  3148. QDF_NBUF_CB_TX_PACKET_TO_FW(nbuf) = 1;
  3149. }
  3150. #else
  3151. static inline void dp_vdev_tx_mark_to_fw(qdf_nbuf_t nbuf, struct dp_vdev *vdev)
  3152. {
  3153. }
  3154. #endif
  3155. qdf_nbuf_t dp_tx_send(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  3156. qdf_nbuf_t nbuf)
  3157. {
  3158. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  3159. uint16_t peer_id = HTT_INVALID_PEER;
  3160. /*
  3161. * doing a memzero is causing additional function call overhead
  3162. * so doing static stack clearing
  3163. */
  3164. struct dp_tx_msdu_info_s msdu_info = {0};
  3165. struct dp_vdev *vdev = NULL;
  3166. qdf_nbuf_t end_nbuf = NULL;
  3167. if (qdf_unlikely(vdev_id >= MAX_VDEV_CNT))
  3168. return nbuf;
  3169. /*
  3170. * dp_vdev_get_ref_by_id does does a atomic operation avoid using
  3171. * this in per packet path.
  3172. *
  3173. * As in this path vdev memory is already protected with netdev
  3174. * tx lock
  3175. */
  3176. vdev = soc->vdev_id_map[vdev_id];
  3177. if (qdf_unlikely(!vdev))
  3178. return nbuf;
  3179. dp_vdev_tx_mark_to_fw(nbuf, vdev);
  3180. /*
  3181. * Set Default Host TID value to invalid TID
  3182. * (TID override disabled)
  3183. */
  3184. msdu_info.tid = HTT_TX_EXT_TID_INVALID;
  3185. DP_STATS_INC_PKT(vdev, tx_i.rcvd, 1, qdf_nbuf_len(nbuf));
  3186. if (qdf_unlikely(vdev->mesh_vdev)) {
  3187. qdf_nbuf_t nbuf_mesh = dp_tx_extract_mesh_meta_data(vdev, nbuf,
  3188. &msdu_info);
  3189. if (!nbuf_mesh) {
  3190. dp_verbose_debug("Extracting mesh metadata failed");
  3191. return nbuf;
  3192. }
  3193. nbuf = nbuf_mesh;
  3194. }
  3195. /*
  3196. * Get HW Queue to use for this frame.
  3197. * TCL supports upto 4 DMA rings, out of which 3 rings are
  3198. * dedicated for data and 1 for command.
  3199. * "queue_id" maps to one hardware ring.
  3200. * With each ring, we also associate a unique Tx descriptor pool
  3201. * to minimize lock contention for these resources.
  3202. */
  3203. dp_tx_get_queue(vdev, nbuf, &msdu_info.tx_queue);
  3204. DP_STATS_INC(vdev, tx_i.rcvd_per_core[msdu_info.tx_queue.desc_pool_id],
  3205. 1);
  3206. /*
  3207. * TCL H/W supports 2 DSCP-TID mapping tables.
  3208. * Table 1 - Default DSCP-TID mapping table
  3209. * Table 2 - 1 DSCP-TID override table
  3210. *
  3211. * If we need a different DSCP-TID mapping for this vap,
  3212. * call tid_classify to extract DSCP/ToS from frame and
  3213. * map to a TID and store in msdu_info. This is later used
  3214. * to fill in TCL Input descriptor (per-packet TID override).
  3215. */
  3216. dp_tx_classify_tid(vdev, nbuf, &msdu_info);
  3217. /*
  3218. * Classify the frame and call corresponding
  3219. * "prepare" function which extracts the segment (TSO)
  3220. * and fragmentation information (for TSO , SG, ME, or Raw)
  3221. * into MSDU_INFO structure which is later used to fill
  3222. * SW and HW descriptors.
  3223. */
  3224. if (qdf_nbuf_is_tso(nbuf)) {
  3225. dp_verbose_debug("TSO frame %pK", vdev);
  3226. DP_STATS_INC_PKT(vdev->pdev, tso_stats.num_tso_pkts, 1,
  3227. qdf_nbuf_len(nbuf));
  3228. if (dp_tx_prepare_tso(vdev, nbuf, &msdu_info)) {
  3229. DP_STATS_INC_PKT(vdev->pdev, tso_stats.dropped_host, 1,
  3230. qdf_nbuf_len(nbuf));
  3231. return nbuf;
  3232. }
  3233. DP_STATS_INC(vdev, tx_i.rcvd.num, msdu_info.num_seg - 1);
  3234. goto send_multiple;
  3235. }
  3236. /* SG */
  3237. if (qdf_unlikely(qdf_nbuf_is_nonlinear(nbuf))) {
  3238. if (qdf_nbuf_get_nr_frags(nbuf) > DP_TX_MAX_NUM_FRAGS - 1) {
  3239. if (qdf_unlikely(qdf_nbuf_linearize(nbuf)))
  3240. return nbuf;
  3241. } else {
  3242. struct dp_tx_seg_info_s seg_info = {0};
  3243. if (qdf_unlikely(is_nbuf_frm_rmnet(nbuf, &msdu_info)))
  3244. goto send_single;
  3245. nbuf = dp_tx_prepare_sg(vdev, nbuf, &seg_info,
  3246. &msdu_info);
  3247. if (!nbuf)
  3248. return NULL;
  3249. dp_verbose_debug("non-TSO SG frame %pK", vdev);
  3250. DP_STATS_INC_PKT(vdev, tx_i.sg.sg_pkt, 1,
  3251. qdf_nbuf_len(nbuf));
  3252. goto send_multiple;
  3253. }
  3254. }
  3255. if (qdf_unlikely(!dp_tx_mcast_enhance(vdev, nbuf)))
  3256. return NULL;
  3257. if (qdf_unlikely(dp_tx_mcast_drop(vdev, nbuf)))
  3258. return nbuf;
  3259. /* RAW */
  3260. if (qdf_unlikely(vdev->tx_encap_type == htt_cmn_pkt_type_raw)) {
  3261. struct dp_tx_seg_info_s seg_info = {0};
  3262. nbuf = dp_tx_prepare_raw(vdev, nbuf, &seg_info, &msdu_info);
  3263. if (!nbuf)
  3264. return NULL;
  3265. dp_verbose_debug("Raw frame %pK", vdev);
  3266. goto send_multiple;
  3267. }
  3268. if (qdf_unlikely(vdev->nawds_enabled)) {
  3269. qdf_ether_header_t *eh = (qdf_ether_header_t *)
  3270. qdf_nbuf_data(nbuf);
  3271. if (DP_FRAME_IS_MULTICAST((eh)->ether_dhost)) {
  3272. uint16_t sa_peer_id = DP_INVALID_PEER;
  3273. if (!soc->ast_offload_support) {
  3274. struct dp_ast_entry *ast_entry = NULL;
  3275. qdf_spin_lock_bh(&soc->ast_lock);
  3276. ast_entry = dp_peer_ast_hash_find_by_pdevid
  3277. (soc,
  3278. (uint8_t *)(eh->ether_shost),
  3279. vdev->pdev->pdev_id);
  3280. if (ast_entry)
  3281. sa_peer_id = ast_entry->peer_id;
  3282. qdf_spin_unlock_bh(&soc->ast_lock);
  3283. }
  3284. dp_tx_nawds_handler(soc, vdev, &msdu_info, nbuf,
  3285. sa_peer_id);
  3286. }
  3287. peer_id = DP_INVALID_PEER;
  3288. DP_STATS_INC_PKT(vdev, tx_i.nawds_mcast,
  3289. 1, qdf_nbuf_len(nbuf));
  3290. }
  3291. send_single:
  3292. /* Single linear frame */
  3293. /*
  3294. * If nbuf is a simple linear frame, use send_single function to
  3295. * prepare direct-buffer type TCL descriptor and enqueue to TCL
  3296. * SRNG. There is no need to setup a MSDU extension descriptor.
  3297. */
  3298. dp_tx_prefetch_nbuf_data(nbuf);
  3299. nbuf = dp_tx_send_msdu_single_wrapper(vdev, nbuf, &msdu_info,
  3300. peer_id, end_nbuf);
  3301. return nbuf;
  3302. send_multiple:
  3303. nbuf = dp_tx_send_msdu_multiple(vdev, nbuf, &msdu_info);
  3304. if (qdf_unlikely(nbuf && msdu_info.frm_type == dp_tx_frm_raw))
  3305. dp_tx_raw_prepare_unset(vdev->pdev->soc, nbuf);
  3306. return nbuf;
  3307. }
  3308. qdf_nbuf_t dp_tx_send_vdev_id_check(struct cdp_soc_t *soc_hdl,
  3309. uint8_t vdev_id, qdf_nbuf_t nbuf)
  3310. {
  3311. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  3312. struct dp_vdev *vdev = NULL;
  3313. if (qdf_unlikely(vdev_id >= MAX_VDEV_CNT))
  3314. return nbuf;
  3315. /*
  3316. * dp_vdev_get_ref_by_id does does a atomic operation avoid using
  3317. * this in per packet path.
  3318. *
  3319. * As in this path vdev memory is already protected with netdev
  3320. * tx lock
  3321. */
  3322. vdev = soc->vdev_id_map[vdev_id];
  3323. if (qdf_unlikely(!vdev))
  3324. return nbuf;
  3325. if (qdf_unlikely(dp_tx_per_pkt_vdev_id_check(nbuf, vdev)
  3326. == QDF_STATUS_E_FAILURE)) {
  3327. DP_STATS_INC(vdev, tx_i.dropped.fail_per_pkt_vdev_id_check, 1);
  3328. return nbuf;
  3329. }
  3330. return dp_tx_send(soc_hdl, vdev_id, nbuf);
  3331. }
  3332. #ifdef UMAC_SUPPORT_PROXY_ARP
  3333. /**
  3334. * dp_tx_proxy_arp() - Tx proxy arp handler
  3335. * @vdev: datapath vdev handle
  3336. * @nbuf: sk buffer
  3337. *
  3338. * Return: status
  3339. */
  3340. int dp_tx_proxy_arp(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  3341. {
  3342. if (vdev->osif_proxy_arp)
  3343. return vdev->osif_proxy_arp(vdev->osif_vdev, nbuf);
  3344. /*
  3345. * when UMAC_SUPPORT_PROXY_ARP is defined, we expect
  3346. * osif_proxy_arp has a valid function pointer assigned
  3347. * to it
  3348. */
  3349. dp_tx_err("valid function pointer for osif_proxy_arp is expected!!\n");
  3350. return QDF_STATUS_NOT_INITIALIZED;
  3351. }
  3352. #else
  3353. int dp_tx_proxy_arp(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  3354. {
  3355. return QDF_STATUS_SUCCESS;
  3356. }
  3357. #endif
  3358. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP) && \
  3359. !defined(CONFIG_MLO_SINGLE_DEV)
  3360. #ifdef WLAN_MCAST_MLO
  3361. static bool
  3362. dp_tx_reinject_mlo_hdl(struct dp_soc *soc, struct dp_vdev *vdev,
  3363. struct dp_tx_desc_s *tx_desc,
  3364. qdf_nbuf_t nbuf,
  3365. uint8_t reinject_reason)
  3366. {
  3367. if (reinject_reason == HTT_TX_FW2WBM_REINJECT_REASON_MLO_MCAST) {
  3368. if (soc->arch_ops.dp_tx_mcast_handler)
  3369. soc->arch_ops.dp_tx_mcast_handler(soc, vdev, nbuf);
  3370. dp_tx_desc_release(soc, tx_desc, tx_desc->pool_id);
  3371. return true;
  3372. }
  3373. return false;
  3374. }
  3375. #else /* WLAN_MCAST_MLO */
  3376. static inline bool
  3377. dp_tx_reinject_mlo_hdl(struct dp_soc *soc, struct dp_vdev *vdev,
  3378. struct dp_tx_desc_s *tx_desc,
  3379. qdf_nbuf_t nbuf,
  3380. uint8_t reinject_reason)
  3381. {
  3382. return false;
  3383. }
  3384. #endif /* WLAN_MCAST_MLO */
  3385. #else
  3386. static inline bool
  3387. dp_tx_reinject_mlo_hdl(struct dp_soc *soc, struct dp_vdev *vdev,
  3388. struct dp_tx_desc_s *tx_desc,
  3389. qdf_nbuf_t nbuf,
  3390. uint8_t reinject_reason)
  3391. {
  3392. return false;
  3393. }
  3394. #endif
  3395. void dp_tx_reinject_handler(struct dp_soc *soc,
  3396. struct dp_vdev *vdev,
  3397. struct dp_tx_desc_s *tx_desc,
  3398. uint8_t *status,
  3399. uint8_t reinject_reason)
  3400. {
  3401. struct dp_peer *peer = NULL;
  3402. uint32_t peer_id = HTT_INVALID_PEER;
  3403. qdf_nbuf_t nbuf = tx_desc->nbuf;
  3404. qdf_nbuf_t nbuf_copy = NULL;
  3405. struct dp_tx_msdu_info_s msdu_info;
  3406. #ifdef WDS_VENDOR_EXTENSION
  3407. int is_mcast = 0, is_ucast = 0;
  3408. int num_peers_3addr = 0;
  3409. qdf_ether_header_t *eth_hdr = (qdf_ether_header_t *)(qdf_nbuf_data(nbuf));
  3410. struct ieee80211_frame_addr4 *wh = (struct ieee80211_frame_addr4 *)(qdf_nbuf_data(nbuf));
  3411. #endif
  3412. struct dp_txrx_peer *txrx_peer;
  3413. qdf_assert(vdev);
  3414. dp_tx_debug("Tx reinject path");
  3415. DP_STATS_INC_PKT(vdev, tx_i.reinject_pkts, 1,
  3416. qdf_nbuf_len(tx_desc->nbuf));
  3417. if (dp_tx_reinject_mlo_hdl(soc, vdev, tx_desc, nbuf, reinject_reason))
  3418. return;
  3419. #ifdef WDS_VENDOR_EXTENSION
  3420. if (qdf_unlikely(vdev->tx_encap_type != htt_cmn_pkt_type_raw)) {
  3421. is_mcast = (IS_MULTICAST(wh->i_addr1)) ? 1 : 0;
  3422. } else {
  3423. is_mcast = (IS_MULTICAST(eth_hdr->ether_dhost)) ? 1 : 0;
  3424. }
  3425. is_ucast = !is_mcast;
  3426. qdf_spin_lock_bh(&vdev->peer_list_lock);
  3427. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3428. txrx_peer = dp_get_txrx_peer(peer);
  3429. if (!txrx_peer || txrx_peer->bss_peer)
  3430. continue;
  3431. /* Detect wds peers that use 3-addr framing for mcast.
  3432. * if there are any, the bss_peer is used to send the
  3433. * the mcast frame using 3-addr format. all wds enabled
  3434. * peers that use 4-addr framing for mcast frames will
  3435. * be duplicated and sent as 4-addr frames below.
  3436. */
  3437. if (!txrx_peer->wds_enabled ||
  3438. !txrx_peer->wds_ecm.wds_tx_mcast_4addr) {
  3439. num_peers_3addr = 1;
  3440. break;
  3441. }
  3442. }
  3443. qdf_spin_unlock_bh(&vdev->peer_list_lock);
  3444. #endif
  3445. if (qdf_unlikely(vdev->mesh_vdev)) {
  3446. DP_TX_FREE_SINGLE_BUF(vdev->pdev->soc, tx_desc->nbuf);
  3447. } else {
  3448. qdf_spin_lock_bh(&vdev->peer_list_lock);
  3449. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3450. txrx_peer = dp_get_txrx_peer(peer);
  3451. if (!txrx_peer)
  3452. continue;
  3453. if ((txrx_peer->peer_id != HTT_INVALID_PEER) &&
  3454. #ifdef WDS_VENDOR_EXTENSION
  3455. /*
  3456. * . if 3-addr STA, then send on BSS Peer
  3457. * . if Peer WDS enabled and accept 4-addr mcast,
  3458. * send mcast on that peer only
  3459. * . if Peer WDS enabled and accept 4-addr ucast,
  3460. * send ucast on that peer only
  3461. */
  3462. ((txrx_peer->bss_peer && num_peers_3addr && is_mcast) ||
  3463. (txrx_peer->wds_enabled &&
  3464. ((is_mcast && txrx_peer->wds_ecm.wds_tx_mcast_4addr) ||
  3465. (is_ucast &&
  3466. txrx_peer->wds_ecm.wds_tx_ucast_4addr))))) {
  3467. #else
  3468. (txrx_peer->bss_peer &&
  3469. (dp_tx_proxy_arp(vdev, nbuf) == QDF_STATUS_SUCCESS))) {
  3470. #endif
  3471. peer_id = DP_INVALID_PEER;
  3472. nbuf_copy = qdf_nbuf_copy(nbuf);
  3473. if (!nbuf_copy) {
  3474. dp_tx_debug("nbuf copy failed");
  3475. break;
  3476. }
  3477. qdf_mem_zero(&msdu_info, sizeof(msdu_info));
  3478. dp_tx_get_queue(vdev, nbuf,
  3479. &msdu_info.tx_queue);
  3480. nbuf_copy = dp_tx_send_msdu_single(vdev,
  3481. nbuf_copy,
  3482. &msdu_info,
  3483. peer_id,
  3484. NULL);
  3485. if (nbuf_copy) {
  3486. dp_tx_debug("pkt send failed");
  3487. qdf_nbuf_free(nbuf_copy);
  3488. }
  3489. }
  3490. }
  3491. qdf_spin_unlock_bh(&vdev->peer_list_lock);
  3492. qdf_nbuf_unmap_nbytes_single(vdev->osdev, nbuf,
  3493. QDF_DMA_TO_DEVICE, nbuf->len);
  3494. qdf_nbuf_free(nbuf);
  3495. }
  3496. dp_tx_desc_release(soc, tx_desc, tx_desc->pool_id);
  3497. }
  3498. void dp_tx_inspect_handler(struct dp_soc *soc,
  3499. struct dp_vdev *vdev,
  3500. struct dp_tx_desc_s *tx_desc,
  3501. uint8_t *status)
  3502. {
  3503. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3504. "%s Tx inspect path",
  3505. __func__);
  3506. DP_STATS_INC_PKT(vdev, tx_i.inspect_pkts, 1,
  3507. qdf_nbuf_len(tx_desc->nbuf));
  3508. DP_TX_FREE_SINGLE_BUF(soc, tx_desc->nbuf);
  3509. dp_tx_desc_release(soc, tx_desc, tx_desc->pool_id);
  3510. }
  3511. #ifdef MESH_MODE_SUPPORT
  3512. /**
  3513. * dp_tx_comp_fill_tx_completion_stats() - Fill per packet Tx completion stats
  3514. * in mesh meta header
  3515. * @tx_desc: software descriptor head pointer
  3516. * @ts: pointer to tx completion stats
  3517. * Return: none
  3518. */
  3519. static
  3520. void dp_tx_comp_fill_tx_completion_stats(struct dp_tx_desc_s *tx_desc,
  3521. struct hal_tx_completion_status *ts)
  3522. {
  3523. qdf_nbuf_t netbuf = tx_desc->nbuf;
  3524. if (!tx_desc->msdu_ext_desc) {
  3525. if (qdf_nbuf_pull_head(netbuf, tx_desc->pkt_offset) == NULL) {
  3526. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3527. "netbuf %pK offset %d",
  3528. netbuf, tx_desc->pkt_offset);
  3529. return;
  3530. }
  3531. }
  3532. }
  3533. #else
  3534. static
  3535. void dp_tx_comp_fill_tx_completion_stats(struct dp_tx_desc_s *tx_desc,
  3536. struct hal_tx_completion_status *ts)
  3537. {
  3538. }
  3539. #endif
  3540. #ifdef CONFIG_SAWF
  3541. static void dp_tx_update_peer_sawf_stats(struct dp_soc *soc,
  3542. struct dp_vdev *vdev,
  3543. struct dp_txrx_peer *txrx_peer,
  3544. struct dp_tx_desc_s *tx_desc,
  3545. struct hal_tx_completion_status *ts,
  3546. uint8_t tid)
  3547. {
  3548. dp_sawf_tx_compl_update_peer_stats(soc, vdev, txrx_peer, tx_desc,
  3549. ts, tid);
  3550. }
  3551. static void dp_tx_compute_delay_avg(struct cdp_delay_tx_stats *tx_delay,
  3552. uint32_t nw_delay,
  3553. uint32_t sw_delay,
  3554. uint32_t hw_delay)
  3555. {
  3556. dp_peer_tid_delay_avg(tx_delay,
  3557. nw_delay,
  3558. sw_delay,
  3559. hw_delay);
  3560. }
  3561. #else
  3562. static void dp_tx_update_peer_sawf_stats(struct dp_soc *soc,
  3563. struct dp_vdev *vdev,
  3564. struct dp_txrx_peer *txrx_peer,
  3565. struct dp_tx_desc_s *tx_desc,
  3566. struct hal_tx_completion_status *ts,
  3567. uint8_t tid)
  3568. {
  3569. }
  3570. static inline void
  3571. dp_tx_compute_delay_avg(struct cdp_delay_tx_stats *tx_delay,
  3572. uint32_t nw_delay, uint32_t sw_delay,
  3573. uint32_t hw_delay)
  3574. {
  3575. }
  3576. #endif
  3577. #ifdef QCA_PEER_EXT_STATS
  3578. #ifdef WLAN_CONFIG_TX_DELAY
  3579. static void dp_tx_compute_tid_delay(struct cdp_delay_tid_stats *stats,
  3580. struct dp_tx_desc_s *tx_desc,
  3581. struct hal_tx_completion_status *ts,
  3582. struct dp_vdev *vdev)
  3583. {
  3584. struct dp_soc *soc = vdev->pdev->soc;
  3585. struct cdp_delay_tx_stats *tx_delay = &stats->tx_delay;
  3586. int64_t timestamp_ingress, timestamp_hw_enqueue;
  3587. uint32_t sw_enqueue_delay, fwhw_transmit_delay = 0;
  3588. if (!ts->valid)
  3589. return;
  3590. timestamp_ingress = qdf_nbuf_get_timestamp_us(tx_desc->nbuf);
  3591. timestamp_hw_enqueue = qdf_ktime_to_us(tx_desc->timestamp);
  3592. sw_enqueue_delay = (uint32_t)(timestamp_hw_enqueue - timestamp_ingress);
  3593. dp_hist_update_stats(&tx_delay->tx_swq_delay, sw_enqueue_delay);
  3594. if (soc->arch_ops.dp_tx_compute_hw_delay)
  3595. if (!soc->arch_ops.dp_tx_compute_hw_delay(soc, vdev, ts,
  3596. &fwhw_transmit_delay))
  3597. dp_hist_update_stats(&tx_delay->hwtx_delay,
  3598. fwhw_transmit_delay);
  3599. dp_tx_compute_delay_avg(tx_delay, 0, sw_enqueue_delay,
  3600. fwhw_transmit_delay);
  3601. }
  3602. #else
  3603. /**
  3604. * dp_tx_compute_tid_delay() - Compute per TID delay
  3605. * @stats: Per TID delay stats
  3606. * @tx_desc: Software Tx descriptor
  3607. * @ts: Tx completion status
  3608. * @vdev: vdev
  3609. *
  3610. * Compute the software enqueue and hw enqueue delays and
  3611. * update the respective histograms
  3612. *
  3613. * Return: void
  3614. */
  3615. static void dp_tx_compute_tid_delay(struct cdp_delay_tid_stats *stats,
  3616. struct dp_tx_desc_s *tx_desc,
  3617. struct hal_tx_completion_status *ts,
  3618. struct dp_vdev *vdev)
  3619. {
  3620. struct cdp_delay_tx_stats *tx_delay = &stats->tx_delay;
  3621. int64_t current_timestamp, timestamp_ingress, timestamp_hw_enqueue;
  3622. uint32_t sw_enqueue_delay, fwhw_transmit_delay;
  3623. current_timestamp = qdf_ktime_to_ms(qdf_ktime_real_get());
  3624. timestamp_ingress = qdf_nbuf_get_timestamp(tx_desc->nbuf);
  3625. timestamp_hw_enqueue = qdf_ktime_to_ms(tx_desc->timestamp);
  3626. sw_enqueue_delay = (uint32_t)(timestamp_hw_enqueue - timestamp_ingress);
  3627. fwhw_transmit_delay = (uint32_t)(current_timestamp -
  3628. timestamp_hw_enqueue);
  3629. /*
  3630. * Update the Tx software enqueue delay and HW enque-Completion delay.
  3631. */
  3632. dp_hist_update_stats(&tx_delay->tx_swq_delay, sw_enqueue_delay);
  3633. dp_hist_update_stats(&tx_delay->hwtx_delay, fwhw_transmit_delay);
  3634. }
  3635. #endif
  3636. /**
  3637. * dp_tx_update_peer_delay_stats() - Update the peer delay stats
  3638. * @txrx_peer: DP peer context
  3639. * @tx_desc: Tx software descriptor
  3640. * @ts: Tx completion status
  3641. * @ring_id: Rx CPU context ID/CPU_ID
  3642. *
  3643. * Update the peer extended stats. These are enhanced other
  3644. * delay stats per msdu level.
  3645. *
  3646. * Return: void
  3647. */
  3648. static void dp_tx_update_peer_delay_stats(struct dp_txrx_peer *txrx_peer,
  3649. struct dp_tx_desc_s *tx_desc,
  3650. struct hal_tx_completion_status *ts,
  3651. uint8_t ring_id)
  3652. {
  3653. struct dp_pdev *pdev = txrx_peer->vdev->pdev;
  3654. struct dp_soc *soc = NULL;
  3655. struct dp_peer_delay_stats *delay_stats = NULL;
  3656. uint8_t tid;
  3657. soc = pdev->soc;
  3658. if (qdf_likely(!wlan_cfg_is_peer_ext_stats_enabled(soc->wlan_cfg_ctx)))
  3659. return;
  3660. if (!txrx_peer->delay_stats)
  3661. return;
  3662. tid = ts->tid;
  3663. delay_stats = txrx_peer->delay_stats;
  3664. qdf_assert(ring < CDP_MAX_TXRX_CTX);
  3665. /*
  3666. * For non-TID packets use the TID 9
  3667. */
  3668. if (qdf_unlikely(tid >= CDP_MAX_DATA_TIDS))
  3669. tid = CDP_MAX_DATA_TIDS - 1;
  3670. dp_tx_compute_tid_delay(&delay_stats->delay_tid_stats[tid][ring_id],
  3671. tx_desc, ts, txrx_peer->vdev);
  3672. }
  3673. #else
  3674. static inline
  3675. void dp_tx_update_peer_delay_stats(struct dp_txrx_peer *txrx_peer,
  3676. struct dp_tx_desc_s *tx_desc,
  3677. struct hal_tx_completion_status *ts,
  3678. uint8_t ring_id)
  3679. {
  3680. }
  3681. #endif
  3682. #ifdef WLAN_PEER_JITTER
  3683. /**
  3684. * dp_tx_jitter_get_avg_jitter() - compute the average jitter
  3685. * @curr_delay: Current delay
  3686. * @prev_delay: Previous delay
  3687. * @avg_jitter: Average Jitter
  3688. * Return: Newly Computed Average Jitter
  3689. */
  3690. static uint32_t dp_tx_jitter_get_avg_jitter(uint32_t curr_delay,
  3691. uint32_t prev_delay,
  3692. uint32_t avg_jitter)
  3693. {
  3694. uint32_t curr_jitter;
  3695. int32_t jitter_diff;
  3696. curr_jitter = qdf_abs(curr_delay - prev_delay);
  3697. if (!avg_jitter)
  3698. return curr_jitter;
  3699. jitter_diff = curr_jitter - avg_jitter;
  3700. if (jitter_diff < 0)
  3701. avg_jitter = avg_jitter -
  3702. (qdf_abs(jitter_diff) >> DP_AVG_JITTER_WEIGHT_DENOM);
  3703. else
  3704. avg_jitter = avg_jitter +
  3705. (qdf_abs(jitter_diff) >> DP_AVG_JITTER_WEIGHT_DENOM);
  3706. return avg_jitter;
  3707. }
  3708. /**
  3709. * dp_tx_jitter_get_avg_delay() - compute the average delay
  3710. * @curr_delay: Current delay
  3711. * @avg_delay: Average delay
  3712. * Return: Newly Computed Average Delay
  3713. */
  3714. static uint32_t dp_tx_jitter_get_avg_delay(uint32_t curr_delay,
  3715. uint32_t avg_delay)
  3716. {
  3717. int32_t delay_diff;
  3718. if (!avg_delay)
  3719. return curr_delay;
  3720. delay_diff = curr_delay - avg_delay;
  3721. if (delay_diff < 0)
  3722. avg_delay = avg_delay - (qdf_abs(delay_diff) >>
  3723. DP_AVG_DELAY_WEIGHT_DENOM);
  3724. else
  3725. avg_delay = avg_delay + (qdf_abs(delay_diff) >>
  3726. DP_AVG_DELAY_WEIGHT_DENOM);
  3727. return avg_delay;
  3728. }
  3729. #ifdef WLAN_CONFIG_TX_DELAY
  3730. /**
  3731. * dp_tx_compute_cur_delay() - get the current delay
  3732. * @soc: soc handle
  3733. * @vdev: vdev structure for data path state
  3734. * @ts: Tx completion status
  3735. * @curr_delay: current delay
  3736. * @tx_desc: tx descriptor
  3737. * Return: void
  3738. */
  3739. static
  3740. QDF_STATUS dp_tx_compute_cur_delay(struct dp_soc *soc,
  3741. struct dp_vdev *vdev,
  3742. struct hal_tx_completion_status *ts,
  3743. uint32_t *curr_delay,
  3744. struct dp_tx_desc_s *tx_desc)
  3745. {
  3746. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  3747. if (soc->arch_ops.dp_tx_compute_hw_delay)
  3748. status = soc->arch_ops.dp_tx_compute_hw_delay(soc, vdev, ts,
  3749. curr_delay);
  3750. return status;
  3751. }
  3752. #else
  3753. static
  3754. QDF_STATUS dp_tx_compute_cur_delay(struct dp_soc *soc,
  3755. struct dp_vdev *vdev,
  3756. struct hal_tx_completion_status *ts,
  3757. uint32_t *curr_delay,
  3758. struct dp_tx_desc_s *tx_desc)
  3759. {
  3760. int64_t current_timestamp, timestamp_hw_enqueue;
  3761. current_timestamp = qdf_ktime_to_us(qdf_ktime_real_get());
  3762. timestamp_hw_enqueue = qdf_ktime_to_us(tx_desc->timestamp);
  3763. *curr_delay = (uint32_t)(current_timestamp - timestamp_hw_enqueue);
  3764. return QDF_STATUS_SUCCESS;
  3765. }
  3766. #endif
  3767. /**
  3768. * dp_tx_compute_tid_jitter() - compute per tid per ring jitter
  3769. * @jitter: per tid per ring jitter stats
  3770. * @ts: Tx completion status
  3771. * @vdev: vdev structure for data path state
  3772. * @tx_desc: tx descriptor
  3773. * Return: void
  3774. */
  3775. static void dp_tx_compute_tid_jitter(struct cdp_peer_tid_stats *jitter,
  3776. struct hal_tx_completion_status *ts,
  3777. struct dp_vdev *vdev,
  3778. struct dp_tx_desc_s *tx_desc)
  3779. {
  3780. uint32_t curr_delay, avg_delay, avg_jitter, prev_delay;
  3781. struct dp_soc *soc = vdev->pdev->soc;
  3782. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  3783. if (ts->status != HAL_TX_TQM_RR_FRAME_ACKED) {
  3784. jitter->tx_drop += 1;
  3785. return;
  3786. }
  3787. status = dp_tx_compute_cur_delay(soc, vdev, ts, &curr_delay,
  3788. tx_desc);
  3789. if (QDF_IS_STATUS_SUCCESS(status)) {
  3790. avg_delay = jitter->tx_avg_delay;
  3791. avg_jitter = jitter->tx_avg_jitter;
  3792. prev_delay = jitter->tx_prev_delay;
  3793. avg_jitter = dp_tx_jitter_get_avg_jitter(curr_delay,
  3794. prev_delay,
  3795. avg_jitter);
  3796. avg_delay = dp_tx_jitter_get_avg_delay(curr_delay, avg_delay);
  3797. jitter->tx_avg_delay = avg_delay;
  3798. jitter->tx_avg_jitter = avg_jitter;
  3799. jitter->tx_prev_delay = curr_delay;
  3800. jitter->tx_total_success += 1;
  3801. } else if (status == QDF_STATUS_E_FAILURE) {
  3802. jitter->tx_avg_err += 1;
  3803. }
  3804. }
  3805. /* dp_tx_update_peer_jitter_stats() - Update the peer jitter stats
  3806. * @txrx_peer: DP peer context
  3807. * @tx_desc: Tx software descriptor
  3808. * @ts: Tx completion status
  3809. * @ring_id: Rx CPU context ID/CPU_ID
  3810. * Return: void
  3811. */
  3812. static void dp_tx_update_peer_jitter_stats(struct dp_txrx_peer *txrx_peer,
  3813. struct dp_tx_desc_s *tx_desc,
  3814. struct hal_tx_completion_status *ts,
  3815. uint8_t ring_id)
  3816. {
  3817. struct dp_pdev *pdev = txrx_peer->vdev->pdev;
  3818. struct dp_soc *soc = pdev->soc;
  3819. struct cdp_peer_tid_stats *jitter_stats = NULL;
  3820. uint8_t tid;
  3821. struct cdp_peer_tid_stats *rx_tid = NULL;
  3822. if (qdf_likely(!wlan_cfg_is_peer_jitter_stats_enabled(soc->wlan_cfg_ctx)))
  3823. return;
  3824. tid = ts->tid;
  3825. jitter_stats = txrx_peer->jitter_stats;
  3826. qdf_assert_always(jitter_stats);
  3827. qdf_assert(ring < CDP_MAX_TXRX_CTX);
  3828. /*
  3829. * For non-TID packets use the TID 9
  3830. */
  3831. if (qdf_unlikely(tid >= CDP_MAX_DATA_TIDS))
  3832. tid = CDP_MAX_DATA_TIDS - 1;
  3833. rx_tid = &jitter_stats[tid * CDP_MAX_TXRX_CTX + ring_id];
  3834. dp_tx_compute_tid_jitter(rx_tid,
  3835. ts, txrx_peer->vdev, tx_desc);
  3836. }
  3837. #else
  3838. static void dp_tx_update_peer_jitter_stats(struct dp_txrx_peer *txrx_peer,
  3839. struct dp_tx_desc_s *tx_desc,
  3840. struct hal_tx_completion_status *ts,
  3841. uint8_t ring_id)
  3842. {
  3843. }
  3844. #endif
  3845. #ifdef HW_TX_DELAY_STATS_ENABLE
  3846. /**
  3847. * dp_update_tx_delay_stats() - update the delay stats
  3848. * @vdev: vdev handle
  3849. * @delay: delay in ms or us based on the flag delay_in_us
  3850. * @tid: tid value
  3851. * @mode: type of tx delay mode
  3852. * @ring_id: ring number
  3853. * @delay_in_us: flag to indicate whether the delay is in ms or us
  3854. *
  3855. * Return: none
  3856. */
  3857. static inline
  3858. void dp_update_tx_delay_stats(struct dp_vdev *vdev, uint32_t delay, uint8_t tid,
  3859. uint8_t mode, uint8_t ring_id, bool delay_in_us)
  3860. {
  3861. struct cdp_tid_tx_stats *tstats =
  3862. &vdev->stats.tid_tx_stats[ring_id][tid];
  3863. dp_update_delay_stats(tstats, NULL, delay, tid, mode, ring_id,
  3864. delay_in_us);
  3865. }
  3866. #else
  3867. static inline
  3868. void dp_update_tx_delay_stats(struct dp_vdev *vdev, uint32_t delay, uint8_t tid,
  3869. uint8_t mode, uint8_t ring_id, bool delay_in_us)
  3870. {
  3871. struct cdp_tid_tx_stats *tstats =
  3872. &vdev->pdev->stats.tid_stats.tid_tx_stats[ring_id][tid];
  3873. dp_update_delay_stats(tstats, NULL, delay, tid, mode, ring_id,
  3874. delay_in_us);
  3875. }
  3876. #endif
  3877. void dp_tx_compute_delay(struct dp_vdev *vdev, struct dp_tx_desc_s *tx_desc,
  3878. uint8_t tid, uint8_t ring_id)
  3879. {
  3880. int64_t current_timestamp, timestamp_ingress, timestamp_hw_enqueue;
  3881. uint32_t sw_enqueue_delay, fwhw_transmit_delay, interframe_delay;
  3882. uint32_t fwhw_transmit_delay_us;
  3883. if (qdf_likely(!vdev->pdev->delay_stats_flag) &&
  3884. qdf_likely(!dp_is_vdev_tx_delay_stats_enabled(vdev)))
  3885. return;
  3886. if (dp_is_vdev_tx_delay_stats_enabled(vdev)) {
  3887. fwhw_transmit_delay_us =
  3888. qdf_ktime_to_us(qdf_ktime_real_get()) -
  3889. qdf_ktime_to_us(tx_desc->timestamp);
  3890. /*
  3891. * Delay between packet enqueued to HW and Tx completion in us
  3892. */
  3893. dp_update_tx_delay_stats(vdev, fwhw_transmit_delay_us, tid,
  3894. CDP_DELAY_STATS_FW_HW_TRANSMIT,
  3895. ring_id, true);
  3896. /*
  3897. * For MCL, only enqueue to completion delay is required
  3898. * so return if the vdev flag is enabled.
  3899. */
  3900. return;
  3901. }
  3902. current_timestamp = qdf_ktime_to_ms(qdf_ktime_real_get());
  3903. timestamp_hw_enqueue = qdf_ktime_to_ms(tx_desc->timestamp);
  3904. fwhw_transmit_delay = (uint32_t)(current_timestamp -
  3905. timestamp_hw_enqueue);
  3906. if (!timestamp_hw_enqueue)
  3907. return;
  3908. /*
  3909. * Delay between packet enqueued to HW and Tx completion in ms
  3910. */
  3911. dp_update_tx_delay_stats(vdev, fwhw_transmit_delay, tid,
  3912. CDP_DELAY_STATS_FW_HW_TRANSMIT, ring_id,
  3913. false);
  3914. timestamp_ingress = qdf_nbuf_get_timestamp(tx_desc->nbuf);
  3915. sw_enqueue_delay = (uint32_t)(timestamp_hw_enqueue - timestamp_ingress);
  3916. interframe_delay = (uint32_t)(timestamp_ingress -
  3917. vdev->prev_tx_enq_tstamp);
  3918. /*
  3919. * Delay in software enqueue
  3920. */
  3921. dp_update_tx_delay_stats(vdev, sw_enqueue_delay, tid,
  3922. CDP_DELAY_STATS_SW_ENQ, ring_id,
  3923. false);
  3924. /*
  3925. * Update interframe delay stats calculated at hardstart receive point.
  3926. * Value of vdev->prev_tx_enq_tstamp will be 0 for 1st frame, so
  3927. * interframe delay will not be calculate correctly for 1st frame.
  3928. * On the other side, this will help in avoiding extra per packet check
  3929. * of !vdev->prev_tx_enq_tstamp.
  3930. */
  3931. dp_update_tx_delay_stats(vdev, interframe_delay, tid,
  3932. CDP_DELAY_STATS_TX_INTERFRAME, ring_id,
  3933. false);
  3934. vdev->prev_tx_enq_tstamp = timestamp_ingress;
  3935. }
  3936. #ifdef DISABLE_DP_STATS
  3937. static
  3938. inline void dp_update_no_ack_stats(qdf_nbuf_t nbuf,
  3939. struct dp_txrx_peer *txrx_peer,
  3940. uint8_t link_id)
  3941. {
  3942. }
  3943. #else
  3944. static inline void
  3945. dp_update_no_ack_stats(qdf_nbuf_t nbuf, struct dp_txrx_peer *txrx_peer,
  3946. uint8_t link_id)
  3947. {
  3948. enum qdf_proto_subtype subtype = QDF_PROTO_INVALID;
  3949. DPTRACE(qdf_dp_track_noack_check(nbuf, &subtype));
  3950. if (subtype != QDF_PROTO_INVALID)
  3951. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.no_ack_count[subtype],
  3952. 1, link_id);
  3953. }
  3954. #endif
  3955. #ifndef QCA_ENHANCED_STATS_SUPPORT
  3956. #ifdef DP_PEER_EXTENDED_API
  3957. static inline uint8_t
  3958. dp_tx_get_mpdu_retry_threshold(struct dp_txrx_peer *txrx_peer)
  3959. {
  3960. return txrx_peer->mpdu_retry_threshold;
  3961. }
  3962. #else
  3963. static inline uint8_t
  3964. dp_tx_get_mpdu_retry_threshold(struct dp_txrx_peer *txrx_peer)
  3965. {
  3966. return 0;
  3967. }
  3968. #endif
  3969. /**
  3970. * dp_tx_update_peer_extd_stats()- Update Tx extended path stats for peer
  3971. *
  3972. * @ts: Tx compltion status
  3973. * @txrx_peer: datapath txrx_peer handle
  3974. * @link_id: Link id
  3975. *
  3976. * Return: void
  3977. */
  3978. static inline void
  3979. dp_tx_update_peer_extd_stats(struct hal_tx_completion_status *ts,
  3980. struct dp_txrx_peer *txrx_peer, uint8_t link_id)
  3981. {
  3982. uint8_t mcs, pkt_type, dst_mcs_idx;
  3983. uint8_t retry_threshold = dp_tx_get_mpdu_retry_threshold(txrx_peer);
  3984. mcs = ts->mcs;
  3985. pkt_type = ts->pkt_type;
  3986. /* do HW to SW pkt type conversion */
  3987. pkt_type = (pkt_type >= HAL_DOT11_MAX ? DOT11_MAX :
  3988. hal_2_dp_pkt_type_map[pkt_type]);
  3989. dst_mcs_idx = dp_get_mcs_array_index_by_pkt_type_mcs(pkt_type, mcs);
  3990. if (MCS_INVALID_ARRAY_INDEX != dst_mcs_idx)
  3991. DP_PEER_EXTD_STATS_INC(txrx_peer,
  3992. tx.pkt_type[pkt_type].mcs_count[dst_mcs_idx],
  3993. 1, link_id);
  3994. DP_PEER_EXTD_STATS_INC(txrx_peer, tx.sgi_count[ts->sgi], 1, link_id);
  3995. DP_PEER_EXTD_STATS_INC(txrx_peer, tx.bw[ts->bw], 1, link_id);
  3996. DP_PEER_EXTD_STATS_UPD(txrx_peer, tx.last_ack_rssi, ts->ack_frame_rssi,
  3997. link_id);
  3998. DP_PEER_EXTD_STATS_INC(txrx_peer,
  3999. tx.wme_ac_type[TID_TO_WME_AC(ts->tid)], 1,
  4000. link_id);
  4001. DP_PEER_EXTD_STATS_INCC(txrx_peer, tx.stbc, 1, ts->stbc, link_id);
  4002. DP_PEER_EXTD_STATS_INCC(txrx_peer, tx.ldpc, 1, ts->ldpc, link_id);
  4003. DP_PEER_EXTD_STATS_INCC(txrx_peer, tx.retries, 1, ts->transmit_cnt > 1,
  4004. link_id);
  4005. if (ts->first_msdu) {
  4006. DP_PEER_EXTD_STATS_INCC(txrx_peer, tx.retries_mpdu, 1,
  4007. ts->transmit_cnt > 1, link_id);
  4008. if (!retry_threshold)
  4009. return;
  4010. DP_PEER_EXTD_STATS_INCC(txrx_peer, tx.mpdu_success_with_retries,
  4011. qdf_do_div(ts->transmit_cnt,
  4012. retry_threshold),
  4013. ts->transmit_cnt > retry_threshold,
  4014. link_id);
  4015. }
  4016. }
  4017. #else
  4018. static inline void
  4019. dp_tx_update_peer_extd_stats(struct hal_tx_completion_status *ts,
  4020. struct dp_txrx_peer *txrx_peer, uint8_t link_id)
  4021. {
  4022. }
  4023. #endif
  4024. #if defined(WLAN_FEATURE_11BE_MLO) && defined(QCA_ENHANCED_STATS_SUPPORT)
  4025. static inline uint8_t
  4026. dp_tx_get_link_id_from_ppdu_id(struct dp_soc *soc,
  4027. struct hal_tx_completion_status *ts,
  4028. struct dp_txrx_peer *txrx_peer,
  4029. struct dp_vdev *vdev)
  4030. {
  4031. uint8_t hw_link_id = 0;
  4032. uint32_t ppdu_id;
  4033. uint8_t link_id_offset, link_id_bits;
  4034. if (!txrx_peer->is_mld_peer || !vdev->pdev->link_peer_stats)
  4035. return 0;
  4036. link_id_offset = soc->link_id_offset;
  4037. link_id_bits = soc->link_id_bits;
  4038. ppdu_id = ts->ppdu_id;
  4039. hw_link_id = ((DP_GET_HW_LINK_ID_FRM_PPDU_ID(ppdu_id, link_id_offset,
  4040. link_id_bits)) + 1);
  4041. if (hw_link_id > DP_MAX_MLO_LINKS) {
  4042. hw_link_id = 0;
  4043. DP_PEER_PER_PKT_STATS_INC(
  4044. txrx_peer,
  4045. tx.inval_link_id_pkt_cnt, 1, hw_link_id);
  4046. }
  4047. return hw_link_id;
  4048. }
  4049. #else
  4050. static inline uint8_t
  4051. dp_tx_get_link_id_from_ppdu_id(struct dp_soc *soc,
  4052. struct hal_tx_completion_status *ts,
  4053. struct dp_txrx_peer *txrx_peer,
  4054. struct dp_vdev *vdev)
  4055. {
  4056. return 0;
  4057. }
  4058. #endif
  4059. /**
  4060. * dp_tx_update_peer_stats() - Update peer stats from Tx completion indications
  4061. * per wbm ring
  4062. *
  4063. * @tx_desc: software descriptor head pointer
  4064. * @ts: Tx completion status
  4065. * @txrx_peer: peer handle
  4066. * @ring_id: ring number
  4067. * @link_id: Link id
  4068. *
  4069. * Return: None
  4070. */
  4071. static inline void
  4072. dp_tx_update_peer_stats(struct dp_tx_desc_s *tx_desc,
  4073. struct hal_tx_completion_status *ts,
  4074. struct dp_txrx_peer *txrx_peer, uint8_t ring_id,
  4075. uint8_t link_id)
  4076. {
  4077. struct dp_pdev *pdev = txrx_peer->vdev->pdev;
  4078. uint8_t tid = ts->tid;
  4079. uint32_t length;
  4080. struct cdp_tid_tx_stats *tid_stats;
  4081. if (!pdev)
  4082. return;
  4083. if (qdf_unlikely(tid >= CDP_MAX_DATA_TIDS))
  4084. tid = CDP_MAX_DATA_TIDS - 1;
  4085. tid_stats = &pdev->stats.tid_stats.tid_tx_stats[ring_id][tid];
  4086. if (ts->release_src != HAL_TX_COMP_RELEASE_SOURCE_TQM) {
  4087. dp_err_rl("Release source:%d is not from TQM", ts->release_src);
  4088. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.release_src_not_tqm, 1,
  4089. link_id);
  4090. return;
  4091. }
  4092. length = qdf_nbuf_len(tx_desc->nbuf);
  4093. DP_PEER_STATS_FLAT_INC_PKT(txrx_peer, comp_pkt, 1, length);
  4094. if (qdf_unlikely(pdev->delay_stats_flag) ||
  4095. qdf_unlikely(dp_is_vdev_tx_delay_stats_enabled(txrx_peer->vdev)))
  4096. dp_tx_compute_delay(txrx_peer->vdev, tx_desc, tid, ring_id);
  4097. if (ts->status < CDP_MAX_TX_TQM_STATUS) {
  4098. tid_stats->tqm_status_cnt[ts->status]++;
  4099. }
  4100. if (qdf_likely(ts->status == HAL_TX_TQM_RR_FRAME_ACKED)) {
  4101. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, tx.retry_count, 1,
  4102. ts->transmit_cnt > 1, link_id);
  4103. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, tx.multiple_retry_count,
  4104. 1, ts->transmit_cnt > 2, link_id);
  4105. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, tx.ofdma, 1, ts->ofdma,
  4106. link_id);
  4107. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, tx.amsdu_cnt, 1,
  4108. ts->msdu_part_of_amsdu, link_id);
  4109. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, tx.non_amsdu_cnt, 1,
  4110. !ts->msdu_part_of_amsdu, link_id);
  4111. txrx_peer->stats[link_id].per_pkt_stats.tx.last_tx_ts =
  4112. qdf_system_ticks();
  4113. dp_tx_update_peer_extd_stats(ts, txrx_peer, link_id);
  4114. return;
  4115. }
  4116. /*
  4117. * tx_failed is ideally supposed to be updated from HTT ppdu
  4118. * completion stats. But in IPQ807X/IPQ6018 chipsets owing to
  4119. * hw limitation there are no completions for failed cases.
  4120. * Hence updating tx_failed from data path. Please note that
  4121. * if tx_failed is fixed to be from ppdu, then this has to be
  4122. * removed
  4123. */
  4124. DP_PEER_STATS_FLAT_INC(txrx_peer, tx_failed, 1);
  4125. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, tx.failed_retry_count, 1,
  4126. ts->transmit_cnt > DP_RETRY_COUNT,
  4127. link_id);
  4128. dp_update_no_ack_stats(tx_desc->nbuf, txrx_peer, link_id);
  4129. if (ts->status == HAL_TX_TQM_RR_REM_CMD_AGED) {
  4130. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.dropped.age_out, 1,
  4131. link_id);
  4132. } else if (ts->status == HAL_TX_TQM_RR_REM_CMD_REM) {
  4133. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, tx.dropped.fw_rem, 1,
  4134. length, link_id);
  4135. } else if (ts->status == HAL_TX_TQM_RR_REM_CMD_NOTX) {
  4136. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.dropped.fw_rem_notx, 1,
  4137. link_id);
  4138. } else if (ts->status == HAL_TX_TQM_RR_REM_CMD_TX) {
  4139. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.dropped.fw_rem_tx, 1,
  4140. link_id);
  4141. } else if (ts->status == HAL_TX_TQM_RR_FW_REASON1) {
  4142. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.dropped.fw_reason1, 1,
  4143. link_id);
  4144. } else if (ts->status == HAL_TX_TQM_RR_FW_REASON2) {
  4145. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.dropped.fw_reason2, 1,
  4146. link_id);
  4147. } else if (ts->status == HAL_TX_TQM_RR_FW_REASON3) {
  4148. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.dropped.fw_reason3, 1,
  4149. link_id);
  4150. } else if (ts->status == HAL_TX_TQM_RR_REM_CMD_DISABLE_QUEUE) {
  4151. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  4152. tx.dropped.fw_rem_queue_disable, 1,
  4153. link_id);
  4154. } else if (ts->status == HAL_TX_TQM_RR_REM_CMD_TILL_NONMATCHING) {
  4155. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  4156. tx.dropped.fw_rem_no_match, 1,
  4157. link_id);
  4158. } else if (ts->status == HAL_TX_TQM_RR_DROP_THRESHOLD) {
  4159. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  4160. tx.dropped.drop_threshold, 1,
  4161. link_id);
  4162. } else if (ts->status == HAL_TX_TQM_RR_LINK_DESC_UNAVAILABLE) {
  4163. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  4164. tx.dropped.drop_link_desc_na, 1,
  4165. link_id);
  4166. } else if (ts->status == HAL_TX_TQM_RR_DROP_OR_INVALID_MSDU) {
  4167. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  4168. tx.dropped.invalid_drop, 1,
  4169. link_id);
  4170. } else if (ts->status == HAL_TX_TQM_RR_MULTICAST_DROP) {
  4171. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  4172. tx.dropped.mcast_vdev_drop, 1,
  4173. link_id);
  4174. } else {
  4175. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.dropped.invalid_rr, 1,
  4176. link_id);
  4177. }
  4178. }
  4179. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  4180. /**
  4181. * dp_tx_flow_pool_lock() - take flow pool lock
  4182. * @soc: core txrx main context
  4183. * @tx_desc: tx desc
  4184. *
  4185. * Return: None
  4186. */
  4187. static inline
  4188. void dp_tx_flow_pool_lock(struct dp_soc *soc,
  4189. struct dp_tx_desc_s *tx_desc)
  4190. {
  4191. struct dp_tx_desc_pool_s *pool;
  4192. uint8_t desc_pool_id;
  4193. desc_pool_id = tx_desc->pool_id;
  4194. pool = &soc->tx_desc[desc_pool_id];
  4195. qdf_spin_lock_bh(&pool->flow_pool_lock);
  4196. }
  4197. /**
  4198. * dp_tx_flow_pool_unlock() - release flow pool lock
  4199. * @soc: core txrx main context
  4200. * @tx_desc: tx desc
  4201. *
  4202. * Return: None
  4203. */
  4204. static inline
  4205. void dp_tx_flow_pool_unlock(struct dp_soc *soc,
  4206. struct dp_tx_desc_s *tx_desc)
  4207. {
  4208. struct dp_tx_desc_pool_s *pool;
  4209. uint8_t desc_pool_id;
  4210. desc_pool_id = tx_desc->pool_id;
  4211. pool = &soc->tx_desc[desc_pool_id];
  4212. qdf_spin_unlock_bh(&pool->flow_pool_lock);
  4213. }
  4214. #else
  4215. static inline
  4216. void dp_tx_flow_pool_lock(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc)
  4217. {
  4218. }
  4219. static inline
  4220. void dp_tx_flow_pool_unlock(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc)
  4221. {
  4222. }
  4223. #endif
  4224. /**
  4225. * dp_tx_notify_completion() - Notify tx completion for this desc
  4226. * @soc: core txrx main context
  4227. * @vdev: datapath vdev handle
  4228. * @tx_desc: tx desc
  4229. * @netbuf: buffer
  4230. * @status: tx status
  4231. *
  4232. * Return: none
  4233. */
  4234. static inline void dp_tx_notify_completion(struct dp_soc *soc,
  4235. struct dp_vdev *vdev,
  4236. struct dp_tx_desc_s *tx_desc,
  4237. qdf_nbuf_t netbuf,
  4238. uint8_t status)
  4239. {
  4240. void *osif_dev;
  4241. ol_txrx_completion_fp tx_compl_cbk = NULL;
  4242. uint16_t flag = BIT(QDF_TX_RX_STATUS_DOWNLOAD_SUCC);
  4243. qdf_assert(tx_desc);
  4244. if (!vdev ||
  4245. !vdev->osif_vdev) {
  4246. return;
  4247. }
  4248. osif_dev = vdev->osif_vdev;
  4249. tx_compl_cbk = vdev->tx_comp;
  4250. if (status == HAL_TX_TQM_RR_FRAME_ACKED)
  4251. flag |= BIT(QDF_TX_RX_STATUS_OK);
  4252. if (tx_compl_cbk)
  4253. tx_compl_cbk(netbuf, osif_dev, flag);
  4254. }
  4255. /**
  4256. * dp_tx_sojourn_stats_process() - Collect sojourn stats
  4257. * @pdev: pdev handle
  4258. * @txrx_peer: DP peer context
  4259. * @tid: tid value
  4260. * @txdesc_ts: timestamp from txdesc
  4261. * @ppdu_id: ppdu id
  4262. * @link_id: link id
  4263. *
  4264. * Return: none
  4265. */
  4266. #ifdef FEATURE_PERPKT_INFO
  4267. static inline void dp_tx_sojourn_stats_process(struct dp_pdev *pdev,
  4268. struct dp_txrx_peer *txrx_peer,
  4269. uint8_t tid,
  4270. uint64_t txdesc_ts,
  4271. uint32_t ppdu_id,
  4272. uint8_t link_id)
  4273. {
  4274. uint64_t delta_ms;
  4275. struct cdp_tx_sojourn_stats *sojourn_stats;
  4276. struct dp_peer *primary_link_peer = NULL;
  4277. struct dp_soc *link_peer_soc = NULL;
  4278. if (qdf_unlikely(!pdev->enhanced_stats_en))
  4279. return;
  4280. if (qdf_unlikely(tid == HTT_INVALID_TID ||
  4281. tid >= CDP_DATA_TID_MAX))
  4282. return;
  4283. if (qdf_unlikely(!pdev->sojourn_buf))
  4284. return;
  4285. primary_link_peer = dp_get_primary_link_peer_by_id(pdev->soc,
  4286. txrx_peer->peer_id,
  4287. DP_MOD_ID_TX_COMP);
  4288. if (qdf_unlikely(!primary_link_peer))
  4289. return;
  4290. sojourn_stats = (struct cdp_tx_sojourn_stats *)
  4291. qdf_nbuf_data(pdev->sojourn_buf);
  4292. link_peer_soc = primary_link_peer->vdev->pdev->soc;
  4293. sojourn_stats->cookie = (void *)
  4294. dp_monitor_peer_get_peerstats_ctx(link_peer_soc,
  4295. primary_link_peer);
  4296. delta_ms = qdf_ktime_to_ms(qdf_ktime_real_get()) -
  4297. txdesc_ts;
  4298. qdf_ewma_tx_lag_add(&txrx_peer->stats[link_id].per_pkt_stats.tx.avg_sojourn_msdu[tid],
  4299. delta_ms);
  4300. sojourn_stats->sum_sojourn_msdu[tid] = delta_ms;
  4301. sojourn_stats->num_msdus[tid] = 1;
  4302. sojourn_stats->avg_sojourn_msdu[tid].internal =
  4303. txrx_peer->stats[link_id].
  4304. per_pkt_stats.tx.avg_sojourn_msdu[tid].internal;
  4305. dp_wdi_event_handler(WDI_EVENT_TX_SOJOURN_STAT, pdev->soc,
  4306. pdev->sojourn_buf, HTT_INVALID_PEER,
  4307. WDI_NO_VAL, pdev->pdev_id);
  4308. sojourn_stats->sum_sojourn_msdu[tid] = 0;
  4309. sojourn_stats->num_msdus[tid] = 0;
  4310. sojourn_stats->avg_sojourn_msdu[tid].internal = 0;
  4311. dp_peer_unref_delete(primary_link_peer, DP_MOD_ID_TX_COMP);
  4312. }
  4313. #else
  4314. static inline void dp_tx_sojourn_stats_process(struct dp_pdev *pdev,
  4315. struct dp_txrx_peer *txrx_peer,
  4316. uint8_t tid,
  4317. uint64_t txdesc_ts,
  4318. uint32_t ppdu_id)
  4319. {
  4320. }
  4321. #endif
  4322. #ifdef WLAN_FEATURE_PKT_CAPTURE_V2
  4323. void dp_send_completion_to_pkt_capture(struct dp_soc *soc,
  4324. struct dp_tx_desc_s *desc,
  4325. struct hal_tx_completion_status *ts)
  4326. {
  4327. dp_wdi_event_handler(WDI_EVENT_PKT_CAPTURE_TX_DATA, soc,
  4328. desc, ts->peer_id,
  4329. WDI_NO_VAL, desc->pdev->pdev_id);
  4330. }
  4331. #endif
  4332. void
  4333. dp_tx_comp_process_desc(struct dp_soc *soc,
  4334. struct dp_tx_desc_s *desc,
  4335. struct hal_tx_completion_status *ts,
  4336. struct dp_txrx_peer *txrx_peer)
  4337. {
  4338. uint64_t time_latency = 0;
  4339. uint16_t peer_id = DP_INVALID_PEER_ID;
  4340. /*
  4341. * m_copy/tx_capture modes are not supported for
  4342. * scatter gather packets
  4343. */
  4344. if (qdf_unlikely(!!desc->pdev->latency_capture_enable)) {
  4345. time_latency = (qdf_ktime_to_ms(qdf_ktime_real_get()) -
  4346. qdf_ktime_to_ms(desc->timestamp));
  4347. }
  4348. dp_send_completion_to_pkt_capture(soc, desc, ts);
  4349. if (dp_tx_pkt_tracepoints_enabled())
  4350. qdf_trace_dp_packet(desc->nbuf, QDF_TX,
  4351. desc->msdu_ext_desc ?
  4352. desc->msdu_ext_desc->tso_desc : NULL,
  4353. qdf_ktime_to_ms(desc->timestamp));
  4354. if (!(desc->msdu_ext_desc)) {
  4355. dp_tx_enh_unmap(soc, desc);
  4356. if (txrx_peer)
  4357. peer_id = txrx_peer->peer_id;
  4358. if (QDF_STATUS_SUCCESS ==
  4359. dp_monitor_tx_add_to_comp_queue(soc, desc, ts, peer_id)) {
  4360. return;
  4361. }
  4362. if (QDF_STATUS_SUCCESS ==
  4363. dp_get_completion_indication_for_stack(soc,
  4364. desc->pdev,
  4365. txrx_peer, ts,
  4366. desc->nbuf,
  4367. time_latency)) {
  4368. dp_send_completion_to_stack(soc,
  4369. desc->pdev,
  4370. ts->peer_id,
  4371. ts->ppdu_id,
  4372. desc->nbuf);
  4373. return;
  4374. }
  4375. }
  4376. desc->flags |= DP_TX_DESC_FLAG_COMPLETED_TX;
  4377. dp_tx_comp_free_buf(soc, desc, false);
  4378. }
  4379. #ifdef DISABLE_DP_STATS
  4380. /**
  4381. * dp_tx_update_connectivity_stats() - update tx connectivity stats
  4382. * @soc: core txrx main context
  4383. * @vdev: virtual device instance
  4384. * @tx_desc: tx desc
  4385. * @status: tx status
  4386. *
  4387. * Return: none
  4388. */
  4389. static inline
  4390. void dp_tx_update_connectivity_stats(struct dp_soc *soc,
  4391. struct dp_vdev *vdev,
  4392. struct dp_tx_desc_s *tx_desc,
  4393. uint8_t status)
  4394. {
  4395. }
  4396. #else
  4397. static inline
  4398. void dp_tx_update_connectivity_stats(struct dp_soc *soc,
  4399. struct dp_vdev *vdev,
  4400. struct dp_tx_desc_s *tx_desc,
  4401. uint8_t status)
  4402. {
  4403. void *osif_dev;
  4404. ol_txrx_stats_rx_fp stats_cbk;
  4405. uint8_t pkt_type;
  4406. qdf_assert(tx_desc);
  4407. if (!vdev ||
  4408. !vdev->osif_vdev ||
  4409. !vdev->stats_cb)
  4410. return;
  4411. osif_dev = vdev->osif_vdev;
  4412. stats_cbk = vdev->stats_cb;
  4413. stats_cbk(tx_desc->nbuf, osif_dev, PKT_TYPE_TX_HOST_FW_SENT, &pkt_type);
  4414. if (status == HAL_TX_TQM_RR_FRAME_ACKED)
  4415. stats_cbk(tx_desc->nbuf, osif_dev, PKT_TYPE_TX_ACK_CNT,
  4416. &pkt_type);
  4417. }
  4418. #endif
  4419. #if defined(WLAN_FEATURE_TSF_UPLINK_DELAY) || defined(WLAN_CONFIG_TX_DELAY)
  4420. /* Mask for bit29 ~ bit31 */
  4421. #define DP_TX_TS_BIT29_31_MASK 0xE0000000
  4422. /* Timestamp value (unit us) if bit29 is set */
  4423. #define DP_TX_TS_BIT29_SET_VALUE BIT(29)
  4424. /**
  4425. * dp_tx_adjust_enqueue_buffer_ts() - adjust the enqueue buffer_timestamp
  4426. * @ack_ts: OTA ack timestamp, unit us.
  4427. * @enqueue_ts: TCL enqueue TX data to TQM timestamp, unit us.
  4428. * @base_delta_ts: base timestamp delta for ack_ts and enqueue_ts
  4429. *
  4430. * this function will restore the bit29 ~ bit31 3 bits value for
  4431. * buffer_timestamp in wbm2sw ring entry, currently buffer_timestamp only
  4432. * can support 0x7FFF * 1024 us (29 bits), but if the timestamp is >
  4433. * 0x7FFF * 1024 us, bit29~ bit31 will be lost.
  4434. *
  4435. * Return: the adjusted buffer_timestamp value
  4436. */
  4437. static inline
  4438. uint32_t dp_tx_adjust_enqueue_buffer_ts(uint32_t ack_ts,
  4439. uint32_t enqueue_ts,
  4440. uint32_t base_delta_ts)
  4441. {
  4442. uint32_t ack_buffer_ts;
  4443. uint32_t ack_buffer_ts_bit29_31;
  4444. uint32_t adjusted_enqueue_ts;
  4445. /* corresponding buffer_timestamp value when receive OTA Ack */
  4446. ack_buffer_ts = ack_ts - base_delta_ts;
  4447. ack_buffer_ts_bit29_31 = ack_buffer_ts & DP_TX_TS_BIT29_31_MASK;
  4448. /* restore the bit29 ~ bit31 value */
  4449. adjusted_enqueue_ts = ack_buffer_ts_bit29_31 | enqueue_ts;
  4450. /*
  4451. * if actual enqueue_ts value occupied 29 bits only, this enqueue_ts
  4452. * value + real UL delay overflow 29 bits, then 30th bit (bit-29)
  4453. * should not be marked, otherwise extra 0x20000000 us is added to
  4454. * enqueue_ts.
  4455. */
  4456. if (qdf_unlikely(adjusted_enqueue_ts > ack_buffer_ts))
  4457. adjusted_enqueue_ts -= DP_TX_TS_BIT29_SET_VALUE;
  4458. return adjusted_enqueue_ts;
  4459. }
  4460. QDF_STATUS
  4461. dp_tx_compute_hw_delay_us(struct hal_tx_completion_status *ts,
  4462. uint32_t delta_tsf,
  4463. uint32_t *delay_us)
  4464. {
  4465. uint32_t buffer_ts;
  4466. uint32_t delay;
  4467. if (!delay_us)
  4468. return QDF_STATUS_E_INVAL;
  4469. /* Tx_rate_stats_info_valid is 0 and tsf is invalid then */
  4470. if (!ts->valid)
  4471. return QDF_STATUS_E_INVAL;
  4472. /* buffer_timestamp is in units of 1024 us and is [31:13] of
  4473. * WBM_RELEASE_RING_4. After left shift 10 bits, it's
  4474. * valid up to 29 bits.
  4475. */
  4476. buffer_ts = ts->buffer_timestamp << 10;
  4477. buffer_ts = dp_tx_adjust_enqueue_buffer_ts(ts->tsf,
  4478. buffer_ts, delta_tsf);
  4479. delay = ts->tsf - buffer_ts - delta_tsf;
  4480. if (qdf_unlikely(delay & 0x80000000)) {
  4481. dp_err_rl("delay = 0x%x (-ve)\n"
  4482. "release_src = %d\n"
  4483. "ppdu_id = 0x%x\n"
  4484. "peer_id = 0x%x\n"
  4485. "tid = 0x%x\n"
  4486. "release_reason = %d\n"
  4487. "tsf = %u (0x%x)\n"
  4488. "buffer_timestamp = %u (0x%x)\n"
  4489. "delta_tsf = %u (0x%x)\n",
  4490. delay, ts->release_src, ts->ppdu_id, ts->peer_id,
  4491. ts->tid, ts->status, ts->tsf, ts->tsf,
  4492. ts->buffer_timestamp, ts->buffer_timestamp,
  4493. delta_tsf, delta_tsf);
  4494. delay = 0;
  4495. goto end;
  4496. }
  4497. delay &= 0x1FFFFFFF; /* mask 29 BITS */
  4498. if (delay > 0x1000000) {
  4499. dp_info_rl("----------------------\n"
  4500. "Tx completion status:\n"
  4501. "----------------------\n"
  4502. "release_src = %d\n"
  4503. "ppdu_id = 0x%x\n"
  4504. "release_reason = %d\n"
  4505. "tsf = %u (0x%x)\n"
  4506. "buffer_timestamp = %u (0x%x)\n"
  4507. "delta_tsf = %u (0x%x)\n",
  4508. ts->release_src, ts->ppdu_id, ts->status,
  4509. ts->tsf, ts->tsf, ts->buffer_timestamp,
  4510. ts->buffer_timestamp, delta_tsf, delta_tsf);
  4511. return QDF_STATUS_E_FAILURE;
  4512. }
  4513. end:
  4514. *delay_us = delay;
  4515. return QDF_STATUS_SUCCESS;
  4516. }
  4517. void dp_set_delta_tsf(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  4518. uint32_t delta_tsf)
  4519. {
  4520. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  4521. struct dp_vdev *vdev = dp_vdev_get_ref_by_id(soc, vdev_id,
  4522. DP_MOD_ID_CDP);
  4523. if (!vdev) {
  4524. dp_err_rl("vdev %d does not exist", vdev_id);
  4525. return;
  4526. }
  4527. vdev->delta_tsf = delta_tsf;
  4528. dp_debug("vdev id %u delta_tsf %u", vdev_id, delta_tsf);
  4529. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_CDP);
  4530. }
  4531. #endif
  4532. #ifdef WLAN_FEATURE_TSF_UPLINK_DELAY
  4533. QDF_STATUS dp_set_tsf_ul_delay_report(struct cdp_soc_t *soc_hdl,
  4534. uint8_t vdev_id, bool enable)
  4535. {
  4536. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  4537. struct dp_vdev *vdev = dp_vdev_get_ref_by_id(soc, vdev_id,
  4538. DP_MOD_ID_CDP);
  4539. if (!vdev) {
  4540. dp_err_rl("vdev %d does not exist", vdev_id);
  4541. return QDF_STATUS_E_FAILURE;
  4542. }
  4543. qdf_atomic_set(&vdev->ul_delay_report, enable);
  4544. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_CDP);
  4545. return QDF_STATUS_SUCCESS;
  4546. }
  4547. QDF_STATUS dp_get_uplink_delay(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  4548. uint32_t *val)
  4549. {
  4550. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  4551. struct dp_vdev *vdev;
  4552. uint32_t delay_accum;
  4553. uint32_t pkts_accum;
  4554. vdev = dp_vdev_get_ref_by_id(soc, vdev_id, DP_MOD_ID_CDP);
  4555. if (!vdev) {
  4556. dp_err_rl("vdev %d does not exist", vdev_id);
  4557. return QDF_STATUS_E_FAILURE;
  4558. }
  4559. if (!qdf_atomic_read(&vdev->ul_delay_report)) {
  4560. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_CDP);
  4561. return QDF_STATUS_E_FAILURE;
  4562. }
  4563. /* Average uplink delay based on current accumulated values */
  4564. delay_accum = qdf_atomic_read(&vdev->ul_delay_accum);
  4565. pkts_accum = qdf_atomic_read(&vdev->ul_pkts_accum);
  4566. *val = delay_accum / pkts_accum;
  4567. dp_debug("uplink_delay %u delay_accum %u pkts_accum %u", *val,
  4568. delay_accum, pkts_accum);
  4569. /* Reset accumulated values to 0 */
  4570. qdf_atomic_set(&vdev->ul_delay_accum, 0);
  4571. qdf_atomic_set(&vdev->ul_pkts_accum, 0);
  4572. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_CDP);
  4573. return QDF_STATUS_SUCCESS;
  4574. }
  4575. static void dp_tx_update_uplink_delay(struct dp_soc *soc, struct dp_vdev *vdev,
  4576. struct hal_tx_completion_status *ts)
  4577. {
  4578. uint32_t ul_delay;
  4579. if (qdf_unlikely(!vdev)) {
  4580. dp_info_rl("vdev is null or delete in progress");
  4581. return;
  4582. }
  4583. if (!qdf_atomic_read(&vdev->ul_delay_report))
  4584. return;
  4585. if (QDF_IS_STATUS_ERROR(dp_tx_compute_hw_delay_us(ts,
  4586. vdev->delta_tsf,
  4587. &ul_delay)))
  4588. return;
  4589. ul_delay /= 1000; /* in unit of ms */
  4590. qdf_atomic_add(ul_delay, &vdev->ul_delay_accum);
  4591. qdf_atomic_inc(&vdev->ul_pkts_accum);
  4592. }
  4593. #else /* !WLAN_FEATURE_TSF_UPLINK_DELAY */
  4594. static inline
  4595. void dp_tx_update_uplink_delay(struct dp_soc *soc, struct dp_vdev *vdev,
  4596. struct hal_tx_completion_status *ts)
  4597. {
  4598. }
  4599. #endif /* WLAN_FEATURE_TSF_UPLINK_DELAY */
  4600. void dp_tx_comp_process_tx_status(struct dp_soc *soc,
  4601. struct dp_tx_desc_s *tx_desc,
  4602. struct hal_tx_completion_status *ts,
  4603. struct dp_txrx_peer *txrx_peer,
  4604. uint8_t ring_id)
  4605. {
  4606. uint32_t length;
  4607. qdf_ether_header_t *eh;
  4608. struct dp_vdev *vdev = NULL;
  4609. qdf_nbuf_t nbuf = tx_desc->nbuf;
  4610. enum qdf_dp_tx_rx_status dp_status;
  4611. uint8_t link_id = 0;
  4612. if (!nbuf) {
  4613. dp_info_rl("invalid tx descriptor. nbuf NULL");
  4614. goto out;
  4615. }
  4616. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  4617. length = dp_tx_get_pkt_len(tx_desc);
  4618. dp_status = dp_tx_hw_to_qdf(ts->status);
  4619. DPTRACE(qdf_dp_trace_ptr(tx_desc->nbuf,
  4620. QDF_DP_TRACE_LI_DP_FREE_PACKET_PTR_RECORD,
  4621. QDF_TRACE_DEFAULT_PDEV_ID,
  4622. qdf_nbuf_data_addr(nbuf),
  4623. sizeof(qdf_nbuf_data(nbuf)),
  4624. tx_desc->id, ts->status, dp_status));
  4625. dp_tx_comp_debug("-------------------- \n"
  4626. "Tx Completion Stats: \n"
  4627. "-------------------- \n"
  4628. "ack_frame_rssi = %d \n"
  4629. "first_msdu = %d \n"
  4630. "last_msdu = %d \n"
  4631. "msdu_part_of_amsdu = %d \n"
  4632. "rate_stats valid = %d \n"
  4633. "bw = %d \n"
  4634. "pkt_type = %d \n"
  4635. "stbc = %d \n"
  4636. "ldpc = %d \n"
  4637. "sgi = %d \n"
  4638. "mcs = %d \n"
  4639. "ofdma = %d \n"
  4640. "tones_in_ru = %d \n"
  4641. "tsf = %d \n"
  4642. "ppdu_id = %d \n"
  4643. "transmit_cnt = %d \n"
  4644. "tid = %d \n"
  4645. "peer_id = %d\n"
  4646. "tx_status = %d\n"
  4647. "tx_release_source = %d\n",
  4648. ts->ack_frame_rssi, ts->first_msdu,
  4649. ts->last_msdu, ts->msdu_part_of_amsdu,
  4650. ts->valid, ts->bw, ts->pkt_type, ts->stbc,
  4651. ts->ldpc, ts->sgi, ts->mcs, ts->ofdma,
  4652. ts->tones_in_ru, ts->tsf, ts->ppdu_id,
  4653. ts->transmit_cnt, ts->tid, ts->peer_id,
  4654. ts->status, ts->release_src);
  4655. /* Update SoC level stats */
  4656. DP_STATS_INCC(soc, tx.dropped_fw_removed, 1,
  4657. (ts->status == HAL_TX_TQM_RR_REM_CMD_REM));
  4658. if (!txrx_peer) {
  4659. dp_info_rl("peer is null or deletion in progress");
  4660. DP_STATS_INC_PKT(soc, tx.tx_invalid_peer, 1, length);
  4661. goto out;
  4662. }
  4663. vdev = txrx_peer->vdev;
  4664. link_id = dp_tx_get_link_id_from_ppdu_id(soc, ts, txrx_peer, vdev);
  4665. dp_tx_update_connectivity_stats(soc, vdev, tx_desc, ts->status);
  4666. dp_tx_update_uplink_delay(soc, vdev, ts);
  4667. /* check tx complete notification */
  4668. if (qdf_nbuf_tx_notify_comp_get(nbuf))
  4669. dp_tx_notify_completion(soc, vdev, tx_desc,
  4670. nbuf, ts->status);
  4671. /* Update per-packet stats for mesh mode */
  4672. if (qdf_unlikely(vdev->mesh_vdev) &&
  4673. !(tx_desc->flags & DP_TX_DESC_FLAG_TO_FW))
  4674. dp_tx_comp_fill_tx_completion_stats(tx_desc, ts);
  4675. /* Update peer level stats */
  4676. if (qdf_unlikely(txrx_peer->bss_peer &&
  4677. vdev->opmode == wlan_op_mode_ap)) {
  4678. if (ts->status != HAL_TX_TQM_RR_REM_CMD_REM) {
  4679. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, tx.mcast, 1,
  4680. length, link_id);
  4681. if (txrx_peer->vdev->tx_encap_type ==
  4682. htt_cmn_pkt_type_ethernet &&
  4683. QDF_IS_ADDR_BROADCAST(eh->ether_dhost)) {
  4684. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  4685. tx.bcast, 1,
  4686. length, link_id);
  4687. }
  4688. }
  4689. } else {
  4690. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, tx.ucast, 1, length,
  4691. link_id);
  4692. if (ts->status == HAL_TX_TQM_RR_FRAME_ACKED) {
  4693. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, tx.tx_success,
  4694. 1, length, link_id);
  4695. if (qdf_unlikely(txrx_peer->in_twt)) {
  4696. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  4697. tx.tx_success_twt,
  4698. 1, length,
  4699. link_id);
  4700. }
  4701. }
  4702. }
  4703. dp_tx_update_peer_stats(tx_desc, ts, txrx_peer, ring_id, link_id);
  4704. dp_tx_update_peer_delay_stats(txrx_peer, tx_desc, ts, ring_id);
  4705. dp_tx_update_peer_jitter_stats(txrx_peer, tx_desc, ts, ring_id);
  4706. dp_tx_update_peer_sawf_stats(soc, vdev, txrx_peer, tx_desc,
  4707. ts, ts->tid);
  4708. dp_tx_send_pktlog(soc, vdev->pdev, tx_desc, nbuf, dp_status);
  4709. #ifdef QCA_SUPPORT_RDK_STATS
  4710. if (soc->peerstats_enabled)
  4711. dp_tx_sojourn_stats_process(vdev->pdev, txrx_peer, ts->tid,
  4712. qdf_ktime_to_ms(tx_desc->timestamp),
  4713. ts->ppdu_id, link_id);
  4714. #endif
  4715. out:
  4716. return;
  4717. }
  4718. #if defined(QCA_VDEV_STATS_HW_OFFLOAD_SUPPORT) && \
  4719. defined(QCA_ENHANCED_STATS_SUPPORT)
  4720. void dp_tx_update_peer_basic_stats(struct dp_txrx_peer *txrx_peer,
  4721. uint32_t length, uint8_t tx_status,
  4722. bool update)
  4723. {
  4724. if (update || (!txrx_peer->hw_txrx_stats_en)) {
  4725. DP_PEER_STATS_FLAT_INC_PKT(txrx_peer, comp_pkt, 1, length);
  4726. if (tx_status != HAL_TX_TQM_RR_FRAME_ACKED)
  4727. DP_PEER_STATS_FLAT_INC(txrx_peer, tx_failed, 1);
  4728. }
  4729. }
  4730. #elif defined(QCA_VDEV_STATS_HW_OFFLOAD_SUPPORT)
  4731. void dp_tx_update_peer_basic_stats(struct dp_txrx_peer *txrx_peer,
  4732. uint32_t length, uint8_t tx_status,
  4733. bool update)
  4734. {
  4735. if (!txrx_peer->hw_txrx_stats_en) {
  4736. DP_PEER_STATS_FLAT_INC_PKT(txrx_peer, comp_pkt, 1, length);
  4737. if (tx_status != HAL_TX_TQM_RR_FRAME_ACKED)
  4738. DP_PEER_STATS_FLAT_INC(txrx_peer, tx_failed, 1);
  4739. }
  4740. }
  4741. #else
  4742. void dp_tx_update_peer_basic_stats(struct dp_txrx_peer *txrx_peer,
  4743. uint32_t length, uint8_t tx_status,
  4744. bool update)
  4745. {
  4746. DP_PEER_STATS_FLAT_INC_PKT(txrx_peer, comp_pkt, 1, length);
  4747. if (tx_status != HAL_TX_TQM_RR_FRAME_ACKED)
  4748. DP_PEER_STATS_FLAT_INC(txrx_peer, tx_failed, 1);
  4749. }
  4750. #endif
  4751. /**
  4752. * dp_tx_prefetch_next_nbuf_data(): Prefetch nbuf and nbuf data
  4753. * @next: descriptor of the nrxt buffer
  4754. *
  4755. * Return: none
  4756. */
  4757. #ifdef QCA_DP_RX_NBUF_AND_NBUF_DATA_PREFETCH
  4758. static inline
  4759. void dp_tx_prefetch_next_nbuf_data(struct dp_tx_desc_s *next)
  4760. {
  4761. qdf_nbuf_t nbuf = NULL;
  4762. if (next)
  4763. nbuf = next->nbuf;
  4764. if (nbuf)
  4765. qdf_prefetch(nbuf);
  4766. }
  4767. #else
  4768. static inline
  4769. void dp_tx_prefetch_next_nbuf_data(struct dp_tx_desc_s *next)
  4770. {
  4771. }
  4772. #endif
  4773. /**
  4774. * dp_tx_mcast_reinject_handler() - Tx reinjected multicast packets handler
  4775. * @soc: core txrx main context
  4776. * @desc: software descriptor
  4777. *
  4778. * Return: true when packet is reinjected
  4779. */
  4780. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP) && \
  4781. defined(WLAN_MCAST_MLO) && !defined(CONFIG_MLO_SINGLE_DEV)
  4782. static inline bool
  4783. dp_tx_mcast_reinject_handler(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  4784. {
  4785. struct dp_vdev *vdev = NULL;
  4786. if (desc->tx_status == HAL_TX_TQM_RR_MULTICAST_DROP) {
  4787. if (!soc->arch_ops.dp_tx_mcast_handler ||
  4788. !soc->arch_ops.dp_tx_is_mcast_primary)
  4789. return false;
  4790. vdev = dp_vdev_get_ref_by_id(soc, desc->vdev_id,
  4791. DP_MOD_ID_REINJECT);
  4792. if (qdf_unlikely(!vdev)) {
  4793. dp_tx_comp_info_rl("Unable to get vdev ref %d",
  4794. desc->id);
  4795. return false;
  4796. }
  4797. if (!(soc->arch_ops.dp_tx_is_mcast_primary(soc, vdev))) {
  4798. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_REINJECT);
  4799. return false;
  4800. }
  4801. DP_STATS_INC_PKT(vdev, tx_i.reinject_pkts, 1,
  4802. qdf_nbuf_len(desc->nbuf));
  4803. soc->arch_ops.dp_tx_mcast_handler(soc, vdev, desc->nbuf);
  4804. dp_tx_desc_release(soc, desc, desc->pool_id);
  4805. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_REINJECT);
  4806. return true;
  4807. }
  4808. return false;
  4809. }
  4810. #else
  4811. static inline bool
  4812. dp_tx_mcast_reinject_handler(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  4813. {
  4814. return false;
  4815. }
  4816. #endif
  4817. #ifdef QCA_DP_TX_NBUF_LIST_FREE
  4818. static inline void
  4819. dp_tx_nbuf_queue_head_init(qdf_nbuf_queue_head_t *nbuf_queue_head)
  4820. {
  4821. qdf_nbuf_queue_head_init(nbuf_queue_head);
  4822. }
  4823. static inline void
  4824. dp_tx_nbuf_dev_queue_free(qdf_nbuf_queue_head_t *nbuf_queue_head,
  4825. struct dp_tx_desc_s *desc)
  4826. {
  4827. qdf_nbuf_t nbuf = NULL;
  4828. nbuf = desc->nbuf;
  4829. if (qdf_likely(desc->flags & DP_TX_DESC_FLAG_FAST))
  4830. qdf_nbuf_dev_queue_head(nbuf_queue_head, nbuf);
  4831. else
  4832. qdf_nbuf_free(nbuf);
  4833. }
  4834. static inline void
  4835. dp_tx_nbuf_dev_queue_free_no_flag(qdf_nbuf_queue_head_t *nbuf_queue_head,
  4836. qdf_nbuf_t nbuf)
  4837. {
  4838. if (!nbuf)
  4839. return;
  4840. if (nbuf->is_from_recycler)
  4841. qdf_nbuf_dev_queue_head(nbuf_queue_head, nbuf);
  4842. else
  4843. qdf_nbuf_free(nbuf);
  4844. }
  4845. static inline void
  4846. dp_tx_nbuf_dev_kfree_list(qdf_nbuf_queue_head_t *nbuf_queue_head)
  4847. {
  4848. qdf_nbuf_dev_kfree_list(nbuf_queue_head);
  4849. }
  4850. #else
  4851. static inline void
  4852. dp_tx_nbuf_queue_head_init(qdf_nbuf_queue_head_t *nbuf_queue_head)
  4853. {
  4854. }
  4855. static inline void
  4856. dp_tx_nbuf_dev_queue_free(qdf_nbuf_queue_head_t *nbuf_queue_head,
  4857. struct dp_tx_desc_s *desc)
  4858. {
  4859. qdf_nbuf_free(desc->nbuf);
  4860. }
  4861. static inline void
  4862. dp_tx_nbuf_dev_queue_free_no_flag(qdf_nbuf_queue_head_t *nbuf_queue_head,
  4863. qdf_nbuf_t nbuf)
  4864. {
  4865. qdf_nbuf_free(nbuf);
  4866. }
  4867. static inline void
  4868. dp_tx_nbuf_dev_kfree_list(qdf_nbuf_queue_head_t *nbuf_queue_head)
  4869. {
  4870. }
  4871. #endif
  4872. #ifdef WLAN_SUPPORT_PPEDS
  4873. static inline void
  4874. dp_tx_update_ppeds_tx_comp_stats(struct dp_soc *soc,
  4875. struct dp_txrx_peer *txrx_peer,
  4876. struct hal_tx_completion_status *ts,
  4877. struct dp_tx_desc_s *desc,
  4878. uint8_t ring_id)
  4879. {
  4880. uint8_t link_id = 0;
  4881. struct dp_vdev *vdev = NULL;
  4882. if (qdf_likely(txrx_peer)) {
  4883. if (!(desc->flags & DP_TX_DESC_FLAG_SIMPLE)) {
  4884. hal_tx_comp_get_status(&desc->comp,
  4885. ts,
  4886. soc->hal_soc);
  4887. vdev = txrx_peer->vdev;
  4888. link_id = dp_tx_get_link_id_from_ppdu_id(soc,
  4889. ts,
  4890. txrx_peer,
  4891. vdev);
  4892. if (link_id < 1 || link_id > DP_MAX_MLO_LINKS)
  4893. link_id = 0;
  4894. dp_tx_update_peer_stats(desc, ts,
  4895. txrx_peer,
  4896. ring_id,
  4897. link_id);
  4898. } else {
  4899. dp_tx_update_peer_basic_stats(txrx_peer, desc->length,
  4900. desc->tx_status, false);
  4901. }
  4902. }
  4903. }
  4904. #else
  4905. static inline void
  4906. dp_tx_update_ppeds_tx_comp_stats(struct dp_soc *soc,
  4907. struct dp_txrx_peer *txrx_peer,
  4908. struct hal_tx_completion_status *ts,
  4909. struct dp_tx_desc_s *desc,
  4910. uint8_t ring_id)
  4911. {
  4912. }
  4913. #endif
  4914. void
  4915. dp_tx_comp_process_desc_list(struct dp_soc *soc,
  4916. struct dp_tx_desc_s *comp_head, uint8_t ring_id)
  4917. {
  4918. struct dp_tx_desc_s *desc;
  4919. struct dp_tx_desc_s *next;
  4920. struct hal_tx_completion_status ts;
  4921. struct dp_txrx_peer *txrx_peer = NULL;
  4922. uint16_t peer_id = DP_INVALID_PEER;
  4923. dp_txrx_ref_handle txrx_ref_handle = NULL;
  4924. qdf_nbuf_queue_head_t h;
  4925. desc = comp_head;
  4926. dp_tx_nbuf_queue_head_init(&h);
  4927. while (desc) {
  4928. next = desc->next;
  4929. dp_tx_prefetch_next_nbuf_data(next);
  4930. if (peer_id != desc->peer_id) {
  4931. if (txrx_peer)
  4932. dp_txrx_peer_unref_delete(txrx_ref_handle,
  4933. DP_MOD_ID_TX_COMP);
  4934. peer_id = desc->peer_id;
  4935. txrx_peer =
  4936. dp_txrx_peer_get_ref_by_id(soc, peer_id,
  4937. &txrx_ref_handle,
  4938. DP_MOD_ID_TX_COMP);
  4939. }
  4940. if (dp_tx_mcast_reinject_handler(soc, desc)) {
  4941. desc = next;
  4942. continue;
  4943. }
  4944. if (desc->flags & DP_TX_DESC_FLAG_PPEDS) {
  4945. qdf_nbuf_t nbuf;
  4946. dp_tx_update_ppeds_tx_comp_stats(soc, txrx_peer, &ts,
  4947. desc, ring_id);
  4948. if (desc->pool_id != DP_TX_PPEDS_POOL_ID) {
  4949. nbuf = desc->nbuf;
  4950. dp_tx_nbuf_dev_queue_free_no_flag(&h, nbuf);
  4951. dp_tx_desc_free(soc, desc, desc->pool_id);
  4952. __dp_tx_outstanding_dec(soc);
  4953. } else {
  4954. nbuf = dp_ppeds_tx_desc_free(soc, desc);
  4955. dp_tx_nbuf_dev_queue_free_no_flag(&h, nbuf);
  4956. }
  4957. desc = next;
  4958. continue;
  4959. }
  4960. if (qdf_likely(desc->flags & DP_TX_DESC_FLAG_SIMPLE)) {
  4961. struct dp_pdev *pdev = desc->pdev;
  4962. if (qdf_likely(txrx_peer))
  4963. dp_tx_update_peer_basic_stats(txrx_peer,
  4964. desc->length,
  4965. desc->tx_status,
  4966. false);
  4967. qdf_assert(pdev);
  4968. dp_tx_outstanding_dec(pdev);
  4969. /*
  4970. * Calling a QDF WRAPPER here is creating significant
  4971. * performance impact so avoided the wrapper call here
  4972. */
  4973. dp_tx_desc_history_add(soc, desc->dma_addr, desc->nbuf,
  4974. desc->id, DP_TX_COMP_UNMAP);
  4975. dp_tx_nbuf_unmap(soc, desc);
  4976. dp_tx_nbuf_dev_queue_free(&h, desc);
  4977. dp_tx_desc_free(soc, desc, desc->pool_id);
  4978. desc = next;
  4979. continue;
  4980. }
  4981. hal_tx_comp_get_status(&desc->comp, &ts, soc->hal_soc);
  4982. dp_tx_comp_process_tx_status(soc, desc, &ts, txrx_peer,
  4983. ring_id);
  4984. dp_tx_comp_process_desc(soc, desc, &ts, txrx_peer);
  4985. dp_tx_desc_release(soc, desc, desc->pool_id);
  4986. desc = next;
  4987. }
  4988. dp_tx_nbuf_dev_kfree_list(&h);
  4989. if (txrx_peer)
  4990. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_TX_COMP);
  4991. }
  4992. #ifdef WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT
  4993. static inline
  4994. bool dp_tx_comp_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped,
  4995. int max_reap_limit)
  4996. {
  4997. bool limit_hit = false;
  4998. limit_hit =
  4999. (num_reaped >= max_reap_limit) ? true : false;
  5000. if (limit_hit)
  5001. DP_STATS_INC(soc, tx.tx_comp_loop_pkt_limit_hit, 1);
  5002. return limit_hit;
  5003. }
  5004. static inline bool dp_tx_comp_enable_eol_data_check(struct dp_soc *soc)
  5005. {
  5006. return soc->wlan_cfg_ctx->tx_comp_enable_eol_data_check;
  5007. }
  5008. static inline int dp_tx_comp_get_loop_pkt_limit(struct dp_soc *soc)
  5009. {
  5010. struct wlan_cfg_dp_soc_ctxt *cfg = soc->wlan_cfg_ctx;
  5011. return cfg->tx_comp_loop_pkt_limit;
  5012. }
  5013. #else
  5014. static inline
  5015. bool dp_tx_comp_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped,
  5016. int max_reap_limit)
  5017. {
  5018. return false;
  5019. }
  5020. static inline bool dp_tx_comp_enable_eol_data_check(struct dp_soc *soc)
  5021. {
  5022. return false;
  5023. }
  5024. static inline int dp_tx_comp_get_loop_pkt_limit(struct dp_soc *soc)
  5025. {
  5026. return 0;
  5027. }
  5028. #endif
  5029. #ifdef WLAN_FEATURE_NEAR_FULL_IRQ
  5030. static inline int
  5031. dp_srng_test_and_update_nf_params(struct dp_soc *soc, struct dp_srng *dp_srng,
  5032. int *max_reap_limit)
  5033. {
  5034. return soc->arch_ops.dp_srng_test_and_update_nf_params(soc, dp_srng,
  5035. max_reap_limit);
  5036. }
  5037. #else
  5038. static inline int
  5039. dp_srng_test_and_update_nf_params(struct dp_soc *soc, struct dp_srng *dp_srng,
  5040. int *max_reap_limit)
  5041. {
  5042. return 0;
  5043. }
  5044. #endif
  5045. #ifdef DP_TX_TRACKING
  5046. void dp_tx_desc_check_corruption(struct dp_tx_desc_s *tx_desc)
  5047. {
  5048. if ((tx_desc->magic != DP_TX_MAGIC_PATTERN_INUSE) &&
  5049. (tx_desc->magic != DP_TX_MAGIC_PATTERN_FREE)) {
  5050. dp_err_rl("tx_desc %u is corrupted", tx_desc->id);
  5051. qdf_trigger_self_recovery(NULL, QDF_TX_DESC_LEAK);
  5052. }
  5053. }
  5054. #endif
  5055. #ifndef WLAN_SOFTUMAC_SUPPORT
  5056. uint32_t dp_tx_comp_handler(struct dp_intr *int_ctx, struct dp_soc *soc,
  5057. hal_ring_handle_t hal_ring_hdl, uint8_t ring_id,
  5058. uint32_t quota)
  5059. {
  5060. void *tx_comp_hal_desc;
  5061. void *last_prefetched_hw_desc = NULL;
  5062. struct dp_tx_desc_s *last_prefetched_sw_desc = NULL;
  5063. hal_soc_handle_t hal_soc;
  5064. uint8_t buffer_src;
  5065. struct dp_tx_desc_s *tx_desc = NULL;
  5066. struct dp_tx_desc_s *head_desc = NULL;
  5067. struct dp_tx_desc_s *tail_desc = NULL;
  5068. uint32_t num_processed = 0;
  5069. uint32_t count;
  5070. uint32_t num_avail_for_reap = 0;
  5071. bool force_break = false;
  5072. struct dp_srng *tx_comp_ring = &soc->tx_comp_ring[ring_id];
  5073. int max_reap_limit, ring_near_full;
  5074. uint32_t num_entries;
  5075. DP_HIST_INIT();
  5076. num_entries = hal_srng_get_num_entries(soc->hal_soc, hal_ring_hdl);
  5077. more_data:
  5078. hal_soc = soc->hal_soc;
  5079. /* Re-initialize local variables to be re-used */
  5080. head_desc = NULL;
  5081. tail_desc = NULL;
  5082. count = 0;
  5083. max_reap_limit = dp_tx_comp_get_loop_pkt_limit(soc);
  5084. ring_near_full = dp_srng_test_and_update_nf_params(soc, tx_comp_ring,
  5085. &max_reap_limit);
  5086. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  5087. dp_err("HAL RING Access Failed -- %pK", hal_ring_hdl);
  5088. return 0;
  5089. }
  5090. if (!num_avail_for_reap)
  5091. num_avail_for_reap = hal_srng_dst_num_valid(hal_soc,
  5092. hal_ring_hdl, 0);
  5093. if (num_avail_for_reap >= quota)
  5094. num_avail_for_reap = quota;
  5095. dp_srng_dst_inv_cached_descs(soc, hal_ring_hdl, num_avail_for_reap);
  5096. last_prefetched_hw_desc = dp_srng_dst_prefetch_32_byte_desc(hal_soc,
  5097. hal_ring_hdl,
  5098. num_avail_for_reap);
  5099. /* Find head descriptor from completion ring */
  5100. while (qdf_likely(num_avail_for_reap--)) {
  5101. tx_comp_hal_desc = dp_srng_dst_get_next(soc, hal_ring_hdl);
  5102. if (qdf_unlikely(!tx_comp_hal_desc))
  5103. break;
  5104. buffer_src = hal_tx_comp_get_buffer_source(hal_soc,
  5105. tx_comp_hal_desc);
  5106. /* If this buffer was not released by TQM or FW, then it is not
  5107. * Tx completion indication, assert */
  5108. if (qdf_unlikely(buffer_src !=
  5109. HAL_TX_COMP_RELEASE_SOURCE_TQM) &&
  5110. (qdf_unlikely(buffer_src !=
  5111. HAL_TX_COMP_RELEASE_SOURCE_FW))) {
  5112. uint8_t wbm_internal_error;
  5113. dp_err_rl(
  5114. "Tx comp release_src != TQM | FW but from %d",
  5115. buffer_src);
  5116. hal_dump_comp_desc(tx_comp_hal_desc);
  5117. DP_STATS_INC(soc, tx.invalid_release_source, 1);
  5118. /* When WBM sees NULL buffer_addr_info in any of
  5119. * ingress rings it sends an error indication,
  5120. * with wbm_internal_error=1, to a specific ring.
  5121. * The WBM2SW ring used to indicate these errors is
  5122. * fixed in HW, and that ring is being used as Tx
  5123. * completion ring. These errors are not related to
  5124. * Tx completions, and should just be ignored
  5125. */
  5126. wbm_internal_error = hal_get_wbm_internal_error(
  5127. hal_soc,
  5128. tx_comp_hal_desc);
  5129. if (wbm_internal_error) {
  5130. dp_err_rl("Tx comp wbm_internal_error!!");
  5131. DP_STATS_INC(soc, tx.wbm_internal_error[WBM_INT_ERROR_ALL], 1);
  5132. if (HAL_TX_COMP_RELEASE_SOURCE_REO ==
  5133. buffer_src)
  5134. dp_handle_wbm_internal_error(
  5135. soc,
  5136. tx_comp_hal_desc,
  5137. hal_tx_comp_get_buffer_type(
  5138. tx_comp_hal_desc));
  5139. } else {
  5140. dp_err_rl("Tx comp wbm_internal_error false");
  5141. DP_STATS_INC(soc, tx.non_wbm_internal_err, 1);
  5142. }
  5143. continue;
  5144. }
  5145. soc->arch_ops.tx_comp_get_params_from_hal_desc(soc,
  5146. tx_comp_hal_desc,
  5147. &tx_desc);
  5148. if (qdf_unlikely(!tx_desc)) {
  5149. dp_err("unable to retrieve tx_desc!");
  5150. hal_dump_comp_desc(tx_comp_hal_desc);
  5151. DP_STATS_INC(soc, tx.invalid_tx_comp_desc, 1);
  5152. QDF_BUG(0);
  5153. continue;
  5154. }
  5155. tx_desc->buffer_src = buffer_src;
  5156. if (tx_desc->flags & DP_TX_DESC_FLAG_PPEDS)
  5157. goto add_to_pool2;
  5158. /*
  5159. * If the release source is FW, process the HTT status
  5160. */
  5161. if (qdf_unlikely(buffer_src ==
  5162. HAL_TX_COMP_RELEASE_SOURCE_FW)) {
  5163. uint8_t htt_tx_status[HAL_TX_COMP_HTT_STATUS_LEN];
  5164. hal_tx_comp_get_htt_desc(tx_comp_hal_desc,
  5165. htt_tx_status);
  5166. /* Collect hw completion contents */
  5167. hal_tx_comp_desc_sync(tx_comp_hal_desc,
  5168. &tx_desc->comp, 1);
  5169. soc->arch_ops.dp_tx_process_htt_completion(
  5170. soc,
  5171. tx_desc,
  5172. htt_tx_status,
  5173. ring_id);
  5174. } else {
  5175. tx_desc->tx_status =
  5176. hal_tx_comp_get_tx_status(tx_comp_hal_desc);
  5177. tx_desc->buffer_src = buffer_src;
  5178. /*
  5179. * If the fast completion mode is enabled extended
  5180. * metadata from descriptor is not copied
  5181. */
  5182. if (qdf_likely(tx_desc->flags &
  5183. DP_TX_DESC_FLAG_SIMPLE))
  5184. goto add_to_pool;
  5185. /*
  5186. * If the descriptor is already freed in vdev_detach,
  5187. * continue to next descriptor
  5188. */
  5189. if (qdf_unlikely
  5190. ((tx_desc->vdev_id == DP_INVALID_VDEV_ID) &&
  5191. !tx_desc->flags)) {
  5192. dp_tx_comp_info_rl("Descriptor freed in vdev_detach %d",
  5193. tx_desc->id);
  5194. DP_STATS_INC(soc, tx.tx_comp_exception, 1);
  5195. dp_tx_desc_check_corruption(tx_desc);
  5196. continue;
  5197. }
  5198. if (qdf_unlikely(tx_desc->pdev->is_pdev_down)) {
  5199. dp_tx_comp_info_rl("pdev in down state %d",
  5200. tx_desc->id);
  5201. tx_desc->flags |= DP_TX_DESC_FLAG_TX_COMP_ERR;
  5202. dp_tx_comp_free_buf(soc, tx_desc, false);
  5203. dp_tx_desc_release(soc, tx_desc,
  5204. tx_desc->pool_id);
  5205. goto next_desc;
  5206. }
  5207. if (!(tx_desc->flags & DP_TX_DESC_FLAG_ALLOCATED) ||
  5208. !(tx_desc->flags & DP_TX_DESC_FLAG_QUEUED_TX)) {
  5209. dp_tx_comp_alert("Txdesc invalid, flgs = %x,id = %d",
  5210. tx_desc->flags, tx_desc->id);
  5211. qdf_assert_always(0);
  5212. }
  5213. /* Collect hw completion contents */
  5214. hal_tx_comp_desc_sync(tx_comp_hal_desc,
  5215. &tx_desc->comp, 1);
  5216. add_to_pool:
  5217. DP_HIST_PACKET_COUNT_INC(tx_desc->pdev->pdev_id);
  5218. add_to_pool2:
  5219. /* First ring descriptor on the cycle */
  5220. if (!head_desc) {
  5221. head_desc = tx_desc;
  5222. tail_desc = tx_desc;
  5223. }
  5224. tail_desc->next = tx_desc;
  5225. tx_desc->next = NULL;
  5226. tail_desc = tx_desc;
  5227. }
  5228. next_desc:
  5229. num_processed += !(count & DP_TX_NAPI_BUDGET_DIV_MASK);
  5230. /*
  5231. * Processed packet count is more than given quota
  5232. * stop to processing
  5233. */
  5234. count++;
  5235. dp_tx_prefetch_hw_sw_nbuf_desc(soc, hal_soc,
  5236. num_avail_for_reap,
  5237. hal_ring_hdl,
  5238. &last_prefetched_hw_desc,
  5239. &last_prefetched_sw_desc);
  5240. if (dp_tx_comp_loop_pkt_limit_hit(soc, count, max_reap_limit))
  5241. break;
  5242. }
  5243. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  5244. /* Process the reaped descriptors */
  5245. if (head_desc)
  5246. dp_tx_comp_process_desc_list(soc, head_desc, ring_id);
  5247. DP_STATS_INC(soc, tx.tx_comp[ring_id], count);
  5248. /*
  5249. * If we are processing in near-full condition, there are 3 scenario
  5250. * 1) Ring entries has reached critical state
  5251. * 2) Ring entries are still near high threshold
  5252. * 3) Ring entries are below the safe level
  5253. *
  5254. * One more loop will move the state to normal processing and yield
  5255. */
  5256. if (ring_near_full)
  5257. goto more_data;
  5258. if (dp_tx_comp_enable_eol_data_check(soc)) {
  5259. if (num_processed >= quota)
  5260. force_break = true;
  5261. if (!force_break &&
  5262. hal_srng_dst_peek_sync_locked(soc->hal_soc,
  5263. hal_ring_hdl)) {
  5264. DP_STATS_INC(soc, tx.hp_oos2, 1);
  5265. if (!hif_exec_should_yield(soc->hif_handle,
  5266. int_ctx->dp_intr_id))
  5267. goto more_data;
  5268. num_avail_for_reap =
  5269. hal_srng_dst_num_valid_locked(soc->hal_soc,
  5270. hal_ring_hdl,
  5271. true);
  5272. if (qdf_unlikely(num_entries &&
  5273. (num_avail_for_reap >=
  5274. num_entries >> 1))) {
  5275. DP_STATS_INC(soc, tx.near_full, 1);
  5276. goto more_data;
  5277. }
  5278. }
  5279. }
  5280. DP_TX_HIST_STATS_PER_PDEV();
  5281. return num_processed;
  5282. }
  5283. #endif
  5284. #ifdef FEATURE_WLAN_TDLS
  5285. qdf_nbuf_t dp_tx_non_std(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  5286. enum ol_tx_spec tx_spec, qdf_nbuf_t msdu_list)
  5287. {
  5288. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  5289. struct dp_vdev *vdev = dp_vdev_get_ref_by_id(soc, vdev_id,
  5290. DP_MOD_ID_TDLS);
  5291. if (!vdev) {
  5292. dp_err("vdev handle for id %d is NULL", vdev_id);
  5293. return NULL;
  5294. }
  5295. if (tx_spec & OL_TX_SPEC_NO_FREE)
  5296. vdev->is_tdls_frame = true;
  5297. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_TDLS);
  5298. return dp_tx_send(soc_hdl, vdev_id, msdu_list);
  5299. }
  5300. #endif
  5301. QDF_STATUS dp_tx_vdev_attach(struct dp_vdev *vdev)
  5302. {
  5303. int pdev_id;
  5304. /*
  5305. * Fill HTT TCL Metadata with Vdev ID and MAC ID
  5306. */
  5307. DP_TX_TCL_METADATA_TYPE_SET(vdev->htt_tcl_metadata,
  5308. DP_TCL_METADATA_TYPE_VDEV_BASED);
  5309. DP_TX_TCL_METADATA_VDEV_ID_SET(vdev->htt_tcl_metadata,
  5310. vdev->vdev_id);
  5311. pdev_id =
  5312. dp_get_target_pdev_id_for_host_pdev_id(vdev->pdev->soc,
  5313. vdev->pdev->pdev_id);
  5314. DP_TX_TCL_METADATA_PDEV_ID_SET(vdev->htt_tcl_metadata, pdev_id);
  5315. /*
  5316. * Set HTT Extension Valid bit to 0 by default
  5317. */
  5318. DP_TX_TCL_METADATA_VALID_HTT_SET(vdev->htt_tcl_metadata, 0);
  5319. dp_tx_vdev_update_search_flags(vdev);
  5320. return QDF_STATUS_SUCCESS;
  5321. }
  5322. #ifndef FEATURE_WDS
  5323. static inline bool dp_tx_da_search_override(struct dp_vdev *vdev)
  5324. {
  5325. return false;
  5326. }
  5327. #endif
  5328. void dp_tx_vdev_update_search_flags(struct dp_vdev *vdev)
  5329. {
  5330. struct dp_soc *soc = vdev->pdev->soc;
  5331. /*
  5332. * Enable both AddrY (SA based search) and AddrX (Da based search)
  5333. * for TDLS link
  5334. *
  5335. * Enable AddrY (SA based search) only for non-WDS STA and
  5336. * ProxySTA VAP (in HKv1) modes.
  5337. *
  5338. * In all other VAP modes, only DA based search should be
  5339. * enabled
  5340. */
  5341. if (vdev->opmode == wlan_op_mode_sta &&
  5342. vdev->tdls_link_connected)
  5343. vdev->hal_desc_addr_search_flags =
  5344. (HAL_TX_DESC_ADDRX_EN | HAL_TX_DESC_ADDRY_EN);
  5345. else if ((vdev->opmode == wlan_op_mode_sta) &&
  5346. !dp_tx_da_search_override(vdev))
  5347. vdev->hal_desc_addr_search_flags = HAL_TX_DESC_ADDRY_EN;
  5348. else
  5349. vdev->hal_desc_addr_search_flags = HAL_TX_DESC_ADDRX_EN;
  5350. if (vdev->opmode == wlan_op_mode_sta && !vdev->tdls_link_connected)
  5351. vdev->search_type = soc->sta_mode_search_policy;
  5352. else
  5353. vdev->search_type = HAL_TX_ADDR_SEARCH_DEFAULT;
  5354. }
  5355. #ifdef WLAN_SUPPORT_PPEDS
  5356. static inline bool
  5357. dp_is_tx_desc_flush_match(struct dp_pdev *pdev,
  5358. struct dp_vdev *vdev,
  5359. struct dp_tx_desc_s *tx_desc)
  5360. {
  5361. if (!(tx_desc && (tx_desc->flags & DP_TX_DESC_FLAG_ALLOCATED)))
  5362. return false;
  5363. if (tx_desc->flags & DP_TX_DESC_FLAG_PPEDS)
  5364. return true;
  5365. /*
  5366. * if vdev is given, then only check whether desc
  5367. * vdev match. if vdev is NULL, then check whether
  5368. * desc pdev match.
  5369. */
  5370. return vdev ? (tx_desc->vdev_id == vdev->vdev_id) :
  5371. (tx_desc->pdev == pdev);
  5372. }
  5373. #else
  5374. static inline bool
  5375. dp_is_tx_desc_flush_match(struct dp_pdev *pdev,
  5376. struct dp_vdev *vdev,
  5377. struct dp_tx_desc_s *tx_desc)
  5378. {
  5379. if (!(tx_desc && (tx_desc->flags & DP_TX_DESC_FLAG_ALLOCATED)))
  5380. return false;
  5381. /*
  5382. * if vdev is given, then only check whether desc
  5383. * vdev match. if vdev is NULL, then check whether
  5384. * desc pdev match.
  5385. */
  5386. return vdev ? (tx_desc->vdev_id == vdev->vdev_id) :
  5387. (tx_desc->pdev == pdev);
  5388. }
  5389. #endif
  5390. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  5391. void dp_tx_desc_flush(struct dp_pdev *pdev, struct dp_vdev *vdev,
  5392. bool force_free)
  5393. {
  5394. uint8_t i;
  5395. uint32_t j;
  5396. uint32_t num_desc, page_id, offset;
  5397. uint16_t num_desc_per_page;
  5398. struct dp_soc *soc = pdev->soc;
  5399. struct dp_tx_desc_s *tx_desc = NULL;
  5400. struct dp_tx_desc_pool_s *tx_desc_pool = NULL;
  5401. if (!vdev && !force_free) {
  5402. dp_err("Reset TX desc vdev, Vdev param is required!");
  5403. return;
  5404. }
  5405. for (i = 0; i < MAX_TXDESC_POOLS; i++) {
  5406. tx_desc_pool = &soc->tx_desc[i];
  5407. if (!(tx_desc_pool->pool_size) ||
  5408. IS_TX_DESC_POOL_STATUS_INACTIVE(tx_desc_pool) ||
  5409. !(tx_desc_pool->desc_pages.cacheable_pages))
  5410. continue;
  5411. /*
  5412. * Add flow pool lock protection in case pool is freed
  5413. * due to all tx_desc is recycled when handle TX completion.
  5414. * this is not necessary when do force flush as:
  5415. * a. double lock will happen if dp_tx_desc_release is
  5416. * also trying to acquire it.
  5417. * b. dp interrupt has been disabled before do force TX desc
  5418. * flush in dp_pdev_deinit().
  5419. */
  5420. if (!force_free)
  5421. qdf_spin_lock_bh(&tx_desc_pool->flow_pool_lock);
  5422. num_desc = tx_desc_pool->pool_size;
  5423. num_desc_per_page =
  5424. tx_desc_pool->desc_pages.num_element_per_page;
  5425. for (j = 0; j < num_desc; j++) {
  5426. page_id = j / num_desc_per_page;
  5427. offset = j % num_desc_per_page;
  5428. if (qdf_unlikely(!(tx_desc_pool->
  5429. desc_pages.cacheable_pages)))
  5430. break;
  5431. tx_desc = dp_tx_desc_find(soc, i, page_id, offset);
  5432. if (dp_is_tx_desc_flush_match(pdev, vdev, tx_desc)) {
  5433. /*
  5434. * Free TX desc if force free is
  5435. * required, otherwise only reset vdev
  5436. * in this TX desc.
  5437. */
  5438. if (force_free) {
  5439. tx_desc->flags |= DP_TX_DESC_FLAG_FLUSH;
  5440. dp_tx_comp_free_buf(soc, tx_desc,
  5441. false);
  5442. dp_tx_desc_release(soc, tx_desc, i);
  5443. } else {
  5444. tx_desc->vdev_id = DP_INVALID_VDEV_ID;
  5445. }
  5446. }
  5447. }
  5448. if (!force_free)
  5449. qdf_spin_unlock_bh(&tx_desc_pool->flow_pool_lock);
  5450. }
  5451. }
  5452. #else /* QCA_LL_TX_FLOW_CONTROL_V2! */
  5453. /**
  5454. * dp_tx_desc_reset_vdev() - reset vdev to NULL in TX Desc
  5455. *
  5456. * @soc: Handle to DP soc structure
  5457. * @tx_desc: pointer of one TX desc
  5458. * @desc_pool_id: TX Desc pool id
  5459. */
  5460. static inline void
  5461. dp_tx_desc_reset_vdev(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc,
  5462. uint8_t desc_pool_id)
  5463. {
  5464. TX_DESC_LOCK_LOCK(&soc->tx_desc[desc_pool_id].lock);
  5465. tx_desc->vdev_id = DP_INVALID_VDEV_ID;
  5466. TX_DESC_LOCK_UNLOCK(&soc->tx_desc[desc_pool_id].lock);
  5467. }
  5468. void dp_tx_desc_flush(struct dp_pdev *pdev, struct dp_vdev *vdev,
  5469. bool force_free)
  5470. {
  5471. uint8_t i, num_pool;
  5472. uint32_t j;
  5473. uint32_t num_desc, page_id, offset;
  5474. uint16_t num_desc_per_page;
  5475. struct dp_soc *soc = pdev->soc;
  5476. struct dp_tx_desc_s *tx_desc = NULL;
  5477. struct dp_tx_desc_pool_s *tx_desc_pool = NULL;
  5478. if (!vdev && !force_free) {
  5479. dp_err("Reset TX desc vdev, Vdev param is required!");
  5480. return;
  5481. }
  5482. num_desc = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  5483. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5484. for (i = 0; i < num_pool; i++) {
  5485. tx_desc_pool = &soc->tx_desc[i];
  5486. if (!tx_desc_pool->desc_pages.cacheable_pages)
  5487. continue;
  5488. num_desc_per_page =
  5489. tx_desc_pool->desc_pages.num_element_per_page;
  5490. for (j = 0; j < num_desc; j++) {
  5491. page_id = j / num_desc_per_page;
  5492. offset = j % num_desc_per_page;
  5493. tx_desc = dp_tx_desc_find(soc, i, page_id, offset);
  5494. if (dp_is_tx_desc_flush_match(pdev, vdev, tx_desc)) {
  5495. if (force_free) {
  5496. dp_tx_comp_free_buf(soc, tx_desc,
  5497. false);
  5498. dp_tx_desc_release(soc, tx_desc, i);
  5499. } else {
  5500. dp_tx_desc_reset_vdev(soc, tx_desc,
  5501. i);
  5502. }
  5503. }
  5504. }
  5505. }
  5506. }
  5507. #endif /* !QCA_LL_TX_FLOW_CONTROL_V2 */
  5508. QDF_STATUS dp_tx_vdev_detach(struct dp_vdev *vdev)
  5509. {
  5510. struct dp_pdev *pdev = vdev->pdev;
  5511. /* Reset TX desc associated to this Vdev as NULL */
  5512. dp_tx_desc_flush(pdev, vdev, false);
  5513. return QDF_STATUS_SUCCESS;
  5514. }
  5515. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  5516. /* Pools will be allocated dynamically */
  5517. static QDF_STATUS dp_tx_alloc_static_pools(struct dp_soc *soc, int num_pool,
  5518. int num_desc)
  5519. {
  5520. uint8_t i;
  5521. for (i = 0; i < num_pool; i++) {
  5522. qdf_spinlock_create(&soc->tx_desc[i].flow_pool_lock);
  5523. soc->tx_desc[i].status = FLOW_POOL_INACTIVE;
  5524. }
  5525. return QDF_STATUS_SUCCESS;
  5526. }
  5527. static QDF_STATUS dp_tx_init_static_pools(struct dp_soc *soc, int num_pool,
  5528. uint32_t num_desc)
  5529. {
  5530. return QDF_STATUS_SUCCESS;
  5531. }
  5532. static void dp_tx_deinit_static_pools(struct dp_soc *soc, int num_pool)
  5533. {
  5534. }
  5535. static void dp_tx_delete_static_pools(struct dp_soc *soc, int num_pool)
  5536. {
  5537. uint8_t i;
  5538. for (i = 0; i < num_pool; i++)
  5539. qdf_spinlock_destroy(&soc->tx_desc[i].flow_pool_lock);
  5540. }
  5541. #else /* QCA_LL_TX_FLOW_CONTROL_V2! */
  5542. static QDF_STATUS dp_tx_alloc_static_pools(struct dp_soc *soc, int num_pool,
  5543. uint32_t num_desc)
  5544. {
  5545. uint8_t i, count;
  5546. /* Allocate software Tx descriptor pools */
  5547. for (i = 0; i < num_pool; i++) {
  5548. if (dp_tx_desc_pool_alloc(soc, i, num_desc)) {
  5549. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5550. FL("Tx Desc Pool alloc %d failed %pK"),
  5551. i, soc);
  5552. goto fail;
  5553. }
  5554. }
  5555. return QDF_STATUS_SUCCESS;
  5556. fail:
  5557. for (count = 0; count < i; count++)
  5558. dp_tx_desc_pool_free(soc, count);
  5559. return QDF_STATUS_E_NOMEM;
  5560. }
  5561. static QDF_STATUS dp_tx_init_static_pools(struct dp_soc *soc, int num_pool,
  5562. uint32_t num_desc)
  5563. {
  5564. uint8_t i;
  5565. for (i = 0; i < num_pool; i++) {
  5566. if (dp_tx_desc_pool_init(soc, i, num_desc)) {
  5567. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5568. FL("Tx Desc Pool init %d failed %pK"),
  5569. i, soc);
  5570. return QDF_STATUS_E_NOMEM;
  5571. }
  5572. }
  5573. return QDF_STATUS_SUCCESS;
  5574. }
  5575. static void dp_tx_deinit_static_pools(struct dp_soc *soc, int num_pool)
  5576. {
  5577. uint8_t i;
  5578. for (i = 0; i < num_pool; i++)
  5579. dp_tx_desc_pool_deinit(soc, i);
  5580. }
  5581. static void dp_tx_delete_static_pools(struct dp_soc *soc, int num_pool)
  5582. {
  5583. uint8_t i;
  5584. for (i = 0; i < num_pool; i++)
  5585. dp_tx_desc_pool_free(soc, i);
  5586. }
  5587. #endif /* !QCA_LL_TX_FLOW_CONTROL_V2 */
  5588. /**
  5589. * dp_tx_tso_cmn_desc_pool_deinit() - de-initialize TSO descriptors
  5590. * @soc: core txrx main context
  5591. * @num_pool: number of pools
  5592. *
  5593. */
  5594. static void dp_tx_tso_cmn_desc_pool_deinit(struct dp_soc *soc, uint8_t num_pool)
  5595. {
  5596. dp_tx_tso_desc_pool_deinit(soc, num_pool);
  5597. dp_tx_tso_num_seg_pool_deinit(soc, num_pool);
  5598. }
  5599. /**
  5600. * dp_tx_tso_cmn_desc_pool_free() - free TSO descriptors
  5601. * @soc: core txrx main context
  5602. * @num_pool: number of pools
  5603. *
  5604. */
  5605. static void dp_tx_tso_cmn_desc_pool_free(struct dp_soc *soc, uint8_t num_pool)
  5606. {
  5607. dp_tx_tso_desc_pool_free(soc, num_pool);
  5608. dp_tx_tso_num_seg_pool_free(soc, num_pool);
  5609. }
  5610. #ifndef WLAN_SOFTUMAC_SUPPORT
  5611. void dp_soc_tx_desc_sw_pools_free(struct dp_soc *soc)
  5612. {
  5613. uint8_t num_pool;
  5614. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5615. dp_tx_tso_cmn_desc_pool_free(soc, num_pool);
  5616. dp_tx_ext_desc_pool_free(soc, num_pool);
  5617. dp_tx_delete_static_pools(soc, num_pool);
  5618. }
  5619. void dp_soc_tx_desc_sw_pools_deinit(struct dp_soc *soc)
  5620. {
  5621. uint8_t num_pool;
  5622. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5623. dp_tx_flow_control_deinit(soc);
  5624. dp_tx_tso_cmn_desc_pool_deinit(soc, num_pool);
  5625. dp_tx_ext_desc_pool_deinit(soc, num_pool);
  5626. dp_tx_deinit_static_pools(soc, num_pool);
  5627. }
  5628. #else
  5629. void dp_soc_tx_desc_sw_pools_free(struct dp_soc *soc)
  5630. {
  5631. uint8_t num_pool;
  5632. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5633. dp_tx_delete_static_pools(soc, num_pool);
  5634. }
  5635. void dp_soc_tx_desc_sw_pools_deinit(struct dp_soc *soc)
  5636. {
  5637. uint8_t num_pool;
  5638. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5639. dp_tx_flow_control_deinit(soc);
  5640. dp_tx_deinit_static_pools(soc, num_pool);
  5641. }
  5642. #endif /*WLAN_SOFTUMAC_SUPPORT*/
  5643. /**
  5644. * dp_tx_tso_cmn_desc_pool_alloc() - TSO cmn desc pool allocator
  5645. * @soc: DP soc handle
  5646. * @num_pool: Number of pools
  5647. * @num_desc: Number of descriptors
  5648. *
  5649. * Reserve TSO descriptor buffers
  5650. *
  5651. * Return: QDF_STATUS_E_FAILURE on failure or
  5652. * QDF_STATUS_SUCCESS on success
  5653. */
  5654. static QDF_STATUS dp_tx_tso_cmn_desc_pool_alloc(struct dp_soc *soc,
  5655. uint8_t num_pool,
  5656. uint32_t num_desc)
  5657. {
  5658. if (dp_tx_tso_desc_pool_alloc(soc, num_pool, num_desc)) {
  5659. dp_err("TSO Desc Pool alloc %d failed %pK", num_pool, soc);
  5660. return QDF_STATUS_E_FAILURE;
  5661. }
  5662. if (dp_tx_tso_num_seg_pool_alloc(soc, num_pool, num_desc)) {
  5663. dp_err("TSO Num of seg Pool alloc %d failed %pK",
  5664. num_pool, soc);
  5665. return QDF_STATUS_E_FAILURE;
  5666. }
  5667. return QDF_STATUS_SUCCESS;
  5668. }
  5669. /**
  5670. * dp_tx_tso_cmn_desc_pool_init() - TSO cmn desc pool init
  5671. * @soc: DP soc handle
  5672. * @num_pool: Number of pools
  5673. * @num_desc: Number of descriptors
  5674. *
  5675. * Initialize TSO descriptor pools
  5676. *
  5677. * Return: QDF_STATUS_E_FAILURE on failure or
  5678. * QDF_STATUS_SUCCESS on success
  5679. */
  5680. static QDF_STATUS dp_tx_tso_cmn_desc_pool_init(struct dp_soc *soc,
  5681. uint8_t num_pool,
  5682. uint32_t num_desc)
  5683. {
  5684. if (dp_tx_tso_desc_pool_init(soc, num_pool, num_desc)) {
  5685. dp_err("TSO Desc Pool alloc %d failed %pK", num_pool, soc);
  5686. return QDF_STATUS_E_FAILURE;
  5687. }
  5688. if (dp_tx_tso_num_seg_pool_init(soc, num_pool, num_desc)) {
  5689. dp_err("TSO Num of seg Pool alloc %d failed %pK",
  5690. num_pool, soc);
  5691. return QDF_STATUS_E_FAILURE;
  5692. }
  5693. return QDF_STATUS_SUCCESS;
  5694. }
  5695. #ifndef WLAN_SOFTUMAC_SUPPORT
  5696. QDF_STATUS dp_soc_tx_desc_sw_pools_alloc(struct dp_soc *soc)
  5697. {
  5698. uint8_t num_pool;
  5699. uint32_t num_desc;
  5700. uint32_t num_ext_desc;
  5701. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5702. num_desc = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  5703. num_ext_desc = wlan_cfg_get_num_tx_ext_desc(soc->wlan_cfg_ctx);
  5704. dp_info("Tx Desc Alloc num_pool: %d descs: %d", num_pool, num_desc);
  5705. if ((num_pool > MAX_TXDESC_POOLS) ||
  5706. (num_desc > WLAN_CFG_NUM_TX_DESC_MAX))
  5707. goto fail1;
  5708. if (dp_tx_alloc_static_pools(soc, num_pool, num_desc))
  5709. goto fail1;
  5710. if (dp_tx_ext_desc_pool_alloc(soc, num_pool, num_ext_desc))
  5711. goto fail2;
  5712. if (wlan_cfg_is_tso_desc_attach_defer(soc->wlan_cfg_ctx))
  5713. return QDF_STATUS_SUCCESS;
  5714. if (dp_tx_tso_cmn_desc_pool_alloc(soc, num_pool, num_ext_desc))
  5715. goto fail3;
  5716. return QDF_STATUS_SUCCESS;
  5717. fail3:
  5718. dp_tx_ext_desc_pool_free(soc, num_pool);
  5719. fail2:
  5720. dp_tx_delete_static_pools(soc, num_pool);
  5721. fail1:
  5722. return QDF_STATUS_E_RESOURCES;
  5723. }
  5724. QDF_STATUS dp_soc_tx_desc_sw_pools_init(struct dp_soc *soc)
  5725. {
  5726. uint8_t num_pool;
  5727. uint32_t num_desc;
  5728. uint32_t num_ext_desc;
  5729. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5730. num_desc = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  5731. num_ext_desc = wlan_cfg_get_num_tx_ext_desc(soc->wlan_cfg_ctx);
  5732. if (dp_tx_init_static_pools(soc, num_pool, num_desc))
  5733. goto fail1;
  5734. if (dp_tx_ext_desc_pool_init(soc, num_pool, num_ext_desc))
  5735. goto fail2;
  5736. if (wlan_cfg_is_tso_desc_attach_defer(soc->wlan_cfg_ctx))
  5737. return QDF_STATUS_SUCCESS;
  5738. if (dp_tx_tso_cmn_desc_pool_init(soc, num_pool, num_ext_desc))
  5739. goto fail3;
  5740. dp_tx_flow_control_init(soc);
  5741. soc->process_tx_status = CONFIG_PROCESS_TX_STATUS;
  5742. return QDF_STATUS_SUCCESS;
  5743. fail3:
  5744. dp_tx_ext_desc_pool_deinit(soc, num_pool);
  5745. fail2:
  5746. dp_tx_deinit_static_pools(soc, num_pool);
  5747. fail1:
  5748. return QDF_STATUS_E_RESOURCES;
  5749. }
  5750. #else
  5751. QDF_STATUS dp_soc_tx_desc_sw_pools_alloc(struct dp_soc *soc)
  5752. {
  5753. uint8_t num_pool;
  5754. uint32_t num_desc;
  5755. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5756. num_desc = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  5757. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5758. "%s Tx Desc Alloc num_pool = %d, descs = %d",
  5759. __func__, num_pool, num_desc);
  5760. if ((num_pool > MAX_TXDESC_POOLS) ||
  5761. (num_desc > WLAN_CFG_NUM_TX_DESC_MAX))
  5762. return QDF_STATUS_E_RESOURCES;
  5763. if (dp_tx_alloc_static_pools(soc, num_pool, num_desc))
  5764. return QDF_STATUS_E_RESOURCES;
  5765. return QDF_STATUS_SUCCESS;
  5766. }
  5767. QDF_STATUS dp_soc_tx_desc_sw_pools_init(struct dp_soc *soc)
  5768. {
  5769. uint8_t num_pool;
  5770. uint32_t num_desc;
  5771. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5772. num_desc = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  5773. if (dp_tx_init_static_pools(soc, num_pool, num_desc))
  5774. return QDF_STATUS_E_RESOURCES;
  5775. dp_tx_flow_control_init(soc);
  5776. soc->process_tx_status = CONFIG_PROCESS_TX_STATUS;
  5777. return QDF_STATUS_SUCCESS;
  5778. }
  5779. #endif
  5780. QDF_STATUS dp_tso_soc_attach(struct cdp_soc_t *txrx_soc)
  5781. {
  5782. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  5783. uint8_t num_pool;
  5784. uint32_t num_ext_desc;
  5785. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5786. num_ext_desc = wlan_cfg_get_num_tx_ext_desc(soc->wlan_cfg_ctx);
  5787. if (dp_tx_tso_cmn_desc_pool_alloc(soc, num_pool, num_ext_desc))
  5788. return QDF_STATUS_E_FAILURE;
  5789. if (dp_tx_tso_cmn_desc_pool_init(soc, num_pool, num_ext_desc))
  5790. return QDF_STATUS_E_FAILURE;
  5791. return QDF_STATUS_SUCCESS;
  5792. }
  5793. QDF_STATUS dp_tso_soc_detach(struct cdp_soc_t *txrx_soc)
  5794. {
  5795. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  5796. uint8_t num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5797. dp_tx_tso_cmn_desc_pool_deinit(soc, num_pool);
  5798. dp_tx_tso_cmn_desc_pool_free(soc, num_pool);
  5799. return QDF_STATUS_SUCCESS;
  5800. }
  5801. #ifdef CONFIG_DP_PKT_ADD_TIMESTAMP
  5802. void dp_pkt_add_timestamp(struct dp_vdev *vdev,
  5803. enum qdf_pkt_timestamp_index index, uint64_t time,
  5804. qdf_nbuf_t nbuf)
  5805. {
  5806. if (qdf_unlikely(qdf_is_dp_pkt_timestamp_enabled())) {
  5807. uint64_t tsf_time;
  5808. if (vdev->get_tsf_time) {
  5809. vdev->get_tsf_time(vdev->osif_vdev, time, &tsf_time);
  5810. qdf_add_dp_pkt_timestamp(nbuf, index, tsf_time);
  5811. }
  5812. }
  5813. }
  5814. void dp_pkt_get_timestamp(uint64_t *time)
  5815. {
  5816. if (qdf_unlikely(qdf_is_dp_pkt_timestamp_enabled()))
  5817. *time = qdf_get_log_timestamp();
  5818. }
  5819. #endif
  5820. #ifdef QCA_MULTIPASS_SUPPORT
  5821. void dp_tx_add_groupkey_metadata(struct dp_vdev *vdev,
  5822. struct dp_tx_msdu_info_s *msdu_info,
  5823. uint16_t group_key)
  5824. {
  5825. struct htt_tx_msdu_desc_ext2_t *meta_data =
  5826. (struct htt_tx_msdu_desc_ext2_t *)&msdu_info->meta_data[0];
  5827. qdf_mem_zero(meta_data, sizeof(struct htt_tx_msdu_desc_ext2_t));
  5828. /*
  5829. * When attempting to send a multicast packet with multi-passphrase,
  5830. * host shall add HTT EXT meta data "struct htt_tx_msdu_desc_ext2_t"
  5831. * ref htt.h indicating the group_id field in "key_flags" also having
  5832. * "valid_key_flags" as 1. Assign “key_flags = group_key_ix”.
  5833. */
  5834. HTT_TX_MSDU_EXT2_DESC_FLAG_VALID_KEY_FLAGS_SET(msdu_info->meta_data[0],
  5835. 1);
  5836. HTT_TX_MSDU_EXT2_DESC_KEY_FLAGS_SET(msdu_info->meta_data[2], group_key);
  5837. }
  5838. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP) && \
  5839. defined(WLAN_MCAST_MLO)
  5840. /**
  5841. * dp_tx_need_mcast_reinject() - If frame needs to be processed in reinject path
  5842. * @vdev: DP vdev handle
  5843. *
  5844. * Return: true if reinject handling is required else false
  5845. */
  5846. static inline bool
  5847. dp_tx_need_mcast_reinject(struct dp_vdev *vdev)
  5848. {
  5849. if (vdev->mlo_vdev && vdev->opmode == wlan_op_mode_ap)
  5850. return true;
  5851. return false;
  5852. }
  5853. #else
  5854. static inline bool
  5855. dp_tx_need_mcast_reinject(struct dp_vdev *vdev)
  5856. {
  5857. return false;
  5858. }
  5859. #endif
  5860. /**
  5861. * dp_tx_need_multipass_process() - If frame needs multipass phrase processing
  5862. * @soc: dp soc handle
  5863. * @vdev: DP vdev handle
  5864. * @buf: frame
  5865. * @vlan_id: vlan id of frame
  5866. *
  5867. * Return: whether peer is special or classic
  5868. */
  5869. static
  5870. uint8_t dp_tx_need_multipass_process(struct dp_soc *soc, struct dp_vdev *vdev,
  5871. qdf_nbuf_t buf, uint16_t *vlan_id)
  5872. {
  5873. struct dp_txrx_peer *txrx_peer = NULL;
  5874. struct dp_peer *peer = NULL;
  5875. qdf_ether_header_t *eh = (qdf_ether_header_t *)qdf_nbuf_data(buf);
  5876. struct vlan_ethhdr *veh = NULL;
  5877. bool not_vlan = ((vdev->tx_encap_type == htt_cmn_pkt_type_raw) ||
  5878. (htons(eh->ether_type) != ETH_P_8021Q));
  5879. if (qdf_unlikely(not_vlan))
  5880. return DP_VLAN_UNTAGGED;
  5881. veh = (struct vlan_ethhdr *)eh;
  5882. *vlan_id = (ntohs(veh->h_vlan_TCI) & VLAN_VID_MASK);
  5883. if (qdf_unlikely(DP_FRAME_IS_MULTICAST((eh)->ether_dhost))) {
  5884. /* look for handling of multicast packets in reinject path */
  5885. if (dp_tx_need_mcast_reinject(vdev))
  5886. return DP_VLAN_UNTAGGED;
  5887. qdf_spin_lock_bh(&vdev->mpass_peer_mutex);
  5888. TAILQ_FOREACH(txrx_peer, &vdev->mpass_peer_list,
  5889. mpass_peer_list_elem) {
  5890. if (*vlan_id == txrx_peer->vlan_id) {
  5891. qdf_spin_unlock_bh(&vdev->mpass_peer_mutex);
  5892. return DP_VLAN_TAGGED_MULTICAST;
  5893. }
  5894. }
  5895. qdf_spin_unlock_bh(&vdev->mpass_peer_mutex);
  5896. return DP_VLAN_UNTAGGED;
  5897. }
  5898. peer = dp_peer_find_hash_find(soc, eh->ether_dhost, 0, DP_VDEV_ALL,
  5899. DP_MOD_ID_TX_MULTIPASS);
  5900. if (qdf_unlikely(!peer))
  5901. return DP_VLAN_UNTAGGED;
  5902. /*
  5903. * Do not drop the frame when vlan_id doesn't match.
  5904. * Send the frame as it is.
  5905. */
  5906. if (*vlan_id == peer->txrx_peer->vlan_id) {
  5907. dp_peer_unref_delete(peer, DP_MOD_ID_TX_MULTIPASS);
  5908. return DP_VLAN_TAGGED_UNICAST;
  5909. }
  5910. dp_peer_unref_delete(peer, DP_MOD_ID_TX_MULTIPASS);
  5911. return DP_VLAN_UNTAGGED;
  5912. }
  5913. #ifndef WLAN_REPEATER_NOT_SUPPORTED
  5914. static inline void
  5915. dp_tx_multipass_send_pkt_to_repeater(struct dp_soc *soc, struct dp_vdev *vdev,
  5916. qdf_nbuf_t nbuf,
  5917. struct dp_tx_msdu_info_s *msdu_info)
  5918. {
  5919. qdf_nbuf_t nbuf_copy = NULL;
  5920. /* AP can have classic clients, special clients &
  5921. * classic repeaters.
  5922. * 1. Classic clients & special client:
  5923. * Remove vlan header, find corresponding group key
  5924. * index, fill in metaheader and enqueue multicast
  5925. * frame to TCL.
  5926. * 2. Classic repeater:
  5927. * Pass through to classic repeater with vlan tag
  5928. * intact without any group key index. Hardware
  5929. * will know which key to use to send frame to
  5930. * repeater.
  5931. */
  5932. nbuf_copy = qdf_nbuf_copy(nbuf);
  5933. /*
  5934. * Send multicast frame to special peers even
  5935. * if pass through to classic repeater fails.
  5936. */
  5937. if (nbuf_copy) {
  5938. struct dp_tx_msdu_info_s msdu_info_copy;
  5939. qdf_mem_zero(&msdu_info_copy, sizeof(msdu_info_copy));
  5940. msdu_info_copy.tid = HTT_TX_EXT_TID_INVALID;
  5941. HTT_TX_MSDU_EXT2_DESC_FLAG_VALID_KEY_FLAGS_SET(msdu_info_copy.meta_data[0], 1);
  5942. nbuf_copy = dp_tx_send_msdu_single(vdev, nbuf_copy,
  5943. &msdu_info_copy,
  5944. HTT_INVALID_PEER, NULL);
  5945. if (nbuf_copy) {
  5946. qdf_nbuf_free(nbuf_copy);
  5947. dp_info_rl("nbuf_copy send failed");
  5948. }
  5949. }
  5950. }
  5951. #endif
  5952. bool dp_tx_multipass_process(struct dp_soc *soc, struct dp_vdev *vdev,
  5953. qdf_nbuf_t nbuf,
  5954. struct dp_tx_msdu_info_s *msdu_info)
  5955. {
  5956. uint16_t vlan_id = 0;
  5957. uint16_t group_key = 0;
  5958. uint8_t is_spcl_peer = DP_VLAN_UNTAGGED;
  5959. if (HTT_TX_MSDU_EXT2_DESC_FLAG_VALID_KEY_FLAGS_GET(msdu_info->meta_data[0]))
  5960. return true;
  5961. is_spcl_peer = dp_tx_need_multipass_process(soc, vdev, nbuf, &vlan_id);
  5962. if ((is_spcl_peer != DP_VLAN_TAGGED_MULTICAST) &&
  5963. (is_spcl_peer != DP_VLAN_TAGGED_UNICAST))
  5964. return true;
  5965. if (is_spcl_peer == DP_VLAN_TAGGED_UNICAST) {
  5966. dp_tx_remove_vlan_tag(vdev, nbuf);
  5967. return true;
  5968. }
  5969. dp_tx_multipass_send_pkt_to_repeater(soc, vdev, nbuf, msdu_info);
  5970. group_key = vdev->iv_vlan_map[vlan_id];
  5971. /*
  5972. * If group key is not installed, drop the frame.
  5973. */
  5974. if (!group_key)
  5975. return false;
  5976. dp_tx_remove_vlan_tag(vdev, nbuf);
  5977. dp_tx_add_groupkey_metadata(vdev, msdu_info, group_key);
  5978. msdu_info->exception_fw = 1;
  5979. return true;
  5980. }
  5981. #endif /* QCA_MULTIPASS_SUPPORT */