dp_rx.c 93 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include "hal_hw_headers.h"
  20. #include "dp_types.h"
  21. #include "dp_rx.h"
  22. #include "dp_tx.h"
  23. #include "dp_peer.h"
  24. #include "hal_rx.h"
  25. #include "hal_api.h"
  26. #include "qdf_nbuf.h"
  27. #ifdef MESH_MODE_SUPPORT
  28. #include "if_meta_hdr.h"
  29. #endif
  30. #include "dp_internal.h"
  31. #include "dp_ipa.h"
  32. #include "dp_hist.h"
  33. #include "dp_rx_buffer_pool.h"
  34. #ifdef WIFI_MONITOR_SUPPORT
  35. #include "dp_htt.h"
  36. #include <dp_mon.h>
  37. #endif
  38. #ifdef FEATURE_WDS
  39. #include "dp_txrx_wds.h"
  40. #endif
  41. #ifdef DP_RATETABLE_SUPPORT
  42. #include "dp_ratetable.h"
  43. #endif
  44. #include "enet.h"
  45. #ifndef WLAN_SOFTUMAC_SUPPORT /* WLAN_SOFTUMAC_SUPPORT */
  46. #ifdef DUP_RX_DESC_WAR
  47. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  48. hal_ring_handle_t hal_ring,
  49. hal_ring_desc_t ring_desc,
  50. struct dp_rx_desc *rx_desc)
  51. {
  52. void *hal_soc = soc->hal_soc;
  53. hal_srng_dump_ring_desc(hal_soc, hal_ring, ring_desc);
  54. dp_rx_desc_dump(rx_desc);
  55. }
  56. #else
  57. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  58. hal_ring_handle_t hal_ring_hdl,
  59. hal_ring_desc_t ring_desc,
  60. struct dp_rx_desc *rx_desc)
  61. {
  62. hal_soc_handle_t hal_soc = soc->hal_soc;
  63. dp_rx_desc_dump(rx_desc);
  64. hal_srng_dump_ring_desc(hal_soc, hal_ring_hdl, ring_desc);
  65. hal_srng_dump_ring(hal_soc, hal_ring_hdl);
  66. qdf_assert_always(0);
  67. }
  68. #endif
  69. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  70. #ifdef RX_DESC_SANITY_WAR
  71. QDF_STATUS dp_rx_desc_sanity(struct dp_soc *soc, hal_soc_handle_t hal_soc,
  72. hal_ring_handle_t hal_ring_hdl,
  73. hal_ring_desc_t ring_desc,
  74. struct dp_rx_desc *rx_desc)
  75. {
  76. uint8_t return_buffer_manager;
  77. if (qdf_unlikely(!rx_desc)) {
  78. /*
  79. * This is an unlikely case where the cookie obtained
  80. * from the ring_desc is invalid and hence we are not
  81. * able to find the corresponding rx_desc
  82. */
  83. goto fail;
  84. }
  85. return_buffer_manager = hal_rx_ret_buf_manager_get(hal_soc, ring_desc);
  86. if (qdf_unlikely(!(return_buffer_manager ==
  87. HAL_RX_BUF_RBM_SW1_BM(soc->wbm_sw0_bm_id) ||
  88. return_buffer_manager ==
  89. HAL_RX_BUF_RBM_SW3_BM(soc->wbm_sw0_bm_id)))) {
  90. goto fail;
  91. }
  92. return QDF_STATUS_SUCCESS;
  93. fail:
  94. DP_STATS_INC(soc, rx.err.invalid_cookie, 1);
  95. dp_err("Ring Desc:");
  96. hal_srng_dump_ring_desc(hal_soc, hal_ring_hdl,
  97. ring_desc);
  98. return QDF_STATUS_E_NULL_VALUE;
  99. }
  100. #endif
  101. uint32_t dp_rx_srng_get_num_pending(hal_soc_handle_t hal_soc,
  102. hal_ring_handle_t hal_ring_hdl,
  103. uint32_t num_entries,
  104. bool *near_full)
  105. {
  106. uint32_t num_pending = 0;
  107. num_pending = hal_srng_dst_num_valid_locked(hal_soc,
  108. hal_ring_hdl,
  109. true);
  110. if (num_entries && (num_pending >= num_entries >> 1))
  111. *near_full = true;
  112. else
  113. *near_full = false;
  114. return num_pending;
  115. }
  116. #ifdef RX_DESC_DEBUG_CHECK
  117. QDF_STATUS dp_rx_desc_nbuf_sanity_check(struct dp_soc *soc,
  118. hal_ring_desc_t ring_desc,
  119. struct dp_rx_desc *rx_desc)
  120. {
  121. struct hal_buf_info hbi;
  122. hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &hbi);
  123. /* Sanity check for possible buffer paddr corruption */
  124. if (dp_rx_desc_paddr_sanity_check(rx_desc, (&hbi)->paddr))
  125. return QDF_STATUS_SUCCESS;
  126. return QDF_STATUS_E_FAILURE;
  127. }
  128. /**
  129. * dp_rx_desc_nbuf_len_sanity_check - Add sanity check to catch Rx buffer
  130. * out of bound access from H.W
  131. *
  132. * @soc: DP soc
  133. * @pkt_len: Packet length received from H.W
  134. *
  135. * Return: NONE
  136. */
  137. static inline void
  138. dp_rx_desc_nbuf_len_sanity_check(struct dp_soc *soc,
  139. uint32_t pkt_len)
  140. {
  141. struct rx_desc_pool *rx_desc_pool;
  142. rx_desc_pool = &soc->rx_desc_buf[0];
  143. qdf_assert_always(pkt_len <= rx_desc_pool->buf_size);
  144. }
  145. #else
  146. static inline void
  147. dp_rx_desc_nbuf_len_sanity_check(struct dp_soc *soc, uint32_t pkt_len) { }
  148. #endif
  149. #ifdef WLAN_FEATURE_DP_RX_RING_HISTORY
  150. void
  151. dp_rx_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  152. hal_ring_desc_t ring_desc)
  153. {
  154. struct dp_buf_info_record *record;
  155. struct hal_buf_info hbi;
  156. uint32_t idx;
  157. if (qdf_unlikely(!soc->rx_ring_history[ring_num]))
  158. return;
  159. hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &hbi);
  160. /* buffer_addr_info is the first element of ring_desc */
  161. hal_rx_buf_cookie_rbm_get(soc->hal_soc, (uint32_t *)ring_desc,
  162. &hbi);
  163. idx = dp_history_get_next_index(&soc->rx_ring_history[ring_num]->index,
  164. DP_RX_HIST_MAX);
  165. /* No NULL check needed for record since its an array */
  166. record = &soc->rx_ring_history[ring_num]->entry[idx];
  167. record->timestamp = qdf_get_log_timestamp();
  168. record->hbi.paddr = hbi.paddr;
  169. record->hbi.sw_cookie = hbi.sw_cookie;
  170. record->hbi.rbm = hbi.rbm;
  171. }
  172. #endif
  173. #ifdef WLAN_FEATURE_MARK_FIRST_WAKEUP_PACKET
  174. void dp_rx_mark_first_packet_after_wow_wakeup(struct dp_pdev *pdev,
  175. uint8_t *rx_tlv,
  176. qdf_nbuf_t nbuf)
  177. {
  178. struct dp_soc *soc;
  179. if (!pdev->is_first_wakeup_packet)
  180. return;
  181. soc = pdev->soc;
  182. if (hal_get_first_wow_wakeup_packet(soc->hal_soc, rx_tlv)) {
  183. qdf_nbuf_mark_wakeup_frame(nbuf);
  184. dp_info("First packet after WOW Wakeup rcvd");
  185. }
  186. }
  187. #endif
  188. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  189. #endif /* WLAN_SOFTUMAC_SUPPORT */
  190. /**
  191. * dp_pdev_frag_alloc_and_map() - Allocate frag for desc buffer and map
  192. *
  193. * @dp_soc: struct dp_soc *
  194. * @nbuf_frag_info_t: nbuf frag info
  195. * @dp_pdev: struct dp_pdev *
  196. * @rx_desc_pool: Rx desc pool
  197. *
  198. * Return: QDF_STATUS
  199. */
  200. #ifdef DP_RX_MON_MEM_FRAG
  201. static inline QDF_STATUS
  202. dp_pdev_frag_alloc_and_map(struct dp_soc *dp_soc,
  203. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  204. struct dp_pdev *dp_pdev,
  205. struct rx_desc_pool *rx_desc_pool)
  206. {
  207. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  208. (nbuf_frag_info_t->virt_addr).vaddr =
  209. qdf_frag_alloc(NULL, rx_desc_pool->buf_size);
  210. if (!((nbuf_frag_info_t->virt_addr).vaddr)) {
  211. dp_err("Frag alloc failed");
  212. DP_STATS_INC(dp_pdev, replenish.frag_alloc_fail, 1);
  213. return QDF_STATUS_E_NOMEM;
  214. }
  215. ret = qdf_mem_map_page(dp_soc->osdev,
  216. (nbuf_frag_info_t->virt_addr).vaddr,
  217. QDF_DMA_FROM_DEVICE,
  218. rx_desc_pool->buf_size,
  219. &nbuf_frag_info_t->paddr);
  220. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  221. qdf_frag_free((nbuf_frag_info_t->virt_addr).vaddr);
  222. dp_err("Frag map failed");
  223. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  224. return QDF_STATUS_E_FAULT;
  225. }
  226. return QDF_STATUS_SUCCESS;
  227. }
  228. #else
  229. static inline QDF_STATUS
  230. dp_pdev_frag_alloc_and_map(struct dp_soc *dp_soc,
  231. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  232. struct dp_pdev *dp_pdev,
  233. struct rx_desc_pool *rx_desc_pool)
  234. {
  235. return QDF_STATUS_SUCCESS;
  236. }
  237. #endif /* DP_RX_MON_MEM_FRAG */
  238. #ifdef WLAN_FEATURE_DP_RX_RING_HISTORY
  239. /**
  240. * dp_rx_refill_ring_record_entry() - Record an entry into refill_ring history
  241. * @soc: Datapath soc structure
  242. * @ring_num: Refill ring number
  243. * @hal_ring_hdl:
  244. * @num_req: number of buffers requested for refill
  245. * @num_refill: number of buffers refilled
  246. *
  247. * Return: None
  248. */
  249. static inline void
  250. dp_rx_refill_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  251. hal_ring_handle_t hal_ring_hdl,
  252. uint32_t num_req, uint32_t num_refill)
  253. {
  254. struct dp_refill_info_record *record;
  255. uint32_t idx;
  256. uint32_t tp;
  257. uint32_t hp;
  258. if (qdf_unlikely(ring_num >= MAX_PDEV_CNT ||
  259. !soc->rx_refill_ring_history[ring_num]))
  260. return;
  261. idx = dp_history_get_next_index(&soc->rx_refill_ring_history[ring_num]->index,
  262. DP_RX_REFILL_HIST_MAX);
  263. /* No NULL check needed for record since its an array */
  264. record = &soc->rx_refill_ring_history[ring_num]->entry[idx];
  265. hal_get_sw_hptp(soc->hal_soc, hal_ring_hdl, &tp, &hp);
  266. record->timestamp = qdf_get_log_timestamp();
  267. record->num_req = num_req;
  268. record->num_refill = num_refill;
  269. record->hp = hp;
  270. record->tp = tp;
  271. }
  272. #else
  273. static inline void
  274. dp_rx_refill_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  275. hal_ring_handle_t hal_ring_hdl,
  276. uint32_t num_req, uint32_t num_refill)
  277. {
  278. }
  279. #endif
  280. /**
  281. * dp_pdev_nbuf_alloc_and_map_replenish() - Allocate nbuf for desc buffer and
  282. * map
  283. * @dp_soc: struct dp_soc *
  284. * @mac_id: Mac id
  285. * @num_entries_avail: num_entries_avail
  286. * @nbuf_frag_info_t: nbuf frag info
  287. * @dp_pdev: struct dp_pdev *
  288. * @rx_desc_pool: Rx desc pool
  289. *
  290. * Return: QDF_STATUS
  291. */
  292. static inline QDF_STATUS
  293. dp_pdev_nbuf_alloc_and_map_replenish(struct dp_soc *dp_soc,
  294. uint32_t mac_id,
  295. uint32_t num_entries_avail,
  296. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  297. struct dp_pdev *dp_pdev,
  298. struct rx_desc_pool *rx_desc_pool)
  299. {
  300. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  301. (nbuf_frag_info_t->virt_addr).nbuf =
  302. dp_rx_buffer_pool_nbuf_alloc(dp_soc,
  303. mac_id,
  304. rx_desc_pool,
  305. num_entries_avail);
  306. if (!((nbuf_frag_info_t->virt_addr).nbuf)) {
  307. dp_err("nbuf alloc failed");
  308. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  309. return QDF_STATUS_E_NOMEM;
  310. }
  311. ret = dp_rx_buffer_pool_nbuf_map(dp_soc, rx_desc_pool,
  312. nbuf_frag_info_t);
  313. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  314. dp_rx_buffer_pool_nbuf_free(dp_soc,
  315. (nbuf_frag_info_t->virt_addr).nbuf, mac_id);
  316. dp_err("nbuf map failed");
  317. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  318. return QDF_STATUS_E_FAULT;
  319. }
  320. nbuf_frag_info_t->paddr =
  321. qdf_nbuf_get_frag_paddr((nbuf_frag_info_t->virt_addr).nbuf, 0);
  322. dp_ipa_handle_rx_buf_smmu_mapping(dp_soc, (qdf_nbuf_t)(
  323. (nbuf_frag_info_t->virt_addr).nbuf),
  324. rx_desc_pool->buf_size,
  325. true, __func__, __LINE__);
  326. ret = dp_check_paddr(dp_soc, &((nbuf_frag_info_t->virt_addr).nbuf),
  327. &nbuf_frag_info_t->paddr,
  328. rx_desc_pool);
  329. if (ret == QDF_STATUS_E_FAILURE) {
  330. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  331. return QDF_STATUS_E_ADDRNOTAVAIL;
  332. }
  333. return QDF_STATUS_SUCCESS;
  334. }
  335. #if defined(QCA_DP_RX_NBUF_NO_MAP_UNMAP) && !defined(BUILD_X86)
  336. QDF_STATUS
  337. __dp_rx_buffers_no_map_lt_replenish(struct dp_soc *soc, uint32_t mac_id,
  338. struct dp_srng *dp_rxdma_srng,
  339. struct rx_desc_pool *rx_desc_pool)
  340. {
  341. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  342. uint32_t count;
  343. void *rxdma_ring_entry;
  344. union dp_rx_desc_list_elem_t *next = NULL;
  345. void *rxdma_srng;
  346. qdf_nbuf_t nbuf;
  347. qdf_dma_addr_t paddr;
  348. uint16_t num_entries_avail = 0;
  349. uint16_t num_alloc_desc = 0;
  350. union dp_rx_desc_list_elem_t *desc_list = NULL;
  351. union dp_rx_desc_list_elem_t *tail = NULL;
  352. int sync_hw_ptr = 0;
  353. rxdma_srng = dp_rxdma_srng->hal_srng;
  354. if (qdf_unlikely(!dp_pdev)) {
  355. dp_rx_err("%pK: pdev is null for mac_id = %d", soc, mac_id);
  356. return QDF_STATUS_E_FAILURE;
  357. }
  358. if (qdf_unlikely(!rxdma_srng)) {
  359. dp_rx_debug("%pK: rxdma srng not initialized", soc);
  360. return QDF_STATUS_E_FAILURE;
  361. }
  362. hal_srng_access_start(soc->hal_soc, rxdma_srng);
  363. num_entries_avail = hal_srng_src_num_avail(soc->hal_soc,
  364. rxdma_srng,
  365. sync_hw_ptr);
  366. dp_rx_debug("%pK: no of available entries in rxdma ring: %d",
  367. soc, num_entries_avail);
  368. if (qdf_unlikely(num_entries_avail <
  369. ((dp_rxdma_srng->num_entries * 3) / 4))) {
  370. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  371. return QDF_STATUS_E_FAILURE;
  372. }
  373. DP_STATS_INC(dp_pdev, replenish.low_thresh_intrs, 1);
  374. num_alloc_desc = dp_rx_get_free_desc_list(soc, mac_id,
  375. rx_desc_pool,
  376. num_entries_avail,
  377. &desc_list,
  378. &tail);
  379. if (!num_alloc_desc) {
  380. dp_rx_err("%pK: no free rx_descs in freelist", soc);
  381. DP_STATS_INC(dp_pdev, err.desc_lt_alloc_fail,
  382. num_entries_avail);
  383. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  384. return QDF_STATUS_E_NOMEM;
  385. }
  386. for (count = 0; count < num_alloc_desc; count++) {
  387. next = desc_list->next;
  388. qdf_prefetch(next);
  389. nbuf = dp_rx_nbuf_alloc(soc, rx_desc_pool);
  390. if (qdf_unlikely(!nbuf)) {
  391. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  392. break;
  393. }
  394. paddr = dp_rx_nbuf_sync_no_dsb(soc, nbuf,
  395. rx_desc_pool->buf_size);
  396. rxdma_ring_entry = hal_srng_src_get_next(soc->hal_soc,
  397. rxdma_srng);
  398. qdf_assert_always(rxdma_ring_entry);
  399. desc_list->rx_desc.nbuf = nbuf;
  400. dp_rx_set_reuse_nbuf(&desc_list->rx_desc, nbuf);
  401. desc_list->rx_desc.rx_buf_start = nbuf->data;
  402. desc_list->rx_desc.paddr_buf_start = paddr;
  403. desc_list->rx_desc.unmapped = 0;
  404. /* rx_desc.in_use should be zero at this time*/
  405. qdf_assert_always(desc_list->rx_desc.in_use == 0);
  406. desc_list->rx_desc.in_use = 1;
  407. desc_list->rx_desc.in_err_state = 0;
  408. hal_rxdma_buff_addr_info_set(soc->hal_soc, rxdma_ring_entry,
  409. paddr,
  410. desc_list->rx_desc.cookie,
  411. rx_desc_pool->owner);
  412. desc_list = next;
  413. }
  414. qdf_dsb();
  415. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  416. /* No need to count the number of bytes received during replenish.
  417. * Therefore set replenish.pkts.bytes as 0.
  418. */
  419. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  420. DP_STATS_INC(dp_pdev, buf_freelist, (num_alloc_desc - count));
  421. /*
  422. * add any available free desc back to the free list
  423. */
  424. if (desc_list)
  425. dp_rx_add_desc_list_to_free_list(soc, &desc_list, &tail,
  426. mac_id, rx_desc_pool);
  427. return QDF_STATUS_SUCCESS;
  428. }
  429. QDF_STATUS
  430. __dp_rx_buffers_no_map_replenish(struct dp_soc *soc, uint32_t mac_id,
  431. struct dp_srng *dp_rxdma_srng,
  432. struct rx_desc_pool *rx_desc_pool,
  433. uint32_t num_req_buffers,
  434. union dp_rx_desc_list_elem_t **desc_list,
  435. union dp_rx_desc_list_elem_t **tail)
  436. {
  437. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  438. uint32_t count;
  439. void *rxdma_ring_entry;
  440. union dp_rx_desc_list_elem_t *next;
  441. void *rxdma_srng;
  442. qdf_nbuf_t nbuf;
  443. qdf_nbuf_t nbuf_next;
  444. qdf_nbuf_t nbuf_head = NULL;
  445. qdf_nbuf_t nbuf_tail = NULL;
  446. qdf_dma_addr_t paddr;
  447. rxdma_srng = dp_rxdma_srng->hal_srng;
  448. if (qdf_unlikely(!dp_pdev)) {
  449. dp_rx_err("%pK: pdev is null for mac_id = %d",
  450. soc, mac_id);
  451. return QDF_STATUS_E_FAILURE;
  452. }
  453. if (qdf_unlikely(!rxdma_srng)) {
  454. dp_rx_debug("%pK: rxdma srng not initialized", soc);
  455. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  456. return QDF_STATUS_E_FAILURE;
  457. }
  458. /* Allocate required number of nbufs */
  459. for (count = 0; count < num_req_buffers; count++) {
  460. nbuf = dp_rx_nbuf_alloc(soc, rx_desc_pool);
  461. if (qdf_unlikely(!nbuf)) {
  462. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  463. /* Update num_req_buffers to nbufs allocated count */
  464. num_req_buffers = count;
  465. break;
  466. }
  467. paddr = dp_rx_nbuf_sync_no_dsb(soc, nbuf,
  468. rx_desc_pool->buf_size);
  469. QDF_NBUF_CB_PADDR(nbuf) = paddr;
  470. DP_RX_LIST_APPEND(nbuf_head,
  471. nbuf_tail,
  472. nbuf);
  473. }
  474. qdf_dsb();
  475. nbuf = nbuf_head;
  476. hal_srng_access_start(soc->hal_soc, rxdma_srng);
  477. for (count = 0; count < num_req_buffers; count++) {
  478. next = (*desc_list)->next;
  479. nbuf_next = nbuf->next;
  480. qdf_prefetch(next);
  481. rxdma_ring_entry = (struct dp_buffer_addr_info *)
  482. hal_srng_src_get_next(soc->hal_soc, rxdma_srng);
  483. if (!rxdma_ring_entry)
  484. break;
  485. (*desc_list)->rx_desc.nbuf = nbuf;
  486. dp_rx_set_reuse_nbuf(&(*desc_list)->rx_desc, nbuf);
  487. (*desc_list)->rx_desc.rx_buf_start = nbuf->data;
  488. (*desc_list)->rx_desc.paddr_buf_start = QDF_NBUF_CB_PADDR(nbuf);
  489. (*desc_list)->rx_desc.unmapped = 0;
  490. /* rx_desc.in_use should be zero at this time*/
  491. qdf_assert_always((*desc_list)->rx_desc.in_use == 0);
  492. (*desc_list)->rx_desc.in_use = 1;
  493. (*desc_list)->rx_desc.in_err_state = 0;
  494. hal_rxdma_buff_addr_info_set(soc->hal_soc, rxdma_ring_entry,
  495. QDF_NBUF_CB_PADDR(nbuf),
  496. (*desc_list)->rx_desc.cookie,
  497. rx_desc_pool->owner);
  498. *desc_list = next;
  499. nbuf = nbuf_next;
  500. }
  501. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  502. /* No need to count the number of bytes received during replenish.
  503. * Therefore set replenish.pkts.bytes as 0.
  504. */
  505. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  506. DP_STATS_INC(dp_pdev, buf_freelist, (num_req_buffers - count));
  507. /*
  508. * add any available free desc back to the free list
  509. */
  510. if (*desc_list)
  511. dp_rx_add_desc_list_to_free_list(soc, desc_list, tail,
  512. mac_id, rx_desc_pool);
  513. while (nbuf) {
  514. nbuf_next = nbuf->next;
  515. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, nbuf);
  516. qdf_nbuf_free(nbuf);
  517. nbuf = nbuf_next;
  518. }
  519. return QDF_STATUS_SUCCESS;
  520. }
  521. #ifdef WLAN_SUPPORT_PPEDS
  522. QDF_STATUS
  523. __dp_rx_comp2refill_replenish(struct dp_soc *soc, uint32_t mac_id,
  524. struct dp_srng *dp_rxdma_srng,
  525. struct rx_desc_pool *rx_desc_pool,
  526. uint32_t num_req_buffers,
  527. union dp_rx_desc_list_elem_t **desc_list,
  528. union dp_rx_desc_list_elem_t **tail)
  529. {
  530. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  531. uint32_t count;
  532. void *rxdma_ring_entry;
  533. union dp_rx_desc_list_elem_t *next;
  534. union dp_rx_desc_list_elem_t *cur;
  535. void *rxdma_srng;
  536. qdf_nbuf_t nbuf;
  537. rxdma_srng = dp_rxdma_srng->hal_srng;
  538. if (qdf_unlikely(!dp_pdev)) {
  539. dp_rx_err("%pK: pdev is null for mac_id = %d",
  540. soc, mac_id);
  541. return QDF_STATUS_E_FAILURE;
  542. }
  543. if (qdf_unlikely(!rxdma_srng)) {
  544. dp_rx_debug("%pK: rxdma srng not initialized", soc);
  545. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  546. return QDF_STATUS_E_FAILURE;
  547. }
  548. hal_srng_access_start(soc->hal_soc, rxdma_srng);
  549. for (count = 0; count < num_req_buffers; count++) {
  550. next = (*desc_list)->next;
  551. qdf_prefetch(next);
  552. rxdma_ring_entry = (struct dp_buffer_addr_info *)
  553. hal_srng_src_get_next(soc->hal_soc, rxdma_srng);
  554. if (!rxdma_ring_entry)
  555. break;
  556. (*desc_list)->rx_desc.in_use = 1;
  557. (*desc_list)->rx_desc.in_err_state = 0;
  558. (*desc_list)->rx_desc.nbuf = (*desc_list)->rx_desc.reuse_nbuf;
  559. hal_rxdma_buff_addr_info_set(soc->hal_soc, rxdma_ring_entry,
  560. (*desc_list)->rx_desc.paddr_buf_start,
  561. (*desc_list)->rx_desc.cookie,
  562. rx_desc_pool->owner);
  563. *desc_list = next;
  564. }
  565. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  566. /* No need to count the number of bytes received during replenish.
  567. * Therefore set replenish.pkts.bytes as 0.
  568. */
  569. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  570. DP_STATS_INC(dp_pdev, buf_freelist, (num_req_buffers - count));
  571. /*
  572. * add any available free desc back to the free list
  573. */
  574. cur = *desc_list;
  575. for ( ; count < num_req_buffers; count++) {
  576. next = cur->next;
  577. qdf_prefetch(next);
  578. nbuf = cur->rx_desc.reuse_nbuf;
  579. cur->rx_desc.nbuf = NULL;
  580. cur->rx_desc.in_use = 0;
  581. cur->rx_desc.has_reuse_nbuf = false;
  582. cur->rx_desc.reuse_nbuf = NULL;
  583. if (!nbuf->recycled_for_ds)
  584. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, nbuf);
  585. nbuf->recycled_for_ds = 0;
  586. nbuf->fast_recycled = 0;
  587. qdf_nbuf_free(nbuf);
  588. cur = next;
  589. }
  590. if (*desc_list)
  591. dp_rx_add_desc_list_to_free_list(soc, desc_list, tail,
  592. mac_id, rx_desc_pool);
  593. return QDF_STATUS_SUCCESS;
  594. }
  595. #endif
  596. QDF_STATUS __dp_pdev_rx_buffers_no_map_attach(struct dp_soc *soc,
  597. uint32_t mac_id,
  598. struct dp_srng *dp_rxdma_srng,
  599. struct rx_desc_pool *rx_desc_pool,
  600. uint32_t num_req_buffers)
  601. {
  602. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  603. uint32_t count;
  604. uint32_t nr_descs = 0;
  605. void *rxdma_ring_entry;
  606. union dp_rx_desc_list_elem_t *next;
  607. void *rxdma_srng;
  608. qdf_nbuf_t nbuf;
  609. qdf_dma_addr_t paddr;
  610. union dp_rx_desc_list_elem_t *desc_list = NULL;
  611. union dp_rx_desc_list_elem_t *tail = NULL;
  612. rxdma_srng = dp_rxdma_srng->hal_srng;
  613. if (qdf_unlikely(!dp_pdev)) {
  614. dp_rx_err("%pK: pdev is null for mac_id = %d",
  615. soc, mac_id);
  616. return QDF_STATUS_E_FAILURE;
  617. }
  618. if (qdf_unlikely(!rxdma_srng)) {
  619. dp_rx_debug("%pK: rxdma srng not initialized", soc);
  620. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  621. return QDF_STATUS_E_FAILURE;
  622. }
  623. dp_rx_debug("%pK: requested %d buffers for replenish",
  624. soc, num_req_buffers);
  625. nr_descs = dp_rx_get_free_desc_list(soc, mac_id, rx_desc_pool,
  626. num_req_buffers, &desc_list, &tail);
  627. if (!nr_descs) {
  628. dp_err("no free rx_descs in freelist");
  629. DP_STATS_INC(dp_pdev, err.desc_alloc_fail, num_req_buffers);
  630. return QDF_STATUS_E_NOMEM;
  631. }
  632. dp_debug("got %u RX descs for driver attach", nr_descs);
  633. hal_srng_access_start(soc->hal_soc, rxdma_srng);
  634. for (count = 0; count < nr_descs; count++) {
  635. next = desc_list->next;
  636. qdf_prefetch(next);
  637. nbuf = dp_rx_nbuf_alloc(soc, rx_desc_pool);
  638. if (qdf_unlikely(!nbuf)) {
  639. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  640. break;
  641. }
  642. paddr = dp_rx_nbuf_sync_no_dsb(soc, nbuf,
  643. rx_desc_pool->buf_size);
  644. rxdma_ring_entry = (struct dp_buffer_addr_info *)
  645. hal_srng_src_get_next(soc->hal_soc, rxdma_srng);
  646. if (!rxdma_ring_entry)
  647. break;
  648. qdf_assert_always(rxdma_ring_entry);
  649. desc_list->rx_desc.nbuf = nbuf;
  650. dp_rx_set_reuse_nbuf(&desc_list->rx_desc, nbuf);
  651. desc_list->rx_desc.rx_buf_start = nbuf->data;
  652. desc_list->rx_desc.paddr_buf_start = paddr;
  653. desc_list->rx_desc.unmapped = 0;
  654. /* rx_desc.in_use should be zero at this time*/
  655. qdf_assert_always(desc_list->rx_desc.in_use == 0);
  656. desc_list->rx_desc.in_use = 1;
  657. desc_list->rx_desc.in_err_state = 0;
  658. hal_rxdma_buff_addr_info_set(soc->hal_soc, rxdma_ring_entry,
  659. paddr,
  660. desc_list->rx_desc.cookie,
  661. rx_desc_pool->owner);
  662. desc_list = next;
  663. }
  664. qdf_dsb();
  665. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  666. /* No need to count the number of bytes received during replenish.
  667. * Therefore set replenish.pkts.bytes as 0.
  668. */
  669. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  670. return QDF_STATUS_SUCCESS;
  671. }
  672. #endif
  673. #ifdef DP_UMAC_HW_RESET_SUPPORT
  674. #if defined(QCA_DP_RX_NBUF_NO_MAP_UNMAP) && !defined(BUILD_X86)
  675. static inline
  676. qdf_dma_addr_t dp_rx_rep_retrieve_paddr(struct dp_soc *dp_soc, qdf_nbuf_t nbuf,
  677. uint32_t buf_size)
  678. {
  679. return dp_rx_nbuf_sync_no_dsb(dp_soc, nbuf, buf_size);
  680. }
  681. #else
  682. static inline
  683. qdf_dma_addr_t dp_rx_rep_retrieve_paddr(struct dp_soc *dp_soc, qdf_nbuf_t nbuf,
  684. uint32_t buf_size)
  685. {
  686. return qdf_nbuf_get_frag_paddr(nbuf, 0);
  687. }
  688. #endif
  689. /**
  690. * dp_rx_desc_replenish() - Replenish the rx descriptors one at a time
  691. * @soc: core txrx main context
  692. * @dp_rxdma_srng: rxdma ring
  693. * @rx_desc_pool: rx descriptor pool
  694. * @rx_desc:rx descriptor
  695. *
  696. * Return: void
  697. */
  698. static inline
  699. void dp_rx_desc_replenish(struct dp_soc *soc, struct dp_srng *dp_rxdma_srng,
  700. struct rx_desc_pool *rx_desc_pool,
  701. struct dp_rx_desc *rx_desc)
  702. {
  703. void *rxdma_srng;
  704. void *rxdma_ring_entry;
  705. qdf_dma_addr_t paddr;
  706. rxdma_srng = dp_rxdma_srng->hal_srng;
  707. /* No one else should be accessing the srng at this point */
  708. hal_srng_access_start_unlocked(soc->hal_soc, rxdma_srng);
  709. rxdma_ring_entry = hal_srng_src_get_next(soc->hal_soc, rxdma_srng);
  710. qdf_assert_always(rxdma_ring_entry);
  711. rx_desc->in_err_state = 0;
  712. paddr = dp_rx_rep_retrieve_paddr(soc, rx_desc->nbuf,
  713. rx_desc_pool->buf_size);
  714. hal_rxdma_buff_addr_info_set(soc->hal_soc, rxdma_ring_entry, paddr,
  715. rx_desc->cookie, rx_desc_pool->owner);
  716. hal_srng_access_end_unlocked(soc->hal_soc, rxdma_srng);
  717. }
  718. void dp_rx_desc_reuse(struct dp_soc *soc, qdf_nbuf_t *nbuf_list)
  719. {
  720. int mac_id, i, j;
  721. union dp_rx_desc_list_elem_t *head = NULL;
  722. union dp_rx_desc_list_elem_t *tail = NULL;
  723. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  724. struct dp_srng *dp_rxdma_srng =
  725. &soc->rx_refill_buf_ring[mac_id];
  726. struct rx_desc_pool *rx_desc_pool = &soc->rx_desc_buf[mac_id];
  727. uint32_t rx_sw_desc_num = rx_desc_pool->pool_size;
  728. /* Only fill up 1/3 of the ring size */
  729. uint32_t num_req_decs;
  730. if (!dp_rxdma_srng || !dp_rxdma_srng->hal_srng ||
  731. !rx_desc_pool->array)
  732. continue;
  733. num_req_decs = dp_rxdma_srng->num_entries / 3;
  734. for (i = 0, j = 0; i < rx_sw_desc_num; i++) {
  735. struct dp_rx_desc *rx_desc =
  736. (struct dp_rx_desc *)&rx_desc_pool->array[i];
  737. if (rx_desc->in_use) {
  738. if (j < (dp_rxdma_srng->num_entries - 1)) {
  739. dp_rx_desc_replenish(soc, dp_rxdma_srng,
  740. rx_desc_pool,
  741. rx_desc);
  742. } else {
  743. dp_rx_nbuf_unmap(soc, rx_desc, 0);
  744. rx_desc->unmapped = 0;
  745. rx_desc->nbuf->next = *nbuf_list;
  746. *nbuf_list = rx_desc->nbuf;
  747. dp_rx_add_to_free_desc_list(&head,
  748. &tail,
  749. rx_desc);
  750. }
  751. j++;
  752. }
  753. }
  754. if (head)
  755. dp_rx_add_desc_list_to_free_list(soc, &head, &tail,
  756. mac_id, rx_desc_pool);
  757. /* If num of descs in use were less, then we need to replenish
  758. * the ring with some buffers
  759. */
  760. head = NULL;
  761. tail = NULL;
  762. if (j < (num_req_decs - 1))
  763. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  764. rx_desc_pool,
  765. ((num_req_decs - 1) - j),
  766. &head, &tail, true);
  767. }
  768. }
  769. #endif
  770. QDF_STATUS __dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  771. struct dp_srng *dp_rxdma_srng,
  772. struct rx_desc_pool *rx_desc_pool,
  773. uint32_t num_req_buffers,
  774. union dp_rx_desc_list_elem_t **desc_list,
  775. union dp_rx_desc_list_elem_t **tail,
  776. bool req_only, const char *func_name)
  777. {
  778. uint32_t num_alloc_desc;
  779. uint16_t num_desc_to_free = 0;
  780. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  781. uint32_t num_entries_avail;
  782. uint32_t count;
  783. uint32_t extra_buffers;
  784. int sync_hw_ptr = 1;
  785. struct dp_rx_nbuf_frag_info nbuf_frag_info = {0};
  786. void *rxdma_ring_entry;
  787. union dp_rx_desc_list_elem_t *next;
  788. QDF_STATUS ret;
  789. void *rxdma_srng;
  790. union dp_rx_desc_list_elem_t *desc_list_append = NULL;
  791. union dp_rx_desc_list_elem_t *tail_append = NULL;
  792. union dp_rx_desc_list_elem_t *temp_list = NULL;
  793. rxdma_srng = dp_rxdma_srng->hal_srng;
  794. if (qdf_unlikely(!dp_pdev)) {
  795. dp_rx_err("%pK: pdev is null for mac_id = %d",
  796. dp_soc, mac_id);
  797. return QDF_STATUS_E_FAILURE;
  798. }
  799. if (qdf_unlikely(!rxdma_srng)) {
  800. dp_rx_debug("%pK: rxdma srng not initialized", dp_soc);
  801. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  802. return QDF_STATUS_E_FAILURE;
  803. }
  804. dp_verbose_debug("%pK: requested %d buffers for replenish",
  805. dp_soc, num_req_buffers);
  806. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  807. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  808. rxdma_srng,
  809. sync_hw_ptr);
  810. dp_verbose_debug("%pK: no of available entries in rxdma ring: %d",
  811. dp_soc, num_entries_avail);
  812. if (!req_only && !(*desc_list) && (num_entries_avail >
  813. ((dp_rxdma_srng->num_entries * 3) / 4))) {
  814. num_req_buffers = num_entries_avail;
  815. DP_STATS_INC(dp_pdev, replenish.low_thresh_intrs, 1);
  816. } else if (num_entries_avail < num_req_buffers) {
  817. num_desc_to_free = num_req_buffers - num_entries_avail;
  818. num_req_buffers = num_entries_avail;
  819. } else if ((*desc_list) &&
  820. dp_rxdma_srng->num_entries - num_entries_avail <
  821. CRITICAL_BUFFER_THRESHOLD) {
  822. /* set extra buffers to CRITICAL_BUFFER_THRESHOLD only if
  823. * total buff requested after adding extra buffers is less
  824. * than or equal to num entries available, else set it to max
  825. * possible additional buffers available at that moment
  826. */
  827. extra_buffers =
  828. ((num_req_buffers + CRITICAL_BUFFER_THRESHOLD) > num_entries_avail) ?
  829. (num_entries_avail - num_req_buffers) :
  830. CRITICAL_BUFFER_THRESHOLD;
  831. /* Append some free descriptors to tail */
  832. num_alloc_desc =
  833. dp_rx_get_free_desc_list(dp_soc, mac_id,
  834. rx_desc_pool,
  835. extra_buffers,
  836. &desc_list_append,
  837. &tail_append);
  838. if (num_alloc_desc) {
  839. temp_list = *desc_list;
  840. *desc_list = desc_list_append;
  841. tail_append->next = temp_list;
  842. num_req_buffers += num_alloc_desc;
  843. DP_STATS_DEC(dp_pdev,
  844. replenish.free_list,
  845. num_alloc_desc);
  846. } else
  847. dp_err_rl("%pK: no free rx_descs in freelist", dp_soc);
  848. }
  849. if (qdf_unlikely(!num_req_buffers)) {
  850. num_desc_to_free = num_req_buffers;
  851. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  852. goto free_descs;
  853. }
  854. /*
  855. * if desc_list is NULL, allocate the descs from freelist
  856. */
  857. if (!(*desc_list)) {
  858. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  859. rx_desc_pool,
  860. num_req_buffers,
  861. desc_list,
  862. tail);
  863. if (!num_alloc_desc) {
  864. dp_rx_err("%pK: no free rx_descs in freelist", dp_soc);
  865. DP_STATS_INC(dp_pdev, err.desc_alloc_fail,
  866. num_req_buffers);
  867. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  868. return QDF_STATUS_E_NOMEM;
  869. }
  870. dp_verbose_debug("%pK: %d rx desc allocated", dp_soc,
  871. num_alloc_desc);
  872. num_req_buffers = num_alloc_desc;
  873. }
  874. count = 0;
  875. while (count < num_req_buffers) {
  876. /* Flag is set while pdev rx_desc_pool initialization */
  877. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  878. ret = dp_pdev_frag_alloc_and_map(dp_soc,
  879. &nbuf_frag_info,
  880. dp_pdev,
  881. rx_desc_pool);
  882. else
  883. ret = dp_pdev_nbuf_alloc_and_map_replenish(dp_soc,
  884. mac_id,
  885. num_entries_avail, &nbuf_frag_info,
  886. dp_pdev, rx_desc_pool);
  887. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  888. if (qdf_unlikely(ret == QDF_STATUS_E_FAULT))
  889. continue;
  890. break;
  891. }
  892. count++;
  893. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  894. rxdma_srng);
  895. qdf_assert_always(rxdma_ring_entry);
  896. next = (*desc_list)->next;
  897. /* Flag is set while pdev rx_desc_pool initialization */
  898. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  899. dp_rx_desc_frag_prep(&((*desc_list)->rx_desc),
  900. &nbuf_frag_info);
  901. else
  902. dp_rx_desc_prep(&((*desc_list)->rx_desc),
  903. &nbuf_frag_info);
  904. /* rx_desc.in_use should be zero at this time*/
  905. qdf_assert_always((*desc_list)->rx_desc.in_use == 0);
  906. (*desc_list)->rx_desc.in_use = 1;
  907. (*desc_list)->rx_desc.in_err_state = 0;
  908. dp_rx_desc_update_dbg_info(&(*desc_list)->rx_desc,
  909. func_name, RX_DESC_REPLENISHED);
  910. dp_verbose_debug("rx_netbuf=%pK, paddr=0x%llx, cookie=%d",
  911. nbuf_frag_info.virt_addr.nbuf,
  912. (unsigned long long)(nbuf_frag_info.paddr),
  913. (*desc_list)->rx_desc.cookie);
  914. hal_rxdma_buff_addr_info_set(dp_soc->hal_soc, rxdma_ring_entry,
  915. nbuf_frag_info.paddr,
  916. (*desc_list)->rx_desc.cookie,
  917. rx_desc_pool->owner);
  918. *desc_list = next;
  919. }
  920. dp_rx_refill_ring_record_entry(dp_soc, dp_pdev->lmac_id, rxdma_srng,
  921. num_req_buffers, count);
  922. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  923. dp_rx_schedule_refill_thread(dp_soc);
  924. dp_verbose_debug("replenished buffers %d, rx desc added back to free list %u",
  925. count, num_desc_to_free);
  926. /* No need to count the number of bytes received during replenish.
  927. * Therefore set replenish.pkts.bytes as 0.
  928. */
  929. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  930. DP_STATS_INC(dp_pdev, replenish.free_list, num_req_buffers - count);
  931. free_descs:
  932. DP_STATS_INC(dp_pdev, buf_freelist, num_desc_to_free);
  933. /*
  934. * add any available free desc back to the free list
  935. */
  936. if (*desc_list)
  937. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  938. mac_id, rx_desc_pool);
  939. return QDF_STATUS_SUCCESS;
  940. }
  941. qdf_export_symbol(__dp_rx_buffers_replenish);
  942. void
  943. dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  944. struct dp_txrx_peer *txrx_peer, uint8_t link_id)
  945. {
  946. qdf_nbuf_t deliver_list_head = NULL;
  947. qdf_nbuf_t deliver_list_tail = NULL;
  948. qdf_nbuf_t nbuf;
  949. nbuf = nbuf_list;
  950. while (nbuf) {
  951. qdf_nbuf_t next = qdf_nbuf_next(nbuf);
  952. DP_RX_LIST_APPEND(deliver_list_head, deliver_list_tail, nbuf);
  953. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  954. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.raw, 1,
  955. qdf_nbuf_len(nbuf), link_id);
  956. /*
  957. * reset the chfrag_start and chfrag_end bits in nbuf cb
  958. * as this is a non-amsdu pkt and RAW mode simulation expects
  959. * these bit s to be 0 for non-amsdu pkt.
  960. */
  961. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  962. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  963. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  964. qdf_nbuf_set_rx_chfrag_end(nbuf, 0);
  965. }
  966. nbuf = next;
  967. }
  968. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &deliver_list_head,
  969. &deliver_list_tail);
  970. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  971. }
  972. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  973. #ifndef FEATURE_WDS
  974. void dp_rx_da_learn(struct dp_soc *soc, uint8_t *rx_tlv_hdr,
  975. struct dp_txrx_peer *ta_peer, qdf_nbuf_t nbuf)
  976. {
  977. }
  978. #endif
  979. #ifdef QCA_SUPPORT_TX_MIN_RATES_FOR_SPECIAL_FRAMES
  980. /**
  981. * dp_classify_critical_pkts() - API for marking critical packets
  982. * @soc: dp_soc context
  983. * @vdev: vdev on which packet is to be sent
  984. * @nbuf: nbuf that has to be classified
  985. *
  986. * The function parses the packet, identifies whether its a critical frame and
  987. * marks QDF_NBUF_CB_TX_EXTRA_IS_CRITICAL bit in qdf_nbuf_cb for the nbuf.
  988. * Code for marking which frames are CRITICAL is accessed via callback.
  989. * EAPOL, ARP, DHCP, DHCPv6, ICMPv6 NS/NA are the typical critical frames.
  990. *
  991. * Return: None
  992. */
  993. static
  994. void dp_classify_critical_pkts(struct dp_soc *soc, struct dp_vdev *vdev,
  995. qdf_nbuf_t nbuf)
  996. {
  997. if (vdev->tx_classify_critical_pkt_cb)
  998. vdev->tx_classify_critical_pkt_cb(vdev->osif_vdev, nbuf);
  999. }
  1000. #else
  1001. static inline
  1002. void dp_classify_critical_pkts(struct dp_soc *soc, struct dp_vdev *vdev,
  1003. qdf_nbuf_t nbuf)
  1004. {
  1005. }
  1006. #endif
  1007. #ifdef QCA_OL_TX_MULTIQ_SUPPORT
  1008. static inline
  1009. void dp_rx_nbuf_queue_mapping_set(qdf_nbuf_t nbuf, uint8_t ring_id)
  1010. {
  1011. qdf_nbuf_set_queue_mapping(nbuf, ring_id);
  1012. }
  1013. #else
  1014. static inline
  1015. void dp_rx_nbuf_queue_mapping_set(qdf_nbuf_t nbuf, uint8_t ring_id)
  1016. {
  1017. }
  1018. #endif
  1019. bool dp_rx_intrabss_mcbc_fwd(struct dp_soc *soc, struct dp_txrx_peer *ta_peer,
  1020. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  1021. struct cdp_tid_rx_stats *tid_stats,
  1022. uint8_t link_id)
  1023. {
  1024. uint16_t len;
  1025. qdf_nbuf_t nbuf_copy;
  1026. if (dp_rx_intrabss_eapol_drop_check(soc, ta_peer, rx_tlv_hdr,
  1027. nbuf))
  1028. return true;
  1029. if (!dp_rx_check_ndi_mdns_fwding(ta_peer, nbuf, link_id))
  1030. return false;
  1031. /* If the source peer in the isolation list
  1032. * then dont forward instead push to bridge stack
  1033. */
  1034. if (dp_get_peer_isolation(ta_peer))
  1035. return false;
  1036. nbuf_copy = qdf_nbuf_copy(nbuf);
  1037. if (!nbuf_copy)
  1038. return false;
  1039. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1040. qdf_mem_set(nbuf_copy->cb, 0x0, sizeof(nbuf_copy->cb));
  1041. dp_classify_critical_pkts(soc, ta_peer->vdev, nbuf_copy);
  1042. if (soc->arch_ops.dp_rx_intrabss_mcast_handler(soc, ta_peer,
  1043. nbuf_copy,
  1044. tid_stats,
  1045. link_id))
  1046. return false;
  1047. /* Don't send packets if tx is paused */
  1048. if (!soc->is_tx_pause &&
  1049. !dp_tx_send((struct cdp_soc_t *)soc,
  1050. ta_peer->vdev->vdev_id, nbuf_copy)) {
  1051. DP_PEER_PER_PKT_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1,
  1052. len, link_id);
  1053. tid_stats->intrabss_cnt++;
  1054. } else {
  1055. DP_PEER_PER_PKT_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1,
  1056. len, link_id);
  1057. tid_stats->fail_cnt[INTRABSS_DROP]++;
  1058. dp_rx_nbuf_free(nbuf_copy);
  1059. }
  1060. return false;
  1061. }
  1062. bool dp_rx_intrabss_ucast_fwd(struct dp_soc *soc, struct dp_txrx_peer *ta_peer,
  1063. uint8_t tx_vdev_id,
  1064. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  1065. struct cdp_tid_rx_stats *tid_stats,
  1066. uint8_t link_id)
  1067. {
  1068. uint16_t len;
  1069. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1070. /* linearize the nbuf just before we send to
  1071. * dp_tx_send()
  1072. */
  1073. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  1074. if (qdf_nbuf_linearize(nbuf) == -ENOMEM)
  1075. return false;
  1076. nbuf = qdf_nbuf_unshare(nbuf);
  1077. if (!nbuf) {
  1078. DP_PEER_PER_PKT_STATS_INC_PKT(ta_peer,
  1079. rx.intra_bss.fail,
  1080. 1, len, link_id);
  1081. /* return true even though the pkt is
  1082. * not forwarded. Basically skb_unshare
  1083. * failed and we want to continue with
  1084. * next nbuf.
  1085. */
  1086. tid_stats->fail_cnt[INTRABSS_DROP]++;
  1087. return false;
  1088. }
  1089. }
  1090. qdf_mem_set(nbuf->cb, 0x0, sizeof(nbuf->cb));
  1091. dp_classify_critical_pkts(soc, ta_peer->vdev, nbuf);
  1092. /* Don't send packets if tx is paused */
  1093. if (!soc->is_tx_pause && !dp_tx_send((struct cdp_soc_t *)soc,
  1094. tx_vdev_id, nbuf)) {
  1095. DP_PEER_PER_PKT_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1,
  1096. len, link_id);
  1097. } else {
  1098. DP_PEER_PER_PKT_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1,
  1099. len, link_id);
  1100. tid_stats->fail_cnt[INTRABSS_DROP]++;
  1101. return false;
  1102. }
  1103. return true;
  1104. }
  1105. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1106. #ifdef MESH_MODE_SUPPORT
  1107. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1108. uint8_t *rx_tlv_hdr,
  1109. struct dp_txrx_peer *txrx_peer)
  1110. {
  1111. struct mesh_recv_hdr_s *rx_info = NULL;
  1112. uint32_t pkt_type;
  1113. uint32_t nss;
  1114. uint32_t rate_mcs;
  1115. uint32_t bw;
  1116. uint8_t primary_chan_num;
  1117. uint32_t center_chan_freq;
  1118. struct dp_soc *soc = vdev->pdev->soc;
  1119. struct dp_peer *peer;
  1120. struct dp_peer *primary_link_peer;
  1121. struct dp_soc *link_peer_soc;
  1122. cdp_peer_stats_param_t buf = {0};
  1123. /* fill recv mesh stats */
  1124. rx_info = qdf_mem_malloc(sizeof(struct mesh_recv_hdr_s));
  1125. /* upper layers are responsible to free this memory */
  1126. if (!rx_info) {
  1127. dp_rx_err("%pK: Memory allocation failed for mesh rx stats",
  1128. vdev->pdev->soc);
  1129. DP_STATS_INC(vdev->pdev, mesh_mem_alloc, 1);
  1130. return;
  1131. }
  1132. rx_info->rs_flags = MESH_RXHDR_VER1;
  1133. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  1134. rx_info->rs_flags |= MESH_RX_FIRST_MSDU;
  1135. if (qdf_nbuf_is_rx_chfrag_end(nbuf))
  1136. rx_info->rs_flags |= MESH_RX_LAST_MSDU;
  1137. peer = dp_peer_get_ref_by_id(soc, txrx_peer->peer_id, DP_MOD_ID_MESH);
  1138. if (peer) {
  1139. if (hal_rx_tlv_get_is_decrypted(soc->hal_soc, rx_tlv_hdr)) {
  1140. rx_info->rs_flags |= MESH_RX_DECRYPTED;
  1141. rx_info->rs_keyix = hal_rx_msdu_get_keyid(soc->hal_soc,
  1142. rx_tlv_hdr);
  1143. if (vdev->osif_get_key)
  1144. vdev->osif_get_key(vdev->osif_vdev,
  1145. &rx_info->rs_decryptkey[0],
  1146. &peer->mac_addr.raw[0],
  1147. rx_info->rs_keyix);
  1148. }
  1149. dp_peer_unref_delete(peer, DP_MOD_ID_MESH);
  1150. }
  1151. primary_link_peer = dp_get_primary_link_peer_by_id(soc,
  1152. txrx_peer->peer_id,
  1153. DP_MOD_ID_MESH);
  1154. if (qdf_likely(primary_link_peer)) {
  1155. link_peer_soc = primary_link_peer->vdev->pdev->soc;
  1156. dp_monitor_peer_get_stats_param(link_peer_soc,
  1157. primary_link_peer,
  1158. cdp_peer_rx_snr, &buf);
  1159. rx_info->rs_snr = buf.rx_snr;
  1160. dp_peer_unref_delete(primary_link_peer, DP_MOD_ID_MESH);
  1161. }
  1162. rx_info->rs_rssi = rx_info->rs_snr + DP_DEFAULT_NOISEFLOOR;
  1163. soc = vdev->pdev->soc;
  1164. primary_chan_num = hal_rx_tlv_get_freq(soc->hal_soc, rx_tlv_hdr);
  1165. center_chan_freq = hal_rx_tlv_get_freq(soc->hal_soc, rx_tlv_hdr) >> 16;
  1166. if (soc->cdp_soc.ol_ops && soc->cdp_soc.ol_ops->freq_to_band) {
  1167. rx_info->rs_band = soc->cdp_soc.ol_ops->freq_to_band(
  1168. soc->ctrl_psoc,
  1169. vdev->pdev->pdev_id,
  1170. center_chan_freq);
  1171. }
  1172. rx_info->rs_channel = primary_chan_num;
  1173. pkt_type = hal_rx_tlv_get_pkt_type(soc->hal_soc, rx_tlv_hdr);
  1174. rate_mcs = hal_rx_tlv_rate_mcs_get(soc->hal_soc, rx_tlv_hdr);
  1175. bw = hal_rx_tlv_bw_get(soc->hal_soc, rx_tlv_hdr);
  1176. nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
  1177. /*
  1178. * The MCS index does not start with 0 when NSS>1 in HT mode.
  1179. * MCS params for optional 20/40MHz, NSS=1~3, EQM(NSS>1):
  1180. * ------------------------------------------------------
  1181. * NSS | 1 | 2 | 3 | 4
  1182. * ------------------------------------------------------
  1183. * MCS index: HT20 | 0 ~ 7 | 8 ~ 15 | 16 ~ 23 | 24 ~ 31
  1184. * ------------------------------------------------------
  1185. * MCS index: HT40 | 0 ~ 7 | 8 ~ 15 | 16 ~ 23 | 24 ~ 31
  1186. * ------------------------------------------------------
  1187. * Currently, the MAX_NSS=2. If NSS>2, MCS index = 8 * (NSS-1)
  1188. */
  1189. if ((pkt_type == DOT11_N) && (nss == 2))
  1190. rate_mcs += 8;
  1191. rx_info->rs_ratephy1 = rate_mcs | (nss << 0x8) | (pkt_type << 16) |
  1192. (bw << 24);
  1193. qdf_nbuf_set_rx_fctx_type(nbuf, (void *)rx_info, CB_FTYPE_MESH_RX_INFO);
  1194. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_MED,
  1195. FL("Mesh rx stats: flags %x, rssi %x, chn %x, rate %x, kix %x, snr %x"),
  1196. rx_info->rs_flags,
  1197. rx_info->rs_rssi,
  1198. rx_info->rs_channel,
  1199. rx_info->rs_ratephy1,
  1200. rx_info->rs_keyix,
  1201. rx_info->rs_snr);
  1202. }
  1203. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1204. uint8_t *rx_tlv_hdr)
  1205. {
  1206. union dp_align_mac_addr mac_addr;
  1207. struct dp_soc *soc = vdev->pdev->soc;
  1208. if (qdf_unlikely(vdev->mesh_rx_filter)) {
  1209. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_FROMDS)
  1210. if (hal_rx_mpdu_get_fr_ds(soc->hal_soc,
  1211. rx_tlv_hdr))
  1212. return QDF_STATUS_SUCCESS;
  1213. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TODS)
  1214. if (hal_rx_mpdu_get_to_ds(soc->hal_soc,
  1215. rx_tlv_hdr))
  1216. return QDF_STATUS_SUCCESS;
  1217. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_NODS)
  1218. if (!hal_rx_mpdu_get_fr_ds(soc->hal_soc,
  1219. rx_tlv_hdr) &&
  1220. !hal_rx_mpdu_get_to_ds(soc->hal_soc,
  1221. rx_tlv_hdr))
  1222. return QDF_STATUS_SUCCESS;
  1223. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_RA) {
  1224. if (hal_rx_mpdu_get_addr1(soc->hal_soc,
  1225. rx_tlv_hdr,
  1226. &mac_addr.raw[0]))
  1227. return QDF_STATUS_E_FAILURE;
  1228. if (!qdf_mem_cmp(&mac_addr.raw[0],
  1229. &vdev->mac_addr.raw[0],
  1230. QDF_MAC_ADDR_SIZE))
  1231. return QDF_STATUS_SUCCESS;
  1232. }
  1233. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TA) {
  1234. if (hal_rx_mpdu_get_addr2(soc->hal_soc,
  1235. rx_tlv_hdr,
  1236. &mac_addr.raw[0]))
  1237. return QDF_STATUS_E_FAILURE;
  1238. if (!qdf_mem_cmp(&mac_addr.raw[0],
  1239. &vdev->mac_addr.raw[0],
  1240. QDF_MAC_ADDR_SIZE))
  1241. return QDF_STATUS_SUCCESS;
  1242. }
  1243. }
  1244. return QDF_STATUS_E_FAILURE;
  1245. }
  1246. #else
  1247. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1248. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *peer)
  1249. {
  1250. }
  1251. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1252. uint8_t *rx_tlv_hdr)
  1253. {
  1254. return QDF_STATUS_E_FAILURE;
  1255. }
  1256. #endif
  1257. #ifdef RX_PEER_INVALID_ENH
  1258. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  1259. uint8_t mac_id)
  1260. {
  1261. struct dp_invalid_peer_msg msg;
  1262. struct dp_vdev *vdev = NULL;
  1263. struct dp_pdev *pdev = NULL;
  1264. struct ieee80211_frame *wh;
  1265. qdf_nbuf_t curr_nbuf, next_nbuf;
  1266. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  1267. uint8_t *rx_pkt_hdr = NULL;
  1268. int i = 0;
  1269. uint32_t nbuf_len;
  1270. if (!HAL_IS_DECAP_FORMAT_RAW(soc->hal_soc, rx_tlv_hdr)) {
  1271. dp_rx_debug("%pK: Drop decapped frames", soc);
  1272. goto free;
  1273. }
  1274. /* In RAW packet, packet header will be part of data */
  1275. rx_pkt_hdr = rx_tlv_hdr + soc->rx_pkt_tlv_size;
  1276. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  1277. if (!DP_FRAME_IS_DATA(wh)) {
  1278. dp_rx_debug("%pK: NAWDS valid only for data frames", soc);
  1279. goto free;
  1280. }
  1281. nbuf_len = qdf_nbuf_len(mpdu);
  1282. if (nbuf_len < sizeof(struct ieee80211_frame)) {
  1283. dp_rx_err("%pK: Invalid nbuf length: %u", soc, nbuf_len);
  1284. goto free;
  1285. }
  1286. /* In DMAC case the rx_desc_pools are common across PDEVs
  1287. * so PDEV cannot be derived from the pool_id.
  1288. *
  1289. * link_id need to derived from the TLV tag word which is
  1290. * disabled by default. For now adding a WAR to get vdev
  1291. * with brute force this need to fixed with word based subscription
  1292. * support is added by enabling TLV tag word
  1293. */
  1294. if (soc->features.dmac_cmn_src_rxbuf_ring_enabled) {
  1295. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1296. pdev = soc->pdev_list[i];
  1297. if (!pdev || qdf_unlikely(pdev->is_pdev_down))
  1298. continue;
  1299. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  1300. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  1301. QDF_MAC_ADDR_SIZE) == 0) {
  1302. goto out;
  1303. }
  1304. }
  1305. }
  1306. } else {
  1307. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1308. if (!pdev || qdf_unlikely(pdev->is_pdev_down)) {
  1309. dp_rx_err("%pK: PDEV %s",
  1310. soc, !pdev ? "not found" : "down");
  1311. goto free;
  1312. }
  1313. if (dp_monitor_filter_neighbour_peer(pdev, rx_pkt_hdr) ==
  1314. QDF_STATUS_SUCCESS)
  1315. return 0;
  1316. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  1317. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  1318. QDF_MAC_ADDR_SIZE) == 0) {
  1319. goto out;
  1320. }
  1321. }
  1322. }
  1323. if (!vdev) {
  1324. dp_rx_err("%pK: VDEV not found", soc);
  1325. goto free;
  1326. }
  1327. out:
  1328. msg.wh = wh;
  1329. qdf_nbuf_pull_head(mpdu, soc->rx_pkt_tlv_size);
  1330. msg.nbuf = mpdu;
  1331. msg.vdev_id = vdev->vdev_id;
  1332. /*
  1333. * NOTE: Only valid for HKv1.
  1334. * If smart monitor mode is enabled on RE, we are getting invalid
  1335. * peer frames with RA as STA mac of RE and the TA not matching
  1336. * with any NAC list or the the BSSID.Such frames need to dropped
  1337. * in order to avoid HM_WDS false addition.
  1338. */
  1339. if (pdev->soc->cdp_soc.ol_ops->rx_invalid_peer) {
  1340. if (dp_monitor_drop_inv_peer_pkts(vdev) == QDF_STATUS_SUCCESS) {
  1341. dp_rx_warn("%pK: Drop inv peer pkts with STA RA:%pm",
  1342. soc, wh->i_addr1);
  1343. goto free;
  1344. }
  1345. pdev->soc->cdp_soc.ol_ops->rx_invalid_peer(
  1346. (struct cdp_ctrl_objmgr_psoc *)soc->ctrl_psoc,
  1347. pdev->pdev_id, &msg);
  1348. }
  1349. free:
  1350. /* Drop and free packet */
  1351. curr_nbuf = mpdu;
  1352. while (curr_nbuf) {
  1353. next_nbuf = qdf_nbuf_next(curr_nbuf);
  1354. dp_rx_nbuf_free(curr_nbuf);
  1355. curr_nbuf = next_nbuf;
  1356. }
  1357. return 0;
  1358. }
  1359. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  1360. qdf_nbuf_t mpdu, bool mpdu_done,
  1361. uint8_t mac_id)
  1362. {
  1363. /* Only trigger the process when mpdu is completed */
  1364. if (mpdu_done)
  1365. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  1366. }
  1367. #else
  1368. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  1369. uint8_t mac_id)
  1370. {
  1371. qdf_nbuf_t curr_nbuf, next_nbuf;
  1372. struct dp_pdev *pdev;
  1373. struct dp_vdev *vdev = NULL;
  1374. struct ieee80211_frame *wh;
  1375. struct dp_peer *peer = NULL;
  1376. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  1377. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(soc->hal_soc, rx_tlv_hdr);
  1378. uint32_t nbuf_len;
  1379. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  1380. if (!DP_FRAME_IS_DATA(wh)) {
  1381. QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP,
  1382. "only for data frames");
  1383. goto free;
  1384. }
  1385. nbuf_len = qdf_nbuf_len(mpdu);
  1386. if (nbuf_len < sizeof(struct ieee80211_frame)) {
  1387. dp_rx_info_rl("%pK: Invalid nbuf length: %u", soc, nbuf_len);
  1388. goto free;
  1389. }
  1390. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1391. if (!pdev) {
  1392. dp_rx_info_rl("%pK: PDEV not found", soc);
  1393. goto free;
  1394. }
  1395. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  1396. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  1397. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  1398. QDF_MAC_ADDR_SIZE) == 0) {
  1399. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  1400. goto out;
  1401. }
  1402. }
  1403. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  1404. if (!vdev) {
  1405. dp_rx_info_rl("%pK: VDEV not found", soc);
  1406. goto free;
  1407. }
  1408. out:
  1409. if (vdev->opmode == wlan_op_mode_ap) {
  1410. peer = dp_peer_find_hash_find(soc, wh->i_addr2, 0,
  1411. vdev->vdev_id,
  1412. DP_MOD_ID_RX_ERR);
  1413. /* If SA is a valid peer in vdev,
  1414. * don't send disconnect
  1415. */
  1416. if (peer) {
  1417. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  1418. DP_STATS_INC(soc, rx.err.decrypt_err_drop, 1);
  1419. dp_err_rl("invalid peer frame with correct SA/RA is freed");
  1420. goto free;
  1421. }
  1422. }
  1423. if (soc->cdp_soc.ol_ops->rx_invalid_peer)
  1424. soc->cdp_soc.ol_ops->rx_invalid_peer(vdev->vdev_id, wh);
  1425. free:
  1426. /* Drop and free packet */
  1427. curr_nbuf = mpdu;
  1428. while (curr_nbuf) {
  1429. next_nbuf = qdf_nbuf_next(curr_nbuf);
  1430. dp_rx_nbuf_free(curr_nbuf);
  1431. curr_nbuf = next_nbuf;
  1432. }
  1433. /* Reset the head and tail pointers */
  1434. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1435. if (pdev) {
  1436. pdev->invalid_peer_head_msdu = NULL;
  1437. pdev->invalid_peer_tail_msdu = NULL;
  1438. }
  1439. return 0;
  1440. }
  1441. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  1442. qdf_nbuf_t mpdu, bool mpdu_done,
  1443. uint8_t mac_id)
  1444. {
  1445. /* Process the nbuf */
  1446. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  1447. }
  1448. #endif
  1449. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1450. #ifdef RECEIVE_OFFLOAD
  1451. /**
  1452. * dp_rx_print_offload_info() - Print offload info from RX TLV
  1453. * @soc: dp soc handle
  1454. * @msdu: MSDU for which the offload info is to be printed
  1455. *
  1456. * Return: None
  1457. */
  1458. static void dp_rx_print_offload_info(struct dp_soc *soc,
  1459. qdf_nbuf_t msdu)
  1460. {
  1461. dp_verbose_debug("----------------------RX DESC LRO/GRO----------------------");
  1462. dp_verbose_debug("lro_eligible 0x%x",
  1463. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu));
  1464. dp_verbose_debug("pure_ack 0x%x", QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu));
  1465. dp_verbose_debug("chksum 0x%x", QDF_NBUF_CB_RX_TCP_CHKSUM(msdu));
  1466. dp_verbose_debug("TCP seq num 0x%x", QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu));
  1467. dp_verbose_debug("TCP ack num 0x%x", QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu));
  1468. dp_verbose_debug("TCP window 0x%x", QDF_NBUF_CB_RX_TCP_WIN(msdu));
  1469. dp_verbose_debug("TCP protocol 0x%x", QDF_NBUF_CB_RX_TCP_PROTO(msdu));
  1470. dp_verbose_debug("TCP offset 0x%x", QDF_NBUF_CB_RX_TCP_OFFSET(msdu));
  1471. dp_verbose_debug("toeplitz 0x%x", QDF_NBUF_CB_RX_FLOW_ID(msdu));
  1472. dp_verbose_debug("---------------------------------------------------------");
  1473. }
  1474. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  1475. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt)
  1476. {
  1477. struct hal_offload_info offload_info;
  1478. if (!wlan_cfg_is_gro_enabled(soc->wlan_cfg_ctx))
  1479. return;
  1480. if (hal_rx_tlv_get_offload_info(soc->hal_soc, rx_tlv, &offload_info))
  1481. return;
  1482. *rx_ol_pkt_cnt = *rx_ol_pkt_cnt + 1;
  1483. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) = offload_info.lro_eligible;
  1484. QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu) = offload_info.tcp_pure_ack;
  1485. QDF_NBUF_CB_RX_TCP_CHKSUM(msdu) =
  1486. hal_rx_tlv_get_tcp_chksum(soc->hal_soc,
  1487. rx_tlv);
  1488. QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu) = offload_info.tcp_seq_num;
  1489. QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu) = offload_info.tcp_ack_num;
  1490. QDF_NBUF_CB_RX_TCP_WIN(msdu) = offload_info.tcp_win;
  1491. QDF_NBUF_CB_RX_TCP_PROTO(msdu) = offload_info.tcp_proto;
  1492. QDF_NBUF_CB_RX_IPV6_PROTO(msdu) = offload_info.ipv6_proto;
  1493. QDF_NBUF_CB_RX_TCP_OFFSET(msdu) = offload_info.tcp_offset;
  1494. QDF_NBUF_CB_RX_FLOW_ID(msdu) = offload_info.flow_id;
  1495. dp_rx_print_offload_info(soc, msdu);
  1496. }
  1497. #endif /* RECEIVE_OFFLOAD */
  1498. /**
  1499. * dp_rx_adjust_nbuf_len() - set appropriate msdu length in nbuf.
  1500. *
  1501. * @soc: DP soc handle
  1502. * @nbuf: pointer to msdu.
  1503. * @mpdu_len: mpdu length
  1504. * @l3_pad_len: L3 padding length by HW
  1505. *
  1506. * Return: returns true if nbuf is last msdu of mpdu else returns false.
  1507. */
  1508. static inline bool dp_rx_adjust_nbuf_len(struct dp_soc *soc,
  1509. qdf_nbuf_t nbuf,
  1510. uint16_t *mpdu_len,
  1511. uint32_t l3_pad_len)
  1512. {
  1513. bool last_nbuf;
  1514. uint32_t pkt_hdr_size;
  1515. pkt_hdr_size = soc->rx_pkt_tlv_size + l3_pad_len;
  1516. if ((*mpdu_len + pkt_hdr_size) > RX_DATA_BUFFER_SIZE) {
  1517. qdf_nbuf_set_pktlen(nbuf, RX_DATA_BUFFER_SIZE);
  1518. last_nbuf = false;
  1519. *mpdu_len -= (RX_DATA_BUFFER_SIZE - pkt_hdr_size);
  1520. } else {
  1521. qdf_nbuf_set_pktlen(nbuf, (*mpdu_len + pkt_hdr_size));
  1522. last_nbuf = true;
  1523. *mpdu_len = 0;
  1524. }
  1525. return last_nbuf;
  1526. }
  1527. /**
  1528. * dp_get_l3_hdr_pad_len() - get L3 header padding length.
  1529. *
  1530. * @soc: DP soc handle
  1531. * @nbuf: pointer to msdu.
  1532. *
  1533. * Return: returns padding length in bytes.
  1534. */
  1535. static inline uint32_t dp_get_l3_hdr_pad_len(struct dp_soc *soc,
  1536. qdf_nbuf_t nbuf)
  1537. {
  1538. uint32_t l3_hdr_pad = 0;
  1539. uint8_t *rx_tlv_hdr;
  1540. struct hal_rx_msdu_metadata msdu_metadata;
  1541. while (nbuf) {
  1542. if (!qdf_nbuf_is_rx_chfrag_cont(nbuf)) {
  1543. /* scattered msdu end with continuation is 0 */
  1544. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1545. hal_rx_msdu_metadata_get(soc->hal_soc,
  1546. rx_tlv_hdr,
  1547. &msdu_metadata);
  1548. l3_hdr_pad = msdu_metadata.l3_hdr_pad;
  1549. break;
  1550. }
  1551. nbuf = nbuf->next;
  1552. }
  1553. return l3_hdr_pad;
  1554. }
  1555. qdf_nbuf_t dp_rx_sg_create(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1556. {
  1557. qdf_nbuf_t parent, frag_list, next = NULL;
  1558. uint16_t frag_list_len = 0;
  1559. uint16_t mpdu_len;
  1560. bool last_nbuf;
  1561. uint32_t l3_hdr_pad_offset = 0;
  1562. /*
  1563. * Use msdu len got from REO entry descriptor instead since
  1564. * there is case the RX PKT TLV is corrupted while msdu_len
  1565. * from REO descriptor is right for non-raw RX scatter msdu.
  1566. */
  1567. mpdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1568. /*
  1569. * this is a case where the complete msdu fits in one single nbuf.
  1570. * in this case HW sets both start and end bit and we only need to
  1571. * reset these bits for RAW mode simulator to decap the pkt
  1572. */
  1573. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  1574. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  1575. qdf_nbuf_set_pktlen(nbuf, mpdu_len + soc->rx_pkt_tlv_size);
  1576. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  1577. return nbuf;
  1578. }
  1579. l3_hdr_pad_offset = dp_get_l3_hdr_pad_len(soc, nbuf);
  1580. /*
  1581. * This is a case where we have multiple msdus (A-MSDU) spread across
  1582. * multiple nbufs. here we create a fraglist out of these nbufs.
  1583. *
  1584. * the moment we encounter a nbuf with continuation bit set we
  1585. * know for sure we have an MSDU which is spread across multiple
  1586. * nbufs. We loop through and reap nbufs till we reach last nbuf.
  1587. */
  1588. parent = nbuf;
  1589. frag_list = nbuf->next;
  1590. nbuf = nbuf->next;
  1591. /*
  1592. * set the start bit in the first nbuf we encounter with continuation
  1593. * bit set. This has the proper mpdu length set as it is the first
  1594. * msdu of the mpdu. this becomes the parent nbuf and the subsequent
  1595. * nbufs will form the frag_list of the parent nbuf.
  1596. */
  1597. qdf_nbuf_set_rx_chfrag_start(parent, 1);
  1598. /*
  1599. * L3 header padding is only needed for the 1st buffer
  1600. * in a scattered msdu
  1601. */
  1602. last_nbuf = dp_rx_adjust_nbuf_len(soc, parent, &mpdu_len,
  1603. l3_hdr_pad_offset);
  1604. /*
  1605. * MSDU cont bit is set but reported MPDU length can fit
  1606. * in to single buffer
  1607. *
  1608. * Increment error stats and avoid SG list creation
  1609. */
  1610. if (last_nbuf) {
  1611. DP_STATS_INC(soc, rx.err.msdu_continuation_err, 1);
  1612. qdf_nbuf_pull_head(parent,
  1613. soc->rx_pkt_tlv_size + l3_hdr_pad_offset);
  1614. return parent;
  1615. }
  1616. /*
  1617. * this is where we set the length of the fragments which are
  1618. * associated to the parent nbuf. We iterate through the frag_list
  1619. * till we hit the last_nbuf of the list.
  1620. */
  1621. do {
  1622. last_nbuf = dp_rx_adjust_nbuf_len(soc, nbuf, &mpdu_len, 0);
  1623. qdf_nbuf_pull_head(nbuf,
  1624. soc->rx_pkt_tlv_size);
  1625. frag_list_len += qdf_nbuf_len(nbuf);
  1626. if (last_nbuf) {
  1627. next = nbuf->next;
  1628. nbuf->next = NULL;
  1629. break;
  1630. } else if (qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  1631. dp_err("Invalid packet length");
  1632. qdf_assert_always(0);
  1633. }
  1634. nbuf = nbuf->next;
  1635. } while (!last_nbuf);
  1636. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  1637. qdf_nbuf_append_ext_list(parent, frag_list, frag_list_len);
  1638. parent->next = next;
  1639. qdf_nbuf_pull_head(parent,
  1640. soc->rx_pkt_tlv_size + l3_hdr_pad_offset);
  1641. return parent;
  1642. }
  1643. #ifdef DP_RX_SG_FRAME_SUPPORT
  1644. bool dp_rx_is_sg_supported(void)
  1645. {
  1646. return true;
  1647. }
  1648. #else
  1649. bool dp_rx_is_sg_supported(void)
  1650. {
  1651. return false;
  1652. }
  1653. #endif
  1654. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1655. #ifdef QCA_PEER_EXT_STATS
  1656. void dp_rx_compute_tid_delay(struct cdp_delay_tid_stats *stats,
  1657. qdf_nbuf_t nbuf)
  1658. {
  1659. struct cdp_delay_rx_stats *rx_delay = &stats->rx_delay;
  1660. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  1661. dp_hist_update_stats(&rx_delay->to_stack_delay, to_stack);
  1662. }
  1663. #endif /* QCA_PEER_EXT_STATS */
  1664. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  1665. {
  1666. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  1667. int64_t current_ts = qdf_ktime_to_ms(qdf_ktime_get());
  1668. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  1669. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  1670. uint32_t interframe_delay =
  1671. (uint32_t)(current_ts - vdev->prev_rx_deliver_tstamp);
  1672. struct cdp_tid_rx_stats *rstats =
  1673. &vdev->pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  1674. dp_update_delay_stats(NULL, rstats, to_stack, tid,
  1675. CDP_DELAY_STATS_REAP_STACK, ring_id, false);
  1676. /*
  1677. * Update interframe delay stats calculated at deliver_data_ol point.
  1678. * Value of vdev->prev_rx_deliver_tstamp will be 0 for 1st frame, so
  1679. * interframe delay will not be calculate correctly for 1st frame.
  1680. * On the other side, this will help in avoiding extra per packet check
  1681. * of vdev->prev_rx_deliver_tstamp.
  1682. */
  1683. dp_update_delay_stats(NULL, rstats, interframe_delay, tid,
  1684. CDP_DELAY_STATS_RX_INTERFRAME, ring_id, false);
  1685. vdev->prev_rx_deliver_tstamp = current_ts;
  1686. }
  1687. /**
  1688. * dp_rx_drop_nbuf_list() - drop an nbuf list
  1689. * @pdev: dp pdev reference
  1690. * @buf_list: buffer list to be dropepd
  1691. *
  1692. * Return: int (number of bufs dropped)
  1693. */
  1694. static inline int dp_rx_drop_nbuf_list(struct dp_pdev *pdev,
  1695. qdf_nbuf_t buf_list)
  1696. {
  1697. struct cdp_tid_rx_stats *stats = NULL;
  1698. uint8_t tid = 0, ring_id = 0;
  1699. int num_dropped = 0;
  1700. qdf_nbuf_t buf, next_buf;
  1701. buf = buf_list;
  1702. while (buf) {
  1703. ring_id = QDF_NBUF_CB_RX_CTX_ID(buf);
  1704. next_buf = qdf_nbuf_queue_next(buf);
  1705. tid = qdf_nbuf_get_tid_val(buf);
  1706. if (qdf_likely(pdev)) {
  1707. stats = &pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  1708. stats->fail_cnt[INVALID_PEER_VDEV]++;
  1709. stats->delivered_to_stack--;
  1710. }
  1711. dp_rx_nbuf_free(buf);
  1712. buf = next_buf;
  1713. num_dropped++;
  1714. }
  1715. return num_dropped;
  1716. }
  1717. #ifdef QCA_SUPPORT_WDS_EXTENDED
  1718. /**
  1719. * dp_rx_deliver_to_stack_ext() - Deliver to netdev per sta
  1720. * @soc: core txrx main context
  1721. * @vdev: vdev
  1722. * @txrx_peer: txrx peer
  1723. * @nbuf_head: skb list head
  1724. *
  1725. * Return: true if packet is delivered to netdev per STA.
  1726. */
  1727. static inline bool
  1728. dp_rx_deliver_to_stack_ext(struct dp_soc *soc, struct dp_vdev *vdev,
  1729. struct dp_txrx_peer *txrx_peer, qdf_nbuf_t nbuf_head)
  1730. {
  1731. /*
  1732. * When extended WDS is disabled, frames are sent to AP netdevice.
  1733. */
  1734. if (qdf_likely(!vdev->wds_ext_enabled))
  1735. return false;
  1736. /*
  1737. * There can be 2 cases:
  1738. * 1. Send frame to parent netdev if its not for netdev per STA
  1739. * 2. If frame is meant for netdev per STA:
  1740. * a. Send frame to appropriate netdev using registered fp.
  1741. * b. If fp is NULL, drop the frames.
  1742. */
  1743. if (!txrx_peer->wds_ext.init)
  1744. return false;
  1745. if (txrx_peer->osif_rx)
  1746. txrx_peer->osif_rx(txrx_peer->wds_ext.osif_peer, nbuf_head);
  1747. else
  1748. dp_rx_drop_nbuf_list(vdev->pdev, nbuf_head);
  1749. return true;
  1750. }
  1751. #else
  1752. static inline bool
  1753. dp_rx_deliver_to_stack_ext(struct dp_soc *soc, struct dp_vdev *vdev,
  1754. struct dp_txrx_peer *txrx_peer, qdf_nbuf_t nbuf_head)
  1755. {
  1756. return false;
  1757. }
  1758. #endif
  1759. #ifdef PEER_CACHE_RX_PKTS
  1760. void dp_rx_flush_rx_cached(struct dp_peer *peer, bool drop)
  1761. {
  1762. struct dp_peer_cached_bufq *bufqi;
  1763. struct dp_rx_cached_buf *cache_buf = NULL;
  1764. ol_txrx_rx_fp data_rx = NULL;
  1765. int num_buff_elem;
  1766. QDF_STATUS status;
  1767. /*
  1768. * Flush dp cached frames only for mld peers and legacy peers, as
  1769. * link peers don't store cached frames
  1770. */
  1771. if (IS_MLO_DP_LINK_PEER(peer))
  1772. return;
  1773. if (!peer->txrx_peer) {
  1774. dp_err("txrx_peer NULL!! peer mac_addr("QDF_MAC_ADDR_FMT")",
  1775. QDF_MAC_ADDR_REF(peer->mac_addr.raw));
  1776. return;
  1777. }
  1778. if (qdf_atomic_inc_return(&peer->txrx_peer->flush_in_progress) > 1) {
  1779. qdf_atomic_dec(&peer->txrx_peer->flush_in_progress);
  1780. return;
  1781. }
  1782. qdf_spin_lock_bh(&peer->peer_info_lock);
  1783. if (peer->state >= OL_TXRX_PEER_STATE_CONN && peer->vdev->osif_rx)
  1784. data_rx = peer->vdev->osif_rx;
  1785. else
  1786. drop = true;
  1787. qdf_spin_unlock_bh(&peer->peer_info_lock);
  1788. bufqi = &peer->txrx_peer->bufq_info;
  1789. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1790. qdf_list_remove_front(&bufqi->cached_bufq,
  1791. (qdf_list_node_t **)&cache_buf);
  1792. while (cache_buf) {
  1793. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(
  1794. cache_buf->buf);
  1795. bufqi->entries -= num_buff_elem;
  1796. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1797. if (drop) {
  1798. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1799. cache_buf->buf);
  1800. } else {
  1801. /* Flush the cached frames to OSIF DEV */
  1802. status = data_rx(peer->vdev->osif_vdev, cache_buf->buf);
  1803. if (status != QDF_STATUS_SUCCESS)
  1804. bufqi->dropped = dp_rx_drop_nbuf_list(
  1805. peer->vdev->pdev,
  1806. cache_buf->buf);
  1807. }
  1808. qdf_mem_free(cache_buf);
  1809. cache_buf = NULL;
  1810. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1811. qdf_list_remove_front(&bufqi->cached_bufq,
  1812. (qdf_list_node_t **)&cache_buf);
  1813. }
  1814. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1815. qdf_atomic_dec(&peer->txrx_peer->flush_in_progress);
  1816. }
  1817. /**
  1818. * dp_rx_enqueue_rx() - cache rx frames
  1819. * @peer: peer
  1820. * @txrx_peer: DP txrx_peer
  1821. * @rx_buf_list: cache buffer list
  1822. *
  1823. * Return: None
  1824. */
  1825. static QDF_STATUS
  1826. dp_rx_enqueue_rx(struct dp_peer *peer,
  1827. struct dp_txrx_peer *txrx_peer,
  1828. qdf_nbuf_t rx_buf_list)
  1829. {
  1830. struct dp_rx_cached_buf *cache_buf;
  1831. struct dp_peer_cached_bufq *bufqi = &txrx_peer->bufq_info;
  1832. int num_buff_elem;
  1833. QDF_STATUS ret = QDF_STATUS_SUCCESS;
  1834. struct dp_soc *soc = txrx_peer->vdev->pdev->soc;
  1835. struct dp_peer *ta_peer = NULL;
  1836. /*
  1837. * If peer id is invalid which likely peer map has not completed,
  1838. * then need caller provide dp_peer pointer, else it's ok to use
  1839. * txrx_peer->peer_id to get dp_peer.
  1840. */
  1841. if (peer) {
  1842. if (QDF_STATUS_SUCCESS ==
  1843. dp_peer_get_ref(soc, peer, DP_MOD_ID_RX))
  1844. ta_peer = peer;
  1845. } else {
  1846. ta_peer = dp_peer_get_ref_by_id(soc, txrx_peer->peer_id,
  1847. DP_MOD_ID_RX);
  1848. }
  1849. if (!ta_peer) {
  1850. bufqi->dropped = dp_rx_drop_nbuf_list(txrx_peer->vdev->pdev,
  1851. rx_buf_list);
  1852. return QDF_STATUS_E_INVAL;
  1853. }
  1854. dp_debug_rl("bufq->curr %d bufq->drops %d", bufqi->entries,
  1855. bufqi->dropped);
  1856. if (!ta_peer->valid) {
  1857. bufqi->dropped = dp_rx_drop_nbuf_list(txrx_peer->vdev->pdev,
  1858. rx_buf_list);
  1859. ret = QDF_STATUS_E_INVAL;
  1860. goto fail;
  1861. }
  1862. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1863. if (bufqi->entries >= bufqi->thresh) {
  1864. bufqi->dropped = dp_rx_drop_nbuf_list(txrx_peer->vdev->pdev,
  1865. rx_buf_list);
  1866. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1867. ret = QDF_STATUS_E_RESOURCES;
  1868. goto fail;
  1869. }
  1870. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1871. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(rx_buf_list);
  1872. cache_buf = qdf_mem_malloc_atomic(sizeof(*cache_buf));
  1873. if (!cache_buf) {
  1874. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1875. "Failed to allocate buf to cache rx frames");
  1876. bufqi->dropped = dp_rx_drop_nbuf_list(txrx_peer->vdev->pdev,
  1877. rx_buf_list);
  1878. ret = QDF_STATUS_E_NOMEM;
  1879. goto fail;
  1880. }
  1881. cache_buf->buf = rx_buf_list;
  1882. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1883. qdf_list_insert_back(&bufqi->cached_bufq,
  1884. &cache_buf->node);
  1885. bufqi->entries += num_buff_elem;
  1886. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1887. fail:
  1888. dp_peer_unref_delete(ta_peer, DP_MOD_ID_RX);
  1889. return ret;
  1890. }
  1891. static inline
  1892. bool dp_rx_is_peer_cache_bufq_supported(void)
  1893. {
  1894. return true;
  1895. }
  1896. #else
  1897. static inline
  1898. bool dp_rx_is_peer_cache_bufq_supported(void)
  1899. {
  1900. return false;
  1901. }
  1902. static inline QDF_STATUS
  1903. dp_rx_enqueue_rx(struct dp_peer *peer,
  1904. struct dp_txrx_peer *txrx_peer,
  1905. qdf_nbuf_t rx_buf_list)
  1906. {
  1907. return QDF_STATUS_SUCCESS;
  1908. }
  1909. #endif
  1910. #ifndef DELIVERY_TO_STACK_STATUS_CHECK
  1911. /**
  1912. * dp_rx_check_delivery_to_stack() - Deliver pkts to network
  1913. * using the appropriate call back functions.
  1914. * @soc: soc
  1915. * @vdev: vdev
  1916. * @txrx_peer: peer
  1917. * @nbuf_head: skb list head
  1918. *
  1919. * Return: None
  1920. */
  1921. static void dp_rx_check_delivery_to_stack(struct dp_soc *soc,
  1922. struct dp_vdev *vdev,
  1923. struct dp_txrx_peer *txrx_peer,
  1924. qdf_nbuf_t nbuf_head)
  1925. {
  1926. if (qdf_unlikely(dp_rx_deliver_to_stack_ext(soc, vdev,
  1927. txrx_peer, nbuf_head)))
  1928. return;
  1929. /* Function pointer initialized only when FISA is enabled */
  1930. if (vdev->osif_fisa_rx)
  1931. /* on failure send it via regular path */
  1932. vdev->osif_fisa_rx(soc, vdev, nbuf_head);
  1933. else
  1934. vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1935. }
  1936. #else
  1937. /**
  1938. * dp_rx_check_delivery_to_stack() - Deliver pkts to network
  1939. * using the appropriate call back functions.
  1940. * @soc: soc
  1941. * @vdev: vdev
  1942. * @txrx_peer: txrx peer
  1943. * @nbuf_head: skb list head
  1944. *
  1945. * Check the return status of the call back function and drop
  1946. * the packets if the return status indicates a failure.
  1947. *
  1948. * Return: None
  1949. */
  1950. static void dp_rx_check_delivery_to_stack(struct dp_soc *soc,
  1951. struct dp_vdev *vdev,
  1952. struct dp_txrx_peer *txrx_peer,
  1953. qdf_nbuf_t nbuf_head)
  1954. {
  1955. int num_nbuf = 0;
  1956. QDF_STATUS ret_val = QDF_STATUS_E_FAILURE;
  1957. /* Function pointer initialized only when FISA is enabled */
  1958. if (vdev->osif_fisa_rx)
  1959. /* on failure send it via regular path */
  1960. ret_val = vdev->osif_fisa_rx(soc, vdev, nbuf_head);
  1961. else if (vdev->osif_rx)
  1962. ret_val = vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1963. if (!QDF_IS_STATUS_SUCCESS(ret_val)) {
  1964. num_nbuf = dp_rx_drop_nbuf_list(vdev->pdev, nbuf_head);
  1965. DP_STATS_INC(soc, rx.err.rejected, num_nbuf);
  1966. if (txrx_peer)
  1967. DP_PEER_STATS_FLAT_DEC(txrx_peer, to_stack.num,
  1968. num_nbuf);
  1969. }
  1970. }
  1971. #endif /* ifdef DELIVERY_TO_STACK_STATUS_CHECK */
  1972. /**
  1973. * dp_rx_validate_rx_callbacks() - validate rx callbacks
  1974. * @soc: DP soc
  1975. * @vdev: DP vdev handle
  1976. * @txrx_peer: pointer to the txrx peer object
  1977. * @nbuf_head: skb list head
  1978. *
  1979. * Return: QDF_STATUS - QDF_STATUS_SUCCESS
  1980. * QDF_STATUS_E_FAILURE
  1981. */
  1982. static inline QDF_STATUS
  1983. dp_rx_validate_rx_callbacks(struct dp_soc *soc,
  1984. struct dp_vdev *vdev,
  1985. struct dp_txrx_peer *txrx_peer,
  1986. qdf_nbuf_t nbuf_head)
  1987. {
  1988. int num_nbuf;
  1989. if (qdf_unlikely(!vdev || vdev->delete.pending)) {
  1990. num_nbuf = dp_rx_drop_nbuf_list(NULL, nbuf_head);
  1991. /*
  1992. * This is a special case where vdev is invalid,
  1993. * so we cannot know the pdev to which this packet
  1994. * belonged. Hence we update the soc rx error stats.
  1995. */
  1996. DP_STATS_INC(soc, rx.err.invalid_vdev, num_nbuf);
  1997. return QDF_STATUS_E_FAILURE;
  1998. }
  1999. /*
  2000. * highly unlikely to have a vdev without a registered rx
  2001. * callback function. if so let us free the nbuf_list.
  2002. */
  2003. if (qdf_unlikely(!vdev->osif_rx)) {
  2004. if (txrx_peer && dp_rx_is_peer_cache_bufq_supported()) {
  2005. dp_rx_enqueue_rx(NULL, txrx_peer, nbuf_head);
  2006. } else {
  2007. num_nbuf = dp_rx_drop_nbuf_list(vdev->pdev,
  2008. nbuf_head);
  2009. DP_PEER_TO_STACK_DECC(txrx_peer, num_nbuf,
  2010. vdev->pdev->enhanced_stats_en);
  2011. }
  2012. return QDF_STATUS_E_FAILURE;
  2013. }
  2014. return QDF_STATUS_SUCCESS;
  2015. }
  2016. QDF_STATUS dp_rx_deliver_to_stack(struct dp_soc *soc,
  2017. struct dp_vdev *vdev,
  2018. struct dp_txrx_peer *txrx_peer,
  2019. qdf_nbuf_t nbuf_head,
  2020. qdf_nbuf_t nbuf_tail)
  2021. {
  2022. if (dp_rx_validate_rx_callbacks(soc, vdev, txrx_peer, nbuf_head) !=
  2023. QDF_STATUS_SUCCESS)
  2024. return QDF_STATUS_E_FAILURE;
  2025. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw) ||
  2026. (vdev->rx_decap_type == htt_cmn_pkt_type_native_wifi)) {
  2027. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &nbuf_head,
  2028. &nbuf_tail);
  2029. }
  2030. dp_rx_check_delivery_to_stack(soc, vdev, txrx_peer, nbuf_head);
  2031. return QDF_STATUS_SUCCESS;
  2032. }
  2033. #ifdef QCA_SUPPORT_EAPOL_OVER_CONTROL_PORT
  2034. QDF_STATUS dp_rx_eapol_deliver_to_stack(struct dp_soc *soc,
  2035. struct dp_vdev *vdev,
  2036. struct dp_txrx_peer *txrx_peer,
  2037. qdf_nbuf_t nbuf_head,
  2038. qdf_nbuf_t nbuf_tail)
  2039. {
  2040. if (dp_rx_validate_rx_callbacks(soc, vdev, txrx_peer, nbuf_head) !=
  2041. QDF_STATUS_SUCCESS)
  2042. return QDF_STATUS_E_FAILURE;
  2043. vdev->osif_rx_eapol(vdev->osif_vdev, nbuf_head);
  2044. return QDF_STATUS_SUCCESS;
  2045. }
  2046. #endif
  2047. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  2048. #ifdef VDEV_PEER_PROTOCOL_COUNT
  2049. #define dp_rx_msdu_stats_update_prot_cnts(vdev_hdl, nbuf, txrx_peer) \
  2050. { \
  2051. qdf_nbuf_t nbuf_local; \
  2052. struct dp_txrx_peer *txrx_peer_local; \
  2053. struct dp_vdev *vdev_local = vdev_hdl; \
  2054. do { \
  2055. if (qdf_likely(!((vdev_local)->peer_protocol_count_track))) \
  2056. break; \
  2057. nbuf_local = nbuf; \
  2058. txrx_peer_local = txrx_peer; \
  2059. if (qdf_unlikely(qdf_nbuf_is_frag((nbuf_local)))) \
  2060. break; \
  2061. else if (qdf_unlikely(qdf_nbuf_is_raw_frame((nbuf_local)))) \
  2062. break; \
  2063. dp_vdev_peer_stats_update_protocol_cnt((vdev_local), \
  2064. (nbuf_local), \
  2065. (txrx_peer_local), 0, 1); \
  2066. } while (0); \
  2067. }
  2068. #else
  2069. #define dp_rx_msdu_stats_update_prot_cnts(vdev_hdl, nbuf, txrx_peer)
  2070. #endif
  2071. #ifdef FEATURE_RX_LINKSPEED_ROAM_TRIGGER
  2072. /**
  2073. * dp_rx_rates_stats_update() - update rate stats
  2074. * from rx msdu.
  2075. * @soc: datapath soc handle
  2076. * @nbuf: received msdu buffer
  2077. * @rx_tlv_hdr: rx tlv header
  2078. * @txrx_peer: datapath txrx_peer handle
  2079. * @sgi: Short Guard Interval
  2080. * @mcs: Modulation and Coding Set
  2081. * @nss: Number of Spatial Streams
  2082. * @bw: BandWidth
  2083. * @pkt_type: Corresponds to preamble
  2084. * @link_id: Link Id on which packet is received
  2085. *
  2086. * To be precisely record rates, following factors are considered:
  2087. * Exclude specific frames, ARP, DHCP, ssdp, etc.
  2088. * Make sure to affect rx throughput as least as possible.
  2089. *
  2090. * Return: void
  2091. */
  2092. static void
  2093. dp_rx_rates_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  2094. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *txrx_peer,
  2095. uint32_t sgi, uint32_t mcs,
  2096. uint32_t nss, uint32_t bw, uint32_t pkt_type,
  2097. uint8_t link_id)
  2098. {
  2099. uint32_t rix;
  2100. uint16_t ratecode;
  2101. uint32_t avg_rx_rate;
  2102. uint32_t ratekbps;
  2103. enum cdp_punctured_modes punc_mode = NO_PUNCTURE;
  2104. if (soc->high_throughput ||
  2105. dp_rx_data_is_specific(soc->hal_soc, rx_tlv_hdr, nbuf)) {
  2106. return;
  2107. }
  2108. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.rx_rate, mcs, link_id);
  2109. /* In 11b mode, the nss we get from tlv is 0, invalid and should be 1 */
  2110. if (qdf_unlikely(pkt_type == DOT11_B))
  2111. nss = 1;
  2112. /* here pkt_type corresponds to preamble */
  2113. ratekbps = dp_getrateindex(sgi,
  2114. mcs,
  2115. nss - 1,
  2116. pkt_type,
  2117. bw,
  2118. punc_mode,
  2119. &rix,
  2120. &ratecode);
  2121. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.last_rx_rate, ratekbps, link_id);
  2122. avg_rx_rate =
  2123. dp_ath_rate_lpf(
  2124. txrx_peer->stats[link_id].extd_stats.rx.avg_rx_rate,
  2125. ratekbps);
  2126. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.avg_rx_rate, avg_rx_rate, link_id);
  2127. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.nss_info, nss, link_id);
  2128. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.mcs_info, mcs, link_id);
  2129. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.bw_info, bw, link_id);
  2130. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.gi_info, sgi, link_id);
  2131. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.preamble_info, pkt_type, link_id);
  2132. }
  2133. #else
  2134. static inline void
  2135. dp_rx_rates_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  2136. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *txrx_peer,
  2137. uint32_t sgi, uint32_t mcs,
  2138. uint32_t nss, uint32_t bw, uint32_t pkt_type,
  2139. uint8_t link_id)
  2140. {
  2141. }
  2142. #endif /* FEATURE_RX_LINKSPEED_ROAM_TRIGGER */
  2143. #ifndef QCA_ENHANCED_STATS_SUPPORT
  2144. /**
  2145. * dp_rx_msdu_extd_stats_update(): Update Rx extended path stats for peer
  2146. *
  2147. * @soc: datapath soc handle
  2148. * @nbuf: received msdu buffer
  2149. * @rx_tlv_hdr: rx tlv header
  2150. * @txrx_peer: datapath txrx_peer handle
  2151. * @link_id: link id on which the packet is received
  2152. *
  2153. * Return: void
  2154. */
  2155. static inline
  2156. void dp_rx_msdu_extd_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  2157. uint8_t *rx_tlv_hdr,
  2158. struct dp_txrx_peer *txrx_peer,
  2159. uint8_t link_id)
  2160. {
  2161. bool is_ampdu;
  2162. uint32_t sgi, mcs, tid, nss, bw, reception_type, pkt_type;
  2163. uint8_t dst_mcs_idx;
  2164. /*
  2165. * TODO - For KIWI this field is present in ring_desc
  2166. * Try to use ring desc instead of tlv.
  2167. */
  2168. is_ampdu = hal_rx_mpdu_info_ampdu_flag_get(soc->hal_soc, rx_tlv_hdr);
  2169. DP_PEER_EXTD_STATS_INCC(txrx_peer, rx.ampdu_cnt, 1, is_ampdu, link_id);
  2170. DP_PEER_EXTD_STATS_INCC(txrx_peer, rx.non_ampdu_cnt, 1, !(is_ampdu),
  2171. link_id);
  2172. sgi = hal_rx_tlv_sgi_get(soc->hal_soc, rx_tlv_hdr);
  2173. mcs = hal_rx_tlv_rate_mcs_get(soc->hal_soc, rx_tlv_hdr);
  2174. tid = qdf_nbuf_get_tid_val(nbuf);
  2175. bw = hal_rx_tlv_bw_get(soc->hal_soc, rx_tlv_hdr);
  2176. reception_type = hal_rx_msdu_start_reception_type_get(soc->hal_soc,
  2177. rx_tlv_hdr);
  2178. nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
  2179. pkt_type = hal_rx_tlv_get_pkt_type(soc->hal_soc, rx_tlv_hdr);
  2180. /* do HW to SW pkt type conversion */
  2181. pkt_type = (pkt_type >= HAL_DOT11_MAX ? DOT11_MAX :
  2182. hal_2_dp_pkt_type_map[pkt_type]);
  2183. /*
  2184. * The MCS index does not start with 0 when NSS>1 in HT mode.
  2185. * MCS params for optional 20/40MHz, NSS=1~3, EQM(NSS>1):
  2186. * ------------------------------------------------------
  2187. * NSS | 1 | 2 | 3 | 4
  2188. * ------------------------------------------------------
  2189. * MCS index: HT20 | 0 ~ 7 | 8 ~ 15 | 16 ~ 23 | 24 ~ 31
  2190. * ------------------------------------------------------
  2191. * MCS index: HT40 | 0 ~ 7 | 8 ~ 15 | 16 ~ 23 | 24 ~ 31
  2192. * ------------------------------------------------------
  2193. * Currently, the MAX_NSS=2. If NSS>2, MCS index = 8 * (NSS-1)
  2194. */
  2195. if ((pkt_type == DOT11_N) && (nss == 2))
  2196. mcs += 8;
  2197. DP_PEER_EXTD_STATS_INCC(txrx_peer, rx.rx_mpdu_cnt[mcs], 1,
  2198. ((mcs < MAX_MCS) && QDF_NBUF_CB_RX_CHFRAG_START(nbuf)),
  2199. link_id);
  2200. DP_PEER_EXTD_STATS_INCC(txrx_peer, rx.rx_mpdu_cnt[MAX_MCS - 1], 1,
  2201. ((mcs >= MAX_MCS) && QDF_NBUF_CB_RX_CHFRAG_START(nbuf)),
  2202. link_id);
  2203. DP_PEER_EXTD_STATS_INC(txrx_peer, rx.bw[bw], 1, link_id);
  2204. /*
  2205. * only if nss > 0 and pkt_type is 11N/AC/AX,
  2206. * then increase index [nss - 1] in array counter.
  2207. */
  2208. if (nss > 0 && CDP_IS_PKT_TYPE_SUPPORT_NSS(pkt_type))
  2209. DP_PEER_EXTD_STATS_INC(txrx_peer, rx.nss[nss - 1], 1, link_id);
  2210. DP_PEER_EXTD_STATS_INC(txrx_peer, rx.sgi_count[sgi], 1, link_id);
  2211. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, rx.err.mic_err, 1,
  2212. hal_rx_tlv_mic_err_get(soc->hal_soc,
  2213. rx_tlv_hdr), link_id);
  2214. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, rx.err.decrypt_err, 1,
  2215. hal_rx_tlv_decrypt_err_get(soc->hal_soc,
  2216. rx_tlv_hdr), link_id);
  2217. DP_PEER_EXTD_STATS_INC(txrx_peer, rx.wme_ac_type[TID_TO_WME_AC(tid)], 1,
  2218. link_id);
  2219. DP_PEER_EXTD_STATS_INC(txrx_peer, rx.reception_type[reception_type], 1,
  2220. link_id);
  2221. dst_mcs_idx = dp_get_mcs_array_index_by_pkt_type_mcs(pkt_type, mcs);
  2222. if (MCS_INVALID_ARRAY_INDEX != dst_mcs_idx)
  2223. DP_PEER_EXTD_STATS_INC(txrx_peer,
  2224. rx.pkt_type[pkt_type].mcs_count[dst_mcs_idx],
  2225. 1, link_id);
  2226. dp_rx_rates_stats_update(soc, nbuf, rx_tlv_hdr, txrx_peer,
  2227. sgi, mcs, nss, bw, pkt_type, link_id);
  2228. }
  2229. #else
  2230. static inline
  2231. void dp_rx_msdu_extd_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  2232. uint8_t *rx_tlv_hdr,
  2233. struct dp_txrx_peer *txrx_peer,
  2234. uint8_t link_id)
  2235. {
  2236. }
  2237. #endif
  2238. #if defined(DP_PKT_STATS_PER_LMAC) && defined(WLAN_FEATURE_11BE_MLO)
  2239. static inline void
  2240. dp_peer_update_rx_pkt_per_lmac(struct dp_txrx_peer *txrx_peer,
  2241. qdf_nbuf_t nbuf, uint8_t link_id)
  2242. {
  2243. uint8_t lmac_id = qdf_nbuf_get_lmac_id(nbuf);
  2244. if (qdf_unlikely(lmac_id >= CDP_MAX_LMACS)) {
  2245. dp_err_rl("Invalid lmac_id: %u vdev_id: %u",
  2246. lmac_id, QDF_NBUF_CB_RX_VDEV_ID(nbuf));
  2247. if (qdf_likely(txrx_peer))
  2248. dp_err_rl("peer_id: %u", txrx_peer->peer_id);
  2249. return;
  2250. }
  2251. /* only count stats per lmac for MLO connection*/
  2252. DP_PEER_PER_PKT_STATS_INCC_PKT(txrx_peer, rx.rx_lmac[lmac_id], 1,
  2253. QDF_NBUF_CB_RX_PKT_LEN(nbuf),
  2254. txrx_peer->is_mld_peer, link_id);
  2255. }
  2256. #else
  2257. static inline void
  2258. dp_peer_update_rx_pkt_per_lmac(struct dp_txrx_peer *txrx_peer,
  2259. qdf_nbuf_t nbuf, uint8_t link_id)
  2260. {
  2261. }
  2262. #endif
  2263. void dp_rx_msdu_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  2264. uint8_t *rx_tlv_hdr,
  2265. struct dp_txrx_peer *txrx_peer,
  2266. uint8_t ring_id,
  2267. struct cdp_tid_rx_stats *tid_stats,
  2268. uint8_t link_id)
  2269. {
  2270. bool is_not_amsdu;
  2271. struct dp_vdev *vdev = txrx_peer->vdev;
  2272. uint8_t enh_flag;
  2273. qdf_ether_header_t *eh;
  2274. uint16_t msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2275. dp_rx_msdu_stats_update_prot_cnts(vdev, nbuf, txrx_peer);
  2276. is_not_amsdu = qdf_nbuf_is_rx_chfrag_start(nbuf) &
  2277. qdf_nbuf_is_rx_chfrag_end(nbuf);
  2278. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.rcvd_reo[ring_id], 1,
  2279. msdu_len, link_id);
  2280. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, rx.non_amsdu_cnt, 1,
  2281. is_not_amsdu, link_id);
  2282. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, rx.amsdu_cnt, 1,
  2283. !is_not_amsdu, link_id);
  2284. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, rx.rx_retries, 1,
  2285. qdf_nbuf_is_rx_retry_flag(nbuf), link_id);
  2286. dp_peer_update_rx_pkt_per_lmac(txrx_peer, nbuf, link_id);
  2287. tid_stats->msdu_cnt++;
  2288. enh_flag = vdev->pdev->enhanced_stats_en;
  2289. if (qdf_unlikely(qdf_nbuf_is_da_mcbc(nbuf) &&
  2290. (vdev->rx_decap_type == htt_cmn_pkt_type_ethernet))) {
  2291. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  2292. DP_PEER_MC_INCC_PKT(txrx_peer, 1, msdu_len, enh_flag, link_id);
  2293. tid_stats->mcast_msdu_cnt++;
  2294. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost)) {
  2295. DP_PEER_BC_INCC_PKT(txrx_peer, 1, msdu_len,
  2296. enh_flag, link_id);
  2297. tid_stats->bcast_msdu_cnt++;
  2298. }
  2299. } else {
  2300. DP_PEER_UC_INCC_PKT(txrx_peer, 1, msdu_len,
  2301. enh_flag, link_id);
  2302. }
  2303. txrx_peer->stats[link_id].per_pkt_stats.rx.last_rx_ts =
  2304. qdf_system_ticks();
  2305. dp_rx_msdu_extd_stats_update(soc, nbuf, rx_tlv_hdr,
  2306. txrx_peer, link_id);
  2307. }
  2308. #ifndef WDS_VENDOR_EXTENSION
  2309. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr,
  2310. struct dp_vdev *vdev,
  2311. struct dp_txrx_peer *txrx_peer)
  2312. {
  2313. return 1;
  2314. }
  2315. #endif
  2316. #ifdef DP_RX_PKT_NO_PEER_DELIVER
  2317. #ifdef DP_RX_UDP_OVER_PEER_ROAM
  2318. /**
  2319. * dp_rx_is_udp_allowed_over_roam_peer() - check if udp data received
  2320. * during roaming
  2321. * @vdev: dp_vdev pointer
  2322. * @rx_tlv_hdr: rx tlv header
  2323. * @nbuf: pkt skb pointer
  2324. *
  2325. * This function will check if rx udp data is received from authorised
  2326. * roamed peer before peer map indication is received from FW after
  2327. * roaming. This is needed for VoIP scenarios in which packet loss
  2328. * expected during roaming is minimal.
  2329. *
  2330. * Return: bool
  2331. */
  2332. static bool dp_rx_is_udp_allowed_over_roam_peer(struct dp_vdev *vdev,
  2333. uint8_t *rx_tlv_hdr,
  2334. qdf_nbuf_t nbuf)
  2335. {
  2336. char *hdr_desc;
  2337. struct ieee80211_frame *wh = NULL;
  2338. hdr_desc = hal_rx_desc_get_80211_hdr(vdev->pdev->soc->hal_soc,
  2339. rx_tlv_hdr);
  2340. wh = (struct ieee80211_frame *)hdr_desc;
  2341. if (vdev->roaming_peer_status ==
  2342. WLAN_ROAM_PEER_AUTH_STATUS_AUTHENTICATED &&
  2343. !qdf_mem_cmp(vdev->roaming_peer_mac.raw, wh->i_addr2,
  2344. QDF_MAC_ADDR_SIZE) && (qdf_nbuf_is_ipv4_udp_pkt(nbuf) ||
  2345. qdf_nbuf_is_ipv6_udp_pkt(nbuf)))
  2346. return true;
  2347. return false;
  2348. }
  2349. #else
  2350. static bool dp_rx_is_udp_allowed_over_roam_peer(struct dp_vdev *vdev,
  2351. uint8_t *rx_tlv_hdr,
  2352. qdf_nbuf_t nbuf)
  2353. {
  2354. return false;
  2355. }
  2356. #endif
  2357. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  2358. {
  2359. uint16_t peer_id;
  2360. uint8_t vdev_id;
  2361. struct dp_vdev *vdev = NULL;
  2362. uint32_t l2_hdr_offset = 0;
  2363. uint16_t msdu_len = 0;
  2364. uint32_t pkt_len = 0;
  2365. uint8_t *rx_tlv_hdr;
  2366. uint32_t frame_mask = FRAME_MASK_IPV4_ARP | FRAME_MASK_IPV4_DHCP |
  2367. FRAME_MASK_IPV4_EAPOL | FRAME_MASK_IPV6_DHCP;
  2368. bool is_special_frame = false;
  2369. struct dp_peer *peer = NULL;
  2370. peer_id = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  2371. if (peer_id > soc->max_peer_id)
  2372. goto deliver_fail;
  2373. vdev_id = QDF_NBUF_CB_RX_VDEV_ID(nbuf);
  2374. vdev = dp_vdev_get_ref_by_id(soc, vdev_id, DP_MOD_ID_RX);
  2375. if (!vdev || vdev->delete.pending)
  2376. goto deliver_fail;
  2377. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf)))
  2378. goto deliver_fail;
  2379. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  2380. l2_hdr_offset =
  2381. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, rx_tlv_hdr);
  2382. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2383. pkt_len = msdu_len + l2_hdr_offset + soc->rx_pkt_tlv_size;
  2384. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(nbuf) = 1;
  2385. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  2386. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size + l2_hdr_offset);
  2387. is_special_frame = dp_rx_is_special_frame(nbuf, frame_mask);
  2388. if (qdf_likely(vdev->osif_rx)) {
  2389. if (is_special_frame ||
  2390. dp_rx_is_udp_allowed_over_roam_peer(vdev, rx_tlv_hdr,
  2391. nbuf)) {
  2392. qdf_nbuf_set_exc_frame(nbuf, 1);
  2393. if (QDF_STATUS_SUCCESS !=
  2394. vdev->osif_rx(vdev->osif_vdev, nbuf))
  2395. goto deliver_fail;
  2396. DP_STATS_INC(soc, rx.err.pkt_delivered_no_peer, 1);
  2397. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_RX);
  2398. return;
  2399. }
  2400. } else if (is_special_frame) {
  2401. /*
  2402. * If MLO connection, txrx_peer for link peer does not exist,
  2403. * try to store these RX packets to txrx_peer's bufq of MLD
  2404. * peer until vdev->osif_rx is registered from CP and flush
  2405. * them to stack.
  2406. */
  2407. peer = dp_peer_get_tgt_peer_by_id(soc, peer_id,
  2408. DP_MOD_ID_RX);
  2409. if (!peer)
  2410. goto deliver_fail;
  2411. /* only check for MLO connection */
  2412. if (IS_MLO_DP_MLD_PEER(peer) && peer->txrx_peer &&
  2413. dp_rx_is_peer_cache_bufq_supported()) {
  2414. qdf_nbuf_set_exc_frame(nbuf, 1);
  2415. if (QDF_STATUS_SUCCESS ==
  2416. dp_rx_enqueue_rx(peer, peer->txrx_peer, nbuf)) {
  2417. DP_STATS_INC(soc,
  2418. rx.err.pkt_delivered_no_peer,
  2419. 1);
  2420. } else {
  2421. DP_STATS_INC(soc,
  2422. rx.err.rx_invalid_peer.num,
  2423. 1);
  2424. }
  2425. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_RX);
  2426. dp_peer_unref_delete(peer, DP_MOD_ID_RX);
  2427. return;
  2428. }
  2429. dp_peer_unref_delete(peer, DP_MOD_ID_RX);
  2430. }
  2431. deliver_fail:
  2432. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  2433. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  2434. dp_rx_nbuf_free(nbuf);
  2435. if (vdev)
  2436. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_RX);
  2437. }
  2438. #else
  2439. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  2440. {
  2441. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  2442. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  2443. dp_rx_nbuf_free(nbuf);
  2444. }
  2445. #endif
  2446. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  2447. #ifdef WLAN_SUPPORT_RX_FISA
  2448. void dp_rx_skip_tlvs(struct dp_soc *soc, qdf_nbuf_t nbuf, uint32_t l3_padding)
  2449. {
  2450. QDF_NBUF_CB_RX_PACKET_L3_HDR_PAD(nbuf) = l3_padding;
  2451. qdf_nbuf_pull_head(nbuf, l3_padding + soc->rx_pkt_tlv_size);
  2452. }
  2453. #else
  2454. void dp_rx_skip_tlvs(struct dp_soc *soc, qdf_nbuf_t nbuf, uint32_t l3_padding)
  2455. {
  2456. qdf_nbuf_pull_head(nbuf, l3_padding + soc->rx_pkt_tlv_size);
  2457. }
  2458. #endif
  2459. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  2460. #ifdef DP_RX_DROP_RAW_FRM
  2461. bool dp_rx_is_raw_frame_dropped(qdf_nbuf_t nbuf)
  2462. {
  2463. if (qdf_nbuf_is_raw_frame(nbuf)) {
  2464. dp_rx_nbuf_free(nbuf);
  2465. return true;
  2466. }
  2467. return false;
  2468. }
  2469. #endif
  2470. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  2471. void dp_rx_update_stats(struct dp_soc *soc, qdf_nbuf_t nbuf)
  2472. {
  2473. DP_STATS_INC_PKT(soc, rx.ingress, 1,
  2474. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  2475. }
  2476. #endif
  2477. #ifdef WLAN_FEATURE_PKT_CAPTURE_V2
  2478. void dp_rx_deliver_to_pkt_capture(struct dp_soc *soc, struct dp_pdev *pdev,
  2479. uint16_t peer_id, uint32_t is_offload,
  2480. qdf_nbuf_t netbuf)
  2481. {
  2482. if (wlan_cfg_get_pkt_capture_mode(soc->wlan_cfg_ctx))
  2483. dp_wdi_event_handler(WDI_EVENT_PKT_CAPTURE_RX_DATA, soc, netbuf,
  2484. peer_id, is_offload, pdev->pdev_id);
  2485. }
  2486. void dp_rx_deliver_to_pkt_capture_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf,
  2487. uint32_t is_offload)
  2488. {
  2489. if (wlan_cfg_get_pkt_capture_mode(soc->wlan_cfg_ctx))
  2490. dp_wdi_event_handler(WDI_EVENT_PKT_CAPTURE_RX_DATA_NO_PEER,
  2491. soc, nbuf, HTT_INVALID_VDEV,
  2492. is_offload, 0);
  2493. }
  2494. #endif
  2495. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  2496. QDF_STATUS dp_rx_vdev_detach(struct dp_vdev *vdev)
  2497. {
  2498. QDF_STATUS ret;
  2499. if (vdev->osif_rx_flush) {
  2500. ret = vdev->osif_rx_flush(vdev->osif_vdev, vdev->vdev_id);
  2501. if (!QDF_IS_STATUS_SUCCESS(ret)) {
  2502. dp_err("Failed to flush rx pkts for vdev %d",
  2503. vdev->vdev_id);
  2504. return ret;
  2505. }
  2506. }
  2507. return QDF_STATUS_SUCCESS;
  2508. }
  2509. static QDF_STATUS
  2510. dp_pdev_nbuf_alloc_and_map(struct dp_soc *dp_soc,
  2511. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  2512. struct dp_pdev *dp_pdev,
  2513. struct rx_desc_pool *rx_desc_pool)
  2514. {
  2515. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  2516. (nbuf_frag_info_t->virt_addr).nbuf =
  2517. qdf_nbuf_alloc(dp_soc->osdev, rx_desc_pool->buf_size,
  2518. RX_BUFFER_RESERVATION,
  2519. rx_desc_pool->buf_alignment, FALSE);
  2520. if (!((nbuf_frag_info_t->virt_addr).nbuf)) {
  2521. dp_err("nbuf alloc failed");
  2522. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  2523. return ret;
  2524. }
  2525. ret = qdf_nbuf_map_nbytes_single(dp_soc->osdev,
  2526. (nbuf_frag_info_t->virt_addr).nbuf,
  2527. QDF_DMA_FROM_DEVICE,
  2528. rx_desc_pool->buf_size);
  2529. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  2530. qdf_nbuf_free((nbuf_frag_info_t->virt_addr).nbuf);
  2531. dp_err("nbuf map failed");
  2532. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  2533. return ret;
  2534. }
  2535. nbuf_frag_info_t->paddr =
  2536. qdf_nbuf_get_frag_paddr((nbuf_frag_info_t->virt_addr).nbuf, 0);
  2537. ret = dp_check_paddr(dp_soc, &((nbuf_frag_info_t->virt_addr).nbuf),
  2538. &nbuf_frag_info_t->paddr,
  2539. rx_desc_pool);
  2540. if (ret == QDF_STATUS_E_FAILURE) {
  2541. dp_err("nbuf check x86 failed");
  2542. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  2543. return ret;
  2544. }
  2545. return QDF_STATUS_SUCCESS;
  2546. }
  2547. QDF_STATUS
  2548. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  2549. struct dp_srng *dp_rxdma_srng,
  2550. struct rx_desc_pool *rx_desc_pool,
  2551. uint32_t num_req_buffers)
  2552. {
  2553. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  2554. hal_ring_handle_t rxdma_srng = dp_rxdma_srng->hal_srng;
  2555. union dp_rx_desc_list_elem_t *next;
  2556. void *rxdma_ring_entry;
  2557. qdf_dma_addr_t paddr;
  2558. struct dp_rx_nbuf_frag_info *nf_info;
  2559. uint32_t nr_descs, nr_nbuf = 0, nr_nbuf_total = 0;
  2560. uint32_t buffer_index, nbuf_ptrs_per_page;
  2561. qdf_nbuf_t nbuf;
  2562. QDF_STATUS ret;
  2563. int page_idx, total_pages;
  2564. union dp_rx_desc_list_elem_t *desc_list = NULL;
  2565. union dp_rx_desc_list_elem_t *tail = NULL;
  2566. int sync_hw_ptr = 1;
  2567. uint32_t num_entries_avail;
  2568. if (qdf_unlikely(!dp_pdev)) {
  2569. dp_rx_err("%pK: pdev is null for mac_id = %d",
  2570. dp_soc, mac_id);
  2571. return QDF_STATUS_E_FAILURE;
  2572. }
  2573. if (qdf_unlikely(!rxdma_srng)) {
  2574. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  2575. return QDF_STATUS_E_FAILURE;
  2576. }
  2577. dp_debug("requested %u RX buffers for driver attach", num_req_buffers);
  2578. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  2579. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  2580. rxdma_srng,
  2581. sync_hw_ptr);
  2582. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2583. if (!num_entries_avail) {
  2584. dp_err("Num of available entries is zero, nothing to do");
  2585. return QDF_STATUS_E_NOMEM;
  2586. }
  2587. if (num_entries_avail < num_req_buffers)
  2588. num_req_buffers = num_entries_avail;
  2589. nr_descs = dp_rx_get_free_desc_list(dp_soc, mac_id, rx_desc_pool,
  2590. num_req_buffers, &desc_list, &tail);
  2591. if (!nr_descs) {
  2592. dp_err("no free rx_descs in freelist");
  2593. DP_STATS_INC(dp_pdev, err.desc_alloc_fail, num_req_buffers);
  2594. return QDF_STATUS_E_NOMEM;
  2595. }
  2596. dp_debug("got %u RX descs for driver attach", nr_descs);
  2597. /*
  2598. * Try to allocate pointers to the nbuf one page at a time.
  2599. * Take pointers that can fit in one page of memory and
  2600. * iterate through the total descriptors that need to be
  2601. * allocated in order of pages. Reuse the pointers that
  2602. * have been allocated to fit in one page across each
  2603. * iteration to index into the nbuf.
  2604. */
  2605. total_pages = (nr_descs * sizeof(*nf_info)) / DP_BLOCKMEM_SIZE;
  2606. /*
  2607. * Add an extra page to store the remainder if any
  2608. */
  2609. if ((nr_descs * sizeof(*nf_info)) % DP_BLOCKMEM_SIZE)
  2610. total_pages++;
  2611. nf_info = qdf_mem_malloc(DP_BLOCKMEM_SIZE);
  2612. if (!nf_info) {
  2613. dp_err("failed to allocate nbuf array");
  2614. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  2615. QDF_BUG(0);
  2616. return QDF_STATUS_E_NOMEM;
  2617. }
  2618. nbuf_ptrs_per_page = DP_BLOCKMEM_SIZE / sizeof(*nf_info);
  2619. for (page_idx = 0; page_idx < total_pages; page_idx++) {
  2620. qdf_mem_zero(nf_info, DP_BLOCKMEM_SIZE);
  2621. for (nr_nbuf = 0; nr_nbuf < nbuf_ptrs_per_page; nr_nbuf++) {
  2622. /*
  2623. * The last page of buffer pointers may not be required
  2624. * completely based on the number of descriptors. Below
  2625. * check will ensure we are allocating only the
  2626. * required number of descriptors.
  2627. */
  2628. if (nr_nbuf_total >= nr_descs)
  2629. break;
  2630. /* Flag is set while pdev rx_desc_pool initialization */
  2631. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  2632. ret = dp_pdev_frag_alloc_and_map(dp_soc,
  2633. &nf_info[nr_nbuf], dp_pdev,
  2634. rx_desc_pool);
  2635. else
  2636. ret = dp_pdev_nbuf_alloc_and_map(dp_soc,
  2637. &nf_info[nr_nbuf], dp_pdev,
  2638. rx_desc_pool);
  2639. if (QDF_IS_STATUS_ERROR(ret))
  2640. break;
  2641. nr_nbuf_total++;
  2642. }
  2643. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  2644. for (buffer_index = 0; buffer_index < nr_nbuf; buffer_index++) {
  2645. rxdma_ring_entry =
  2646. hal_srng_src_get_next(dp_soc->hal_soc,
  2647. rxdma_srng);
  2648. qdf_assert_always(rxdma_ring_entry);
  2649. next = desc_list->next;
  2650. paddr = nf_info[buffer_index].paddr;
  2651. nbuf = nf_info[buffer_index].virt_addr.nbuf;
  2652. /* Flag is set while pdev rx_desc_pool initialization */
  2653. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  2654. dp_rx_desc_frag_prep(&desc_list->rx_desc,
  2655. &nf_info[buffer_index]);
  2656. else
  2657. dp_rx_desc_prep(&desc_list->rx_desc,
  2658. &nf_info[buffer_index]);
  2659. desc_list->rx_desc.in_use = 1;
  2660. dp_rx_desc_alloc_dbg_info(&desc_list->rx_desc);
  2661. dp_rx_desc_update_dbg_info(&desc_list->rx_desc,
  2662. __func__,
  2663. RX_DESC_REPLENISHED);
  2664. hal_rxdma_buff_addr_info_set(dp_soc->hal_soc ,rxdma_ring_entry, paddr,
  2665. desc_list->rx_desc.cookie,
  2666. rx_desc_pool->owner);
  2667. dp_ipa_handle_rx_buf_smmu_mapping(
  2668. dp_soc, nbuf,
  2669. rx_desc_pool->buf_size, true,
  2670. __func__, __LINE__);
  2671. dp_audio_smmu_map(dp_soc->osdev,
  2672. qdf_mem_paddr_from_dmaaddr(dp_soc->osdev,
  2673. QDF_NBUF_CB_PADDR(nbuf)),
  2674. QDF_NBUF_CB_PADDR(nbuf),
  2675. rx_desc_pool->buf_size);
  2676. desc_list = next;
  2677. }
  2678. dp_rx_refill_ring_record_entry(dp_soc, dp_pdev->lmac_id,
  2679. rxdma_srng, nr_nbuf, nr_nbuf);
  2680. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2681. }
  2682. dp_info("filled %u RX buffers for driver attach", nr_nbuf_total);
  2683. qdf_mem_free(nf_info);
  2684. if (!nr_nbuf_total) {
  2685. dp_err("No nbuf's allocated");
  2686. QDF_BUG(0);
  2687. return QDF_STATUS_E_RESOURCES;
  2688. }
  2689. /* No need to count the number of bytes received during replenish.
  2690. * Therefore set replenish.pkts.bytes as 0.
  2691. */
  2692. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, nr_nbuf, 0);
  2693. return QDF_STATUS_SUCCESS;
  2694. }
  2695. qdf_export_symbol(dp_pdev_rx_buffers_attach);
  2696. #ifdef DP_RX_MON_MEM_FRAG
  2697. void dp_rx_enable_mon_dest_frag(struct rx_desc_pool *rx_desc_pool,
  2698. bool is_mon_dest_desc)
  2699. {
  2700. rx_desc_pool->rx_mon_dest_frag_enable = is_mon_dest_desc;
  2701. if (is_mon_dest_desc)
  2702. dp_alert("Feature DP_RX_MON_MEM_FRAG for mon_dest is enabled");
  2703. }
  2704. #else
  2705. void dp_rx_enable_mon_dest_frag(struct rx_desc_pool *rx_desc_pool,
  2706. bool is_mon_dest_desc)
  2707. {
  2708. rx_desc_pool->rx_mon_dest_frag_enable = false;
  2709. if (is_mon_dest_desc)
  2710. dp_alert("Feature DP_RX_MON_MEM_FRAG for mon_dest is disabled");
  2711. }
  2712. #endif
  2713. qdf_export_symbol(dp_rx_enable_mon_dest_frag);
  2714. QDF_STATUS
  2715. dp_rx_pdev_desc_pool_alloc(struct dp_pdev *pdev)
  2716. {
  2717. struct dp_soc *soc = pdev->soc;
  2718. uint32_t rxdma_entries;
  2719. uint32_t rx_sw_desc_num;
  2720. struct dp_srng *dp_rxdma_srng;
  2721. struct rx_desc_pool *rx_desc_pool;
  2722. uint32_t status = QDF_STATUS_SUCCESS;
  2723. int mac_for_pdev;
  2724. mac_for_pdev = pdev->lmac_id;
  2725. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2726. dp_rx_info("%pK: nss-wifi<4> skip Rx refil %d",
  2727. soc, mac_for_pdev);
  2728. return status;
  2729. }
  2730. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2731. rxdma_entries = dp_rxdma_srng->num_entries;
  2732. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2733. rx_sw_desc_num = wlan_cfg_get_dp_soc_rx_sw_desc_num(soc->wlan_cfg_ctx);
  2734. rx_desc_pool->desc_type = DP_RX_DESC_BUF_TYPE;
  2735. status = dp_rx_desc_pool_alloc(soc,
  2736. rx_sw_desc_num,
  2737. rx_desc_pool);
  2738. if (status != QDF_STATUS_SUCCESS)
  2739. return status;
  2740. return status;
  2741. }
  2742. void dp_rx_pdev_desc_pool_free(struct dp_pdev *pdev)
  2743. {
  2744. int mac_for_pdev = pdev->lmac_id;
  2745. struct dp_soc *soc = pdev->soc;
  2746. struct rx_desc_pool *rx_desc_pool;
  2747. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2748. dp_rx_desc_pool_free(soc, rx_desc_pool);
  2749. }
  2750. QDF_STATUS dp_rx_pdev_desc_pool_init(struct dp_pdev *pdev)
  2751. {
  2752. int mac_for_pdev = pdev->lmac_id;
  2753. struct dp_soc *soc = pdev->soc;
  2754. uint32_t rxdma_entries;
  2755. uint32_t rx_sw_desc_num;
  2756. struct dp_srng *dp_rxdma_srng;
  2757. struct rx_desc_pool *rx_desc_pool;
  2758. uint32_t target_type = hal_get_target_type(soc->hal_soc);
  2759. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2760. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2761. /*
  2762. * If NSS is enabled, rx_desc_pool is already filled.
  2763. * Hence, just disable desc_pool frag flag.
  2764. */
  2765. dp_rx_enable_mon_dest_frag(rx_desc_pool, false);
  2766. dp_rx_info("%pK: nss-wifi<4> skip Rx refil %d",
  2767. soc, mac_for_pdev);
  2768. return QDF_STATUS_SUCCESS;
  2769. }
  2770. if (dp_rx_desc_pool_is_allocated(rx_desc_pool) == QDF_STATUS_E_NOMEM)
  2771. return QDF_STATUS_E_NOMEM;
  2772. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2773. rxdma_entries = dp_rxdma_srng->num_entries;
  2774. soc->process_rx_status = CONFIG_PROCESS_RX_STATUS;
  2775. rx_sw_desc_num =
  2776. wlan_cfg_get_dp_soc_rx_sw_desc_num(soc->wlan_cfg_ctx);
  2777. rx_desc_pool->owner = dp_rx_get_rx_bm_id(soc);
  2778. rx_desc_pool->buf_size = RX_DATA_BUFFER_SIZE;
  2779. rx_desc_pool->buf_alignment = RX_DATA_BUFFER_ALIGNMENT;
  2780. /* Disable monitor dest processing via frag */
  2781. if (target_type == TARGET_TYPE_QCN9160) {
  2782. rx_desc_pool->buf_size = RX_MONITOR_BUFFER_SIZE;
  2783. rx_desc_pool->buf_alignment = RX_MONITOR_BUFFER_ALIGNMENT;
  2784. dp_rx_enable_mon_dest_frag(rx_desc_pool, true);
  2785. } else {
  2786. dp_rx_enable_mon_dest_frag(rx_desc_pool, false);
  2787. }
  2788. dp_rx_desc_pool_init(soc, mac_for_pdev,
  2789. rx_sw_desc_num, rx_desc_pool);
  2790. return QDF_STATUS_SUCCESS;
  2791. }
  2792. void dp_rx_pdev_desc_pool_deinit(struct dp_pdev *pdev)
  2793. {
  2794. int mac_for_pdev = pdev->lmac_id;
  2795. struct dp_soc *soc = pdev->soc;
  2796. struct rx_desc_pool *rx_desc_pool;
  2797. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2798. dp_rx_desc_pool_deinit(soc, rx_desc_pool, mac_for_pdev);
  2799. }
  2800. QDF_STATUS
  2801. dp_rx_pdev_buffers_alloc(struct dp_pdev *pdev)
  2802. {
  2803. int mac_for_pdev = pdev->lmac_id;
  2804. struct dp_soc *soc = pdev->soc;
  2805. struct dp_srng *dp_rxdma_srng;
  2806. struct rx_desc_pool *rx_desc_pool;
  2807. uint32_t rxdma_entries;
  2808. uint32_t target_type = hal_get_target_type(soc->hal_soc);
  2809. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2810. rxdma_entries = dp_rxdma_srng->num_entries;
  2811. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2812. /* Initialize RX buffer pool which will be
  2813. * used during low memory conditions
  2814. */
  2815. dp_rx_buffer_pool_init(soc, mac_for_pdev);
  2816. if (target_type == TARGET_TYPE_QCN9160)
  2817. return dp_pdev_rx_buffers_attach(soc, mac_for_pdev,
  2818. dp_rxdma_srng,
  2819. rx_desc_pool,
  2820. rxdma_entries - 1);
  2821. else
  2822. return dp_pdev_rx_buffers_attach_simple(soc, mac_for_pdev,
  2823. dp_rxdma_srng,
  2824. rx_desc_pool,
  2825. rxdma_entries - 1);
  2826. }
  2827. void
  2828. dp_rx_pdev_buffers_free(struct dp_pdev *pdev)
  2829. {
  2830. int mac_for_pdev = pdev->lmac_id;
  2831. struct dp_soc *soc = pdev->soc;
  2832. struct rx_desc_pool *rx_desc_pool;
  2833. uint32_t target_type = hal_get_target_type(soc->hal_soc);
  2834. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2835. if (target_type == TARGET_TYPE_QCN9160)
  2836. dp_rx_desc_frag_free(soc, rx_desc_pool);
  2837. else
  2838. dp_rx_desc_nbuf_free(soc, rx_desc_pool, false);
  2839. dp_rx_buffer_pool_deinit(soc, mac_for_pdev);
  2840. }
  2841. #ifdef DP_RX_SPECIAL_FRAME_NEED
  2842. bool dp_rx_deliver_special_frame(struct dp_soc *soc,
  2843. struct dp_txrx_peer *txrx_peer,
  2844. qdf_nbuf_t nbuf, uint32_t frame_mask,
  2845. uint8_t *rx_tlv_hdr)
  2846. {
  2847. uint32_t l2_hdr_offset = 0;
  2848. uint16_t msdu_len = 0;
  2849. uint32_t skip_len;
  2850. l2_hdr_offset =
  2851. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, rx_tlv_hdr);
  2852. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  2853. skip_len = l2_hdr_offset;
  2854. } else {
  2855. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2856. skip_len = l2_hdr_offset + soc->rx_pkt_tlv_size;
  2857. qdf_nbuf_set_pktlen(nbuf, msdu_len + skip_len);
  2858. }
  2859. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(nbuf) = 1;
  2860. dp_rx_set_hdr_pad(nbuf, l2_hdr_offset);
  2861. qdf_nbuf_pull_head(nbuf, skip_len);
  2862. if (txrx_peer->vdev) {
  2863. dp_rx_send_pktlog(soc, txrx_peer->vdev->pdev, nbuf,
  2864. QDF_TX_RX_STATUS_OK);
  2865. }
  2866. if (dp_rx_is_special_frame(nbuf, frame_mask)) {
  2867. dp_info("special frame, mpdu sn 0x%x",
  2868. hal_rx_get_rx_sequence(soc->hal_soc, rx_tlv_hdr));
  2869. qdf_nbuf_set_exc_frame(nbuf, 1);
  2870. dp_rx_deliver_to_stack(soc, txrx_peer->vdev, txrx_peer,
  2871. nbuf, NULL);
  2872. return true;
  2873. }
  2874. return false;
  2875. }
  2876. #endif
  2877. #ifdef QCA_MULTIPASS_SUPPORT
  2878. bool dp_rx_multipass_process(struct dp_txrx_peer *txrx_peer, qdf_nbuf_t nbuf,
  2879. uint8_t tid)
  2880. {
  2881. struct vlan_ethhdr *vethhdrp;
  2882. if (qdf_unlikely(!txrx_peer->vlan_id))
  2883. return true;
  2884. vethhdrp = (struct vlan_ethhdr *)qdf_nbuf_data(nbuf);
  2885. /*
  2886. * h_vlan_proto & h_vlan_TCI should be 0x8100 & zero respectively
  2887. * as it is expected to be padded by 0
  2888. * return false if frame doesn't have above tag so that caller will
  2889. * drop the frame.
  2890. */
  2891. if (qdf_unlikely(vethhdrp->h_vlan_proto != htons(QDF_ETH_TYPE_8021Q)) ||
  2892. qdf_unlikely(vethhdrp->h_vlan_TCI != 0))
  2893. return false;
  2894. vethhdrp->h_vlan_TCI = htons(((tid & 0x7) << VLAN_PRIO_SHIFT) |
  2895. (txrx_peer->vlan_id & VLAN_VID_MASK));
  2896. if (vethhdrp->h_vlan_encapsulated_proto == htons(ETHERTYPE_PAE))
  2897. dp_tx_remove_vlan_tag(txrx_peer->vdev, nbuf);
  2898. return true;
  2899. }
  2900. #endif /* QCA_MULTIPASS_SUPPORT */