qcrypto.c 149 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * QTI Crypto driver
  4. *
  5. * Copyright (c) 2010-2021, The Linux Foundation. All rights reserved.
  6. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
  7. */
  8. #include <linux/module.h>
  9. #include <linux/device.h>
  10. #include <linux/mod_devicetable.h>
  11. #include <linux/clk.h>
  12. #include <linux/cpu.h>
  13. #include <linux/types.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/dma-mapping.h>
  16. #include <linux/dmapool.h>
  17. #include <linux/crypto.h>
  18. #include <linux/kernel.h>
  19. #include <linux/rtnetlink.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/spinlock.h>
  22. #include <linux/llist.h>
  23. #include <linux/debugfs.h>
  24. #include <linux/workqueue.h>
  25. #include <linux/sched.h>
  26. #include <linux/init.h>
  27. #include <linux/cache.h>
  28. #include <linux/interconnect.h>
  29. #include <linux/hardirq.h>
  30. #include "qcrypto.h"
  31. #include "qcom_crypto_device.h"
  32. #include <crypto/ctr.h>
  33. #include <crypto/des.h>
  34. #include <crypto/aes.h>
  35. #include <crypto/sha1.h>
  36. #include <crypto/sha2.h>
  37. #include <crypto/hash.h>
  38. #include <crypto/algapi.h>
  39. #include <crypto/aead.h>
  40. #include <crypto/authenc.h>
  41. #include <crypto/scatterwalk.h>
  42. #include <crypto/skcipher.h>
  43. #include <crypto/internal/skcipher.h>
  44. #include <crypto/internal/hash.h>
  45. #include <crypto/internal/aead.h>
  46. #include "fips_status.h"
  47. #include "qce.h"
  48. #define DEBUG_MAX_FNAME 16
  49. #define DEBUG_MAX_RW_BUF 4096
  50. #define QCRYPTO_BIG_NUMBER 9999999 /* a big number */
  51. /*
  52. * For crypto 5.0 which has burst size alignment requirement.
  53. */
  54. #define MAX_ALIGN_SIZE 0x40
  55. #define QCRYPTO_HIGH_BANDWIDTH_TIMEOUT 1000
  56. /* Status of response workq */
  57. enum resp_workq_sts {
  58. NOT_SCHEDULED = 0,
  59. IS_SCHEDULED = 1,
  60. SCHEDULE_AGAIN = 2
  61. };
  62. /* Status of req processing by CEs */
  63. enum req_processing_sts {
  64. STOPPED = 0,
  65. IN_PROGRESS = 1
  66. };
  67. enum qcrypto_bus_state {
  68. BUS_NO_BANDWIDTH = 0,
  69. BUS_HAS_BANDWIDTH,
  70. BUS_BANDWIDTH_RELEASING,
  71. BUS_BANDWIDTH_ALLOCATING,
  72. BUS_SUSPENDED,
  73. BUS_SUSPENDING,
  74. };
  75. struct crypto_stat {
  76. u64 aead_sha1_aes_enc;
  77. u64 aead_sha1_aes_dec;
  78. u64 aead_sha1_des_enc;
  79. u64 aead_sha1_des_dec;
  80. u64 aead_sha1_3des_enc;
  81. u64 aead_sha1_3des_dec;
  82. u64 aead_sha256_aes_enc;
  83. u64 aead_sha256_aes_dec;
  84. u64 aead_sha256_des_enc;
  85. u64 aead_sha256_des_dec;
  86. u64 aead_sha256_3des_enc;
  87. u64 aead_sha256_3des_dec;
  88. u64 aead_ccm_aes_enc;
  89. u64 aead_ccm_aes_dec;
  90. u64 aead_rfc4309_ccm_aes_enc;
  91. u64 aead_rfc4309_ccm_aes_dec;
  92. u64 aead_op_success;
  93. u64 aead_op_fail;
  94. u64 aead_bad_msg;
  95. u64 sk_cipher_aes_enc;
  96. u64 sk_cipher_aes_dec;
  97. u64 sk_cipher_des_enc;
  98. u64 sk_cipher_des_dec;
  99. u64 sk_cipher_3des_enc;
  100. u64 sk_cipher_3des_dec;
  101. u64 sk_cipher_op_success;
  102. u64 sk_cipher_op_fail;
  103. u64 sha1_digest;
  104. u64 sha256_digest;
  105. u64 sha1_hmac_digest;
  106. u64 sha256_hmac_digest;
  107. u64 ahash_op_success;
  108. u64 ahash_op_fail;
  109. };
  110. static struct crypto_stat _qcrypto_stat;
  111. static struct dentry *_debug_dent;
  112. static char _debug_read_buf[DEBUG_MAX_RW_BUF];
  113. static bool _qcrypto_init_assign;
  114. struct crypto_priv;
  115. struct qcrypto_req_control {
  116. unsigned int index;
  117. bool in_use;
  118. struct crypto_engine *pce;
  119. struct crypto_async_request *req;
  120. struct qcrypto_resp_ctx *arsp;
  121. int res; /* execution result */
  122. };
  123. struct crypto_engine {
  124. struct list_head elist;
  125. void *qce; /* qce handle */
  126. struct platform_device *pdev; /* platform device */
  127. struct crypto_priv *pcp;
  128. struct icc_path *icc_path;
  129. struct crypto_queue req_queue; /*
  130. * request queue for those requests
  131. * that have this engine assigned
  132. * waiting to be executed
  133. */
  134. u64 total_req;
  135. u64 err_req;
  136. u32 unit;
  137. u32 ce_device;
  138. u32 ce_hw_instance;
  139. unsigned int signature;
  140. enum qcrypto_bus_state bw_state;
  141. bool high_bw_req;
  142. struct timer_list bw_reaper_timer;
  143. struct work_struct bw_reaper_ws;
  144. struct work_struct bw_allocate_ws;
  145. /* engine execution sequence number */
  146. u32 active_seq;
  147. /* last QCRYPTO_HIGH_BANDWIDTH_TIMEOUT active_seq */
  148. u32 last_active_seq;
  149. bool check_flag;
  150. /*Added to support multi-requests*/
  151. unsigned int max_req;
  152. struct qcrypto_req_control *preq_pool;
  153. atomic_t req_count;
  154. bool issue_req; /* an request is being issued to qce */
  155. bool first_engine; /* this engine is the first engine or not */
  156. unsigned int irq_cpu; /* the cpu running the irq of this engine */
  157. unsigned int max_req_used; /* debug stats */
  158. };
  159. #define MAX_SMP_CPU 8
  160. struct crypto_priv {
  161. /* CE features supported by target device*/
  162. struct msm_ce_hw_support platform_support;
  163. /* CE features/algorithms supported by HW engine*/
  164. struct ce_hw_support ce_support;
  165. /* the lock protects crypto queue and req */
  166. spinlock_t lock;
  167. /* list of registered algorithms */
  168. struct list_head alg_list;
  169. /* current active request */
  170. struct crypto_async_request *req;
  171. struct work_struct unlock_ce_ws;
  172. struct list_head engine_list; /* list of qcrypto engines */
  173. int32_t total_units; /* total units of engines */
  174. struct mutex engine_lock;
  175. struct crypto_engine *next_engine; /* next assign engine */
  176. struct crypto_queue req_queue; /*
  177. * request queue for those requests
  178. * that waiting for an available
  179. * engine.
  180. */
  181. struct llist_head ordered_resp_list; /* Queue to maintain
  182. * responses in sequence.
  183. */
  184. atomic_t resp_cnt;
  185. struct workqueue_struct *resp_wq;
  186. struct work_struct resp_work; /*
  187. * Workq to send responses
  188. * in sequence.
  189. */
  190. enum resp_workq_sts sched_resp_workq_status;
  191. enum req_processing_sts ce_req_proc_sts;
  192. int cpu_getting_irqs_frm_first_ce;
  193. struct crypto_engine *first_engine;
  194. struct crypto_engine *scheduled_eng; /* last engine scheduled */
  195. /* debug stats */
  196. unsigned int no_avail;
  197. unsigned int resp_stop;
  198. unsigned int resp_start;
  199. unsigned int max_qlen;
  200. unsigned int queue_work_eng3;
  201. unsigned int queue_work_not_eng3;
  202. unsigned int queue_work_not_eng3_nz;
  203. unsigned int max_resp_qlen;
  204. unsigned int max_reorder_cnt;
  205. unsigned int cpu_req[MAX_SMP_CPU+1];
  206. };
  207. static struct crypto_priv qcrypto_dev;
  208. static struct crypto_engine *_qcrypto_static_assign_engine(
  209. struct crypto_priv *cp);
  210. static struct crypto_engine *_avail_eng(struct crypto_priv *cp);
  211. static struct qcrypto_req_control *qcrypto_alloc_req_control(
  212. struct crypto_engine *pce)
  213. {
  214. int i;
  215. struct qcrypto_req_control *pqcrypto_req_control = pce->preq_pool;
  216. unsigned int req_count;
  217. for (i = 0; i < pce->max_req; i++) {
  218. if (!xchg(&pqcrypto_req_control->in_use, true)) {
  219. req_count = atomic_inc_return(&pce->req_count);
  220. if (req_count > pce->max_req_used)
  221. pce->max_req_used = req_count;
  222. return pqcrypto_req_control;
  223. }
  224. pqcrypto_req_control++;
  225. }
  226. return NULL;
  227. }
  228. static void qcrypto_free_req_control(struct crypto_engine *pce,
  229. struct qcrypto_req_control *preq)
  230. {
  231. /* do this before free req */
  232. preq->req = NULL;
  233. preq->arsp = NULL;
  234. /* free req */
  235. if (!xchg(&preq->in_use, false))
  236. pr_warn("request info %pK free already\n", preq);
  237. else
  238. atomic_dec(&pce->req_count);
  239. }
  240. static struct qcrypto_req_control *find_req_control_for_areq(
  241. struct crypto_engine *pce,
  242. struct crypto_async_request *areq)
  243. {
  244. int i;
  245. struct qcrypto_req_control *pqcrypto_req_control = pce->preq_pool;
  246. for (i = 0; i < pce->max_req; i++) {
  247. if (pqcrypto_req_control->req == areq)
  248. return pqcrypto_req_control;
  249. pqcrypto_req_control++;
  250. }
  251. return NULL;
  252. }
  253. static void qcrypto_init_req_control(struct crypto_engine *pce,
  254. struct qcrypto_req_control *pqcrypto_req_control)
  255. {
  256. int i;
  257. pce->preq_pool = pqcrypto_req_control;
  258. atomic_set(&pce->req_count, 0);
  259. for (i = 0; i < pce->max_req; i++) {
  260. pqcrypto_req_control->index = i;
  261. pqcrypto_req_control->in_use = false;
  262. pqcrypto_req_control->pce = pce;
  263. pqcrypto_req_control++;
  264. }
  265. }
  266. static struct crypto_engine *_qrypto_find_pengine_device(struct crypto_priv *cp,
  267. unsigned int device)
  268. {
  269. struct crypto_engine *entry = NULL;
  270. unsigned long flags;
  271. spin_lock_irqsave(&cp->lock, flags);
  272. list_for_each_entry(entry, &cp->engine_list, elist) {
  273. if (entry->ce_device == device)
  274. break;
  275. }
  276. spin_unlock_irqrestore(&cp->lock, flags);
  277. if (((entry != NULL) && (entry->ce_device != device)) ||
  278. (entry == NULL)) {
  279. pr_err("Device node for CE device %d NOT FOUND!!\n",
  280. device);
  281. return NULL;
  282. }
  283. return entry;
  284. }
  285. static struct crypto_engine *_qrypto_find_pengine_device_hw
  286. (struct crypto_priv *cp,
  287. u32 device,
  288. u32 hw_instance)
  289. {
  290. struct crypto_engine *entry = NULL;
  291. unsigned long flags;
  292. spin_lock_irqsave(&cp->lock, flags);
  293. list_for_each_entry(entry, &cp->engine_list, elist) {
  294. if ((entry->ce_device == device) &&
  295. (entry->ce_hw_instance == hw_instance))
  296. break;
  297. }
  298. spin_unlock_irqrestore(&cp->lock, flags);
  299. if (((entry != NULL) &&
  300. ((entry->ce_device != device)
  301. || (entry->ce_hw_instance != hw_instance)))
  302. || (entry == NULL)) {
  303. pr_err("Device node for CE device %d NOT FOUND!!\n",
  304. device);
  305. return NULL;
  306. }
  307. return entry;
  308. }
  309. int qcrypto_get_num_engines(void)
  310. {
  311. struct crypto_priv *cp = &qcrypto_dev;
  312. struct crypto_engine *entry = NULL;
  313. int count = 0;
  314. list_for_each_entry(entry, &cp->engine_list, elist) {
  315. count++;
  316. }
  317. return count;
  318. }
  319. EXPORT_SYMBOL(qcrypto_get_num_engines);
  320. void qcrypto_get_engine_list(size_t num_engines,
  321. struct crypto_engine_entry *arr)
  322. {
  323. struct crypto_priv *cp = &qcrypto_dev;
  324. struct crypto_engine *entry = NULL;
  325. size_t arr_index = 0;
  326. list_for_each_entry(entry, &cp->engine_list, elist) {
  327. arr[arr_index].ce_device = entry->ce_device;
  328. arr[arr_index].hw_instance = entry->ce_hw_instance;
  329. arr_index++;
  330. if (arr_index >= num_engines)
  331. break;
  332. }
  333. }
  334. EXPORT_SYMBOL(qcrypto_get_engine_list);
  335. enum qcrypto_alg_type {
  336. QCRYPTO_ALG_CIPHER = 0,
  337. QCRYPTO_ALG_SHA = 1,
  338. QCRYPTO_ALG_AEAD = 2,
  339. QCRYPTO_ALG_LAST
  340. };
  341. struct qcrypto_alg {
  342. struct list_head entry;
  343. struct skcipher_alg cipher_alg;
  344. struct ahash_alg sha_alg;
  345. struct aead_alg aead_alg;
  346. enum qcrypto_alg_type alg_type;
  347. struct crypto_priv *cp;
  348. };
  349. #define QCRYPTO_MAX_KEY_SIZE 64
  350. /* max of AES_BLOCK_SIZE, DES3_EDE_BLOCK_SIZE */
  351. #define QCRYPTO_MAX_IV_LENGTH 16
  352. #define QCRYPTO_CCM4309_NONCE_LEN 3
  353. struct qcrypto_cipher_ctx {
  354. struct list_head rsp_queue; /* response queue */
  355. struct crypto_engine *pengine; /* fixed engine assigned to this tfm */
  356. struct crypto_priv *cp;
  357. unsigned int flags;
  358. enum qce_hash_alg_enum auth_alg; /* for aead */
  359. u8 auth_key[QCRYPTO_MAX_KEY_SIZE];
  360. u8 iv[QCRYPTO_MAX_IV_LENGTH];
  361. u8 enc_key[QCRYPTO_MAX_KEY_SIZE];
  362. unsigned int enc_key_len;
  363. unsigned int authsize;
  364. unsigned int auth_key_len;
  365. u8 ccm4309_nonce[QCRYPTO_CCM4309_NONCE_LEN];
  366. struct crypto_sync_skcipher *cipher_aes192_fb;
  367. struct crypto_ahash *ahash_aead_aes192_fb;
  368. };
  369. struct qcrypto_resp_ctx {
  370. struct list_head list;
  371. struct llist_node llist;
  372. struct crypto_async_request *async_req; /* async req */
  373. int res; /* execution result */
  374. };
  375. struct qcrypto_cipher_req_ctx {
  376. struct qcrypto_resp_ctx rsp_entry;/* rsp entry. */
  377. struct crypto_engine *pengine; /* engine assigned to this request */
  378. u8 *iv;
  379. u8 rfc4309_iv[QCRYPTO_MAX_IV_LENGTH];
  380. unsigned int ivsize;
  381. int aead;
  382. int ccmtype; /* default: 0, rfc4309: 1 */
  383. struct scatterlist asg; /* Formatted associated data sg */
  384. unsigned char *adata; /* Pointer to formatted assoc data */
  385. enum qce_cipher_alg_enum alg;
  386. enum qce_cipher_dir_enum dir;
  387. enum qce_cipher_mode_enum mode;
  388. struct scatterlist *orig_src; /* Original src sg ptr */
  389. struct scatterlist *orig_dst; /* Original dst sg ptr */
  390. struct scatterlist dsg; /* Dest Data sg */
  391. struct scatterlist ssg; /* Source Data sg */
  392. unsigned char *data; /* Incoming data pointer*/
  393. struct aead_request *aead_req;
  394. struct ahash_request *fb_hash_req;
  395. uint8_t fb_ahash_digest[SHA256_DIGEST_SIZE];
  396. struct scatterlist fb_ablkcipher_src_sg[2];
  397. struct scatterlist fb_ablkcipher_dst_sg[2];
  398. char *fb_aes_iv;
  399. unsigned int fb_ahash_length;
  400. struct skcipher_request *fb_aes_req;
  401. struct scatterlist *fb_aes_src;
  402. struct scatterlist *fb_aes_dst;
  403. unsigned int fb_aes_cryptlen;
  404. };
  405. #define SHA_MAX_BLOCK_SIZE SHA256_BLOCK_SIZE
  406. #define SHA_MAX_STATE_SIZE (SHA256_DIGEST_SIZE / sizeof(u32))
  407. #define SHA_MAX_DIGEST_SIZE SHA256_DIGEST_SIZE
  408. #define MSM_QCRYPTO_REQ_QUEUE_LENGTH 768
  409. #define COMPLETION_CB_BACKLOG_LENGTH_STOP 400
  410. #define COMPLETION_CB_BACKLOG_LENGTH_START \
  411. (COMPLETION_CB_BACKLOG_LENGTH_STOP / 2)
  412. static uint8_t _std_init_vector_sha1_uint8[] = {
  413. 0x67, 0x45, 0x23, 0x01, 0xEF, 0xCD, 0xAB, 0x89,
  414. 0x98, 0xBA, 0xDC, 0xFE, 0x10, 0x32, 0x54, 0x76,
  415. 0xC3, 0xD2, 0xE1, 0xF0
  416. };
  417. /* standard initialization vector for SHA-256, source: FIPS 180-2 */
  418. static uint8_t _std_init_vector_sha256_uint8[] = {
  419. 0x6A, 0x09, 0xE6, 0x67, 0xBB, 0x67, 0xAE, 0x85,
  420. 0x3C, 0x6E, 0xF3, 0x72, 0xA5, 0x4F, 0xF5, 0x3A,
  421. 0x51, 0x0E, 0x52, 0x7F, 0x9B, 0x05, 0x68, 0x8C,
  422. 0x1F, 0x83, 0xD9, 0xAB, 0x5B, 0xE0, 0xCD, 0x19
  423. };
  424. struct qcrypto_sha_ctx {
  425. struct list_head rsp_queue; /* response queue */
  426. struct crypto_engine *pengine; /* fixed engine assigned to this tfm */
  427. struct crypto_priv *cp;
  428. unsigned int flags;
  429. enum qce_hash_alg_enum alg;
  430. uint32_t diglen;
  431. uint32_t authkey_in_len;
  432. uint8_t authkey[SHA_MAX_BLOCK_SIZE];
  433. struct ahash_request *ahash_req;
  434. struct completion ahash_req_complete;
  435. };
  436. struct qcrypto_sha_req_ctx {
  437. struct qcrypto_resp_ctx rsp_entry;/* rsp entry. */
  438. struct crypto_engine *pengine; /* engine assigned to this request */
  439. struct scatterlist *src;
  440. uint32_t nbytes;
  441. struct scatterlist *orig_src; /* Original src sg ptr */
  442. struct scatterlist dsg; /* Data sg */
  443. unsigned char *data; /* Incoming data pointer*/
  444. unsigned char *data2; /* Updated data pointer*/
  445. uint32_t byte_count[4];
  446. u64 count;
  447. uint8_t first_blk;
  448. uint8_t last_blk;
  449. uint8_t trailing_buf[SHA_MAX_BLOCK_SIZE];
  450. uint32_t trailing_buf_len;
  451. /* dma buffer, Internal use */
  452. uint8_t staging_dmabuf
  453. [SHA_MAX_BLOCK_SIZE+SHA_MAX_DIGEST_SIZE+MAX_ALIGN_SIZE];
  454. uint8_t digest[SHA_MAX_DIGEST_SIZE];
  455. struct scatterlist sg[2];
  456. };
  457. static void _byte_stream_to_words(uint32_t *iv, unsigned char *b,
  458. unsigned int len)
  459. {
  460. unsigned int n;
  461. n = len / sizeof(uint32_t);
  462. for (; n > 0; n--) {
  463. *iv = ((*b << 24) & 0xff000000) |
  464. (((*(b+1)) << 16) & 0xff0000) |
  465. (((*(b+2)) << 8) & 0xff00) |
  466. (*(b+3) & 0xff);
  467. b += sizeof(uint32_t);
  468. iv++;
  469. }
  470. n = len % sizeof(uint32_t);
  471. if (n == 3) {
  472. *iv = ((*b << 24) & 0xff000000) |
  473. (((*(b+1)) << 16) & 0xff0000) |
  474. (((*(b+2)) << 8) & 0xff00);
  475. } else if (n == 2) {
  476. *iv = ((*b << 24) & 0xff000000) |
  477. (((*(b+1)) << 16) & 0xff0000);
  478. } else if (n == 1) {
  479. *iv = ((*b << 24) & 0xff000000);
  480. }
  481. }
  482. static void _words_to_byte_stream(uint32_t *iv, unsigned char *b,
  483. unsigned int len)
  484. {
  485. unsigned int n = len / sizeof(uint32_t);
  486. for (; n > 0; n--) {
  487. *b++ = (unsigned char) ((*iv >> 24) & 0xff);
  488. *b++ = (unsigned char) ((*iv >> 16) & 0xff);
  489. *b++ = (unsigned char) ((*iv >> 8) & 0xff);
  490. *b++ = (unsigned char) (*iv & 0xff);
  491. iv++;
  492. }
  493. n = len % sizeof(uint32_t);
  494. if (n == 3) {
  495. *b++ = (unsigned char) ((*iv >> 24) & 0xff);
  496. *b++ = (unsigned char) ((*iv >> 16) & 0xff);
  497. *b = (unsigned char) ((*iv >> 8) & 0xff);
  498. } else if (n == 2) {
  499. *b++ = (unsigned char) ((*iv >> 24) & 0xff);
  500. *b = (unsigned char) ((*iv >> 16) & 0xff);
  501. } else if (n == 1) {
  502. *b = (unsigned char) ((*iv >> 24) & 0xff);
  503. }
  504. }
  505. static void qcrypto_ce_set_bus(struct crypto_engine *pengine,
  506. bool high_bw_req)
  507. {
  508. struct crypto_priv *cp = pengine->pcp;
  509. unsigned int control_flag;
  510. int ret = 0;
  511. if (cp->ce_support.req_bw_before_clk) {
  512. if (high_bw_req)
  513. control_flag = QCE_BW_REQUEST_FIRST;
  514. else
  515. control_flag = QCE_CLK_DISABLE_FIRST;
  516. } else {
  517. if (high_bw_req)
  518. control_flag = QCE_CLK_ENABLE_FIRST;
  519. else
  520. control_flag = QCE_BW_REQUEST_RESET_FIRST;
  521. }
  522. switch (control_flag) {
  523. case QCE_CLK_ENABLE_FIRST:
  524. ret = qce_enable_clk(pengine->qce);
  525. if (ret) {
  526. pr_err("%s Unable enable clk\n", __func__);
  527. return;
  528. }
  529. ret = icc_set_bw(pengine->icc_path,
  530. CRYPTO_AVG_BW, CRYPTO_PEAK_BW);
  531. if (ret) {
  532. pr_err("%s Unable to set high bw\n", __func__);
  533. ret = qce_disable_clk(pengine->qce);
  534. if (ret)
  535. pr_err("%s Unable disable clk\n", __func__);
  536. return;
  537. }
  538. break;
  539. case QCE_BW_REQUEST_FIRST:
  540. ret = icc_set_bw(pengine->icc_path,
  541. CRYPTO_AVG_BW, CRYPTO_PEAK_BW);
  542. if (ret) {
  543. pr_err("%s Unable to set high bw\n", __func__);
  544. return;
  545. }
  546. ret = qce_enable_clk(pengine->qce);
  547. if (ret) {
  548. pr_err("%s Unable enable clk\n", __func__);
  549. ret = icc_set_bw(pengine->icc_path, 0, 0);
  550. if (ret)
  551. pr_err("%s Unable to set low bw\n", __func__);
  552. return;
  553. }
  554. break;
  555. case QCE_CLK_DISABLE_FIRST:
  556. ret = qce_disable_clk(pengine->qce);
  557. if (ret) {
  558. pr_err("%s Unable to disable clk\n", __func__);
  559. return;
  560. }
  561. ret = icc_set_bw(pengine->icc_path, 0, 0);
  562. if (ret) {
  563. pr_err("%s Unable to set low bw\n", __func__);
  564. ret = qce_enable_clk(pengine->qce);
  565. if (ret)
  566. pr_err("%s Unable enable clk\n", __func__);
  567. return;
  568. }
  569. break;
  570. case QCE_BW_REQUEST_RESET_FIRST:
  571. ret = icc_set_bw(pengine->icc_path, 0, 0);
  572. if (ret) {
  573. pr_err("%s Unable to set low bw\n", __func__);
  574. return;
  575. }
  576. ret = qce_disable_clk(pengine->qce);
  577. if (ret) {
  578. pr_err("%s Unable to disable clk\n", __func__);
  579. ret = icc_set_bw(pengine->icc_path,
  580. CRYPTO_AVG_BW, CRYPTO_PEAK_BW);
  581. if (ret)
  582. pr_err("%s Unable to set high bw\n", __func__);
  583. return;
  584. }
  585. break;
  586. default:
  587. return;
  588. }
  589. }
  590. static void qcrypto_bw_reaper_timer_callback(struct timer_list *data)
  591. {
  592. struct crypto_engine *pengine = from_timer(pengine, data,
  593. bw_reaper_timer);
  594. schedule_work(&pengine->bw_reaper_ws);
  595. }
  596. static void qcrypto_bw_set_timeout(struct crypto_engine *pengine)
  597. {
  598. pengine->bw_reaper_timer.expires = jiffies +
  599. msecs_to_jiffies(QCRYPTO_HIGH_BANDWIDTH_TIMEOUT);
  600. mod_timer(&(pengine->bw_reaper_timer),
  601. pengine->bw_reaper_timer.expires);
  602. }
  603. static void qcrypto_ce_bw_allocate_req(struct crypto_engine *pengine)
  604. {
  605. schedule_work(&pengine->bw_allocate_ws);
  606. }
  607. static int _start_qcrypto_process(struct crypto_priv *cp,
  608. struct crypto_engine *pengine);
  609. static void qcrypto_bw_allocate_work(struct work_struct *work)
  610. {
  611. struct crypto_engine *pengine = container_of(work,
  612. struct crypto_engine, bw_allocate_ws);
  613. unsigned long flags;
  614. struct crypto_priv *cp = pengine->pcp;
  615. spin_lock_irqsave(&cp->lock, flags);
  616. pengine->bw_state = BUS_BANDWIDTH_ALLOCATING;
  617. spin_unlock_irqrestore(&cp->lock, flags);
  618. qcrypto_ce_set_bus(pengine, true);
  619. qcrypto_bw_set_timeout(pengine);
  620. spin_lock_irqsave(&cp->lock, flags);
  621. pengine->bw_state = BUS_HAS_BANDWIDTH;
  622. pengine->high_bw_req = false;
  623. pengine->active_seq++;
  624. pengine->check_flag = true;
  625. spin_unlock_irqrestore(&cp->lock, flags);
  626. _start_qcrypto_process(cp, pengine);
  627. };
  628. static void qcrypto_bw_reaper_work(struct work_struct *work)
  629. {
  630. struct crypto_engine *pengine = container_of(work,
  631. struct crypto_engine, bw_reaper_ws);
  632. struct crypto_priv *cp = pengine->pcp;
  633. unsigned long flags;
  634. u32 active_seq;
  635. bool restart = false;
  636. spin_lock_irqsave(&cp->lock, flags);
  637. active_seq = pengine->active_seq;
  638. if (pengine->bw_state == BUS_HAS_BANDWIDTH &&
  639. (active_seq == pengine->last_active_seq)) {
  640. /* check if engine is stuck */
  641. if (atomic_read(&pengine->req_count) > 0) {
  642. if (pengine->check_flag)
  643. dev_warn(&pengine->pdev->dev,
  644. "The engine appears to be stuck seq %d.\n",
  645. active_seq);
  646. pengine->check_flag = false;
  647. goto ret;
  648. }
  649. pengine->bw_state = BUS_BANDWIDTH_RELEASING;
  650. spin_unlock_irqrestore(&cp->lock, flags);
  651. qcrypto_ce_set_bus(pengine, false);
  652. spin_lock_irqsave(&cp->lock, flags);
  653. if (pengine->high_bw_req) {
  654. /* we got request while we are disabling clock */
  655. pengine->bw_state = BUS_BANDWIDTH_ALLOCATING;
  656. spin_unlock_irqrestore(&cp->lock, flags);
  657. qcrypto_ce_set_bus(pengine, true);
  658. spin_lock_irqsave(&cp->lock, flags);
  659. pengine->bw_state = BUS_HAS_BANDWIDTH;
  660. pengine->high_bw_req = false;
  661. restart = true;
  662. } else
  663. pengine->bw_state = BUS_NO_BANDWIDTH;
  664. }
  665. ret:
  666. pengine->last_active_seq = active_seq;
  667. spin_unlock_irqrestore(&cp->lock, flags);
  668. if (restart)
  669. _start_qcrypto_process(cp, pengine);
  670. if (pengine->bw_state != BUS_NO_BANDWIDTH)
  671. qcrypto_bw_set_timeout(pengine);
  672. }
  673. static int qcrypto_count_sg(struct scatterlist *sg, int nbytes)
  674. {
  675. int i;
  676. for (i = 0; nbytes > 0 && sg != NULL; i++, sg = sg_next(sg))
  677. nbytes -= sg->length;
  678. return i;
  679. }
  680. static size_t qcrypto_sg_copy_from_buffer(struct scatterlist *sgl,
  681. unsigned int nents, void *buf, size_t buflen)
  682. {
  683. int i;
  684. size_t offset, len;
  685. for (i = 0, offset = 0; i < nents; ++i) {
  686. len = sg_copy_from_buffer(sgl, 1, buf, buflen);
  687. buf += len;
  688. buflen -= len;
  689. offset += len;
  690. sgl = sg_next(sgl);
  691. }
  692. return offset;
  693. }
  694. static size_t qcrypto_sg_copy_to_buffer(struct scatterlist *sgl,
  695. unsigned int nents, void *buf, size_t buflen)
  696. {
  697. int i;
  698. size_t offset, len;
  699. for (i = 0, offset = 0; i < nents; ++i) {
  700. len = sg_copy_to_buffer(sgl, 1, buf, buflen);
  701. buf += len;
  702. buflen -= len;
  703. offset += len;
  704. sgl = sg_next(sgl);
  705. }
  706. return offset;
  707. }
  708. static struct qcrypto_alg *_qcrypto_sha_alg_alloc(struct crypto_priv *cp,
  709. struct ahash_alg *template)
  710. {
  711. struct qcrypto_alg *q_alg;
  712. q_alg = kzalloc(sizeof(struct qcrypto_alg), GFP_KERNEL);
  713. if (!q_alg)
  714. return ERR_PTR(-ENOMEM);
  715. q_alg->alg_type = QCRYPTO_ALG_SHA;
  716. q_alg->sha_alg = *template;
  717. q_alg->cp = cp;
  718. return q_alg;
  719. }
  720. static struct qcrypto_alg *_qcrypto_cipher_alg_alloc(struct crypto_priv *cp,
  721. struct skcipher_alg *template)
  722. {
  723. struct qcrypto_alg *q_alg;
  724. q_alg = kzalloc(sizeof(struct qcrypto_alg), GFP_KERNEL);
  725. if (!q_alg)
  726. return ERR_PTR(-ENOMEM);
  727. q_alg->alg_type = QCRYPTO_ALG_CIPHER;
  728. q_alg->cipher_alg = *template;
  729. q_alg->cp = cp;
  730. return q_alg;
  731. }
  732. static struct qcrypto_alg *_qcrypto_aead_alg_alloc(struct crypto_priv *cp,
  733. struct aead_alg *template)
  734. {
  735. struct qcrypto_alg *q_alg;
  736. q_alg = kzalloc(sizeof(struct qcrypto_alg), GFP_KERNEL);
  737. if (!q_alg)
  738. return ERR_PTR(-ENOMEM);
  739. q_alg->alg_type = QCRYPTO_ALG_AEAD;
  740. q_alg->aead_alg = *template;
  741. q_alg->cp = cp;
  742. return q_alg;
  743. }
  744. static int _qcrypto_cipher_ctx_init(struct qcrypto_cipher_ctx *ctx,
  745. struct qcrypto_alg *q_alg)
  746. {
  747. if (!ctx || !q_alg) {
  748. pr_err("ctx or q_alg is NULL\n");
  749. return -EINVAL;
  750. }
  751. ctx->flags = 0;
  752. /* update context with ptr to cp */
  753. ctx->cp = q_alg->cp;
  754. /* random first IV */
  755. get_random_bytes(ctx->iv, QCRYPTO_MAX_IV_LENGTH);
  756. if (_qcrypto_init_assign) {
  757. ctx->pengine = _qcrypto_static_assign_engine(ctx->cp);
  758. if (ctx->pengine == NULL)
  759. return -ENODEV;
  760. } else
  761. ctx->pengine = NULL;
  762. INIT_LIST_HEAD(&ctx->rsp_queue);
  763. ctx->auth_alg = QCE_HASH_LAST;
  764. return 0;
  765. }
  766. static int _qcrypto_ahash_cra_init(struct crypto_tfm *tfm)
  767. {
  768. struct crypto_ahash *ahash = __crypto_ahash_cast(tfm);
  769. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(tfm);
  770. struct ahash_alg *alg = container_of(crypto_hash_alg_common(ahash),
  771. struct ahash_alg, halg);
  772. struct qcrypto_alg *q_alg = container_of(alg, struct qcrypto_alg,
  773. sha_alg);
  774. crypto_ahash_set_reqsize(ahash, sizeof(struct qcrypto_sha_req_ctx));
  775. /* update context with ptr to cp */
  776. sha_ctx->cp = q_alg->cp;
  777. sha_ctx->flags = 0;
  778. sha_ctx->ahash_req = NULL;
  779. if (_qcrypto_init_assign) {
  780. sha_ctx->pengine = _qcrypto_static_assign_engine(sha_ctx->cp);
  781. if (sha_ctx->pengine == NULL)
  782. return -ENODEV;
  783. } else
  784. sha_ctx->pengine = NULL;
  785. INIT_LIST_HEAD(&sha_ctx->rsp_queue);
  786. return 0;
  787. }
  788. static void _qcrypto_ahash_cra_exit(struct crypto_tfm *tfm)
  789. {
  790. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(tfm);
  791. if (!list_empty(&sha_ctx->rsp_queue))
  792. pr_err("%s: requests still outstanding\n", __func__);
  793. if (sha_ctx->ahash_req != NULL) {
  794. ahash_request_free(sha_ctx->ahash_req);
  795. sha_ctx->ahash_req = NULL;
  796. }
  797. }
  798. static void _crypto_sha_hmac_ahash_req_complete(
  799. struct crypto_async_request *req, int err);
  800. static int _qcrypto_ahash_hmac_cra_init(struct crypto_tfm *tfm)
  801. {
  802. struct crypto_ahash *ahash = __crypto_ahash_cast(tfm);
  803. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(tfm);
  804. int ret = 0;
  805. ret = _qcrypto_ahash_cra_init(tfm);
  806. if (ret)
  807. return ret;
  808. sha_ctx->ahash_req = ahash_request_alloc(ahash, GFP_KERNEL);
  809. if (sha_ctx->ahash_req == NULL) {
  810. _qcrypto_ahash_cra_exit(tfm);
  811. return -ENOMEM;
  812. }
  813. init_completion(&sha_ctx->ahash_req_complete);
  814. ahash_request_set_callback(sha_ctx->ahash_req,
  815. CRYPTO_TFM_REQ_MAY_BACKLOG,
  816. _crypto_sha_hmac_ahash_req_complete,
  817. &sha_ctx->ahash_req_complete);
  818. crypto_ahash_clear_flags(ahash, ~0);
  819. return 0;
  820. }
  821. static int _qcrypto_skcipher_init(struct crypto_skcipher *tfm)
  822. {
  823. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  824. struct skcipher_alg *alg = crypto_skcipher_alg(tfm);
  825. struct qcrypto_alg *q_alg;
  826. q_alg = container_of(alg, struct qcrypto_alg, cipher_alg);
  827. crypto_skcipher_set_reqsize(tfm, sizeof(struct qcrypto_cipher_req_ctx));
  828. return _qcrypto_cipher_ctx_init(ctx, q_alg);
  829. }
  830. static int _qcrypto_aes_skcipher_init(struct crypto_skcipher *tfm)
  831. {
  832. const char *name = crypto_tfm_alg_name(&tfm->base);
  833. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  834. int ret;
  835. struct crypto_priv *cp = &qcrypto_dev;
  836. if (cp->ce_support.use_sw_aes_cbc_ecb_ctr_algo) {
  837. ctx->cipher_aes192_fb = NULL;
  838. return _qcrypto_skcipher_init(tfm);
  839. }
  840. ctx->cipher_aes192_fb = crypto_alloc_sync_skcipher(name, 0,
  841. CRYPTO_ALG_ASYNC | CRYPTO_ALG_NEED_FALLBACK);
  842. if (IS_ERR(ctx->cipher_aes192_fb)) {
  843. pr_err("Error allocating fallback algo %s\n", name);
  844. ret = PTR_ERR(ctx->cipher_aes192_fb);
  845. ctx->cipher_aes192_fb = NULL;
  846. return ret;
  847. }
  848. return _qcrypto_skcipher_init(tfm);
  849. }
  850. static int _qcrypto_aead_cra_init(struct crypto_aead *tfm)
  851. {
  852. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(tfm);
  853. struct aead_alg *aeadalg = crypto_aead_alg(tfm);
  854. struct qcrypto_alg *q_alg = container_of(aeadalg, struct qcrypto_alg,
  855. aead_alg);
  856. return _qcrypto_cipher_ctx_init(ctx, q_alg);
  857. }
  858. static int _qcrypto_cra_aead_sha1_init(struct crypto_aead *tfm)
  859. {
  860. int rc;
  861. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(tfm);
  862. crypto_aead_set_reqsize(tfm, sizeof(struct qcrypto_cipher_req_ctx));
  863. rc = _qcrypto_aead_cra_init(tfm);
  864. ctx->auth_alg = QCE_HASH_SHA1_HMAC;
  865. return rc;
  866. }
  867. static int _qcrypto_cra_aead_sha256_init(struct crypto_aead *tfm)
  868. {
  869. int rc;
  870. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(tfm);
  871. crypto_aead_set_reqsize(tfm, sizeof(struct qcrypto_cipher_req_ctx));
  872. rc = _qcrypto_aead_cra_init(tfm);
  873. ctx->auth_alg = QCE_HASH_SHA256_HMAC;
  874. return rc;
  875. }
  876. static int _qcrypto_cra_aead_ccm_init(struct crypto_aead *tfm)
  877. {
  878. int rc;
  879. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(tfm);
  880. crypto_aead_set_reqsize(tfm, sizeof(struct qcrypto_cipher_req_ctx));
  881. rc = _qcrypto_aead_cra_init(tfm);
  882. ctx->auth_alg = QCE_HASH_AES_CMAC;
  883. return rc;
  884. }
  885. static int _qcrypto_cra_aead_rfc4309_ccm_init(struct crypto_aead *tfm)
  886. {
  887. int rc;
  888. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(tfm);
  889. crypto_aead_set_reqsize(tfm, sizeof(struct qcrypto_cipher_req_ctx));
  890. rc = _qcrypto_aead_cra_init(tfm);
  891. ctx->auth_alg = QCE_HASH_AES_CMAC;
  892. return rc;
  893. }
  894. static int _qcrypto_cra_aead_aes_sha1_init(struct crypto_aead *tfm)
  895. {
  896. int rc;
  897. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(tfm);
  898. struct crypto_priv *cp = &qcrypto_dev;
  899. crypto_aead_set_reqsize(tfm, sizeof(struct qcrypto_cipher_req_ctx));
  900. rc = _qcrypto_aead_cra_init(tfm);
  901. if (rc)
  902. return rc;
  903. ctx->cipher_aes192_fb = NULL;
  904. ctx->ahash_aead_aes192_fb = NULL;
  905. if (!cp->ce_support.aes_key_192) {
  906. ctx->cipher_aes192_fb = crypto_alloc_sync_skcipher(
  907. "cbc(aes)", 0, 0);
  908. if (IS_ERR(ctx->cipher_aes192_fb)) {
  909. ctx->cipher_aes192_fb = NULL;
  910. } else {
  911. ctx->ahash_aead_aes192_fb = crypto_alloc_ahash(
  912. "hmac(sha1)", 0, 0);
  913. if (IS_ERR(ctx->ahash_aead_aes192_fb)) {
  914. ctx->ahash_aead_aes192_fb = NULL;
  915. crypto_free_sync_skcipher(
  916. ctx->cipher_aes192_fb);
  917. ctx->cipher_aes192_fb = NULL;
  918. }
  919. }
  920. }
  921. ctx->auth_alg = QCE_HASH_SHA1_HMAC;
  922. return 0;
  923. }
  924. static int _qcrypto_cra_aead_aes_sha256_init(struct crypto_aead *tfm)
  925. {
  926. int rc;
  927. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(tfm);
  928. struct crypto_priv *cp = &qcrypto_dev;
  929. crypto_aead_set_reqsize(tfm, sizeof(struct qcrypto_cipher_req_ctx));
  930. rc = _qcrypto_aead_cra_init(tfm);
  931. if (rc)
  932. return rc;
  933. ctx->cipher_aes192_fb = NULL;
  934. ctx->ahash_aead_aes192_fb = NULL;
  935. if (!cp->ce_support.aes_key_192) {
  936. ctx->cipher_aes192_fb = crypto_alloc_sync_skcipher(
  937. "cbc(aes)", 0, 0);
  938. if (IS_ERR(ctx->cipher_aes192_fb)) {
  939. ctx->cipher_aes192_fb = NULL;
  940. } else {
  941. ctx->ahash_aead_aes192_fb = crypto_alloc_ahash(
  942. "hmac(sha256)", 0, 0);
  943. if (IS_ERR(ctx->ahash_aead_aes192_fb)) {
  944. ctx->ahash_aead_aes192_fb = NULL;
  945. crypto_free_sync_skcipher(
  946. ctx->cipher_aes192_fb);
  947. ctx->cipher_aes192_fb = NULL;
  948. }
  949. }
  950. }
  951. ctx->auth_alg = QCE_HASH_SHA256_HMAC;
  952. return 0;
  953. }
  954. static void _qcrypto_skcipher_exit(struct crypto_skcipher *tfm)
  955. {
  956. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  957. if (!list_empty(&ctx->rsp_queue))
  958. pr_err("_qcrypto__cra_skcipher_exit: requests still outstanding\n");
  959. }
  960. static void _qcrypto_aes_skcipher_exit(struct crypto_skcipher *tfm)
  961. {
  962. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  963. _qcrypto_skcipher_exit(tfm);
  964. if (ctx->cipher_aes192_fb)
  965. crypto_free_sync_skcipher(ctx->cipher_aes192_fb);
  966. ctx->cipher_aes192_fb = NULL;
  967. }
  968. static void _qcrypto_cra_aead_exit(struct crypto_aead *tfm)
  969. {
  970. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(tfm);
  971. if (!list_empty(&ctx->rsp_queue))
  972. pr_err("_qcrypto__cra_aead_exit: requests still outstanding\n");
  973. }
  974. static void _qcrypto_cra_aead_aes_exit(struct crypto_aead *tfm)
  975. {
  976. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(tfm);
  977. if (!list_empty(&ctx->rsp_queue))
  978. pr_err("_qcrypto__cra_aead_exit: requests still outstanding\n");
  979. if (ctx->cipher_aes192_fb)
  980. crypto_free_sync_skcipher(ctx->cipher_aes192_fb);
  981. if (ctx->ahash_aead_aes192_fb)
  982. crypto_free_ahash(ctx->ahash_aead_aes192_fb);
  983. ctx->cipher_aes192_fb = NULL;
  984. ctx->ahash_aead_aes192_fb = NULL;
  985. }
  986. static int _disp_stats(int id)
  987. {
  988. struct crypto_stat *pstat;
  989. int len = 0;
  990. unsigned long flags;
  991. struct crypto_priv *cp = &qcrypto_dev;
  992. struct crypto_engine *pe;
  993. int i;
  994. pstat = &_qcrypto_stat;
  995. len = scnprintf(_debug_read_buf, DEBUG_MAX_RW_BUF - 1,
  996. "\nQTI crypto accelerator %d Statistics\n",
  997. id + 1);
  998. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  999. " SK CIPHER AES encryption : %llu\n",
  1000. pstat->sk_cipher_aes_enc);
  1001. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1002. " SK CIPHER AES decryption : %llu\n",
  1003. pstat->sk_cipher_aes_dec);
  1004. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1005. " SK CIPHER DES encryption : %llu\n",
  1006. pstat->sk_cipher_des_enc);
  1007. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1008. " SK CIPHER DES decryption : %llu\n",
  1009. pstat->sk_cipher_des_dec);
  1010. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1011. " SK CIPHER 3DES encryption : %llu\n",
  1012. pstat->sk_cipher_3des_enc);
  1013. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1014. " SK CIPHER 3DES decryption : %llu\n",
  1015. pstat->sk_cipher_3des_dec);
  1016. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1017. " SK CIPHER operation success : %llu\n",
  1018. pstat->sk_cipher_op_success);
  1019. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1020. " SK CIPHER operation fail : %llu\n",
  1021. pstat->sk_cipher_op_fail);
  1022. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1023. "\n");
  1024. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1025. " AEAD SHA1-AES encryption : %llu\n",
  1026. pstat->aead_sha1_aes_enc);
  1027. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1028. " AEAD SHA1-AES decryption : %llu\n",
  1029. pstat->aead_sha1_aes_dec);
  1030. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1031. " AEAD SHA1-DES encryption : %llu\n",
  1032. pstat->aead_sha1_des_enc);
  1033. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1034. " AEAD SHA1-DES decryption : %llu\n",
  1035. pstat->aead_sha1_des_dec);
  1036. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1037. " AEAD SHA1-3DES encryption : %llu\n",
  1038. pstat->aead_sha1_3des_enc);
  1039. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1040. " AEAD SHA1-3DES decryption : %llu\n",
  1041. pstat->aead_sha1_3des_dec);
  1042. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1043. " AEAD SHA256-AES encryption : %llu\n",
  1044. pstat->aead_sha256_aes_enc);
  1045. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1046. " AEAD SHA256-AES decryption : %llu\n",
  1047. pstat->aead_sha256_aes_dec);
  1048. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1049. " AEAD SHA256-DES encryption : %llu\n",
  1050. pstat->aead_sha256_des_enc);
  1051. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1052. " AEAD SHA256-DES decryption : %llu\n",
  1053. pstat->aead_sha256_des_dec);
  1054. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1055. " AEAD SHA256-3DES encryption : %llu\n",
  1056. pstat->aead_sha256_3des_enc);
  1057. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1058. " AEAD SHA256-3DES decryption : %llu\n",
  1059. pstat->aead_sha256_3des_dec);
  1060. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1061. " AEAD CCM-AES encryption : %llu\n",
  1062. pstat->aead_ccm_aes_enc);
  1063. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1064. " AEAD CCM-AES decryption : %llu\n",
  1065. pstat->aead_ccm_aes_dec);
  1066. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1067. " AEAD RFC4309-CCM-AES encryption : %llu\n",
  1068. pstat->aead_rfc4309_ccm_aes_enc);
  1069. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1070. " AEAD RFC4309-CCM-AES decryption : %llu\n",
  1071. pstat->aead_rfc4309_ccm_aes_dec);
  1072. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1073. " AEAD operation success : %llu\n",
  1074. pstat->aead_op_success);
  1075. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1076. " AEAD operation fail : %llu\n",
  1077. pstat->aead_op_fail);
  1078. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1079. " AEAD bad message : %llu\n",
  1080. pstat->aead_bad_msg);
  1081. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1082. "\n");
  1083. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1084. " AHASH SHA1 digest : %llu\n",
  1085. pstat->sha1_digest);
  1086. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1087. " AHASH SHA256 digest : %llu\n",
  1088. pstat->sha256_digest);
  1089. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1090. " AHASH SHA1 HMAC digest : %llu\n",
  1091. pstat->sha1_hmac_digest);
  1092. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1093. " AHASH SHA256 HMAC digest : %llu\n",
  1094. pstat->sha256_hmac_digest);
  1095. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1096. " AHASH operation success : %llu\n",
  1097. pstat->ahash_op_success);
  1098. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1099. " AHASH operation fail : %llu\n",
  1100. pstat->ahash_op_fail);
  1101. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1102. " resp start, resp stop, max rsp queue reorder-cnt : %u %u %u %u\n",
  1103. cp->resp_start, cp->resp_stop,
  1104. cp->max_resp_qlen, cp->max_reorder_cnt);
  1105. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1106. " max queue length, no avail : %u %u\n",
  1107. cp->max_qlen, cp->no_avail);
  1108. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1109. " work queue : %u %u %u\n",
  1110. cp->queue_work_eng3,
  1111. cp->queue_work_not_eng3,
  1112. cp->queue_work_not_eng3_nz);
  1113. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1114. "\n");
  1115. spin_lock_irqsave(&cp->lock, flags);
  1116. list_for_each_entry(pe, &cp->engine_list, elist) {
  1117. len += scnprintf(
  1118. _debug_read_buf + len,
  1119. DEBUG_MAX_RW_BUF - len - 1,
  1120. " Engine %4d Req max %d : %llu\n",
  1121. pe->unit,
  1122. pe->max_req_used,
  1123. pe->total_req
  1124. );
  1125. len += scnprintf(
  1126. _debug_read_buf + len,
  1127. DEBUG_MAX_RW_BUF - len - 1,
  1128. " Engine %4d Req Error : %llu\n",
  1129. pe->unit,
  1130. pe->err_req
  1131. );
  1132. qce_get_driver_stats(pe->qce);
  1133. }
  1134. spin_unlock_irqrestore(&cp->lock, flags);
  1135. for (i = 0; i < MAX_SMP_CPU+1; i++)
  1136. if (cp->cpu_req[i])
  1137. len += scnprintf(
  1138. _debug_read_buf + len,
  1139. DEBUG_MAX_RW_BUF - len - 1,
  1140. "CPU %d Issue Req : %d\n",
  1141. i, cp->cpu_req[i]);
  1142. return len;
  1143. }
  1144. static void _qcrypto_remove_engine(struct crypto_engine *pengine)
  1145. {
  1146. struct crypto_priv *cp;
  1147. struct qcrypto_alg *q_alg;
  1148. struct qcrypto_alg *n;
  1149. unsigned long flags;
  1150. struct crypto_engine *pe;
  1151. cp = pengine->pcp;
  1152. spin_lock_irqsave(&cp->lock, flags);
  1153. list_del(&pengine->elist);
  1154. if (pengine->first_engine) {
  1155. cp->first_engine = NULL;
  1156. pe = list_first_entry(&cp->engine_list, struct crypto_engine,
  1157. elist);
  1158. if (pe) {
  1159. pe->first_engine = true;
  1160. cp->first_engine = pe;
  1161. }
  1162. }
  1163. if (cp->next_engine == pengine)
  1164. cp->next_engine = NULL;
  1165. if (cp->scheduled_eng == pengine)
  1166. cp->scheduled_eng = NULL;
  1167. spin_unlock_irqrestore(&cp->lock, flags);
  1168. cp->total_units--;
  1169. cancel_work_sync(&pengine->bw_reaper_ws);
  1170. cancel_work_sync(&pengine->bw_allocate_ws);
  1171. del_timer_sync(&pengine->bw_reaper_timer);
  1172. if (pengine->icc_path)
  1173. icc_put(pengine->icc_path);
  1174. pengine->icc_path = NULL;
  1175. kfree_sensitive(pengine->preq_pool);
  1176. if (cp->total_units)
  1177. return;
  1178. list_for_each_entry_safe(q_alg, n, &cp->alg_list, entry) {
  1179. if (q_alg->alg_type == QCRYPTO_ALG_CIPHER)
  1180. crypto_unregister_skcipher(&q_alg->cipher_alg);
  1181. if (q_alg->alg_type == QCRYPTO_ALG_SHA)
  1182. crypto_unregister_ahash(&q_alg->sha_alg);
  1183. if (q_alg->alg_type == QCRYPTO_ALG_AEAD)
  1184. crypto_unregister_aead(&q_alg->aead_alg);
  1185. list_del(&q_alg->entry);
  1186. kfree_sensitive(q_alg);
  1187. }
  1188. }
  1189. static int _qcrypto_remove(struct platform_device *pdev)
  1190. {
  1191. struct crypto_engine *pengine;
  1192. struct crypto_priv *cp;
  1193. pengine = platform_get_drvdata(pdev);
  1194. if (!pengine)
  1195. return 0;
  1196. cp = pengine->pcp;
  1197. mutex_lock(&cp->engine_lock);
  1198. _qcrypto_remove_engine(pengine);
  1199. mutex_unlock(&cp->engine_lock);
  1200. if (pengine->qce)
  1201. qce_close(pengine->qce);
  1202. kfree_sensitive(pengine);
  1203. return 0;
  1204. }
  1205. static int _qcrypto_check_aes_keylen(struct crypto_priv *cp, unsigned int len)
  1206. {
  1207. switch (len) {
  1208. case AES_KEYSIZE_128:
  1209. case AES_KEYSIZE_256:
  1210. break;
  1211. case AES_KEYSIZE_192:
  1212. if (cp->ce_support.aes_key_192)
  1213. break;
  1214. else
  1215. return -EINVAL;
  1216. default:
  1217. //crypto_ablkcipher_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
  1218. return -EINVAL;
  1219. }
  1220. return 0;
  1221. }
  1222. static int _qcrypto_setkey_aes_192_fallback(struct crypto_skcipher *tfm,
  1223. const u8 *key)
  1224. {
  1225. //struct crypto_tfm *tfm = crypto_ablkcipher_tfm(cipher);
  1226. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  1227. int ret;
  1228. ctx->enc_key_len = AES_KEYSIZE_192;
  1229. crypto_sync_skcipher_clear_flags(ctx->cipher_aes192_fb,
  1230. CRYPTO_TFM_REQ_MASK);
  1231. crypto_sync_skcipher_set_flags(ctx->cipher_aes192_fb,
  1232. (crypto_skcipher_get_flags(tfm) & CRYPTO_TFM_REQ_MASK));
  1233. ret = crypto_sync_skcipher_setkey(ctx->cipher_aes192_fb, key,
  1234. AES_KEYSIZE_192);
  1235. /*
  1236. * TODO: delete or find equivalent in new crypto_skcipher api
  1237. if (ret) {
  1238. tfm->crt_flags &= ~CRYPTO_TFM_RES_MASK;
  1239. tfm->crt_flags |=
  1240. (cipher->base.crt_flags & CRYPTO_TFM_RES_MASK);
  1241. }
  1242. */
  1243. return ret;
  1244. }
  1245. static int _qcrypto_setkey_aes(struct crypto_skcipher *tfm, const u8 *key,
  1246. unsigned int keylen)
  1247. {
  1248. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  1249. struct crypto_priv *cp = ctx->cp;
  1250. if ((ctx->flags & QCRYPTO_CTX_USE_HW_KEY) == QCRYPTO_CTX_USE_HW_KEY)
  1251. return 0;
  1252. if ((keylen == AES_KEYSIZE_192) && (!cp->ce_support.aes_key_192)
  1253. && ctx->cipher_aes192_fb)
  1254. return _qcrypto_setkey_aes_192_fallback(tfm, key);
  1255. if (_qcrypto_check_aes_keylen(cp, keylen))
  1256. return -EINVAL;
  1257. ctx->enc_key_len = keylen;
  1258. if (!(ctx->flags & QCRYPTO_CTX_USE_PIPE_KEY)) {
  1259. if (key != NULL) {
  1260. memcpy(ctx->enc_key, key, keylen);
  1261. } else {
  1262. pr_err("%s Invalid key pointer\n", __func__);
  1263. return -EINVAL;
  1264. }
  1265. }
  1266. return 0;
  1267. }
  1268. static int _qcrypto_setkey_aes_xts(struct crypto_skcipher *tfm,
  1269. const u8 *key, unsigned int keylen)
  1270. {
  1271. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  1272. struct crypto_priv *cp = ctx->cp;
  1273. if ((ctx->flags & QCRYPTO_CTX_USE_HW_KEY) == QCRYPTO_CTX_USE_HW_KEY)
  1274. return 0;
  1275. if (_qcrypto_check_aes_keylen(cp, keylen/2))
  1276. return -EINVAL;
  1277. ctx->enc_key_len = keylen;
  1278. if (!(ctx->flags & QCRYPTO_CTX_USE_PIPE_KEY)) {
  1279. if (key != NULL) {
  1280. memcpy(ctx->enc_key, key, keylen);
  1281. } else {
  1282. pr_err("%s Invalid key pointer\n", __func__);
  1283. return -EINVAL;
  1284. }
  1285. }
  1286. return 0;
  1287. }
  1288. static int _qcrypto_setkey_des(struct crypto_skcipher *tfm, const u8 *key,
  1289. unsigned int keylen)
  1290. {
  1291. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  1292. struct des_ctx dctx;
  1293. if (!key) {
  1294. pr_err("%s Invalid key pointer\n", __func__);
  1295. return -EINVAL;
  1296. }
  1297. if ((ctx->flags & QCRYPTO_CTX_USE_HW_KEY) == QCRYPTO_CTX_USE_HW_KEY) {
  1298. pr_err("%s HW KEY usage not supported for DES algorithm\n", __func__);
  1299. return 0;
  1300. }
  1301. if (keylen != DES_KEY_SIZE) {
  1302. //crypto_ablkcipher_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
  1303. return -EINVAL;
  1304. }
  1305. memset(&dctx, 0, sizeof(dctx));
  1306. /*Need to be fixed. Compilation error was seen with the below API.
  1307. Needs to be uncommented and enable
  1308. if (des_expand_key(&dctx, key, keylen) == -ENOKEY) {
  1309. if (crypto_skcipher_get_flags(tfm) & CRYPTO_TFM_REQ_FORBID_WEAK_KEYS)
  1310. return -EINVAL;
  1311. else
  1312. return 0;
  1313. }*/
  1314. /*
  1315. * TODO: delete of find equivalent in skcipher api
  1316. if (ret) {
  1317. tfm->crt_flags |= CRYPTO_TFM_RES_WEAK_KEY;
  1318. crypto_tfm_set_flags(tfm, CRYPTO_TFM_RES_WEAK_KEY);
  1319. return -EINVAL;
  1320. }
  1321. */
  1322. ctx->enc_key_len = keylen;
  1323. if (!(ctx->flags & QCRYPTO_CTX_USE_PIPE_KEY))
  1324. memcpy(ctx->enc_key, key, keylen);
  1325. return 0;
  1326. }
  1327. static int _qcrypto_setkey_3des(struct crypto_skcipher *tfm, const u8 *key,
  1328. unsigned int keylen)
  1329. {
  1330. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  1331. if ((ctx->flags & QCRYPTO_CTX_USE_HW_KEY) == QCRYPTO_CTX_USE_HW_KEY) {
  1332. pr_err("%s HW KEY usage not supported for 3DES algorithm\n", __func__);
  1333. return 0;
  1334. }
  1335. if (keylen != DES3_EDE_KEY_SIZE) {
  1336. //crypto_ablkcipher_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
  1337. return -EINVAL;
  1338. }
  1339. ctx->enc_key_len = keylen;
  1340. if (!(ctx->flags & QCRYPTO_CTX_USE_PIPE_KEY)) {
  1341. if (key != NULL) {
  1342. memcpy(ctx->enc_key, key, keylen);
  1343. } else {
  1344. pr_err("%s Invalid key pointer\n", __func__);
  1345. return -EINVAL;
  1346. }
  1347. }
  1348. return 0;
  1349. }
  1350. static void seq_response(struct work_struct *work)
  1351. {
  1352. struct crypto_priv *cp = container_of(work, struct crypto_priv,
  1353. resp_work);
  1354. struct llist_node *list;
  1355. struct llist_node *rev = NULL;
  1356. struct crypto_engine *pengine;
  1357. unsigned long flags;
  1358. int total_unit;
  1359. again:
  1360. list = llist_del_all(&cp->ordered_resp_list);
  1361. if (!list)
  1362. goto end;
  1363. while (list) {
  1364. struct llist_node *t = list;
  1365. list = llist_next(list);
  1366. t->next = rev;
  1367. rev = t;
  1368. }
  1369. while (rev) {
  1370. struct qcrypto_resp_ctx *arsp;
  1371. struct crypto_async_request *areq;
  1372. arsp = container_of(rev, struct qcrypto_resp_ctx, llist);
  1373. rev = llist_next(rev);
  1374. areq = arsp->async_req;
  1375. local_bh_disable();
  1376. areq->complete(areq, arsp->res);
  1377. local_bh_enable();
  1378. atomic_dec(&cp->resp_cnt);
  1379. }
  1380. if (atomic_read(&cp->resp_cnt) < COMPLETION_CB_BACKLOG_LENGTH_START &&
  1381. (cmpxchg(&cp->ce_req_proc_sts, STOPPED, IN_PROGRESS)
  1382. == STOPPED)) {
  1383. cp->resp_start++;
  1384. for (total_unit = cp->total_units; total_unit-- > 0;) {
  1385. spin_lock_irqsave(&cp->lock, flags);
  1386. pengine = _avail_eng(cp);
  1387. spin_unlock_irqrestore(&cp->lock, flags);
  1388. if (pengine)
  1389. _start_qcrypto_process(cp, pengine);
  1390. else
  1391. break;
  1392. }
  1393. }
  1394. end:
  1395. if (cmpxchg(&cp->sched_resp_workq_status, SCHEDULE_AGAIN,
  1396. IS_SCHEDULED) == SCHEDULE_AGAIN)
  1397. goto again;
  1398. else if (cmpxchg(&cp->sched_resp_workq_status, IS_SCHEDULED,
  1399. NOT_SCHEDULED) == SCHEDULE_AGAIN)
  1400. goto end;
  1401. }
  1402. #define SCHEUDLE_RSP_QLEN_THRESHOLD 64
  1403. static void _qcrypto_tfm_complete(struct crypto_engine *pengine, u32 type,
  1404. void *tfm_ctx,
  1405. struct qcrypto_resp_ctx *cur_arsp,
  1406. int res)
  1407. {
  1408. struct crypto_priv *cp = pengine->pcp;
  1409. unsigned long flags;
  1410. struct qcrypto_resp_ctx *arsp;
  1411. struct list_head *plist;
  1412. unsigned int resp_qlen;
  1413. unsigned int cnt = 0;
  1414. switch (type) {
  1415. case CRYPTO_ALG_TYPE_AHASH:
  1416. plist = &((struct qcrypto_sha_ctx *) tfm_ctx)->rsp_queue;
  1417. break;
  1418. case CRYPTO_ALG_TYPE_SKCIPHER:
  1419. case CRYPTO_ALG_TYPE_AEAD:
  1420. default:
  1421. plist = &((struct qcrypto_cipher_ctx *) tfm_ctx)->rsp_queue;
  1422. break;
  1423. }
  1424. spin_lock_irqsave(&cp->lock, flags);
  1425. cur_arsp->res = res;
  1426. while (!list_empty(plist)) {
  1427. arsp = list_first_entry(plist,
  1428. struct qcrypto_resp_ctx, list);
  1429. if (arsp->res == -EINPROGRESS)
  1430. break;
  1431. list_del(&arsp->list);
  1432. llist_add(&arsp->llist, &cp->ordered_resp_list);
  1433. atomic_inc(&cp->resp_cnt);
  1434. cnt++;
  1435. }
  1436. resp_qlen = atomic_read(&cp->resp_cnt);
  1437. if (resp_qlen > cp->max_resp_qlen)
  1438. cp->max_resp_qlen = resp_qlen;
  1439. if (cnt > cp->max_reorder_cnt)
  1440. cp->max_reorder_cnt = cnt;
  1441. if ((resp_qlen >= COMPLETION_CB_BACKLOG_LENGTH_STOP) &&
  1442. cmpxchg(&cp->ce_req_proc_sts, IN_PROGRESS,
  1443. STOPPED) == IN_PROGRESS) {
  1444. cp->resp_stop++;
  1445. }
  1446. spin_unlock_irqrestore(&cp->lock, flags);
  1447. retry:
  1448. if (!llist_empty(&cp->ordered_resp_list)) {
  1449. unsigned int cpu;
  1450. if (pengine->first_engine) {
  1451. cpu = WORK_CPU_UNBOUND;
  1452. cp->queue_work_eng3++;
  1453. } else {
  1454. cp->queue_work_not_eng3++;
  1455. cpu = cp->cpu_getting_irqs_frm_first_ce;
  1456. /*
  1457. * If source not the first engine, and there
  1458. * are outstanding requests going on first engine,
  1459. * skip scheduling of work queue to anticipate
  1460. * more may be coming. If the response queue
  1461. * length exceeds threshold, to avoid further
  1462. * delay, schedule work queue immediately.
  1463. */
  1464. if (cp->first_engine && atomic_read(
  1465. &cp->first_engine->req_count)) {
  1466. if (resp_qlen < SCHEUDLE_RSP_QLEN_THRESHOLD)
  1467. return;
  1468. cp->queue_work_not_eng3_nz++;
  1469. }
  1470. }
  1471. if (cmpxchg(&cp->sched_resp_workq_status, NOT_SCHEDULED,
  1472. IS_SCHEDULED) == NOT_SCHEDULED)
  1473. queue_work_on(cpu, cp->resp_wq, &cp->resp_work);
  1474. else if (cmpxchg(&cp->sched_resp_workq_status, IS_SCHEDULED,
  1475. SCHEDULE_AGAIN) == NOT_SCHEDULED)
  1476. goto retry;
  1477. }
  1478. }
  1479. static void req_done(struct qcrypto_req_control *pqcrypto_req_control)
  1480. {
  1481. struct crypto_engine *pengine;
  1482. struct crypto_async_request *areq;
  1483. struct crypto_priv *cp;
  1484. struct qcrypto_resp_ctx *arsp;
  1485. u32 type = 0;
  1486. void *tfm_ctx = NULL;
  1487. unsigned int cpu;
  1488. int res;
  1489. pengine = pqcrypto_req_control->pce;
  1490. cp = pengine->pcp;
  1491. areq = pqcrypto_req_control->req;
  1492. arsp = pqcrypto_req_control->arsp;
  1493. res = pqcrypto_req_control->res;
  1494. qcrypto_free_req_control(pengine, pqcrypto_req_control);
  1495. if (areq) {
  1496. type = crypto_tfm_alg_type(areq->tfm);
  1497. tfm_ctx = crypto_tfm_ctx(areq->tfm);
  1498. }
  1499. cpu = smp_processor_id();
  1500. pengine->irq_cpu = cpu;
  1501. if (pengine->first_engine) {
  1502. if (cpu != cp->cpu_getting_irqs_frm_first_ce)
  1503. cp->cpu_getting_irqs_frm_first_ce = cpu;
  1504. }
  1505. if (areq)
  1506. _qcrypto_tfm_complete(pengine, type, tfm_ctx, arsp, res);
  1507. if (READ_ONCE(cp->ce_req_proc_sts) == IN_PROGRESS)
  1508. _start_qcrypto_process(cp, pengine);
  1509. }
  1510. static void _qce_ahash_complete(void *cookie, unsigned char *digest,
  1511. unsigned char *authdata, int ret)
  1512. {
  1513. struct ahash_request *areq = (struct ahash_request *) cookie;
  1514. struct crypto_async_request *async_req;
  1515. struct crypto_ahash *ahash = crypto_ahash_reqtfm(areq);
  1516. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(areq->base.tfm);
  1517. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(areq);
  1518. struct crypto_priv *cp = sha_ctx->cp;
  1519. struct crypto_stat *pstat;
  1520. uint32_t diglen = crypto_ahash_digestsize(ahash);
  1521. uint32_t *auth32 = (uint32_t *)authdata;
  1522. struct crypto_engine *pengine;
  1523. struct qcrypto_req_control *pqcrypto_req_control;
  1524. async_req = &areq->base;
  1525. pstat = &_qcrypto_stat;
  1526. pengine = rctx->pengine;
  1527. pqcrypto_req_control = find_req_control_for_areq(pengine,
  1528. async_req);
  1529. if (pqcrypto_req_control == NULL) {
  1530. pr_err("async request not found\n");
  1531. return;
  1532. }
  1533. #ifdef QCRYPTO_DEBUG
  1534. dev_info(&pengine->pdev->dev, "%s: %pK ret %d\n",
  1535. __func__, areq, ret);
  1536. #endif
  1537. if (digest) {
  1538. memcpy(rctx->digest, digest, diglen);
  1539. if (rctx->last_blk)
  1540. memcpy(areq->result, digest, diglen);
  1541. }
  1542. if (authdata) {
  1543. rctx->byte_count[0] = auth32[0];
  1544. rctx->byte_count[1] = auth32[1];
  1545. rctx->byte_count[2] = auth32[2];
  1546. rctx->byte_count[3] = auth32[3];
  1547. }
  1548. areq->src = rctx->src;
  1549. areq->nbytes = rctx->nbytes;
  1550. rctx->last_blk = 0;
  1551. rctx->first_blk = 0;
  1552. if (ret) {
  1553. pqcrypto_req_control->res = -ENXIO;
  1554. pstat->ahash_op_fail++;
  1555. } else {
  1556. pqcrypto_req_control->res = 0;
  1557. pstat->ahash_op_success++;
  1558. }
  1559. if (cp->ce_support.aligned_only) {
  1560. areq->src = rctx->orig_src;
  1561. kfree(rctx->data);
  1562. }
  1563. req_done(pqcrypto_req_control);
  1564. }
  1565. static void _qce_sk_cipher_complete(void *cookie, unsigned char *icb,
  1566. unsigned char *iv, int ret)
  1567. {
  1568. struct skcipher_request *areq = (struct skcipher_request *) cookie;
  1569. struct crypto_async_request *async_req;
  1570. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq);
  1571. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  1572. struct crypto_priv *cp = ctx->cp;
  1573. struct crypto_stat *pstat;
  1574. struct qcrypto_cipher_req_ctx *rctx;
  1575. struct crypto_engine *pengine;
  1576. struct qcrypto_req_control *pqcrypto_req_control;
  1577. async_req = &areq->base;
  1578. pstat = &_qcrypto_stat;
  1579. rctx = skcipher_request_ctx(areq);
  1580. pengine = rctx->pengine;
  1581. pqcrypto_req_control = find_req_control_for_areq(pengine,
  1582. async_req);
  1583. if (pqcrypto_req_control == NULL) {
  1584. pr_err("async request not found\n");
  1585. return;
  1586. }
  1587. #ifdef QCRYPTO_DEBUG
  1588. dev_info(&pengine->pdev->dev, "%s: %pK ret %d\n",
  1589. __func__, areq, ret);
  1590. #endif
  1591. if (iv)
  1592. memcpy(ctx->iv, iv, crypto_skcipher_ivsize(tfm));
  1593. if (ret) {
  1594. pqcrypto_req_control->res = -ENXIO;
  1595. pstat->sk_cipher_op_fail++;
  1596. } else {
  1597. pqcrypto_req_control->res = 0;
  1598. pstat->sk_cipher_op_success++;
  1599. }
  1600. if (cp->ce_support.aligned_only) {
  1601. struct qcrypto_cipher_req_ctx *rctx;
  1602. uint32_t num_sg = 0;
  1603. uint32_t bytes = 0;
  1604. rctx = skcipher_request_ctx(areq);
  1605. areq->src = rctx->orig_src;
  1606. areq->dst = rctx->orig_dst;
  1607. num_sg = qcrypto_count_sg(areq->dst, areq->cryptlen);
  1608. bytes = qcrypto_sg_copy_from_buffer(areq->dst, num_sg,
  1609. rctx->data, areq->cryptlen);
  1610. if (bytes != areq->cryptlen)
  1611. pr_warn("bytes copied=0x%x bytes to copy= 0x%x\n",
  1612. bytes, areq->cryptlen);
  1613. kfree_sensitive(rctx->data);
  1614. }
  1615. req_done(pqcrypto_req_control);
  1616. }
  1617. static void _qce_aead_complete(void *cookie, unsigned char *icv,
  1618. unsigned char *iv, int ret)
  1619. {
  1620. struct aead_request *areq = (struct aead_request *) cookie;
  1621. struct crypto_async_request *async_req;
  1622. struct crypto_aead *aead = crypto_aead_reqtfm(areq);
  1623. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(areq->base.tfm);
  1624. struct qcrypto_cipher_req_ctx *rctx;
  1625. struct crypto_stat *pstat;
  1626. struct crypto_engine *pengine;
  1627. struct qcrypto_req_control *pqcrypto_req_control;
  1628. async_req = &areq->base;
  1629. pstat = &_qcrypto_stat;
  1630. rctx = aead_request_ctx(areq);
  1631. pengine = rctx->pengine;
  1632. pqcrypto_req_control = find_req_control_for_areq(pengine,
  1633. async_req);
  1634. if (pqcrypto_req_control == NULL) {
  1635. pr_err("async request not found\n");
  1636. return;
  1637. }
  1638. if (rctx->mode == QCE_MODE_CCM) {
  1639. kfree_sensitive(rctx->adata);
  1640. } else {
  1641. uint32_t ivsize = crypto_aead_ivsize(aead);
  1642. if (ret == 0) {
  1643. if (rctx->dir == QCE_ENCRYPT) {
  1644. /* copy the icv to dst */
  1645. scatterwalk_map_and_copy(icv, areq->dst,
  1646. areq->cryptlen + areq->assoclen,
  1647. ctx->authsize, 1);
  1648. } else {
  1649. unsigned char tmp[SHA256_DIGESTSIZE] = {0};
  1650. /* compare icv from src */
  1651. scatterwalk_map_and_copy(tmp,
  1652. areq->src, areq->assoclen +
  1653. areq->cryptlen - ctx->authsize,
  1654. ctx->authsize, 0);
  1655. ret = memcmp(icv, tmp, ctx->authsize);
  1656. if (ret != 0)
  1657. ret = -EBADMSG;
  1658. }
  1659. } else {
  1660. ret = -ENXIO;
  1661. }
  1662. if (iv)
  1663. memcpy(ctx->iv, iv, ivsize);
  1664. }
  1665. if (ret == (-EBADMSG))
  1666. pstat->aead_bad_msg++;
  1667. else if (ret)
  1668. pstat->aead_op_fail++;
  1669. else
  1670. pstat->aead_op_success++;
  1671. pqcrypto_req_control->res = ret;
  1672. req_done(pqcrypto_req_control);
  1673. }
  1674. static int aead_ccm_set_msg_len(u8 *block, unsigned int msglen, int csize)
  1675. {
  1676. __be32 data;
  1677. memset(block, 0, csize);
  1678. block += csize;
  1679. if (csize >= 4)
  1680. csize = 4;
  1681. else if (msglen > (1 << (8 * csize)))
  1682. return -EOVERFLOW;
  1683. data = cpu_to_be32(msglen);
  1684. memcpy(block - csize, (u8 *)&data + 4 - csize, csize);
  1685. return 0;
  1686. }
  1687. static int qccrypto_set_aead_ccm_nonce(struct qce_req *qreq, uint32_t assoclen)
  1688. {
  1689. unsigned int i = ((unsigned int)qreq->iv[0]) + 1;
  1690. memcpy(&qreq->nonce[0], qreq->iv, qreq->ivsize);
  1691. /*
  1692. * Format control info per RFC 3610 and
  1693. * NIST Special Publication 800-38C
  1694. */
  1695. qreq->nonce[0] |= (8 * ((qreq->authsize - 2) / 2));
  1696. if (assoclen)
  1697. qreq->nonce[0] |= 64;
  1698. if (i > MAX_NONCE)
  1699. return -EINVAL;
  1700. return aead_ccm_set_msg_len(qreq->nonce + 16 - i, qreq->cryptlen, i);
  1701. }
  1702. static int qcrypto_aead_ccm_format_adata(struct qce_req *qreq, uint32_t alen,
  1703. struct scatterlist *sg, unsigned char *adata)
  1704. {
  1705. uint32_t len;
  1706. uint32_t bytes = 0;
  1707. uint32_t num_sg = 0;
  1708. /*
  1709. * Add control info for associated data
  1710. * RFC 3610 and NIST Special Publication 800-38C
  1711. */
  1712. if (alen < 65280) {
  1713. *(__be16 *)adata = cpu_to_be16(alen);
  1714. len = 2;
  1715. } else {
  1716. if ((alen >= 65280) && (alen <= 0xffffffff)) {
  1717. *(__be16 *)adata = cpu_to_be16(0xfffe);
  1718. *(__be32 *)&adata[2] = cpu_to_be32(alen);
  1719. len = 6;
  1720. } else {
  1721. *(__be16 *)adata = cpu_to_be16(0xffff);
  1722. *(__be32 *)&adata[6] = cpu_to_be32(alen);
  1723. len = 10;
  1724. }
  1725. }
  1726. adata += len;
  1727. qreq->assoclen = ALIGN((alen + len), 16);
  1728. num_sg = qcrypto_count_sg(sg, alen);
  1729. bytes = qcrypto_sg_copy_to_buffer(sg, num_sg, adata, alen);
  1730. if (bytes != alen)
  1731. pr_warn("bytes copied=0x%x bytes to copy= 0x%x\n", bytes, alen);
  1732. return 0;
  1733. }
  1734. static int _qcrypto_process_skcipher(struct crypto_engine *pengine,
  1735. struct qcrypto_req_control *pqcrypto_req_control)
  1736. {
  1737. struct crypto_async_request *async_req;
  1738. struct qce_req qreq;
  1739. int ret;
  1740. struct qcrypto_cipher_req_ctx *rctx;
  1741. struct qcrypto_cipher_ctx *cipher_ctx;
  1742. struct skcipher_request *req;
  1743. struct crypto_skcipher *tfm;
  1744. async_req = pqcrypto_req_control->req;
  1745. req = container_of(async_req, struct skcipher_request, base);
  1746. cipher_ctx = crypto_tfm_ctx(async_req->tfm);
  1747. rctx = skcipher_request_ctx(req);
  1748. rctx->pengine = pengine;
  1749. tfm = crypto_skcipher_reqtfm(req);
  1750. if (pengine->pcp->ce_support.aligned_only) {
  1751. uint32_t bytes = 0;
  1752. uint32_t num_sg = 0;
  1753. rctx->orig_src = req->src;
  1754. rctx->orig_dst = req->dst;
  1755. rctx->data = kzalloc((req->cryptlen + 64), GFP_ATOMIC);
  1756. if (rctx->data == NULL)
  1757. return -ENOMEM;
  1758. num_sg = qcrypto_count_sg(req->src, req->cryptlen);
  1759. bytes = qcrypto_sg_copy_to_buffer(req->src, num_sg, rctx->data,
  1760. req->cryptlen);
  1761. if (bytes != req->cryptlen)
  1762. pr_warn("bytes copied=0x%x bytes to copy= 0x%x\n",
  1763. bytes, req->cryptlen);
  1764. sg_set_buf(&rctx->dsg, rctx->data, req->cryptlen);
  1765. sg_mark_end(&rctx->dsg);
  1766. rctx->iv = req->iv;
  1767. req->src = &rctx->dsg;
  1768. req->dst = &rctx->dsg;
  1769. }
  1770. qreq.op = QCE_REQ_ABLK_CIPHER; //TODO: change name in qcedev.h
  1771. qreq.qce_cb = _qce_sk_cipher_complete;
  1772. qreq.areq = req;
  1773. qreq.alg = rctx->alg;
  1774. qreq.dir = rctx->dir;
  1775. qreq.mode = rctx->mode;
  1776. qreq.enckey = cipher_ctx->enc_key;
  1777. qreq.encklen = cipher_ctx->enc_key_len;
  1778. qreq.iv = req->iv;
  1779. qreq.ivsize = crypto_skcipher_ivsize(tfm);
  1780. qreq.cryptlen = req->cryptlen;
  1781. qreq.use_pmem = 0;
  1782. qreq.flags = cipher_ctx->flags;
  1783. if ((cipher_ctx->enc_key_len == 0) &&
  1784. (pengine->pcp->platform_support.hw_key_support == 0))
  1785. ret = -EINVAL;
  1786. else
  1787. ret = qce_ablk_cipher_req(pengine->qce, &qreq); //maybe change name?
  1788. return ret;
  1789. }
  1790. static int _qcrypto_process_ahash(struct crypto_engine *pengine,
  1791. struct qcrypto_req_control *pqcrypto_req_control)
  1792. {
  1793. struct crypto_async_request *async_req;
  1794. struct ahash_request *req;
  1795. struct qce_sha_req sreq;
  1796. struct qcrypto_sha_req_ctx *rctx;
  1797. struct qcrypto_sha_ctx *sha_ctx;
  1798. int ret = 0;
  1799. async_req = pqcrypto_req_control->req;
  1800. req = container_of(async_req,
  1801. struct ahash_request, base);
  1802. rctx = ahash_request_ctx(req);
  1803. sha_ctx = crypto_tfm_ctx(async_req->tfm);
  1804. rctx->pengine = pengine;
  1805. sreq.qce_cb = _qce_ahash_complete;
  1806. sreq.digest = &rctx->digest[0];
  1807. sreq.src = req->src;
  1808. sreq.auth_data[0] = rctx->byte_count[0];
  1809. sreq.auth_data[1] = rctx->byte_count[1];
  1810. sreq.auth_data[2] = rctx->byte_count[2];
  1811. sreq.auth_data[3] = rctx->byte_count[3];
  1812. sreq.first_blk = rctx->first_blk;
  1813. sreq.last_blk = rctx->last_blk;
  1814. sreq.size = req->nbytes;
  1815. sreq.areq = req;
  1816. sreq.flags = sha_ctx->flags;
  1817. switch (sha_ctx->alg) {
  1818. case QCE_HASH_SHA1:
  1819. sreq.alg = QCE_HASH_SHA1;
  1820. sreq.authkey = NULL;
  1821. break;
  1822. case QCE_HASH_SHA256:
  1823. sreq.alg = QCE_HASH_SHA256;
  1824. sreq.authkey = NULL;
  1825. break;
  1826. case QCE_HASH_SHA1_HMAC:
  1827. sreq.alg = QCE_HASH_SHA1_HMAC;
  1828. sreq.authkey = &sha_ctx->authkey[0];
  1829. sreq.authklen = SHA_HMAC_KEY_SIZE;
  1830. break;
  1831. case QCE_HASH_SHA256_HMAC:
  1832. sreq.alg = QCE_HASH_SHA256_HMAC;
  1833. sreq.authkey = &sha_ctx->authkey[0];
  1834. sreq.authklen = SHA_HMAC_KEY_SIZE;
  1835. break;
  1836. default:
  1837. pr_err("Algorithm %d not supported, exiting\n", sha_ctx->alg);
  1838. ret = -1;
  1839. break;
  1840. }
  1841. ret = qce_process_sha_req(pengine->qce, &sreq);
  1842. return ret;
  1843. }
  1844. static int _qcrypto_process_aead(struct crypto_engine *pengine,
  1845. struct qcrypto_req_control *pqcrypto_req_control)
  1846. {
  1847. struct crypto_async_request *async_req;
  1848. struct qce_req qreq;
  1849. int ret = 0;
  1850. struct qcrypto_cipher_req_ctx *rctx;
  1851. struct qcrypto_cipher_ctx *cipher_ctx;
  1852. struct aead_request *req;
  1853. struct crypto_aead *aead;
  1854. async_req = pqcrypto_req_control->req;
  1855. req = container_of(async_req, struct aead_request, base);
  1856. aead = crypto_aead_reqtfm(req);
  1857. rctx = aead_request_ctx(req);
  1858. rctx->pengine = pengine;
  1859. cipher_ctx = crypto_tfm_ctx(async_req->tfm);
  1860. qreq.op = QCE_REQ_AEAD;
  1861. qreq.qce_cb = _qce_aead_complete;
  1862. qreq.areq = req;
  1863. qreq.alg = rctx->alg;
  1864. qreq.dir = rctx->dir;
  1865. qreq.mode = rctx->mode;
  1866. qreq.iv = rctx->iv;
  1867. qreq.enckey = cipher_ctx->enc_key;
  1868. qreq.encklen = cipher_ctx->enc_key_len;
  1869. qreq.authkey = cipher_ctx->auth_key;
  1870. qreq.authklen = cipher_ctx->auth_key_len;
  1871. qreq.authsize = crypto_aead_authsize(aead);
  1872. qreq.auth_alg = cipher_ctx->auth_alg;
  1873. if (qreq.mode == QCE_MODE_CCM)
  1874. qreq.ivsize = AES_BLOCK_SIZE;
  1875. else
  1876. qreq.ivsize = crypto_aead_ivsize(aead);
  1877. qreq.flags = cipher_ctx->flags;
  1878. if (qreq.mode == QCE_MODE_CCM) {
  1879. uint32_t assoclen;
  1880. if (qreq.dir == QCE_ENCRYPT)
  1881. qreq.cryptlen = req->cryptlen;
  1882. else
  1883. qreq.cryptlen = req->cryptlen -
  1884. qreq.authsize;
  1885. /* if rfc4309 ccm, adjust assoclen */
  1886. assoclen = req->assoclen;
  1887. if (rctx->ccmtype)
  1888. assoclen -= 8;
  1889. /* Get NONCE */
  1890. ret = qccrypto_set_aead_ccm_nonce(&qreq, assoclen);
  1891. if (ret)
  1892. return ret;
  1893. if (assoclen) {
  1894. rctx->adata = kzalloc((assoclen + 0x64),
  1895. GFP_ATOMIC);
  1896. if (!rctx->adata)
  1897. return -ENOMEM;
  1898. /* Format Associated data */
  1899. ret = qcrypto_aead_ccm_format_adata(&qreq,
  1900. assoclen,
  1901. req->src,
  1902. rctx->adata);
  1903. } else {
  1904. qreq.assoclen = 0;
  1905. rctx->adata = NULL;
  1906. }
  1907. if (ret) {
  1908. kfree_sensitive(rctx->adata);
  1909. return ret;
  1910. }
  1911. /*
  1912. * update req with new formatted associated
  1913. * data info
  1914. */
  1915. qreq.asg = &rctx->asg;
  1916. if (rctx->adata)
  1917. sg_set_buf(qreq.asg, rctx->adata,
  1918. qreq.assoclen);
  1919. sg_mark_end(qreq.asg);
  1920. }
  1921. ret = qce_aead_req(pengine->qce, &qreq);
  1922. return ret;
  1923. }
  1924. static struct crypto_engine *_qcrypto_static_assign_engine(
  1925. struct crypto_priv *cp)
  1926. {
  1927. struct crypto_engine *pengine;
  1928. unsigned long flags;
  1929. spin_lock_irqsave(&cp->lock, flags);
  1930. if (cp->next_engine)
  1931. pengine = cp->next_engine;
  1932. else
  1933. pengine = list_first_entry(&cp->engine_list,
  1934. struct crypto_engine, elist);
  1935. if (list_is_last(&pengine->elist, &cp->engine_list))
  1936. cp->next_engine = list_first_entry(
  1937. &cp->engine_list, struct crypto_engine, elist);
  1938. else
  1939. cp->next_engine = list_next_entry(pengine, elist);
  1940. spin_unlock_irqrestore(&cp->lock, flags);
  1941. return pengine;
  1942. }
  1943. static int _start_qcrypto_process(struct crypto_priv *cp,
  1944. struct crypto_engine *pengine)
  1945. {
  1946. struct crypto_async_request *async_req = NULL;
  1947. struct crypto_async_request *backlog_eng = NULL;
  1948. struct crypto_async_request *backlog_cp = NULL;
  1949. unsigned long flags;
  1950. u32 type;
  1951. int ret = 0;
  1952. struct crypto_stat *pstat;
  1953. void *tfm_ctx;
  1954. struct qcrypto_cipher_req_ctx *cipher_rctx;
  1955. struct qcrypto_sha_req_ctx *ahash_rctx;
  1956. struct skcipher_request *skcipher_req;
  1957. struct ahash_request *ahash_req;
  1958. struct aead_request *aead_req;
  1959. struct qcrypto_resp_ctx *arsp;
  1960. struct qcrypto_req_control *pqcrypto_req_control;
  1961. unsigned int cpu = MAX_SMP_CPU;
  1962. if (READ_ONCE(cp->ce_req_proc_sts) == STOPPED)
  1963. return 0;
  1964. if (in_interrupt()) {
  1965. cpu = smp_processor_id();
  1966. if (cpu >= MAX_SMP_CPU)
  1967. cpu = MAX_SMP_CPU - 1;
  1968. } else
  1969. cpu = MAX_SMP_CPU;
  1970. pstat = &_qcrypto_stat;
  1971. again:
  1972. spin_lock_irqsave(&cp->lock, flags);
  1973. if (pengine->issue_req ||
  1974. atomic_read(&pengine->req_count) >= (pengine->max_req)) {
  1975. spin_unlock_irqrestore(&cp->lock, flags);
  1976. return 0;
  1977. }
  1978. backlog_eng = crypto_get_backlog(&pengine->req_queue);
  1979. /* make sure it is in high bandwidth state */
  1980. if (pengine->bw_state != BUS_HAS_BANDWIDTH) {
  1981. spin_unlock_irqrestore(&cp->lock, flags);
  1982. return 0;
  1983. }
  1984. /* try to get request from request queue of the engine first */
  1985. async_req = crypto_dequeue_request(&pengine->req_queue);
  1986. if (!async_req) {
  1987. /*
  1988. * if no request from the engine,
  1989. * try to get from request queue of driver
  1990. */
  1991. backlog_cp = crypto_get_backlog(&cp->req_queue);
  1992. async_req = crypto_dequeue_request(&cp->req_queue);
  1993. if (!async_req) {
  1994. spin_unlock_irqrestore(&cp->lock, flags);
  1995. return 0;
  1996. }
  1997. }
  1998. pqcrypto_req_control = qcrypto_alloc_req_control(pengine);
  1999. if (pqcrypto_req_control == NULL) {
  2000. pr_err("Allocation of request failed\n");
  2001. spin_unlock_irqrestore(&cp->lock, flags);
  2002. return 0;
  2003. }
  2004. /* add associated rsp entry to tfm response queue */
  2005. type = crypto_tfm_alg_type(async_req->tfm);
  2006. tfm_ctx = crypto_tfm_ctx(async_req->tfm);
  2007. switch (type) {
  2008. case CRYPTO_ALG_TYPE_AHASH:
  2009. ahash_req = container_of(async_req,
  2010. struct ahash_request, base);
  2011. ahash_rctx = ahash_request_ctx(ahash_req);
  2012. arsp = &ahash_rctx->rsp_entry;
  2013. list_add_tail(
  2014. &arsp->list,
  2015. &((struct qcrypto_sha_ctx *)tfm_ctx)
  2016. ->rsp_queue);
  2017. break;
  2018. case CRYPTO_ALG_TYPE_SKCIPHER:
  2019. skcipher_req = container_of(async_req,
  2020. struct skcipher_request, base);
  2021. cipher_rctx = skcipher_request_ctx(skcipher_req);
  2022. arsp = &cipher_rctx->rsp_entry;
  2023. list_add_tail(
  2024. &arsp->list,
  2025. &((struct qcrypto_cipher_ctx *)tfm_ctx)
  2026. ->rsp_queue);
  2027. break;
  2028. case CRYPTO_ALG_TYPE_AEAD:
  2029. default:
  2030. aead_req = container_of(async_req,
  2031. struct aead_request, base);
  2032. cipher_rctx = aead_request_ctx(aead_req);
  2033. arsp = &cipher_rctx->rsp_entry;
  2034. list_add_tail(
  2035. &arsp->list,
  2036. &((struct qcrypto_cipher_ctx *)tfm_ctx)
  2037. ->rsp_queue);
  2038. break;
  2039. }
  2040. arsp->res = -EINPROGRESS;
  2041. arsp->async_req = async_req;
  2042. pqcrypto_req_control->pce = pengine;
  2043. pqcrypto_req_control->req = async_req;
  2044. pqcrypto_req_control->arsp = arsp;
  2045. pengine->active_seq++;
  2046. pengine->check_flag = true;
  2047. pengine->issue_req = true;
  2048. cp->cpu_req[cpu]++;
  2049. smp_mb(); /* make it visible */
  2050. spin_unlock_irqrestore(&cp->lock, flags);
  2051. if (backlog_eng)
  2052. backlog_eng->complete(backlog_eng, -EINPROGRESS);
  2053. if (backlog_cp)
  2054. backlog_cp->complete(backlog_cp, -EINPROGRESS);
  2055. switch (type) {
  2056. case CRYPTO_ALG_TYPE_SKCIPHER:
  2057. ret = _qcrypto_process_skcipher(pengine, pqcrypto_req_control);
  2058. break;
  2059. case CRYPTO_ALG_TYPE_AHASH:
  2060. ret = _qcrypto_process_ahash(pengine, pqcrypto_req_control);
  2061. break;
  2062. case CRYPTO_ALG_TYPE_AEAD:
  2063. ret = _qcrypto_process_aead(pengine, pqcrypto_req_control);
  2064. break;
  2065. default:
  2066. ret = -EINVAL;
  2067. }
  2068. pengine->issue_req = false;
  2069. smp_mb(); /* make it visible */
  2070. pengine->total_req++;
  2071. if (ret) {
  2072. pengine->err_req++;
  2073. qcrypto_free_req_control(pengine, pqcrypto_req_control);
  2074. if (type == CRYPTO_ALG_TYPE_SKCIPHER)
  2075. pstat->sk_cipher_op_fail++;
  2076. else
  2077. if (type == CRYPTO_ALG_TYPE_AHASH)
  2078. pstat->ahash_op_fail++;
  2079. else
  2080. pstat->aead_op_fail++;
  2081. _qcrypto_tfm_complete(pengine, type, tfm_ctx, arsp, ret);
  2082. goto again;
  2083. }
  2084. return ret;
  2085. }
  2086. static inline struct crypto_engine *_next_eng(struct crypto_priv *cp,
  2087. struct crypto_engine *p)
  2088. {
  2089. if (p == NULL || list_is_last(&p->elist, &cp->engine_list))
  2090. p = list_first_entry(&cp->engine_list, struct crypto_engine,
  2091. elist);
  2092. else
  2093. p = list_entry(p->elist.next, struct crypto_engine, elist);
  2094. return p;
  2095. }
  2096. static struct crypto_engine *_avail_eng(struct crypto_priv *cp)
  2097. {
  2098. /* call this function with spinlock set */
  2099. struct crypto_engine *q = NULL;
  2100. struct crypto_engine *p = cp->scheduled_eng;
  2101. struct crypto_engine *q1;
  2102. int eng_cnt = cp->total_units;
  2103. if (unlikely(list_empty(&cp->engine_list))) {
  2104. pr_err("%s: no valid ce to schedule\n", __func__);
  2105. return NULL;
  2106. }
  2107. p = _next_eng(cp, p);
  2108. q1 = p;
  2109. while (eng_cnt-- > 0) {
  2110. if (!p->issue_req && atomic_read(&p->req_count) < p->max_req) {
  2111. q = p;
  2112. break;
  2113. }
  2114. p = _next_eng(cp, p);
  2115. if (q1 == p)
  2116. break;
  2117. }
  2118. cp->scheduled_eng = q;
  2119. return q;
  2120. }
  2121. static int _qcrypto_queue_req(struct crypto_priv *cp,
  2122. struct crypto_engine *pengine,
  2123. struct crypto_async_request *req)
  2124. {
  2125. int ret;
  2126. unsigned long flags;
  2127. spin_lock_irqsave(&cp->lock, flags);
  2128. if (pengine) {
  2129. ret = crypto_enqueue_request(&pengine->req_queue, req);
  2130. } else {
  2131. ret = crypto_enqueue_request(&cp->req_queue, req);
  2132. pengine = _avail_eng(cp);
  2133. if (cp->req_queue.qlen > cp->max_qlen)
  2134. cp->max_qlen = cp->req_queue.qlen;
  2135. }
  2136. if (pengine) {
  2137. switch (pengine->bw_state) {
  2138. case BUS_NO_BANDWIDTH:
  2139. if (!pengine->high_bw_req) {
  2140. qcrypto_ce_bw_allocate_req(pengine);
  2141. pengine->high_bw_req = true;
  2142. }
  2143. pengine = NULL;
  2144. break;
  2145. case BUS_HAS_BANDWIDTH:
  2146. break;
  2147. case BUS_BANDWIDTH_RELEASING:
  2148. pengine->high_bw_req = true;
  2149. pengine = NULL;
  2150. break;
  2151. case BUS_BANDWIDTH_ALLOCATING:
  2152. pengine = NULL;
  2153. break;
  2154. case BUS_SUSPENDED:
  2155. case BUS_SUSPENDING:
  2156. default:
  2157. pengine = NULL;
  2158. break;
  2159. }
  2160. } else {
  2161. cp->no_avail++;
  2162. }
  2163. spin_unlock_irqrestore(&cp->lock, flags);
  2164. if (pengine && (READ_ONCE(cp->ce_req_proc_sts) == IN_PROGRESS))
  2165. _start_qcrypto_process(cp, pengine);
  2166. return ret;
  2167. }
  2168. static int _qcrypto_enc_aes_192_fallback(struct skcipher_request *req)
  2169. {
  2170. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2171. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2172. int err;
  2173. SYNC_SKCIPHER_REQUEST_ON_STACK(subreq, ctx->cipher_aes192_fb);
  2174. skcipher_request_set_sync_tfm(subreq, ctx->cipher_aes192_fb);
  2175. skcipher_request_set_callback(subreq, req->base.flags, NULL, NULL);
  2176. skcipher_request_set_crypt(subreq, req->src, req->dst,
  2177. req->cryptlen, req->iv);
  2178. err = crypto_skcipher_encrypt(subreq);
  2179. skcipher_request_zero(subreq);
  2180. return err;
  2181. }
  2182. static int _qcrypto_dec_aes_192_fallback(struct skcipher_request *req)
  2183. {
  2184. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2185. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2186. int err;
  2187. SYNC_SKCIPHER_REQUEST_ON_STACK(subreq, ctx->cipher_aes192_fb);
  2188. skcipher_request_set_sync_tfm(subreq, ctx->cipher_aes192_fb);
  2189. skcipher_request_set_callback(subreq, req->base.flags, NULL, NULL);
  2190. skcipher_request_set_crypt(subreq, req->src, req->dst,
  2191. req->cryptlen, req->iv);
  2192. err = crypto_skcipher_decrypt(subreq);
  2193. skcipher_request_zero(subreq);
  2194. return err;
  2195. }
  2196. static int _qcrypto_enc_aes_ecb(struct skcipher_request *req)
  2197. {
  2198. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2199. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2200. struct qcrypto_cipher_req_ctx *rctx;
  2201. struct crypto_priv *cp = ctx->cp;
  2202. struct crypto_stat *pstat = &_qcrypto_stat;
  2203. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2204. #ifdef QCRYPTO_DEBUG
  2205. dev_info(&ctx->pengine->pdev->dev, "%s: %pK\n", __func__, req);
  2206. #endif
  2207. if ((ctx->enc_key_len == AES_KEYSIZE_192) &&
  2208. (!cp->ce_support.aes_key_192) &&
  2209. ctx->cipher_aes192_fb)
  2210. return _qcrypto_enc_aes_192_fallback(req);
  2211. rctx = skcipher_request_ctx(req);
  2212. rctx->aead = 0;
  2213. rctx->alg = CIPHER_ALG_AES;
  2214. rctx->dir = QCE_ENCRYPT;
  2215. rctx->mode = QCE_MODE_ECB;
  2216. pstat->sk_cipher_aes_enc++;
  2217. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2218. }
  2219. static int _qcrypto_enc_aes_cbc(struct skcipher_request *req)
  2220. {
  2221. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2222. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2223. struct qcrypto_cipher_req_ctx *rctx;
  2224. struct crypto_priv *cp = ctx->cp;
  2225. struct crypto_stat *pstat = &_qcrypto_stat;
  2226. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2227. #ifdef QCRYPTO_DEBUG
  2228. dev_info(&ctx->pengine->pdev->dev, "%s: %pK\n", __func__, req);
  2229. #endif
  2230. if ((ctx->enc_key_len == AES_KEYSIZE_192) &&
  2231. (!cp->ce_support.aes_key_192) &&
  2232. ctx->cipher_aes192_fb)
  2233. return _qcrypto_enc_aes_192_fallback(req);
  2234. rctx = skcipher_request_ctx(req);
  2235. rctx->aead = 0;
  2236. rctx->alg = CIPHER_ALG_AES;
  2237. rctx->dir = QCE_ENCRYPT;
  2238. rctx->mode = QCE_MODE_CBC;
  2239. pstat->sk_cipher_aes_enc++;
  2240. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2241. }
  2242. static int _qcrypto_enc_aes_ctr(struct skcipher_request *req)
  2243. {
  2244. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2245. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2246. struct qcrypto_cipher_req_ctx *rctx;
  2247. struct crypto_priv *cp = ctx->cp;
  2248. struct crypto_stat *pstat = &_qcrypto_stat;
  2249. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2250. #ifdef QCRYPTO_DEBUG
  2251. dev_info(&ctx->pengine->pdev->dev, "%s: %pK\n", __func__, req);
  2252. #endif
  2253. if ((ctx->enc_key_len == AES_KEYSIZE_192) &&
  2254. (!cp->ce_support.aes_key_192) &&
  2255. ctx->cipher_aes192_fb)
  2256. return _qcrypto_enc_aes_192_fallback(req);
  2257. rctx = skcipher_request_ctx(req);
  2258. rctx->aead = 0;
  2259. rctx->alg = CIPHER_ALG_AES;
  2260. rctx->dir = QCE_ENCRYPT;
  2261. rctx->mode = QCE_MODE_CTR;
  2262. pstat->sk_cipher_aes_enc++;
  2263. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2264. }
  2265. static int _qcrypto_enc_aes_xts(struct skcipher_request *req)
  2266. {
  2267. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2268. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2269. struct qcrypto_cipher_req_ctx *rctx;
  2270. struct crypto_stat *pstat = &_qcrypto_stat;
  2271. struct crypto_priv *cp = ctx->cp;
  2272. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2273. rctx = skcipher_request_ctx(req);
  2274. rctx->aead = 0;
  2275. rctx->alg = CIPHER_ALG_AES;
  2276. rctx->dir = QCE_ENCRYPT;
  2277. rctx->mode = QCE_MODE_XTS;
  2278. pstat->sk_cipher_aes_enc++;
  2279. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2280. }
  2281. static int _qcrypto_aead_encrypt_aes_ccm(struct aead_request *req)
  2282. {
  2283. struct qcrypto_cipher_req_ctx *rctx;
  2284. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2285. struct crypto_priv *cp = ctx->cp;
  2286. struct crypto_stat *pstat;
  2287. if ((ctx->authsize > 16) || (ctx->authsize < 4) || (ctx->authsize & 1))
  2288. return -EINVAL;
  2289. if ((ctx->auth_key_len != AES_KEYSIZE_128) &&
  2290. (ctx->auth_key_len != AES_KEYSIZE_256))
  2291. return -EINVAL;
  2292. pstat = &_qcrypto_stat;
  2293. rctx = aead_request_ctx(req);
  2294. rctx->aead = 1;
  2295. rctx->alg = CIPHER_ALG_AES;
  2296. rctx->dir = QCE_ENCRYPT;
  2297. rctx->mode = QCE_MODE_CCM;
  2298. rctx->iv = req->iv;
  2299. rctx->ccmtype = 0;
  2300. pstat->aead_ccm_aes_enc++;
  2301. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2302. }
  2303. static int _qcrypto_aead_rfc4309_enc_aes_ccm(struct aead_request *req)
  2304. {
  2305. struct qcrypto_cipher_req_ctx *rctx;
  2306. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2307. struct crypto_priv *cp = ctx->cp;
  2308. struct crypto_stat *pstat;
  2309. pstat = &_qcrypto_stat;
  2310. if (req->assoclen != 16 && req->assoclen != 20)
  2311. return -EINVAL;
  2312. rctx = aead_request_ctx(req);
  2313. rctx->aead = 1;
  2314. rctx->alg = CIPHER_ALG_AES;
  2315. rctx->dir = QCE_ENCRYPT;
  2316. rctx->mode = QCE_MODE_CCM;
  2317. memset(rctx->rfc4309_iv, 0, sizeof(rctx->rfc4309_iv));
  2318. rctx->rfc4309_iv[0] = 3; /* L -1 */
  2319. memcpy(&rctx->rfc4309_iv[1], ctx->ccm4309_nonce, 3);
  2320. memcpy(&rctx->rfc4309_iv[4], req->iv, 8);
  2321. rctx->ccmtype = 1;
  2322. rctx->iv = rctx->rfc4309_iv;
  2323. pstat->aead_rfc4309_ccm_aes_enc++;
  2324. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2325. }
  2326. static int _qcrypto_enc_des_ecb(struct skcipher_request *req)
  2327. {
  2328. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2329. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2330. struct qcrypto_cipher_req_ctx *rctx;
  2331. struct crypto_priv *cp = ctx->cp;
  2332. struct crypto_stat *pstat = &_qcrypto_stat;
  2333. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2334. rctx = skcipher_request_ctx(req);
  2335. rctx->aead = 0;
  2336. rctx->alg = CIPHER_ALG_DES;
  2337. rctx->dir = QCE_ENCRYPT;
  2338. rctx->mode = QCE_MODE_ECB;
  2339. pstat->sk_cipher_des_enc++;
  2340. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2341. }
  2342. static int _qcrypto_enc_des_cbc(struct skcipher_request *req)
  2343. {
  2344. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2345. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2346. struct qcrypto_cipher_req_ctx *rctx;
  2347. struct crypto_priv *cp = ctx->cp;
  2348. struct crypto_stat *pstat = &_qcrypto_stat;
  2349. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2350. rctx = skcipher_request_ctx(req);
  2351. rctx->aead = 0;
  2352. rctx->alg = CIPHER_ALG_DES;
  2353. rctx->dir = QCE_ENCRYPT;
  2354. rctx->mode = QCE_MODE_CBC;
  2355. pstat->sk_cipher_des_enc++;
  2356. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2357. }
  2358. static int _qcrypto_enc_3des_ecb(struct skcipher_request *req)
  2359. {
  2360. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2361. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2362. struct qcrypto_cipher_req_ctx *rctx;
  2363. struct crypto_priv *cp = ctx->cp;
  2364. struct crypto_stat *pstat = &_qcrypto_stat;
  2365. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2366. rctx = skcipher_request_ctx(req);
  2367. rctx->aead = 0;
  2368. rctx->alg = CIPHER_ALG_3DES;
  2369. rctx->dir = QCE_ENCRYPT;
  2370. rctx->mode = QCE_MODE_ECB;
  2371. pstat->sk_cipher_3des_enc++;
  2372. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2373. }
  2374. static int _qcrypto_enc_3des_cbc(struct skcipher_request *req)
  2375. {
  2376. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2377. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2378. struct qcrypto_cipher_req_ctx *rctx;
  2379. struct crypto_priv *cp = ctx->cp;
  2380. struct crypto_stat *pstat = &_qcrypto_stat;
  2381. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2382. rctx = skcipher_request_ctx(req);
  2383. rctx->aead = 0;
  2384. rctx->alg = CIPHER_ALG_3DES;
  2385. rctx->dir = QCE_ENCRYPT;
  2386. rctx->mode = QCE_MODE_CBC;
  2387. pstat->sk_cipher_3des_enc++;
  2388. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2389. }
  2390. static int _qcrypto_dec_aes_ecb(struct skcipher_request *req)
  2391. {
  2392. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2393. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2394. struct qcrypto_cipher_req_ctx *rctx;
  2395. struct crypto_priv *cp = ctx->cp;
  2396. struct crypto_stat *pstat = &_qcrypto_stat;
  2397. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2398. #ifdef QCRYPTO_DEBUG
  2399. dev_info(&ctx->pengine->pdev->dev, "%s: %pK\n", __func__, req);
  2400. #endif
  2401. if ((ctx->enc_key_len == AES_KEYSIZE_192) &&
  2402. (!cp->ce_support.aes_key_192) &&
  2403. ctx->cipher_aes192_fb)
  2404. return _qcrypto_dec_aes_192_fallback(req);
  2405. rctx = skcipher_request_ctx(req);
  2406. rctx->aead = 0;
  2407. rctx->alg = CIPHER_ALG_AES;
  2408. rctx->dir = QCE_DECRYPT;
  2409. rctx->mode = QCE_MODE_ECB;
  2410. pstat->sk_cipher_aes_dec++;
  2411. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2412. }
  2413. static int _qcrypto_dec_aes_cbc(struct skcipher_request *req)
  2414. {
  2415. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2416. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2417. struct qcrypto_cipher_req_ctx *rctx;
  2418. struct crypto_priv *cp = ctx->cp;
  2419. struct crypto_stat *pstat = &_qcrypto_stat;
  2420. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2421. #ifdef QCRYPTO_DEBUG
  2422. dev_info(&ctx->pengine->pdev->dev, "%s: %pK\n", __func__, req);
  2423. #endif
  2424. if ((ctx->enc_key_len == AES_KEYSIZE_192) &&
  2425. (!cp->ce_support.aes_key_192) &&
  2426. ctx->cipher_aes192_fb)
  2427. return _qcrypto_dec_aes_192_fallback(req);
  2428. rctx = skcipher_request_ctx(req);
  2429. rctx->aead = 0;
  2430. rctx->alg = CIPHER_ALG_AES;
  2431. rctx->dir = QCE_DECRYPT;
  2432. rctx->mode = QCE_MODE_CBC;
  2433. pstat->sk_cipher_aes_dec++;
  2434. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2435. }
  2436. static int _qcrypto_dec_aes_ctr(struct skcipher_request *req)
  2437. {
  2438. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2439. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2440. struct qcrypto_cipher_req_ctx *rctx;
  2441. struct crypto_priv *cp = ctx->cp;
  2442. struct crypto_stat *pstat = &_qcrypto_stat;
  2443. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2444. #ifdef QCRYPTO_DEBUG
  2445. dev_info(&ctx->pengine->pdev->dev, "%s: %pK\n", __func__, req);
  2446. #endif
  2447. if ((ctx->enc_key_len == AES_KEYSIZE_192) &&
  2448. (!cp->ce_support.aes_key_192) &&
  2449. ctx->cipher_aes192_fb)
  2450. return _qcrypto_dec_aes_192_fallback(req);
  2451. rctx = skcipher_request_ctx(req);
  2452. rctx->aead = 0;
  2453. rctx->alg = CIPHER_ALG_AES;
  2454. rctx->mode = QCE_MODE_CTR;
  2455. /* Note. There is no such thing as aes/counter mode, decrypt */
  2456. rctx->dir = QCE_ENCRYPT;
  2457. pstat->sk_cipher_aes_dec++;
  2458. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2459. }
  2460. static int _qcrypto_dec_des_ecb(struct skcipher_request *req)
  2461. {
  2462. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2463. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2464. struct qcrypto_cipher_req_ctx *rctx;
  2465. struct crypto_priv *cp = ctx->cp;
  2466. struct crypto_stat *pstat = &_qcrypto_stat;
  2467. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2468. rctx = skcipher_request_ctx(req);
  2469. rctx->aead = 0;
  2470. rctx->alg = CIPHER_ALG_DES;
  2471. rctx->dir = QCE_DECRYPT;
  2472. rctx->mode = QCE_MODE_ECB;
  2473. pstat->sk_cipher_des_dec++;
  2474. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2475. }
  2476. static int _qcrypto_dec_des_cbc(struct skcipher_request *req)
  2477. {
  2478. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2479. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2480. struct qcrypto_cipher_req_ctx *rctx;
  2481. struct crypto_priv *cp = ctx->cp;
  2482. struct crypto_stat *pstat = &_qcrypto_stat;
  2483. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2484. rctx = skcipher_request_ctx(req);
  2485. rctx->aead = 0;
  2486. rctx->alg = CIPHER_ALG_DES;
  2487. rctx->dir = QCE_DECRYPT;
  2488. rctx->mode = QCE_MODE_CBC;
  2489. pstat->sk_cipher_des_dec++;
  2490. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2491. }
  2492. static int _qcrypto_dec_3des_ecb(struct skcipher_request *req)
  2493. {
  2494. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2495. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2496. struct qcrypto_cipher_req_ctx *rctx;
  2497. struct crypto_priv *cp = ctx->cp;
  2498. struct crypto_stat *pstat = &_qcrypto_stat;
  2499. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2500. rctx = skcipher_request_ctx(req);
  2501. rctx->aead = 0;
  2502. rctx->alg = CIPHER_ALG_3DES;
  2503. rctx->dir = QCE_DECRYPT;
  2504. rctx->mode = QCE_MODE_ECB;
  2505. pstat->sk_cipher_3des_dec++;
  2506. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2507. }
  2508. static int _qcrypto_dec_3des_cbc(struct skcipher_request *req)
  2509. {
  2510. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2511. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2512. struct qcrypto_cipher_req_ctx *rctx;
  2513. struct crypto_priv *cp = ctx->cp;
  2514. struct crypto_stat *pstat = &_qcrypto_stat;
  2515. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2516. rctx = skcipher_request_ctx(req);
  2517. rctx->aead = 0;
  2518. rctx->alg = CIPHER_ALG_3DES;
  2519. rctx->dir = QCE_DECRYPT;
  2520. rctx->mode = QCE_MODE_CBC;
  2521. pstat->sk_cipher_3des_dec++;
  2522. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2523. }
  2524. static int _qcrypto_dec_aes_xts(struct skcipher_request *req)
  2525. {
  2526. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2527. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2528. struct qcrypto_cipher_req_ctx *rctx;
  2529. struct crypto_priv *cp = ctx->cp;
  2530. struct crypto_stat *pstat = &_qcrypto_stat;
  2531. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2532. rctx = skcipher_request_ctx(req);
  2533. rctx->aead = 0;
  2534. rctx->alg = CIPHER_ALG_AES;
  2535. rctx->mode = QCE_MODE_XTS;
  2536. rctx->dir = QCE_DECRYPT;
  2537. pstat->sk_cipher_aes_dec++;
  2538. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2539. }
  2540. static int _qcrypto_aead_decrypt_aes_ccm(struct aead_request *req)
  2541. {
  2542. struct qcrypto_cipher_req_ctx *rctx;
  2543. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2544. struct crypto_priv *cp = ctx->cp;
  2545. struct crypto_stat *pstat;
  2546. if ((ctx->authsize > 16) || (ctx->authsize < 4) || (ctx->authsize & 1))
  2547. return -EINVAL;
  2548. if ((ctx->auth_key_len != AES_KEYSIZE_128) &&
  2549. (ctx->auth_key_len != AES_KEYSIZE_256))
  2550. return -EINVAL;
  2551. pstat = &_qcrypto_stat;
  2552. rctx = aead_request_ctx(req);
  2553. rctx->aead = 1;
  2554. rctx->alg = CIPHER_ALG_AES;
  2555. rctx->dir = QCE_DECRYPT;
  2556. rctx->mode = QCE_MODE_CCM;
  2557. rctx->iv = req->iv;
  2558. rctx->ccmtype = 0;
  2559. pstat->aead_ccm_aes_dec++;
  2560. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2561. }
  2562. static int _qcrypto_aead_rfc4309_dec_aes_ccm(struct aead_request *req)
  2563. {
  2564. struct qcrypto_cipher_req_ctx *rctx;
  2565. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2566. struct crypto_priv *cp = ctx->cp;
  2567. struct crypto_stat *pstat;
  2568. pstat = &_qcrypto_stat;
  2569. if (req->assoclen != 16 && req->assoclen != 20)
  2570. return -EINVAL;
  2571. rctx = aead_request_ctx(req);
  2572. rctx->aead = 1;
  2573. rctx->alg = CIPHER_ALG_AES;
  2574. rctx->dir = QCE_DECRYPT;
  2575. rctx->mode = QCE_MODE_CCM;
  2576. memset(rctx->rfc4309_iv, 0, sizeof(rctx->rfc4309_iv));
  2577. rctx->rfc4309_iv[0] = 3; /* L -1 */
  2578. memcpy(&rctx->rfc4309_iv[1], ctx->ccm4309_nonce, 3);
  2579. memcpy(&rctx->rfc4309_iv[4], req->iv, 8);
  2580. rctx->ccmtype = 1;
  2581. rctx->iv = rctx->rfc4309_iv;
  2582. pstat->aead_rfc4309_ccm_aes_dec++;
  2583. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2584. }
  2585. static int _qcrypto_aead_setauthsize(struct crypto_aead *authenc,
  2586. unsigned int authsize)
  2587. {
  2588. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(authenc);
  2589. ctx->authsize = authsize;
  2590. return 0;
  2591. }
  2592. static int _qcrypto_aead_ccm_setauthsize(struct crypto_aead *authenc,
  2593. unsigned int authsize)
  2594. {
  2595. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(authenc);
  2596. switch (authsize) {
  2597. case 4:
  2598. case 6:
  2599. case 8:
  2600. case 10:
  2601. case 12:
  2602. case 14:
  2603. case 16:
  2604. break;
  2605. default:
  2606. return -EINVAL;
  2607. }
  2608. ctx->authsize = authsize;
  2609. return 0;
  2610. }
  2611. static int _qcrypto_aead_rfc4309_ccm_setauthsize(struct crypto_aead *authenc,
  2612. unsigned int authsize)
  2613. {
  2614. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(authenc);
  2615. switch (authsize) {
  2616. case 8:
  2617. case 12:
  2618. case 16:
  2619. break;
  2620. default:
  2621. return -EINVAL;
  2622. }
  2623. ctx->authsize = authsize;
  2624. return 0;
  2625. }
  2626. static int _qcrypto_aead_setkey(struct crypto_aead *tfm, const u8 *key,
  2627. unsigned int keylen)
  2628. {
  2629. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(tfm);
  2630. struct rtattr *rta = (struct rtattr *)key;
  2631. struct crypto_authenc_key_param *param;
  2632. int ret;
  2633. if (!RTA_OK(rta, keylen))
  2634. goto badkey;
  2635. if (rta->rta_type != CRYPTO_AUTHENC_KEYA_PARAM)
  2636. goto badkey;
  2637. if (RTA_PAYLOAD(rta) < sizeof(*param))
  2638. goto badkey;
  2639. param = RTA_DATA(rta);
  2640. ctx->enc_key_len = be32_to_cpu(param->enckeylen);
  2641. key += RTA_ALIGN(rta->rta_len);
  2642. keylen -= RTA_ALIGN(rta->rta_len);
  2643. if (keylen < ctx->enc_key_len)
  2644. goto badkey;
  2645. ctx->auth_key_len = keylen - ctx->enc_key_len;
  2646. if (ctx->enc_key_len >= QCRYPTO_MAX_KEY_SIZE ||
  2647. ctx->auth_key_len >= QCRYPTO_MAX_KEY_SIZE)
  2648. goto badkey;
  2649. memset(ctx->auth_key, 0, QCRYPTO_MAX_KEY_SIZE);
  2650. memcpy(ctx->enc_key, key + ctx->auth_key_len, ctx->enc_key_len);
  2651. memcpy(ctx->auth_key, key, ctx->auth_key_len);
  2652. if (ctx->enc_key_len == AES_KEYSIZE_192 && ctx->cipher_aes192_fb &&
  2653. ctx->ahash_aead_aes192_fb) {
  2654. crypto_ahash_clear_flags(ctx->ahash_aead_aes192_fb, ~0);
  2655. ret = crypto_ahash_setkey(ctx->ahash_aead_aes192_fb,
  2656. ctx->auth_key, ctx->auth_key_len);
  2657. if (ret)
  2658. goto badkey;
  2659. crypto_sync_skcipher_clear_flags(ctx->cipher_aes192_fb, ~0);
  2660. ret = crypto_sync_skcipher_setkey(ctx->cipher_aes192_fb,
  2661. ctx->enc_key, ctx->enc_key_len);
  2662. if (ret)
  2663. goto badkey;
  2664. }
  2665. return 0;
  2666. badkey:
  2667. ctx->enc_key_len = 0;
  2668. //crypto_aead_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
  2669. return -EINVAL;
  2670. }
  2671. static int _qcrypto_aead_ccm_setkey(struct crypto_aead *aead, const u8 *key,
  2672. unsigned int keylen)
  2673. {
  2674. struct crypto_tfm *tfm = crypto_aead_tfm(aead);
  2675. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
  2676. struct crypto_priv *cp = ctx->cp;
  2677. switch (keylen) {
  2678. case AES_KEYSIZE_128:
  2679. case AES_KEYSIZE_256:
  2680. break;
  2681. case AES_KEYSIZE_192:
  2682. if (cp->ce_support.aes_key_192) {
  2683. break;
  2684. }
  2685. else {
  2686. ctx->enc_key_len = 0;
  2687. return -EINVAL;
  2688. }
  2689. default:
  2690. ctx->enc_key_len = 0;
  2691. //crypto_aead_set_flags(aead, CRYPTO_TFM_RES_BAD_KEY_LEN);
  2692. return -EINVAL;
  2693. }
  2694. ctx->enc_key_len = keylen;
  2695. memcpy(ctx->enc_key, key, keylen);
  2696. ctx->auth_key_len = keylen;
  2697. memcpy(ctx->auth_key, key, keylen);
  2698. return 0;
  2699. }
  2700. static int _qcrypto_aead_rfc4309_ccm_setkey(struct crypto_aead *aead,
  2701. const u8 *key, unsigned int key_len)
  2702. {
  2703. struct crypto_tfm *tfm = crypto_aead_tfm(aead);
  2704. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
  2705. int ret;
  2706. if (key_len < QCRYPTO_CCM4309_NONCE_LEN)
  2707. return -EINVAL;
  2708. key_len -= QCRYPTO_CCM4309_NONCE_LEN;
  2709. memcpy(ctx->ccm4309_nonce, key + key_len, QCRYPTO_CCM4309_NONCE_LEN);
  2710. ret = _qcrypto_aead_ccm_setkey(aead, key, key_len);
  2711. return ret;
  2712. }
  2713. static void _qcrypto_aead_aes_192_fb_a_cb(struct qcrypto_cipher_req_ctx *rctx,
  2714. int res)
  2715. {
  2716. struct aead_request *req;
  2717. struct crypto_async_request *areq;
  2718. req = rctx->aead_req;
  2719. areq = &req->base;
  2720. if (rctx->fb_aes_req)
  2721. skcipher_request_free(rctx->fb_aes_req);
  2722. if (rctx->fb_hash_req)
  2723. ahash_request_free(rctx->fb_hash_req);
  2724. rctx->fb_aes_req = NULL;
  2725. rctx->fb_hash_req = NULL;
  2726. kfree(rctx->fb_aes_iv);
  2727. areq->complete(areq, res);
  2728. }
  2729. static void _aead_aes_fb_stage2_ahash_complete(
  2730. struct crypto_async_request *base, int err)
  2731. {
  2732. struct qcrypto_cipher_req_ctx *rctx;
  2733. struct aead_request *req;
  2734. struct qcrypto_cipher_ctx *ctx;
  2735. rctx = base->data;
  2736. req = rctx->aead_req;
  2737. ctx = crypto_tfm_ctx(req->base.tfm);
  2738. /* copy icv */
  2739. if (err == 0)
  2740. scatterwalk_map_and_copy(rctx->fb_ahash_digest,
  2741. rctx->fb_aes_dst,
  2742. req->cryptlen,
  2743. ctx->authsize, 1);
  2744. _qcrypto_aead_aes_192_fb_a_cb(rctx, err);
  2745. }
  2746. static int _start_aead_aes_fb_stage2_hmac(struct qcrypto_cipher_req_ctx *rctx)
  2747. {
  2748. struct ahash_request *ahash_req;
  2749. ahash_req = rctx->fb_hash_req;
  2750. ahash_request_set_callback(ahash_req, CRYPTO_TFM_REQ_MAY_BACKLOG,
  2751. _aead_aes_fb_stage2_ahash_complete, rctx);
  2752. return crypto_ahash_digest(ahash_req);
  2753. }
  2754. static void _aead_aes_fb_stage2_decrypt_complete(
  2755. struct crypto_async_request *base, int err)
  2756. {
  2757. struct qcrypto_cipher_req_ctx *rctx;
  2758. rctx = base->data;
  2759. _qcrypto_aead_aes_192_fb_a_cb(rctx, err);
  2760. }
  2761. static int _start_aead_aes_fb_stage2_decrypt(
  2762. struct qcrypto_cipher_req_ctx *rctx)
  2763. {
  2764. struct skcipher_request *aes_req;
  2765. aes_req = rctx->fb_aes_req;
  2766. skcipher_request_set_callback(aes_req, CRYPTO_TFM_REQ_MAY_BACKLOG,
  2767. _aead_aes_fb_stage2_decrypt_complete, rctx);
  2768. return crypto_skcipher_decrypt(aes_req);
  2769. }
  2770. static void _aead_aes_fb_stage1_ahash_complete(
  2771. struct crypto_async_request *base, int err)
  2772. {
  2773. struct qcrypto_cipher_req_ctx *rctx;
  2774. struct aead_request *req;
  2775. struct qcrypto_cipher_ctx *ctx;
  2776. rctx = base->data;
  2777. req = rctx->aead_req;
  2778. ctx = crypto_tfm_ctx(req->base.tfm);
  2779. /* compare icv */
  2780. if (err == 0) {
  2781. unsigned char *tmp;
  2782. tmp = kmalloc(ctx->authsize, GFP_KERNEL);
  2783. if (!tmp) {
  2784. err = -ENOMEM;
  2785. goto ret;
  2786. }
  2787. scatterwalk_map_and_copy(tmp, rctx->fb_aes_src,
  2788. req->cryptlen - ctx->authsize, ctx->authsize, 0);
  2789. if (memcmp(rctx->fb_ahash_digest, tmp, ctx->authsize) != 0)
  2790. err = -EBADMSG;
  2791. kfree(tmp);
  2792. }
  2793. ret:
  2794. if (err)
  2795. _qcrypto_aead_aes_192_fb_a_cb(rctx, err);
  2796. else {
  2797. err = _start_aead_aes_fb_stage2_decrypt(rctx);
  2798. if (err != -EINPROGRESS && err != -EBUSY)
  2799. _qcrypto_aead_aes_192_fb_a_cb(rctx, err);
  2800. }
  2801. }
  2802. static void _aead_aes_fb_stage1_encrypt_complete(
  2803. struct crypto_async_request *base, int err)
  2804. {
  2805. struct qcrypto_cipher_req_ctx *rctx;
  2806. struct aead_request *req;
  2807. struct qcrypto_cipher_ctx *ctx;
  2808. rctx = base->data;
  2809. req = rctx->aead_req;
  2810. ctx = crypto_tfm_ctx(req->base.tfm);
  2811. memcpy(ctx->iv, rctx->fb_aes_iv, rctx->ivsize);
  2812. if (err) {
  2813. _qcrypto_aead_aes_192_fb_a_cb(rctx, err);
  2814. return;
  2815. }
  2816. err = _start_aead_aes_fb_stage2_hmac(rctx);
  2817. /* copy icv */
  2818. if (err == 0) {
  2819. scatterwalk_map_and_copy(rctx->fb_ahash_digest,
  2820. rctx->fb_aes_dst,
  2821. req->cryptlen,
  2822. ctx->authsize, 1);
  2823. }
  2824. if (err != -EINPROGRESS && err != -EBUSY)
  2825. _qcrypto_aead_aes_192_fb_a_cb(rctx, err);
  2826. }
  2827. static int _qcrypto_aead_aes_192_fallback(struct aead_request *req,
  2828. bool is_encrypt)
  2829. {
  2830. int rc = -EINVAL;
  2831. struct qcrypto_cipher_req_ctx *rctx = aead_request_ctx(req);
  2832. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2833. struct crypto_aead *aead_tfm = crypto_aead_reqtfm(req);
  2834. struct skcipher_request *aes_req = NULL;
  2835. struct ahash_request *ahash_req = NULL;
  2836. int nbytes;
  2837. struct scatterlist *src, *dst;
  2838. rctx->fb_aes_iv = NULL;
  2839. aes_req = skcipher_request_alloc(&ctx->cipher_aes192_fb->base,
  2840. GFP_KERNEL);
  2841. if (!aes_req)
  2842. return -ENOMEM;
  2843. ahash_req = ahash_request_alloc(ctx->ahash_aead_aes192_fb, GFP_KERNEL);
  2844. if (!ahash_req)
  2845. goto ret;
  2846. rctx->fb_aes_req = aes_req;
  2847. rctx->fb_hash_req = ahash_req;
  2848. rctx->aead_req = req;
  2849. /* assoc and iv are sitting in the beginning of src sg list */
  2850. /* Similarly, assoc and iv are sitting in the beginning of dst list */
  2851. src = scatterwalk_ffwd(rctx->fb_ablkcipher_src_sg, req->src,
  2852. req->assoclen);
  2853. dst = scatterwalk_ffwd(rctx->fb_ablkcipher_dst_sg, req->dst,
  2854. req->assoclen);
  2855. nbytes = req->cryptlen;
  2856. if (!is_encrypt)
  2857. nbytes -= ctx->authsize;
  2858. rctx->fb_ahash_length = nbytes + req->assoclen;
  2859. rctx->fb_aes_src = src;
  2860. rctx->fb_aes_dst = dst;
  2861. rctx->fb_aes_cryptlen = nbytes;
  2862. rctx->ivsize = crypto_aead_ivsize(aead_tfm);
  2863. rctx->fb_aes_iv = kmemdup(req->iv, rctx->ivsize, GFP_ATOMIC);
  2864. if (!rctx->fb_aes_iv)
  2865. goto ret;
  2866. skcipher_request_set_crypt(aes_req, rctx->fb_aes_src,
  2867. rctx->fb_aes_dst,
  2868. rctx->fb_aes_cryptlen, rctx->fb_aes_iv);
  2869. if (is_encrypt)
  2870. ahash_request_set_crypt(ahash_req, req->dst,
  2871. rctx->fb_ahash_digest,
  2872. rctx->fb_ahash_length);
  2873. else
  2874. ahash_request_set_crypt(ahash_req, req->src,
  2875. rctx->fb_ahash_digest,
  2876. rctx->fb_ahash_length);
  2877. if (is_encrypt) {
  2878. skcipher_request_set_callback(aes_req,
  2879. CRYPTO_TFM_REQ_MAY_BACKLOG,
  2880. _aead_aes_fb_stage1_encrypt_complete, rctx);
  2881. rc = crypto_skcipher_encrypt(aes_req);
  2882. if (rc == 0) {
  2883. memcpy(ctx->iv, rctx->fb_aes_iv, rctx->ivsize);
  2884. rc = _start_aead_aes_fb_stage2_hmac(rctx);
  2885. if (rc == 0) {
  2886. /* copy icv */
  2887. scatterwalk_map_and_copy(rctx->fb_ahash_digest,
  2888. dst,
  2889. req->cryptlen,
  2890. ctx->authsize, 1);
  2891. }
  2892. }
  2893. if (rc == -EINPROGRESS || rc == -EBUSY)
  2894. return rc;
  2895. goto ret;
  2896. } else {
  2897. ahash_request_set_callback(ahash_req,
  2898. CRYPTO_TFM_REQ_MAY_BACKLOG,
  2899. _aead_aes_fb_stage1_ahash_complete, rctx);
  2900. rc = crypto_ahash_digest(ahash_req);
  2901. if (rc == 0) {
  2902. unsigned char *tmp;
  2903. tmp = kmalloc(ctx->authsize, GFP_KERNEL);
  2904. if (!tmp) {
  2905. rc = -ENOMEM;
  2906. goto ret;
  2907. }
  2908. /* compare icv */
  2909. scatterwalk_map_and_copy(tmp,
  2910. src, req->cryptlen - ctx->authsize,
  2911. ctx->authsize, 0);
  2912. if (memcmp(rctx->fb_ahash_digest, tmp,
  2913. ctx->authsize) != 0)
  2914. rc = -EBADMSG;
  2915. else
  2916. rc = _start_aead_aes_fb_stage2_decrypt(rctx);
  2917. kfree(tmp);
  2918. }
  2919. if (rc == -EINPROGRESS || rc == -EBUSY)
  2920. return rc;
  2921. goto ret;
  2922. }
  2923. ret:
  2924. if (aes_req)
  2925. skcipher_request_free(aes_req);
  2926. if (ahash_req)
  2927. ahash_request_free(ahash_req);
  2928. kfree(rctx->fb_aes_iv);
  2929. return rc;
  2930. }
  2931. static int _qcrypto_aead_encrypt_aes_cbc(struct aead_request *req)
  2932. {
  2933. struct qcrypto_cipher_req_ctx *rctx;
  2934. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2935. struct crypto_priv *cp = ctx->cp;
  2936. struct crypto_stat *pstat;
  2937. pstat = &_qcrypto_stat;
  2938. #ifdef QCRYPTO_DEBUG
  2939. dev_info(&ctx->pengine->pdev->dev, "%s: %pK\n", __func__, req);
  2940. #endif
  2941. rctx = aead_request_ctx(req);
  2942. rctx->aead = 1;
  2943. rctx->alg = CIPHER_ALG_AES;
  2944. rctx->dir = QCE_ENCRYPT;
  2945. rctx->mode = QCE_MODE_CBC;
  2946. rctx->iv = req->iv;
  2947. rctx->aead_req = req;
  2948. if (ctx->auth_alg == QCE_HASH_SHA1_HMAC)
  2949. pstat->aead_sha1_aes_enc++;
  2950. else
  2951. pstat->aead_sha256_aes_enc++;
  2952. if (ctx->enc_key_len == AES_KEYSIZE_192 && ctx->cipher_aes192_fb &&
  2953. ctx->ahash_aead_aes192_fb)
  2954. return _qcrypto_aead_aes_192_fallback(req, true);
  2955. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2956. }
  2957. static int _qcrypto_aead_decrypt_aes_cbc(struct aead_request *req)
  2958. {
  2959. struct qcrypto_cipher_req_ctx *rctx;
  2960. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2961. struct crypto_priv *cp = ctx->cp;
  2962. struct crypto_stat *pstat;
  2963. pstat = &_qcrypto_stat;
  2964. #ifdef QCRYPTO_DEBUG
  2965. dev_info(&ctx->pengine->pdev->dev, "%s: %pK\n", __func__, req);
  2966. #endif
  2967. rctx = aead_request_ctx(req);
  2968. rctx->aead = 1;
  2969. rctx->alg = CIPHER_ALG_AES;
  2970. rctx->dir = QCE_DECRYPT;
  2971. rctx->mode = QCE_MODE_CBC;
  2972. rctx->iv = req->iv;
  2973. rctx->aead_req = req;
  2974. if (ctx->auth_alg == QCE_HASH_SHA1_HMAC)
  2975. pstat->aead_sha1_aes_dec++;
  2976. else
  2977. pstat->aead_sha256_aes_dec++;
  2978. if (ctx->enc_key_len == AES_KEYSIZE_192 && ctx->cipher_aes192_fb &&
  2979. ctx->ahash_aead_aes192_fb)
  2980. return _qcrypto_aead_aes_192_fallback(req, false);
  2981. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2982. }
  2983. static int _qcrypto_aead_encrypt_des_cbc(struct aead_request *req)
  2984. {
  2985. struct qcrypto_cipher_req_ctx *rctx;
  2986. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2987. struct crypto_priv *cp = ctx->cp;
  2988. struct crypto_stat *pstat;
  2989. pstat = &_qcrypto_stat;
  2990. rctx = aead_request_ctx(req);
  2991. rctx->aead = 1;
  2992. rctx->alg = CIPHER_ALG_DES;
  2993. rctx->dir = QCE_ENCRYPT;
  2994. rctx->mode = QCE_MODE_CBC;
  2995. rctx->iv = req->iv;
  2996. if (ctx->auth_alg == QCE_HASH_SHA1_HMAC)
  2997. pstat->aead_sha1_des_enc++;
  2998. else
  2999. pstat->aead_sha256_des_enc++;
  3000. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  3001. }
  3002. static int _qcrypto_aead_decrypt_des_cbc(struct aead_request *req)
  3003. {
  3004. struct qcrypto_cipher_req_ctx *rctx;
  3005. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3006. struct crypto_priv *cp = ctx->cp;
  3007. struct crypto_stat *pstat;
  3008. pstat = &_qcrypto_stat;
  3009. rctx = aead_request_ctx(req);
  3010. rctx->aead = 1;
  3011. rctx->alg = CIPHER_ALG_DES;
  3012. rctx->dir = QCE_DECRYPT;
  3013. rctx->mode = QCE_MODE_CBC;
  3014. rctx->iv = req->iv;
  3015. if (ctx->auth_alg == QCE_HASH_SHA1_HMAC)
  3016. pstat->aead_sha1_des_dec++;
  3017. else
  3018. pstat->aead_sha256_des_dec++;
  3019. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  3020. }
  3021. static int _qcrypto_aead_encrypt_3des_cbc(struct aead_request *req)
  3022. {
  3023. struct qcrypto_cipher_req_ctx *rctx;
  3024. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3025. struct crypto_priv *cp = ctx->cp;
  3026. struct crypto_stat *pstat;
  3027. pstat = &_qcrypto_stat;
  3028. rctx = aead_request_ctx(req);
  3029. rctx->aead = 1;
  3030. rctx->alg = CIPHER_ALG_3DES;
  3031. rctx->dir = QCE_ENCRYPT;
  3032. rctx->mode = QCE_MODE_CBC;
  3033. rctx->iv = req->iv;
  3034. if (ctx->auth_alg == QCE_HASH_SHA1_HMAC)
  3035. pstat->aead_sha1_3des_enc++;
  3036. else
  3037. pstat->aead_sha256_3des_enc++;
  3038. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  3039. }
  3040. static int _qcrypto_aead_decrypt_3des_cbc(struct aead_request *req)
  3041. {
  3042. struct qcrypto_cipher_req_ctx *rctx;
  3043. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3044. struct crypto_priv *cp = ctx->cp;
  3045. struct crypto_stat *pstat;
  3046. pstat = &_qcrypto_stat;
  3047. rctx = aead_request_ctx(req);
  3048. rctx->aead = 1;
  3049. rctx->alg = CIPHER_ALG_3DES;
  3050. rctx->dir = QCE_DECRYPT;
  3051. rctx->mode = QCE_MODE_CBC;
  3052. rctx->iv = req->iv;
  3053. if (ctx->auth_alg == QCE_HASH_SHA1_HMAC)
  3054. pstat->aead_sha1_3des_dec++;
  3055. else
  3056. pstat->aead_sha256_3des_dec++;
  3057. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  3058. }
  3059. static int _sha_init(struct ahash_request *req)
  3060. {
  3061. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3062. rctx->first_blk = 1;
  3063. rctx->last_blk = 0;
  3064. rctx->byte_count[0] = 0;
  3065. rctx->byte_count[1] = 0;
  3066. rctx->byte_count[2] = 0;
  3067. rctx->byte_count[3] = 0;
  3068. rctx->trailing_buf_len = 0;
  3069. rctx->count = 0;
  3070. return 0;
  3071. }
  3072. static int _sha1_init(struct ahash_request *req)
  3073. {
  3074. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3075. struct crypto_stat *pstat;
  3076. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3077. pstat = &_qcrypto_stat;
  3078. _sha_init(req);
  3079. sha_ctx->alg = QCE_HASH_SHA1;
  3080. memset(&rctx->trailing_buf[0], 0x00, SHA1_BLOCK_SIZE);
  3081. memcpy(&rctx->digest[0], &_std_init_vector_sha1_uint8[0],
  3082. SHA1_DIGEST_SIZE);
  3083. sha_ctx->diglen = SHA1_DIGEST_SIZE;
  3084. pstat->sha1_digest++;
  3085. return 0;
  3086. }
  3087. static int _sha256_init(struct ahash_request *req)
  3088. {
  3089. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3090. struct crypto_stat *pstat;
  3091. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3092. pstat = &_qcrypto_stat;
  3093. _sha_init(req);
  3094. sha_ctx->alg = QCE_HASH_SHA256;
  3095. memset(&rctx->trailing_buf[0], 0x00, SHA256_BLOCK_SIZE);
  3096. memcpy(&rctx->digest[0], &_std_init_vector_sha256_uint8[0],
  3097. SHA256_DIGEST_SIZE);
  3098. sha_ctx->diglen = SHA256_DIGEST_SIZE;
  3099. pstat->sha256_digest++;
  3100. return 0;
  3101. }
  3102. static int _sha1_export(struct ahash_request *req, void *out)
  3103. {
  3104. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3105. struct sha1_state *out_ctx = (struct sha1_state *)out;
  3106. out_ctx->count = rctx->count;
  3107. _byte_stream_to_words(out_ctx->state, rctx->digest, SHA1_DIGEST_SIZE);
  3108. memcpy(out_ctx->buffer, rctx->trailing_buf, SHA1_BLOCK_SIZE);
  3109. return 0;
  3110. }
  3111. static int _sha1_hmac_export(struct ahash_request *req, void *out)
  3112. {
  3113. return _sha1_export(req, out);
  3114. }
  3115. /* crypto hw padding constant for hmac first operation */
  3116. #define HMAC_PADDING 64
  3117. static int __sha1_import_common(struct ahash_request *req, const void *in,
  3118. bool hmac)
  3119. {
  3120. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3121. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3122. struct sha1_state *in_ctx = (struct sha1_state *)in;
  3123. u64 hw_count = in_ctx->count;
  3124. rctx->count = in_ctx->count;
  3125. memcpy(rctx->trailing_buf, in_ctx->buffer, SHA1_BLOCK_SIZE);
  3126. if (in_ctx->count <= SHA1_BLOCK_SIZE) {
  3127. rctx->first_blk = 1;
  3128. } else {
  3129. rctx->first_blk = 0;
  3130. /*
  3131. * For hmac, there is a hardware padding done
  3132. * when first is set. So the byte_count will be
  3133. * incremened by 64 after the operstion of first
  3134. */
  3135. if (hmac)
  3136. hw_count += HMAC_PADDING;
  3137. }
  3138. rctx->byte_count[0] = (uint32_t)(hw_count & 0xFFFFFFC0);
  3139. rctx->byte_count[1] = (uint32_t)(hw_count >> 32);
  3140. _words_to_byte_stream(in_ctx->state, rctx->digest, sha_ctx->diglen);
  3141. rctx->trailing_buf_len = (uint32_t)(in_ctx->count &
  3142. (SHA1_BLOCK_SIZE-1));
  3143. return 0;
  3144. }
  3145. static int _sha1_import(struct ahash_request *req, const void *in)
  3146. {
  3147. return __sha1_import_common(req, in, false);
  3148. }
  3149. static int _sha1_hmac_import(struct ahash_request *req, const void *in)
  3150. {
  3151. return __sha1_import_common(req, in, true);
  3152. }
  3153. static int _sha256_export(struct ahash_request *req, void *out)
  3154. {
  3155. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3156. struct sha256_state *out_ctx = (struct sha256_state *)out;
  3157. out_ctx->count = rctx->count;
  3158. _byte_stream_to_words(out_ctx->state, rctx->digest, SHA256_DIGEST_SIZE);
  3159. memcpy(out_ctx->buf, rctx->trailing_buf, SHA256_BLOCK_SIZE);
  3160. return 0;
  3161. }
  3162. static int _sha256_hmac_export(struct ahash_request *req, void *out)
  3163. {
  3164. return _sha256_export(req, out);
  3165. }
  3166. static int __sha256_import_common(struct ahash_request *req, const void *in,
  3167. bool hmac)
  3168. {
  3169. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3170. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3171. struct sha256_state *in_ctx = (struct sha256_state *)in;
  3172. u64 hw_count = in_ctx->count;
  3173. rctx->count = in_ctx->count;
  3174. memcpy(rctx->trailing_buf, in_ctx->buf, SHA256_BLOCK_SIZE);
  3175. if (in_ctx->count <= SHA256_BLOCK_SIZE) {
  3176. rctx->first_blk = 1;
  3177. } else {
  3178. rctx->first_blk = 0;
  3179. /*
  3180. * for hmac, there is a hardware padding done
  3181. * when first is set. So the byte_count will be
  3182. * incremened by 64 after the operstion of first
  3183. */
  3184. if (hmac)
  3185. hw_count += HMAC_PADDING;
  3186. }
  3187. rctx->byte_count[0] = (uint32_t)(hw_count & 0xFFFFFFC0);
  3188. rctx->byte_count[1] = (uint32_t)(hw_count >> 32);
  3189. _words_to_byte_stream(in_ctx->state, rctx->digest, sha_ctx->diglen);
  3190. rctx->trailing_buf_len = (uint32_t)(in_ctx->count &
  3191. (SHA256_BLOCK_SIZE-1));
  3192. return 0;
  3193. }
  3194. static int _sha256_import(struct ahash_request *req, const void *in)
  3195. {
  3196. return __sha256_import_common(req, in, false);
  3197. }
  3198. static int _sha256_hmac_import(struct ahash_request *req, const void *in)
  3199. {
  3200. return __sha256_import_common(req, in, true);
  3201. }
  3202. static int _copy_source(struct ahash_request *req)
  3203. {
  3204. struct qcrypto_sha_req_ctx *srctx = NULL;
  3205. uint32_t bytes = 0;
  3206. uint32_t num_sg = 0;
  3207. srctx = ahash_request_ctx(req);
  3208. srctx->orig_src = req->src;
  3209. srctx->data = kzalloc((req->nbytes + 64), GFP_ATOMIC);
  3210. if (srctx->data == NULL) {
  3211. pr_err("Mem Alloc fail rctx->data, err %ld for 0x%x\n",
  3212. PTR_ERR(srctx->data), (req->nbytes + 64));
  3213. return -ENOMEM;
  3214. }
  3215. num_sg = qcrypto_count_sg(req->src, req->nbytes);
  3216. bytes = qcrypto_sg_copy_to_buffer(req->src, num_sg, srctx->data,
  3217. req->nbytes);
  3218. if (bytes != req->nbytes)
  3219. pr_warn("bytes copied=0x%x bytes to copy= 0x%x\n", bytes,
  3220. req->nbytes);
  3221. sg_set_buf(&srctx->dsg, srctx->data,
  3222. req->nbytes);
  3223. sg_mark_end(&srctx->dsg);
  3224. req->src = &srctx->dsg;
  3225. return 0;
  3226. }
  3227. static int _sha_update(struct ahash_request *req, uint32_t sha_block_size)
  3228. {
  3229. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3230. struct crypto_priv *cp = sha_ctx->cp;
  3231. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3232. uint32_t total, len, num_sg;
  3233. struct scatterlist *sg_last;
  3234. uint8_t *k_src = NULL;
  3235. uint32_t sha_pad_len = 0;
  3236. uint32_t trailing_buf_len = 0;
  3237. uint32_t nbytes;
  3238. uint32_t offset = 0;
  3239. uint32_t bytes = 0;
  3240. uint8_t *staging;
  3241. int ret = 0;
  3242. /* check for trailing buffer from previous updates and append it */
  3243. total = req->nbytes + rctx->trailing_buf_len;
  3244. len = req->nbytes;
  3245. if (total <= sha_block_size) {
  3246. k_src = &rctx->trailing_buf[rctx->trailing_buf_len];
  3247. num_sg = qcrypto_count_sg(req->src, len);
  3248. bytes = qcrypto_sg_copy_to_buffer(req->src, num_sg, k_src, len);
  3249. rctx->trailing_buf_len = total;
  3250. return 0;
  3251. }
  3252. /* save the original req structure fields*/
  3253. rctx->src = req->src;
  3254. rctx->nbytes = req->nbytes;
  3255. staging = (uint8_t *)ALIGN(((uintptr_t)rctx->staging_dmabuf),
  3256. L1_CACHE_BYTES);
  3257. memcpy(staging, rctx->trailing_buf, rctx->trailing_buf_len);
  3258. k_src = &rctx->trailing_buf[0];
  3259. /* get new trailing buffer */
  3260. sha_pad_len = ALIGN(total, sha_block_size) - total;
  3261. trailing_buf_len = sha_block_size - sha_pad_len;
  3262. offset = req->nbytes - trailing_buf_len;
  3263. if (offset != req->nbytes)
  3264. scatterwalk_map_and_copy(k_src, req->src, offset,
  3265. trailing_buf_len, 0);
  3266. nbytes = total - trailing_buf_len;
  3267. num_sg = qcrypto_count_sg(req->src, req->nbytes);
  3268. len = rctx->trailing_buf_len;
  3269. sg_last = req->src;
  3270. while (len < nbytes) {
  3271. if ((len + sg_last->length) > nbytes)
  3272. break;
  3273. len += sg_last->length;
  3274. sg_last = sg_next(sg_last);
  3275. }
  3276. if (rctx->trailing_buf_len) {
  3277. if (cp->ce_support.aligned_only) {
  3278. rctx->data2 = kzalloc((req->nbytes + 64), GFP_ATOMIC);
  3279. if (rctx->data2 == NULL)
  3280. return -ENOMEM;
  3281. memcpy(rctx->data2, staging,
  3282. rctx->trailing_buf_len);
  3283. memcpy((rctx->data2 + rctx->trailing_buf_len),
  3284. rctx->data, req->src->length);
  3285. kfree_sensitive(rctx->data);
  3286. rctx->data = rctx->data2;
  3287. sg_set_buf(&rctx->sg[0], rctx->data,
  3288. (rctx->trailing_buf_len +
  3289. req->src->length));
  3290. req->src = rctx->sg;
  3291. sg_mark_end(&rctx->sg[0]);
  3292. } else {
  3293. sg_mark_end(sg_last);
  3294. memset(rctx->sg, 0, sizeof(rctx->sg));
  3295. sg_set_buf(&rctx->sg[0], staging,
  3296. rctx->trailing_buf_len);
  3297. sg_mark_end(&rctx->sg[1]);
  3298. sg_chain(rctx->sg, 2, req->src);
  3299. req->src = rctx->sg;
  3300. }
  3301. } else
  3302. sg_mark_end(sg_last);
  3303. req->nbytes = nbytes;
  3304. rctx->trailing_buf_len = trailing_buf_len;
  3305. ret = _qcrypto_queue_req(cp, sha_ctx->pengine, &req->base);
  3306. return ret;
  3307. }
  3308. static int _sha1_update(struct ahash_request *req)
  3309. {
  3310. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3311. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3312. struct crypto_priv *cp = sha_ctx->cp;
  3313. if (cp->ce_support.aligned_only) {
  3314. if (_copy_source(req))
  3315. return -ENOMEM;
  3316. }
  3317. rctx->count += req->nbytes;
  3318. return _sha_update(req, SHA1_BLOCK_SIZE);
  3319. }
  3320. static int _sha256_update(struct ahash_request *req)
  3321. {
  3322. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3323. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3324. struct crypto_priv *cp = sha_ctx->cp;
  3325. if (cp->ce_support.aligned_only) {
  3326. if (_copy_source(req))
  3327. return -ENOMEM;
  3328. }
  3329. rctx->count += req->nbytes;
  3330. return _sha_update(req, SHA256_BLOCK_SIZE);
  3331. }
  3332. static int _sha_final(struct ahash_request *req, uint32_t sha_block_size)
  3333. {
  3334. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3335. struct crypto_priv *cp = sha_ctx->cp;
  3336. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3337. int ret = 0;
  3338. uint8_t *staging;
  3339. if (cp->ce_support.aligned_only) {
  3340. if (_copy_source(req))
  3341. return -ENOMEM;
  3342. }
  3343. rctx->last_blk = 1;
  3344. /* save the original req structure fields*/
  3345. rctx->src = req->src;
  3346. rctx->nbytes = req->nbytes;
  3347. staging = (uint8_t *)ALIGN(((uintptr_t)rctx->staging_dmabuf),
  3348. L1_CACHE_BYTES);
  3349. memcpy(staging, rctx->trailing_buf, rctx->trailing_buf_len);
  3350. sg_set_buf(&rctx->sg[0], staging, rctx->trailing_buf_len);
  3351. sg_mark_end(&rctx->sg[0]);
  3352. req->src = &rctx->sg[0];
  3353. req->nbytes = rctx->trailing_buf_len;
  3354. ret = _qcrypto_queue_req(cp, sha_ctx->pengine, &req->base);
  3355. return ret;
  3356. }
  3357. static int _sha1_final(struct ahash_request *req)
  3358. {
  3359. return _sha_final(req, SHA1_BLOCK_SIZE);
  3360. }
  3361. static int _sha256_final(struct ahash_request *req)
  3362. {
  3363. return _sha_final(req, SHA256_BLOCK_SIZE);
  3364. }
  3365. static int _sha_digest(struct ahash_request *req)
  3366. {
  3367. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3368. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3369. struct crypto_priv *cp = sha_ctx->cp;
  3370. int ret = 0;
  3371. if (cp->ce_support.aligned_only) {
  3372. if (_copy_source(req))
  3373. return -ENOMEM;
  3374. }
  3375. /* save the original req structure fields*/
  3376. rctx->src = req->src;
  3377. rctx->nbytes = req->nbytes;
  3378. rctx->first_blk = 1;
  3379. rctx->last_blk = 1;
  3380. ret = _qcrypto_queue_req(cp, sha_ctx->pengine, &req->base);
  3381. return ret;
  3382. }
  3383. static int _sha1_digest(struct ahash_request *req)
  3384. {
  3385. _sha1_init(req);
  3386. return _sha_digest(req);
  3387. }
  3388. static int _sha256_digest(struct ahash_request *req)
  3389. {
  3390. _sha256_init(req);
  3391. return _sha_digest(req);
  3392. }
  3393. static void _crypto_sha_hmac_ahash_req_complete(
  3394. struct crypto_async_request *req, int err)
  3395. {
  3396. struct completion *ahash_req_complete = req->data;
  3397. if (err == -EINPROGRESS)
  3398. return;
  3399. complete(ahash_req_complete);
  3400. }
  3401. static int _sha_hmac_setkey(struct crypto_ahash *tfm, const u8 *key,
  3402. unsigned int len)
  3403. {
  3404. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(&tfm->base);
  3405. uint8_t *in_buf;
  3406. int ret = 0;
  3407. struct scatterlist sg = {0};
  3408. struct ahash_request *ahash_req;
  3409. struct completion ahash_req_complete;
  3410. ahash_req = ahash_request_alloc(tfm, GFP_KERNEL);
  3411. if (ahash_req == NULL)
  3412. return -ENOMEM;
  3413. init_completion(&ahash_req_complete);
  3414. ahash_request_set_callback(ahash_req,
  3415. CRYPTO_TFM_REQ_MAY_BACKLOG,
  3416. _crypto_sha_hmac_ahash_req_complete,
  3417. &ahash_req_complete);
  3418. crypto_ahash_clear_flags(tfm, ~0);
  3419. in_buf = kzalloc(len + 64, GFP_KERNEL);
  3420. if (in_buf == NULL) {
  3421. ahash_request_free(ahash_req);
  3422. return -ENOMEM;
  3423. }
  3424. memcpy(in_buf, key, len);
  3425. sg_set_buf(&sg, in_buf, len);
  3426. sg_mark_end(&sg);
  3427. ahash_request_set_crypt(ahash_req, &sg,
  3428. &sha_ctx->authkey[0], len);
  3429. if (sha_ctx->alg == QCE_HASH_SHA1)
  3430. ret = _sha1_digest(ahash_req);
  3431. else
  3432. ret = _sha256_digest(ahash_req);
  3433. if (ret == -EINPROGRESS || ret == -EBUSY) {
  3434. ret =
  3435. wait_for_completion_interruptible(
  3436. &ahash_req_complete);
  3437. reinit_completion(&sha_ctx->ahash_req_complete);
  3438. }
  3439. kfree_sensitive(in_buf);
  3440. ahash_request_free(ahash_req);
  3441. return ret;
  3442. }
  3443. static int _sha1_hmac_setkey(struct crypto_ahash *tfm, const u8 *key,
  3444. unsigned int len)
  3445. {
  3446. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(&tfm->base);
  3447. int ret = 0;
  3448. memset(&sha_ctx->authkey[0], 0, SHA1_BLOCK_SIZE);
  3449. if (len <= SHA1_BLOCK_SIZE) {
  3450. memcpy(&sha_ctx->authkey[0], key, len);
  3451. sha_ctx->authkey_in_len = len;
  3452. } else {
  3453. sha_ctx->alg = QCE_HASH_SHA1;
  3454. sha_ctx->diglen = SHA1_DIGEST_SIZE;
  3455. ret = _sha_hmac_setkey(tfm, key, len);
  3456. if (ret)
  3457. pr_err("SHA1 hmac setkey failed\n");
  3458. sha_ctx->authkey_in_len = SHA1_BLOCK_SIZE;
  3459. }
  3460. return ret;
  3461. }
  3462. static int _sha256_hmac_setkey(struct crypto_ahash *tfm, const u8 *key,
  3463. unsigned int len)
  3464. {
  3465. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(&tfm->base);
  3466. int ret = 0;
  3467. memset(&sha_ctx->authkey[0], 0, SHA256_BLOCK_SIZE);
  3468. if (len <= SHA256_BLOCK_SIZE) {
  3469. memcpy(&sha_ctx->authkey[0], key, len);
  3470. sha_ctx->authkey_in_len = len;
  3471. } else {
  3472. sha_ctx->alg = QCE_HASH_SHA256;
  3473. sha_ctx->diglen = SHA256_DIGEST_SIZE;
  3474. ret = _sha_hmac_setkey(tfm, key, len);
  3475. if (ret)
  3476. pr_err("SHA256 hmac setkey failed\n");
  3477. sha_ctx->authkey_in_len = SHA256_BLOCK_SIZE;
  3478. }
  3479. return ret;
  3480. }
  3481. static int _sha_hmac_init_ihash(struct ahash_request *req,
  3482. uint32_t sha_block_size)
  3483. {
  3484. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3485. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3486. int i;
  3487. for (i = 0; i < sha_block_size; i++)
  3488. rctx->trailing_buf[i] = sha_ctx->authkey[i] ^ 0x36;
  3489. rctx->trailing_buf_len = sha_block_size;
  3490. return 0;
  3491. }
  3492. static int _sha1_hmac_init(struct ahash_request *req)
  3493. {
  3494. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3495. struct crypto_priv *cp = sha_ctx->cp;
  3496. struct crypto_stat *pstat;
  3497. int ret = 0;
  3498. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3499. pstat = &_qcrypto_stat;
  3500. pstat->sha1_hmac_digest++;
  3501. _sha_init(req);
  3502. memset(&rctx->trailing_buf[0], 0x00, SHA1_BLOCK_SIZE);
  3503. memcpy(&rctx->digest[0], &_std_init_vector_sha1_uint8[0],
  3504. SHA1_DIGEST_SIZE);
  3505. sha_ctx->diglen = SHA1_DIGEST_SIZE;
  3506. if (cp->ce_support.sha_hmac)
  3507. sha_ctx->alg = QCE_HASH_SHA1_HMAC;
  3508. else {
  3509. sha_ctx->alg = QCE_HASH_SHA1;
  3510. ret = _sha_hmac_init_ihash(req, SHA1_BLOCK_SIZE);
  3511. }
  3512. return ret;
  3513. }
  3514. static int _sha256_hmac_init(struct ahash_request *req)
  3515. {
  3516. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3517. struct crypto_priv *cp = sha_ctx->cp;
  3518. struct crypto_stat *pstat;
  3519. int ret = 0;
  3520. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3521. pstat = &_qcrypto_stat;
  3522. pstat->sha256_hmac_digest++;
  3523. _sha_init(req);
  3524. memset(&rctx->trailing_buf[0], 0x00, SHA256_BLOCK_SIZE);
  3525. memcpy(&rctx->digest[0], &_std_init_vector_sha256_uint8[0],
  3526. SHA256_DIGEST_SIZE);
  3527. sha_ctx->diglen = SHA256_DIGEST_SIZE;
  3528. if (cp->ce_support.sha_hmac)
  3529. sha_ctx->alg = QCE_HASH_SHA256_HMAC;
  3530. else {
  3531. sha_ctx->alg = QCE_HASH_SHA256;
  3532. ret = _sha_hmac_init_ihash(req, SHA256_BLOCK_SIZE);
  3533. }
  3534. return ret;
  3535. }
  3536. static int _sha1_hmac_update(struct ahash_request *req)
  3537. {
  3538. return _sha1_update(req);
  3539. }
  3540. static int _sha256_hmac_update(struct ahash_request *req)
  3541. {
  3542. return _sha256_update(req);
  3543. }
  3544. static int _sha_hmac_outer_hash(struct ahash_request *req,
  3545. uint32_t sha_digest_size, uint32_t sha_block_size)
  3546. {
  3547. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3548. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3549. struct crypto_priv *cp = sha_ctx->cp;
  3550. int i;
  3551. uint8_t *staging;
  3552. uint8_t *p;
  3553. staging = (uint8_t *)ALIGN(((uintptr_t)rctx->staging_dmabuf),
  3554. L1_CACHE_BYTES);
  3555. p = staging;
  3556. for (i = 0; i < sha_block_size; i++)
  3557. *p++ = sha_ctx->authkey[i] ^ 0x5c;
  3558. memcpy(p, &rctx->digest[0], sha_digest_size);
  3559. sg_set_buf(&rctx->sg[0], staging, sha_block_size +
  3560. sha_digest_size);
  3561. sg_mark_end(&rctx->sg[0]);
  3562. /* save the original req structure fields*/
  3563. rctx->src = req->src;
  3564. rctx->nbytes = req->nbytes;
  3565. req->src = &rctx->sg[0];
  3566. req->nbytes = sha_block_size + sha_digest_size;
  3567. _sha_init(req);
  3568. if (sha_ctx->alg == QCE_HASH_SHA1) {
  3569. memcpy(&rctx->digest[0], &_std_init_vector_sha1_uint8[0],
  3570. SHA1_DIGEST_SIZE);
  3571. sha_ctx->diglen = SHA1_DIGEST_SIZE;
  3572. } else {
  3573. memcpy(&rctx->digest[0], &_std_init_vector_sha256_uint8[0],
  3574. SHA256_DIGEST_SIZE);
  3575. sha_ctx->diglen = SHA256_DIGEST_SIZE;
  3576. }
  3577. rctx->last_blk = 1;
  3578. return _qcrypto_queue_req(cp, sha_ctx->pengine, &req->base);
  3579. }
  3580. static int _sha_hmac_inner_hash(struct ahash_request *req,
  3581. uint32_t sha_digest_size, uint32_t sha_block_size)
  3582. {
  3583. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3584. struct ahash_request *areq = sha_ctx->ahash_req;
  3585. struct crypto_priv *cp = sha_ctx->cp;
  3586. int ret = 0;
  3587. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3588. uint8_t *staging;
  3589. staging = (uint8_t *)ALIGN(((uintptr_t)rctx->staging_dmabuf),
  3590. L1_CACHE_BYTES);
  3591. memcpy(staging, rctx->trailing_buf, rctx->trailing_buf_len);
  3592. sg_set_buf(&rctx->sg[0], staging, rctx->trailing_buf_len);
  3593. sg_mark_end(&rctx->sg[0]);
  3594. ahash_request_set_crypt(areq, &rctx->sg[0], &rctx->digest[0],
  3595. rctx->trailing_buf_len);
  3596. rctx->last_blk = 1;
  3597. ret = _qcrypto_queue_req(cp, sha_ctx->pengine, &areq->base);
  3598. if (ret == -EINPROGRESS || ret == -EBUSY) {
  3599. ret =
  3600. wait_for_completion_interruptible(&sha_ctx->ahash_req_complete);
  3601. reinit_completion(&sha_ctx->ahash_req_complete);
  3602. }
  3603. return ret;
  3604. }
  3605. static int _sha1_hmac_final(struct ahash_request *req)
  3606. {
  3607. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3608. struct crypto_priv *cp = sha_ctx->cp;
  3609. int ret = 0;
  3610. if (cp->ce_support.sha_hmac)
  3611. return _sha_final(req, SHA1_BLOCK_SIZE);
  3612. ret = _sha_hmac_inner_hash(req, SHA1_DIGEST_SIZE, SHA1_BLOCK_SIZE);
  3613. if (ret)
  3614. return ret;
  3615. return _sha_hmac_outer_hash(req, SHA1_DIGEST_SIZE, SHA1_BLOCK_SIZE);
  3616. }
  3617. static int _sha256_hmac_final(struct ahash_request *req)
  3618. {
  3619. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3620. struct crypto_priv *cp = sha_ctx->cp;
  3621. int ret = 0;
  3622. if (cp->ce_support.sha_hmac)
  3623. return _sha_final(req, SHA256_BLOCK_SIZE);
  3624. ret = _sha_hmac_inner_hash(req, SHA256_DIGEST_SIZE, SHA256_BLOCK_SIZE);
  3625. if (ret)
  3626. return ret;
  3627. return _sha_hmac_outer_hash(req, SHA256_DIGEST_SIZE, SHA256_BLOCK_SIZE);
  3628. }
  3629. static int _sha1_hmac_digest(struct ahash_request *req)
  3630. {
  3631. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3632. struct crypto_stat *pstat;
  3633. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3634. pstat = &_qcrypto_stat;
  3635. pstat->sha1_hmac_digest++;
  3636. _sha_init(req);
  3637. memcpy(&rctx->digest[0], &_std_init_vector_sha1_uint8[0],
  3638. SHA1_DIGEST_SIZE);
  3639. sha_ctx->diglen = SHA1_DIGEST_SIZE;
  3640. sha_ctx->alg = QCE_HASH_SHA1_HMAC;
  3641. return _sha_digest(req);
  3642. }
  3643. static int _sha256_hmac_digest(struct ahash_request *req)
  3644. {
  3645. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3646. struct crypto_stat *pstat;
  3647. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3648. pstat = &_qcrypto_stat;
  3649. pstat->sha256_hmac_digest++;
  3650. _sha_init(req);
  3651. memcpy(&rctx->digest[0], &_std_init_vector_sha256_uint8[0],
  3652. SHA256_DIGEST_SIZE);
  3653. sha_ctx->diglen = SHA256_DIGEST_SIZE;
  3654. sha_ctx->alg = QCE_HASH_SHA256_HMAC;
  3655. return _sha_digest(req);
  3656. }
  3657. static int _qcrypto_prefix_alg_cra_name(char cra_name[], unsigned int size)
  3658. {
  3659. char new_cra_name[CRYPTO_MAX_ALG_NAME] = "qcom-";
  3660. if (size >= CRYPTO_MAX_ALG_NAME - strlen("qcom-"))
  3661. return -EINVAL;
  3662. strlcat(new_cra_name, cra_name, CRYPTO_MAX_ALG_NAME);
  3663. strlcpy(cra_name, new_cra_name, CRYPTO_MAX_ALG_NAME);
  3664. return 0;
  3665. }
  3666. int qcrypto_cipher_set_device(struct skcipher_request *req, unsigned int dev)
  3667. {
  3668. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  3669. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  3670. struct crypto_priv *cp = ctx->cp;
  3671. struct crypto_engine *pengine = NULL;
  3672. pengine = _qrypto_find_pengine_device(cp, dev);
  3673. if (pengine == NULL)
  3674. return -ENODEV;
  3675. ctx->pengine = pengine;
  3676. return 0;
  3677. }
  3678. EXPORT_SYMBOL(qcrypto_cipher_set_device);
  3679. int qcrypto_cipher_set_device_hw(struct skcipher_request *req, u32 dev,
  3680. u32 hw_inst)
  3681. {
  3682. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3683. struct crypto_priv *cp = ctx->cp;
  3684. struct crypto_engine *pengine = NULL;
  3685. pengine = _qrypto_find_pengine_device_hw(cp, dev, hw_inst);
  3686. if (pengine == NULL)
  3687. return -ENODEV;
  3688. ctx->pengine = pengine;
  3689. return 0;
  3690. }
  3691. EXPORT_SYMBOL(qcrypto_cipher_set_device_hw);
  3692. int qcrypto_aead_set_device(struct aead_request *req, unsigned int dev)
  3693. {
  3694. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3695. struct crypto_priv *cp = ctx->cp;
  3696. struct crypto_engine *pengine = NULL;
  3697. pengine = _qrypto_find_pengine_device(cp, dev);
  3698. if (pengine == NULL)
  3699. return -ENODEV;
  3700. ctx->pengine = pengine;
  3701. return 0;
  3702. }
  3703. EXPORT_SYMBOL(qcrypto_aead_set_device);
  3704. int qcrypto_ahash_set_device(struct ahash_request *req, unsigned int dev)
  3705. {
  3706. struct qcrypto_sha_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3707. struct crypto_priv *cp = ctx->cp;
  3708. struct crypto_engine *pengine = NULL;
  3709. pengine = _qrypto_find_pengine_device(cp, dev);
  3710. if (pengine == NULL)
  3711. return -ENODEV;
  3712. ctx->pengine = pengine;
  3713. return 0;
  3714. }
  3715. EXPORT_SYMBOL(qcrypto_ahash_set_device);
  3716. int qcrypto_cipher_set_flag(struct skcipher_request *req, unsigned int flags)
  3717. {
  3718. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  3719. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  3720. struct crypto_priv *cp = ctx->cp;
  3721. if ((flags & QCRYPTO_CTX_USE_HW_KEY) &&
  3722. (!cp->platform_support.hw_key_support)) {
  3723. pr_err("%s HW key usage not supported\n", __func__);
  3724. return -EINVAL;
  3725. }
  3726. if (((flags | ctx->flags) & QCRYPTO_CTX_KEY_MASK) ==
  3727. QCRYPTO_CTX_KEY_MASK) {
  3728. pr_err("%s Cannot set all key flags\n", __func__);
  3729. return -EINVAL;
  3730. }
  3731. ctx->flags |= flags;
  3732. return 0;
  3733. }
  3734. EXPORT_SYMBOL(qcrypto_cipher_set_flag);
  3735. int qcrypto_aead_set_flag(struct aead_request *req, unsigned int flags)
  3736. {
  3737. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3738. struct crypto_priv *cp = ctx->cp;
  3739. if ((flags & QCRYPTO_CTX_USE_HW_KEY) &&
  3740. (!cp->platform_support.hw_key_support)) {
  3741. pr_err("%s HW key usage not supported\n", __func__);
  3742. return -EINVAL;
  3743. }
  3744. if (((flags | ctx->flags) & QCRYPTO_CTX_KEY_MASK) ==
  3745. QCRYPTO_CTX_KEY_MASK) {
  3746. pr_err("%s Cannot set all key flags\n", __func__);
  3747. return -EINVAL;
  3748. }
  3749. ctx->flags |= flags;
  3750. return 0;
  3751. }
  3752. EXPORT_SYMBOL(qcrypto_aead_set_flag);
  3753. int qcrypto_ahash_set_flag(struct ahash_request *req, unsigned int flags)
  3754. {
  3755. struct qcrypto_sha_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3756. struct crypto_priv *cp = ctx->cp;
  3757. if ((flags & QCRYPTO_CTX_USE_HW_KEY) &&
  3758. (!cp->platform_support.hw_key_support)) {
  3759. pr_err("%s HW key usage not supported\n", __func__);
  3760. return -EINVAL;
  3761. }
  3762. if (((flags | ctx->flags) & QCRYPTO_CTX_KEY_MASK) ==
  3763. QCRYPTO_CTX_KEY_MASK) {
  3764. pr_err("%s Cannot set all key flags\n", __func__);
  3765. return -EINVAL;
  3766. }
  3767. ctx->flags |= flags;
  3768. return 0;
  3769. }
  3770. EXPORT_SYMBOL(qcrypto_ahash_set_flag);
  3771. int qcrypto_cipher_clear_flag(struct skcipher_request *req,
  3772. unsigned int flags)
  3773. {
  3774. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  3775. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  3776. ctx->flags &= ~flags;
  3777. return 0;
  3778. }
  3779. EXPORT_SYMBOL(qcrypto_cipher_clear_flag);
  3780. int qcrypto_aead_clear_flag(struct aead_request *req, unsigned int flags)
  3781. {
  3782. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3783. ctx->flags &= ~flags;
  3784. return 0;
  3785. }
  3786. EXPORT_SYMBOL(qcrypto_aead_clear_flag);
  3787. int qcrypto_ahash_clear_flag(struct ahash_request *req, unsigned int flags)
  3788. {
  3789. struct qcrypto_sha_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3790. ctx->flags &= ~flags;
  3791. return 0;
  3792. }
  3793. EXPORT_SYMBOL(qcrypto_ahash_clear_flag);
  3794. static struct ahash_alg _qcrypto_ahash_algos[] = {
  3795. {
  3796. .init = _sha1_init,
  3797. .update = _sha1_update,
  3798. .final = _sha1_final,
  3799. .digest = _sha1_digest,
  3800. .export = _sha1_export,
  3801. .import = _sha1_import,
  3802. .halg = {
  3803. .digestsize = SHA1_DIGEST_SIZE,
  3804. .statesize = sizeof(struct sha1_state),
  3805. .base = {
  3806. .cra_name = "sha1",
  3807. .cra_driver_name = "qcrypto-sha1",
  3808. .cra_priority = 300,
  3809. .cra_flags = CRYPTO_ALG_ASYNC,
  3810. .cra_blocksize = SHA1_BLOCK_SIZE,
  3811. .cra_ctxsize = sizeof(struct qcrypto_sha_ctx),
  3812. .cra_alignmask = 0,
  3813. .cra_module = THIS_MODULE,
  3814. .cra_init = _qcrypto_ahash_cra_init,
  3815. .cra_exit = _qcrypto_ahash_cra_exit,
  3816. },
  3817. },
  3818. },
  3819. {
  3820. .init = _sha256_init,
  3821. .update = _sha256_update,
  3822. .final = _sha256_final,
  3823. .digest = _sha256_digest,
  3824. .export = _sha256_export,
  3825. .import = _sha256_import,
  3826. .halg = {
  3827. .digestsize = SHA256_DIGEST_SIZE,
  3828. .statesize = sizeof(struct sha256_state),
  3829. .base = {
  3830. .cra_name = "sha256",
  3831. .cra_driver_name = "qcrypto-sha256",
  3832. .cra_priority = 300,
  3833. .cra_flags = CRYPTO_ALG_ASYNC,
  3834. .cra_blocksize = SHA256_BLOCK_SIZE,
  3835. .cra_ctxsize = sizeof(struct qcrypto_sha_ctx),
  3836. .cra_alignmask = 0,
  3837. .cra_module = THIS_MODULE,
  3838. .cra_init = _qcrypto_ahash_cra_init,
  3839. .cra_exit = _qcrypto_ahash_cra_exit,
  3840. },
  3841. },
  3842. },
  3843. };
  3844. static struct ahash_alg _qcrypto_sha_hmac_algos[] = {
  3845. {
  3846. .init = _sha1_hmac_init,
  3847. .update = _sha1_hmac_update,
  3848. .final = _sha1_hmac_final,
  3849. .export = _sha1_hmac_export,
  3850. .import = _sha1_hmac_import,
  3851. .digest = _sha1_hmac_digest,
  3852. .setkey = _sha1_hmac_setkey,
  3853. .halg = {
  3854. .digestsize = SHA1_DIGEST_SIZE,
  3855. .statesize = sizeof(struct sha1_state),
  3856. .base = {
  3857. .cra_name = "hmac(sha1)",
  3858. .cra_driver_name = "qcrypto-hmac-sha1",
  3859. .cra_priority = 300,
  3860. .cra_flags = CRYPTO_ALG_ASYNC,
  3861. .cra_blocksize = SHA1_BLOCK_SIZE,
  3862. .cra_ctxsize = sizeof(struct qcrypto_sha_ctx),
  3863. .cra_alignmask = 0,
  3864. .cra_module = THIS_MODULE,
  3865. .cra_init = _qcrypto_ahash_hmac_cra_init,
  3866. .cra_exit = _qcrypto_ahash_cra_exit,
  3867. },
  3868. },
  3869. },
  3870. {
  3871. .init = _sha256_hmac_init,
  3872. .update = _sha256_hmac_update,
  3873. .final = _sha256_hmac_final,
  3874. .export = _sha256_hmac_export,
  3875. .import = _sha256_hmac_import,
  3876. .digest = _sha256_hmac_digest,
  3877. .setkey = _sha256_hmac_setkey,
  3878. .halg = {
  3879. .digestsize = SHA256_DIGEST_SIZE,
  3880. .statesize = sizeof(struct sha256_state),
  3881. .base = {
  3882. .cra_name = "hmac(sha256)",
  3883. .cra_driver_name = "qcrypto-hmac-sha256",
  3884. .cra_priority = 300,
  3885. .cra_flags = CRYPTO_ALG_ASYNC,
  3886. .cra_blocksize = SHA256_BLOCK_SIZE,
  3887. .cra_ctxsize = sizeof(struct qcrypto_sha_ctx),
  3888. .cra_alignmask = 0,
  3889. .cra_module = THIS_MODULE,
  3890. .cra_init = _qcrypto_ahash_hmac_cra_init,
  3891. .cra_exit = _qcrypto_ahash_cra_exit,
  3892. },
  3893. },
  3894. },
  3895. };
  3896. static struct skcipher_alg _qcrypto_sk_cipher_algos[] = {
  3897. {
  3898. .setkey = _qcrypto_setkey_aes,
  3899. .encrypt = _qcrypto_enc_aes_ecb,
  3900. .decrypt = _qcrypto_dec_aes_ecb,
  3901. .init = _qcrypto_aes_skcipher_init,
  3902. .exit = _qcrypto_aes_skcipher_exit,
  3903. .min_keysize = AES_MIN_KEY_SIZE,
  3904. .max_keysize = AES_MAX_KEY_SIZE,
  3905. .base = {
  3906. .cra_name = "ecb(aes)",
  3907. .cra_driver_name = "qcrypto-ecb-aes",
  3908. .cra_priority = 300,
  3909. .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC,
  3910. .cra_blocksize = AES_BLOCK_SIZE,
  3911. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  3912. .cra_alignmask = 0,
  3913. .cra_module = THIS_MODULE,
  3914. },
  3915. },
  3916. {
  3917. .setkey = _qcrypto_setkey_aes,
  3918. .encrypt = _qcrypto_enc_aes_cbc,
  3919. .decrypt = _qcrypto_dec_aes_cbc,
  3920. .init = _qcrypto_aes_skcipher_init,
  3921. .exit = _qcrypto_aes_skcipher_exit,
  3922. .min_keysize = AES_MIN_KEY_SIZE,
  3923. .max_keysize = AES_MAX_KEY_SIZE,
  3924. .ivsize = AES_BLOCK_SIZE,
  3925. .base = {
  3926. .cra_name = "cbc(aes)",
  3927. .cra_driver_name = "qcrypto-cbc-aes",
  3928. .cra_priority = 300,
  3929. .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC,
  3930. .cra_blocksize = AES_BLOCK_SIZE,
  3931. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  3932. .cra_alignmask = 0,
  3933. .cra_module = THIS_MODULE,
  3934. },
  3935. },
  3936. {
  3937. .setkey = _qcrypto_setkey_aes,
  3938. .encrypt = _qcrypto_enc_aes_ctr,
  3939. .decrypt = _qcrypto_dec_aes_ctr,
  3940. .init = _qcrypto_aes_skcipher_init,
  3941. .exit = _qcrypto_aes_skcipher_exit,
  3942. .min_keysize = AES_MIN_KEY_SIZE,
  3943. .max_keysize = AES_MAX_KEY_SIZE,
  3944. .ivsize = AES_BLOCK_SIZE,
  3945. .base = {
  3946. .cra_name = "ctr(aes)",
  3947. .cra_driver_name = "qcrypto-ctr-aes",
  3948. .cra_priority = 300,
  3949. .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC,
  3950. .cra_blocksize = AES_BLOCK_SIZE,
  3951. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  3952. .cra_alignmask = 0,
  3953. .cra_module = THIS_MODULE,
  3954. },
  3955. },
  3956. {
  3957. .setkey = _qcrypto_setkey_des,
  3958. .encrypt = _qcrypto_enc_des_ecb,
  3959. .decrypt = _qcrypto_dec_des_ecb,
  3960. .init = _qcrypto_skcipher_init,
  3961. .exit = _qcrypto_skcipher_exit,
  3962. .min_keysize = DES_KEY_SIZE,
  3963. .max_keysize = DES_KEY_SIZE,
  3964. .base = {
  3965. .cra_name = "ecb(des)",
  3966. .cra_driver_name = "qcrypto-ecb-des",
  3967. .cra_priority = 300,
  3968. .cra_flags = CRYPTO_ALG_ASYNC,
  3969. .cra_blocksize = DES_BLOCK_SIZE,
  3970. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  3971. .cra_alignmask = 0,
  3972. .cra_module = THIS_MODULE,
  3973. },
  3974. },
  3975. {
  3976. .setkey = _qcrypto_setkey_des,
  3977. .encrypt = _qcrypto_enc_des_cbc,
  3978. .decrypt = _qcrypto_dec_des_cbc,
  3979. .init = _qcrypto_skcipher_init,
  3980. .exit = _qcrypto_skcipher_exit,
  3981. .min_keysize = DES_KEY_SIZE,
  3982. .max_keysize = DES_KEY_SIZE,
  3983. .ivsize = DES_BLOCK_SIZE,
  3984. .base = {
  3985. .cra_name = "cbc(des)",
  3986. .cra_driver_name = "qcrypto-cbc-des",
  3987. .cra_priority = 300,
  3988. .cra_flags = CRYPTO_ALG_ASYNC,
  3989. .cra_blocksize = DES_BLOCK_SIZE,
  3990. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  3991. .cra_alignmask = 0,
  3992. .cra_module = THIS_MODULE,
  3993. },
  3994. },
  3995. {
  3996. .setkey = _qcrypto_setkey_3des,
  3997. .encrypt = _qcrypto_enc_3des_ecb,
  3998. .decrypt = _qcrypto_dec_3des_ecb,
  3999. .init = _qcrypto_skcipher_init,
  4000. .exit = _qcrypto_skcipher_exit,
  4001. .min_keysize = DES3_EDE_KEY_SIZE,
  4002. .max_keysize = DES3_EDE_KEY_SIZE,
  4003. .base = {
  4004. .cra_name = "ecb(des3_ede)",
  4005. .cra_driver_name = "qcrypto-ecb-3des",
  4006. .cra_priority = 300,
  4007. .cra_flags = CRYPTO_ALG_ASYNC,
  4008. .cra_blocksize = DES3_EDE_BLOCK_SIZE,
  4009. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4010. .cra_alignmask = 0,
  4011. .cra_module = THIS_MODULE,
  4012. },
  4013. },
  4014. {
  4015. .setkey = _qcrypto_setkey_3des,
  4016. .encrypt = _qcrypto_enc_3des_cbc,
  4017. .decrypt = _qcrypto_dec_3des_cbc,
  4018. .init = _qcrypto_skcipher_init,
  4019. .exit = _qcrypto_skcipher_exit,
  4020. .min_keysize = DES3_EDE_KEY_SIZE,
  4021. .max_keysize = DES3_EDE_KEY_SIZE,
  4022. .ivsize = DES3_EDE_BLOCK_SIZE,
  4023. .base = {
  4024. .cra_name = "cbc(des3_ede)",
  4025. .cra_driver_name = "qcrypto-cbc-3des",
  4026. .cra_priority = 300,
  4027. .cra_flags = CRYPTO_ALG_ASYNC,
  4028. .cra_blocksize = DES3_EDE_BLOCK_SIZE,
  4029. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4030. .cra_alignmask = 0,
  4031. .cra_module = THIS_MODULE,
  4032. },
  4033. },
  4034. };
  4035. static struct skcipher_alg _qcrypto_sk_cipher_xts_algo = {
  4036. .setkey = _qcrypto_setkey_aes_xts,
  4037. .encrypt = _qcrypto_enc_aes_xts,
  4038. .decrypt = _qcrypto_dec_aes_xts,
  4039. .init = _qcrypto_skcipher_init,
  4040. .exit = _qcrypto_skcipher_exit,
  4041. .min_keysize = AES_MIN_KEY_SIZE,
  4042. .max_keysize = AES_MAX_KEY_SIZE,
  4043. .ivsize = AES_BLOCK_SIZE,
  4044. .base = {
  4045. .cra_name = "xts(aes)",
  4046. .cra_driver_name = "qcrypto-xts-aes",
  4047. .cra_priority = 300,
  4048. .cra_flags = CRYPTO_ALG_ASYNC,
  4049. .cra_blocksize = AES_BLOCK_SIZE,
  4050. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4051. .cra_alignmask = 0,
  4052. .cra_module = THIS_MODULE,
  4053. },
  4054. };
  4055. static struct aead_alg _qcrypto_aead_sha1_hmac_algos[] = {
  4056. {
  4057. .setkey = _qcrypto_aead_setkey,
  4058. .setauthsize = _qcrypto_aead_setauthsize,
  4059. .encrypt = _qcrypto_aead_encrypt_aes_cbc,
  4060. .decrypt = _qcrypto_aead_decrypt_aes_cbc,
  4061. .init = _qcrypto_cra_aead_aes_sha1_init,
  4062. .exit = _qcrypto_cra_aead_aes_exit,
  4063. .ivsize = AES_BLOCK_SIZE,
  4064. .maxauthsize = SHA1_DIGEST_SIZE,
  4065. .base = {
  4066. .cra_name = "authenc(hmac(sha1),cbc(aes))",
  4067. .cra_driver_name = "qcrypto-aead-hmac-sha1-cbc-aes",
  4068. .cra_priority = 300,
  4069. .cra_flags = CRYPTO_ALG_ASYNC,
  4070. .cra_blocksize = AES_BLOCK_SIZE,
  4071. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4072. .cra_alignmask = 0,
  4073. .cra_module = THIS_MODULE,
  4074. },
  4075. },
  4076. {
  4077. .setkey = _qcrypto_aead_setkey,
  4078. .setauthsize = _qcrypto_aead_setauthsize,
  4079. .encrypt = _qcrypto_aead_encrypt_des_cbc,
  4080. .decrypt = _qcrypto_aead_decrypt_des_cbc,
  4081. .init = _qcrypto_cra_aead_sha1_init,
  4082. .exit = _qcrypto_cra_aead_exit,
  4083. .ivsize = DES_BLOCK_SIZE,
  4084. .maxauthsize = SHA1_DIGEST_SIZE,
  4085. .base = {
  4086. .cra_name = "authenc(hmac(sha1),cbc(des))",
  4087. .cra_driver_name = "qcrypto-aead-hmac-sha1-cbc-des",
  4088. .cra_priority = 300,
  4089. .cra_flags = CRYPTO_ALG_ASYNC,
  4090. .cra_blocksize = DES_BLOCK_SIZE,
  4091. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4092. .cra_alignmask = 0,
  4093. .cra_module = THIS_MODULE,
  4094. },
  4095. },
  4096. {
  4097. .setkey = _qcrypto_aead_setkey,
  4098. .setauthsize = _qcrypto_aead_setauthsize,
  4099. .encrypt = _qcrypto_aead_encrypt_3des_cbc,
  4100. .decrypt = _qcrypto_aead_decrypt_3des_cbc,
  4101. .init = _qcrypto_cra_aead_sha1_init,
  4102. .exit = _qcrypto_cra_aead_exit,
  4103. .ivsize = DES3_EDE_BLOCK_SIZE,
  4104. .maxauthsize = SHA1_DIGEST_SIZE,
  4105. .base = {
  4106. .cra_name = "authenc(hmac(sha1),cbc(des3_ede))",
  4107. .cra_driver_name = "qcrypto-aead-hmac-sha1-cbc-3des",
  4108. .cra_priority = 300,
  4109. .cra_flags = CRYPTO_ALG_ASYNC,
  4110. .cra_blocksize = DES3_EDE_BLOCK_SIZE,
  4111. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4112. .cra_alignmask = 0,
  4113. .cra_module = THIS_MODULE,
  4114. },
  4115. },
  4116. };
  4117. static struct aead_alg _qcrypto_aead_sha256_hmac_algos[] = {
  4118. {
  4119. .setkey = _qcrypto_aead_setkey,
  4120. .setauthsize = _qcrypto_aead_setauthsize,
  4121. .encrypt = _qcrypto_aead_encrypt_aes_cbc,
  4122. .decrypt = _qcrypto_aead_decrypt_aes_cbc,
  4123. .init = _qcrypto_cra_aead_aes_sha256_init,
  4124. .exit = _qcrypto_cra_aead_aes_exit,
  4125. .ivsize = AES_BLOCK_SIZE,
  4126. .maxauthsize = SHA256_DIGEST_SIZE,
  4127. .base = {
  4128. .cra_name = "authenc(hmac(sha256),cbc(aes))",
  4129. .cra_driver_name = "qcrypto-aead-hmac-sha256-cbc-aes",
  4130. .cra_priority = 300,
  4131. .cra_flags = CRYPTO_ALG_ASYNC,
  4132. .cra_blocksize = AES_BLOCK_SIZE,
  4133. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4134. .cra_alignmask = 0,
  4135. .cra_module = THIS_MODULE,
  4136. },
  4137. },
  4138. {
  4139. .setkey = _qcrypto_aead_setkey,
  4140. .setauthsize = _qcrypto_aead_setauthsize,
  4141. .encrypt = _qcrypto_aead_encrypt_des_cbc,
  4142. .decrypt = _qcrypto_aead_decrypt_des_cbc,
  4143. .init = _qcrypto_cra_aead_sha256_init,
  4144. .exit = _qcrypto_cra_aead_exit,
  4145. .ivsize = DES_BLOCK_SIZE,
  4146. .maxauthsize = SHA256_DIGEST_SIZE,
  4147. .base = {
  4148. .cra_name = "authenc(hmac(sha256),cbc(des))",
  4149. .cra_driver_name = "qcrypto-aead-hmac-sha256-cbc-des",
  4150. .cra_priority = 300,
  4151. .cra_flags = CRYPTO_ALG_ASYNC,
  4152. .cra_blocksize = DES_BLOCK_SIZE,
  4153. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4154. .cra_alignmask = 0,
  4155. .cra_module = THIS_MODULE,
  4156. },
  4157. },
  4158. {
  4159. .setkey = _qcrypto_aead_setkey,
  4160. .setauthsize = _qcrypto_aead_setauthsize,
  4161. .encrypt = _qcrypto_aead_encrypt_3des_cbc,
  4162. .decrypt = _qcrypto_aead_decrypt_3des_cbc,
  4163. .init = _qcrypto_cra_aead_sha256_init,
  4164. .exit = _qcrypto_cra_aead_exit,
  4165. .ivsize = DES3_EDE_BLOCK_SIZE,
  4166. .maxauthsize = SHA256_DIGEST_SIZE,
  4167. .base = {
  4168. .cra_name = "authenc(hmac(sha256),cbc(des3_ede))",
  4169. .cra_driver_name = "qcrypto-aead-hmac-sha256-cbc-3des",
  4170. .cra_priority = 300,
  4171. .cra_flags = CRYPTO_ALG_ASYNC,
  4172. .cra_blocksize = DES3_EDE_BLOCK_SIZE,
  4173. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4174. .cra_alignmask = 0,
  4175. .cra_module = THIS_MODULE,
  4176. },
  4177. },
  4178. };
  4179. static struct aead_alg _qcrypto_aead_ccm_algo = {
  4180. .setkey = _qcrypto_aead_ccm_setkey,
  4181. .setauthsize = _qcrypto_aead_ccm_setauthsize,
  4182. .encrypt = _qcrypto_aead_encrypt_aes_ccm,
  4183. .decrypt = _qcrypto_aead_decrypt_aes_ccm,
  4184. .init = _qcrypto_cra_aead_ccm_init,
  4185. .exit = _qcrypto_cra_aead_exit,
  4186. .ivsize = AES_BLOCK_SIZE,
  4187. .maxauthsize = AES_BLOCK_SIZE,
  4188. .base = {
  4189. .cra_name = "ccm(aes)",
  4190. .cra_driver_name = "qcrypto-aes-ccm",
  4191. .cra_priority = 300,
  4192. .cra_flags = CRYPTO_ALG_ASYNC,
  4193. .cra_blocksize = AES_BLOCK_SIZE,
  4194. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4195. .cra_alignmask = 0,
  4196. .cra_module = THIS_MODULE,
  4197. },
  4198. };
  4199. static struct aead_alg _qcrypto_aead_rfc4309_ccm_algo = {
  4200. .setkey = _qcrypto_aead_rfc4309_ccm_setkey,
  4201. .setauthsize = _qcrypto_aead_rfc4309_ccm_setauthsize,
  4202. .encrypt = _qcrypto_aead_rfc4309_enc_aes_ccm,
  4203. .decrypt = _qcrypto_aead_rfc4309_dec_aes_ccm,
  4204. .init = _qcrypto_cra_aead_rfc4309_ccm_init,
  4205. .exit = _qcrypto_cra_aead_exit,
  4206. .ivsize = 8,
  4207. .maxauthsize = 16,
  4208. .base = {
  4209. .cra_name = "rfc4309(ccm(aes))",
  4210. .cra_driver_name = "qcrypto-rfc4309-aes-ccm",
  4211. .cra_priority = 300,
  4212. .cra_flags = CRYPTO_ALG_ASYNC,
  4213. .cra_blocksize = 1,
  4214. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4215. .cra_alignmask = 0,
  4216. .cra_module = THIS_MODULE,
  4217. },
  4218. };
  4219. static int _qcrypto_probe(struct platform_device *pdev)
  4220. {
  4221. int rc = 0;
  4222. void *handle;
  4223. struct crypto_priv *cp = &qcrypto_dev;
  4224. int i;
  4225. struct msm_ce_hw_support *platform_support;
  4226. struct crypto_engine *pengine;
  4227. unsigned long flags;
  4228. struct qcrypto_req_control *pqcrypto_req_control = NULL;
  4229. pengine = kzalloc(sizeof(*pengine), GFP_KERNEL);
  4230. if (!pengine)
  4231. return -ENOMEM;
  4232. pengine->icc_path = of_icc_get(&pdev->dev, "data_path");
  4233. if (IS_ERR(pengine->icc_path)) {
  4234. dev_err(&pdev->dev, "failed to get icc path\n");
  4235. rc = PTR_ERR(pengine->icc_path);
  4236. goto exit_kzfree;
  4237. }
  4238. pengine->bw_state = BUS_NO_BANDWIDTH;
  4239. rc = icc_set_bw(pengine->icc_path, CRYPTO_AVG_BW, CRYPTO_PEAK_BW);
  4240. if (rc) {
  4241. dev_err(&pdev->dev, "failed to set high bandwidth\n");
  4242. goto exit_kzfree;
  4243. }
  4244. handle = qce_open(pdev, &rc);
  4245. if (handle == NULL) {
  4246. rc = -ENODEV;
  4247. goto exit_free_pdata;
  4248. }
  4249. rc = icc_set_bw(pengine->icc_path, 0, 0);
  4250. if (rc) {
  4251. dev_err(&pdev->dev, "failed to set low bandwidth\n");
  4252. goto exit_qce_close;
  4253. }
  4254. platform_set_drvdata(pdev, pengine);
  4255. pengine->qce = handle;
  4256. pengine->pcp = cp;
  4257. pengine->pdev = pdev;
  4258. pengine->signature = 0xdeadbeef;
  4259. timer_setup(&(pengine->bw_reaper_timer),
  4260. qcrypto_bw_reaper_timer_callback, 0);
  4261. INIT_WORK(&pengine->bw_reaper_ws, qcrypto_bw_reaper_work);
  4262. INIT_WORK(&pengine->bw_allocate_ws, qcrypto_bw_allocate_work);
  4263. pengine->high_bw_req = false;
  4264. pengine->active_seq = 0;
  4265. pengine->last_active_seq = 0;
  4266. pengine->check_flag = false;
  4267. pengine->max_req_used = 0;
  4268. pengine->issue_req = false;
  4269. crypto_init_queue(&pengine->req_queue, MSM_QCRYPTO_REQ_QUEUE_LENGTH);
  4270. mutex_lock(&cp->engine_lock);
  4271. cp->total_units++;
  4272. pengine->unit = cp->total_units;
  4273. spin_lock_irqsave(&cp->lock, flags);
  4274. pengine->first_engine = list_empty(&cp->engine_list);
  4275. if (pengine->first_engine)
  4276. cp->first_engine = pengine;
  4277. list_add_tail(&pengine->elist, &cp->engine_list);
  4278. cp->next_engine = pengine;
  4279. spin_unlock_irqrestore(&cp->lock, flags);
  4280. qce_hw_support(pengine->qce, &cp->ce_support);
  4281. pengine->ce_hw_instance = cp->ce_support.ce_hw_instance;
  4282. pengine->max_req = cp->ce_support.max_request;
  4283. pqcrypto_req_control = kcalloc(pengine->max_req,
  4284. sizeof(struct qcrypto_req_control),
  4285. GFP_KERNEL);
  4286. if (pqcrypto_req_control == NULL) {
  4287. rc = -ENOMEM;
  4288. goto exit_unlock_mutex;
  4289. }
  4290. qcrypto_init_req_control(pengine, pqcrypto_req_control);
  4291. if (cp->ce_support.bam) {
  4292. cp->platform_support.ce_shared = cp->ce_support.is_shared;
  4293. cp->platform_support.shared_ce_resource = 0;
  4294. cp->platform_support.hw_key_support = cp->ce_support.hw_key;
  4295. cp->platform_support.sha_hmac = 1;
  4296. pengine->ce_device = cp->ce_support.ce_device;
  4297. } else {
  4298. platform_support =
  4299. (struct msm_ce_hw_support *)pdev->dev.platform_data;
  4300. cp->platform_support.ce_shared = platform_support->ce_shared;
  4301. cp->platform_support.shared_ce_resource =
  4302. platform_support->shared_ce_resource;
  4303. cp->platform_support.hw_key_support =
  4304. platform_support->hw_key_support;
  4305. cp->platform_support.sha_hmac = platform_support->sha_hmac;
  4306. }
  4307. if (cp->total_units != 1)
  4308. goto exit_unlock_mutex;
  4309. /* register crypto cipher algorithms the device supports */
  4310. for (i = 0; i < ARRAY_SIZE(_qcrypto_sk_cipher_algos); i++) {
  4311. struct qcrypto_alg *q_alg;
  4312. q_alg = _qcrypto_cipher_alg_alloc(cp,
  4313. &_qcrypto_sk_cipher_algos[i]);
  4314. if (IS_ERR(q_alg)) {
  4315. rc = PTR_ERR(q_alg);
  4316. goto err;
  4317. }
  4318. if (cp->ce_support.use_sw_aes_cbc_ecb_ctr_algo) {
  4319. rc = _qcrypto_prefix_alg_cra_name(
  4320. q_alg->cipher_alg.base.cra_name,
  4321. strlen(q_alg->cipher_alg.base.cra_name));
  4322. if (rc) {
  4323. dev_err(&pdev->dev,
  4324. "The algorithm name %s is too long.\n",
  4325. q_alg->cipher_alg.base.cra_name);
  4326. kfree(q_alg);
  4327. goto err;
  4328. }
  4329. }
  4330. rc = crypto_register_skcipher(&q_alg->cipher_alg);
  4331. if (rc) {
  4332. dev_err(&pdev->dev, "%s alg registration failed\n",
  4333. q_alg->cipher_alg.base.cra_driver_name);
  4334. kfree_sensitive(q_alg);
  4335. } else {
  4336. list_add_tail(&q_alg->entry, &cp->alg_list);
  4337. dev_info(&pdev->dev, "%s\n",
  4338. q_alg->cipher_alg.base.cra_driver_name);
  4339. }
  4340. }
  4341. /* register crypto cipher algorithms the device supports */
  4342. if (cp->ce_support.aes_xts) {
  4343. struct qcrypto_alg *q_alg;
  4344. q_alg = _qcrypto_cipher_alg_alloc(cp,
  4345. &_qcrypto_sk_cipher_xts_algo);
  4346. if (IS_ERR(q_alg)) {
  4347. rc = PTR_ERR(q_alg);
  4348. goto err;
  4349. }
  4350. if (cp->ce_support.use_sw_aes_xts_algo) {
  4351. rc = _qcrypto_prefix_alg_cra_name(
  4352. q_alg->cipher_alg.base.cra_name,
  4353. strlen(q_alg->cipher_alg.base.cra_name));
  4354. if (rc) {
  4355. dev_err(&pdev->dev,
  4356. "The algorithm name %s is too long.\n",
  4357. q_alg->cipher_alg.base.cra_name);
  4358. kfree(q_alg);
  4359. goto err;
  4360. }
  4361. }
  4362. rc = crypto_register_skcipher(&q_alg->cipher_alg);
  4363. if (rc) {
  4364. dev_err(&pdev->dev, "%s alg registration failed\n",
  4365. q_alg->cipher_alg.base.cra_driver_name);
  4366. kfree_sensitive(q_alg);
  4367. } else {
  4368. list_add_tail(&q_alg->entry, &cp->alg_list);
  4369. dev_info(&pdev->dev, "%s\n",
  4370. q_alg->cipher_alg.base.cra_driver_name);
  4371. }
  4372. }
  4373. /*
  4374. * Register crypto hash (sha1 and sha256) algorithms the
  4375. * device supports
  4376. */
  4377. for (i = 0; i < ARRAY_SIZE(_qcrypto_ahash_algos); i++) {
  4378. struct qcrypto_alg *q_alg = NULL;
  4379. q_alg = _qcrypto_sha_alg_alloc(cp, &_qcrypto_ahash_algos[i]);
  4380. if (IS_ERR(q_alg)) {
  4381. rc = PTR_ERR(q_alg);
  4382. goto err;
  4383. }
  4384. if (cp->ce_support.use_sw_ahash_algo) {
  4385. rc = _qcrypto_prefix_alg_cra_name(
  4386. q_alg->sha_alg.halg.base.cra_name,
  4387. strlen(q_alg->sha_alg.halg.base.cra_name));
  4388. if (rc) {
  4389. dev_err(&pdev->dev,
  4390. "The algorithm name %s is too long.\n",
  4391. q_alg->sha_alg.halg.base.cra_name);
  4392. kfree(q_alg);
  4393. goto err;
  4394. }
  4395. }
  4396. rc = crypto_register_ahash(&q_alg->sha_alg);
  4397. if (rc) {
  4398. dev_err(&pdev->dev, "%s alg registration failed\n",
  4399. q_alg->sha_alg.halg.base.cra_driver_name);
  4400. kfree_sensitive(q_alg);
  4401. } else {
  4402. list_add_tail(&q_alg->entry, &cp->alg_list);
  4403. dev_info(&pdev->dev, "%s\n",
  4404. q_alg->sha_alg.halg.base.cra_driver_name);
  4405. }
  4406. }
  4407. /* register crypto aead (hmac-sha1) algorithms the device supports */
  4408. if (cp->ce_support.sha1_hmac_20 || cp->ce_support.sha1_hmac
  4409. || cp->ce_support.sha_hmac) {
  4410. for (i = 0; i < ARRAY_SIZE(_qcrypto_aead_sha1_hmac_algos);
  4411. i++) {
  4412. struct qcrypto_alg *q_alg;
  4413. q_alg = _qcrypto_aead_alg_alloc(cp,
  4414. &_qcrypto_aead_sha1_hmac_algos[i]);
  4415. if (IS_ERR(q_alg)) {
  4416. rc = PTR_ERR(q_alg);
  4417. goto err;
  4418. }
  4419. if (cp->ce_support.use_sw_aead_algo) {
  4420. rc = _qcrypto_prefix_alg_cra_name(
  4421. q_alg->aead_alg.base.cra_name,
  4422. strlen(q_alg->aead_alg.base.cra_name));
  4423. if (rc) {
  4424. dev_err(&pdev->dev,
  4425. "The algorithm name %s is too long.\n",
  4426. q_alg->aead_alg.base.cra_name);
  4427. kfree(q_alg);
  4428. goto err;
  4429. }
  4430. }
  4431. rc = crypto_register_aead(&q_alg->aead_alg);
  4432. if (rc) {
  4433. dev_err(&pdev->dev,
  4434. "%s alg registration failed\n",
  4435. q_alg->aead_alg.base.cra_driver_name);
  4436. kfree(q_alg);
  4437. } else {
  4438. list_add_tail(&q_alg->entry, &cp->alg_list);
  4439. dev_info(&pdev->dev, "%s\n",
  4440. q_alg->aead_alg.base.cra_driver_name);
  4441. }
  4442. }
  4443. }
  4444. /* register crypto aead (hmac-sha256) algorithms the device supports */
  4445. if (cp->ce_support.sha_hmac) {
  4446. for (i = 0; i < ARRAY_SIZE(_qcrypto_aead_sha256_hmac_algos);
  4447. i++) {
  4448. struct qcrypto_alg *q_alg;
  4449. q_alg = _qcrypto_aead_alg_alloc(cp,
  4450. &_qcrypto_aead_sha256_hmac_algos[i]);
  4451. if (IS_ERR(q_alg)) {
  4452. rc = PTR_ERR(q_alg);
  4453. goto err;
  4454. }
  4455. if (cp->ce_support.use_sw_aead_algo) {
  4456. rc = _qcrypto_prefix_alg_cra_name(
  4457. q_alg->aead_alg.base.cra_name,
  4458. strlen(q_alg->aead_alg.base.cra_name));
  4459. if (rc) {
  4460. dev_err(&pdev->dev,
  4461. "The algorithm name %s is too long.\n",
  4462. q_alg->aead_alg.base.cra_name);
  4463. kfree(q_alg);
  4464. goto err;
  4465. }
  4466. }
  4467. rc = crypto_register_aead(&q_alg->aead_alg);
  4468. if (rc) {
  4469. dev_err(&pdev->dev,
  4470. "%s alg registration failed\n",
  4471. q_alg->aead_alg.base.cra_driver_name);
  4472. kfree(q_alg);
  4473. } else {
  4474. list_add_tail(&q_alg->entry, &cp->alg_list);
  4475. dev_info(&pdev->dev, "%s\n",
  4476. q_alg->aead_alg.base.cra_driver_name);
  4477. }
  4478. }
  4479. }
  4480. if ((cp->ce_support.sha_hmac) || (cp->platform_support.sha_hmac)) {
  4481. /* register crypto hmac algorithms the device supports */
  4482. for (i = 0; i < ARRAY_SIZE(_qcrypto_sha_hmac_algos); i++) {
  4483. struct qcrypto_alg *q_alg = NULL;
  4484. q_alg = _qcrypto_sha_alg_alloc(cp,
  4485. &_qcrypto_sha_hmac_algos[i]);
  4486. if (IS_ERR(q_alg)) {
  4487. rc = PTR_ERR(q_alg);
  4488. goto err;
  4489. }
  4490. if (cp->ce_support.use_sw_hmac_algo) {
  4491. rc = _qcrypto_prefix_alg_cra_name(
  4492. q_alg->sha_alg.halg.base.cra_name,
  4493. strlen(
  4494. q_alg->sha_alg.halg.base.cra_name));
  4495. if (rc) {
  4496. dev_err(&pdev->dev,
  4497. "The algorithm name %s is too long.\n",
  4498. q_alg->sha_alg.halg.base.cra_name);
  4499. kfree(q_alg);
  4500. goto err;
  4501. }
  4502. }
  4503. rc = crypto_register_ahash(&q_alg->sha_alg);
  4504. if (rc) {
  4505. dev_err(&pdev->dev,
  4506. "%s alg registration failed\n",
  4507. q_alg->sha_alg.halg.base.cra_driver_name);
  4508. kfree_sensitive(q_alg);
  4509. } else {
  4510. list_add_tail(&q_alg->entry, &cp->alg_list);
  4511. dev_info(&pdev->dev, "%s\n",
  4512. q_alg->sha_alg.halg.base.cra_driver_name);
  4513. }
  4514. }
  4515. }
  4516. /*
  4517. * Register crypto cipher (aes-ccm) algorithms the
  4518. * device supports
  4519. */
  4520. if (cp->ce_support.aes_ccm) {
  4521. struct qcrypto_alg *q_alg;
  4522. q_alg = _qcrypto_aead_alg_alloc(cp, &_qcrypto_aead_ccm_algo);
  4523. if (IS_ERR(q_alg)) {
  4524. rc = PTR_ERR(q_alg);
  4525. goto err;
  4526. }
  4527. if (cp->ce_support.use_sw_aes_ccm_algo) {
  4528. rc = _qcrypto_prefix_alg_cra_name(
  4529. q_alg->aead_alg.base.cra_name,
  4530. strlen(q_alg->aead_alg.base.cra_name));
  4531. if (rc) {
  4532. dev_err(&pdev->dev,
  4533. "The algorithm name %s is too long.\n",
  4534. q_alg->aead_alg.base.cra_name);
  4535. kfree(q_alg);
  4536. goto err;
  4537. }
  4538. }
  4539. rc = crypto_register_aead(&q_alg->aead_alg);
  4540. if (rc) {
  4541. dev_err(&pdev->dev, "%s alg registration failed\n",
  4542. q_alg->aead_alg.base.cra_driver_name);
  4543. kfree_sensitive(q_alg);
  4544. } else {
  4545. list_add_tail(&q_alg->entry, &cp->alg_list);
  4546. dev_info(&pdev->dev, "%s\n",
  4547. q_alg->aead_alg.base.cra_driver_name);
  4548. }
  4549. q_alg = _qcrypto_aead_alg_alloc(cp,
  4550. &_qcrypto_aead_rfc4309_ccm_algo);
  4551. if (IS_ERR(q_alg)) {
  4552. rc = PTR_ERR(q_alg);
  4553. goto err;
  4554. }
  4555. if (cp->ce_support.use_sw_aes_ccm_algo) {
  4556. rc = _qcrypto_prefix_alg_cra_name(
  4557. q_alg->aead_alg.base.cra_name,
  4558. strlen(q_alg->aead_alg.base.cra_name));
  4559. if (rc) {
  4560. dev_err(&pdev->dev,
  4561. "The algorithm name %s is too long.\n",
  4562. q_alg->aead_alg.base.cra_name);
  4563. kfree(q_alg);
  4564. goto err;
  4565. }
  4566. }
  4567. rc = crypto_register_aead(&q_alg->aead_alg);
  4568. if (rc) {
  4569. dev_err(&pdev->dev, "%s alg registration failed\n",
  4570. q_alg->aead_alg.base.cra_driver_name);
  4571. kfree(q_alg);
  4572. } else {
  4573. list_add_tail(&q_alg->entry, &cp->alg_list);
  4574. dev_info(&pdev->dev, "%s\n",
  4575. q_alg->aead_alg.base.cra_driver_name);
  4576. }
  4577. }
  4578. mutex_unlock(&cp->engine_lock);
  4579. return 0;
  4580. err:
  4581. _qcrypto_remove_engine(pengine);
  4582. kfree_sensitive(pqcrypto_req_control);
  4583. exit_unlock_mutex:
  4584. mutex_unlock(&cp->engine_lock);
  4585. exit_qce_close:
  4586. if (pengine->qce)
  4587. qce_close(pengine->qce);
  4588. exit_free_pdata:
  4589. icc_set_bw(pengine->icc_path, 0, 0);
  4590. platform_set_drvdata(pdev, NULL);
  4591. exit_kzfree:
  4592. memset(pengine, 0, ksize((void *)pengine));
  4593. kfree(pengine);
  4594. return rc;
  4595. }
  4596. static int _qcrypto_engine_in_use(struct crypto_engine *pengine)
  4597. {
  4598. struct crypto_priv *cp = pengine->pcp;
  4599. if ((atomic_read(&pengine->req_count) > 0) || pengine->req_queue.qlen
  4600. || cp->req_queue.qlen)
  4601. return 1;
  4602. return 0;
  4603. }
  4604. static void _qcrypto_do_suspending(struct crypto_engine *pengine)
  4605. {
  4606. del_timer_sync(&pengine->bw_reaper_timer);
  4607. qcrypto_ce_set_bus(pengine, false);
  4608. }
  4609. static int _qcrypto_suspend(struct platform_device *pdev, pm_message_t state)
  4610. {
  4611. int ret = 0;
  4612. struct crypto_engine *pengine;
  4613. struct crypto_priv *cp;
  4614. unsigned long flags;
  4615. pengine = platform_get_drvdata(pdev);
  4616. if (!pengine)
  4617. return -EINVAL;
  4618. /*
  4619. * Check if this platform supports clock management in suspend/resume
  4620. * If not, just simply return 0.
  4621. */
  4622. cp = pengine->pcp;
  4623. if (!cp->ce_support.clk_mgmt_sus_res)
  4624. return 0;
  4625. spin_lock_irqsave(&cp->lock, flags);
  4626. switch (pengine->bw_state) {
  4627. case BUS_NO_BANDWIDTH:
  4628. if (!pengine->high_bw_req)
  4629. pengine->bw_state = BUS_SUSPENDED;
  4630. else
  4631. ret = -EBUSY;
  4632. break;
  4633. case BUS_HAS_BANDWIDTH:
  4634. if (_qcrypto_engine_in_use(pengine)) {
  4635. ret = -EBUSY;
  4636. } else {
  4637. pengine->bw_state = BUS_SUSPENDING;
  4638. spin_unlock_irqrestore(&cp->lock, flags);
  4639. _qcrypto_do_suspending(pengine);
  4640. spin_lock_irqsave(&cp->lock, flags);
  4641. pengine->bw_state = BUS_SUSPENDED;
  4642. }
  4643. break;
  4644. case BUS_BANDWIDTH_RELEASING:
  4645. case BUS_BANDWIDTH_ALLOCATING:
  4646. case BUS_SUSPENDED:
  4647. case BUS_SUSPENDING:
  4648. default:
  4649. ret = -EBUSY;
  4650. break;
  4651. }
  4652. spin_unlock_irqrestore(&cp->lock, flags);
  4653. if (ret)
  4654. return ret;
  4655. if (qce_pm_table.suspend) {
  4656. qcrypto_ce_set_bus(pengine, true);
  4657. qce_pm_table.suspend(pengine->qce);
  4658. qcrypto_ce_set_bus(pengine, false);
  4659. }
  4660. return 0;
  4661. }
  4662. static int _qcrypto_resume(struct platform_device *pdev)
  4663. {
  4664. struct crypto_engine *pengine;
  4665. struct crypto_priv *cp;
  4666. unsigned long flags;
  4667. int ret = 0;
  4668. pengine = platform_get_drvdata(pdev);
  4669. if (!pengine)
  4670. return -EINVAL;
  4671. cp = pengine->pcp;
  4672. if (!cp->ce_support.clk_mgmt_sus_res)
  4673. return 0;
  4674. spin_lock_irqsave(&cp->lock, flags);
  4675. if (pengine->bw_state == BUS_SUSPENDED) {
  4676. spin_unlock_irqrestore(&cp->lock, flags);
  4677. if (qce_pm_table.resume) {
  4678. qcrypto_ce_set_bus(pengine, true);
  4679. qce_pm_table.resume(pengine->qce);
  4680. qcrypto_ce_set_bus(pengine, false);
  4681. }
  4682. spin_lock_irqsave(&cp->lock, flags);
  4683. pengine->bw_state = BUS_NO_BANDWIDTH;
  4684. pengine->active_seq++;
  4685. pengine->check_flag = false;
  4686. if (cp->req_queue.qlen || pengine->req_queue.qlen) {
  4687. if (!pengine->high_bw_req) {
  4688. qcrypto_ce_bw_allocate_req(pengine);
  4689. pengine->high_bw_req = true;
  4690. }
  4691. }
  4692. } else
  4693. ret = -EBUSY;
  4694. spin_unlock_irqrestore(&cp->lock, flags);
  4695. return ret;
  4696. }
  4697. static const struct of_device_id qcrypto_match[] = {
  4698. {.compatible = "qcom,qcrypto",},
  4699. {}
  4700. };
  4701. static struct platform_driver __qcrypto = {
  4702. .probe = _qcrypto_probe,
  4703. .remove = _qcrypto_remove,
  4704. .suspend = _qcrypto_suspend,
  4705. .resume = _qcrypto_resume,
  4706. .driver = {
  4707. .name = "qcrypto",
  4708. .of_match_table = qcrypto_match,
  4709. },
  4710. };
  4711. static int _debug_qcrypto;
  4712. static ssize_t _debug_stats_read(struct file *file, char __user *buf,
  4713. size_t count, loff_t *ppos)
  4714. {
  4715. int rc = -EINVAL;
  4716. int qcrypto = *((int *) file->private_data);
  4717. int len;
  4718. len = _disp_stats(qcrypto);
  4719. if (len <= count)
  4720. rc = simple_read_from_buffer((void __user *) buf, len,
  4721. ppos, (void *) _debug_read_buf, len);
  4722. return rc;
  4723. }
  4724. static ssize_t _debug_stats_write(struct file *file, const char __user *buf,
  4725. size_t count, loff_t *ppos)
  4726. {
  4727. unsigned long flags;
  4728. struct crypto_priv *cp = &qcrypto_dev;
  4729. struct crypto_engine *pe;
  4730. int i;
  4731. memset((char *)&_qcrypto_stat, 0, sizeof(struct crypto_stat));
  4732. spin_lock_irqsave(&cp->lock, flags);
  4733. list_for_each_entry(pe, &cp->engine_list, elist) {
  4734. pe->total_req = 0;
  4735. pe->err_req = 0;
  4736. qce_clear_driver_stats(pe->qce);
  4737. pe->max_req_used = 0;
  4738. }
  4739. cp->max_qlen = 0;
  4740. cp->resp_start = 0;
  4741. cp->resp_stop = 0;
  4742. cp->no_avail = 0;
  4743. cp->max_resp_qlen = 0;
  4744. cp->queue_work_eng3 = 0;
  4745. cp->queue_work_not_eng3 = 0;
  4746. cp->queue_work_not_eng3_nz = 0;
  4747. cp->max_reorder_cnt = 0;
  4748. for (i = 0; i < MAX_SMP_CPU + 1; i++)
  4749. cp->cpu_req[i] = 0;
  4750. spin_unlock_irqrestore(&cp->lock, flags);
  4751. return count;
  4752. }
  4753. static const struct file_operations _debug_stats_ops = {
  4754. .open = simple_open,
  4755. .read = _debug_stats_read,
  4756. .write = _debug_stats_write,
  4757. };
  4758. static int _qcrypto_debug_init(void)
  4759. {
  4760. int rc;
  4761. char name[DEBUG_MAX_FNAME];
  4762. struct dentry *dent;
  4763. _debug_dent = debugfs_create_dir("qcrypto", NULL);
  4764. if (IS_ERR(_debug_dent)) {
  4765. pr_debug("qcrypto debugfs_create_dir fail, error %ld\n",
  4766. PTR_ERR(_debug_dent));
  4767. return PTR_ERR(_debug_dent);
  4768. }
  4769. snprintf(name, DEBUG_MAX_FNAME-1, "stats-%d", 1);
  4770. _debug_qcrypto = 0;
  4771. dent = debugfs_create_file(name, 0644, _debug_dent,
  4772. &_debug_qcrypto, &_debug_stats_ops);
  4773. if (dent == NULL) {
  4774. pr_debug("qcrypto debugfs_create_file fail, error %ld\n",
  4775. PTR_ERR(dent));
  4776. rc = PTR_ERR(dent);
  4777. goto err;
  4778. }
  4779. return 0;
  4780. err:
  4781. debugfs_remove_recursive(_debug_dent);
  4782. return rc;
  4783. }
  4784. static int __init _qcrypto_init(void)
  4785. {
  4786. struct crypto_priv *pcp = &qcrypto_dev;
  4787. _qcrypto_debug_init();
  4788. INIT_LIST_HEAD(&pcp->alg_list);
  4789. INIT_LIST_HEAD(&pcp->engine_list);
  4790. init_llist_head(&pcp->ordered_resp_list);
  4791. spin_lock_init(&pcp->lock);
  4792. mutex_init(&pcp->engine_lock);
  4793. pcp->resp_wq = alloc_workqueue("qcrypto_seq_response_wq",
  4794. WQ_MEM_RECLAIM | WQ_HIGHPRI | WQ_CPU_INTENSIVE, 1);
  4795. if (!pcp->resp_wq) {
  4796. pr_err("Error allocating workqueue\n");
  4797. return -ENOMEM;
  4798. }
  4799. INIT_WORK(&pcp->resp_work, seq_response);
  4800. pcp->total_units = 0;
  4801. pcp->next_engine = NULL;
  4802. pcp->scheduled_eng = NULL;
  4803. pcp->ce_req_proc_sts = IN_PROGRESS;
  4804. crypto_init_queue(&pcp->req_queue, MSM_QCRYPTO_REQ_QUEUE_LENGTH);
  4805. return platform_driver_register(&__qcrypto);
  4806. }
  4807. static void __exit _qcrypto_exit(void)
  4808. {
  4809. pr_debug("%s Unregister QCRYPTO\n", __func__);
  4810. debugfs_remove_recursive(_debug_dent);
  4811. platform_driver_unregister(&__qcrypto);
  4812. }
  4813. module_init(_qcrypto_init);
  4814. module_exit(_qcrypto_exit);
  4815. MODULE_LICENSE("GPL v2");
  4816. MODULE_DESCRIPTION("QTI Crypto driver");