dp_tx.h 53 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #ifndef __DP_TX_H
  20. #define __DP_TX_H
  21. #include <qdf_types.h>
  22. #include <qdf_nbuf.h>
  23. #include "dp_types.h"
  24. #ifdef FEATURE_PERPKT_INFO
  25. #if defined(QCA_SUPPORT_LATENCY_CAPTURE) || \
  26. defined(QCA_TX_CAPTURE_SUPPORT) || \
  27. defined(QCA_MCOPY_SUPPORT)
  28. #include "if_meta_hdr.h"
  29. #endif
  30. #endif
  31. #include "dp_internal.h"
  32. #include "hal_tx.h"
  33. #include <qdf_tracepoint.h>
  34. #ifdef CONFIG_SAWF
  35. #include "dp_sawf.h"
  36. #endif
  37. #include <qdf_pkt_add_timestamp.h>
  38. #include "dp_ipa.h"
  39. #define DP_INVALID_VDEV_ID 0xFF
  40. #define DP_TX_MAX_NUM_FRAGS 6
  41. /* invalid peer id for reinject*/
  42. #define DP_INVALID_PEER 0XFFFE
  43. void dp_tx_nawds_handler(struct dp_soc *soc, struct dp_vdev *vdev,
  44. struct dp_tx_msdu_info_s *msdu_info,
  45. qdf_nbuf_t nbuf, uint16_t sa_peer_id);
  46. /*
  47. * DP_TX_DESC_FLAG_FRAG flags should always be defined to 0x1
  48. * please do not change this flag's definition
  49. */
  50. #define DP_TX_DESC_FLAG_FRAG 0x1
  51. #define DP_TX_DESC_FLAG_TO_FW 0x2
  52. #define DP_TX_DESC_FLAG_SIMPLE 0x4
  53. #define DP_TX_DESC_FLAG_RAW 0x8
  54. #define DP_TX_DESC_FLAG_MESH 0x10
  55. #define DP_TX_DESC_FLAG_QUEUED_TX 0x20
  56. #define DP_TX_DESC_FLAG_COMPLETED_TX 0x40
  57. #define DP_TX_DESC_FLAG_ME 0x80
  58. #define DP_TX_DESC_FLAG_TDLS_FRAME 0x100
  59. #define DP_TX_DESC_FLAG_ALLOCATED 0x200
  60. #define DP_TX_DESC_FLAG_MESH_MODE 0x400
  61. #define DP_TX_DESC_FLAG_UNMAP_DONE 0x800
  62. #define DP_TX_DESC_FLAG_TX_COMP_ERR 0x1000
  63. #define DP_TX_DESC_FLAG_FLUSH 0x2000
  64. #define DP_TX_DESC_FLAG_TRAFFIC_END_IND 0x4000
  65. #define DP_TX_DESC_FLAG_RMNET 0x8000
  66. /*
  67. * Since the Tx descriptor flag is of only 16-bit and no more bit is free for
  68. * any new flag, therefore for time being overloading PPEDS flag with that of
  69. * FLUSH flag and FLAG_FAST with TDLS which is not enabled for WIN.
  70. */
  71. #define DP_TX_DESC_FLAG_PPEDS 0x2000
  72. #define DP_TX_DESC_FLAG_FAST 0x100
  73. #define DP_TX_EXT_DESC_FLAG_METADATA_VALID 0x1
  74. #define DP_TX_FREE_SINGLE_BUF(soc, buf) \
  75. do { \
  76. qdf_nbuf_unmap(soc->osdev, buf, QDF_DMA_TO_DEVICE); \
  77. qdf_nbuf_free(buf); \
  78. } while (0)
  79. #define OCB_HEADER_VERSION 1
  80. #ifdef TX_PER_PDEV_DESC_POOL
  81. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  82. #define DP_TX_GET_DESC_POOL_ID(vdev) (vdev->vdev_id)
  83. #else /* QCA_LL_TX_FLOW_CONTROL_V2 */
  84. #define DP_TX_GET_DESC_POOL_ID(vdev) (vdev->pdev->pdev_id)
  85. #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
  86. #define DP_TX_GET_RING_ID(vdev) (vdev->pdev->pdev_id)
  87. #else
  88. #ifdef TX_PER_VDEV_DESC_POOL
  89. #define DP_TX_GET_DESC_POOL_ID(vdev) (vdev->vdev_id)
  90. #define DP_TX_GET_RING_ID(vdev) (vdev->pdev->pdev_id)
  91. #endif /* TX_PER_VDEV_DESC_POOL */
  92. #endif /* TX_PER_PDEV_DESC_POOL */
  93. #define DP_TX_QUEUE_MASK 0x3
  94. #define MAX_CDP_SEC_TYPE 12
  95. /* number of dwords for htt_tx_msdu_desc_ext2_t */
  96. #define DP_TX_MSDU_INFO_META_DATA_DWORDS 7
  97. #define dp_tx_alert(params...) QDF_TRACE_FATAL(QDF_MODULE_ID_DP_TX, params)
  98. #define dp_tx_err(params...) QDF_TRACE_ERROR(QDF_MODULE_ID_DP_TX, params)
  99. #define dp_tx_err_rl(params...) QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP_TX, params)
  100. #define dp_tx_warn(params...) QDF_TRACE_WARN(QDF_MODULE_ID_DP_TX, params)
  101. #define dp_tx_info(params...) \
  102. __QDF_TRACE_FL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_TX, ## params)
  103. #define dp_tx_debug(params...) QDF_TRACE_DEBUG(QDF_MODULE_ID_DP_TX, params)
  104. #define dp_tx_comp_alert(params...) QDF_TRACE_FATAL(QDF_MODULE_ID_DP_TX_COMP, params)
  105. #define dp_tx_comp_err(params...) QDF_TRACE_ERROR(QDF_MODULE_ID_DP_TX_COMP, params)
  106. #define dp_tx_comp_warn(params...) QDF_TRACE_WARN(QDF_MODULE_ID_DP_TX_COMP, params)
  107. #define dp_tx_comp_info(params...) \
  108. __QDF_TRACE_FL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_TX_COMP, ## params)
  109. #define dp_tx_comp_info_rl(params...) \
  110. __QDF_TRACE_RL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_TX_COMP, ## params)
  111. #define dp_tx_comp_debug(params...) QDF_TRACE_DEBUG(QDF_MODULE_ID_DP_TX_COMP, params)
  112. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  113. /**
  114. * struct dp_tx_frag_info_s
  115. * @vaddr: hlos virtual address for buffer
  116. * @paddr_lo: physical address lower 32bits
  117. * @paddr_hi: physical address higher bits
  118. * @len: length of the buffer
  119. */
  120. struct dp_tx_frag_info_s {
  121. uint8_t *vaddr;
  122. uint32_t paddr_lo;
  123. uint16_t paddr_hi;
  124. uint16_t len;
  125. };
  126. /**
  127. * struct dp_tx_seg_info_s - Segmentation Descriptor
  128. * @nbuf: NBUF pointer if segment corresponds to separate nbuf
  129. * @frag_cnt: Fragment count in this segment
  130. * @total_len: Total length of segment
  131. * @frags: per-Fragment information
  132. * @next: pointer to next MSDU segment
  133. */
  134. struct dp_tx_seg_info_s {
  135. qdf_nbuf_t nbuf;
  136. uint16_t frag_cnt;
  137. uint16_t total_len;
  138. struct dp_tx_frag_info_s frags[DP_TX_MAX_NUM_FRAGS];
  139. struct dp_tx_seg_info_s *next;
  140. };
  141. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  142. /**
  143. * struct dp_tx_sg_info_s - Scatter Gather Descriptor
  144. * @num_segs: Number of segments (TSO/ME) in the frame
  145. * @total_len: Total length of the frame
  146. * @curr_seg: Points to current segment descriptor to be processed. Chain of
  147. * descriptors for SG frames/multicast-unicast converted packets.
  148. *
  149. * Used for SG (802.3 or Raw) frames and Multicast-Unicast converted frames to
  150. * carry fragmentation information
  151. * Raw Frames will be handed over to driver as an SKB chain with MPDU boundaries
  152. * indicated through flags in SKB CB (first_msdu and last_msdu). This will be
  153. * converted into set of skb sg (nr_frags) structures.
  154. */
  155. struct dp_tx_sg_info_s {
  156. uint32_t num_segs;
  157. uint32_t total_len;
  158. struct dp_tx_seg_info_s *curr_seg;
  159. };
  160. /**
  161. * struct dp_tx_queue - Tx queue
  162. * @desc_pool_id: Descriptor Pool to be used for the tx queue
  163. * @ring_id: TCL descriptor ring ID corresponding to the tx queue
  164. *
  165. * Tx queue contains information of the software (Descriptor pool)
  166. * and hardware resources (TCL ring id) to be used for a particular
  167. * transmit queue (obtained from skb_queue_mapping in case of linux)
  168. */
  169. struct dp_tx_queue {
  170. uint8_t desc_pool_id;
  171. uint8_t ring_id;
  172. };
  173. /**
  174. * struct dp_tx_msdu_info_s - MSDU Descriptor
  175. * @frm_type: Frame type - Regular/TSO/SG/Multicast enhancement
  176. * @tx_queue: Tx queue on which this MSDU should be transmitted
  177. * @num_seg: Number of segments (TSO)
  178. * @tid: TID (override) that is sent from HLOS
  179. * @exception_fw: Duplicate frame to be sent to firmware
  180. * @is_tx_sniffer: Indicates if the packet has to be sniffed
  181. * @u: union of frame information structs
  182. * @u.tso_info: TSO information for TSO frame types
  183. * (chain of the TSO segments, number of segments)
  184. * @u.sg_info: Scatter Gather information for non-TSO SG frames
  185. * @meta_data: Mesh meta header information
  186. * @ppdu_cookie: 16-bit ppdu_cookie that has to be replayed back in completions
  187. * @gsn: global sequence for reinjected mcast packets
  188. * @vdev_id : vdev_id for reinjected mcast packets
  189. * @skip_hp_update : Skip HP update for TSO segments and update in last segment
  190. * @buf_len:
  191. * @payload_addr:
  192. *
  193. * This structure holds the complete MSDU information needed to program the
  194. * Hardware TCL and MSDU extension descriptors for different frame types
  195. *
  196. */
  197. struct dp_tx_msdu_info_s {
  198. enum dp_tx_frm_type frm_type;
  199. struct dp_tx_queue tx_queue;
  200. uint32_t num_seg;
  201. uint8_t tid;
  202. uint8_t exception_fw;
  203. uint8_t is_tx_sniffer;
  204. union {
  205. struct qdf_tso_info_t tso_info;
  206. struct dp_tx_sg_info_s sg_info;
  207. } u;
  208. uint32_t meta_data[DP_TX_MSDU_INFO_META_DATA_DWORDS];
  209. uint16_t ppdu_cookie;
  210. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP)
  211. #ifdef WLAN_MCAST_MLO
  212. uint16_t gsn;
  213. uint8_t vdev_id;
  214. #endif
  215. #endif
  216. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  217. uint8_t skip_hp_update;
  218. #endif
  219. #ifdef QCA_DP_TX_RMNET_OPTIMIZATION
  220. uint16_t buf_len;
  221. uint8_t *payload_addr;
  222. #endif
  223. };
  224. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  225. /**
  226. * dp_tx_deinit_pair_by_index() - Deinit TX rings based on index
  227. * @soc: core txrx context
  228. * @index: index of ring to deinit
  229. *
  230. * Deinit 1 TCL and 1 WBM2SW release ring on as needed basis using
  231. * index of the respective TCL/WBM2SW release in soc structure.
  232. * For example, if the index is 2 then &soc->tcl_data_ring[2]
  233. * and &soc->tx_comp_ring[2] will be deinitialized.
  234. *
  235. * Return: none
  236. */
  237. void dp_tx_deinit_pair_by_index(struct dp_soc *soc, int index);
  238. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  239. /**
  240. * dp_tx_comp_process_desc_list() - Tx complete software descriptor handler
  241. * @soc: core txrx main context
  242. * @comp_head: software descriptor head pointer
  243. * @ring_id: ring number
  244. *
  245. * This function will process batch of descriptors reaped by dp_tx_comp_handler
  246. * and release the software descriptors after processing is complete
  247. *
  248. * Return: none
  249. */
  250. void
  251. dp_tx_comp_process_desc_list(struct dp_soc *soc,
  252. struct dp_tx_desc_s *comp_head, uint8_t ring_id);
  253. /**
  254. * dp_tx_comp_free_buf() - Free nbuf associated with the Tx Descriptor
  255. * @soc: Soc handle
  256. * @desc: software Tx descriptor to be processed
  257. * @delayed_free: defer freeing of nbuf
  258. *
  259. * Return: nbuf to be freed later
  260. */
  261. qdf_nbuf_t dp_tx_comp_free_buf(struct dp_soc *soc, struct dp_tx_desc_s *desc,
  262. bool delayed_free);
  263. /**
  264. * dp_tx_desc_release() - Release Tx Descriptor
  265. * @tx_desc: Tx Descriptor
  266. * @desc_pool_id: Descriptor Pool ID
  267. *
  268. * Deallocate all resources attached to Tx descriptor and free the Tx
  269. * descriptor.
  270. *
  271. * Return:
  272. */
  273. void dp_tx_desc_release(struct dp_tx_desc_s *tx_desc, uint8_t desc_pool_id);
  274. /**
  275. * dp_tx_compute_delay() - Compute and fill in all timestamps
  276. * to pass in correct fields
  277. * @vdev: pdev handle
  278. * @tx_desc: tx descriptor
  279. * @tid: tid value
  280. * @ring_id: TCL or WBM ring number for transmit path
  281. *
  282. * Return: none
  283. */
  284. void dp_tx_compute_delay(struct dp_vdev *vdev, struct dp_tx_desc_s *tx_desc,
  285. uint8_t tid, uint8_t ring_id);
  286. /**
  287. * dp_tx_comp_process_tx_status() - Parse and Dump Tx completion status info
  288. * @soc: DP soc handle
  289. * @tx_desc: software descriptor head pointer
  290. * @ts: Tx completion status
  291. * @txrx_peer: txrx peer handle
  292. * @ring_id: ring number
  293. *
  294. * Return: none
  295. */
  296. void dp_tx_comp_process_tx_status(struct dp_soc *soc,
  297. struct dp_tx_desc_s *tx_desc,
  298. struct hal_tx_completion_status *ts,
  299. struct dp_txrx_peer *txrx_peer,
  300. uint8_t ring_id);
  301. /**
  302. * dp_tx_comp_process_desc() - Process tx descriptor and free associated nbuf
  303. * @soc: DP Soc handle
  304. * @desc: software Tx descriptor
  305. * @ts: Tx completion status from HAL/HTT descriptor
  306. * @txrx_peer: DP peer context
  307. *
  308. * Return: none
  309. */
  310. void dp_tx_comp_process_desc(struct dp_soc *soc,
  311. struct dp_tx_desc_s *desc,
  312. struct hal_tx_completion_status *ts,
  313. struct dp_txrx_peer *txrx_peer);
  314. /**
  315. * dp_tx_reinject_handler() - Tx Reinject Handler
  316. * @soc: datapath soc handle
  317. * @vdev: datapath vdev handle
  318. * @tx_desc: software descriptor head pointer
  319. * @status: Tx completion status from HTT descriptor
  320. * @reinject_reason: reinject reason from HTT descriptor
  321. *
  322. * This function reinjects frames back to Target.
  323. * Todo - Host queue needs to be added
  324. *
  325. * Return: none
  326. */
  327. void dp_tx_reinject_handler(struct dp_soc *soc,
  328. struct dp_vdev *vdev,
  329. struct dp_tx_desc_s *tx_desc,
  330. uint8_t *status,
  331. uint8_t reinject_reason);
  332. /**
  333. * dp_tx_inspect_handler() - Tx Inspect Handler
  334. * @soc: datapath soc handle
  335. * @vdev: datapath vdev handle
  336. * @tx_desc: software descriptor head pointer
  337. * @status: Tx completion status from HTT descriptor
  338. *
  339. * Handles Tx frames sent back to Host for inspection
  340. * (ProxyARP)
  341. *
  342. * Return: none
  343. */
  344. void dp_tx_inspect_handler(struct dp_soc *soc,
  345. struct dp_vdev *vdev,
  346. struct dp_tx_desc_s *tx_desc,
  347. uint8_t *status);
  348. /**
  349. * dp_tx_update_peer_basic_stats() - Update peer basic stats
  350. * @txrx_peer: Datapath txrx_peer handle
  351. * @length: Length of the packet
  352. * @tx_status: Tx status from TQM/FW
  353. * @update: enhanced flag value present in dp_pdev
  354. *
  355. * Return: none
  356. */
  357. void dp_tx_update_peer_basic_stats(struct dp_txrx_peer *txrx_peer,
  358. uint32_t length, uint8_t tx_status,
  359. bool update);
  360. #ifdef DP_UMAC_HW_RESET_SUPPORT
  361. /**
  362. * dp_tx_drop() - Drop the frame on a given VAP
  363. * @soc: DP soc handle
  364. * @vdev_id: id of DP vdev handle
  365. * @nbuf: skb
  366. *
  367. * Drop all the incoming packets
  368. *
  369. * Return: nbuf
  370. */
  371. qdf_nbuf_t dp_tx_drop(struct cdp_soc_t *soc, uint8_t vdev_id, qdf_nbuf_t nbuf);
  372. /**
  373. * dp_tx_exc_drop() - Drop the frame on a given VAP
  374. * @soc_hdl: DP soc handle
  375. * @vdev_id: id of DP vdev handle
  376. * @nbuf: skb
  377. * @tx_exc_metadata: Handle that holds exception path meta data
  378. *
  379. * Drop all the incoming packets
  380. *
  381. * Return: nbuf
  382. */
  383. qdf_nbuf_t dp_tx_exc_drop(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  384. qdf_nbuf_t nbuf,
  385. struct cdp_tx_exception_metadata *tx_exc_metadata);
  386. #endif
  387. #ifdef WLAN_SUPPORT_PPEDS
  388. qdf_nbuf_t
  389. dp_ppeds_tx_desc_free(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc);
  390. #else
  391. static inline qdf_nbuf_t
  392. dp_ppeds_tx_desc_free(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc)
  393. {
  394. return NULL;
  395. }
  396. #endif
  397. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  398. /**
  399. * dp_tso_soc_attach() - TSO Attach handler
  400. * @txrx_soc: Opaque Dp handle
  401. *
  402. * Reserve TSO descriptor buffers
  403. *
  404. * Return: QDF_STATUS_E_FAILURE on failure or
  405. * QDF_STATUS_SUCCESS on success
  406. */
  407. QDF_STATUS dp_tso_soc_attach(struct cdp_soc_t *txrx_soc);
  408. /**
  409. * dp_tso_soc_detach() - TSO Detach handler
  410. * @txrx_soc: Opaque Dp handle
  411. *
  412. * Deallocate TSO descriptor buffers
  413. *
  414. * Return: QDF_STATUS_E_FAILURE on failure or
  415. * QDF_STATUS_SUCCESS on success
  416. */
  417. QDF_STATUS dp_tso_soc_detach(struct cdp_soc_t *txrx_soc);
  418. /**
  419. * dp_tx_send() - Transmit a frame on a given VAP
  420. * @soc_hdl: DP soc handle
  421. * @vdev_id: id of DP vdev handle
  422. * @nbuf: skb
  423. *
  424. * Entry point for Core Tx layer (DP_TX) invoked from
  425. * hard_start_xmit in OSIF/HDD or from dp_rx_process for intravap forwarding
  426. * cases
  427. *
  428. * Return: NULL on success,
  429. * nbuf when it fails to send
  430. */
  431. qdf_nbuf_t dp_tx_send(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  432. qdf_nbuf_t nbuf);
  433. /**
  434. * dp_tx_send_vdev_id_check() - Transmit a frame on a given VAP in special
  435. * case to avoid check in per-packet path.
  436. * @soc_hdl: DP soc handle
  437. * @vdev_id: id of DP vdev handle
  438. * @nbuf: skb
  439. *
  440. * Entry point for Core Tx layer (DP_TX) invoked from
  441. * hard_start_xmit in OSIF/HDD to transmit packet through dp_tx_send
  442. * with special condition to avoid per pkt check in dp_tx_send
  443. *
  444. * Return: NULL on success,
  445. * nbuf when it fails to send
  446. */
  447. qdf_nbuf_t dp_tx_send_vdev_id_check(struct cdp_soc_t *soc_hdl,
  448. uint8_t vdev_id, qdf_nbuf_t nbuf);
  449. /**
  450. * dp_tx_send_exception() - Transmit a frame on a given VAP in exception path
  451. * @soc_hdl: DP soc handle
  452. * @vdev_id: id of DP vdev handle
  453. * @nbuf: skb
  454. * @tx_exc_metadata: Handle that holds exception path meta data
  455. *
  456. * Entry point for Core Tx layer (DP_TX) invoked from
  457. * hard_start_xmit in OSIF/HDD to transmit frames through fw
  458. *
  459. * Return: NULL on success,
  460. * nbuf when it fails to send
  461. */
  462. qdf_nbuf_t
  463. dp_tx_send_exception(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  464. qdf_nbuf_t nbuf,
  465. struct cdp_tx_exception_metadata *tx_exc_metadata);
  466. /**
  467. * dp_tx_send_exception_vdev_id_check() - Transmit a frame on a given VAP
  468. * in exception path in special case to avoid regular exception path chk.
  469. * @soc_hdl: DP soc handle
  470. * @vdev_id: id of DP vdev handle
  471. * @nbuf: skb
  472. * @tx_exc_metadata: Handle that holds exception path meta data
  473. *
  474. * Entry point for Core Tx layer (DP_TX) invoked from
  475. * hard_start_xmit in OSIF/HDD to transmit frames through fw
  476. *
  477. * Return: NULL on success,
  478. * nbuf when it fails to send
  479. */
  480. qdf_nbuf_t
  481. dp_tx_send_exception_vdev_id_check(struct cdp_soc_t *soc_hdl,
  482. uint8_t vdev_id, qdf_nbuf_t nbuf,
  483. struct cdp_tx_exception_metadata *tx_exc_metadata);
  484. /**
  485. * dp_tx_send_mesh() - Transmit mesh frame on a given VAP
  486. * @soc_hdl: DP soc handle
  487. * @vdev_id: DP vdev handle
  488. * @nbuf: skb
  489. *
  490. * Entry point for Core Tx layer (DP_TX) invoked from
  491. * hard_start_xmit in OSIF/HDD
  492. *
  493. * Return: NULL on success,
  494. * nbuf when it fails to send
  495. */
  496. qdf_nbuf_t dp_tx_send_mesh(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  497. qdf_nbuf_t nbuf);
  498. /**
  499. * dp_tx_send_msdu_single() - Setup descriptor and enqueue single MSDU to TCL
  500. * @vdev: DP vdev handle
  501. * @nbuf: skb
  502. * @msdu_info: MSDU information
  503. * @peer_id: peer_id of the peer in case of NAWDS frames
  504. * @tx_exc_metadata: Handle that holds exception path metadata
  505. *
  506. * Return: NULL on success,
  507. * nbuf when it fails to send
  508. */
  509. qdf_nbuf_t
  510. dp_tx_send_msdu_single(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  511. struct dp_tx_msdu_info_s *msdu_info, uint16_t peer_id,
  512. struct cdp_tx_exception_metadata *tx_exc_metadata);
  513. /**
  514. * dp_tx_mcast_enhance() - Multicast enhancement on TX
  515. * @vdev: DP vdev handle
  516. * @nbuf: network buffer to be transmitted
  517. *
  518. * Return: true on success
  519. * false on failure
  520. */
  521. bool dp_tx_mcast_enhance(struct dp_vdev *vdev, qdf_nbuf_t nbuf);
  522. /**
  523. * dp_tx_send_msdu_multiple() - Enqueue multiple MSDUs
  524. * @vdev: DP vdev handle
  525. * @nbuf: skb
  526. * @msdu_info: MSDU info to be setup in MSDU extension descriptor
  527. *
  528. * Prepare descriptors for multiple MSDUs (TSO segments) and enqueue to TCL
  529. *
  530. * Return: NULL on success,
  531. * nbuf when it fails to send
  532. */
  533. #if QDF_LOCK_STATS
  534. noinline qdf_nbuf_t
  535. dp_tx_send_msdu_multiple(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  536. struct dp_tx_msdu_info_s *msdu_info);
  537. #else
  538. qdf_nbuf_t dp_tx_send_msdu_multiple(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  539. struct dp_tx_msdu_info_s *msdu_info);
  540. #endif
  541. #ifdef FEATURE_WLAN_TDLS
  542. /**
  543. * dp_tx_non_std() - Allow the control-path SW to send data frames
  544. * @soc_hdl: Datapath soc handle
  545. * @vdev_id: id of vdev
  546. * @tx_spec: what non-standard handling to apply to the tx data frames
  547. * @msdu_list: NULL-terminated list of tx MSDUs
  548. *
  549. * Return: NULL on success,
  550. * nbuf when it fails to send
  551. */
  552. qdf_nbuf_t dp_tx_non_std(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  553. enum ol_tx_spec tx_spec, qdf_nbuf_t msdu_list);
  554. #endif
  555. /**
  556. * dp_tx_frame_is_drop() - checks if the packet is loopback
  557. * @vdev: DP vdev handle
  558. * @srcmac: source MAC address
  559. * @dstmac: destination MAC address
  560. *
  561. * Return: 1 if frame needs to be dropped else 0
  562. */
  563. int dp_tx_frame_is_drop(struct dp_vdev *vdev, uint8_t *srcmac, uint8_t *dstmac);
  564. #ifndef WLAN_SOFTUMAC_SUPPORT
  565. /**
  566. * dp_tx_comp_handler() - Tx completion handler
  567. * @int_ctx: pointer to DP interrupt context
  568. * @soc: core txrx main context
  569. * @hal_srng: Opaque HAL SRNG pointer
  570. * @ring_id: completion ring id
  571. * @quota: No. of packets/descriptors that can be serviced in one loop
  572. *
  573. * This function will collect hardware release ring element contents and
  574. * handle descriptor contents. Based on contents, free packet or handle error
  575. * conditions
  576. *
  577. * Return: Number of TX completions processed
  578. */
  579. uint32_t dp_tx_comp_handler(struct dp_intr *int_ctx, struct dp_soc *soc,
  580. hal_ring_handle_t hal_srng, uint8_t ring_id,
  581. uint32_t quota);
  582. #endif
  583. void
  584. dp_tx_comp_process_desc_list(struct dp_soc *soc,
  585. struct dp_tx_desc_s *comp_head, uint8_t ring_id);
  586. QDF_STATUS
  587. dp_tx_prepare_send_me(struct dp_vdev *vdev, qdf_nbuf_t nbuf);
  588. QDF_STATUS
  589. dp_tx_prepare_send_igmp_me(struct dp_vdev *vdev, qdf_nbuf_t nbuf);
  590. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  591. #if defined(QCA_HOST_MODE_WIFI_DISABLED) || !defined(ATH_SUPPORT_IQUE)
  592. static inline void dp_tx_me_exit(struct dp_pdev *pdev)
  593. {
  594. return;
  595. }
  596. #endif
  597. /**
  598. * dp_tx_pdev_init() - dp tx pdev init
  599. * @pdev: physical device instance
  600. *
  601. * Return: QDF_STATUS_SUCCESS: success
  602. * QDF_STATUS_E_RESOURCES: Error return
  603. */
  604. static inline QDF_STATUS dp_tx_pdev_init(struct dp_pdev *pdev)
  605. {
  606. struct dp_soc *soc = pdev->soc;
  607. /* Initialize Flow control counters */
  608. qdf_atomic_init(&pdev->num_tx_outstanding);
  609. pdev->tx_descs_max = 0;
  610. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  611. /* Initialize descriptors in TCL Ring */
  612. hal_tx_init_data_ring(soc->hal_soc,
  613. soc->tcl_data_ring[pdev->pdev_id].hal_srng);
  614. }
  615. return QDF_STATUS_SUCCESS;
  616. }
  617. /**
  618. * dp_tx_prefetch_hw_sw_nbuf_desc() - function to prefetch HW and SW desc
  619. * @soc: Handle to HAL Soc structure
  620. * @hal_soc: HAL SOC handle
  621. * @num_avail_for_reap: descriptors available for reap
  622. * @hal_ring_hdl: ring pointer
  623. * @last_prefetched_hw_desc: pointer to the last prefetched HW descriptor
  624. * @last_prefetched_sw_desc: pointer to last prefetch SW desc
  625. *
  626. * Return: None
  627. */
  628. #ifdef QCA_DP_TX_HW_SW_NBUF_DESC_PREFETCH
  629. static inline
  630. void dp_tx_prefetch_hw_sw_nbuf_desc(struct dp_soc *soc,
  631. hal_soc_handle_t hal_soc,
  632. uint32_t num_avail_for_reap,
  633. hal_ring_handle_t hal_ring_hdl,
  634. void **last_prefetched_hw_desc,
  635. struct dp_tx_desc_s
  636. **last_prefetched_sw_desc)
  637. {
  638. if (*last_prefetched_sw_desc) {
  639. qdf_prefetch((uint8_t *)(*last_prefetched_sw_desc)->nbuf);
  640. qdf_prefetch((uint8_t *)(*last_prefetched_sw_desc)->nbuf + 64);
  641. }
  642. if (num_avail_for_reap && *last_prefetched_hw_desc) {
  643. soc->arch_ops.tx_comp_get_params_from_hal_desc(soc,
  644. *last_prefetched_hw_desc,
  645. last_prefetched_sw_desc);
  646. if ((uintptr_t)*last_prefetched_hw_desc & 0x3f)
  647. *last_prefetched_hw_desc =
  648. hal_srng_dst_prefetch_next_cached_desc(
  649. hal_soc,
  650. hal_ring_hdl,
  651. (uint8_t *)*last_prefetched_hw_desc);
  652. else
  653. *last_prefetched_hw_desc =
  654. hal_srng_dst_get_next_32_byte_desc(hal_soc,
  655. hal_ring_hdl,
  656. (uint8_t *)*last_prefetched_hw_desc);
  657. }
  658. }
  659. #else
  660. static inline
  661. void dp_tx_prefetch_hw_sw_nbuf_desc(struct dp_soc *soc,
  662. hal_soc_handle_t hal_soc,
  663. uint32_t num_avail_for_reap,
  664. hal_ring_handle_t hal_ring_hdl,
  665. void **last_prefetched_hw_desc,
  666. struct dp_tx_desc_s
  667. **last_prefetched_sw_desc)
  668. {
  669. }
  670. #endif
  671. #ifndef FEATURE_WDS
  672. static inline void dp_tx_mec_handler(struct dp_vdev *vdev, uint8_t *status)
  673. {
  674. return;
  675. }
  676. #endif
  677. #ifndef QCA_MULTIPASS_SUPPORT
  678. static inline
  679. bool dp_tx_multipass_process(struct dp_soc *soc, struct dp_vdev *vdev,
  680. qdf_nbuf_t nbuf,
  681. struct dp_tx_msdu_info_s *msdu_info)
  682. {
  683. return true;
  684. }
  685. static inline
  686. void dp_tx_vdev_multipass_deinit(struct dp_vdev *vdev)
  687. {
  688. }
  689. #else
  690. /**
  691. * dp_tx_multipass_process() - Process vlan frames in tx path
  692. * @soc: dp soc handle
  693. * @vdev: DP vdev handle
  694. * @nbuf: skb
  695. * @msdu_info: msdu descriptor
  696. *
  697. * Return: status whether frame needs to be dropped or transmitted
  698. */
  699. bool dp_tx_multipass_process(struct dp_soc *soc, struct dp_vdev *vdev,
  700. qdf_nbuf_t nbuf,
  701. struct dp_tx_msdu_info_s *msdu_info);
  702. /**
  703. * dp_tx_vdev_multipass_deinit() - set vlan map for vdev
  704. * @vdev: pointer to vdev
  705. *
  706. * return: void
  707. */
  708. void dp_tx_vdev_multipass_deinit(struct dp_vdev *vdev);
  709. /**
  710. * dp_tx_add_groupkey_metadata() - Add group key in metadata
  711. * @vdev: DP vdev handle
  712. * @msdu_info: MSDU info to be setup in MSDU descriptor
  713. * @group_key: Group key index programmed in metadata
  714. *
  715. * Return: void
  716. */
  717. void dp_tx_add_groupkey_metadata(struct dp_vdev *vdev,
  718. struct dp_tx_msdu_info_s *msdu_info,
  719. uint16_t group_key);
  720. #endif
  721. /**
  722. * dp_tx_hw_to_qdf()- convert hw status to qdf status
  723. * @status: hw status
  724. *
  725. * Return: qdf tx rx status
  726. */
  727. static inline enum qdf_dp_tx_rx_status dp_tx_hw_to_qdf(uint16_t status)
  728. {
  729. switch (status) {
  730. case HAL_TX_TQM_RR_FRAME_ACKED:
  731. return QDF_TX_RX_STATUS_OK;
  732. case HAL_TX_TQM_RR_REM_CMD_TX:
  733. return QDF_TX_RX_STATUS_NO_ACK;
  734. case HAL_TX_TQM_RR_REM_CMD_REM:
  735. case HAL_TX_TQM_RR_REM_CMD_NOTX:
  736. case HAL_TX_TQM_RR_REM_CMD_AGED:
  737. return QDF_TX_RX_STATUS_FW_DISCARD;
  738. default:
  739. return QDF_TX_RX_STATUS_DEFAULT;
  740. }
  741. }
  742. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  743. /**
  744. * dp_tx_get_queue() - Returns Tx queue IDs to be used for this Tx frame
  745. * @vdev: DP Virtual device handle
  746. * @nbuf: Buffer pointer
  747. * @queue: queue ids container for nbuf
  748. *
  749. * TX packet queue has 2 instances, software descriptors id and dma ring id
  750. * Based on tx feature and hardware configuration queue id combination could be
  751. * different.
  752. * For example -
  753. * With XPS enabled,all TX descriptor pools and dma ring are assigned per cpu id
  754. * With no XPS,lock based resource protection, Descriptor pool ids are different
  755. * for each vdev, dma ring id will be same as single pdev id
  756. *
  757. * Return: None
  758. */
  759. #ifdef QCA_OL_TX_MULTIQ_SUPPORT
  760. #if defined(IPA_OFFLOAD) && defined(QCA_IPA_LL_TX_FLOW_CONTROL)
  761. static inline void dp_tx_get_queue(struct dp_vdev *vdev,
  762. qdf_nbuf_t nbuf, struct dp_tx_queue *queue)
  763. {
  764. queue->ring_id = qdf_get_cpu();
  765. if (vdev->pdev->soc->wlan_cfg_ctx->ipa_enabled)
  766. if (queue->ring_id == IPA_TCL_DATA_RING_IDX)
  767. queue->ring_id = 0;
  768. queue->desc_pool_id = queue->ring_id;
  769. }
  770. #else
  771. static inline void dp_tx_get_queue(struct dp_vdev *vdev,
  772. qdf_nbuf_t nbuf, struct dp_tx_queue *queue)
  773. {
  774. queue->ring_id = qdf_get_cpu();
  775. queue->desc_pool_id = queue->ring_id;
  776. }
  777. #endif
  778. /**
  779. * dp_tx_get_hal_ring_hdl() - Get the hal_tx_ring_hdl for data transmission
  780. * @soc: DP soc structure pointer
  781. * @ring_id: Transmit Queue/ring_id to be used when XPS is enabled
  782. *
  783. * Return: HAL ring handle
  784. */
  785. static inline hal_ring_handle_t dp_tx_get_hal_ring_hdl(struct dp_soc *soc,
  786. uint8_t ring_id)
  787. {
  788. if (ring_id == soc->num_tcl_data_rings)
  789. return soc->tcl_cmd_credit_ring.hal_srng;
  790. return soc->tcl_data_ring[ring_id].hal_srng;
  791. }
  792. #else /* QCA_OL_TX_MULTIQ_SUPPORT */
  793. #ifdef TX_MULTI_TCL
  794. #ifdef IPA_OFFLOAD
  795. static inline void dp_tx_get_queue(struct dp_vdev *vdev,
  796. qdf_nbuf_t nbuf, struct dp_tx_queue *queue)
  797. {
  798. /* get flow id */
  799. queue->desc_pool_id = DP_TX_GET_DESC_POOL_ID(vdev);
  800. if (vdev->pdev->soc->wlan_cfg_ctx->ipa_enabled)
  801. queue->ring_id = DP_TX_GET_RING_ID(vdev);
  802. else
  803. queue->ring_id = (qdf_nbuf_get_queue_mapping(nbuf) %
  804. vdev->pdev->soc->num_tcl_data_rings);
  805. }
  806. #else
  807. static inline void dp_tx_get_queue(struct dp_vdev *vdev,
  808. qdf_nbuf_t nbuf, struct dp_tx_queue *queue)
  809. {
  810. /* get flow id */
  811. queue->desc_pool_id = DP_TX_GET_DESC_POOL_ID(vdev);
  812. queue->ring_id = (qdf_nbuf_get_queue_mapping(nbuf) %
  813. vdev->pdev->soc->num_tcl_data_rings);
  814. }
  815. #endif
  816. #else
  817. static inline void dp_tx_get_queue(struct dp_vdev *vdev,
  818. qdf_nbuf_t nbuf, struct dp_tx_queue *queue)
  819. {
  820. /* get flow id */
  821. queue->desc_pool_id = DP_TX_GET_DESC_POOL_ID(vdev);
  822. queue->ring_id = DP_TX_GET_RING_ID(vdev);
  823. }
  824. #endif
  825. static inline hal_ring_handle_t dp_tx_get_hal_ring_hdl(struct dp_soc *soc,
  826. uint8_t ring_id)
  827. {
  828. return soc->tcl_data_ring[ring_id].hal_srng;
  829. }
  830. #endif
  831. #ifdef QCA_OL_TX_LOCK_LESS_ACCESS
  832. /**
  833. * dp_tx_hal_ring_access_start() - hal_tx_ring access for data transmission
  834. * @soc: DP soc structure pointer
  835. * @hal_ring_hdl: HAL ring handle
  836. *
  837. * Return: None
  838. */
  839. static inline int dp_tx_hal_ring_access_start(struct dp_soc *soc,
  840. hal_ring_handle_t hal_ring_hdl)
  841. {
  842. return hal_srng_access_start_unlocked(soc->hal_soc, hal_ring_hdl);
  843. }
  844. /**
  845. * dp_tx_hal_ring_access_end() - hal_tx_ring access for data transmission
  846. * @soc: DP soc structure pointer
  847. * @hal_ring_hdl: HAL ring handle
  848. *
  849. * Return: None
  850. */
  851. static inline void dp_tx_hal_ring_access_end(struct dp_soc *soc,
  852. hal_ring_handle_t hal_ring_hdl)
  853. {
  854. hal_srng_access_end_unlocked(soc->hal_soc, hal_ring_hdl);
  855. }
  856. /**
  857. * dp_tx_hal_ring_access_end_reap() - hal_tx_ring access for data transmission
  858. * @soc: DP soc structure pointer
  859. * @hal_ring_hdl: HAL ring handle
  860. *
  861. * Return: None
  862. */
  863. static inline void dp_tx_hal_ring_access_end_reap(struct dp_soc *soc,
  864. hal_ring_handle_t
  865. hal_ring_hdl)
  866. {
  867. }
  868. #else
  869. static inline int dp_tx_hal_ring_access_start(struct dp_soc *soc,
  870. hal_ring_handle_t hal_ring_hdl)
  871. {
  872. return hal_srng_access_start(soc->hal_soc, hal_ring_hdl);
  873. }
  874. static inline void dp_tx_hal_ring_access_end(struct dp_soc *soc,
  875. hal_ring_handle_t hal_ring_hdl)
  876. {
  877. hal_srng_access_end(soc->hal_soc, hal_ring_hdl);
  878. }
  879. static inline void dp_tx_hal_ring_access_end_reap(struct dp_soc *soc,
  880. hal_ring_handle_t
  881. hal_ring_hdl)
  882. {
  883. hal_srng_access_end_reap(soc->hal_soc, hal_ring_hdl);
  884. }
  885. #endif
  886. #ifdef ATH_TX_PRI_OVERRIDE
  887. #define DP_TX_TID_OVERRIDE(_msdu_info, _nbuf) \
  888. ((_msdu_info)->tid = qdf_nbuf_get_priority(_nbuf))
  889. #else
  890. #define DP_TX_TID_OVERRIDE(_msdu_info, _nbuf)
  891. #endif
  892. /* TODO TX_FEATURE_NOT_YET */
  893. static inline void dp_tx_comp_process_exception(struct dp_tx_desc_s *tx_desc)
  894. {
  895. return;
  896. }
  897. /* TODO TX_FEATURE_NOT_YET */
  898. /**
  899. * dp_tx_desc_flush() - release resources associated
  900. * to TX Desc
  901. *
  902. * @pdev: Handle to DP pdev structure
  903. * @vdev: virtual device instance
  904. * NULL: no specific Vdev is required and check all allcated TX desc
  905. * on this pdev.
  906. * Non-NULL: only check the allocated TX Desc associated to this Vdev.
  907. *
  908. * @force_free:
  909. * true: flush the TX desc.
  910. * false: only reset the Vdev in each allocated TX desc
  911. * that associated to current Vdev.
  912. *
  913. * This function will go through the TX desc pool to flush
  914. * the outstanding TX data or reset Vdev to NULL in associated TX
  915. * Desc.
  916. */
  917. void dp_tx_desc_flush(struct dp_pdev *pdev, struct dp_vdev *vdev,
  918. bool force_free);
  919. /**
  920. * dp_tx_vdev_attach() - attach vdev to dp tx
  921. * @vdev: virtual device instance
  922. *
  923. * Return: QDF_STATUS_SUCCESS: success
  924. * QDF_STATUS_E_RESOURCES: Error return
  925. */
  926. QDF_STATUS dp_tx_vdev_attach(struct dp_vdev *vdev);
  927. /**
  928. * dp_tx_vdev_detach() - detach vdev from dp tx
  929. * @vdev: virtual device instance
  930. *
  931. * Return: QDF_STATUS_SUCCESS: success
  932. * QDF_STATUS_E_RESOURCES: Error return
  933. */
  934. QDF_STATUS dp_tx_vdev_detach(struct dp_vdev *vdev);
  935. /**
  936. * dp_tx_vdev_update_search_flags() - Update vdev flags as per opmode
  937. * @vdev: virtual device instance
  938. *
  939. * Return: void
  940. *
  941. */
  942. void dp_tx_vdev_update_search_flags(struct dp_vdev *vdev);
  943. /**
  944. * dp_soc_tx_desc_sw_pools_alloc() - Allocate tx descriptor pool memory
  945. * @soc: core txrx main context
  946. *
  947. * This function allocates memory for following descriptor pools
  948. * 1. regular sw tx descriptor pools (static pools)
  949. * 2. TX extension descriptor pools (ME, RAW, TSO etc...)
  950. * 3. TSO descriptor pools
  951. *
  952. * Return: QDF_STATUS_SUCCESS: success
  953. * QDF_STATUS_E_RESOURCES: Error return
  954. */
  955. QDF_STATUS dp_soc_tx_desc_sw_pools_alloc(struct dp_soc *soc);
  956. /**
  957. * dp_soc_tx_desc_sw_pools_init() - Initialise TX descriptor pools
  958. * @soc: core txrx main context
  959. *
  960. * This function initializes the following TX descriptor pools
  961. * 1. regular sw tx descriptor pools (static pools)
  962. * 2. TX extension descriptor pools (ME, RAW, TSO etc...)
  963. * 3. TSO descriptor pools
  964. *
  965. * Return: QDF_STATUS_SUCCESS: success
  966. * QDF_STATUS_E_RESOURCES: Error return
  967. */
  968. QDF_STATUS dp_soc_tx_desc_sw_pools_init(struct dp_soc *soc);
  969. /**
  970. * dp_soc_tx_desc_sw_pools_free() - free all TX descriptors
  971. * @soc: core txrx main context
  972. *
  973. * This function frees all tx related descriptors as below
  974. * 1. Regular TX descriptors (static pools)
  975. * 2. extension TX descriptors (used for ME, RAW, TSO etc...)
  976. * 3. TSO descriptors
  977. *
  978. */
  979. void dp_soc_tx_desc_sw_pools_free(struct dp_soc *soc);
  980. /**
  981. * dp_soc_tx_desc_sw_pools_deinit() - de-initialize all TX descriptors
  982. * @soc: core txrx main context
  983. *
  984. * This function de-initializes all tx related descriptors as below
  985. * 1. Regular TX descriptors (static pools)
  986. * 2. extension TX descriptors (used for ME, RAW, TSO etc...)
  987. * 3. TSO descriptors
  988. *
  989. */
  990. void dp_soc_tx_desc_sw_pools_deinit(struct dp_soc *soc);
  991. #ifndef WLAN_SOFTUMAC_SUPPORT
  992. /**
  993. * dp_handle_wbm_internal_error() - handles wbm_internal_error case
  994. * @soc: core DP main context
  995. * @hal_desc: hal descriptor
  996. * @buf_type: indicates if the buffer is of type link disc or msdu
  997. *
  998. * wbm_internal_error is seen in following scenarios :
  999. *
  1000. * 1. Null pointers detected in WBM_RELEASE_RING descriptors
  1001. * 2. Null pointers detected during delinking process
  1002. *
  1003. * Some null pointer cases:
  1004. *
  1005. * a. MSDU buffer pointer is NULL
  1006. * b. Next_MSDU_Link_Desc pointer is NULL, with no last msdu flag
  1007. * c. MSDU buffer pointer is NULL or Next_Link_Desc pointer is NULL
  1008. *
  1009. * Return: None
  1010. */
  1011. void
  1012. dp_handle_wbm_internal_error(struct dp_soc *soc, void *hal_desc,
  1013. uint32_t buf_type);
  1014. #endif
  1015. #else /* QCA_HOST_MODE_WIFI_DISABLED */
  1016. static inline
  1017. QDF_STATUS dp_soc_tx_desc_sw_pools_alloc(struct dp_soc *soc)
  1018. {
  1019. return QDF_STATUS_SUCCESS;
  1020. }
  1021. static inline
  1022. QDF_STATUS dp_soc_tx_desc_sw_pools_init(struct dp_soc *soc)
  1023. {
  1024. return QDF_STATUS_SUCCESS;
  1025. }
  1026. static inline void dp_soc_tx_desc_sw_pools_free(struct dp_soc *soc)
  1027. {
  1028. }
  1029. static inline void dp_soc_tx_desc_sw_pools_deinit(struct dp_soc *soc)
  1030. {
  1031. }
  1032. static inline
  1033. void dp_tx_desc_flush(struct dp_pdev *pdev, struct dp_vdev *vdev,
  1034. bool force_free)
  1035. {
  1036. }
  1037. static inline QDF_STATUS dp_tx_vdev_attach(struct dp_vdev *vdev)
  1038. {
  1039. return QDF_STATUS_SUCCESS;
  1040. }
  1041. static inline QDF_STATUS dp_tx_vdev_detach(struct dp_vdev *vdev)
  1042. {
  1043. return QDF_STATUS_SUCCESS;
  1044. }
  1045. static inline void dp_tx_vdev_update_search_flags(struct dp_vdev *vdev)
  1046. {
  1047. }
  1048. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1049. #if defined(QCA_SUPPORT_LATENCY_CAPTURE) || \
  1050. defined(QCA_TX_CAPTURE_SUPPORT) || \
  1051. defined(QCA_MCOPY_SUPPORT)
  1052. #ifdef FEATURE_PERPKT_INFO
  1053. /**
  1054. * dp_get_completion_indication_for_stack() - send completion to stack
  1055. * @soc : dp_soc handle
  1056. * @pdev: dp_pdev handle
  1057. * @txrx_peer: dp peer handle
  1058. * @ts: transmit completion status structure
  1059. * @netbuf: Buffer pointer for free
  1060. * @time_latency:
  1061. *
  1062. * This function is used for indication whether buffer needs to be
  1063. * sent to stack for freeing or not
  1064. *
  1065. * Return: QDF_STATUS
  1066. */
  1067. QDF_STATUS
  1068. dp_get_completion_indication_for_stack(struct dp_soc *soc,
  1069. struct dp_pdev *pdev,
  1070. struct dp_txrx_peer *txrx_peer,
  1071. struct hal_tx_completion_status *ts,
  1072. qdf_nbuf_t netbuf,
  1073. uint64_t time_latency);
  1074. /**
  1075. * dp_send_completion_to_stack() - send completion to stack
  1076. * @soc : dp_soc handle
  1077. * @pdev: dp_pdev handle
  1078. * @peer_id: peer_id of the peer for which completion came
  1079. * @ppdu_id: ppdu_id
  1080. * @netbuf: Buffer pointer for free
  1081. *
  1082. * This function is used to send completion to stack
  1083. * to free buffer
  1084. *
  1085. * Return: QDF_STATUS
  1086. */
  1087. void dp_send_completion_to_stack(struct dp_soc *soc, struct dp_pdev *pdev,
  1088. uint16_t peer_id, uint32_t ppdu_id,
  1089. qdf_nbuf_t netbuf);
  1090. #endif
  1091. #else
  1092. static inline
  1093. QDF_STATUS dp_get_completion_indication_for_stack(struct dp_soc *soc,
  1094. struct dp_pdev *pdev,
  1095. struct dp_txrx_peer *peer,
  1096. struct hal_tx_completion_status *ts,
  1097. qdf_nbuf_t netbuf,
  1098. uint64_t time_latency)
  1099. {
  1100. return QDF_STATUS_E_NOSUPPORT;
  1101. }
  1102. static inline
  1103. void dp_send_completion_to_stack(struct dp_soc *soc, struct dp_pdev *pdev,
  1104. uint16_t peer_id, uint32_t ppdu_id,
  1105. qdf_nbuf_t netbuf)
  1106. {
  1107. }
  1108. #endif
  1109. #ifdef WLAN_FEATURE_PKT_CAPTURE_V2
  1110. /**
  1111. * dp_send_completion_to_pkt_capture() - send tx completion to packet capture
  1112. * @soc: dp_soc handle
  1113. * @desc: Tx Descriptor
  1114. * @ts: HAL Tx completion descriptor contents
  1115. *
  1116. * This function is used to send tx completion to packet capture
  1117. */
  1118. void dp_send_completion_to_pkt_capture(struct dp_soc *soc,
  1119. struct dp_tx_desc_s *desc,
  1120. struct hal_tx_completion_status *ts);
  1121. #else
  1122. static inline void
  1123. dp_send_completion_to_pkt_capture(struct dp_soc *soc,
  1124. struct dp_tx_desc_s *desc,
  1125. struct hal_tx_completion_status *ts)
  1126. {
  1127. }
  1128. #endif
  1129. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1130. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  1131. /**
  1132. * dp_tx_update_stats() - Update soc level tx stats
  1133. * @soc: DP soc handle
  1134. * @tx_desc: TX descriptor reference
  1135. * @ring_id: TCL ring id
  1136. *
  1137. * Return: none
  1138. */
  1139. void dp_tx_update_stats(struct dp_soc *soc,
  1140. struct dp_tx_desc_s *tx_desc,
  1141. uint8_t ring_id);
  1142. /**
  1143. * dp_tx_attempt_coalescing() - Check and attempt TCL register write coalescing
  1144. * @soc: Datapath soc handle
  1145. * @vdev: DP vdev handle
  1146. * @tx_desc: tx packet descriptor
  1147. * @tid: TID for pkt transmission
  1148. * @msdu_info: MSDU info of tx packet
  1149. * @ring_id: TCL ring id
  1150. *
  1151. * Return: 1, if coalescing is to be done
  1152. * 0, if coalescing is not to be done
  1153. */
  1154. int
  1155. dp_tx_attempt_coalescing(struct dp_soc *soc, struct dp_vdev *vdev,
  1156. struct dp_tx_desc_s *tx_desc,
  1157. uint8_t tid,
  1158. struct dp_tx_msdu_info_s *msdu_info,
  1159. uint8_t ring_id);
  1160. /**
  1161. * dp_tx_ring_access_end() - HAL ring access end for data transmission
  1162. * @soc: Datapath soc handle
  1163. * @hal_ring_hdl: HAL ring handle
  1164. * @coalesce: Coalesce the current write or not
  1165. *
  1166. * Return: none
  1167. */
  1168. void
  1169. dp_tx_ring_access_end(struct dp_soc *soc, hal_ring_handle_t hal_ring_hdl,
  1170. int coalesce);
  1171. #else
  1172. /**
  1173. * dp_tx_update_stats() - Update soc level tx stats
  1174. * @soc: DP soc handle
  1175. * @tx_desc: TX descriptor reference
  1176. * @ring_id: TCL ring id
  1177. *
  1178. * Return: none
  1179. */
  1180. static inline void dp_tx_update_stats(struct dp_soc *soc,
  1181. struct dp_tx_desc_s *tx_desc,
  1182. uint8_t ring_id){ }
  1183. static inline void
  1184. dp_tx_ring_access_end(struct dp_soc *soc, hal_ring_handle_t hal_ring_hdl,
  1185. int coalesce)
  1186. {
  1187. dp_tx_hal_ring_access_end(soc, hal_ring_hdl);
  1188. }
  1189. static inline int
  1190. dp_tx_attempt_coalescing(struct dp_soc *soc, struct dp_vdev *vdev,
  1191. struct dp_tx_desc_s *tx_desc,
  1192. uint8_t tid,
  1193. struct dp_tx_msdu_info_s *msdu_info,
  1194. uint8_t ring_id)
  1195. {
  1196. return 0;
  1197. }
  1198. #endif /* WLAN_DP_FEATURE_SW_LATENCY_MGR */
  1199. #ifdef FEATURE_RUNTIME_PM
  1200. /**
  1201. * dp_set_rtpm_tput_policy_requirement() - Update RTPM throughput policy
  1202. * @soc_hdl: DP soc handle
  1203. * @is_high_tput: flag to indicate whether throughput is high
  1204. *
  1205. * Return: none
  1206. */
  1207. static inline
  1208. void dp_set_rtpm_tput_policy_requirement(struct cdp_soc_t *soc_hdl,
  1209. bool is_high_tput)
  1210. {
  1211. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  1212. qdf_atomic_set(&soc->rtpm_high_tput_flag, is_high_tput);
  1213. }
  1214. /**
  1215. * dp_tx_ring_access_end_wrapper() - Wrapper for ring access end
  1216. * @soc: Datapath soc handle
  1217. * @hal_ring_hdl: HAL ring handle
  1218. * @coalesce: Coalesce the current write or not
  1219. *
  1220. * Feature-specific wrapper for HAL ring access end for data
  1221. * transmission
  1222. *
  1223. * Return: none
  1224. */
  1225. void
  1226. dp_tx_ring_access_end_wrapper(struct dp_soc *soc,
  1227. hal_ring_handle_t hal_ring_hdl,
  1228. int coalesce);
  1229. #else
  1230. #ifdef DP_POWER_SAVE
  1231. void
  1232. dp_tx_ring_access_end_wrapper(struct dp_soc *soc,
  1233. hal_ring_handle_t hal_ring_hdl,
  1234. int coalesce);
  1235. #else
  1236. static inline void
  1237. dp_tx_ring_access_end_wrapper(struct dp_soc *soc,
  1238. hal_ring_handle_t hal_ring_hdl,
  1239. int coalesce)
  1240. {
  1241. dp_tx_ring_access_end(soc, hal_ring_hdl, coalesce);
  1242. }
  1243. #endif
  1244. static inline void
  1245. dp_set_rtpm_tput_policy_requirement(struct cdp_soc_t *soc_hdl,
  1246. bool is_high_tput)
  1247. { }
  1248. #endif
  1249. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1250. #ifdef DP_TX_HW_DESC_HISTORY
  1251. static inline void
  1252. dp_tx_hw_desc_update_evt(uint8_t *hal_tx_desc_cached,
  1253. hal_ring_handle_t hal_ring_hdl,
  1254. struct dp_soc *soc, uint8_t ring_id)
  1255. {
  1256. struct dp_tx_hw_desc_history *tx_hw_desc_history =
  1257. &soc->tx_hw_desc_history;
  1258. struct dp_tx_hw_desc_evt *evt;
  1259. uint32_t idx = 0;
  1260. uint16_t slot = 0;
  1261. if (!tx_hw_desc_history->allocated)
  1262. return;
  1263. dp_get_frag_hist_next_atomic_idx(&tx_hw_desc_history->index, &idx,
  1264. &slot,
  1265. DP_TX_HW_DESC_HIST_SLOT_SHIFT,
  1266. DP_TX_HW_DESC_HIST_PER_SLOT_MAX,
  1267. DP_TX_HW_DESC_HIST_MAX);
  1268. evt = &tx_hw_desc_history->entry[slot][idx];
  1269. qdf_mem_copy(evt->tcl_desc, hal_tx_desc_cached, HAL_TX_DESC_LEN_BYTES);
  1270. evt->posted = qdf_get_log_timestamp();
  1271. evt->tcl_ring_id = ring_id;
  1272. hal_get_sw_hptp(soc->hal_soc, hal_ring_hdl, &evt->tp, &evt->hp);
  1273. }
  1274. #else
  1275. static inline void
  1276. dp_tx_hw_desc_update_evt(uint8_t *hal_tx_desc_cached,
  1277. hal_ring_handle_t hal_ring_hdl,
  1278. struct dp_soc *soc, uint8_t ring_id)
  1279. {
  1280. }
  1281. #endif
  1282. #if defined(WLAN_FEATURE_TSF_UPLINK_DELAY) || defined(WLAN_CONFIG_TX_DELAY)
  1283. /**
  1284. * dp_tx_compute_hw_delay_us() - Compute hardware Tx completion delay
  1285. * @ts: Tx completion status
  1286. * @delta_tsf: Difference between TSF clock and qtimer
  1287. * @delay_us: Delay in microseconds
  1288. *
  1289. * Return: QDF_STATUS_SUCCESS : Success
  1290. * QDF_STATUS_E_INVAL : Tx completion status is invalid or
  1291. * delay_us is NULL
  1292. * QDF_STATUS_E_FAILURE : Error in delay calculation
  1293. */
  1294. QDF_STATUS
  1295. dp_tx_compute_hw_delay_us(struct hal_tx_completion_status *ts,
  1296. uint32_t delta_tsf,
  1297. uint32_t *delay_us);
  1298. /**
  1299. * dp_set_delta_tsf() - Set delta_tsf to dp_soc structure
  1300. * @soc_hdl: cdp soc pointer
  1301. * @vdev_id: vdev id
  1302. * @delta_tsf: difference between TSF clock and qtimer
  1303. *
  1304. * Return: None
  1305. */
  1306. void dp_set_delta_tsf(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  1307. uint32_t delta_tsf);
  1308. #endif
  1309. #ifdef WLAN_FEATURE_TSF_UPLINK_DELAY
  1310. /**
  1311. * dp_set_tsf_ul_delay_report() - Enable or disable reporting uplink delay
  1312. * @soc_hdl: cdp soc pointer
  1313. * @vdev_id: vdev id
  1314. * @enable: true to enable and false to disable
  1315. *
  1316. * Return: QDF_STATUS
  1317. */
  1318. QDF_STATUS dp_set_tsf_ul_delay_report(struct cdp_soc_t *soc_hdl,
  1319. uint8_t vdev_id, bool enable);
  1320. /**
  1321. * dp_get_uplink_delay() - Get uplink delay value
  1322. * @soc_hdl: cdp soc pointer
  1323. * @vdev_id: vdev id
  1324. * @val: pointer to save uplink delay value
  1325. *
  1326. * Return: QDF_STATUS
  1327. */
  1328. QDF_STATUS dp_get_uplink_delay(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  1329. uint32_t *val);
  1330. #endif /* WLAN_FEATURE_TSF_UPLINK_TSF */
  1331. /**
  1332. * dp_tx_pkt_tracepoints_enabled() - Get the state of tx pkt tracepoint
  1333. *
  1334. * Return: True if any tx pkt tracepoint is enabled else false
  1335. */
  1336. static inline
  1337. bool dp_tx_pkt_tracepoints_enabled(void)
  1338. {
  1339. return (qdf_trace_dp_tx_comp_tcp_pkt_enabled() ||
  1340. qdf_trace_dp_tx_comp_udp_pkt_enabled() ||
  1341. qdf_trace_dp_tx_comp_pkt_enabled());
  1342. }
  1343. #ifdef DP_TX_TRACKING
  1344. /**
  1345. * dp_tx_desc_set_timestamp() - set timestamp in tx descriptor
  1346. * @tx_desc: tx descriptor
  1347. *
  1348. * Return: None
  1349. */
  1350. static inline
  1351. void dp_tx_desc_set_timestamp(struct dp_tx_desc_s *tx_desc)
  1352. {
  1353. tx_desc->timestamp_tick = qdf_system_ticks();
  1354. }
  1355. /**
  1356. * dp_tx_desc_check_corruption() - Verify magic pattern in tx descriptor
  1357. * @tx_desc: tx descriptor
  1358. *
  1359. * Check for corruption in tx descriptor, if magic pattern is not matching
  1360. * trigger self recovery
  1361. *
  1362. * Return: none
  1363. */
  1364. void dp_tx_desc_check_corruption(struct dp_tx_desc_s *tx_desc);
  1365. #else
  1366. static inline
  1367. void dp_tx_desc_set_timestamp(struct dp_tx_desc_s *tx_desc)
  1368. {
  1369. }
  1370. static inline
  1371. void dp_tx_desc_check_corruption(struct dp_tx_desc_s *tx_desc)
  1372. {
  1373. }
  1374. #endif
  1375. #ifndef CONFIG_SAWF
  1376. static inline bool dp_sawf_tag_valid_get(qdf_nbuf_t nbuf)
  1377. {
  1378. return false;
  1379. }
  1380. #endif
  1381. #ifdef HW_TX_DELAY_STATS_ENABLE
  1382. /**
  1383. * dp_tx_desc_set_ktimestamp() - set kernel timestamp in tx descriptor
  1384. * @vdev: DP vdev handle
  1385. * @tx_desc: tx descriptor
  1386. *
  1387. * Return: true when descriptor is timestamped, false otherwise
  1388. */
  1389. static inline
  1390. bool dp_tx_desc_set_ktimestamp(struct dp_vdev *vdev,
  1391. struct dp_tx_desc_s *tx_desc)
  1392. {
  1393. if (qdf_unlikely(vdev->pdev->delay_stats_flag) ||
  1394. qdf_unlikely(vdev->pdev->soc->wlan_cfg_ctx->pext_stats_enabled) ||
  1395. qdf_unlikely(dp_tx_pkt_tracepoints_enabled()) ||
  1396. qdf_unlikely(vdev->pdev->soc->peerstats_enabled) ||
  1397. qdf_unlikely(dp_is_vdev_tx_delay_stats_enabled(vdev))) {
  1398. tx_desc->timestamp = qdf_ktime_real_get();
  1399. return true;
  1400. }
  1401. return false;
  1402. }
  1403. #else
  1404. static inline
  1405. bool dp_tx_desc_set_ktimestamp(struct dp_vdev *vdev,
  1406. struct dp_tx_desc_s *tx_desc)
  1407. {
  1408. if (qdf_unlikely(vdev->pdev->delay_stats_flag) ||
  1409. qdf_unlikely(vdev->pdev->soc->wlan_cfg_ctx->pext_stats_enabled) ||
  1410. qdf_unlikely(dp_tx_pkt_tracepoints_enabled()) ||
  1411. qdf_unlikely(vdev->pdev->soc->peerstats_enabled)) {
  1412. tx_desc->timestamp = qdf_ktime_real_get();
  1413. return true;
  1414. }
  1415. return false;
  1416. }
  1417. #endif
  1418. #ifdef CONFIG_DP_PKT_ADD_TIMESTAMP
  1419. /**
  1420. * dp_pkt_add_timestamp() - add timestamp in data payload
  1421. *
  1422. * @vdev: dp vdev
  1423. * @index: index to decide offset in payload
  1424. * @time: timestamp to add in data payload
  1425. * @nbuf: network buffer
  1426. *
  1427. * Return: none
  1428. */
  1429. void dp_pkt_add_timestamp(struct dp_vdev *vdev,
  1430. enum qdf_pkt_timestamp_index index, uint64_t time,
  1431. qdf_nbuf_t nbuf);
  1432. /**
  1433. * dp_pkt_get_timestamp() - get current system time
  1434. *
  1435. * @time: return current system time
  1436. *
  1437. * Return: none
  1438. */
  1439. void dp_pkt_get_timestamp(uint64_t *time);
  1440. #else
  1441. #define dp_pkt_add_timestamp(vdev, index, time, nbuf)
  1442. static inline
  1443. void dp_pkt_get_timestamp(uint64_t *time)
  1444. {
  1445. }
  1446. #endif
  1447. #ifdef CONFIG_WLAN_SYSFS_MEM_STATS
  1448. /**
  1449. * dp_update_tx_desc_stats - Update the increase or decrease in
  1450. * outstanding tx desc count
  1451. * values on pdev and soc
  1452. * @pdev: DP pdev handle
  1453. *
  1454. * Return: void
  1455. */
  1456. static inline void
  1457. dp_update_tx_desc_stats(struct dp_pdev *pdev)
  1458. {
  1459. int32_t tx_descs_cnt =
  1460. qdf_atomic_read(&pdev->num_tx_outstanding);
  1461. if (pdev->tx_descs_max < tx_descs_cnt)
  1462. pdev->tx_descs_max = tx_descs_cnt;
  1463. qdf_mem_tx_desc_cnt_update(pdev->num_tx_outstanding,
  1464. pdev->tx_descs_max);
  1465. }
  1466. #else /* CONFIG_WLAN_SYSFS_MEM_STATS */
  1467. static inline void
  1468. dp_update_tx_desc_stats(struct dp_pdev *pdev)
  1469. {
  1470. }
  1471. #endif /* CONFIG_WLAN_SYSFS_MEM_STATS */
  1472. #ifdef QCA_SUPPORT_DP_GLOBAL_CTX
  1473. /**
  1474. * dp_tx_get_global_desc_in_use() - read global descriptors in usage
  1475. * @dp_global: Datapath global context
  1476. *
  1477. * Return: global descriptors in use
  1478. */
  1479. static inline int32_t
  1480. dp_tx_get_global_desc_in_use(struct dp_global_context *dp_global)
  1481. {
  1482. return qdf_atomic_read(&dp_global->global_descriptor_in_use);
  1483. }
  1484. #endif
  1485. #ifdef QCA_TX_LIMIT_CHECK
  1486. static inline bool is_spl_packet(qdf_nbuf_t nbuf)
  1487. {
  1488. if (qdf_nbuf_is_ipv4_eapol_pkt(nbuf))
  1489. return true;
  1490. return false;
  1491. }
  1492. #ifdef QCA_SUPPORT_DP_GLOBAL_CTX
  1493. /**
  1494. * is_dp_spl_tx_limit_reached - Check if the packet is a special packet to allow
  1495. * allocation if allocated tx descriptors are within the global max limit
  1496. * and pdev max limit.
  1497. * @vdev: DP vdev handle
  1498. * @nbuf: network buffer
  1499. *
  1500. * Return: true if allocated tx descriptors reached max configured value, else
  1501. * false
  1502. */
  1503. static inline bool
  1504. is_dp_spl_tx_limit_reached(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  1505. {
  1506. struct dp_pdev *pdev = vdev->pdev;
  1507. struct dp_soc *soc = pdev->soc;
  1508. struct dp_global_context *dp_global;
  1509. uint32_t global_tx_desc_allowed;
  1510. dp_global = wlan_objmgr_get_global_ctx();
  1511. global_tx_desc_allowed =
  1512. wlan_cfg_get_num_global_tx_desc(soc->wlan_cfg_ctx);
  1513. if (is_spl_packet(nbuf)) {
  1514. if (dp_tx_get_global_desc_in_use(dp_global) >=
  1515. global_tx_desc_allowed)
  1516. return true;
  1517. if (qdf_atomic_read(&pdev->num_tx_outstanding) >=
  1518. pdev->num_tx_allowed)
  1519. return true;
  1520. return false;
  1521. }
  1522. return true;
  1523. }
  1524. /**
  1525. * dp_tx_limit_check - Check if allocated tx descriptors reached
  1526. * global max reg limit and pdev max reg limit for regular packets. Also check
  1527. * if the limit is reached for special packets.
  1528. * @vdev: DP vdev handle
  1529. * @nbuf: network buffer
  1530. *
  1531. * Return: true if allocated tx descriptors reached max limit for regular
  1532. * packets and in case of special packets, if the limit is reached max
  1533. * configured vale for the soc/pdev, else false
  1534. */
  1535. static inline bool
  1536. dp_tx_limit_check(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  1537. {
  1538. struct dp_pdev *pdev = vdev->pdev;
  1539. struct dp_soc *soc = pdev->soc;
  1540. struct dp_global_context *dp_global;
  1541. uint32_t global_tx_desc_allowed;
  1542. uint32_t global_tx_desc_reg_allowed;
  1543. uint32_t global_tx_desc_spcl_allowed;
  1544. dp_global = wlan_objmgr_get_global_ctx();
  1545. global_tx_desc_allowed =
  1546. wlan_cfg_get_num_global_tx_desc(soc->wlan_cfg_ctx);
  1547. global_tx_desc_spcl_allowed =
  1548. wlan_cfg_get_num_global_spcl_tx_desc(soc->wlan_cfg_ctx);
  1549. global_tx_desc_reg_allowed = global_tx_desc_allowed -
  1550. global_tx_desc_spcl_allowed;
  1551. if (dp_tx_get_global_desc_in_use(dp_global) >= global_tx_desc_reg_allowed) {
  1552. if (is_dp_spl_tx_limit_reached(vdev, nbuf)) {
  1553. dp_tx_info("queued packets are more than max tx, drop the frame");
  1554. DP_STATS_INC(vdev, tx_i.dropped.desc_na.num, 1);
  1555. return true;
  1556. }
  1557. }
  1558. if (qdf_atomic_read(&pdev->num_tx_outstanding) >=
  1559. pdev->num_reg_tx_allowed) {
  1560. if (is_dp_spl_tx_limit_reached(vdev, nbuf)) {
  1561. dp_tx_info("queued packets are more than max tx, drop the frame");
  1562. DP_STATS_INC(vdev, tx_i.dropped.desc_na.num, 1);
  1563. DP_STATS_INC(vdev,
  1564. tx_i.dropped.desc_na_exc_outstand.num, 1);
  1565. return true;
  1566. }
  1567. }
  1568. return false;
  1569. }
  1570. #else
  1571. /**
  1572. * is_dp_spl_tx_limit_reached - Check if the packet is a special packet to allow
  1573. * allocation if allocated tx descriptors are within the soc max limit
  1574. * and pdev max limit.
  1575. * @vdev: DP vdev handle
  1576. * @nbuf: network buffer
  1577. *
  1578. * Return: true if allocated tx descriptors reached max configured value, else
  1579. * false
  1580. */
  1581. static inline bool
  1582. is_dp_spl_tx_limit_reached(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  1583. {
  1584. struct dp_pdev *pdev = vdev->pdev;
  1585. struct dp_soc *soc = pdev->soc;
  1586. if (is_spl_packet(nbuf)) {
  1587. if (qdf_atomic_read(&soc->num_tx_outstanding) >=
  1588. soc->num_tx_allowed)
  1589. return true;
  1590. if (qdf_atomic_read(&pdev->num_tx_outstanding) >=
  1591. pdev->num_tx_allowed)
  1592. return true;
  1593. return false;
  1594. }
  1595. return true;
  1596. }
  1597. /**
  1598. * dp_tx_limit_check - Check if allocated tx descriptors reached
  1599. * soc max reg limit and pdev max reg limit for regular packets. Also check if
  1600. * the limit is reached for special packets.
  1601. * @vdev: DP vdev handle
  1602. * @nbuf: network buffer
  1603. *
  1604. * Return: true if allocated tx descriptors reached max limit for regular
  1605. * packets and in case of special packets, if the limit is reached max
  1606. * configured vale for the soc/pdev, else false
  1607. */
  1608. static inline bool
  1609. dp_tx_limit_check(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  1610. {
  1611. struct dp_pdev *pdev = vdev->pdev;
  1612. struct dp_soc *soc = pdev->soc;
  1613. if (qdf_atomic_read(&soc->num_tx_outstanding) >=
  1614. soc->num_reg_tx_allowed) {
  1615. if (is_dp_spl_tx_limit_reached(vdev, nbuf)) {
  1616. dp_tx_info("queued packets are more than max tx, drop the frame");
  1617. DP_STATS_INC(vdev, tx_i.dropped.desc_na.num, 1);
  1618. return true;
  1619. }
  1620. }
  1621. if (qdf_atomic_read(&pdev->num_tx_outstanding) >=
  1622. pdev->num_reg_tx_allowed) {
  1623. if (is_dp_spl_tx_limit_reached(vdev, nbuf)) {
  1624. dp_tx_info("queued packets are more than max tx, drop the frame");
  1625. DP_STATS_INC(vdev, tx_i.dropped.desc_na.num, 1);
  1626. DP_STATS_INC(vdev,
  1627. tx_i.dropped.desc_na_exc_outstand.num, 1);
  1628. return true;
  1629. }
  1630. }
  1631. return false;
  1632. }
  1633. #endif
  1634. /**
  1635. * dp_tx_exception_limit_check - Check if allocated tx exception descriptors
  1636. * reached soc max limit
  1637. * @vdev: DP vdev handle
  1638. *
  1639. * Return: true if allocated tx descriptors reached max configured value, else
  1640. * false
  1641. */
  1642. static inline bool
  1643. dp_tx_exception_limit_check(struct dp_vdev *vdev)
  1644. {
  1645. struct dp_pdev *pdev = vdev->pdev;
  1646. struct dp_soc *soc = pdev->soc;
  1647. if (qdf_atomic_read(&soc->num_tx_exception) >=
  1648. soc->num_msdu_exception_desc) {
  1649. dp_info("exc packets are more than max drop the exc pkt");
  1650. DP_STATS_INC(vdev, tx_i.dropped.exc_desc_na.num, 1);
  1651. return true;
  1652. }
  1653. return false;
  1654. }
  1655. #ifdef QCA_SUPPORT_DP_GLOBAL_CTX
  1656. /**
  1657. * dp_tx_outstanding_inc - Inc outstanding tx desc values on global and pdev
  1658. * @pdev: DP pdev handle
  1659. *
  1660. * Return: void
  1661. */
  1662. static inline void
  1663. dp_tx_outstanding_inc(struct dp_pdev *pdev)
  1664. {
  1665. struct dp_global_context *dp_global;
  1666. dp_global = wlan_objmgr_get_global_ctx();
  1667. qdf_atomic_inc(&dp_global->global_descriptor_in_use);
  1668. qdf_atomic_inc(&pdev->num_tx_outstanding);
  1669. dp_update_tx_desc_stats(pdev);
  1670. }
  1671. /**
  1672. * dp_tx_outstanding_dec - Dec outstanding tx desc values on global and pdev
  1673. * @pdev: DP pdev handle
  1674. *
  1675. * Return: void
  1676. */
  1677. static inline void
  1678. dp_tx_outstanding_dec(struct dp_pdev *pdev)
  1679. {
  1680. struct dp_global_context *dp_global;
  1681. dp_global = wlan_objmgr_get_global_ctx();
  1682. qdf_atomic_dec(&dp_global->global_descriptor_in_use);
  1683. qdf_atomic_dec(&pdev->num_tx_outstanding);
  1684. dp_update_tx_desc_stats(pdev);
  1685. }
  1686. #else
  1687. /**
  1688. * dp_tx_outstanding_inc - Increment outstanding tx desc values on pdev and soc
  1689. * @pdev: DP pdev handle
  1690. *
  1691. * Return: void
  1692. */
  1693. static inline void
  1694. dp_tx_outstanding_inc(struct dp_pdev *pdev)
  1695. {
  1696. struct dp_soc *soc = pdev->soc;
  1697. qdf_atomic_inc(&pdev->num_tx_outstanding);
  1698. qdf_atomic_inc(&soc->num_tx_outstanding);
  1699. dp_update_tx_desc_stats(pdev);
  1700. }
  1701. /**
  1702. * dp_tx_outstanding_dec - Decrement outstanding tx desc values on pdev and soc
  1703. * @pdev: DP pdev handle
  1704. *
  1705. * Return: void
  1706. */
  1707. static inline void
  1708. dp_tx_outstanding_dec(struct dp_pdev *pdev)
  1709. {
  1710. struct dp_soc *soc = pdev->soc;
  1711. qdf_atomic_dec(&pdev->num_tx_outstanding);
  1712. qdf_atomic_dec(&soc->num_tx_outstanding);
  1713. dp_update_tx_desc_stats(pdev);
  1714. }
  1715. #endif /* QCA_SUPPORT_DP_GLOBAL_CTX */
  1716. #else //QCA_TX_LIMIT_CHECK
  1717. static inline bool
  1718. dp_tx_limit_check(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  1719. {
  1720. return false;
  1721. }
  1722. static inline bool
  1723. dp_tx_exception_limit_check(struct dp_vdev *vdev)
  1724. {
  1725. return false;
  1726. }
  1727. static inline void
  1728. dp_tx_outstanding_inc(struct dp_pdev *pdev)
  1729. {
  1730. qdf_atomic_inc(&pdev->num_tx_outstanding);
  1731. dp_update_tx_desc_stats(pdev);
  1732. }
  1733. static inline void
  1734. dp_tx_outstanding_dec(struct dp_pdev *pdev)
  1735. {
  1736. qdf_atomic_dec(&pdev->num_tx_outstanding);
  1737. dp_update_tx_desc_stats(pdev);
  1738. }
  1739. #endif //QCA_TX_LIMIT_CHECK
  1740. /**
  1741. * dp_tx_get_pkt_len() - Get the packet length of a msdu
  1742. * @tx_desc: tx descriptor
  1743. *
  1744. * Return: Packet length of a msdu. If the packet is fragmented,
  1745. * it will return the single fragment length.
  1746. *
  1747. * In TSO mode, the msdu from stack will be fragmented into small
  1748. * fragments and each of these new fragments will be transmitted
  1749. * as an individual msdu.
  1750. *
  1751. * Please note that the length of a msdu from stack may be smaller
  1752. * than the length of the total length of the fragments it has been
  1753. * fragmentted because each of the fragments has a nbuf header.
  1754. */
  1755. static inline uint32_t dp_tx_get_pkt_len(struct dp_tx_desc_s *tx_desc)
  1756. {
  1757. return tx_desc->frm_type == dp_tx_frm_tso ?
  1758. tx_desc->msdu_ext_desc->tso_desc->seg.total_len :
  1759. qdf_nbuf_len(tx_desc->nbuf);
  1760. }
  1761. #ifdef FEATURE_RUNTIME_PM
  1762. static inline int dp_get_rtpm_tput_policy_requirement(struct dp_soc *soc)
  1763. {
  1764. return qdf_atomic_read(&soc->rtpm_high_tput_flag) &&
  1765. (hif_rtpm_get_state() <= HIF_RTPM_STATE_ON);
  1766. }
  1767. #else
  1768. static inline int dp_get_rtpm_tput_policy_requirement(struct dp_soc *soc)
  1769. {
  1770. return 0;
  1771. }
  1772. #endif
  1773. #endif