internal.h 4.2 KB

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  1. /* Copyright (c) 2018, The Linux Foundation. All rights reserved.
  2. * This program is free software; you can redistribute it and/or modify
  3. * it under the terms of the GNU General Public License version 2 and
  4. * only version 2 as published by the Free Software Foundation.
  5. * This program is distributed in the hope that it will be useful,
  6. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  7. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  8. * GNU General Public License for more details.
  9. */
  10. #ifndef _WCD937X_INTERNAL_H
  11. #define _WCD937X_INTERNAL_H
  12. #include "../wcd-mbhc-v2.h"
  13. #include "asoc/wcd-irq.h"
  14. #include "wcd937x-mbhc.h"
  15. #define WCD937X_MAX_MICBIAS 3
  16. /* Convert from vout ctl to micbias voltage in mV */
  17. #define WCD_VOUT_CTL_TO_MICB(v) (1000 + v * 50)
  18. #define MAX_PORT 8
  19. #define MAX_CH_PER_PORT 8
  20. extern struct regmap_config wcd937x_regmap_config;
  21. struct codec_port_info {
  22. u32 slave_port_type;
  23. u32 master_port_type;
  24. u32 ch_mask;
  25. u32 num_ch;
  26. u32 ch_rate;
  27. };
  28. struct wcd937x_priv {
  29. struct device *dev;
  30. int variant;
  31. struct snd_soc_codec *codec;
  32. struct device_node *rst_np;
  33. struct regmap *regmap;
  34. struct swr_device *rx_swr_dev;
  35. struct swr_device *tx_swr_dev;
  36. s32 micb_ref[WCD937X_MAX_MICBIAS];
  37. s32 pullup_ref[WCD937X_MAX_MICBIAS];
  38. struct fw_info *fw_data;
  39. struct device_node *wcd_rst_np;
  40. struct mutex micb_lock;
  41. s32 dmic_0_1_clk_cnt;
  42. s32 dmic_2_3_clk_cnt;
  43. s32 dmic_4_5_clk_cnt;
  44. /* mbhc module */
  45. struct wcd937x_mbhc *mbhc;
  46. u32 hph_mode;
  47. bool comp1_enable;
  48. bool comp2_enable;
  49. struct irq_domain *virq;
  50. struct wcd_irq_info irq_info;
  51. u32 rx_clk_cnt;
  52. int num_irq_regs;
  53. u8 num_tx_ports;
  54. u8 num_rx_ports;
  55. struct codec_port_info
  56. tx_port_mapping[MAX_PORT][MAX_CH_PER_PORT];
  57. struct codec_port_info
  58. rx_port_mapping[MAX_PORT][MAX_CH_PER_PORT];
  59. struct regulator_bulk_data *supplies;
  60. struct notifier_block nblock;
  61. /* wcd callback to bolero */
  62. void *handle;
  63. int (*update_wcd_event)(void *handle, u16 event, u32 data);
  64. int (*register_notifier)(void *handle,
  65. struct notifier_block *nblock,
  66. bool enable);
  67. u32 version;
  68. /* Entry for version info */
  69. struct snd_info_entry *entry;
  70. struct snd_info_entry *version_entry;
  71. };
  72. struct wcd937x_micbias_setting {
  73. u8 ldoh_v;
  74. u32 cfilt1_mv;
  75. u32 micb1_mv;
  76. u32 micb2_mv;
  77. u32 micb3_mv;
  78. u8 bias1_cfilt_sel;
  79. };
  80. struct wcd937x_pdata {
  81. struct device_node *rst_np;
  82. struct device_node *rx_slave;
  83. struct device_node *tx_slave;
  84. struct wcd937x_micbias_setting micbias;
  85. struct cdc_regulator *regulator;
  86. int num_supplies;
  87. };
  88. struct wcd_ctrl_platform_data {
  89. void *handle;
  90. int (*update_wcd_event)(void *handle, u16 event, u32 data);
  91. int (*register_notifier)(void *handle,
  92. struct notifier_block *nblock,
  93. bool enable);
  94. };
  95. enum {
  96. WCD_RX1,
  97. WCD_RX2,
  98. WCD_RX3
  99. };
  100. enum {
  101. BOLERO_WCD_EVT_TX_CH_HOLD_CLEAR = 1,
  102. BOLERO_WCD_EVT_SSR_DOWN,
  103. BOLERO_WCD_EVT_SSR_UP,
  104. };
  105. enum {
  106. WCD_BOLERO_EVT_RX_MUTE = 1, /* for RX mute/unmute */
  107. WCD_BOLERO_EVT_IMPED_TRUE, /* for imped true */
  108. WCD_BOLERO_EVT_IMPED_FALSE, /* for imped false */
  109. };
  110. enum {
  111. /* INTR_CTRL_INT_MASK_0 */
  112. WCD937X_IRQ_MBHC_BUTTON_RELEASE_DET = 0,
  113. WCD937X_IRQ_MBHC_BUTTON_PRESS_DET,
  114. WCD937X_IRQ_MBHC_ELECT_INS_REM_DET,
  115. WCD937X_IRQ_MBHC_ELECT_INS_REM_LEG_DET,
  116. WCD937X_IRQ_MBHC_SW_DET,
  117. WCD937X_IRQ_HPHR_OCP_INT,
  118. WCD937X_IRQ_HPHR_CNP_INT,
  119. WCD937X_IRQ_HPHL_OCP_INT,
  120. /* INTR_CTRL_INT_MASK_1 */
  121. WCD937X_IRQ_HPHL_CNP_INT,
  122. WCD937X_IRQ_EAR_CNP_INT,
  123. WCD937X_IRQ_EAR_SCD_INT,
  124. WCD937X_IRQ_AUX_CNP_INT,
  125. WCD937X_IRQ_AUX_SCD_INT,
  126. WCD937X_IRQ_HPHL_PDM_WD_INT,
  127. WCD937X_IRQ_HPHR_PDM_WD_INT,
  128. WCD937X_IRQ_AUX_PDM_WD_INT,
  129. /* INTR_CTRL_INT_MASK_2 */
  130. WCD937X_IRQ_LDORT_SCD_INT,
  131. WCD937X_IRQ_MBHC_MOISTURE_INT,
  132. WCD937X_IRQ_HPHL_SURGE_DET_INT,
  133. WCD937X_IRQ_HPHR_SURGE_DET_INT,
  134. WCD937X_NUM_IRQS,
  135. };
  136. extern struct wcd937x_mbhc *wcd937x_soc_get_mbhc(struct snd_soc_codec *codec);
  137. extern int wcd937x_mbhc_micb_adjust_voltage(struct snd_soc_codec *codec,
  138. int volt, int micb_num);
  139. extern int wcd937x_get_micb_vout_ctl_val(u32 micb_mv);
  140. extern int wcd937x_micbias_control(struct snd_soc_codec *codec, int micb_num,
  141. int req, bool is_dapm);
  142. extern int wcd937x_info_create_codec_entry(struct snd_info_entry *codec_root,
  143. struct snd_soc_codec *codec);
  144. #endif