dp_rx.h 75 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740
  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #ifndef _DP_RX_H
  20. #define _DP_RX_H
  21. #include "hal_rx.h"
  22. #include "dp_peer.h"
  23. #include "dp_internal.h"
  24. #include <qdf_tracepoint.h>
  25. #include "dp_ipa.h"
  26. #ifdef RXDMA_OPTIMIZATION
  27. #ifndef RX_DATA_BUFFER_ALIGNMENT
  28. #define RX_DATA_BUFFER_ALIGNMENT 128
  29. #endif
  30. #ifndef RX_MONITOR_BUFFER_ALIGNMENT
  31. #define RX_MONITOR_BUFFER_ALIGNMENT 128
  32. #endif
  33. #else /* RXDMA_OPTIMIZATION */
  34. #define RX_DATA_BUFFER_ALIGNMENT 4
  35. #define RX_MONITOR_BUFFER_ALIGNMENT 4
  36. #endif /* RXDMA_OPTIMIZATION */
  37. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  38. #define DP_WBM2SW_RBM(sw0_bm_id) HAL_RX_BUF_RBM_SW1_BM(sw0_bm_id)
  39. /* RBM value used for re-injecting defragmented packets into REO */
  40. #define DP_DEFRAG_RBM(sw0_bm_id) HAL_RX_BUF_RBM_SW3_BM(sw0_bm_id)
  41. #endif
  42. #define RX_BUFFER_RESERVATION 0
  43. #ifdef BE_PKTLOG_SUPPORT
  44. #define BUFFER_RESIDUE 1
  45. #define RX_MON_MIN_HEAD_ROOM 64
  46. #endif
  47. #define DP_DEFAULT_NOISEFLOOR (-96)
  48. #define DP_RX_DESC_MAGIC 0xdec0de
  49. #define dp_rx_alert(params...) QDF_TRACE_FATAL(QDF_MODULE_ID_DP_RX, params)
  50. #define dp_rx_err(params...) QDF_TRACE_ERROR(QDF_MODULE_ID_DP_RX, params)
  51. #define dp_rx_warn(params...) QDF_TRACE_WARN(QDF_MODULE_ID_DP_RX, params)
  52. #define dp_rx_info(params...) \
  53. __QDF_TRACE_FL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_RX, ## params)
  54. #define dp_rx_info_rl(params...) \
  55. __QDF_TRACE_RL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_RX, ## params)
  56. #define dp_rx_debug(params...) QDF_TRACE_DEBUG(QDF_MODULE_ID_DP_RX, params)
  57. /**
  58. * enum dp_rx_desc_state
  59. *
  60. * @RX_DESC_REPLENISH: rx desc replenished
  61. * @RX_DESC_FREELIST: rx desc in freelist
  62. */
  63. enum dp_rx_desc_state {
  64. RX_DESC_REPLENISHED,
  65. RX_DESC_IN_FREELIST,
  66. };
  67. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  68. /**
  69. * struct dp_rx_desc_dbg_info
  70. *
  71. * @freelist_caller: name of the function that put the
  72. * the rx desc in freelist
  73. * @freelist_ts: timestamp when the rx desc is put in
  74. * a freelist
  75. * @replenish_caller: name of the function that last
  76. * replenished the rx desc
  77. * @replenish_ts: last replenish timestamp
  78. * @prev_nbuf: previous nbuf info
  79. * @prev_nbuf_data_addr: previous nbuf data address
  80. */
  81. struct dp_rx_desc_dbg_info {
  82. char freelist_caller[QDF_MEM_FUNC_NAME_SIZE];
  83. uint64_t freelist_ts;
  84. char replenish_caller[QDF_MEM_FUNC_NAME_SIZE];
  85. uint64_t replenish_ts;
  86. qdf_nbuf_t prev_nbuf;
  87. uint8_t *prev_nbuf_data_addr;
  88. };
  89. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  90. /**
  91. * struct dp_rx_desc
  92. *
  93. * @nbuf : VA of the "skb" posted
  94. * @rx_buf_start : VA of the original Rx buffer, before
  95. * movement of any skb->data pointer
  96. * @paddr_buf_start : PA of the original Rx buffer, before
  97. * movement of any frag pointer
  98. * @cookie : index into the sw array which holds
  99. * the sw Rx descriptors
  100. * Cookie space is 21 bits:
  101. * lower 18 bits -- index
  102. * upper 3 bits -- pool_id
  103. * @pool_id : pool Id for which this allocated.
  104. * Can only be used if there is no flow
  105. * steering
  106. * @chip_id : chip_id indicating MLO chip_id
  107. * valid or used only in case of multi-chip MLO
  108. * @in_use rx_desc is in use
  109. * @unmapped used to mark rx_desc an unmapped if the corresponding
  110. * nbuf is already unmapped
  111. * @in_err_state : Nbuf sanity failed for this descriptor.
  112. * @nbuf_data_addr : VA of nbuf data posted
  113. */
  114. struct dp_rx_desc {
  115. qdf_nbuf_t nbuf;
  116. uint8_t *rx_buf_start;
  117. qdf_dma_addr_t paddr_buf_start;
  118. uint32_t cookie;
  119. uint8_t pool_id;
  120. uint8_t chip_id;
  121. #ifdef RX_DESC_DEBUG_CHECK
  122. uint32_t magic;
  123. uint8_t *nbuf_data_addr;
  124. struct dp_rx_desc_dbg_info *dbg_info;
  125. #endif
  126. uint8_t in_use:1,
  127. unmapped:1,
  128. in_err_state:1;
  129. };
  130. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  131. #ifdef ATH_RX_PRI_SAVE
  132. #define DP_RX_TID_SAVE(_nbuf, _tid) \
  133. (qdf_nbuf_set_priority(_nbuf, _tid))
  134. #else
  135. #define DP_RX_TID_SAVE(_nbuf, _tid)
  136. #endif
  137. /* RX Descriptor Multi Page memory alloc related */
  138. #define DP_RX_DESC_OFFSET_NUM_BITS 8
  139. #define DP_RX_DESC_PAGE_ID_NUM_BITS 8
  140. #define DP_RX_DESC_POOL_ID_NUM_BITS 4
  141. #define DP_RX_DESC_PAGE_ID_SHIFT DP_RX_DESC_OFFSET_NUM_BITS
  142. #define DP_RX_DESC_POOL_ID_SHIFT \
  143. (DP_RX_DESC_OFFSET_NUM_BITS + DP_RX_DESC_PAGE_ID_NUM_BITS)
  144. #define RX_DESC_MULTI_PAGE_COOKIE_POOL_ID_MASK \
  145. (((1 << DP_RX_DESC_POOL_ID_NUM_BITS) - 1) << DP_RX_DESC_POOL_ID_SHIFT)
  146. #define RX_DESC_MULTI_PAGE_COOKIE_PAGE_ID_MASK \
  147. (((1 << DP_RX_DESC_PAGE_ID_NUM_BITS) - 1) << \
  148. DP_RX_DESC_PAGE_ID_SHIFT)
  149. #define RX_DESC_MULTI_PAGE_COOKIE_OFFSET_MASK \
  150. ((1 << DP_RX_DESC_OFFSET_NUM_BITS) - 1)
  151. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_POOL_ID(_cookie) \
  152. (((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_POOL_ID_MASK) >> \
  153. DP_RX_DESC_POOL_ID_SHIFT)
  154. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_PAGE_ID(_cookie) \
  155. (((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_PAGE_ID_MASK) >> \
  156. DP_RX_DESC_PAGE_ID_SHIFT)
  157. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_OFFSET(_cookie) \
  158. ((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_OFFSET_MASK)
  159. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  160. #define RX_DESC_COOKIE_INDEX_SHIFT 0
  161. #define RX_DESC_COOKIE_INDEX_MASK 0x3ffff /* 18 bits */
  162. #define RX_DESC_COOKIE_POOL_ID_SHIFT 18
  163. #define RX_DESC_COOKIE_POOL_ID_MASK 0x1c0000
  164. #define DP_RX_DESC_COOKIE_MAX \
  165. (RX_DESC_COOKIE_INDEX_MASK | RX_DESC_COOKIE_POOL_ID_MASK)
  166. #define DP_RX_DESC_COOKIE_POOL_ID_GET(_cookie) \
  167. (((_cookie) & RX_DESC_COOKIE_POOL_ID_MASK) >> \
  168. RX_DESC_COOKIE_POOL_ID_SHIFT)
  169. #define DP_RX_DESC_COOKIE_INDEX_GET(_cookie) \
  170. (((_cookie) & RX_DESC_COOKIE_INDEX_MASK) >> \
  171. RX_DESC_COOKIE_INDEX_SHIFT)
  172. #define dp_rx_add_to_free_desc_list(head, tail, new) \
  173. __dp_rx_add_to_free_desc_list(head, tail, new, __func__)
  174. #define dp_rx_buffers_replenish(soc, mac_id, rxdma_srng, rx_desc_pool, \
  175. num_buffers, desc_list, tail) \
  176. __dp_rx_buffers_replenish(soc, mac_id, rxdma_srng, rx_desc_pool, \
  177. num_buffers, desc_list, tail, __func__)
  178. #ifdef WLAN_SUPPORT_RX_FISA
  179. /**
  180. * dp_rx_set_hdr_pad() - set l3 padding in nbuf cb
  181. * @nbuf: pkt skb pointer
  182. * @l3_padding: l3 padding
  183. *
  184. * Return: None
  185. */
  186. static inline
  187. void dp_rx_set_hdr_pad(qdf_nbuf_t nbuf, uint32_t l3_padding)
  188. {
  189. QDF_NBUF_CB_RX_PACKET_L3_HDR_PAD(nbuf) = l3_padding;
  190. }
  191. #else
  192. static inline
  193. void dp_rx_set_hdr_pad(qdf_nbuf_t nbuf, uint32_t l3_padding)
  194. {
  195. }
  196. #endif
  197. #ifdef DP_RX_SPECIAL_FRAME_NEED
  198. /**
  199. * dp_rx_is_special_frame() - check is RX frame special needed
  200. *
  201. * @nbuf: RX skb pointer
  202. * @frame_mask: the mask for speical frame needed
  203. *
  204. * Check is RX frame wanted matched with mask
  205. *
  206. * Return: true - special frame needed, false - no
  207. */
  208. static inline
  209. bool dp_rx_is_special_frame(qdf_nbuf_t nbuf, uint32_t frame_mask)
  210. {
  211. if (((frame_mask & FRAME_MASK_IPV4_ARP) &&
  212. qdf_nbuf_is_ipv4_arp_pkt(nbuf)) ||
  213. ((frame_mask & FRAME_MASK_IPV4_DHCP) &&
  214. qdf_nbuf_is_ipv4_dhcp_pkt(nbuf)) ||
  215. ((frame_mask & FRAME_MASK_IPV4_EAPOL) &&
  216. qdf_nbuf_is_ipv4_eapol_pkt(nbuf)) ||
  217. ((frame_mask & FRAME_MASK_IPV6_DHCP) &&
  218. qdf_nbuf_is_ipv6_dhcp_pkt(nbuf)))
  219. return true;
  220. return false;
  221. }
  222. /**
  223. * dp_rx_deliver_special_frame() - Deliver the RX special frame to stack
  224. * if matches mask
  225. *
  226. * @soc: Datapath soc handler
  227. * @peer: pointer to DP peer
  228. * @nbuf: pointer to the skb of RX frame
  229. * @frame_mask: the mask for speical frame needed
  230. * @rx_tlv_hdr: start of rx tlv header
  231. *
  232. * note: Msdu_len must have been stored in QDF_NBUF_CB_RX_PKT_LEN(nbuf) and
  233. * single nbuf is expected.
  234. *
  235. * return: true - nbuf has been delivered to stack, false - not.
  236. */
  237. bool dp_rx_deliver_special_frame(struct dp_soc *soc, struct dp_txrx_peer *peer,
  238. qdf_nbuf_t nbuf, uint32_t frame_mask,
  239. uint8_t *rx_tlv_hdr);
  240. #else
  241. static inline
  242. bool dp_rx_is_special_frame(qdf_nbuf_t nbuf, uint32_t frame_mask)
  243. {
  244. return false;
  245. }
  246. static inline
  247. bool dp_rx_deliver_special_frame(struct dp_soc *soc, struct dp_txrx_peer *peer,
  248. qdf_nbuf_t nbuf, uint32_t frame_mask,
  249. uint8_t *rx_tlv_hdr)
  250. {
  251. return false;
  252. }
  253. #endif
  254. #ifdef FEATURE_RX_LINKSPEED_ROAM_TRIGGER
  255. /**
  256. * dp_rx_data_is_specific() - Used to exclude specific frames
  257. * not practical for getting rx
  258. * stats like rate, mcs, nss, etc.
  259. *
  260. * @hal-soc_hdl: soc handler
  261. * @rx_tlv_hdr: rx tlv header
  262. * @nbuf: RX skb pointer
  263. *
  264. * Return: true - a specific frame not suitable
  265. * for getting rx stats from it.
  266. * false - a common frame suitable for
  267. * getting rx stats from it.
  268. */
  269. static inline
  270. bool dp_rx_data_is_specific(hal_soc_handle_t hal_soc_hdl,
  271. uint8_t *rx_tlv_hdr,
  272. qdf_nbuf_t nbuf)
  273. {
  274. if (qdf_unlikely(qdf_nbuf_is_da_mcbc(nbuf)))
  275. return true;
  276. if (!hal_rx_tlv_first_mpdu_get(hal_soc_hdl, rx_tlv_hdr))
  277. return true;
  278. if (!hal_rx_msdu_end_first_msdu_get(hal_soc_hdl, rx_tlv_hdr))
  279. return true;
  280. /* ARP, EAPOL is neither IPV6 ETH nor IPV4 ETH from L3 level */
  281. if (qdf_likely(hal_rx_tlv_l3_type_get(hal_soc_hdl, rx_tlv_hdr) ==
  282. QDF_NBUF_TRAC_IPV4_ETH_TYPE)) {
  283. if (qdf_nbuf_is_ipv4_dhcp_pkt(nbuf))
  284. return true;
  285. } else if (qdf_likely(hal_rx_tlv_l3_type_get(hal_soc_hdl, rx_tlv_hdr) ==
  286. QDF_NBUF_TRAC_IPV6_ETH_TYPE)) {
  287. if (qdf_nbuf_is_ipv6_dhcp_pkt(nbuf))
  288. return true;
  289. } else {
  290. return true;
  291. }
  292. return false;
  293. }
  294. #else
  295. static inline
  296. bool dp_rx_data_is_specific(hal_soc_handle_t hal_soc_hdl,
  297. uint8_t *rx_tlv_hdr,
  298. qdf_nbuf_t nbuf)
  299. {
  300. /*
  301. * default return is true to make sure that rx stats
  302. * will not be handled when this feature is disabled
  303. */
  304. return true;
  305. }
  306. #endif /* FEATURE_RX_LINKSPEED_ROAM_TRIGGER */
  307. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  308. #ifdef DP_RX_DISABLE_NDI_MDNS_FORWARDING
  309. static inline
  310. bool dp_rx_check_ndi_mdns_fwding(struct dp_txrx_peer *ta_txrx_peer,
  311. qdf_nbuf_t nbuf)
  312. {
  313. if (ta_txrx_peer->vdev->opmode == wlan_op_mode_ndi &&
  314. qdf_nbuf_is_ipv6_mdns_pkt(nbuf)) {
  315. DP_PEER_PER_PKT_STATS_INC(ta_txrx_peer,
  316. rx.intra_bss.mdns_no_fwd, 1);
  317. return false;
  318. }
  319. return true;
  320. }
  321. #else
  322. static inline
  323. bool dp_rx_check_ndi_mdns_fwding(struct dp_txrx_peer *ta_txrx_peer,
  324. qdf_nbuf_t nbuf)
  325. {
  326. return true;
  327. }
  328. #endif
  329. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  330. /* DOC: Offset to obtain LLC hdr
  331. *
  332. * In the case of Wifi parse error
  333. * to reach LLC header from beginning
  334. * of VLAN tag we need to skip 8 bytes.
  335. * Vlan_tag(4)+length(2)+length added
  336. * by HW(2) = 8 bytes.
  337. */
  338. #define DP_SKIP_VLAN 8
  339. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  340. /**
  341. * struct dp_rx_cached_buf - rx cached buffer
  342. * @list: linked list node
  343. * @buf: skb buffer
  344. */
  345. struct dp_rx_cached_buf {
  346. qdf_list_node_t node;
  347. qdf_nbuf_t buf;
  348. };
  349. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  350. /*
  351. *dp_rx_xor_block() - xor block of data
  352. *@b: destination data block
  353. *@a: source data block
  354. *@len: length of the data to process
  355. *
  356. *Returns: None
  357. */
  358. static inline void dp_rx_xor_block(uint8_t *b, const uint8_t *a, qdf_size_t len)
  359. {
  360. qdf_size_t i;
  361. for (i = 0; i < len; i++)
  362. b[i] ^= a[i];
  363. }
  364. /*
  365. *dp_rx_rotl() - rotate the bits left
  366. *@val: unsigned integer input value
  367. *@bits: number of bits
  368. *
  369. *Returns: Integer with left rotated by number of 'bits'
  370. */
  371. static inline uint32_t dp_rx_rotl(uint32_t val, int bits)
  372. {
  373. return (val << bits) | (val >> (32 - bits));
  374. }
  375. /*
  376. *dp_rx_rotr() - rotate the bits right
  377. *@val: unsigned integer input value
  378. *@bits: number of bits
  379. *
  380. *Returns: Integer with right rotated by number of 'bits'
  381. */
  382. static inline uint32_t dp_rx_rotr(uint32_t val, int bits)
  383. {
  384. return (val >> bits) | (val << (32 - bits));
  385. }
  386. /*
  387. * dp_set_rx_queue() - set queue_mapping in skb
  388. * @nbuf: skb
  389. * @queue_id: rx queue_id
  390. *
  391. * Return: void
  392. */
  393. #ifdef QCA_OL_RX_MULTIQ_SUPPORT
  394. static inline void dp_set_rx_queue(qdf_nbuf_t nbuf, uint8_t queue_id)
  395. {
  396. qdf_nbuf_record_rx_queue(nbuf, queue_id);
  397. return;
  398. }
  399. #else
  400. static inline void dp_set_rx_queue(qdf_nbuf_t nbuf, uint8_t queue_id)
  401. {
  402. }
  403. #endif
  404. /*
  405. *dp_rx_xswap() - swap the bits left
  406. *@val: unsigned integer input value
  407. *
  408. *Returns: Integer with bits swapped
  409. */
  410. static inline uint32_t dp_rx_xswap(uint32_t val)
  411. {
  412. return ((val & 0x00ff00ff) << 8) | ((val & 0xff00ff00) >> 8);
  413. }
  414. /*
  415. *dp_rx_get_le32_split() - get little endian 32 bits split
  416. *@b0: byte 0
  417. *@b1: byte 1
  418. *@b2: byte 2
  419. *@b3: byte 3
  420. *
  421. *Returns: Integer with split little endian 32 bits
  422. */
  423. static inline uint32_t dp_rx_get_le32_split(uint8_t b0, uint8_t b1, uint8_t b2,
  424. uint8_t b3)
  425. {
  426. return b0 | (b1 << 8) | (b2 << 16) | (b3 << 24);
  427. }
  428. /*
  429. *dp_rx_get_le32() - get little endian 32 bits
  430. *@b0: byte 0
  431. *@b1: byte 1
  432. *@b2: byte 2
  433. *@b3: byte 3
  434. *
  435. *Returns: Integer with little endian 32 bits
  436. */
  437. static inline uint32_t dp_rx_get_le32(const uint8_t *p)
  438. {
  439. return dp_rx_get_le32_split(p[0], p[1], p[2], p[3]);
  440. }
  441. /*
  442. * dp_rx_put_le32() - put little endian 32 bits
  443. * @p: destination char array
  444. * @v: source 32-bit integer
  445. *
  446. * Returns: None
  447. */
  448. static inline void dp_rx_put_le32(uint8_t *p, uint32_t v)
  449. {
  450. p[0] = (v) & 0xff;
  451. p[1] = (v >> 8) & 0xff;
  452. p[2] = (v >> 16) & 0xff;
  453. p[3] = (v >> 24) & 0xff;
  454. }
  455. /* Extract michal mic block of data */
  456. #define dp_rx_michael_block(l, r) \
  457. do { \
  458. r ^= dp_rx_rotl(l, 17); \
  459. l += r; \
  460. r ^= dp_rx_xswap(l); \
  461. l += r; \
  462. r ^= dp_rx_rotl(l, 3); \
  463. l += r; \
  464. r ^= dp_rx_rotr(l, 2); \
  465. l += r; \
  466. } while (0)
  467. /**
  468. * struct dp_rx_desc_list_elem_t
  469. *
  470. * @next : Next pointer to form free list
  471. * @rx_desc : DP Rx descriptor
  472. */
  473. union dp_rx_desc_list_elem_t {
  474. union dp_rx_desc_list_elem_t *next;
  475. struct dp_rx_desc rx_desc;
  476. };
  477. #ifdef RX_DESC_MULTI_PAGE_ALLOC
  478. /**
  479. * dp_rx_desc_find() - find dp rx descriptor from page ID and offset
  480. * @page_id: Page ID
  481. * @offset: Offset of the descriptor element
  482. *
  483. * Return: RX descriptor element
  484. */
  485. union dp_rx_desc_list_elem_t *dp_rx_desc_find(uint16_t page_id, uint16_t offset,
  486. struct rx_desc_pool *rx_pool);
  487. static inline
  488. struct dp_rx_desc *dp_get_rx_desc_from_cookie(struct dp_soc *soc,
  489. struct rx_desc_pool *pool,
  490. uint32_t cookie)
  491. {
  492. uint8_t pool_id = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_POOL_ID(cookie);
  493. uint16_t page_id = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_PAGE_ID(cookie);
  494. uint8_t offset = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_OFFSET(cookie);
  495. struct rx_desc_pool *rx_desc_pool;
  496. union dp_rx_desc_list_elem_t *rx_desc_elem;
  497. if (qdf_unlikely(pool_id >= MAX_PDEV_CNT))
  498. return NULL;
  499. rx_desc_pool = &pool[pool_id];
  500. rx_desc_elem = (union dp_rx_desc_list_elem_t *)
  501. (rx_desc_pool->desc_pages.cacheable_pages[page_id] +
  502. rx_desc_pool->elem_size * offset);
  503. return &rx_desc_elem->rx_desc;
  504. }
  505. static inline
  506. struct dp_rx_desc *dp_get_rx_mon_status_desc_from_cookie(struct dp_soc *soc,
  507. struct rx_desc_pool *pool,
  508. uint32_t cookie)
  509. {
  510. uint8_t pool_id = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_POOL_ID(cookie);
  511. uint16_t page_id = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_PAGE_ID(cookie);
  512. uint8_t offset = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_OFFSET(cookie);
  513. struct rx_desc_pool *rx_desc_pool;
  514. union dp_rx_desc_list_elem_t *rx_desc_elem;
  515. if (qdf_unlikely(pool_id >= NUM_RXDMA_RINGS_PER_PDEV))
  516. return NULL;
  517. rx_desc_pool = &pool[pool_id];
  518. rx_desc_elem = (union dp_rx_desc_list_elem_t *)
  519. (rx_desc_pool->desc_pages.cacheable_pages[page_id] +
  520. rx_desc_pool->elem_size * offset);
  521. return &rx_desc_elem->rx_desc;
  522. }
  523. /**
  524. * dp_rx_cookie_2_va_rxdma_buf() - Converts cookie to a virtual address of
  525. * the Rx descriptor on Rx DMA source ring buffer
  526. * @soc: core txrx main context
  527. * @cookie: cookie used to lookup virtual address
  528. *
  529. * Return: Pointer to the Rx descriptor
  530. */
  531. static inline
  532. struct dp_rx_desc *dp_rx_cookie_2_va_rxdma_buf(struct dp_soc *soc,
  533. uint32_t cookie)
  534. {
  535. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_buf[0], cookie);
  536. }
  537. /**
  538. * dp_rx_cookie_2_va_mon_buf() - Converts cookie to a virtual address of
  539. * the Rx descriptor on monitor ring buffer
  540. * @soc: core txrx main context
  541. * @cookie: cookie used to lookup virtual address
  542. *
  543. * Return: Pointer to the Rx descriptor
  544. */
  545. static inline
  546. struct dp_rx_desc *dp_rx_cookie_2_va_mon_buf(struct dp_soc *soc,
  547. uint32_t cookie)
  548. {
  549. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_mon[0], cookie);
  550. }
  551. /**
  552. * dp_rx_cookie_2_va_mon_status() - Converts cookie to a virtual address of
  553. * the Rx descriptor on monitor status ring buffer
  554. * @soc: core txrx main context
  555. * @cookie: cookie used to lookup virtual address
  556. *
  557. * Return: Pointer to the Rx descriptor
  558. */
  559. static inline
  560. struct dp_rx_desc *dp_rx_cookie_2_va_mon_status(struct dp_soc *soc,
  561. uint32_t cookie)
  562. {
  563. return dp_get_rx_mon_status_desc_from_cookie(soc,
  564. &soc->rx_desc_status[0],
  565. cookie);
  566. }
  567. #else
  568. void dp_rx_desc_pool_init(struct dp_soc *soc, uint32_t pool_id,
  569. uint32_t pool_size,
  570. struct rx_desc_pool *rx_desc_pool);
  571. /**
  572. * dp_rx_cookie_2_va_rxdma_buf() - Converts cookie to a virtual address of
  573. * the Rx descriptor on Rx DMA source ring buffer
  574. * @soc: core txrx main context
  575. * @cookie: cookie used to lookup virtual address
  576. *
  577. * Return: void *: Virtual Address of the Rx descriptor
  578. */
  579. static inline
  580. void *dp_rx_cookie_2_va_rxdma_buf(struct dp_soc *soc, uint32_t cookie)
  581. {
  582. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  583. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  584. struct rx_desc_pool *rx_desc_pool;
  585. if (qdf_unlikely(pool_id >= MAX_RXDESC_POOLS))
  586. return NULL;
  587. rx_desc_pool = &soc->rx_desc_buf[pool_id];
  588. if (qdf_unlikely(index >= rx_desc_pool->pool_size))
  589. return NULL;
  590. return &rx_desc_pool->array[index].rx_desc;
  591. }
  592. /**
  593. * dp_rx_cookie_2_va_mon_buf() - Converts cookie to a virtual address of
  594. * the Rx descriptor on monitor ring buffer
  595. * @soc: core txrx main context
  596. * @cookie: cookie used to lookup virtual address
  597. *
  598. * Return: void *: Virtual Address of the Rx descriptor
  599. */
  600. static inline
  601. void *dp_rx_cookie_2_va_mon_buf(struct dp_soc *soc, uint32_t cookie)
  602. {
  603. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  604. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  605. /* TODO */
  606. /* Add sanity for pool_id & index */
  607. return &(soc->rx_desc_mon[pool_id].array[index].rx_desc);
  608. }
  609. /**
  610. * dp_rx_cookie_2_va_mon_status() - Converts cookie to a virtual address of
  611. * the Rx descriptor on monitor status ring buffer
  612. * @soc: core txrx main context
  613. * @cookie: cookie used to lookup virtual address
  614. *
  615. * Return: void *: Virtual Address of the Rx descriptor
  616. */
  617. static inline
  618. void *dp_rx_cookie_2_va_mon_status(struct dp_soc *soc, uint32_t cookie)
  619. {
  620. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  621. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  622. /* TODO */
  623. /* Add sanity for pool_id & index */
  624. return &(soc->rx_desc_status[pool_id].array[index].rx_desc);
  625. }
  626. #endif /* RX_DESC_MULTI_PAGE_ALLOC */
  627. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  628. static inline bool dp_rx_check_ap_bridge(struct dp_vdev *vdev)
  629. {
  630. return vdev->ap_bridge_enabled;
  631. }
  632. #ifdef DP_RX_DESC_COOKIE_INVALIDATE
  633. static inline QDF_STATUS
  634. dp_rx_cookie_check_and_invalidate(hal_ring_desc_t ring_desc)
  635. {
  636. if (qdf_unlikely(HAL_RX_REO_BUF_COOKIE_INVALID_GET(ring_desc)))
  637. return QDF_STATUS_E_FAILURE;
  638. HAL_RX_REO_BUF_COOKIE_INVALID_SET(ring_desc);
  639. return QDF_STATUS_SUCCESS;
  640. }
  641. /**
  642. * dp_rx_cookie_reset_invalid_bit() - Reset the invalid bit of the cookie
  643. * field in ring descriptor
  644. * @ring_desc: ring descriptor
  645. *
  646. * Return: None
  647. */
  648. static inline void
  649. dp_rx_cookie_reset_invalid_bit(hal_ring_desc_t ring_desc)
  650. {
  651. HAL_RX_REO_BUF_COOKIE_INVALID_RESET(ring_desc);
  652. }
  653. #else
  654. static inline QDF_STATUS
  655. dp_rx_cookie_check_and_invalidate(hal_ring_desc_t ring_desc)
  656. {
  657. return QDF_STATUS_SUCCESS;
  658. }
  659. static inline void
  660. dp_rx_cookie_reset_invalid_bit(hal_ring_desc_t ring_desc)
  661. {
  662. }
  663. #endif
  664. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  665. #if defined(RX_DESC_MULTI_PAGE_ALLOC) && \
  666. defined(DP_WAR_VALIDATE_RX_ERR_MSDU_COOKIE)
  667. /**
  668. * dp_rx_is_sw_cookie_valid() - check whether SW cookie valid
  669. * @soc: dp soc ref
  670. * @cookie: Rx buf SW cookie value
  671. *
  672. * Return: true if cookie is valid else false
  673. */
  674. static inline bool dp_rx_is_sw_cookie_valid(struct dp_soc *soc,
  675. uint32_t cookie)
  676. {
  677. uint8_t pool_id = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_POOL_ID(cookie);
  678. uint16_t page_id = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_PAGE_ID(cookie);
  679. uint8_t offset = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_OFFSET(cookie);
  680. struct rx_desc_pool *rx_desc_pool;
  681. if (qdf_unlikely(pool_id >= MAX_PDEV_CNT))
  682. goto fail;
  683. rx_desc_pool = &soc->rx_desc_buf[pool_id];
  684. if (page_id >= rx_desc_pool->desc_pages.num_pages ||
  685. offset >= rx_desc_pool->desc_pages.num_element_per_page)
  686. goto fail;
  687. return true;
  688. fail:
  689. DP_STATS_INC(soc, rx.err.invalid_cookie, 1);
  690. return false;
  691. }
  692. #else
  693. /**
  694. * dp_rx_is_sw_cookie_valid() - check whether SW cookie valid
  695. * @soc: dp soc ref
  696. * @cookie: Rx buf SW cookie value
  697. *
  698. * When multi page alloc is disabled SW cookie validness is
  699. * checked while fetching Rx descriptor, so no need to check here
  700. * Return: true if cookie is valid else false
  701. */
  702. static inline bool dp_rx_is_sw_cookie_valid(struct dp_soc *soc,
  703. uint32_t cookie)
  704. {
  705. return true;
  706. }
  707. #endif
  708. QDF_STATUS dp_rx_desc_pool_is_allocated(struct rx_desc_pool *rx_desc_pool);
  709. QDF_STATUS dp_rx_desc_pool_alloc(struct dp_soc *soc,
  710. uint32_t pool_size,
  711. struct rx_desc_pool *rx_desc_pool);
  712. void dp_rx_desc_pool_init(struct dp_soc *soc, uint32_t pool_id,
  713. uint32_t pool_size,
  714. struct rx_desc_pool *rx_desc_pool);
  715. void dp_rx_add_desc_list_to_free_list(struct dp_soc *soc,
  716. union dp_rx_desc_list_elem_t **local_desc_list,
  717. union dp_rx_desc_list_elem_t **tail,
  718. uint16_t pool_id,
  719. struct rx_desc_pool *rx_desc_pool);
  720. uint16_t dp_rx_get_free_desc_list(struct dp_soc *soc, uint32_t pool_id,
  721. struct rx_desc_pool *rx_desc_pool,
  722. uint16_t num_descs,
  723. union dp_rx_desc_list_elem_t **desc_list,
  724. union dp_rx_desc_list_elem_t **tail);
  725. QDF_STATUS dp_rx_pdev_desc_pool_alloc(struct dp_pdev *pdev);
  726. void dp_rx_pdev_desc_pool_free(struct dp_pdev *pdev);
  727. QDF_STATUS dp_rx_pdev_desc_pool_init(struct dp_pdev *pdev);
  728. void dp_rx_pdev_desc_pool_deinit(struct dp_pdev *pdev);
  729. void dp_rx_desc_pool_deinit(struct dp_soc *soc,
  730. struct rx_desc_pool *rx_desc_pool,
  731. uint32_t pool_id);
  732. QDF_STATUS dp_rx_pdev_attach(struct dp_pdev *pdev);
  733. QDF_STATUS dp_rx_pdev_buffers_alloc(struct dp_pdev *pdev);
  734. void dp_rx_pdev_buffers_free(struct dp_pdev *pdev);
  735. void dp_rx_pdev_detach(struct dp_pdev *pdev);
  736. void dp_print_napi_stats(struct dp_soc *soc);
  737. /**
  738. * dp_rx_vdev_detach() - detach vdev from dp rx
  739. * @vdev: virtual device instance
  740. *
  741. * Return: QDF_STATUS_SUCCESS: success
  742. * QDF_STATUS_E_RESOURCES: Error return
  743. */
  744. QDF_STATUS dp_rx_vdev_detach(struct dp_vdev *vdev);
  745. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  746. uint32_t
  747. dp_rx_process(struct dp_intr *int_ctx, hal_ring_handle_t hal_ring_hdl,
  748. uint8_t reo_ring_num,
  749. uint32_t quota);
  750. /**
  751. * dp_rx_err_process() - Processes error frames routed to REO error ring
  752. * @int_ctx: pointer to DP interrupt context
  753. * @soc: core txrx main context
  754. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  755. * @quota: No. of units (packets) that can be serviced in one shot.
  756. *
  757. * This function implements error processing and top level demultiplexer
  758. * for all the frames routed to REO error ring.
  759. *
  760. * Return: uint32_t: No. of elements processed
  761. */
  762. uint32_t dp_rx_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  763. hal_ring_handle_t hal_ring_hdl, uint32_t quota);
  764. /**
  765. * dp_rx_wbm_err_process() - Processes error frames routed to WBM release ring
  766. * @int_ctx: pointer to DP interrupt context
  767. * @soc: core txrx main context
  768. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  769. * @quota: No. of units (packets) that can be serviced in one shot.
  770. *
  771. * This function implements error processing and top level demultiplexer
  772. * for all the frames routed to WBM2HOST sw release ring.
  773. *
  774. * Return: uint32_t: No. of elements processed
  775. */
  776. uint32_t
  777. dp_rx_wbm_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  778. hal_ring_handle_t hal_ring_hdl, uint32_t quota);
  779. /**
  780. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  781. * multiple nbufs.
  782. * @soc: core txrx main context
  783. * @nbuf: pointer to the first msdu of an amsdu.
  784. *
  785. * This function implements the creation of RX frag_list for cases
  786. * where an MSDU is spread across multiple nbufs.
  787. *
  788. * Return: returns the head nbuf which contains complete frag_list.
  789. */
  790. qdf_nbuf_t dp_rx_sg_create(struct dp_soc *soc, qdf_nbuf_t nbuf);
  791. /*
  792. * dp_rx_desc_nbuf_and_pool_free() - free the sw rx desc pool called during
  793. * de-initialization of wifi module.
  794. *
  795. * @soc: core txrx main context
  796. * @pool_id: pool_id which is one of 3 mac_ids
  797. * @rx_desc_pool: rx descriptor pool pointer
  798. *
  799. * Return: None
  800. */
  801. void dp_rx_desc_nbuf_and_pool_free(struct dp_soc *soc, uint32_t pool_id,
  802. struct rx_desc_pool *rx_desc_pool);
  803. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  804. /*
  805. * dp_rx_desc_nbuf_free() - free the sw rx desc nbufs called during
  806. * de-initialization of wifi module.
  807. *
  808. * @soc: core txrx main context
  809. * @pool_id: pool_id which is one of 3 mac_ids
  810. * @rx_desc_pool: rx descriptor pool pointer
  811. *
  812. * Return: None
  813. */
  814. void dp_rx_desc_nbuf_free(struct dp_soc *soc,
  815. struct rx_desc_pool *rx_desc_pool);
  816. #ifdef DP_RX_MON_MEM_FRAG
  817. /*
  818. * dp_rx_desc_frag_free() - free the sw rx desc frag called during
  819. * de-initialization of wifi module.
  820. *
  821. * @soc: core txrx main context
  822. * @rx_desc_pool: rx descriptor pool pointer
  823. *
  824. * Return: None
  825. */
  826. void dp_rx_desc_frag_free(struct dp_soc *soc,
  827. struct rx_desc_pool *rx_desc_pool);
  828. #else
  829. static inline
  830. void dp_rx_desc_frag_free(struct dp_soc *soc,
  831. struct rx_desc_pool *rx_desc_pool)
  832. {
  833. }
  834. #endif
  835. /*
  836. * dp_rx_desc_pool_free() - free the sw rx desc array called during
  837. * de-initialization of wifi module.
  838. *
  839. * @soc: core txrx main context
  840. * @rx_desc_pool: rx descriptor pool pointer
  841. *
  842. * Return: None
  843. */
  844. void dp_rx_desc_pool_free(struct dp_soc *soc,
  845. struct rx_desc_pool *rx_desc_pool);
  846. void dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  847. struct dp_txrx_peer *peer);
  848. #ifdef RX_DESC_LOGGING
  849. /*
  850. * dp_rx_desc_alloc_dbg_info() - Alloc memory for rx descriptor debug
  851. * structure
  852. * @rx_desc: rx descriptor pointer
  853. *
  854. * Return: None
  855. */
  856. static inline
  857. void dp_rx_desc_alloc_dbg_info(struct dp_rx_desc *rx_desc)
  858. {
  859. rx_desc->dbg_info = qdf_mem_malloc(sizeof(struct dp_rx_desc_dbg_info));
  860. }
  861. /*
  862. * dp_rx_desc_free_dbg_info() - Free rx descriptor debug
  863. * structure memory
  864. * @rx_desc: rx descriptor pointer
  865. *
  866. * Return: None
  867. */
  868. static inline
  869. void dp_rx_desc_free_dbg_info(struct dp_rx_desc *rx_desc)
  870. {
  871. qdf_mem_free(rx_desc->dbg_info);
  872. }
  873. /*
  874. * dp_rx_desc_update_dbg_info() - Update rx descriptor debug info
  875. * structure memory
  876. * @rx_desc: rx descriptor pointer
  877. *
  878. * Return: None
  879. */
  880. static
  881. void dp_rx_desc_update_dbg_info(struct dp_rx_desc *rx_desc,
  882. const char *func_name, uint8_t flag)
  883. {
  884. struct dp_rx_desc_dbg_info *info = rx_desc->dbg_info;
  885. if (!info)
  886. return;
  887. if (flag == RX_DESC_REPLENISHED) {
  888. qdf_str_lcopy(info->replenish_caller, func_name,
  889. QDF_MEM_FUNC_NAME_SIZE);
  890. info->replenish_ts = qdf_get_log_timestamp();
  891. } else {
  892. qdf_str_lcopy(info->freelist_caller, func_name,
  893. QDF_MEM_FUNC_NAME_SIZE);
  894. info->freelist_ts = qdf_get_log_timestamp();
  895. info->prev_nbuf = rx_desc->nbuf;
  896. info->prev_nbuf_data_addr = rx_desc->nbuf_data_addr;
  897. rx_desc->nbuf_data_addr = NULL;
  898. }
  899. }
  900. #else
  901. static inline
  902. void dp_rx_desc_alloc_dbg_info(struct dp_rx_desc *rx_desc)
  903. {
  904. }
  905. static inline
  906. void dp_rx_desc_free_dbg_info(struct dp_rx_desc *rx_desc)
  907. {
  908. }
  909. static inline
  910. void dp_rx_desc_update_dbg_info(struct dp_rx_desc *rx_desc,
  911. const char *func_name, uint8_t flag)
  912. {
  913. }
  914. #endif /* RX_DESC_LOGGING */
  915. /**
  916. * dp_rx_add_to_free_desc_list() - Adds to a local free descriptor list
  917. *
  918. * @head: pointer to the head of local free list
  919. * @tail: pointer to the tail of local free list
  920. * @new: new descriptor that is added to the free list
  921. * @func_name: caller func name
  922. *
  923. * Return: void:
  924. */
  925. static inline
  926. void __dp_rx_add_to_free_desc_list(union dp_rx_desc_list_elem_t **head,
  927. union dp_rx_desc_list_elem_t **tail,
  928. struct dp_rx_desc *new, const char *func_name)
  929. {
  930. qdf_assert(head && new);
  931. dp_rx_desc_update_dbg_info(new, func_name, RX_DESC_IN_FREELIST);
  932. new->nbuf = NULL;
  933. new->in_use = 0;
  934. ((union dp_rx_desc_list_elem_t *)new)->next = *head;
  935. *head = (union dp_rx_desc_list_elem_t *)new;
  936. /* reset tail if head->next is NULL */
  937. if (!*tail || !(*head)->next)
  938. *tail = *head;
  939. }
  940. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t nbuf,
  941. uint8_t mac_id);
  942. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  943. qdf_nbuf_t mpdu, bool mpdu_done, uint8_t mac_id);
  944. void dp_rx_process_mic_error(struct dp_soc *soc, qdf_nbuf_t nbuf,
  945. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *peer);
  946. void dp_2k_jump_handle(struct dp_soc *soc, qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr,
  947. uint16_t peer_id, uint8_t tid);
  948. #define DP_RX_HEAD_APPEND(head, elem) \
  949. do { \
  950. qdf_nbuf_set_next((elem), (head)); \
  951. (head) = (elem); \
  952. } while (0)
  953. #define DP_RX_LIST_APPEND(head, tail, elem) \
  954. do { \
  955. if (!(head)) { \
  956. (head) = (elem); \
  957. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(head) = 1;\
  958. } else { \
  959. qdf_nbuf_set_next((tail), (elem)); \
  960. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(head)++; \
  961. } \
  962. (tail) = (elem); \
  963. qdf_nbuf_set_next((tail), NULL); \
  964. } while (0)
  965. #define DP_RX_MERGE_TWO_LIST(phead, ptail, chead, ctail) \
  966. do { \
  967. if (!(phead)) { \
  968. (phead) = (chead); \
  969. } else { \
  970. qdf_nbuf_set_next((ptail), (chead)); \
  971. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(phead) += \
  972. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(chead); \
  973. } \
  974. (ptail) = (ctail); \
  975. qdf_nbuf_set_next((ptail), NULL); \
  976. } while (0)
  977. #if defined(QCA_PADDR_CHECK_ON_3TH_PLATFORM)
  978. /*
  979. * on some third-party platform, the memory below 0x2000
  980. * is reserved for target use, so any memory allocated in this
  981. * region should not be used by host
  982. */
  983. #define MAX_RETRY 50
  984. #define DP_PHY_ADDR_RESERVED 0x2000
  985. #elif defined(BUILD_X86)
  986. /*
  987. * in M2M emulation platforms (x86) the memory below 0x50000000
  988. * is reserved for target use, so any memory allocated in this
  989. * region should not be used by host
  990. */
  991. #define MAX_RETRY 100
  992. #define DP_PHY_ADDR_RESERVED 0x50000000
  993. #endif
  994. #if defined(QCA_PADDR_CHECK_ON_3TH_PLATFORM) || defined(BUILD_X86)
  995. /**
  996. * dp_check_paddr() - check if current phy address is valid or not
  997. * @dp_soc: core txrx main context
  998. * @rx_netbuf: skb buffer
  999. * @paddr: physical address
  1000. * @rx_desc_pool: struct of rx descriptor pool
  1001. * check if the physical address of the nbuf->data is less
  1002. * than DP_PHY_ADDR_RESERVED then free the nbuf and try
  1003. * allocating new nbuf. We can try for 100 times.
  1004. *
  1005. * This is a temp WAR till we fix it properly.
  1006. *
  1007. * Return: success or failure.
  1008. */
  1009. static inline
  1010. int dp_check_paddr(struct dp_soc *dp_soc,
  1011. qdf_nbuf_t *rx_netbuf,
  1012. qdf_dma_addr_t *paddr,
  1013. struct rx_desc_pool *rx_desc_pool)
  1014. {
  1015. uint32_t nbuf_retry = 0;
  1016. int32_t ret;
  1017. if (qdf_likely(*paddr > DP_PHY_ADDR_RESERVED))
  1018. return QDF_STATUS_SUCCESS;
  1019. do {
  1020. dp_debug("invalid phy addr 0x%llx, trying again",
  1021. (uint64_t)(*paddr));
  1022. nbuf_retry++;
  1023. if ((*rx_netbuf)) {
  1024. /* Not freeing buffer intentionally.
  1025. * Observed that same buffer is getting
  1026. * re-allocated resulting in longer load time
  1027. * WMI init timeout.
  1028. * This buffer is anyway not useful so skip it.
  1029. *.Add such buffer to invalid list and free
  1030. *.them when driver unload.
  1031. **/
  1032. qdf_nbuf_unmap_nbytes_single(dp_soc->osdev,
  1033. *rx_netbuf,
  1034. QDF_DMA_FROM_DEVICE,
  1035. rx_desc_pool->buf_size);
  1036. qdf_nbuf_queue_add(&dp_soc->invalid_buf_queue,
  1037. *rx_netbuf);
  1038. }
  1039. *rx_netbuf = qdf_nbuf_alloc(dp_soc->osdev,
  1040. rx_desc_pool->buf_size,
  1041. RX_BUFFER_RESERVATION,
  1042. rx_desc_pool->buf_alignment,
  1043. FALSE);
  1044. if (qdf_unlikely(!(*rx_netbuf)))
  1045. return QDF_STATUS_E_FAILURE;
  1046. ret = qdf_nbuf_map_nbytes_single(dp_soc->osdev,
  1047. *rx_netbuf,
  1048. QDF_DMA_FROM_DEVICE,
  1049. rx_desc_pool->buf_size);
  1050. if (qdf_unlikely(ret == QDF_STATUS_E_FAILURE)) {
  1051. qdf_nbuf_free(*rx_netbuf);
  1052. *rx_netbuf = NULL;
  1053. continue;
  1054. }
  1055. *paddr = qdf_nbuf_get_frag_paddr(*rx_netbuf, 0);
  1056. if (qdf_likely(*paddr > DP_PHY_ADDR_RESERVED))
  1057. return QDF_STATUS_SUCCESS;
  1058. } while (nbuf_retry < MAX_RETRY);
  1059. if ((*rx_netbuf)) {
  1060. qdf_nbuf_unmap_nbytes_single(dp_soc->osdev,
  1061. *rx_netbuf,
  1062. QDF_DMA_FROM_DEVICE,
  1063. rx_desc_pool->buf_size);
  1064. qdf_nbuf_queue_add(&dp_soc->invalid_buf_queue,
  1065. *rx_netbuf);
  1066. }
  1067. return QDF_STATUS_E_FAILURE;
  1068. }
  1069. #else
  1070. static inline
  1071. int dp_check_paddr(struct dp_soc *dp_soc,
  1072. qdf_nbuf_t *rx_netbuf,
  1073. qdf_dma_addr_t *paddr,
  1074. struct rx_desc_pool *rx_desc_pool)
  1075. {
  1076. return QDF_STATUS_SUCCESS;
  1077. }
  1078. #endif
  1079. /**
  1080. * dp_rx_cookie_2_link_desc_va() - Converts cookie to a virtual address of
  1081. * the MSDU Link Descriptor
  1082. * @soc: core txrx main context
  1083. * @buf_info: buf_info includes cookie that is used to lookup
  1084. * virtual address of link descriptor after deriving the page id
  1085. * and the offset or index of the desc on the associatde page.
  1086. *
  1087. * This is the VA of the link descriptor, that HAL layer later uses to
  1088. * retrieve the list of MSDU's for a given MPDU.
  1089. *
  1090. * Return: void *: Virtual Address of the Rx descriptor
  1091. */
  1092. static inline
  1093. void *dp_rx_cookie_2_link_desc_va(struct dp_soc *soc,
  1094. struct hal_buf_info *buf_info)
  1095. {
  1096. void *link_desc_va;
  1097. struct qdf_mem_multi_page_t *pages;
  1098. uint16_t page_id = LINK_DESC_COOKIE_PAGE_ID(buf_info->sw_cookie);
  1099. pages = &soc->link_desc_pages;
  1100. if (!pages)
  1101. return NULL;
  1102. if (qdf_unlikely(page_id >= pages->num_pages))
  1103. return NULL;
  1104. link_desc_va = pages->dma_pages[page_id].page_v_addr_start +
  1105. (buf_info->paddr - pages->dma_pages[page_id].page_p_addr);
  1106. return link_desc_va;
  1107. }
  1108. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1109. #ifdef DISABLE_EAPOL_INTRABSS_FWD
  1110. #ifdef WLAN_FEATURE_11BE_MLO
  1111. static inline bool dp_nbuf_dst_addr_is_mld_addr(struct dp_vdev *vdev,
  1112. qdf_nbuf_t nbuf)
  1113. {
  1114. struct qdf_mac_addr *self_mld_mac_addr =
  1115. (struct qdf_mac_addr *)vdev->mld_mac_addr.raw;
  1116. return qdf_is_macaddr_equal(self_mld_mac_addr,
  1117. (struct qdf_mac_addr *)qdf_nbuf_data(nbuf) +
  1118. QDF_NBUF_DEST_MAC_OFFSET);
  1119. }
  1120. #else
  1121. static inline bool dp_nbuf_dst_addr_is_mld_addr(struct dp_vdev *vdev,
  1122. qdf_nbuf_t nbuf)
  1123. {
  1124. return false;
  1125. }
  1126. #endif
  1127. static inline bool dp_nbuf_dst_addr_is_self_addr(struct dp_vdev *vdev,
  1128. qdf_nbuf_t nbuf)
  1129. {
  1130. return qdf_is_macaddr_equal((struct qdf_mac_addr *)vdev->mac_addr.raw,
  1131. (struct qdf_mac_addr *)qdf_nbuf_data(nbuf) +
  1132. QDF_NBUF_DEST_MAC_OFFSET);
  1133. }
  1134. /*
  1135. * dp_rx_intrabss_eapol_drop_check() - API For EAPOL
  1136. * pkt with DA not equal to vdev mac addr, fwd is not allowed.
  1137. * @soc: core txrx main context
  1138. * @ta_txrx_peer: source peer entry
  1139. * @rx_tlv_hdr: start address of rx tlvs
  1140. * @nbuf: nbuf that has to be intrabss forwarded
  1141. *
  1142. * Return: true if it is forwarded else false
  1143. */
  1144. static inline
  1145. bool dp_rx_intrabss_eapol_drop_check(struct dp_soc *soc,
  1146. struct dp_txrx_peer *ta_txrx_peer,
  1147. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf)
  1148. {
  1149. if (qdf_unlikely(qdf_nbuf_is_ipv4_eapol_pkt(nbuf) &&
  1150. !(dp_nbuf_dst_addr_is_self_addr(ta_txrx_peer->vdev,
  1151. nbuf) ||
  1152. dp_nbuf_dst_addr_is_mld_addr(ta_txrx_peer->vdev,
  1153. nbuf)))) {
  1154. qdf_nbuf_free(nbuf);
  1155. DP_STATS_INC(soc, rx.err.intrabss_eapol_drop, 1);
  1156. return true;
  1157. }
  1158. return false;
  1159. }
  1160. #else /* DISABLE_EAPOL_INTRABSS_FWD */
  1161. static inline
  1162. bool dp_rx_intrabss_eapol_drop_check(struct dp_soc *soc,
  1163. struct dp_txrx_peer *ta_txrx_peer,
  1164. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf)
  1165. {
  1166. return false;
  1167. }
  1168. #endif /* DISABLE_EAPOL_INTRABSS_FWD */
  1169. bool dp_rx_intrabss_mcbc_fwd(struct dp_soc *soc,
  1170. struct dp_txrx_peer *ta_txrx_peer,
  1171. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  1172. struct cdp_tid_rx_stats *tid_stats);
  1173. bool dp_rx_intrabss_ucast_fwd(struct dp_soc *soc,
  1174. struct dp_txrx_peer *ta_txrx_peer,
  1175. uint8_t tx_vdev_id,
  1176. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  1177. struct cdp_tid_rx_stats *tid_stats);
  1178. /**
  1179. * dp_rx_defrag_concat() - Concatenate the fragments
  1180. *
  1181. * @dst: destination pointer to the buffer
  1182. * @src: source pointer from where the fragment payload is to be copied
  1183. *
  1184. * Return: QDF_STATUS
  1185. */
  1186. static inline QDF_STATUS dp_rx_defrag_concat(qdf_nbuf_t dst, qdf_nbuf_t src)
  1187. {
  1188. /*
  1189. * Inside qdf_nbuf_cat, if it is necessary to reallocate dst
  1190. * to provide space for src, the headroom portion is copied from
  1191. * the original dst buffer to the larger new dst buffer.
  1192. * (This is needed, because the headroom of the dst buffer
  1193. * contains the rx desc.)
  1194. */
  1195. if (!qdf_nbuf_cat(dst, src)) {
  1196. /*
  1197. * qdf_nbuf_cat does not free the src memory.
  1198. * Free src nbuf before returning
  1199. * For failure case the caller takes of freeing the nbuf
  1200. */
  1201. qdf_nbuf_free(src);
  1202. return QDF_STATUS_SUCCESS;
  1203. }
  1204. return QDF_STATUS_E_DEFRAG_ERROR;
  1205. }
  1206. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1207. #ifndef FEATURE_WDS
  1208. void dp_rx_da_learn(struct dp_soc *soc, uint8_t *rx_tlv_hdr,
  1209. struct dp_txrx_peer *ta_txrx_peer, qdf_nbuf_t nbuf);
  1210. static inline QDF_STATUS dp_rx_ast_set_active(struct dp_soc *soc, uint16_t sa_idx, bool is_active)
  1211. {
  1212. return QDF_STATUS_SUCCESS;
  1213. }
  1214. static inline void
  1215. dp_rx_wds_srcport_learn(struct dp_soc *soc,
  1216. uint8_t *rx_tlv_hdr,
  1217. struct dp_txrx_peer *txrx_peer,
  1218. qdf_nbuf_t nbuf,
  1219. struct hal_rx_msdu_metadata msdu_metadata)
  1220. {
  1221. }
  1222. static inline void
  1223. dp_rx_ipa_wds_srcport_learn(struct dp_soc *soc,
  1224. struct dp_peer *ta_peer, qdf_nbuf_t nbuf,
  1225. struct hal_rx_msdu_metadata msdu_end_info,
  1226. bool ad4_valid, bool chfrag_start)
  1227. {
  1228. }
  1229. #endif
  1230. /*
  1231. * dp_rx_desc_dump() - dump the sw rx descriptor
  1232. *
  1233. * @rx_desc: sw rx descriptor
  1234. */
  1235. static inline void dp_rx_desc_dump(struct dp_rx_desc *rx_desc)
  1236. {
  1237. dp_info("rx_desc->nbuf: %pK, rx_desc->cookie: %d, rx_desc->pool_id: %d, rx_desc->in_use: %d, rx_desc->unmapped: %d",
  1238. rx_desc->nbuf, rx_desc->cookie, rx_desc->pool_id,
  1239. rx_desc->in_use, rx_desc->unmapped);
  1240. }
  1241. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1242. /*
  1243. * check_qwrap_multicast_loopback() - Check if rx packet is a loopback packet.
  1244. * In qwrap mode, packets originated from
  1245. * any vdev should not loopback and
  1246. * should be dropped.
  1247. * @vdev: vdev on which rx packet is received
  1248. * @nbuf: rx pkt
  1249. *
  1250. */
  1251. #if ATH_SUPPORT_WRAP
  1252. static inline bool check_qwrap_multicast_loopback(struct dp_vdev *vdev,
  1253. qdf_nbuf_t nbuf)
  1254. {
  1255. struct dp_vdev *psta_vdev;
  1256. struct dp_pdev *pdev = vdev->pdev;
  1257. uint8_t *data = qdf_nbuf_data(nbuf);
  1258. if (qdf_unlikely(vdev->proxysta_vdev)) {
  1259. /* In qwrap isolation mode, allow loopback packets as all
  1260. * packets go to RootAP and Loopback on the mpsta.
  1261. */
  1262. if (vdev->isolation_vdev)
  1263. return false;
  1264. TAILQ_FOREACH(psta_vdev, &pdev->vdev_list, vdev_list_elem) {
  1265. if (qdf_unlikely(psta_vdev->proxysta_vdev &&
  1266. !qdf_mem_cmp(psta_vdev->mac_addr.raw,
  1267. &data[QDF_MAC_ADDR_SIZE],
  1268. QDF_MAC_ADDR_SIZE))) {
  1269. /* Drop packet if source address is equal to
  1270. * any of the vdev addresses.
  1271. */
  1272. return true;
  1273. }
  1274. }
  1275. }
  1276. return false;
  1277. }
  1278. #else
  1279. static inline bool check_qwrap_multicast_loopback(struct dp_vdev *vdev,
  1280. qdf_nbuf_t nbuf)
  1281. {
  1282. return false;
  1283. }
  1284. #endif
  1285. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1286. #if defined(WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG) ||\
  1287. defined(WLAN_SUPPORT_RX_TAG_STATISTICS) ||\
  1288. defined(WLAN_SUPPORT_RX_FLOW_TAG)
  1289. #include "dp_rx_tag.h"
  1290. #endif
  1291. #if !defined(WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG) &&\
  1292. !defined(WLAN_SUPPORT_RX_FLOW_TAG)
  1293. /**
  1294. * dp_rx_update_protocol_tag() - Reads CCE metadata from the RX MSDU end TLV
  1295. * and set the corresponding tag in QDF packet
  1296. * @soc: core txrx main context
  1297. * @vdev: vdev on which the packet is received
  1298. * @nbuf: QDF pkt buffer on which the protocol tag should be set
  1299. * @rx_tlv_hdr: rBbase address where the RX TLVs starts
  1300. * @ring_index: REO ring number, not used for error & monitor ring
  1301. * @is_reo_exception: flag to indicate if rx from REO ring or exception ring
  1302. * @is_update_stats: flag to indicate whether to update stats or not
  1303. * Return: void
  1304. */
  1305. static inline void
  1306. dp_rx_update_protocol_tag(struct dp_soc *soc, struct dp_vdev *vdev,
  1307. qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr,
  1308. uint16_t ring_index,
  1309. bool is_reo_exception, bool is_update_stats)
  1310. {
  1311. }
  1312. #endif
  1313. #ifndef WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG
  1314. /**
  1315. * dp_rx_err_cce_drop() - Reads CCE metadata from the RX MSDU end TLV
  1316. * and returns whether cce metadata matches
  1317. * @soc: core txrx main context
  1318. * @vdev: vdev on which the packet is received
  1319. * @nbuf: QDF pkt buffer on which the protocol tag should be set
  1320. * @rx_tlv_hdr: rBbase address where the RX TLVs starts
  1321. * Return: bool
  1322. */
  1323. static inline bool
  1324. dp_rx_err_cce_drop(struct dp_soc *soc, struct dp_vdev *vdev,
  1325. qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr)
  1326. {
  1327. return false;
  1328. }
  1329. #endif /* WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG */
  1330. #ifndef WLAN_SUPPORT_RX_FLOW_TAG
  1331. /**
  1332. * dp_rx_update_flow_tag() - Reads FSE metadata from the RX MSDU end TLV
  1333. * and set the corresponding tag in QDF packet
  1334. * @soc: core txrx main context
  1335. * @vdev: vdev on which the packet is received
  1336. * @nbuf: QDF pkt buffer on which the protocol tag should be set
  1337. * @rx_tlv_hdr: base address where the RX TLVs starts
  1338. * @is_update_stats: flag to indicate whether to update stats or not
  1339. *
  1340. * Return: void
  1341. */
  1342. static inline void
  1343. dp_rx_update_flow_tag(struct dp_soc *soc, struct dp_vdev *vdev,
  1344. qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr, bool update_stats)
  1345. {
  1346. }
  1347. #endif /* WLAN_SUPPORT_RX_FLOW_TAG */
  1348. #define CRITICAL_BUFFER_THRESHOLD 64
  1349. /*
  1350. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  1351. * called during dp rx initialization
  1352. * and at the end of dp_rx_process.
  1353. *
  1354. * @soc: core txrx main context
  1355. * @mac_id: mac_id which is one of 3 mac_ids
  1356. * @dp_rxdma_srng: dp rxdma circular ring
  1357. * @rx_desc_pool: Pointer to free Rx descriptor pool
  1358. * @num_req_buffers: number of buffer to be replenished
  1359. * @desc_list: list of descs if called from dp_rx_process
  1360. * or NULL during dp rx initialization or out of buffer
  1361. * interrupt.
  1362. * @tail: tail of descs list
  1363. * @func_name: name of the caller function
  1364. * Return: return success or failure
  1365. */
  1366. QDF_STATUS __dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  1367. struct dp_srng *dp_rxdma_srng,
  1368. struct rx_desc_pool *rx_desc_pool,
  1369. uint32_t num_req_buffers,
  1370. union dp_rx_desc_list_elem_t **desc_list,
  1371. union dp_rx_desc_list_elem_t **tail,
  1372. const char *func_name);
  1373. /*
  1374. * __dp_rx_buffers_no_map_replenish() - replenish rxdma ring with rx nbufs
  1375. * use direct APIs to get invalidate
  1376. * and get the physical address of the
  1377. * nbuf instead of map api,called during
  1378. * dp rx initialization and at the end
  1379. * of dp_rx_process.
  1380. *
  1381. * @soc: core txrx main context
  1382. * @mac_id: mac_id which is one of 3 mac_ids
  1383. * @dp_rxdma_srng: dp rxdma circular ring
  1384. * @rx_desc_pool: Pointer to free Rx descriptor pool
  1385. * @num_req_buffers: number of buffer to be replenished
  1386. * @desc_list: list of descs if called from dp_rx_process
  1387. * or NULL during dp rx initialization or out of buffer
  1388. * interrupt.
  1389. * @tail: tail of descs list
  1390. * Return: return success or failure
  1391. */
  1392. QDF_STATUS
  1393. __dp_rx_buffers_no_map_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  1394. struct dp_srng *dp_rxdma_srng,
  1395. struct rx_desc_pool *rx_desc_pool,
  1396. uint32_t num_req_buffers,
  1397. union dp_rx_desc_list_elem_t **desc_list,
  1398. union dp_rx_desc_list_elem_t **tail);
  1399. /*
  1400. * __dp_rx_buffers_no_map__lt_replenish() - replenish rxdma ring with rx nbufs
  1401. * use direct APIs to get invalidate
  1402. * and get the physical address of the
  1403. * nbuf instead of map api,called when
  1404. * low threshold interrupt is triggered
  1405. *
  1406. * @soc: core txrx main context
  1407. * @mac_id: mac_id which is one of 3 mac_ids
  1408. * @dp_rxdma_srng: dp rxdma circular ring
  1409. * @rx_desc_pool: Pointer to free Rx descriptor pool
  1410. * Return: return success or failure
  1411. */
  1412. QDF_STATUS
  1413. __dp_rx_buffers_no_map_lt_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  1414. struct dp_srng *dp_rxdma_srng,
  1415. struct rx_desc_pool *rx_desc_pool);
  1416. /*
  1417. * __dp_pdev_rx_buffers_no_map_attach() - replenish rxdma ring with rx nbufs
  1418. * use direct APIs to get invalidate
  1419. * and get the physical address of the
  1420. * nbuf instead of map api,called during
  1421. * dp rx initialization.
  1422. *
  1423. * @soc: core txrx main context
  1424. * @mac_id: mac_id which is one of 3 mac_ids
  1425. * @dp_rxdma_srng: dp rxdma circular ring
  1426. * @rx_desc_pool: Pointer to free Rx descriptor pool
  1427. * @num_req_buffers: number of buffer to be replenished
  1428. * Return: return success or failure
  1429. */
  1430. QDF_STATUS __dp_pdev_rx_buffers_no_map_attach(struct dp_soc *dp_soc,
  1431. uint32_t mac_id,
  1432. struct dp_srng *dp_rxdma_srng,
  1433. struct rx_desc_pool *rx_desc_pool,
  1434. uint32_t num_req_buffers);
  1435. /*
  1436. * dp_pdev_rx_buffers_attach() - replenish rxdma ring with rx nbufs
  1437. * called during dp rx initialization
  1438. *
  1439. * @soc: core txrx main context
  1440. * @mac_id: mac_id which is one of 3 mac_ids
  1441. * @dp_rxdma_srng: dp rxdma circular ring
  1442. * @rx_desc_pool: Pointer to free Rx descriptor pool
  1443. * @num_req_buffers: number of buffer to be replenished
  1444. *
  1445. * Return: return success or failure
  1446. */
  1447. QDF_STATUS
  1448. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  1449. struct dp_srng *dp_rxdma_srng,
  1450. struct rx_desc_pool *rx_desc_pool,
  1451. uint32_t num_req_buffers);
  1452. /**
  1453. * dp_rx_link_desc_return() - Return a MPDU link descriptor to HW
  1454. * (WBM), following error handling
  1455. *
  1456. * @soc: core DP main context
  1457. * @buf_addr_info: opaque pointer to the REO error ring descriptor
  1458. * @buf_addr_info: void pointer to the buffer_addr_info
  1459. * @bm_action: put to idle_list or release to msdu_list
  1460. *
  1461. * Return: QDF_STATUS_E_FAILURE for failure else QDF_STATUS_SUCCESS
  1462. */
  1463. QDF_STATUS
  1464. dp_rx_link_desc_return(struct dp_soc *soc, hal_ring_desc_t ring_desc,
  1465. uint8_t bm_action);
  1466. /**
  1467. * dp_rx_link_desc_return_by_addr - Return a MPDU link descriptor to
  1468. * (WBM) by address
  1469. *
  1470. * @soc: core DP main context
  1471. * @link_desc_addr: link descriptor addr
  1472. *
  1473. * Return: QDF_STATUS_E_FAILURE for failure else QDF_STATUS_SUCCESS
  1474. */
  1475. QDF_STATUS
  1476. dp_rx_link_desc_return_by_addr(struct dp_soc *soc,
  1477. hal_buff_addrinfo_t link_desc_addr,
  1478. uint8_t bm_action);
  1479. /**
  1480. * dp_rxdma_err_process() - RxDMA error processing functionality
  1481. * @soc: core txrx main contex
  1482. * @mac_id: mac id which is one of 3 mac_ids
  1483. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1484. * @quota: No. of units (packets) that can be serviced in one shot.
  1485. *
  1486. * Return: num of buffers processed
  1487. */
  1488. uint32_t
  1489. dp_rxdma_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  1490. uint32_t mac_id, uint32_t quota);
  1491. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1492. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *peer);
  1493. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1494. uint8_t *rx_tlv_hdr);
  1495. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr, struct dp_vdev *vdev,
  1496. struct dp_txrx_peer *peer);
  1497. /*
  1498. * dp_rx_dump_info_and_assert() - dump RX Ring info and Rx Desc info
  1499. *
  1500. * @soc: core txrx main context
  1501. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1502. * @ring_desc: opaque pointer to the RX ring descriptor
  1503. * @rx_desc: host rx descriptor
  1504. *
  1505. * Return: void
  1506. */
  1507. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  1508. hal_ring_handle_t hal_ring_hdl,
  1509. hal_ring_desc_t ring_desc,
  1510. struct dp_rx_desc *rx_desc);
  1511. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf);
  1512. #ifdef QCA_PEER_EXT_STATS
  1513. void dp_rx_compute_tid_delay(struct cdp_delay_tid_stats *stats,
  1514. qdf_nbuf_t nbuf);
  1515. #endif /* QCA_PEER_EXT_STATS */
  1516. #ifdef RX_DESC_DEBUG_CHECK
  1517. /**
  1518. * dp_rx_desc_check_magic() - check the magic value in dp_rx_desc
  1519. * @rx_desc: rx descriptor pointer
  1520. *
  1521. * Return: true, if magic is correct, else false.
  1522. */
  1523. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  1524. {
  1525. if (qdf_unlikely(rx_desc->magic != DP_RX_DESC_MAGIC))
  1526. return false;
  1527. rx_desc->magic = 0;
  1528. return true;
  1529. }
  1530. /**
  1531. * dp_rx_desc_prep() - prepare rx desc
  1532. * @rx_desc: rx descriptor pointer to be prepared
  1533. * @nbuf_frag_info_t: struct dp_rx_nbuf_frag_info *
  1534. *
  1535. * Note: assumption is that we are associating a nbuf which is mapped
  1536. *
  1537. * Return: none
  1538. */
  1539. static inline
  1540. void dp_rx_desc_prep(struct dp_rx_desc *rx_desc,
  1541. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1542. {
  1543. rx_desc->magic = DP_RX_DESC_MAGIC;
  1544. rx_desc->nbuf = (nbuf_frag_info_t->virt_addr).nbuf;
  1545. rx_desc->unmapped = 0;
  1546. rx_desc->nbuf_data_addr = (uint8_t *)qdf_nbuf_data(rx_desc->nbuf);
  1547. }
  1548. /**
  1549. * dp_rx_desc_frag_prep() - prepare rx desc
  1550. * @rx_desc: rx descriptor pointer to be prepared
  1551. * @nbuf_frag_info_t: struct dp_rx_nbuf_frag_info *
  1552. *
  1553. * Note: assumption is that we frag address is mapped
  1554. *
  1555. * Return: none
  1556. */
  1557. #ifdef DP_RX_MON_MEM_FRAG
  1558. static inline
  1559. void dp_rx_desc_frag_prep(struct dp_rx_desc *rx_desc,
  1560. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1561. {
  1562. rx_desc->magic = DP_RX_DESC_MAGIC;
  1563. rx_desc->rx_buf_start =
  1564. (uint8_t *)((nbuf_frag_info_t->virt_addr).vaddr);
  1565. rx_desc->paddr_buf_start = nbuf_frag_info_t->paddr;
  1566. rx_desc->unmapped = 0;
  1567. }
  1568. #else
  1569. static inline
  1570. void dp_rx_desc_frag_prep(struct dp_rx_desc *rx_desc,
  1571. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1572. {
  1573. }
  1574. #endif /* DP_RX_MON_MEM_FRAG */
  1575. /**
  1576. * dp_rx_desc_paddr_sanity_check() - paddr sanity for ring desc vs rx_desc
  1577. * @rx_desc: rx descriptor
  1578. * @ring_paddr: paddr obatined from the ring
  1579. *
  1580. * Returns: QDF_STATUS
  1581. */
  1582. static inline
  1583. bool dp_rx_desc_paddr_sanity_check(struct dp_rx_desc *rx_desc,
  1584. uint64_t ring_paddr)
  1585. {
  1586. return (ring_paddr == qdf_nbuf_get_frag_paddr(rx_desc->nbuf, 0));
  1587. }
  1588. #else
  1589. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  1590. {
  1591. return true;
  1592. }
  1593. static inline
  1594. void dp_rx_desc_prep(struct dp_rx_desc *rx_desc,
  1595. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1596. {
  1597. rx_desc->nbuf = (nbuf_frag_info_t->virt_addr).nbuf;
  1598. rx_desc->unmapped = 0;
  1599. }
  1600. #ifdef DP_RX_MON_MEM_FRAG
  1601. static inline
  1602. void dp_rx_desc_frag_prep(struct dp_rx_desc *rx_desc,
  1603. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1604. {
  1605. rx_desc->rx_buf_start =
  1606. (uint8_t *)((nbuf_frag_info_t->virt_addr).vaddr);
  1607. rx_desc->paddr_buf_start = nbuf_frag_info_t->paddr;
  1608. rx_desc->unmapped = 0;
  1609. }
  1610. #else
  1611. static inline
  1612. void dp_rx_desc_frag_prep(struct dp_rx_desc *rx_desc,
  1613. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1614. {
  1615. }
  1616. #endif /* DP_RX_MON_MEM_FRAG */
  1617. static inline
  1618. bool dp_rx_desc_paddr_sanity_check(struct dp_rx_desc *rx_desc,
  1619. uint64_t ring_paddr)
  1620. {
  1621. return true;
  1622. }
  1623. #endif /* RX_DESC_DEBUG_CHECK */
  1624. void dp_rx_enable_mon_dest_frag(struct rx_desc_pool *rx_desc_pool,
  1625. bool is_mon_dest_desc);
  1626. void dp_rx_process_rxdma_err(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1627. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *peer,
  1628. uint8_t err_code, uint8_t mac_id);
  1629. #ifndef QCA_MULTIPASS_SUPPORT
  1630. static inline
  1631. bool dp_rx_multipass_process(struct dp_txrx_peer *peer, qdf_nbuf_t nbuf,
  1632. uint8_t tid)
  1633. {
  1634. return false;
  1635. }
  1636. #else
  1637. bool dp_rx_multipass_process(struct dp_txrx_peer *peer, qdf_nbuf_t nbuf,
  1638. uint8_t tid);
  1639. #endif
  1640. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1641. #ifndef WLAN_RX_PKT_CAPTURE_ENH
  1642. static inline
  1643. QDF_STATUS dp_peer_set_rx_capture_enabled(struct dp_pdev *pdev,
  1644. struct dp_peer *peer_handle,
  1645. bool value, uint8_t *mac_addr)
  1646. {
  1647. return QDF_STATUS_SUCCESS;
  1648. }
  1649. #endif
  1650. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1651. /**
  1652. * dp_rx_deliver_to_stack() - deliver pkts to network stack
  1653. * Caller to hold peer refcount and check for valid peer
  1654. * @soc: soc
  1655. * @vdev: vdev
  1656. * @txrx_peer: txrx peer
  1657. * @nbuf_head: skb list head
  1658. * @nbuf_tail: skb list tail
  1659. *
  1660. * Return: QDF_STATUS
  1661. */
  1662. QDF_STATUS dp_rx_deliver_to_stack(struct dp_soc *soc,
  1663. struct dp_vdev *vdev,
  1664. struct dp_txrx_peer *peer,
  1665. qdf_nbuf_t nbuf_head,
  1666. qdf_nbuf_t nbuf_tail);
  1667. #ifdef QCA_SUPPORT_EAPOL_OVER_CONTROL_PORT
  1668. /**
  1669. * dp_rx_eapol_deliver_to_stack() - deliver pkts to network stack
  1670. * caller to hold peer refcount and check for valid peer
  1671. * @soc: soc
  1672. * @vdev: vdev
  1673. * @peer: peer
  1674. * @nbuf_head: skb list head
  1675. * @nbuf_tail: skb list tail
  1676. *
  1677. * return: QDF_STATUS
  1678. */
  1679. QDF_STATUS dp_rx_eapol_deliver_to_stack(struct dp_soc *soc,
  1680. struct dp_vdev *vdev,
  1681. struct dp_txrx_peer *peer,
  1682. qdf_nbuf_t nbuf_head,
  1683. qdf_nbuf_t nbuf_tail);
  1684. #endif
  1685. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1686. #ifdef QCA_OL_RX_LOCK_LESS_ACCESS
  1687. /*
  1688. * dp_rx_ring_access_start()- Wrapper function to log access start of a hal ring
  1689. * @int_ctx: pointer to DP interrupt context
  1690. * @dp_soc - DP soc structure pointer
  1691. * @hal_ring_hdl - HAL ring handle
  1692. *
  1693. * Return: 0 on success; error on failure
  1694. */
  1695. static inline int
  1696. dp_rx_srng_access_start(struct dp_intr *int_ctx, struct dp_soc *soc,
  1697. hal_ring_handle_t hal_ring_hdl)
  1698. {
  1699. return hal_srng_access_start_unlocked(soc->hal_soc, hal_ring_hdl);
  1700. }
  1701. /*
  1702. * dp_rx_ring_access_end()- Wrapper function to log access end of a hal ring
  1703. * @int_ctx: pointer to DP interrupt context
  1704. * @dp_soc - DP soc structure pointer
  1705. * @hal_ring_hdl - HAL ring handle
  1706. *
  1707. * Return - None
  1708. */
  1709. static inline void
  1710. dp_rx_srng_access_end(struct dp_intr *int_ctx, struct dp_soc *soc,
  1711. hal_ring_handle_t hal_ring_hdl)
  1712. {
  1713. hal_srng_access_end_unlocked(soc->hal_soc, hal_ring_hdl);
  1714. }
  1715. #else
  1716. static inline int
  1717. dp_rx_srng_access_start(struct dp_intr *int_ctx, struct dp_soc *soc,
  1718. hal_ring_handle_t hal_ring_hdl)
  1719. {
  1720. return dp_srng_access_start(int_ctx, soc, hal_ring_hdl);
  1721. }
  1722. static inline void
  1723. dp_rx_srng_access_end(struct dp_intr *int_ctx, struct dp_soc *soc,
  1724. hal_ring_handle_t hal_ring_hdl)
  1725. {
  1726. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  1727. }
  1728. #endif
  1729. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1730. /*
  1731. * dp_rx_wbm_sg_list_reset() - Initialize sg list
  1732. *
  1733. * This api should be called at soc init and afterevery sg processing.
  1734. *@soc: DP SOC handle
  1735. */
  1736. static inline void dp_rx_wbm_sg_list_reset(struct dp_soc *soc)
  1737. {
  1738. if (soc) {
  1739. soc->wbm_sg_param.wbm_is_first_msdu_in_sg = false;
  1740. soc->wbm_sg_param.wbm_sg_nbuf_head = NULL;
  1741. soc->wbm_sg_param.wbm_sg_nbuf_tail = NULL;
  1742. soc->wbm_sg_param.wbm_sg_desc_msdu_len = 0;
  1743. }
  1744. }
  1745. /*
  1746. * dp_rx_wbm_sg_list_deinit() - De-initialize sg list
  1747. *
  1748. * This api should be called in down path, to avoid any leak.
  1749. *@soc: DP SOC handle
  1750. */
  1751. static inline void dp_rx_wbm_sg_list_deinit(struct dp_soc *soc)
  1752. {
  1753. if (soc) {
  1754. if (soc->wbm_sg_param.wbm_sg_nbuf_head)
  1755. qdf_nbuf_list_free(soc->wbm_sg_param.wbm_sg_nbuf_head);
  1756. dp_rx_wbm_sg_list_reset(soc);
  1757. }
  1758. }
  1759. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1760. #ifdef WLAN_FEATURE_RX_PREALLOC_BUFFER_POOL
  1761. #define DP_RX_PROCESS_NBUF(soc, head, tail, ebuf_head, ebuf_tail, rx_desc) \
  1762. do { \
  1763. if (!soc->rx_buff_pool[rx_desc->pool_id].is_initialized) { \
  1764. DP_RX_LIST_APPEND(head, tail, rx_desc->nbuf); \
  1765. break; \
  1766. } \
  1767. DP_RX_LIST_APPEND(ebuf_head, ebuf_tail, rx_desc->nbuf); \
  1768. if (!qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf)) { \
  1769. if (!dp_rx_buffer_pool_refill(soc, ebuf_head, \
  1770. rx_desc->pool_id)) \
  1771. DP_RX_MERGE_TWO_LIST(head, tail, \
  1772. ebuf_head, ebuf_tail);\
  1773. ebuf_head = NULL; \
  1774. ebuf_tail = NULL; \
  1775. } \
  1776. } while (0)
  1777. #else
  1778. #define DP_RX_PROCESS_NBUF(soc, head, tail, ebuf_head, ebuf_tail, rx_desc) \
  1779. DP_RX_LIST_APPEND(head, tail, rx_desc->nbuf)
  1780. #endif /* WLAN_FEATURE_RX_PREALLOC_BUFFER_POOL */
  1781. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1782. /*
  1783. * dp_rx_link_desc_refill_duplicate_check() - check if link desc duplicate
  1784. to refill
  1785. * @soc: DP SOC handle
  1786. * @buf_info: the last link desc buf info
  1787. * @ring_buf_info: current buf address pointor including link desc
  1788. *
  1789. * return: none.
  1790. */
  1791. void dp_rx_link_desc_refill_duplicate_check(
  1792. struct dp_soc *soc,
  1793. struct hal_buf_info *buf_info,
  1794. hal_buff_addrinfo_t ring_buf_info);
  1795. #ifdef WLAN_FEATURE_PKT_CAPTURE_V2
  1796. /**
  1797. * dp_rx_deliver_to_pkt_capture() - deliver rx packet to packet capture
  1798. * @soc : dp_soc handle
  1799. * @pdev: dp_pdev handle
  1800. * @peer_id: peer_id of the peer for which completion came
  1801. * @ppdu_id: ppdu_id
  1802. * @netbuf: Buffer pointer
  1803. *
  1804. * This function is used to deliver rx packet to packet capture
  1805. */
  1806. void dp_rx_deliver_to_pkt_capture(struct dp_soc *soc, struct dp_pdev *pdev,
  1807. uint16_t peer_id, uint32_t is_offload,
  1808. qdf_nbuf_t netbuf);
  1809. void dp_rx_deliver_to_pkt_capture_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1810. uint32_t is_offload);
  1811. #else
  1812. static inline void
  1813. dp_rx_deliver_to_pkt_capture(struct dp_soc *soc, struct dp_pdev *pdev,
  1814. uint16_t peer_id, uint32_t is_offload,
  1815. qdf_nbuf_t netbuf)
  1816. {
  1817. }
  1818. static inline void
  1819. dp_rx_deliver_to_pkt_capture_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1820. uint32_t is_offload)
  1821. {
  1822. }
  1823. #endif
  1824. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1825. #ifdef FEATURE_MEC
  1826. /**
  1827. * dp_rx_mcast_echo_check() - check if the mcast pkt is a loop
  1828. * back on same vap or a different vap.
  1829. * @soc: core DP main context
  1830. * @peer: dp peer handler
  1831. * @rx_tlv_hdr: start of the rx TLV header
  1832. * @nbuf: pkt buffer
  1833. *
  1834. * Return: bool (true if it is a looped back pkt else false)
  1835. *
  1836. */
  1837. bool dp_rx_mcast_echo_check(struct dp_soc *soc,
  1838. struct dp_txrx_peer *peer,
  1839. uint8_t *rx_tlv_hdr,
  1840. qdf_nbuf_t nbuf);
  1841. #else
  1842. static inline bool dp_rx_mcast_echo_check(struct dp_soc *soc,
  1843. struct dp_txrx_peer *peer,
  1844. uint8_t *rx_tlv_hdr,
  1845. qdf_nbuf_t nbuf)
  1846. {
  1847. return false;
  1848. }
  1849. #endif /* FEATURE_MEC */
  1850. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1851. #ifdef RECEIVE_OFFLOAD
  1852. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  1853. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt);
  1854. #else
  1855. static inline
  1856. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  1857. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt)
  1858. {
  1859. }
  1860. #endif
  1861. void dp_rx_msdu_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1862. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *peer,
  1863. uint8_t ring_id,
  1864. struct cdp_tid_rx_stats *tid_stats);
  1865. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf);
  1866. uint32_t dp_rx_srng_get_num_pending(hal_soc_handle_t hal_soc,
  1867. hal_ring_handle_t hal_ring_hdl,
  1868. uint32_t num_entries,
  1869. bool *near_full);
  1870. #ifdef WLAN_FEATURE_DP_RX_RING_HISTORY
  1871. void dp_rx_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  1872. hal_ring_desc_t ring_desc);
  1873. #else
  1874. static inline void
  1875. dp_rx_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  1876. hal_ring_desc_t ring_desc)
  1877. {
  1878. }
  1879. #endif
  1880. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1881. #ifdef RX_DESC_SANITY_WAR
  1882. QDF_STATUS dp_rx_desc_sanity(struct dp_soc *soc, hal_soc_handle_t hal_soc,
  1883. hal_ring_handle_t hal_ring_hdl,
  1884. hal_ring_desc_t ring_desc,
  1885. struct dp_rx_desc *rx_desc);
  1886. #else
  1887. static inline
  1888. QDF_STATUS dp_rx_desc_sanity(struct dp_soc *soc, hal_soc_handle_t hal_soc,
  1889. hal_ring_handle_t hal_ring_hdl,
  1890. hal_ring_desc_t ring_desc,
  1891. struct dp_rx_desc *rx_desc)
  1892. {
  1893. return QDF_STATUS_SUCCESS;
  1894. }
  1895. #endif
  1896. #ifdef DP_RX_DROP_RAW_FRM
  1897. bool dp_rx_is_raw_frame_dropped(qdf_nbuf_t nbuf);
  1898. #else
  1899. static inline
  1900. bool dp_rx_is_raw_frame_dropped(qdf_nbuf_t nbuf)
  1901. {
  1902. return false;
  1903. }
  1904. #endif
  1905. #ifdef RX_DESC_DEBUG_CHECK
  1906. QDF_STATUS dp_rx_desc_nbuf_sanity_check(struct dp_soc *soc,
  1907. hal_ring_desc_t ring_desc,
  1908. struct dp_rx_desc *rx_desc);
  1909. #else
  1910. static inline
  1911. QDF_STATUS dp_rx_desc_nbuf_sanity_check(struct dp_soc *soc,
  1912. hal_ring_desc_t ring_desc,
  1913. struct dp_rx_desc *rx_desc)
  1914. {
  1915. return QDF_STATUS_SUCCESS;
  1916. }
  1917. #endif
  1918. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  1919. void dp_rx_update_stats(struct dp_soc *soc, qdf_nbuf_t nbuf);
  1920. #else
  1921. static inline
  1922. void dp_rx_update_stats(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1923. {
  1924. }
  1925. #endif
  1926. /**
  1927. * dp_rx_cksum_offload() - set the nbuf checksum as defined by hardware.
  1928. * @nbuf: pointer to the first msdu of an amsdu.
  1929. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1930. *
  1931. * The ipsumed field of the skb is set based on whether HW validated the
  1932. * IP/TCP/UDP checksum.
  1933. *
  1934. * Return: void
  1935. */
  1936. static inline
  1937. void dp_rx_cksum_offload(struct dp_pdev *pdev,
  1938. qdf_nbuf_t nbuf,
  1939. uint8_t *rx_tlv_hdr)
  1940. {
  1941. qdf_nbuf_rx_cksum_t cksum = {0};
  1942. //TODO - Move this to ring desc api
  1943. //HAL_RX_MSDU_DESC_IP_CHKSUM_FAIL_GET
  1944. //HAL_RX_MSDU_DESC_TCP_UDP_CHKSUM_FAIL_GET
  1945. uint32_t ip_csum_err, tcp_udp_csum_er;
  1946. hal_rx_tlv_csum_err_get(pdev->soc->hal_soc, rx_tlv_hdr, &ip_csum_err,
  1947. &tcp_udp_csum_er);
  1948. if (qdf_likely(!ip_csum_err && !tcp_udp_csum_er)) {
  1949. cksum.l4_result = QDF_NBUF_RX_CKSUM_TCP_UDP_UNNECESSARY;
  1950. qdf_nbuf_set_rx_cksum(nbuf, &cksum);
  1951. } else {
  1952. DP_STATS_INCC(pdev, err.ip_csum_err, 1, ip_csum_err);
  1953. DP_STATS_INCC(pdev, err.tcp_udp_csum_err, 1, tcp_udp_csum_er);
  1954. }
  1955. }
  1956. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1957. #ifdef WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT
  1958. static inline
  1959. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped,
  1960. int max_reap_limit)
  1961. {
  1962. bool limit_hit = false;
  1963. limit_hit =
  1964. (num_reaped >= max_reap_limit) ? true : false;
  1965. if (limit_hit)
  1966. DP_STATS_INC(soc, rx.reap_loop_pkt_limit_hit, 1)
  1967. return limit_hit;
  1968. }
  1969. static inline
  1970. bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1971. {
  1972. return soc->wlan_cfg_ctx->rx_enable_eol_data_check;
  1973. }
  1974. static inline int dp_rx_get_loop_pkt_limit(struct dp_soc *soc)
  1975. {
  1976. struct wlan_cfg_dp_soc_ctxt *cfg = soc->wlan_cfg_ctx;
  1977. return cfg->rx_reap_loop_pkt_limit;
  1978. }
  1979. #else
  1980. static inline
  1981. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped,
  1982. int max_reap_limit)
  1983. {
  1984. return false;
  1985. }
  1986. static inline
  1987. bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1988. {
  1989. return false;
  1990. }
  1991. static inline int dp_rx_get_loop_pkt_limit(struct dp_soc *soc)
  1992. {
  1993. return 0;
  1994. }
  1995. #endif /* WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT */
  1996. void dp_rx_update_stats(struct dp_soc *soc, qdf_nbuf_t nbuf);
  1997. #ifdef QCA_SUPPORT_WDS_EXTENDED
  1998. /**
  1999. * dp_rx_is_list_ready() - Make different lists for 4-address
  2000. and 3-address frames
  2001. * @nbuf_head: skb list head
  2002. * @vdev: vdev
  2003. * @txrx_peer : txrx_peer
  2004. * @peer_id: peer id of new received frame
  2005. * @vdev_id: vdev_id of new received frame
  2006. *
  2007. * Return: true if peer_ids are different.
  2008. */
  2009. static inline bool
  2010. dp_rx_is_list_ready(qdf_nbuf_t nbuf_head,
  2011. struct dp_vdev *vdev,
  2012. struct dp_txrx_peer *txrx_peer,
  2013. uint16_t peer_id,
  2014. uint8_t vdev_id)
  2015. {
  2016. if (nbuf_head && txrx_peer && txrx_peer->peer_id != peer_id)
  2017. return true;
  2018. return false;
  2019. }
  2020. #else
  2021. static inline bool
  2022. dp_rx_is_list_ready(qdf_nbuf_t nbuf_head,
  2023. struct dp_vdev *vdev,
  2024. struct dp_txrx_peer *txrx_peer,
  2025. uint16_t peer_id,
  2026. uint8_t vdev_id)
  2027. {
  2028. if (nbuf_head && vdev && (vdev->vdev_id != vdev_id))
  2029. return true;
  2030. return false;
  2031. }
  2032. #endif
  2033. #ifdef WLAN_FEATURE_MARK_FIRST_WAKEUP_PACKET
  2034. /**
  2035. * dp_rx_mark_first_packet_after_wow_wakeup - get first packet after wow wakeup
  2036. * @pdev: pointer to dp_pdev structure
  2037. * @rx_tlv: pointer to rx_pkt_tlvs structure
  2038. * @nbuf: pointer to skb buffer
  2039. *
  2040. * Return: None
  2041. */
  2042. void dp_rx_mark_first_packet_after_wow_wakeup(struct dp_pdev *pdev,
  2043. uint8_t *rx_tlv,
  2044. qdf_nbuf_t nbuf);
  2045. #else
  2046. static inline void
  2047. dp_rx_mark_first_packet_after_wow_wakeup(struct dp_pdev *pdev,
  2048. uint8_t *rx_tlv,
  2049. qdf_nbuf_t nbuf)
  2050. {
  2051. }
  2052. #endif
  2053. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  2054. static inline uint8_t
  2055. dp_rx_get_defrag_bm_id(struct dp_soc *soc)
  2056. {
  2057. return DP_DEFRAG_RBM(soc->wbm_sw0_bm_id);
  2058. }
  2059. static inline uint8_t
  2060. dp_rx_get_rx_bm_id(struct dp_soc *soc)
  2061. {
  2062. return DP_WBM2SW_RBM(soc->wbm_sw0_bm_id);
  2063. }
  2064. #else
  2065. static inline uint8_t
  2066. dp_rx_get_rx_bm_id(struct dp_soc *soc)
  2067. {
  2068. struct wlan_cfg_dp_soc_ctxt *cfg_ctx = soc->wlan_cfg_ctx;
  2069. uint8_t wbm2_sw_rx_rel_ring_id;
  2070. wbm2_sw_rx_rel_ring_id = wlan_cfg_get_rx_rel_ring_id(cfg_ctx);
  2071. return HAL_RX_BUF_RBM_SW_BM(soc->wbm_sw0_bm_id,
  2072. wbm2_sw_rx_rel_ring_id);
  2073. }
  2074. static inline uint8_t
  2075. dp_rx_get_defrag_bm_id(struct dp_soc *soc)
  2076. {
  2077. return dp_rx_get_rx_bm_id(soc);
  2078. }
  2079. #endif
  2080. static inline uint16_t
  2081. dp_rx_peer_metadata_peer_id_get(struct dp_soc *soc, uint32_t peer_metadata)
  2082. {
  2083. return soc->arch_ops.dp_rx_peer_metadata_peer_id_get(soc,
  2084. peer_metadata);
  2085. }
  2086. /**
  2087. * dp_rx_desc_pool_init_generic() - Generic Rx descriptors initialization
  2088. * @soc: SOC handle
  2089. * @rx_desc_pool: pointer to RX descriptor pool
  2090. * @pool_id: pool ID
  2091. *
  2092. * Return: None
  2093. */
  2094. QDF_STATUS dp_rx_desc_pool_init_generic(struct dp_soc *soc,
  2095. struct rx_desc_pool *rx_desc_pool,
  2096. uint32_t pool_id);
  2097. void dp_rx_desc_pool_deinit_generic(struct dp_soc *soc,
  2098. struct rx_desc_pool *rx_desc_pool,
  2099. uint32_t pool_id);
  2100. /**
  2101. * dp_rx_pkt_tracepoints_enabled() - Get the state of rx pkt tracepoint
  2102. *
  2103. * Return: True if any rx pkt tracepoint is enabled else false
  2104. */
  2105. static inline
  2106. bool dp_rx_pkt_tracepoints_enabled(void)
  2107. {
  2108. return (qdf_trace_dp_rx_tcp_pkt_enabled() ||
  2109. qdf_trace_dp_rx_udp_pkt_enabled() ||
  2110. qdf_trace_dp_rx_pkt_enabled());
  2111. }
  2112. #if defined(QCA_DP_RX_NBUF_NO_MAP_UNMAP) && !defined(BUILD_X86)
  2113. static inline
  2114. QDF_STATUS dp_pdev_rx_buffers_attach_simple(struct dp_soc *soc, uint32_t mac_id,
  2115. struct dp_srng *rxdma_srng,
  2116. struct rx_desc_pool *rx_desc_pool,
  2117. uint32_t num_req_buffers)
  2118. {
  2119. return __dp_pdev_rx_buffers_no_map_attach(soc, mac_id,
  2120. rxdma_srng,
  2121. rx_desc_pool,
  2122. num_req_buffers);
  2123. }
  2124. static inline
  2125. void dp_rx_buffers_replenish_simple(struct dp_soc *soc, uint32_t mac_id,
  2126. struct dp_srng *rxdma_srng,
  2127. struct rx_desc_pool *rx_desc_pool,
  2128. uint32_t num_req_buffers,
  2129. union dp_rx_desc_list_elem_t **desc_list,
  2130. union dp_rx_desc_list_elem_t **tail)
  2131. {
  2132. __dp_rx_buffers_no_map_replenish(soc, mac_id, rxdma_srng, rx_desc_pool,
  2133. num_req_buffers, desc_list, tail);
  2134. }
  2135. static inline
  2136. void dp_rx_buffers_lt_replenish_simple(struct dp_soc *soc, uint32_t mac_id,
  2137. struct dp_srng *rxdma_srng,
  2138. struct rx_desc_pool *rx_desc_pool,
  2139. uint32_t num_req_buffers,
  2140. union dp_rx_desc_list_elem_t **desc_list,
  2141. union dp_rx_desc_list_elem_t **tail)
  2142. {
  2143. __dp_rx_buffers_no_map_lt_replenish(soc, mac_id, rxdma_srng,
  2144. rx_desc_pool);
  2145. }
  2146. static inline
  2147. qdf_dma_addr_t dp_rx_nbuf_sync_no_dsb(struct dp_soc *dp_soc,
  2148. qdf_nbuf_t nbuf,
  2149. uint32_t buf_size)
  2150. {
  2151. qdf_nbuf_dma_inv_range_no_dsb((void *)nbuf->data,
  2152. (void *)(nbuf->data + buf_size));
  2153. return (qdf_dma_addr_t)qdf_mem_virt_to_phys(nbuf->data);
  2154. }
  2155. static inline
  2156. qdf_dma_addr_t dp_rx_nbuf_sync(struct dp_soc *dp_soc,
  2157. qdf_nbuf_t nbuf,
  2158. uint32_t buf_size)
  2159. {
  2160. qdf_nbuf_dma_inv_range((void *)nbuf->data,
  2161. (void *)(nbuf->data + buf_size));
  2162. return (qdf_dma_addr_t)qdf_mem_virt_to_phys(nbuf->data);
  2163. }
  2164. #if !defined(SPECULATIVE_READ_DISABLED)
  2165. static inline
  2166. void dp_rx_nbuf_unmap(struct dp_soc *soc,
  2167. struct dp_rx_desc *rx_desc,
  2168. uint8_t reo_ring_num)
  2169. {
  2170. struct rx_desc_pool *rx_desc_pool;
  2171. qdf_nbuf_t nbuf;
  2172. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  2173. nbuf = rx_desc->nbuf;
  2174. qdf_nbuf_dma_inv_range_no_dsb((void *)nbuf->data,
  2175. (void *)(nbuf->data + rx_desc_pool->buf_size));
  2176. }
  2177. static inline
  2178. void dp_rx_nbuf_unmap_pool(struct dp_soc *soc,
  2179. struct rx_desc_pool *rx_desc_pool,
  2180. qdf_nbuf_t nbuf)
  2181. {
  2182. qdf_nbuf_dma_inv_range((void *)nbuf->data,
  2183. (void *)(nbuf->data + rx_desc_pool->buf_size));
  2184. }
  2185. #else
  2186. static inline
  2187. void dp_rx_nbuf_unmap(struct dp_soc *soc,
  2188. struct dp_rx_desc *rx_desc,
  2189. uint8_t reo_ring_num)
  2190. {
  2191. }
  2192. static inline
  2193. void dp_rx_nbuf_unmap_pool(struct dp_soc *soc,
  2194. struct rx_desc_pool *rx_desc_pool,
  2195. qdf_nbuf_t nbuf)
  2196. {
  2197. }
  2198. #endif
  2199. static inline
  2200. void dp_rx_per_core_stats_update(struct dp_soc *soc, uint8_t ring_id,
  2201. uint32_t bufs_reaped)
  2202. {
  2203. }
  2204. static inline
  2205. qdf_nbuf_t dp_rx_nbuf_alloc(struct dp_soc *soc,
  2206. struct rx_desc_pool *rx_desc_pool)
  2207. {
  2208. return qdf_nbuf_alloc_simple(soc->osdev, rx_desc_pool->buf_size,
  2209. RX_BUFFER_RESERVATION,
  2210. rx_desc_pool->buf_alignment, FALSE);
  2211. }
  2212. static inline
  2213. void dp_rx_nbuf_free(qdf_nbuf_t nbuf)
  2214. {
  2215. qdf_nbuf_free_simple(nbuf);
  2216. }
  2217. #else
  2218. static inline
  2219. QDF_STATUS dp_pdev_rx_buffers_attach_simple(struct dp_soc *soc, uint32_t mac_id,
  2220. struct dp_srng *rxdma_srng,
  2221. struct rx_desc_pool *rx_desc_pool,
  2222. uint32_t num_req_buffers)
  2223. {
  2224. return dp_pdev_rx_buffers_attach(soc, mac_id,
  2225. rxdma_srng,
  2226. rx_desc_pool,
  2227. num_req_buffers);
  2228. }
  2229. static inline
  2230. void dp_rx_buffers_replenish_simple(struct dp_soc *soc, uint32_t mac_id,
  2231. struct dp_srng *rxdma_srng,
  2232. struct rx_desc_pool *rx_desc_pool,
  2233. uint32_t num_req_buffers,
  2234. union dp_rx_desc_list_elem_t **desc_list,
  2235. union dp_rx_desc_list_elem_t **tail)
  2236. {
  2237. dp_rx_buffers_replenish(soc, mac_id, rxdma_srng, rx_desc_pool,
  2238. num_req_buffers, desc_list, tail);
  2239. }
  2240. static inline
  2241. void dp_rx_buffers_lt_replenish_simple(struct dp_soc *soc, uint32_t mac_id,
  2242. struct dp_srng *rxdma_srng,
  2243. struct rx_desc_pool *rx_desc_pool,
  2244. uint32_t num_req_buffers,
  2245. union dp_rx_desc_list_elem_t **desc_list,
  2246. union dp_rx_desc_list_elem_t **tail)
  2247. {
  2248. dp_rx_buffers_replenish(soc, mac_id, rxdma_srng, rx_desc_pool,
  2249. num_req_buffers, desc_list, tail);
  2250. }
  2251. static inline
  2252. qdf_dma_addr_t dp_rx_nbuf_sync_no_dsb(struct dp_soc *dp_soc,
  2253. qdf_nbuf_t nbuf,
  2254. uint32_t buf_size)
  2255. {
  2256. return (qdf_dma_addr_t)NULL;
  2257. }
  2258. static inline
  2259. qdf_dma_addr_t dp_rx_nbuf_sync(struct dp_soc *dp_soc,
  2260. qdf_nbuf_t nbuf,
  2261. uint32_t buf_size)
  2262. {
  2263. return (qdf_dma_addr_t)NULL;
  2264. }
  2265. static inline
  2266. void dp_rx_nbuf_unmap(struct dp_soc *soc,
  2267. struct dp_rx_desc *rx_desc,
  2268. uint8_t reo_ring_num)
  2269. {
  2270. struct rx_desc_pool *rx_desc_pool;
  2271. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  2272. dp_ipa_reo_ctx_buf_mapping_lock(soc, reo_ring_num);
  2273. dp_ipa_handle_rx_buf_smmu_mapping(soc, rx_desc->nbuf,
  2274. rx_desc_pool->buf_size,
  2275. false);
  2276. qdf_nbuf_unmap_nbytes_single(soc->osdev, rx_desc->nbuf,
  2277. QDF_DMA_FROM_DEVICE,
  2278. rx_desc_pool->buf_size);
  2279. dp_ipa_reo_ctx_buf_mapping_unlock(soc, reo_ring_num);
  2280. }
  2281. static inline
  2282. void dp_rx_nbuf_unmap_pool(struct dp_soc *soc,
  2283. struct rx_desc_pool *rx_desc_pool,
  2284. qdf_nbuf_t nbuf)
  2285. {
  2286. dp_ipa_handle_rx_buf_smmu_mapping(soc, nbuf, rx_desc_pool->buf_size,
  2287. false);
  2288. qdf_nbuf_unmap_nbytes_single(soc->osdev, nbuf, QDF_DMA_FROM_DEVICE,
  2289. rx_desc_pool->buf_size);
  2290. }
  2291. static inline
  2292. void dp_rx_per_core_stats_update(struct dp_soc *soc, uint8_t ring_id,
  2293. uint32_t bufs_reaped)
  2294. {
  2295. int cpu_id = qdf_get_cpu();
  2296. DP_STATS_INC(soc, rx.ring_packets[cpu_id][ring_id], bufs_reaped);
  2297. }
  2298. static inline
  2299. qdf_nbuf_t dp_rx_nbuf_alloc(struct dp_soc *soc,
  2300. struct rx_desc_pool *rx_desc_pool)
  2301. {
  2302. return qdf_nbuf_alloc(soc->osdev, rx_desc_pool->buf_size,
  2303. RX_BUFFER_RESERVATION,
  2304. rx_desc_pool->buf_alignment, FALSE);
  2305. }
  2306. static inline
  2307. void dp_rx_nbuf_free(qdf_nbuf_t nbuf)
  2308. {
  2309. qdf_nbuf_free(nbuf);
  2310. }
  2311. #endif
  2312. /**
  2313. * dp_rx_get_txrx_peer_and_vdev() - Get txrx peer and vdev from peer id
  2314. * @nbuf : pointer to the first msdu of an amsdu.
  2315. * @peer_id : Peer id of the peer
  2316. * @txrx_ref_handle : Buffer to save the handle for txrx peer's reference
  2317. * @pkt_capture_offload : Flag indicating if pkt capture offload is needed
  2318. * @vdev : Buffer to hold pointer to vdev
  2319. * @rx_pdev : Buffer to hold pointer to rx pdev
  2320. * @dsf : delay stats flag
  2321. * @old_tid : Old tid
  2322. *
  2323. * Get txrx peer and vdev from peer id
  2324. *
  2325. * Return: Pointer to txrx peer
  2326. */
  2327. static inline struct dp_txrx_peer *
  2328. dp_rx_get_txrx_peer_and_vdev(struct dp_soc *soc,
  2329. qdf_nbuf_t nbuf,
  2330. uint16_t peer_id,
  2331. dp_txrx_ref_handle *txrx_ref_handle,
  2332. bool pkt_capture_offload,
  2333. struct dp_vdev **vdev,
  2334. struct dp_pdev **rx_pdev,
  2335. uint32_t *dsf,
  2336. uint32_t *old_tid)
  2337. {
  2338. struct dp_txrx_peer *txrx_peer = NULL;
  2339. txrx_peer = dp_txrx_peer_get_ref_by_id(soc, peer_id, txrx_ref_handle,
  2340. DP_MOD_ID_RX);
  2341. if (qdf_likely(txrx_peer)) {
  2342. *vdev = txrx_peer->vdev;
  2343. } else {
  2344. nbuf->next = NULL;
  2345. dp_rx_deliver_to_pkt_capture_no_peer(soc, nbuf,
  2346. pkt_capture_offload);
  2347. if (!pkt_capture_offload)
  2348. dp_rx_deliver_to_stack_no_peer(soc, nbuf);
  2349. goto end;
  2350. }
  2351. if (qdf_unlikely(!(*vdev))) {
  2352. qdf_nbuf_free(nbuf);
  2353. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  2354. goto end;
  2355. }
  2356. *rx_pdev = (*vdev)->pdev;
  2357. *dsf = (*rx_pdev)->delay_stats_flag;
  2358. *old_tid = 0xff;
  2359. end:
  2360. return txrx_peer;
  2361. }
  2362. static inline QDF_STATUS
  2363. dp_peer_rx_reorder_queue_setup(struct dp_soc *soc, struct dp_peer *peer,
  2364. int tid, uint32_t ba_window_size)
  2365. {
  2366. return soc->arch_ops.dp_peer_rx_reorder_queue_setup(soc,
  2367. peer, tid,
  2368. ba_window_size);
  2369. }
  2370. static inline
  2371. void dp_rx_nbuf_list_deliver(struct dp_soc *soc,
  2372. struct dp_vdev *vdev,
  2373. struct dp_txrx_peer *txrx_peer,
  2374. uint16_t peer_id,
  2375. uint8_t pkt_capture_offload,
  2376. qdf_nbuf_t deliver_list_head,
  2377. qdf_nbuf_t deliver_list_tail)
  2378. {
  2379. qdf_nbuf_t nbuf, next;
  2380. if (qdf_likely(deliver_list_head)) {
  2381. if (qdf_likely(txrx_peer)) {
  2382. dp_rx_deliver_to_pkt_capture(soc, vdev->pdev, peer_id,
  2383. pkt_capture_offload,
  2384. deliver_list_head);
  2385. if (!pkt_capture_offload)
  2386. dp_rx_deliver_to_stack(soc, vdev, txrx_peer,
  2387. deliver_list_head,
  2388. deliver_list_tail);
  2389. } else {
  2390. nbuf = deliver_list_head;
  2391. while (nbuf) {
  2392. next = nbuf->next;
  2393. nbuf->next = NULL;
  2394. dp_rx_deliver_to_stack_no_peer(soc, nbuf);
  2395. nbuf = next;
  2396. }
  2397. }
  2398. }
  2399. }
  2400. #ifdef DP_TX_RX_TPUT_SIMULATE
  2401. /*
  2402. * Change this macro value to simulate different RX T-put,
  2403. * if OTA is 100 Mbps, to simulate 200 Mbps, then multiplication factor
  2404. * is 2, set macro value as 1 (multiplication factor - 1).
  2405. */
  2406. #define DP_RX_PKTS_DUPLICATE_CNT 0
  2407. static inline
  2408. void dp_rx_nbuf_list_dup_deliver(struct dp_soc *soc,
  2409. struct dp_vdev *vdev,
  2410. struct dp_txrx_peer *txrx_peer,
  2411. uint16_t peer_id,
  2412. uint8_t pkt_capture_offload,
  2413. qdf_nbuf_t ori_list_head,
  2414. qdf_nbuf_t ori_list_tail)
  2415. {
  2416. qdf_nbuf_t new_skb = NULL;
  2417. qdf_nbuf_t new_list_head = NULL;
  2418. qdf_nbuf_t new_list_tail = NULL;
  2419. qdf_nbuf_t nbuf = NULL;
  2420. int i;
  2421. for (i = 0; i < DP_RX_PKTS_DUPLICATE_CNT; i++) {
  2422. nbuf = ori_list_head;
  2423. new_list_head = NULL;
  2424. new_list_tail = NULL;
  2425. while (nbuf) {
  2426. new_skb = qdf_nbuf_copy(nbuf);
  2427. if (qdf_likely(new_skb))
  2428. DP_RX_LIST_APPEND(new_list_head,
  2429. new_list_tail,
  2430. new_skb);
  2431. else
  2432. dp_err("copy skb failed");
  2433. nbuf = qdf_nbuf_next(nbuf);
  2434. }
  2435. /* deliver the copied nbuf list */
  2436. dp_rx_nbuf_list_deliver(soc, vdev, txrx_peer, peer_id,
  2437. pkt_capture_offload,
  2438. new_list_head,
  2439. new_list_tail);
  2440. }
  2441. /* deliver the original skb_list */
  2442. dp_rx_nbuf_list_deliver(soc, vdev, txrx_peer, peer_id,
  2443. pkt_capture_offload,
  2444. ori_list_head,
  2445. ori_list_tail);
  2446. }
  2447. #define DP_RX_DELIVER_TO_STACK dp_rx_nbuf_list_dup_deliver
  2448. #else /* !DP_TX_RX_TPUT_SIMULATE */
  2449. #define DP_RX_DELIVER_TO_STACK dp_rx_nbuf_list_deliver
  2450. #endif /* DP_TX_RX_TPUT_SIMULATE */
  2451. #endif /* _DP_RX_H */