dp_rx.c 88 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963296429652966296729682969297029712972297329742975297629772978297929802981298229832984298529862987298829892990299129922993299429952996299729982999300030013002300330043005300630073008300930103011301230133014301530163017301830193020302130223023302430253026302730283029303030313032303330343035303630373038303930403041304230433044304530463047304830493050305130523053305430553056305730583059306030613062306330643065306630673068306930703071307230733074307530763077307830793080308130823083308430853086308730883089309030913092309330943095309630973098309931003101310231033104310531063107310831093110311131123113311431153116311731183119312031213122312331243125312631273128312931303131313231333134313531363137313831393140314131423143314431453146314731483149315031513152315331543155315631573158315931603161316231633164316531663167316831693170317131723173317431753176317731783179318031813182318331843185318631873188
  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include "hal_hw_headers.h"
  20. #include "dp_types.h"
  21. #include "dp_rx.h"
  22. #include "dp_tx.h"
  23. #include "dp_peer.h"
  24. #include "hal_rx.h"
  25. #include "hal_api.h"
  26. #include "qdf_nbuf.h"
  27. #ifdef MESH_MODE_SUPPORT
  28. #include "if_meta_hdr.h"
  29. #endif
  30. #include "dp_internal.h"
  31. #include "dp_ipa.h"
  32. #include "dp_hist.h"
  33. #include "dp_rx_buffer_pool.h"
  34. #ifdef WIFI_MONITOR_SUPPORT
  35. #include "dp_htt.h"
  36. #include <dp_mon.h>
  37. #endif
  38. #ifdef FEATURE_WDS
  39. #include "dp_txrx_wds.h"
  40. #endif
  41. #ifdef DP_RATETABLE_SUPPORT
  42. #include "dp_ratetable.h"
  43. #endif
  44. #ifdef DUP_RX_DESC_WAR
  45. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  46. hal_ring_handle_t hal_ring,
  47. hal_ring_desc_t ring_desc,
  48. struct dp_rx_desc *rx_desc)
  49. {
  50. void *hal_soc = soc->hal_soc;
  51. hal_srng_dump_ring_desc(hal_soc, hal_ring, ring_desc);
  52. dp_rx_desc_dump(rx_desc);
  53. }
  54. #else
  55. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  56. hal_ring_handle_t hal_ring_hdl,
  57. hal_ring_desc_t ring_desc,
  58. struct dp_rx_desc *rx_desc)
  59. {
  60. hal_soc_handle_t hal_soc = soc->hal_soc;
  61. dp_rx_desc_dump(rx_desc);
  62. hal_srng_dump_ring_desc(hal_soc, hal_ring_hdl, ring_desc);
  63. hal_srng_dump_ring(hal_soc, hal_ring_hdl);
  64. qdf_assert_always(0);
  65. }
  66. #endif
  67. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  68. #ifdef RX_DESC_SANITY_WAR
  69. QDF_STATUS dp_rx_desc_sanity(struct dp_soc *soc, hal_soc_handle_t hal_soc,
  70. hal_ring_handle_t hal_ring_hdl,
  71. hal_ring_desc_t ring_desc,
  72. struct dp_rx_desc *rx_desc)
  73. {
  74. uint8_t return_buffer_manager;
  75. if (qdf_unlikely(!rx_desc)) {
  76. /*
  77. * This is an unlikely case where the cookie obtained
  78. * from the ring_desc is invalid and hence we are not
  79. * able to find the corresponding rx_desc
  80. */
  81. goto fail;
  82. }
  83. return_buffer_manager = hal_rx_ret_buf_manager_get(hal_soc, ring_desc);
  84. if (qdf_unlikely(!(return_buffer_manager ==
  85. HAL_RX_BUF_RBM_SW1_BM(soc->wbm_sw0_bm_id) ||
  86. return_buffer_manager ==
  87. HAL_RX_BUF_RBM_SW3_BM(soc->wbm_sw0_bm_id)))) {
  88. goto fail;
  89. }
  90. return QDF_STATUS_SUCCESS;
  91. fail:
  92. DP_STATS_INC(soc, rx.err.invalid_cookie, 1);
  93. dp_err("Ring Desc:");
  94. hal_srng_dump_ring_desc(hal_soc, hal_ring_hdl,
  95. ring_desc);
  96. return QDF_STATUS_E_NULL_VALUE;
  97. }
  98. #endif
  99. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  100. /**
  101. * dp_pdev_frag_alloc_and_map() - Allocate frag for desc buffer and map
  102. *
  103. * @dp_soc: struct dp_soc *
  104. * @nbuf_frag_info_t: nbuf frag info
  105. * @dp_pdev: struct dp_pdev *
  106. * @rx_desc_pool: Rx desc pool
  107. *
  108. * Return: QDF_STATUS
  109. */
  110. #ifdef DP_RX_MON_MEM_FRAG
  111. static inline QDF_STATUS
  112. dp_pdev_frag_alloc_and_map(struct dp_soc *dp_soc,
  113. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  114. struct dp_pdev *dp_pdev,
  115. struct rx_desc_pool *rx_desc_pool)
  116. {
  117. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  118. (nbuf_frag_info_t->virt_addr).vaddr =
  119. qdf_frag_alloc(NULL, rx_desc_pool->buf_size);
  120. if (!((nbuf_frag_info_t->virt_addr).vaddr)) {
  121. dp_err("Frag alloc failed");
  122. DP_STATS_INC(dp_pdev, replenish.frag_alloc_fail, 1);
  123. return QDF_STATUS_E_NOMEM;
  124. }
  125. ret = qdf_mem_map_page(dp_soc->osdev,
  126. (nbuf_frag_info_t->virt_addr).vaddr,
  127. QDF_DMA_FROM_DEVICE,
  128. rx_desc_pool->buf_size,
  129. &nbuf_frag_info_t->paddr);
  130. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  131. qdf_frag_free((nbuf_frag_info_t->virt_addr).vaddr);
  132. dp_err("Frag map failed");
  133. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  134. return QDF_STATUS_E_FAULT;
  135. }
  136. return QDF_STATUS_SUCCESS;
  137. }
  138. #else
  139. static inline QDF_STATUS
  140. dp_pdev_frag_alloc_and_map(struct dp_soc *dp_soc,
  141. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  142. struct dp_pdev *dp_pdev,
  143. struct rx_desc_pool *rx_desc_pool)
  144. {
  145. return QDF_STATUS_SUCCESS;
  146. }
  147. #endif /* DP_RX_MON_MEM_FRAG */
  148. #ifdef WLAN_FEATURE_DP_RX_RING_HISTORY
  149. /**
  150. * dp_rx_refill_ring_record_entry() - Record an entry into refill_ring history
  151. * @soc: Datapath soc structure
  152. * @ring_num: Refill ring number
  153. * @num_req: number of buffers requested for refill
  154. * @num_refill: number of buffers refilled
  155. *
  156. * Returns: None
  157. */
  158. static inline void
  159. dp_rx_refill_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  160. hal_ring_handle_t hal_ring_hdl,
  161. uint32_t num_req, uint32_t num_refill)
  162. {
  163. struct dp_refill_info_record *record;
  164. uint32_t idx;
  165. uint32_t tp;
  166. uint32_t hp;
  167. if (qdf_unlikely(ring_num >= MAX_PDEV_CNT ||
  168. !soc->rx_refill_ring_history[ring_num]))
  169. return;
  170. idx = dp_history_get_next_index(&soc->rx_refill_ring_history[ring_num]->index,
  171. DP_RX_REFILL_HIST_MAX);
  172. /* No NULL check needed for record since its an array */
  173. record = &soc->rx_refill_ring_history[ring_num]->entry[idx];
  174. hal_get_sw_hptp(soc->hal_soc, hal_ring_hdl, &tp, &hp);
  175. record->timestamp = qdf_get_log_timestamp();
  176. record->num_req = num_req;
  177. record->num_refill = num_refill;
  178. record->hp = hp;
  179. record->tp = tp;
  180. }
  181. #else
  182. static inline void
  183. dp_rx_refill_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  184. hal_ring_handle_t hal_ring_hdl,
  185. uint32_t num_req, uint32_t num_refill)
  186. {
  187. }
  188. #endif
  189. /**
  190. * dp_pdev_nbuf_alloc_and_map() - Allocate nbuf for desc buffer and map
  191. *
  192. * @dp_soc: struct dp_soc *
  193. * @mac_id: Mac id
  194. * @num_entries_avail: num_entries_avail
  195. * @nbuf_frag_info_t: nbuf frag info
  196. * @dp_pdev: struct dp_pdev *
  197. * @rx_desc_pool: Rx desc pool
  198. *
  199. * Return: QDF_STATUS
  200. */
  201. static inline QDF_STATUS
  202. dp_pdev_nbuf_alloc_and_map_replenish(struct dp_soc *dp_soc,
  203. uint32_t mac_id,
  204. uint32_t num_entries_avail,
  205. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  206. struct dp_pdev *dp_pdev,
  207. struct rx_desc_pool *rx_desc_pool)
  208. {
  209. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  210. (nbuf_frag_info_t->virt_addr).nbuf =
  211. dp_rx_buffer_pool_nbuf_alloc(dp_soc,
  212. mac_id,
  213. rx_desc_pool,
  214. num_entries_avail);
  215. if (!((nbuf_frag_info_t->virt_addr).nbuf)) {
  216. dp_err("nbuf alloc failed");
  217. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  218. return QDF_STATUS_E_NOMEM;
  219. }
  220. ret = dp_rx_buffer_pool_nbuf_map(dp_soc, rx_desc_pool,
  221. nbuf_frag_info_t);
  222. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  223. dp_rx_buffer_pool_nbuf_free(dp_soc,
  224. (nbuf_frag_info_t->virt_addr).nbuf, mac_id);
  225. dp_err("nbuf map failed");
  226. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  227. return QDF_STATUS_E_FAULT;
  228. }
  229. nbuf_frag_info_t->paddr =
  230. qdf_nbuf_get_frag_paddr((nbuf_frag_info_t->virt_addr).nbuf, 0);
  231. dp_ipa_handle_rx_buf_smmu_mapping(dp_soc,
  232. (qdf_nbuf_t)((nbuf_frag_info_t->virt_addr).nbuf),
  233. rx_desc_pool->buf_size,
  234. true);
  235. ret = dp_check_paddr(dp_soc, &((nbuf_frag_info_t->virt_addr).nbuf),
  236. &nbuf_frag_info_t->paddr,
  237. rx_desc_pool);
  238. if (ret == QDF_STATUS_E_FAILURE) {
  239. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  240. return QDF_STATUS_E_ADDRNOTAVAIL;
  241. }
  242. return QDF_STATUS_SUCCESS;
  243. }
  244. #if defined(QCA_DP_RX_NBUF_NO_MAP_UNMAP) && !defined(BUILD_X86)
  245. QDF_STATUS
  246. __dp_rx_buffers_no_map_lt_replenish(struct dp_soc *soc, uint32_t mac_id,
  247. struct dp_srng *dp_rxdma_srng,
  248. struct rx_desc_pool *rx_desc_pool)
  249. {
  250. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  251. uint32_t count;
  252. void *rxdma_ring_entry;
  253. union dp_rx_desc_list_elem_t *next = NULL;
  254. void *rxdma_srng;
  255. qdf_nbuf_t nbuf;
  256. qdf_dma_addr_t paddr;
  257. uint16_t num_entries_avail = 0;
  258. uint16_t num_alloc_desc = 0;
  259. union dp_rx_desc_list_elem_t *desc_list = NULL;
  260. union dp_rx_desc_list_elem_t *tail = NULL;
  261. int sync_hw_ptr = 0;
  262. rxdma_srng = dp_rxdma_srng->hal_srng;
  263. if (qdf_unlikely(!dp_pdev)) {
  264. dp_rx_err("%pK: pdev is null for mac_id = %d", soc, mac_id);
  265. return QDF_STATUS_E_FAILURE;
  266. }
  267. if (qdf_unlikely(!rxdma_srng)) {
  268. dp_rx_debug("%pK: rxdma srng not initialized", soc);
  269. return QDF_STATUS_E_FAILURE;
  270. }
  271. hal_srng_access_start(soc->hal_soc, rxdma_srng);
  272. num_entries_avail = hal_srng_src_num_avail(soc->hal_soc,
  273. rxdma_srng,
  274. sync_hw_ptr);
  275. dp_rx_debug("%pK: no of available entries in rxdma ring: %d",
  276. soc, num_entries_avail);
  277. if (qdf_unlikely(num_entries_avail <
  278. ((dp_rxdma_srng->num_entries * 3) / 4))) {
  279. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  280. return QDF_STATUS_E_FAILURE;
  281. }
  282. DP_STATS_INC(dp_pdev, replenish.low_thresh_intrs, 1);
  283. num_alloc_desc = dp_rx_get_free_desc_list(soc, mac_id,
  284. rx_desc_pool,
  285. num_entries_avail,
  286. &desc_list,
  287. &tail);
  288. if (!num_alloc_desc) {
  289. dp_rx_err("%pK: no free rx_descs in freelist", soc);
  290. DP_STATS_INC(dp_pdev, err.desc_lt_alloc_fail,
  291. num_entries_avail);
  292. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  293. return QDF_STATUS_E_NOMEM;
  294. }
  295. for (count = 0; count < num_alloc_desc; count++) {
  296. next = desc_list->next;
  297. qdf_prefetch(next);
  298. nbuf = dp_rx_nbuf_alloc(soc, rx_desc_pool);
  299. if (qdf_unlikely(!nbuf)) {
  300. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  301. break;
  302. }
  303. paddr = dp_rx_nbuf_sync_no_dsb(soc, nbuf,
  304. rx_desc_pool->buf_size);
  305. rxdma_ring_entry = hal_srng_src_get_next(soc->hal_soc,
  306. rxdma_srng);
  307. qdf_assert_always(rxdma_ring_entry);
  308. desc_list->rx_desc.nbuf = nbuf;
  309. desc_list->rx_desc.rx_buf_start = nbuf->data;
  310. desc_list->rx_desc.unmapped = 0;
  311. /* rx_desc.in_use should be zero at this time*/
  312. qdf_assert_always(desc_list->rx_desc.in_use == 0);
  313. desc_list->rx_desc.in_use = 1;
  314. desc_list->rx_desc.in_err_state = 0;
  315. hal_rxdma_buff_addr_info_set(soc->hal_soc, rxdma_ring_entry,
  316. paddr,
  317. desc_list->rx_desc.cookie,
  318. rx_desc_pool->owner);
  319. desc_list = next;
  320. }
  321. qdf_dsb();
  322. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  323. /* No need to count the number of bytes received during replenish.
  324. * Therefore set replenish.pkts.bytes as 0.
  325. */
  326. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  327. DP_STATS_INC(dp_pdev, buf_freelist, (num_alloc_desc - count));
  328. /*
  329. * add any available free desc back to the free list
  330. */
  331. if (desc_list)
  332. dp_rx_add_desc_list_to_free_list(soc, &desc_list, &tail,
  333. mac_id, rx_desc_pool);
  334. return QDF_STATUS_SUCCESS;
  335. }
  336. QDF_STATUS
  337. __dp_rx_buffers_no_map_replenish(struct dp_soc *soc, uint32_t mac_id,
  338. struct dp_srng *dp_rxdma_srng,
  339. struct rx_desc_pool *rx_desc_pool,
  340. uint32_t num_req_buffers,
  341. union dp_rx_desc_list_elem_t **desc_list,
  342. union dp_rx_desc_list_elem_t **tail)
  343. {
  344. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  345. uint32_t count;
  346. void *rxdma_ring_entry;
  347. union dp_rx_desc_list_elem_t *next;
  348. void *rxdma_srng;
  349. qdf_nbuf_t nbuf;
  350. qdf_dma_addr_t paddr;
  351. rxdma_srng = dp_rxdma_srng->hal_srng;
  352. if (qdf_unlikely(!dp_pdev)) {
  353. dp_rx_err("%pK: pdev is null for mac_id = %d",
  354. soc, mac_id);
  355. return QDF_STATUS_E_FAILURE;
  356. }
  357. if (qdf_unlikely(!rxdma_srng)) {
  358. dp_rx_debug("%pK: rxdma srng not initialized", soc);
  359. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  360. return QDF_STATUS_E_FAILURE;
  361. }
  362. dp_rx_debug("%pK: requested %d buffers for replenish",
  363. soc, num_req_buffers);
  364. hal_srng_access_start(soc->hal_soc, rxdma_srng);
  365. for (count = 0; count < num_req_buffers; count++) {
  366. next = (*desc_list)->next;
  367. qdf_prefetch(next);
  368. nbuf = dp_rx_nbuf_alloc(soc, rx_desc_pool);
  369. if (qdf_unlikely(!nbuf)) {
  370. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  371. break;
  372. }
  373. paddr = dp_rx_nbuf_sync_no_dsb(soc, nbuf,
  374. rx_desc_pool->buf_size);
  375. rxdma_ring_entry = (struct dp_buffer_addr_info *)
  376. hal_srng_src_get_next(soc->hal_soc, rxdma_srng);
  377. if (!rxdma_ring_entry)
  378. break;
  379. qdf_assert_always(rxdma_ring_entry);
  380. (*desc_list)->rx_desc.nbuf = nbuf;
  381. (*desc_list)->rx_desc.rx_buf_start = nbuf->data;
  382. (*desc_list)->rx_desc.unmapped = 0;
  383. /* rx_desc.in_use should be zero at this time*/
  384. qdf_assert_always((*desc_list)->rx_desc.in_use == 0);
  385. (*desc_list)->rx_desc.in_use = 1;
  386. (*desc_list)->rx_desc.in_err_state = 0;
  387. hal_rxdma_buff_addr_info_set(soc->hal_soc, rxdma_ring_entry,
  388. paddr,
  389. (*desc_list)->rx_desc.cookie,
  390. rx_desc_pool->owner);
  391. *desc_list = next;
  392. }
  393. qdf_dsb();
  394. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  395. /* No need to count the number of bytes received during replenish.
  396. * Therefore set replenish.pkts.bytes as 0.
  397. */
  398. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  399. DP_STATS_INC(dp_pdev, buf_freelist, (num_req_buffers - count));
  400. /*
  401. * add any available free desc back to the free list
  402. */
  403. if (*desc_list)
  404. dp_rx_add_desc_list_to_free_list(soc, desc_list, tail,
  405. mac_id, rx_desc_pool);
  406. return QDF_STATUS_SUCCESS;
  407. }
  408. QDF_STATUS __dp_pdev_rx_buffers_no_map_attach(struct dp_soc *soc,
  409. uint32_t mac_id,
  410. struct dp_srng *dp_rxdma_srng,
  411. struct rx_desc_pool *rx_desc_pool,
  412. uint32_t num_req_buffers)
  413. {
  414. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  415. uint32_t count;
  416. uint32_t nr_descs = 0;
  417. void *rxdma_ring_entry;
  418. union dp_rx_desc_list_elem_t *next;
  419. void *rxdma_srng;
  420. qdf_nbuf_t nbuf;
  421. qdf_dma_addr_t paddr;
  422. union dp_rx_desc_list_elem_t *desc_list = NULL;
  423. union dp_rx_desc_list_elem_t *tail = NULL;
  424. rxdma_srng = dp_rxdma_srng->hal_srng;
  425. if (qdf_unlikely(!dp_pdev)) {
  426. dp_rx_err("%pK: pdev is null for mac_id = %d",
  427. soc, mac_id);
  428. return QDF_STATUS_E_FAILURE;
  429. }
  430. if (qdf_unlikely(!rxdma_srng)) {
  431. dp_rx_debug("%pK: rxdma srng not initialized", soc);
  432. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  433. return QDF_STATUS_E_FAILURE;
  434. }
  435. dp_rx_debug("%pK: requested %d buffers for replenish",
  436. soc, num_req_buffers);
  437. nr_descs = dp_rx_get_free_desc_list(soc, mac_id, rx_desc_pool,
  438. num_req_buffers, &desc_list, &tail);
  439. if (!nr_descs) {
  440. dp_err("no free rx_descs in freelist");
  441. DP_STATS_INC(dp_pdev, err.desc_alloc_fail, num_req_buffers);
  442. return QDF_STATUS_E_NOMEM;
  443. }
  444. dp_debug("got %u RX descs for driver attach", nr_descs);
  445. hal_srng_access_start(soc->hal_soc, rxdma_srng);
  446. for (count = 0; count < nr_descs; count++) {
  447. next = desc_list->next;
  448. qdf_prefetch(next);
  449. nbuf = dp_rx_nbuf_alloc(soc, rx_desc_pool);
  450. if (qdf_unlikely(!nbuf)) {
  451. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  452. break;
  453. }
  454. paddr = dp_rx_nbuf_sync_no_dsb(soc, nbuf,
  455. rx_desc_pool->buf_size);
  456. rxdma_ring_entry = (struct dp_buffer_addr_info *)
  457. hal_srng_src_get_next(soc->hal_soc, rxdma_srng);
  458. if (!rxdma_ring_entry)
  459. break;
  460. qdf_assert_always(rxdma_ring_entry);
  461. desc_list->rx_desc.nbuf = nbuf;
  462. desc_list->rx_desc.rx_buf_start = nbuf->data;
  463. desc_list->rx_desc.unmapped = 0;
  464. /* rx_desc.in_use should be zero at this time*/
  465. qdf_assert_always(desc_list->rx_desc.in_use == 0);
  466. desc_list->rx_desc.in_use = 1;
  467. desc_list->rx_desc.in_err_state = 0;
  468. hal_rxdma_buff_addr_info_set(soc->hal_soc, rxdma_ring_entry,
  469. paddr,
  470. desc_list->rx_desc.cookie,
  471. rx_desc_pool->owner);
  472. desc_list = next;
  473. }
  474. qdf_dsb();
  475. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  476. /* No need to count the number of bytes received during replenish.
  477. * Therefore set replenish.pkts.bytes as 0.
  478. */
  479. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  480. return QDF_STATUS_SUCCESS;
  481. }
  482. #endif
  483. /*
  484. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  485. * called during dp rx initialization
  486. * and at the end of dp_rx_process.
  487. *
  488. * @soc: core txrx main context
  489. * @mac_id: mac_id which is one of 3 mac_ids
  490. * @dp_rxdma_srng: dp rxdma circular ring
  491. * @rx_desc_pool: Pointer to free Rx descriptor pool
  492. * @num_req_buffers: number of buffer to be replenished
  493. * @desc_list: list of descs if called from dp_rx_process
  494. * or NULL during dp rx initialization or out of buffer
  495. * interrupt.
  496. * @tail: tail of descs list
  497. * @func_name: name of the caller function
  498. * Return: return success or failure
  499. */
  500. QDF_STATUS __dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  501. struct dp_srng *dp_rxdma_srng,
  502. struct rx_desc_pool *rx_desc_pool,
  503. uint32_t num_req_buffers,
  504. union dp_rx_desc_list_elem_t **desc_list,
  505. union dp_rx_desc_list_elem_t **tail,
  506. const char *func_name)
  507. {
  508. uint32_t num_alloc_desc;
  509. uint16_t num_desc_to_free = 0;
  510. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  511. uint32_t num_entries_avail;
  512. uint32_t count;
  513. int sync_hw_ptr = 1;
  514. struct dp_rx_nbuf_frag_info nbuf_frag_info = {0};
  515. void *rxdma_ring_entry;
  516. union dp_rx_desc_list_elem_t *next;
  517. QDF_STATUS ret;
  518. void *rxdma_srng;
  519. union dp_rx_desc_list_elem_t *desc_list_append = NULL;
  520. union dp_rx_desc_list_elem_t *tail_append = NULL;
  521. union dp_rx_desc_list_elem_t *temp_list = NULL;
  522. rxdma_srng = dp_rxdma_srng->hal_srng;
  523. if (qdf_unlikely(!dp_pdev)) {
  524. dp_rx_err("%pK: pdev is null for mac_id = %d",
  525. dp_soc, mac_id);
  526. return QDF_STATUS_E_FAILURE;
  527. }
  528. if (qdf_unlikely(!rxdma_srng)) {
  529. dp_rx_debug("%pK: rxdma srng not initialized", dp_soc);
  530. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  531. return QDF_STATUS_E_FAILURE;
  532. }
  533. dp_rx_debug("%pK: requested %d buffers for replenish",
  534. dp_soc, num_req_buffers);
  535. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  536. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  537. rxdma_srng,
  538. sync_hw_ptr);
  539. dp_rx_debug("%pK: no of available entries in rxdma ring: %d",
  540. dp_soc, num_entries_avail);
  541. if (!(*desc_list) && (num_entries_avail >
  542. ((dp_rxdma_srng->num_entries * 3) / 4))) {
  543. num_req_buffers = num_entries_avail;
  544. } else if (num_entries_avail < num_req_buffers) {
  545. num_desc_to_free = num_req_buffers - num_entries_avail;
  546. num_req_buffers = num_entries_avail;
  547. } else if ((*desc_list) &&
  548. dp_rxdma_srng->num_entries - num_entries_avail <
  549. CRITICAL_BUFFER_THRESHOLD) {
  550. /* Append some free descriptors to tail */
  551. num_alloc_desc =
  552. dp_rx_get_free_desc_list(dp_soc, mac_id,
  553. rx_desc_pool,
  554. CRITICAL_BUFFER_THRESHOLD,
  555. &desc_list_append,
  556. &tail_append);
  557. if (num_alloc_desc) {
  558. temp_list = *desc_list;
  559. *desc_list = desc_list_append;
  560. tail_append->next = temp_list;
  561. num_req_buffers += num_alloc_desc;
  562. DP_STATS_DEC(dp_pdev,
  563. replenish.free_list,
  564. num_alloc_desc);
  565. } else
  566. dp_err_rl("%pK: no free rx_descs in freelist", dp_soc);
  567. }
  568. if (qdf_unlikely(!num_req_buffers)) {
  569. num_desc_to_free = num_req_buffers;
  570. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  571. goto free_descs;
  572. }
  573. /*
  574. * if desc_list is NULL, allocate the descs from freelist
  575. */
  576. if (!(*desc_list)) {
  577. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  578. rx_desc_pool,
  579. num_req_buffers,
  580. desc_list,
  581. tail);
  582. if (!num_alloc_desc) {
  583. dp_rx_err("%pK: no free rx_descs in freelist", dp_soc);
  584. DP_STATS_INC(dp_pdev, err.desc_alloc_fail,
  585. num_req_buffers);
  586. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  587. return QDF_STATUS_E_NOMEM;
  588. }
  589. dp_rx_debug("%pK: %d rx desc allocated", dp_soc, num_alloc_desc);
  590. num_req_buffers = num_alloc_desc;
  591. }
  592. count = 0;
  593. while (count < num_req_buffers) {
  594. /* Flag is set while pdev rx_desc_pool initialization */
  595. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  596. ret = dp_pdev_frag_alloc_and_map(dp_soc,
  597. &nbuf_frag_info,
  598. dp_pdev,
  599. rx_desc_pool);
  600. else
  601. ret = dp_pdev_nbuf_alloc_and_map_replenish(dp_soc,
  602. mac_id,
  603. num_entries_avail, &nbuf_frag_info,
  604. dp_pdev, rx_desc_pool);
  605. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  606. if (qdf_unlikely(ret == QDF_STATUS_E_FAULT))
  607. continue;
  608. break;
  609. }
  610. count++;
  611. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  612. rxdma_srng);
  613. qdf_assert_always(rxdma_ring_entry);
  614. next = (*desc_list)->next;
  615. /* Flag is set while pdev rx_desc_pool initialization */
  616. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  617. dp_rx_desc_frag_prep(&((*desc_list)->rx_desc),
  618. &nbuf_frag_info);
  619. else
  620. dp_rx_desc_prep(&((*desc_list)->rx_desc),
  621. &nbuf_frag_info);
  622. /* rx_desc.in_use should be zero at this time*/
  623. qdf_assert_always((*desc_list)->rx_desc.in_use == 0);
  624. (*desc_list)->rx_desc.in_use = 1;
  625. (*desc_list)->rx_desc.in_err_state = 0;
  626. dp_rx_desc_update_dbg_info(&(*desc_list)->rx_desc,
  627. func_name, RX_DESC_REPLENISHED);
  628. dp_verbose_debug("rx_netbuf=%pK, paddr=0x%llx, cookie=%d",
  629. nbuf_frag_info.virt_addr.nbuf,
  630. (unsigned long long)(nbuf_frag_info.paddr),
  631. (*desc_list)->rx_desc.cookie);
  632. hal_rxdma_buff_addr_info_set(dp_soc->hal_soc, rxdma_ring_entry,
  633. nbuf_frag_info.paddr,
  634. (*desc_list)->rx_desc.cookie,
  635. rx_desc_pool->owner);
  636. *desc_list = next;
  637. }
  638. dp_rx_refill_ring_record_entry(dp_soc, dp_pdev->lmac_id, rxdma_srng,
  639. num_req_buffers, count);
  640. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  641. dp_rx_schedule_refill_thread(dp_soc);
  642. dp_verbose_debug("replenished buffers %d, rx desc added back to free list %u",
  643. count, num_desc_to_free);
  644. /* No need to count the number of bytes received during replenish.
  645. * Therefore set replenish.pkts.bytes as 0.
  646. */
  647. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  648. DP_STATS_INC(dp_pdev, replenish.free_list, num_req_buffers - count);
  649. free_descs:
  650. DP_STATS_INC(dp_pdev, buf_freelist, num_desc_to_free);
  651. /*
  652. * add any available free desc back to the free list
  653. */
  654. if (*desc_list)
  655. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  656. mac_id, rx_desc_pool);
  657. return QDF_STATUS_SUCCESS;
  658. }
  659. qdf_export_symbol(__dp_rx_buffers_replenish);
  660. /*
  661. * dp_rx_deliver_raw() - process RAW mode pkts and hand over the
  662. * pkts to RAW mode simulation to
  663. * decapsulate the pkt.
  664. *
  665. * @vdev: vdev on which RAW mode is enabled
  666. * @nbuf_list: list of RAW pkts to process
  667. * @txrx_peer: peer object from which the pkt is rx
  668. *
  669. * Return: void
  670. */
  671. void
  672. dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  673. struct dp_txrx_peer *txrx_peer)
  674. {
  675. qdf_nbuf_t deliver_list_head = NULL;
  676. qdf_nbuf_t deliver_list_tail = NULL;
  677. qdf_nbuf_t nbuf;
  678. nbuf = nbuf_list;
  679. while (nbuf) {
  680. qdf_nbuf_t next = qdf_nbuf_next(nbuf);
  681. DP_RX_LIST_APPEND(deliver_list_head, deliver_list_tail, nbuf);
  682. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  683. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.raw, 1,
  684. qdf_nbuf_len(nbuf));
  685. /*
  686. * reset the chfrag_start and chfrag_end bits in nbuf cb
  687. * as this is a non-amsdu pkt and RAW mode simulation expects
  688. * these bit s to be 0 for non-amsdu pkt.
  689. */
  690. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  691. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  692. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  693. qdf_nbuf_set_rx_chfrag_end(nbuf, 0);
  694. }
  695. nbuf = next;
  696. }
  697. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &deliver_list_head,
  698. &deliver_list_tail);
  699. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  700. }
  701. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  702. #ifndef FEATURE_WDS
  703. void dp_rx_da_learn(struct dp_soc *soc, uint8_t *rx_tlv_hdr,
  704. struct dp_txrx_peer *ta_peer, qdf_nbuf_t nbuf)
  705. {
  706. }
  707. #endif
  708. #ifdef QCA_SUPPORT_TX_MIN_RATES_FOR_SPECIAL_FRAMES
  709. /*
  710. * dp_classify_critical_pkts() - API for marking critical packets
  711. * @soc: dp_soc context
  712. * @vdev: vdev on which packet is to be sent
  713. * @nbuf: nbuf that has to be classified
  714. *
  715. * The function parses the packet, identifies whether its a critical frame and
  716. * marks QDF_NBUF_CB_TX_EXTRA_IS_CRITICAL bit in qdf_nbuf_cb for the nbuf.
  717. * Code for marking which frames are CRITICAL is accessed via callback.
  718. * EAPOL, ARP, DHCP, DHCPv6, ICMPv6 NS/NA are the typical critical frames.
  719. *
  720. * Return: None
  721. */
  722. static
  723. void dp_classify_critical_pkts(struct dp_soc *soc, struct dp_vdev *vdev,
  724. qdf_nbuf_t nbuf)
  725. {
  726. if (vdev->tx_classify_critical_pkt_cb)
  727. vdev->tx_classify_critical_pkt_cb(vdev->osif_vdev, nbuf);
  728. }
  729. #else
  730. static inline
  731. void dp_classify_critical_pkts(struct dp_soc *soc, struct dp_vdev *vdev,
  732. qdf_nbuf_t nbuf)
  733. {
  734. }
  735. #endif
  736. #ifdef QCA_OL_TX_MULTIQ_SUPPORT
  737. static inline
  738. void dp_rx_nbuf_queue_mapping_set(qdf_nbuf_t nbuf, uint8_t ring_id)
  739. {
  740. qdf_nbuf_set_queue_mapping(nbuf, ring_id);
  741. }
  742. #else
  743. static inline
  744. void dp_rx_nbuf_queue_mapping_set(qdf_nbuf_t nbuf, uint8_t ring_id)
  745. {
  746. }
  747. #endif
  748. /*
  749. * dp_rx_intrabss_mcbc_fwd() - Does intrabss forward for mcast packets
  750. *
  751. * @soc: core txrx main context
  752. * @ta_peer : source peer entry
  753. * @rx_tlv_hdr : start address of rx tlvs
  754. * @nbuf : nbuf that has to be intrabss forwarded
  755. * @tid_stats : tid stats pointer
  756. *
  757. * Return: bool: true if it is forwarded else false
  758. */
  759. bool dp_rx_intrabss_mcbc_fwd(struct dp_soc *soc, struct dp_txrx_peer *ta_peer,
  760. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  761. struct cdp_tid_rx_stats *tid_stats)
  762. {
  763. uint16_t len;
  764. qdf_nbuf_t nbuf_copy;
  765. if (dp_rx_intrabss_eapol_drop_check(soc, ta_peer, rx_tlv_hdr,
  766. nbuf))
  767. return true;
  768. if (!dp_rx_check_ndi_mdns_fwding(ta_peer, nbuf))
  769. return false;
  770. /* If the source peer in the isolation list
  771. * then dont forward instead push to bridge stack
  772. */
  773. if (dp_get_peer_isolation(ta_peer))
  774. return false;
  775. nbuf_copy = qdf_nbuf_copy(nbuf);
  776. if (!nbuf_copy)
  777. return false;
  778. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  779. qdf_mem_set(nbuf_copy->cb, 0x0, sizeof(nbuf_copy->cb));
  780. dp_classify_critical_pkts(soc, ta_peer->vdev, nbuf_copy);
  781. if (soc->arch_ops.dp_rx_intrabss_handle_nawds(soc, ta_peer, nbuf_copy,
  782. tid_stats))
  783. return false;
  784. if (dp_tx_send((struct cdp_soc_t *)soc,
  785. ta_peer->vdev->vdev_id, nbuf_copy)) {
  786. DP_PEER_PER_PKT_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1,
  787. len);
  788. tid_stats->fail_cnt[INTRABSS_DROP]++;
  789. dp_rx_nbuf_free(nbuf_copy);
  790. } else {
  791. DP_PEER_PER_PKT_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1,
  792. len);
  793. tid_stats->intrabss_cnt++;
  794. }
  795. return false;
  796. }
  797. /*
  798. * dp_rx_intrabss_ucast_fwd() - Does intrabss forward for unicast packets
  799. *
  800. * @soc: core txrx main context
  801. * @ta_peer: source peer entry
  802. * @tx_vdev_id: VDEV ID for Intra-BSS TX
  803. * @rx_tlv_hdr: start address of rx tlvs
  804. * @nbuf: nbuf that has to be intrabss forwarded
  805. * @tid_stats: tid stats pointer
  806. *
  807. * Return: bool: true if it is forwarded else false
  808. */
  809. bool dp_rx_intrabss_ucast_fwd(struct dp_soc *soc, struct dp_txrx_peer *ta_peer,
  810. uint8_t tx_vdev_id,
  811. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  812. struct cdp_tid_rx_stats *tid_stats)
  813. {
  814. uint16_t len;
  815. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  816. /* linearize the nbuf just before we send to
  817. * dp_tx_send()
  818. */
  819. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  820. if (qdf_nbuf_linearize(nbuf) == -ENOMEM)
  821. return false;
  822. nbuf = qdf_nbuf_unshare(nbuf);
  823. if (!nbuf) {
  824. DP_PEER_PER_PKT_STATS_INC_PKT(ta_peer,
  825. rx.intra_bss.fail,
  826. 1, len);
  827. /* return true even though the pkt is
  828. * not forwarded. Basically skb_unshare
  829. * failed and we want to continue with
  830. * next nbuf.
  831. */
  832. tid_stats->fail_cnt[INTRABSS_DROP]++;
  833. return false;
  834. }
  835. }
  836. qdf_mem_set(nbuf->cb, 0x0, sizeof(nbuf->cb));
  837. dp_classify_critical_pkts(soc, ta_peer->vdev, nbuf);
  838. if (!dp_tx_send((struct cdp_soc_t *)soc,
  839. tx_vdev_id, nbuf)) {
  840. DP_PEER_PER_PKT_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1,
  841. len);
  842. } else {
  843. DP_PEER_PER_PKT_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1,
  844. len);
  845. tid_stats->fail_cnt[INTRABSS_DROP]++;
  846. return false;
  847. }
  848. return true;
  849. }
  850. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  851. #ifdef MESH_MODE_SUPPORT
  852. /**
  853. * dp_rx_fill_mesh_stats() - Fills the mesh per packet receive stats
  854. *
  855. * @vdev: DP Virtual device handle
  856. * @nbuf: Buffer pointer
  857. * @rx_tlv_hdr: start of rx tlv header
  858. * @txrx_peer: pointer to peer
  859. *
  860. * This function allocated memory for mesh receive stats and fill the
  861. * required stats. Stores the memory address in skb cb.
  862. *
  863. * Return: void
  864. */
  865. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  866. uint8_t *rx_tlv_hdr,
  867. struct dp_txrx_peer *txrx_peer)
  868. {
  869. struct mesh_recv_hdr_s *rx_info = NULL;
  870. uint32_t pkt_type;
  871. uint32_t nss;
  872. uint32_t rate_mcs;
  873. uint32_t bw;
  874. uint8_t primary_chan_num;
  875. uint32_t center_chan_freq;
  876. struct dp_soc *soc = vdev->pdev->soc;
  877. struct dp_peer *peer;
  878. struct dp_peer *primary_link_peer;
  879. struct dp_soc *link_peer_soc;
  880. cdp_peer_stats_param_t buf = {0};
  881. /* fill recv mesh stats */
  882. rx_info = qdf_mem_malloc(sizeof(struct mesh_recv_hdr_s));
  883. /* upper layers are resposible to free this memory */
  884. if (!rx_info) {
  885. dp_rx_err("%pK: Memory allocation failed for mesh rx stats",
  886. vdev->pdev->soc);
  887. DP_STATS_INC(vdev->pdev, mesh_mem_alloc, 1);
  888. return;
  889. }
  890. rx_info->rs_flags = MESH_RXHDR_VER1;
  891. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  892. rx_info->rs_flags |= MESH_RX_FIRST_MSDU;
  893. if (qdf_nbuf_is_rx_chfrag_end(nbuf))
  894. rx_info->rs_flags |= MESH_RX_LAST_MSDU;
  895. peer = dp_peer_get_ref_by_id(soc, txrx_peer->peer_id, DP_MOD_ID_MESH);
  896. if (peer) {
  897. if (hal_rx_tlv_get_is_decrypted(soc->hal_soc, rx_tlv_hdr)) {
  898. rx_info->rs_flags |= MESH_RX_DECRYPTED;
  899. rx_info->rs_keyix = hal_rx_msdu_get_keyid(soc->hal_soc,
  900. rx_tlv_hdr);
  901. if (vdev->osif_get_key)
  902. vdev->osif_get_key(vdev->osif_vdev,
  903. &rx_info->rs_decryptkey[0],
  904. &peer->mac_addr.raw[0],
  905. rx_info->rs_keyix);
  906. }
  907. dp_peer_unref_delete(peer, DP_MOD_ID_MESH);
  908. }
  909. primary_link_peer = dp_get_primary_link_peer_by_id(soc,
  910. txrx_peer->peer_id,
  911. DP_MOD_ID_MESH);
  912. if (qdf_likely(primary_link_peer)) {
  913. link_peer_soc = primary_link_peer->vdev->pdev->soc;
  914. dp_monitor_peer_get_stats_param(link_peer_soc,
  915. primary_link_peer,
  916. cdp_peer_rx_snr, &buf);
  917. rx_info->rs_snr = buf.rx_snr;
  918. dp_peer_unref_delete(primary_link_peer, DP_MOD_ID_MESH);
  919. }
  920. rx_info->rs_rssi = rx_info->rs_snr + DP_DEFAULT_NOISEFLOOR;
  921. soc = vdev->pdev->soc;
  922. primary_chan_num = hal_rx_tlv_get_freq(soc->hal_soc, rx_tlv_hdr);
  923. center_chan_freq = hal_rx_tlv_get_freq(soc->hal_soc, rx_tlv_hdr) >> 16;
  924. if (soc->cdp_soc.ol_ops && soc->cdp_soc.ol_ops->freq_to_band) {
  925. rx_info->rs_band = soc->cdp_soc.ol_ops->freq_to_band(
  926. soc->ctrl_psoc,
  927. vdev->pdev->pdev_id,
  928. center_chan_freq);
  929. }
  930. rx_info->rs_channel = primary_chan_num;
  931. pkt_type = hal_rx_tlv_get_pkt_type(soc->hal_soc, rx_tlv_hdr);
  932. rate_mcs = hal_rx_tlv_rate_mcs_get(soc->hal_soc, rx_tlv_hdr);
  933. bw = hal_rx_tlv_bw_get(soc->hal_soc, rx_tlv_hdr);
  934. nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
  935. rx_info->rs_ratephy1 = rate_mcs | (nss << 0x8) | (pkt_type << 16) |
  936. (bw << 24);
  937. qdf_nbuf_set_rx_fctx_type(nbuf, (void *)rx_info, CB_FTYPE_MESH_RX_INFO);
  938. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_MED,
  939. FL("Mesh rx stats: flags %x, rssi %x, chn %x, rate %x, kix %x, snr %x"),
  940. rx_info->rs_flags,
  941. rx_info->rs_rssi,
  942. rx_info->rs_channel,
  943. rx_info->rs_ratephy1,
  944. rx_info->rs_keyix,
  945. rx_info->rs_snr);
  946. }
  947. /**
  948. * dp_rx_filter_mesh_packets() - Filters mesh unwanted packets
  949. *
  950. * @vdev: DP Virtual device handle
  951. * @nbuf: Buffer pointer
  952. * @rx_tlv_hdr: start of rx tlv header
  953. *
  954. * This checks if the received packet is matching any filter out
  955. * catogery and and drop the packet if it matches.
  956. *
  957. * Return: status(0 indicates drop, 1 indicate to no drop)
  958. */
  959. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  960. uint8_t *rx_tlv_hdr)
  961. {
  962. union dp_align_mac_addr mac_addr;
  963. struct dp_soc *soc = vdev->pdev->soc;
  964. if (qdf_unlikely(vdev->mesh_rx_filter)) {
  965. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_FROMDS)
  966. if (hal_rx_mpdu_get_fr_ds(soc->hal_soc,
  967. rx_tlv_hdr))
  968. return QDF_STATUS_SUCCESS;
  969. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TODS)
  970. if (hal_rx_mpdu_get_to_ds(soc->hal_soc,
  971. rx_tlv_hdr))
  972. return QDF_STATUS_SUCCESS;
  973. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_NODS)
  974. if (!hal_rx_mpdu_get_fr_ds(soc->hal_soc,
  975. rx_tlv_hdr) &&
  976. !hal_rx_mpdu_get_to_ds(soc->hal_soc,
  977. rx_tlv_hdr))
  978. return QDF_STATUS_SUCCESS;
  979. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_RA) {
  980. if (hal_rx_mpdu_get_addr1(soc->hal_soc,
  981. rx_tlv_hdr,
  982. &mac_addr.raw[0]))
  983. return QDF_STATUS_E_FAILURE;
  984. if (!qdf_mem_cmp(&mac_addr.raw[0],
  985. &vdev->mac_addr.raw[0],
  986. QDF_MAC_ADDR_SIZE))
  987. return QDF_STATUS_SUCCESS;
  988. }
  989. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TA) {
  990. if (hal_rx_mpdu_get_addr2(soc->hal_soc,
  991. rx_tlv_hdr,
  992. &mac_addr.raw[0]))
  993. return QDF_STATUS_E_FAILURE;
  994. if (!qdf_mem_cmp(&mac_addr.raw[0],
  995. &vdev->mac_addr.raw[0],
  996. QDF_MAC_ADDR_SIZE))
  997. return QDF_STATUS_SUCCESS;
  998. }
  999. }
  1000. return QDF_STATUS_E_FAILURE;
  1001. }
  1002. #else
  1003. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1004. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *peer)
  1005. {
  1006. }
  1007. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1008. uint8_t *rx_tlv_hdr)
  1009. {
  1010. return QDF_STATUS_E_FAILURE;
  1011. }
  1012. #endif
  1013. #ifdef FEATURE_NAC_RSSI
  1014. /**
  1015. * dp_rx_process_invalid_peer(): Function to pass invalid peer list to umac
  1016. * @soc: DP SOC handle
  1017. * @mpdu: mpdu for which peer is invalid
  1018. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  1019. * pool_id has same mapping)
  1020. *
  1021. * return: integer type
  1022. */
  1023. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  1024. uint8_t mac_id)
  1025. {
  1026. struct dp_invalid_peer_msg msg;
  1027. struct dp_vdev *vdev = NULL;
  1028. struct dp_pdev *pdev = NULL;
  1029. struct ieee80211_frame *wh;
  1030. qdf_nbuf_t curr_nbuf, next_nbuf;
  1031. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  1032. uint8_t *rx_pkt_hdr = NULL;
  1033. int i = 0;
  1034. if (!HAL_IS_DECAP_FORMAT_RAW(soc->hal_soc, rx_tlv_hdr)) {
  1035. dp_rx_debug("%pK: Drop decapped frames", soc);
  1036. goto free;
  1037. }
  1038. /* In RAW packet, packet header will be part of data */
  1039. rx_pkt_hdr = rx_tlv_hdr + soc->rx_pkt_tlv_size;
  1040. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  1041. if (!DP_FRAME_IS_DATA(wh)) {
  1042. dp_rx_debug("%pK: NAWDS valid only for data frames", soc);
  1043. goto free;
  1044. }
  1045. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  1046. dp_rx_err("%pK: Invalid nbuf length", soc);
  1047. goto free;
  1048. }
  1049. /* In DMAC case the rx_desc_pools are common across PDEVs
  1050. * so PDEV cannot be derived from the pool_id.
  1051. *
  1052. * link_id need to derived from the TLV tag word which is
  1053. * disabled by default. For now adding a WAR to get vdev
  1054. * with brute force this need to fixed with word based subscription
  1055. * support is added by enabling TLV tag word
  1056. */
  1057. if (soc->features.dmac_cmn_src_rxbuf_ring_enabled) {
  1058. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1059. pdev = soc->pdev_list[i];
  1060. if (!pdev || qdf_unlikely(pdev->is_pdev_down))
  1061. continue;
  1062. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  1063. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  1064. QDF_MAC_ADDR_SIZE) == 0) {
  1065. goto out;
  1066. }
  1067. }
  1068. }
  1069. } else {
  1070. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1071. if (!pdev || qdf_unlikely(pdev->is_pdev_down)) {
  1072. dp_rx_err("%pK: PDEV %s",
  1073. soc, !pdev ? "not found" : "down");
  1074. goto free;
  1075. }
  1076. if (dp_monitor_filter_neighbour_peer(pdev, rx_pkt_hdr) ==
  1077. QDF_STATUS_SUCCESS)
  1078. return 0;
  1079. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  1080. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  1081. QDF_MAC_ADDR_SIZE) == 0) {
  1082. goto out;
  1083. }
  1084. }
  1085. }
  1086. if (!vdev) {
  1087. dp_rx_err("%pK: VDEV not found", soc);
  1088. goto free;
  1089. }
  1090. out:
  1091. msg.wh = wh;
  1092. qdf_nbuf_pull_head(mpdu, soc->rx_pkt_tlv_size);
  1093. msg.nbuf = mpdu;
  1094. msg.vdev_id = vdev->vdev_id;
  1095. /*
  1096. * NOTE: Only valid for HKv1.
  1097. * If smart monitor mode is enabled on RE, we are getting invalid
  1098. * peer frames with RA as STA mac of RE and the TA not matching
  1099. * with any NAC list or the the BSSID.Such frames need to dropped
  1100. * in order to avoid HM_WDS false addition.
  1101. */
  1102. if (pdev->soc->cdp_soc.ol_ops->rx_invalid_peer) {
  1103. if (dp_monitor_drop_inv_peer_pkts(vdev) == QDF_STATUS_SUCCESS) {
  1104. dp_rx_warn("%pK: Drop inv peer pkts with STA RA:%pm",
  1105. soc, wh->i_addr1);
  1106. goto free;
  1107. }
  1108. pdev->soc->cdp_soc.ol_ops->rx_invalid_peer(
  1109. (struct cdp_ctrl_objmgr_psoc *)soc->ctrl_psoc,
  1110. pdev->pdev_id, &msg);
  1111. }
  1112. free:
  1113. /* Drop and free packet */
  1114. curr_nbuf = mpdu;
  1115. while (curr_nbuf) {
  1116. next_nbuf = qdf_nbuf_next(curr_nbuf);
  1117. dp_rx_nbuf_free(curr_nbuf);
  1118. curr_nbuf = next_nbuf;
  1119. }
  1120. return 0;
  1121. }
  1122. /**
  1123. * dp_rx_process_invalid_peer_wrapper(): Function to wrap invalid peer handler
  1124. * @soc: DP SOC handle
  1125. * @mpdu: mpdu for which peer is invalid
  1126. * @mpdu_done: if an mpdu is completed
  1127. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  1128. * pool_id has same mapping)
  1129. *
  1130. * return: integer type
  1131. */
  1132. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  1133. qdf_nbuf_t mpdu, bool mpdu_done,
  1134. uint8_t mac_id)
  1135. {
  1136. /* Only trigger the process when mpdu is completed */
  1137. if (mpdu_done)
  1138. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  1139. }
  1140. #else
  1141. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  1142. uint8_t mac_id)
  1143. {
  1144. qdf_nbuf_t curr_nbuf, next_nbuf;
  1145. struct dp_pdev *pdev;
  1146. struct dp_vdev *vdev = NULL;
  1147. struct ieee80211_frame *wh;
  1148. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  1149. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(soc->hal_soc, rx_tlv_hdr);
  1150. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  1151. if (!DP_FRAME_IS_DATA(wh)) {
  1152. QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP,
  1153. "only for data frames");
  1154. goto free;
  1155. }
  1156. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  1157. dp_rx_info_rl("%pK: Invalid nbuf length", soc);
  1158. goto free;
  1159. }
  1160. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1161. if (!pdev) {
  1162. dp_rx_info_rl("%pK: PDEV not found", soc);
  1163. goto free;
  1164. }
  1165. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  1166. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  1167. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  1168. QDF_MAC_ADDR_SIZE) == 0) {
  1169. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  1170. goto out;
  1171. }
  1172. }
  1173. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  1174. if (!vdev) {
  1175. dp_rx_info_rl("%pK: VDEV not found", soc);
  1176. goto free;
  1177. }
  1178. out:
  1179. if (soc->cdp_soc.ol_ops->rx_invalid_peer)
  1180. soc->cdp_soc.ol_ops->rx_invalid_peer(vdev->vdev_id, wh);
  1181. free:
  1182. /* reset the head and tail pointers */
  1183. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1184. if (pdev) {
  1185. pdev->invalid_peer_head_msdu = NULL;
  1186. pdev->invalid_peer_tail_msdu = NULL;
  1187. }
  1188. /* Drop and free packet */
  1189. curr_nbuf = mpdu;
  1190. while (curr_nbuf) {
  1191. next_nbuf = qdf_nbuf_next(curr_nbuf);
  1192. dp_rx_nbuf_free(curr_nbuf);
  1193. curr_nbuf = next_nbuf;
  1194. }
  1195. /* Reset the head and tail pointers */
  1196. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1197. if (pdev) {
  1198. pdev->invalid_peer_head_msdu = NULL;
  1199. pdev->invalid_peer_tail_msdu = NULL;
  1200. }
  1201. return 0;
  1202. }
  1203. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  1204. qdf_nbuf_t mpdu, bool mpdu_done,
  1205. uint8_t mac_id)
  1206. {
  1207. /* Process the nbuf */
  1208. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  1209. }
  1210. #endif
  1211. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1212. #ifdef RECEIVE_OFFLOAD
  1213. /**
  1214. * dp_rx_print_offload_info() - Print offload info from RX TLV
  1215. * @soc: dp soc handle
  1216. * @msdu: MSDU for which the offload info is to be printed
  1217. *
  1218. * Return: None
  1219. */
  1220. static void dp_rx_print_offload_info(struct dp_soc *soc,
  1221. qdf_nbuf_t msdu)
  1222. {
  1223. dp_verbose_debug("----------------------RX DESC LRO/GRO----------------------");
  1224. dp_verbose_debug("lro_eligible 0x%x",
  1225. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu));
  1226. dp_verbose_debug("pure_ack 0x%x", QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu));
  1227. dp_verbose_debug("chksum 0x%x", QDF_NBUF_CB_RX_TCP_CHKSUM(msdu));
  1228. dp_verbose_debug("TCP seq num 0x%x", QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu));
  1229. dp_verbose_debug("TCP ack num 0x%x", QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu));
  1230. dp_verbose_debug("TCP window 0x%x", QDF_NBUF_CB_RX_TCP_WIN(msdu));
  1231. dp_verbose_debug("TCP protocol 0x%x", QDF_NBUF_CB_RX_TCP_PROTO(msdu));
  1232. dp_verbose_debug("TCP offset 0x%x", QDF_NBUF_CB_RX_TCP_OFFSET(msdu));
  1233. dp_verbose_debug("toeplitz 0x%x", QDF_NBUF_CB_RX_FLOW_ID(msdu));
  1234. dp_verbose_debug("---------------------------------------------------------");
  1235. }
  1236. /**
  1237. * dp_rx_fill_gro_info() - Fill GRO info from RX TLV into skb->cb
  1238. * @soc: DP SOC handle
  1239. * @rx_tlv: RX TLV received for the msdu
  1240. * @msdu: msdu for which GRO info needs to be filled
  1241. * @rx_ol_pkt_cnt: counter to be incremented for GRO eligible packets
  1242. *
  1243. * Return: None
  1244. */
  1245. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  1246. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt)
  1247. {
  1248. struct hal_offload_info offload_info;
  1249. if (!wlan_cfg_is_gro_enabled(soc->wlan_cfg_ctx))
  1250. return;
  1251. if (hal_rx_tlv_get_offload_info(soc->hal_soc, rx_tlv, &offload_info))
  1252. return;
  1253. *rx_ol_pkt_cnt = *rx_ol_pkt_cnt + 1;
  1254. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) = offload_info.lro_eligible;
  1255. QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu) = offload_info.tcp_pure_ack;
  1256. QDF_NBUF_CB_RX_TCP_CHKSUM(msdu) =
  1257. hal_rx_tlv_get_tcp_chksum(soc->hal_soc,
  1258. rx_tlv);
  1259. QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu) = offload_info.tcp_seq_num;
  1260. QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu) = offload_info.tcp_ack_num;
  1261. QDF_NBUF_CB_RX_TCP_WIN(msdu) = offload_info.tcp_win;
  1262. QDF_NBUF_CB_RX_TCP_PROTO(msdu) = offload_info.tcp_proto;
  1263. QDF_NBUF_CB_RX_IPV6_PROTO(msdu) = offload_info.ipv6_proto;
  1264. QDF_NBUF_CB_RX_TCP_OFFSET(msdu) = offload_info.tcp_offset;
  1265. QDF_NBUF_CB_RX_FLOW_ID(msdu) = offload_info.flow_id;
  1266. dp_rx_print_offload_info(soc, msdu);
  1267. }
  1268. #endif /* RECEIVE_OFFLOAD */
  1269. /**
  1270. * dp_rx_adjust_nbuf_len() - set appropriate msdu length in nbuf.
  1271. *
  1272. * @soc: DP soc handle
  1273. * @nbuf: pointer to msdu.
  1274. * @mpdu_len: mpdu length
  1275. * @l3_pad_len: L3 padding length by HW
  1276. *
  1277. * Return: returns true if nbuf is last msdu of mpdu else retuns false.
  1278. */
  1279. static inline bool dp_rx_adjust_nbuf_len(struct dp_soc *soc,
  1280. qdf_nbuf_t nbuf,
  1281. uint16_t *mpdu_len,
  1282. uint32_t l3_pad_len)
  1283. {
  1284. bool last_nbuf;
  1285. uint32_t pkt_hdr_size;
  1286. pkt_hdr_size = soc->rx_pkt_tlv_size + l3_pad_len;
  1287. if ((*mpdu_len + pkt_hdr_size) > RX_DATA_BUFFER_SIZE) {
  1288. qdf_nbuf_set_pktlen(nbuf, RX_DATA_BUFFER_SIZE);
  1289. last_nbuf = false;
  1290. *mpdu_len -= (RX_DATA_BUFFER_SIZE - pkt_hdr_size);
  1291. } else {
  1292. qdf_nbuf_set_pktlen(nbuf, (*mpdu_len + pkt_hdr_size));
  1293. last_nbuf = true;
  1294. *mpdu_len = 0;
  1295. }
  1296. return last_nbuf;
  1297. }
  1298. /**
  1299. * dp_get_l3_hdr_pad_len() - get L3 header padding length.
  1300. *
  1301. * @soc: DP soc handle
  1302. * @nbuf: pointer to msdu.
  1303. *
  1304. * Return: returns padding length in bytes.
  1305. */
  1306. static inline uint32_t dp_get_l3_hdr_pad_len(struct dp_soc *soc,
  1307. qdf_nbuf_t nbuf)
  1308. {
  1309. uint32_t l3_hdr_pad = 0;
  1310. uint8_t *rx_tlv_hdr;
  1311. struct hal_rx_msdu_metadata msdu_metadata;
  1312. while (nbuf) {
  1313. if (!qdf_nbuf_is_rx_chfrag_cont(nbuf)) {
  1314. /* scattered msdu end with continuation is 0 */
  1315. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1316. hal_rx_msdu_metadata_get(soc->hal_soc,
  1317. rx_tlv_hdr,
  1318. &msdu_metadata);
  1319. l3_hdr_pad = msdu_metadata.l3_hdr_pad;
  1320. break;
  1321. }
  1322. nbuf = nbuf->next;
  1323. }
  1324. return l3_hdr_pad;
  1325. }
  1326. /**
  1327. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  1328. * multiple nbufs.
  1329. * @soc: DP SOC handle
  1330. * @nbuf: pointer to the first msdu of an amsdu.
  1331. *
  1332. * This function implements the creation of RX frag_list for cases
  1333. * where an MSDU is spread across multiple nbufs.
  1334. *
  1335. * Return: returns the head nbuf which contains complete frag_list.
  1336. */
  1337. qdf_nbuf_t dp_rx_sg_create(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1338. {
  1339. qdf_nbuf_t parent, frag_list, next = NULL;
  1340. uint16_t frag_list_len = 0;
  1341. uint16_t mpdu_len;
  1342. bool last_nbuf;
  1343. uint32_t l3_hdr_pad_offset = 0;
  1344. /*
  1345. * Use msdu len got from REO entry descriptor instead since
  1346. * there is case the RX PKT TLV is corrupted while msdu_len
  1347. * from REO descriptor is right for non-raw RX scatter msdu.
  1348. */
  1349. mpdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1350. /*
  1351. * this is a case where the complete msdu fits in one single nbuf.
  1352. * in this case HW sets both start and end bit and we only need to
  1353. * reset these bits for RAW mode simulator to decap the pkt
  1354. */
  1355. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  1356. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  1357. qdf_nbuf_set_pktlen(nbuf, mpdu_len + soc->rx_pkt_tlv_size);
  1358. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  1359. return nbuf;
  1360. }
  1361. l3_hdr_pad_offset = dp_get_l3_hdr_pad_len(soc, nbuf);
  1362. /*
  1363. * This is a case where we have multiple msdus (A-MSDU) spread across
  1364. * multiple nbufs. here we create a fraglist out of these nbufs.
  1365. *
  1366. * the moment we encounter a nbuf with continuation bit set we
  1367. * know for sure we have an MSDU which is spread across multiple
  1368. * nbufs. We loop through and reap nbufs till we reach last nbuf.
  1369. */
  1370. parent = nbuf;
  1371. frag_list = nbuf->next;
  1372. nbuf = nbuf->next;
  1373. /*
  1374. * set the start bit in the first nbuf we encounter with continuation
  1375. * bit set. This has the proper mpdu length set as it is the first
  1376. * msdu of the mpdu. this becomes the parent nbuf and the subsequent
  1377. * nbufs will form the frag_list of the parent nbuf.
  1378. */
  1379. qdf_nbuf_set_rx_chfrag_start(parent, 1);
  1380. /*
  1381. * L3 header padding is only needed for the 1st buffer
  1382. * in a scattered msdu
  1383. */
  1384. last_nbuf = dp_rx_adjust_nbuf_len(soc, parent, &mpdu_len,
  1385. l3_hdr_pad_offset);
  1386. /*
  1387. * MSDU cont bit is set but reported MPDU length can fit
  1388. * in to single buffer
  1389. *
  1390. * Increment error stats and avoid SG list creation
  1391. */
  1392. if (last_nbuf) {
  1393. DP_STATS_INC(soc, rx.err.msdu_continuation_err, 1);
  1394. qdf_nbuf_pull_head(parent,
  1395. soc->rx_pkt_tlv_size + l3_hdr_pad_offset);
  1396. return parent;
  1397. }
  1398. /*
  1399. * this is where we set the length of the fragments which are
  1400. * associated to the parent nbuf. We iterate through the frag_list
  1401. * till we hit the last_nbuf of the list.
  1402. */
  1403. do {
  1404. last_nbuf = dp_rx_adjust_nbuf_len(soc, nbuf, &mpdu_len, 0);
  1405. qdf_nbuf_pull_head(nbuf,
  1406. soc->rx_pkt_tlv_size);
  1407. frag_list_len += qdf_nbuf_len(nbuf);
  1408. if (last_nbuf) {
  1409. next = nbuf->next;
  1410. nbuf->next = NULL;
  1411. break;
  1412. } else if (qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  1413. dp_err("Invalid packet length\n");
  1414. qdf_assert_always(0);
  1415. }
  1416. nbuf = nbuf->next;
  1417. } while (!last_nbuf);
  1418. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  1419. qdf_nbuf_append_ext_list(parent, frag_list, frag_list_len);
  1420. parent->next = next;
  1421. qdf_nbuf_pull_head(parent,
  1422. soc->rx_pkt_tlv_size + l3_hdr_pad_offset);
  1423. return parent;
  1424. }
  1425. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1426. #ifdef QCA_PEER_EXT_STATS
  1427. /*
  1428. * dp_rx_compute_tid_delay - Computer per TID delay stats
  1429. * @peer: DP soc context
  1430. * @nbuf: NBuffer
  1431. *
  1432. * Return: Void
  1433. */
  1434. void dp_rx_compute_tid_delay(struct cdp_delay_tid_stats *stats,
  1435. qdf_nbuf_t nbuf)
  1436. {
  1437. struct cdp_delay_rx_stats *rx_delay = &stats->rx_delay;
  1438. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  1439. dp_hist_update_stats(&rx_delay->to_stack_delay, to_stack);
  1440. }
  1441. #endif /* QCA_PEER_EXT_STATS */
  1442. /**
  1443. * dp_rx_compute_delay() - Compute and fill in all timestamps
  1444. * to pass in correct fields
  1445. *
  1446. * @vdev: pdev handle
  1447. * @tx_desc: tx descriptor
  1448. * @tid: tid value
  1449. * Return: none
  1450. */
  1451. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  1452. {
  1453. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  1454. int64_t current_ts = qdf_ktime_to_ms(qdf_ktime_get());
  1455. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  1456. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  1457. uint32_t interframe_delay =
  1458. (uint32_t)(current_ts - vdev->prev_rx_deliver_tstamp);
  1459. struct cdp_tid_rx_stats *rstats =
  1460. &vdev->pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  1461. dp_update_delay_stats(NULL, rstats, to_stack, tid,
  1462. CDP_DELAY_STATS_REAP_STACK, ring_id, false);
  1463. /*
  1464. * Update interframe delay stats calculated at deliver_data_ol point.
  1465. * Value of vdev->prev_rx_deliver_tstamp will be 0 for 1st frame, so
  1466. * interframe delay will not be calculate correctly for 1st frame.
  1467. * On the other side, this will help in avoiding extra per packet check
  1468. * of vdev->prev_rx_deliver_tstamp.
  1469. */
  1470. dp_update_delay_stats(NULL, rstats, interframe_delay, tid,
  1471. CDP_DELAY_STATS_RX_INTERFRAME, ring_id, false);
  1472. vdev->prev_rx_deliver_tstamp = current_ts;
  1473. }
  1474. /**
  1475. * dp_rx_drop_nbuf_list() - drop an nbuf list
  1476. * @pdev: dp pdev reference
  1477. * @buf_list: buffer list to be dropepd
  1478. *
  1479. * Return: int (number of bufs dropped)
  1480. */
  1481. static inline int dp_rx_drop_nbuf_list(struct dp_pdev *pdev,
  1482. qdf_nbuf_t buf_list)
  1483. {
  1484. struct cdp_tid_rx_stats *stats = NULL;
  1485. uint8_t tid = 0, ring_id = 0;
  1486. int num_dropped = 0;
  1487. qdf_nbuf_t buf, next_buf;
  1488. buf = buf_list;
  1489. while (buf) {
  1490. ring_id = QDF_NBUF_CB_RX_CTX_ID(buf);
  1491. next_buf = qdf_nbuf_queue_next(buf);
  1492. tid = qdf_nbuf_get_tid_val(buf);
  1493. if (qdf_likely(pdev)) {
  1494. stats = &pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  1495. stats->fail_cnt[INVALID_PEER_VDEV]++;
  1496. stats->delivered_to_stack--;
  1497. }
  1498. dp_rx_nbuf_free(buf);
  1499. buf = next_buf;
  1500. num_dropped++;
  1501. }
  1502. return num_dropped;
  1503. }
  1504. #ifdef QCA_SUPPORT_WDS_EXTENDED
  1505. /**
  1506. * dp_rx_deliver_to_stack_ext() - Deliver to netdev per sta
  1507. * @soc: core txrx main context
  1508. * @vdev: vdev
  1509. * @txrx_peer: txrx peer
  1510. * @nbuf_head: skb list head
  1511. *
  1512. * Return: true if packet is delivered to netdev per STA.
  1513. */
  1514. static inline bool
  1515. dp_rx_deliver_to_stack_ext(struct dp_soc *soc, struct dp_vdev *vdev,
  1516. struct dp_txrx_peer *txrx_peer, qdf_nbuf_t nbuf_head)
  1517. {
  1518. /*
  1519. * When extended WDS is disabled, frames are sent to AP netdevice.
  1520. */
  1521. if (qdf_likely(!vdev->wds_ext_enabled))
  1522. return false;
  1523. /*
  1524. * There can be 2 cases:
  1525. * 1. Send frame to parent netdev if its not for netdev per STA
  1526. * 2. If frame is meant for netdev per STA:
  1527. * a. Send frame to appropriate netdev using registered fp.
  1528. * b. If fp is NULL, drop the frames.
  1529. */
  1530. if (!txrx_peer->wds_ext.init)
  1531. return false;
  1532. if (txrx_peer->osif_rx)
  1533. txrx_peer->osif_rx(txrx_peer->wds_ext.osif_peer, nbuf_head);
  1534. else
  1535. dp_rx_drop_nbuf_list(vdev->pdev, nbuf_head);
  1536. return true;
  1537. }
  1538. #else
  1539. static inline bool
  1540. dp_rx_deliver_to_stack_ext(struct dp_soc *soc, struct dp_vdev *vdev,
  1541. struct dp_txrx_peer *txrx_peer, qdf_nbuf_t nbuf_head)
  1542. {
  1543. return false;
  1544. }
  1545. #endif
  1546. #ifdef PEER_CACHE_RX_PKTS
  1547. /**
  1548. * dp_rx_flush_rx_cached() - flush cached rx frames
  1549. * @peer: peer
  1550. * @drop: flag to drop frames or forward to net stack
  1551. *
  1552. * Return: None
  1553. */
  1554. void dp_rx_flush_rx_cached(struct dp_peer *peer, bool drop)
  1555. {
  1556. struct dp_peer_cached_bufq *bufqi;
  1557. struct dp_rx_cached_buf *cache_buf = NULL;
  1558. ol_txrx_rx_fp data_rx = NULL;
  1559. int num_buff_elem;
  1560. QDF_STATUS status;
  1561. /*
  1562. * Flush dp cached frames only for mld peers and legacy peers, as
  1563. * link peers don't store cached frames
  1564. */
  1565. if (IS_MLO_DP_LINK_PEER(peer))
  1566. return;
  1567. if (!peer->txrx_peer) {
  1568. dp_err("txrx_peer NULL!! peer mac_addr("QDF_MAC_ADDR_FMT")",
  1569. QDF_MAC_ADDR_REF(peer->mac_addr.raw));
  1570. return;
  1571. }
  1572. if (qdf_atomic_inc_return(&peer->txrx_peer->flush_in_progress) > 1) {
  1573. qdf_atomic_dec(&peer->txrx_peer->flush_in_progress);
  1574. return;
  1575. }
  1576. qdf_spin_lock_bh(&peer->peer_info_lock);
  1577. if (peer->state >= OL_TXRX_PEER_STATE_CONN && peer->vdev->osif_rx)
  1578. data_rx = peer->vdev->osif_rx;
  1579. else
  1580. drop = true;
  1581. qdf_spin_unlock_bh(&peer->peer_info_lock);
  1582. bufqi = &peer->txrx_peer->bufq_info;
  1583. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1584. qdf_list_remove_front(&bufqi->cached_bufq,
  1585. (qdf_list_node_t **)&cache_buf);
  1586. while (cache_buf) {
  1587. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(
  1588. cache_buf->buf);
  1589. bufqi->entries -= num_buff_elem;
  1590. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1591. if (drop) {
  1592. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1593. cache_buf->buf);
  1594. } else {
  1595. /* Flush the cached frames to OSIF DEV */
  1596. status = data_rx(peer->vdev->osif_vdev, cache_buf->buf);
  1597. if (status != QDF_STATUS_SUCCESS)
  1598. bufqi->dropped = dp_rx_drop_nbuf_list(
  1599. peer->vdev->pdev,
  1600. cache_buf->buf);
  1601. }
  1602. qdf_mem_free(cache_buf);
  1603. cache_buf = NULL;
  1604. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1605. qdf_list_remove_front(&bufqi->cached_bufq,
  1606. (qdf_list_node_t **)&cache_buf);
  1607. }
  1608. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1609. qdf_atomic_dec(&peer->txrx_peer->flush_in_progress);
  1610. }
  1611. /**
  1612. * dp_rx_enqueue_rx() - cache rx frames
  1613. * @peer: peer
  1614. * @rx_buf_list: cache buffer list
  1615. *
  1616. * Return: None
  1617. */
  1618. static QDF_STATUS
  1619. dp_rx_enqueue_rx(struct dp_txrx_peer *txrx_peer, qdf_nbuf_t rx_buf_list)
  1620. {
  1621. struct dp_rx_cached_buf *cache_buf;
  1622. struct dp_peer_cached_bufq *bufqi = &txrx_peer->bufq_info;
  1623. int num_buff_elem;
  1624. QDF_STATUS ret = QDF_STATUS_SUCCESS;
  1625. struct dp_soc *soc = txrx_peer->vdev->pdev->soc;
  1626. struct dp_peer *peer = dp_peer_get_ref_by_id(soc, txrx_peer->peer_id,
  1627. DP_MOD_ID_RX);
  1628. if (!peer) {
  1629. bufqi->dropped = dp_rx_drop_nbuf_list(txrx_peer->vdev->pdev,
  1630. rx_buf_list);
  1631. return QDF_STATUS_E_INVAL;
  1632. }
  1633. dp_debug_rl("bufq->curr %d bufq->drops %d", bufqi->entries,
  1634. bufqi->dropped);
  1635. if (!peer->valid) {
  1636. bufqi->dropped = dp_rx_drop_nbuf_list(txrx_peer->vdev->pdev,
  1637. rx_buf_list);
  1638. ret = QDF_STATUS_E_INVAL;
  1639. goto fail;
  1640. }
  1641. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1642. if (bufqi->entries >= bufqi->thresh) {
  1643. bufqi->dropped = dp_rx_drop_nbuf_list(txrx_peer->vdev->pdev,
  1644. rx_buf_list);
  1645. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1646. ret = QDF_STATUS_E_RESOURCES;
  1647. goto fail;
  1648. }
  1649. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1650. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(rx_buf_list);
  1651. cache_buf = qdf_mem_malloc_atomic(sizeof(*cache_buf));
  1652. if (!cache_buf) {
  1653. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1654. "Failed to allocate buf to cache rx frames");
  1655. bufqi->dropped = dp_rx_drop_nbuf_list(txrx_peer->vdev->pdev,
  1656. rx_buf_list);
  1657. ret = QDF_STATUS_E_NOMEM;
  1658. goto fail;
  1659. }
  1660. cache_buf->buf = rx_buf_list;
  1661. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1662. qdf_list_insert_back(&bufqi->cached_bufq,
  1663. &cache_buf->node);
  1664. bufqi->entries += num_buff_elem;
  1665. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1666. fail:
  1667. dp_peer_unref_delete(peer, DP_MOD_ID_RX);
  1668. return ret;
  1669. }
  1670. static inline
  1671. bool dp_rx_is_peer_cache_bufq_supported(void)
  1672. {
  1673. return true;
  1674. }
  1675. #else
  1676. static inline
  1677. bool dp_rx_is_peer_cache_bufq_supported(void)
  1678. {
  1679. return false;
  1680. }
  1681. static inline QDF_STATUS
  1682. dp_rx_enqueue_rx(struct dp_txrx_peer *txrx_peer, qdf_nbuf_t rx_buf_list)
  1683. {
  1684. return QDF_STATUS_SUCCESS;
  1685. }
  1686. #endif
  1687. #ifndef DELIVERY_TO_STACK_STATUS_CHECK
  1688. /**
  1689. * dp_rx_check_delivery_to_stack() - Deliver pkts to network
  1690. * using the appropriate call back functions.
  1691. * @soc: soc
  1692. * @vdev: vdev
  1693. * @peer: peer
  1694. * @nbuf_head: skb list head
  1695. * @nbuf_tail: skb list tail
  1696. *
  1697. * Return: None
  1698. */
  1699. static void dp_rx_check_delivery_to_stack(struct dp_soc *soc,
  1700. struct dp_vdev *vdev,
  1701. struct dp_txrx_peer *txrx_peer,
  1702. qdf_nbuf_t nbuf_head)
  1703. {
  1704. if (qdf_unlikely(dp_rx_deliver_to_stack_ext(soc, vdev,
  1705. txrx_peer, nbuf_head)))
  1706. return;
  1707. /* Function pointer initialized only when FISA is enabled */
  1708. if (vdev->osif_fisa_rx)
  1709. /* on failure send it via regular path */
  1710. vdev->osif_fisa_rx(soc, vdev, nbuf_head);
  1711. else
  1712. vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1713. }
  1714. #else
  1715. /**
  1716. * dp_rx_check_delivery_to_stack() - Deliver pkts to network
  1717. * using the appropriate call back functions.
  1718. * @soc: soc
  1719. * @vdev: vdev
  1720. * @txrx_peer: txrx peer
  1721. * @nbuf_head: skb list head
  1722. * @nbuf_tail: skb list tail
  1723. *
  1724. * Check the return status of the call back function and drop
  1725. * the packets if the return status indicates a failure.
  1726. *
  1727. * Return: None
  1728. */
  1729. static void dp_rx_check_delivery_to_stack(struct dp_soc *soc,
  1730. struct dp_vdev *vdev,
  1731. struct dp_txrx_peer *txrx_peer,
  1732. qdf_nbuf_t nbuf_head)
  1733. {
  1734. int num_nbuf = 0;
  1735. QDF_STATUS ret_val = QDF_STATUS_E_FAILURE;
  1736. /* Function pointer initialized only when FISA is enabled */
  1737. if (vdev->osif_fisa_rx)
  1738. /* on failure send it via regular path */
  1739. ret_val = vdev->osif_fisa_rx(soc, vdev, nbuf_head);
  1740. else if (vdev->osif_rx)
  1741. ret_val = vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1742. if (!QDF_IS_STATUS_SUCCESS(ret_val)) {
  1743. num_nbuf = dp_rx_drop_nbuf_list(vdev->pdev, nbuf_head);
  1744. DP_STATS_INC(soc, rx.err.rejected, num_nbuf);
  1745. if (txrx_peer)
  1746. DP_PEER_STATS_FLAT_DEC(txrx_peer, to_stack.num,
  1747. num_nbuf);
  1748. }
  1749. }
  1750. #endif /* ifdef DELIVERY_TO_STACK_STATUS_CHECK */
  1751. /*
  1752. * dp_rx_validate_rx_callbacks() - validate rx callbacks
  1753. * @soc DP soc
  1754. * @vdev: DP vdev handle
  1755. * @txrx_peer: pointer to the txrx peer object
  1756. * nbuf_head: skb list head
  1757. *
  1758. * Return: QDF_STATUS - QDF_STATUS_SUCCESS
  1759. * QDF_STATUS_E_FAILURE
  1760. */
  1761. static inline QDF_STATUS
  1762. dp_rx_validate_rx_callbacks(struct dp_soc *soc,
  1763. struct dp_vdev *vdev,
  1764. struct dp_txrx_peer *txrx_peer,
  1765. qdf_nbuf_t nbuf_head)
  1766. {
  1767. int num_nbuf;
  1768. if (qdf_unlikely(!vdev || vdev->delete.pending)) {
  1769. num_nbuf = dp_rx_drop_nbuf_list(NULL, nbuf_head);
  1770. /*
  1771. * This is a special case where vdev is invalid,
  1772. * so we cannot know the pdev to which this packet
  1773. * belonged. Hence we update the soc rx error stats.
  1774. */
  1775. DP_STATS_INC(soc, rx.err.invalid_vdev, num_nbuf);
  1776. return QDF_STATUS_E_FAILURE;
  1777. }
  1778. /*
  1779. * highly unlikely to have a vdev without a registered rx
  1780. * callback function. if so let us free the nbuf_list.
  1781. */
  1782. if (qdf_unlikely(!vdev->osif_rx)) {
  1783. if (txrx_peer && dp_rx_is_peer_cache_bufq_supported()) {
  1784. dp_rx_enqueue_rx(txrx_peer, nbuf_head);
  1785. } else {
  1786. num_nbuf = dp_rx_drop_nbuf_list(vdev->pdev,
  1787. nbuf_head);
  1788. DP_PEER_TO_STACK_DECC(txrx_peer, num_nbuf,
  1789. vdev->pdev->enhanced_stats_en);
  1790. }
  1791. return QDF_STATUS_E_FAILURE;
  1792. }
  1793. return QDF_STATUS_SUCCESS;
  1794. }
  1795. QDF_STATUS dp_rx_deliver_to_stack(struct dp_soc *soc,
  1796. struct dp_vdev *vdev,
  1797. struct dp_txrx_peer *txrx_peer,
  1798. qdf_nbuf_t nbuf_head,
  1799. qdf_nbuf_t nbuf_tail)
  1800. {
  1801. if (dp_rx_validate_rx_callbacks(soc, vdev, txrx_peer, nbuf_head) !=
  1802. QDF_STATUS_SUCCESS)
  1803. return QDF_STATUS_E_FAILURE;
  1804. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw) ||
  1805. (vdev->rx_decap_type == htt_cmn_pkt_type_native_wifi)) {
  1806. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &nbuf_head,
  1807. &nbuf_tail);
  1808. }
  1809. dp_rx_check_delivery_to_stack(soc, vdev, txrx_peer, nbuf_head);
  1810. return QDF_STATUS_SUCCESS;
  1811. }
  1812. #ifdef QCA_SUPPORT_EAPOL_OVER_CONTROL_PORT
  1813. QDF_STATUS dp_rx_eapol_deliver_to_stack(struct dp_soc *soc,
  1814. struct dp_vdev *vdev,
  1815. struct dp_txrx_peer *txrx_peer,
  1816. qdf_nbuf_t nbuf_head,
  1817. qdf_nbuf_t nbuf_tail)
  1818. {
  1819. if (dp_rx_validate_rx_callbacks(soc, vdev, txrx_peer, nbuf_head) !=
  1820. QDF_STATUS_SUCCESS)
  1821. return QDF_STATUS_E_FAILURE;
  1822. vdev->osif_rx_eapol(vdev->osif_vdev, nbuf_head);
  1823. return QDF_STATUS_SUCCESS;
  1824. }
  1825. #endif
  1826. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1827. #ifdef VDEV_PEER_PROTOCOL_COUNT
  1828. #define dp_rx_msdu_stats_update_prot_cnts(vdev_hdl, nbuf, txrx_peer) \
  1829. { \
  1830. qdf_nbuf_t nbuf_local; \
  1831. struct dp_txrx_peer *txrx_peer_local; \
  1832. struct dp_vdev *vdev_local = vdev_hdl; \
  1833. do { \
  1834. if (qdf_likely(!((vdev_local)->peer_protocol_count_track))) \
  1835. break; \
  1836. nbuf_local = nbuf; \
  1837. txrx_peer_local = txrx_peer; \
  1838. if (qdf_unlikely(qdf_nbuf_is_frag((nbuf_local)))) \
  1839. break; \
  1840. else if (qdf_unlikely(qdf_nbuf_is_raw_frame((nbuf_local)))) \
  1841. break; \
  1842. dp_vdev_peer_stats_update_protocol_cnt((vdev_local), \
  1843. (nbuf_local), \
  1844. (txrx_peer_local), 0, 1); \
  1845. } while (0); \
  1846. }
  1847. #else
  1848. #define dp_rx_msdu_stats_update_prot_cnts(vdev_hdl, nbuf, txrx_peer)
  1849. #endif
  1850. #ifdef FEATURE_RX_LINKSPEED_ROAM_TRIGGER
  1851. /**
  1852. * dp_rx_rates_stats_update() - update rate stats
  1853. * from rx msdu.
  1854. * @soc: datapath soc handle
  1855. * @nbuf: received msdu buffer
  1856. * @rx_tlv_hdr: rx tlv header
  1857. * @txrx_peer: datapath txrx_peer handle
  1858. * @sgi: Short Guard Interval
  1859. * @mcs: Modulation and Coding Set
  1860. * @nss: Number of Spatial Streams
  1861. * @bw: BandWidth
  1862. * @pkt_type: Corresponds to preamble
  1863. *
  1864. * To be precisely record rates, following factors are considered:
  1865. * Exclude specific frames, ARP, DHCP, ssdp, etc.
  1866. * Make sure to affect rx throughput as least as possible.
  1867. *
  1868. * Return: void
  1869. */
  1870. static void
  1871. dp_rx_rates_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1872. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *txrx_peer,
  1873. uint32_t sgi, uint32_t mcs,
  1874. uint32_t nss, uint32_t bw, uint32_t pkt_type)
  1875. {
  1876. uint32_t rix;
  1877. uint16_t ratecode;
  1878. uint32_t avg_rx_rate;
  1879. uint32_t ratekbps;
  1880. enum cdp_punctured_modes punc_mode = NO_PUNCTURE;
  1881. if (soc->high_throughput ||
  1882. dp_rx_data_is_specific(soc->hal_soc, rx_tlv_hdr, nbuf)) {
  1883. return;
  1884. }
  1885. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.rx_rate, mcs);
  1886. /* here pkt_type corresponds to preamble */
  1887. ratekbps = dp_getrateindex(sgi,
  1888. mcs,
  1889. nss - 1,
  1890. pkt_type,
  1891. bw,
  1892. punc_mode,
  1893. &rix,
  1894. &ratecode);
  1895. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.last_rx_rate, ratekbps);
  1896. avg_rx_rate =
  1897. dp_ath_rate_lpf(txrx_peer->stats.extd_stats.rx.avg_rx_rate,
  1898. ratekbps);
  1899. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.avg_rx_rate, avg_rx_rate);
  1900. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.nss_info, nss);
  1901. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.mcs_info, mcs);
  1902. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.bw_info, bw);
  1903. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.gi_info, sgi);
  1904. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.preamble_info, pkt_type);
  1905. }
  1906. #else
  1907. static inline void
  1908. dp_rx_rates_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1909. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *txrx_peer,
  1910. uint32_t sgi, uint32_t mcs,
  1911. uint32_t nss, uint32_t bw, uint32_t pkt_type)
  1912. {
  1913. }
  1914. #endif /* FEATURE_RX_LINKSPEED_ROAM_TRIGGER */
  1915. #ifndef QCA_ENHANCED_STATS_SUPPORT
  1916. /**
  1917. * dp_rx_msdu_extd_stats_update(): Update Rx extended path stats for peer
  1918. *
  1919. * @soc: datapath soc handle
  1920. * @nbuf: received msdu buffer
  1921. * @rx_tlv_hdr: rx tlv header
  1922. * @txrx_peer: datapath txrx_peer handle
  1923. *
  1924. * Return: void
  1925. */
  1926. static inline
  1927. void dp_rx_msdu_extd_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1928. uint8_t *rx_tlv_hdr,
  1929. struct dp_txrx_peer *txrx_peer)
  1930. {
  1931. bool is_ampdu;
  1932. uint32_t sgi, mcs, tid, nss, bw, reception_type, pkt_type;
  1933. uint8_t dst_mcs_idx;
  1934. /*
  1935. * TODO - For KIWI this field is present in ring_desc
  1936. * Try to use ring desc instead of tlv.
  1937. */
  1938. is_ampdu = hal_rx_mpdu_info_ampdu_flag_get(soc->hal_soc, rx_tlv_hdr);
  1939. DP_PEER_EXTD_STATS_INCC(txrx_peer, rx.ampdu_cnt, 1, is_ampdu);
  1940. DP_PEER_EXTD_STATS_INCC(txrx_peer, rx.non_ampdu_cnt, 1, !(is_ampdu));
  1941. sgi = hal_rx_tlv_sgi_get(soc->hal_soc, rx_tlv_hdr);
  1942. mcs = hal_rx_tlv_rate_mcs_get(soc->hal_soc, rx_tlv_hdr);
  1943. tid = qdf_nbuf_get_tid_val(nbuf);
  1944. bw = hal_rx_tlv_bw_get(soc->hal_soc, rx_tlv_hdr);
  1945. reception_type = hal_rx_msdu_start_reception_type_get(soc->hal_soc,
  1946. rx_tlv_hdr);
  1947. nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
  1948. pkt_type = hal_rx_tlv_get_pkt_type(soc->hal_soc, rx_tlv_hdr);
  1949. /* do HW to SW pkt type conversion */
  1950. pkt_type = (pkt_type >= HAL_DOT11_MAX ? DOT11_MAX :
  1951. hal_2_dp_pkt_type_map[pkt_type]);
  1952. DP_PEER_EXTD_STATS_INCC(txrx_peer, rx.rx_mpdu_cnt[mcs], 1,
  1953. ((mcs < MAX_MCS) && QDF_NBUF_CB_RX_CHFRAG_START(nbuf)));
  1954. DP_PEER_EXTD_STATS_INCC(txrx_peer, rx.rx_mpdu_cnt[MAX_MCS - 1], 1,
  1955. ((mcs >= MAX_MCS) && QDF_NBUF_CB_RX_CHFRAG_START(nbuf)));
  1956. DP_PEER_EXTD_STATS_INC(txrx_peer, rx.bw[bw], 1);
  1957. /*
  1958. * only if nss > 0 and pkt_type is 11N/AC/AX,
  1959. * then increase index [nss - 1] in array counter.
  1960. */
  1961. if (nss > 0 && CDP_IS_PKT_TYPE_SUPPORT_NSS(pkt_type))
  1962. DP_PEER_EXTD_STATS_INC(txrx_peer, rx.nss[nss - 1], 1);
  1963. DP_PEER_EXTD_STATS_INC(txrx_peer, rx.sgi_count[sgi], 1);
  1964. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, rx.err.mic_err, 1,
  1965. hal_rx_tlv_mic_err_get(soc->hal_soc,
  1966. rx_tlv_hdr));
  1967. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, rx.err.decrypt_err, 1,
  1968. hal_rx_tlv_decrypt_err_get(soc->hal_soc,
  1969. rx_tlv_hdr));
  1970. DP_PEER_EXTD_STATS_INC(txrx_peer, rx.wme_ac_type[TID_TO_WME_AC(tid)], 1);
  1971. DP_PEER_EXTD_STATS_INC(txrx_peer, rx.reception_type[reception_type], 1);
  1972. dst_mcs_idx = dp_get_mcs_array_index_by_pkt_type_mcs(pkt_type, mcs);
  1973. if (MCS_INVALID_ARRAY_INDEX != dst_mcs_idx)
  1974. DP_PEER_EXTD_STATS_INC(txrx_peer,
  1975. rx.pkt_type[pkt_type].mcs_count[dst_mcs_idx],
  1976. 1);
  1977. dp_rx_rates_stats_update(soc, nbuf, rx_tlv_hdr, txrx_peer,
  1978. sgi, mcs, nss, bw, pkt_type);
  1979. }
  1980. #else
  1981. static inline
  1982. void dp_rx_msdu_extd_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1983. uint8_t *rx_tlv_hdr,
  1984. struct dp_txrx_peer *txrx_peer)
  1985. {
  1986. }
  1987. #endif
  1988. #if defined(DP_PKT_STATS_PER_LMAC) && defined(WLAN_FEATURE_11BE_MLO)
  1989. static inline void
  1990. dp_peer_update_rx_pkt_per_lmac(struct dp_txrx_peer *txrx_peer,
  1991. qdf_nbuf_t nbuf)
  1992. {
  1993. uint8_t lmac_id = qdf_nbuf_get_lmac_id(nbuf);
  1994. /* only count stats per lmac for MLO connection*/
  1995. DP_PEER_PER_PKT_STATS_INCC_PKT(txrx_peer, rx.rx_lmac[lmac_id], 1,
  1996. QDF_NBUF_CB_RX_PKT_LEN(nbuf),
  1997. txrx_peer->mld_peer);
  1998. }
  1999. #else
  2000. static inline void
  2001. dp_peer_update_rx_pkt_per_lmac(struct dp_txrx_peer *txrx_peer,
  2002. qdf_nbuf_t nbuf)
  2003. {
  2004. }
  2005. #endif
  2006. /**
  2007. * dp_rx_msdu_stats_update() - update per msdu stats.
  2008. * @soc: core txrx main context
  2009. * @nbuf: pointer to the first msdu of an amsdu.
  2010. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  2011. * @txrx_peer: pointer to the txrx peer object.
  2012. * @ring_id: reo dest ring number on which pkt is reaped.
  2013. * @tid_stats: per tid rx stats.
  2014. *
  2015. * update all the per msdu stats for that nbuf.
  2016. * Return: void
  2017. */
  2018. void dp_rx_msdu_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  2019. uint8_t *rx_tlv_hdr,
  2020. struct dp_txrx_peer *txrx_peer,
  2021. uint8_t ring_id,
  2022. struct cdp_tid_rx_stats *tid_stats)
  2023. {
  2024. bool is_not_amsdu;
  2025. struct dp_vdev *vdev = txrx_peer->vdev;
  2026. bool enh_flag;
  2027. qdf_ether_header_t *eh;
  2028. uint16_t msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2029. dp_rx_msdu_stats_update_prot_cnts(vdev, nbuf, txrx_peer);
  2030. is_not_amsdu = qdf_nbuf_is_rx_chfrag_start(nbuf) &
  2031. qdf_nbuf_is_rx_chfrag_end(nbuf);
  2032. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.rcvd_reo[ring_id], 1,
  2033. msdu_len);
  2034. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, rx.non_amsdu_cnt, 1,
  2035. is_not_amsdu);
  2036. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, rx.amsdu_cnt, 1, !is_not_amsdu);
  2037. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, rx.rx_retries, 1,
  2038. qdf_nbuf_is_rx_retry_flag(nbuf));
  2039. dp_peer_update_rx_pkt_per_lmac(txrx_peer, nbuf);
  2040. tid_stats->msdu_cnt++;
  2041. if (qdf_unlikely(qdf_nbuf_is_da_mcbc(nbuf) &&
  2042. (vdev->rx_decap_type == htt_cmn_pkt_type_ethernet))) {
  2043. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  2044. enh_flag = vdev->pdev->enhanced_stats_en;
  2045. DP_PEER_MC_INCC_PKT(txrx_peer, 1, msdu_len, enh_flag);
  2046. tid_stats->mcast_msdu_cnt++;
  2047. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost)) {
  2048. DP_PEER_BC_INCC_PKT(txrx_peer, 1, msdu_len, enh_flag);
  2049. tid_stats->bcast_msdu_cnt++;
  2050. }
  2051. }
  2052. txrx_peer->stats.per_pkt_stats.rx.last_rx_ts = qdf_system_ticks();
  2053. dp_rx_msdu_extd_stats_update(soc, nbuf, rx_tlv_hdr, txrx_peer);
  2054. }
  2055. #ifndef WDS_VENDOR_EXTENSION
  2056. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr,
  2057. struct dp_vdev *vdev,
  2058. struct dp_txrx_peer *txrx_peer)
  2059. {
  2060. return 1;
  2061. }
  2062. #endif
  2063. #ifdef RX_DESC_DEBUG_CHECK
  2064. /**
  2065. * dp_rx_desc_nbuf_sanity_check - Add sanity check to catch REO rx_desc paddr
  2066. * corruption
  2067. *
  2068. * @ring_desc: REO ring descriptor
  2069. * @rx_desc: Rx descriptor
  2070. *
  2071. * Return: NONE
  2072. */
  2073. QDF_STATUS dp_rx_desc_nbuf_sanity_check(struct dp_soc *soc,
  2074. hal_ring_desc_t ring_desc,
  2075. struct dp_rx_desc *rx_desc)
  2076. {
  2077. struct hal_buf_info hbi;
  2078. hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &hbi);
  2079. /* Sanity check for possible buffer paddr corruption */
  2080. if (dp_rx_desc_paddr_sanity_check(rx_desc, (&hbi)->paddr))
  2081. return QDF_STATUS_SUCCESS;
  2082. return QDF_STATUS_E_FAILURE;
  2083. }
  2084. /**
  2085. * dp_rx_desc_nbuf_len_sanity_check - Add sanity check to catch Rx buffer
  2086. * out of bound access from H.W
  2087. *
  2088. * @soc: DP soc
  2089. * @pkt_len: Packet length received from H.W
  2090. *
  2091. * Return: NONE
  2092. */
  2093. static inline void
  2094. dp_rx_desc_nbuf_len_sanity_check(struct dp_soc *soc,
  2095. uint32_t pkt_len)
  2096. {
  2097. struct rx_desc_pool *rx_desc_pool;
  2098. rx_desc_pool = &soc->rx_desc_buf[0];
  2099. qdf_assert_always(pkt_len <= rx_desc_pool->buf_size);
  2100. }
  2101. #else
  2102. static inline void
  2103. dp_rx_desc_nbuf_len_sanity_check(struct dp_soc *soc, uint32_t pkt_len) { }
  2104. #endif
  2105. #ifdef DP_RX_PKT_NO_PEER_DELIVER
  2106. #ifdef DP_RX_UDP_OVER_PEER_ROAM
  2107. /**
  2108. * dp_rx_is_udp_allowed_over_roam_peer() - check if udp data received
  2109. * during roaming
  2110. * @vdev: dp_vdev pointer
  2111. * @rx_tlv_hdr: rx tlv header
  2112. * @nbuf: pkt skb pointer
  2113. *
  2114. * This function will check if rx udp data is received from authorised
  2115. * roamed peer before peer map indication is received from FW after
  2116. * roaming. This is needed for VoIP scenarios in which packet loss
  2117. * expected during roaming is minimal.
  2118. *
  2119. * Return: bool
  2120. */
  2121. static bool dp_rx_is_udp_allowed_over_roam_peer(struct dp_vdev *vdev,
  2122. uint8_t *rx_tlv_hdr,
  2123. qdf_nbuf_t nbuf)
  2124. {
  2125. char *hdr_desc;
  2126. struct ieee80211_frame *wh = NULL;
  2127. hdr_desc = hal_rx_desc_get_80211_hdr(vdev->pdev->soc->hal_soc,
  2128. rx_tlv_hdr);
  2129. wh = (struct ieee80211_frame *)hdr_desc;
  2130. if (vdev->roaming_peer_status ==
  2131. WLAN_ROAM_PEER_AUTH_STATUS_AUTHENTICATED &&
  2132. !qdf_mem_cmp(vdev->roaming_peer_mac.raw, wh->i_addr2,
  2133. QDF_MAC_ADDR_SIZE) && (qdf_nbuf_is_ipv4_udp_pkt(nbuf) ||
  2134. qdf_nbuf_is_ipv6_udp_pkt(nbuf)))
  2135. return true;
  2136. return false;
  2137. }
  2138. #else
  2139. static bool dp_rx_is_udp_allowed_over_roam_peer(struct dp_vdev *vdev,
  2140. uint8_t *rx_tlv_hdr,
  2141. qdf_nbuf_t nbuf)
  2142. {
  2143. return false;
  2144. }
  2145. #endif
  2146. /**
  2147. * dp_rx_deliver_to_stack_no_peer() - try deliver rx data even if
  2148. * no corresbonding peer found
  2149. * @soc: core txrx main context
  2150. * @nbuf: pkt skb pointer
  2151. *
  2152. * This function will try to deliver some RX special frames to stack
  2153. * even there is no peer matched found. for instance, LFR case, some
  2154. * eapol data will be sent to host before peer_map done.
  2155. *
  2156. * Return: None
  2157. */
  2158. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  2159. {
  2160. uint16_t peer_id;
  2161. uint8_t vdev_id;
  2162. struct dp_vdev *vdev = NULL;
  2163. uint32_t l2_hdr_offset = 0;
  2164. uint16_t msdu_len = 0;
  2165. uint32_t pkt_len = 0;
  2166. uint8_t *rx_tlv_hdr;
  2167. uint32_t frame_mask = FRAME_MASK_IPV4_ARP | FRAME_MASK_IPV4_DHCP |
  2168. FRAME_MASK_IPV4_EAPOL | FRAME_MASK_IPV6_DHCP;
  2169. peer_id = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  2170. if (peer_id > soc->max_peer_id)
  2171. goto deliver_fail;
  2172. vdev_id = QDF_NBUF_CB_RX_VDEV_ID(nbuf);
  2173. vdev = dp_vdev_get_ref_by_id(soc, vdev_id, DP_MOD_ID_RX);
  2174. if (!vdev || vdev->delete.pending || !vdev->osif_rx)
  2175. goto deliver_fail;
  2176. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf)))
  2177. goto deliver_fail;
  2178. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  2179. l2_hdr_offset =
  2180. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, rx_tlv_hdr);
  2181. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2182. pkt_len = msdu_len + l2_hdr_offset + soc->rx_pkt_tlv_size;
  2183. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(nbuf) = 1;
  2184. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  2185. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size + l2_hdr_offset);
  2186. if (dp_rx_is_special_frame(nbuf, frame_mask) ||
  2187. dp_rx_is_udp_allowed_over_roam_peer(vdev, rx_tlv_hdr, nbuf)) {
  2188. qdf_nbuf_set_exc_frame(nbuf, 1);
  2189. if (QDF_STATUS_SUCCESS !=
  2190. vdev->osif_rx(vdev->osif_vdev, nbuf))
  2191. goto deliver_fail;
  2192. DP_STATS_INC(soc, rx.err.pkt_delivered_no_peer, 1);
  2193. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_RX);
  2194. return;
  2195. }
  2196. deliver_fail:
  2197. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  2198. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  2199. dp_rx_nbuf_free(nbuf);
  2200. if (vdev)
  2201. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_RX);
  2202. }
  2203. #else
  2204. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  2205. {
  2206. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  2207. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  2208. dp_rx_nbuf_free(nbuf);
  2209. }
  2210. #endif
  2211. /**
  2212. * dp_rx_srng_get_num_pending() - get number of pending entries
  2213. * @hal_soc: hal soc opaque pointer
  2214. * @hal_ring: opaque pointer to the HAL Rx Ring
  2215. * @num_entries: number of entries in the hal_ring.
  2216. * @near_full: pointer to a boolean. This is set if ring is near full.
  2217. *
  2218. * The function returns the number of entries in a destination ring which are
  2219. * yet to be reaped. The function also checks if the ring is near full.
  2220. * If more than half of the ring needs to be reaped, the ring is considered
  2221. * approaching full.
  2222. * The function useses hal_srng_dst_num_valid_locked to get the number of valid
  2223. * entries. It should not be called within a SRNG lock. HW pointer value is
  2224. * synced into cached_hp.
  2225. *
  2226. * Return: Number of pending entries if any
  2227. */
  2228. uint32_t dp_rx_srng_get_num_pending(hal_soc_handle_t hal_soc,
  2229. hal_ring_handle_t hal_ring_hdl,
  2230. uint32_t num_entries,
  2231. bool *near_full)
  2232. {
  2233. uint32_t num_pending = 0;
  2234. num_pending = hal_srng_dst_num_valid_locked(hal_soc,
  2235. hal_ring_hdl,
  2236. true);
  2237. if (num_entries && (num_pending >= num_entries >> 1))
  2238. *near_full = true;
  2239. else
  2240. *near_full = false;
  2241. return num_pending;
  2242. }
  2243. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  2244. #ifdef WLAN_SUPPORT_RX_FISA
  2245. void dp_rx_skip_tlvs(struct dp_soc *soc, qdf_nbuf_t nbuf, uint32_t l3_padding)
  2246. {
  2247. QDF_NBUF_CB_RX_PACKET_L3_HDR_PAD(nbuf) = l3_padding;
  2248. qdf_nbuf_pull_head(nbuf, l3_padding + soc->rx_pkt_tlv_size);
  2249. }
  2250. #else
  2251. void dp_rx_skip_tlvs(struct dp_soc *soc, qdf_nbuf_t nbuf, uint32_t l3_padding)
  2252. {
  2253. qdf_nbuf_pull_head(nbuf, l3_padding + soc->rx_pkt_tlv_size);
  2254. }
  2255. #endif
  2256. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  2257. #ifdef DP_RX_DROP_RAW_FRM
  2258. /**
  2259. * dp_rx_is_raw_frame_dropped() - if raw frame nbuf, free and drop
  2260. * @nbuf: pkt skb pointer
  2261. *
  2262. * Return: true - raw frame, dropped
  2263. * false - not raw frame, do nothing
  2264. */
  2265. bool dp_rx_is_raw_frame_dropped(qdf_nbuf_t nbuf)
  2266. {
  2267. if (qdf_nbuf_is_raw_frame(nbuf)) {
  2268. dp_rx_nbuf_free(nbuf);
  2269. return true;
  2270. }
  2271. return false;
  2272. }
  2273. #endif
  2274. #ifdef WLAN_FEATURE_DP_RX_RING_HISTORY
  2275. /**
  2276. * dp_rx_ring_record_entry() - Record an entry into the rx ring history.
  2277. * @soc: Datapath soc structure
  2278. * @ring_num: REO ring number
  2279. * @ring_desc: REO ring descriptor
  2280. *
  2281. * Returns: None
  2282. */
  2283. void
  2284. dp_rx_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  2285. hal_ring_desc_t ring_desc)
  2286. {
  2287. struct dp_buf_info_record *record;
  2288. struct hal_buf_info hbi;
  2289. uint32_t idx;
  2290. if (qdf_unlikely(!soc->rx_ring_history[ring_num]))
  2291. return;
  2292. hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &hbi);
  2293. /* buffer_addr_info is the first element of ring_desc */
  2294. hal_rx_buf_cookie_rbm_get(soc->hal_soc, (uint32_t *)ring_desc,
  2295. &hbi);
  2296. idx = dp_history_get_next_index(&soc->rx_ring_history[ring_num]->index,
  2297. DP_RX_HIST_MAX);
  2298. /* No NULL check needed for record since its an array */
  2299. record = &soc->rx_ring_history[ring_num]->entry[idx];
  2300. record->timestamp = qdf_get_log_timestamp();
  2301. record->hbi.paddr = hbi.paddr;
  2302. record->hbi.sw_cookie = hbi.sw_cookie;
  2303. record->hbi.rbm = hbi.rbm;
  2304. }
  2305. #endif
  2306. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  2307. /**
  2308. * dp_rx_update_stats() - Update soc level rx packet count
  2309. * @soc: DP soc handle
  2310. * @nbuf: nbuf received
  2311. *
  2312. * Returns: none
  2313. */
  2314. void dp_rx_update_stats(struct dp_soc *soc, qdf_nbuf_t nbuf)
  2315. {
  2316. DP_STATS_INC_PKT(soc, rx.ingress, 1,
  2317. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  2318. }
  2319. #endif
  2320. #ifdef WLAN_FEATURE_PKT_CAPTURE_V2
  2321. /**
  2322. * dp_rx_deliver_to_pkt_capture() - deliver rx packet to packet capture
  2323. * @soc : dp_soc handle
  2324. * @pdev: dp_pdev handle
  2325. * @peer_id: peer_id of the peer for which completion came
  2326. * @ppdu_id: ppdu_id
  2327. * @netbuf: Buffer pointer
  2328. *
  2329. * This function is used to deliver rx packet to packet capture
  2330. */
  2331. void dp_rx_deliver_to_pkt_capture(struct dp_soc *soc, struct dp_pdev *pdev,
  2332. uint16_t peer_id, uint32_t is_offload,
  2333. qdf_nbuf_t netbuf)
  2334. {
  2335. if (wlan_cfg_get_pkt_capture_mode(soc->wlan_cfg_ctx))
  2336. dp_wdi_event_handler(WDI_EVENT_PKT_CAPTURE_RX_DATA, soc, netbuf,
  2337. peer_id, is_offload, pdev->pdev_id);
  2338. }
  2339. void dp_rx_deliver_to_pkt_capture_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf,
  2340. uint32_t is_offload)
  2341. {
  2342. if (wlan_cfg_get_pkt_capture_mode(soc->wlan_cfg_ctx))
  2343. dp_wdi_event_handler(WDI_EVENT_PKT_CAPTURE_RX_DATA_NO_PEER,
  2344. soc, nbuf, HTT_INVALID_VDEV,
  2345. is_offload, 0);
  2346. }
  2347. #endif
  2348. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  2349. QDF_STATUS dp_rx_vdev_detach(struct dp_vdev *vdev)
  2350. {
  2351. QDF_STATUS ret;
  2352. if (vdev->osif_rx_flush) {
  2353. ret = vdev->osif_rx_flush(vdev->osif_vdev, vdev->vdev_id);
  2354. if (!QDF_IS_STATUS_SUCCESS(ret)) {
  2355. dp_err("Failed to flush rx pkts for vdev %d\n",
  2356. vdev->vdev_id);
  2357. return ret;
  2358. }
  2359. }
  2360. return QDF_STATUS_SUCCESS;
  2361. }
  2362. static QDF_STATUS
  2363. dp_pdev_nbuf_alloc_and_map(struct dp_soc *dp_soc,
  2364. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  2365. struct dp_pdev *dp_pdev,
  2366. struct rx_desc_pool *rx_desc_pool)
  2367. {
  2368. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  2369. (nbuf_frag_info_t->virt_addr).nbuf =
  2370. qdf_nbuf_alloc(dp_soc->osdev, rx_desc_pool->buf_size,
  2371. RX_BUFFER_RESERVATION,
  2372. rx_desc_pool->buf_alignment, FALSE);
  2373. if (!((nbuf_frag_info_t->virt_addr).nbuf)) {
  2374. dp_err("nbuf alloc failed");
  2375. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  2376. return ret;
  2377. }
  2378. ret = qdf_nbuf_map_nbytes_single(dp_soc->osdev,
  2379. (nbuf_frag_info_t->virt_addr).nbuf,
  2380. QDF_DMA_FROM_DEVICE,
  2381. rx_desc_pool->buf_size);
  2382. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  2383. qdf_nbuf_free((nbuf_frag_info_t->virt_addr).nbuf);
  2384. dp_err("nbuf map failed");
  2385. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  2386. return ret;
  2387. }
  2388. nbuf_frag_info_t->paddr =
  2389. qdf_nbuf_get_frag_paddr((nbuf_frag_info_t->virt_addr).nbuf, 0);
  2390. ret = dp_check_paddr(dp_soc, &((nbuf_frag_info_t->virt_addr).nbuf),
  2391. &nbuf_frag_info_t->paddr,
  2392. rx_desc_pool);
  2393. if (ret == QDF_STATUS_E_FAILURE) {
  2394. dp_err("nbuf check x86 failed");
  2395. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  2396. return ret;
  2397. }
  2398. return QDF_STATUS_SUCCESS;
  2399. }
  2400. QDF_STATUS
  2401. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  2402. struct dp_srng *dp_rxdma_srng,
  2403. struct rx_desc_pool *rx_desc_pool,
  2404. uint32_t num_req_buffers)
  2405. {
  2406. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  2407. hal_ring_handle_t rxdma_srng = dp_rxdma_srng->hal_srng;
  2408. union dp_rx_desc_list_elem_t *next;
  2409. void *rxdma_ring_entry;
  2410. qdf_dma_addr_t paddr;
  2411. struct dp_rx_nbuf_frag_info *nf_info;
  2412. uint32_t nr_descs, nr_nbuf = 0, nr_nbuf_total = 0;
  2413. uint32_t buffer_index, nbuf_ptrs_per_page;
  2414. qdf_nbuf_t nbuf;
  2415. QDF_STATUS ret;
  2416. int page_idx, total_pages;
  2417. union dp_rx_desc_list_elem_t *desc_list = NULL;
  2418. union dp_rx_desc_list_elem_t *tail = NULL;
  2419. int sync_hw_ptr = 1;
  2420. uint32_t num_entries_avail;
  2421. if (qdf_unlikely(!dp_pdev)) {
  2422. dp_rx_err("%pK: pdev is null for mac_id = %d",
  2423. dp_soc, mac_id);
  2424. return QDF_STATUS_E_FAILURE;
  2425. }
  2426. if (qdf_unlikely(!rxdma_srng)) {
  2427. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  2428. return QDF_STATUS_E_FAILURE;
  2429. }
  2430. dp_debug("requested %u RX buffers for driver attach", num_req_buffers);
  2431. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  2432. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  2433. rxdma_srng,
  2434. sync_hw_ptr);
  2435. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2436. if (!num_entries_avail) {
  2437. dp_err("Num of available entries is zero, nothing to do");
  2438. return QDF_STATUS_E_NOMEM;
  2439. }
  2440. if (num_entries_avail < num_req_buffers)
  2441. num_req_buffers = num_entries_avail;
  2442. nr_descs = dp_rx_get_free_desc_list(dp_soc, mac_id, rx_desc_pool,
  2443. num_req_buffers, &desc_list, &tail);
  2444. if (!nr_descs) {
  2445. dp_err("no free rx_descs in freelist");
  2446. DP_STATS_INC(dp_pdev, err.desc_alloc_fail, num_req_buffers);
  2447. return QDF_STATUS_E_NOMEM;
  2448. }
  2449. dp_debug("got %u RX descs for driver attach", nr_descs);
  2450. /*
  2451. * Try to allocate pointers to the nbuf one page at a time.
  2452. * Take pointers that can fit in one page of memory and
  2453. * iterate through the total descriptors that need to be
  2454. * allocated in order of pages. Reuse the pointers that
  2455. * have been allocated to fit in one page across each
  2456. * iteration to index into the nbuf.
  2457. */
  2458. total_pages = (nr_descs * sizeof(*nf_info)) / DP_BLOCKMEM_SIZE;
  2459. /*
  2460. * Add an extra page to store the remainder if any
  2461. */
  2462. if ((nr_descs * sizeof(*nf_info)) % DP_BLOCKMEM_SIZE)
  2463. total_pages++;
  2464. nf_info = qdf_mem_malloc(DP_BLOCKMEM_SIZE);
  2465. if (!nf_info) {
  2466. dp_err("failed to allocate nbuf array");
  2467. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  2468. QDF_BUG(0);
  2469. return QDF_STATUS_E_NOMEM;
  2470. }
  2471. nbuf_ptrs_per_page = DP_BLOCKMEM_SIZE / sizeof(*nf_info);
  2472. for (page_idx = 0; page_idx < total_pages; page_idx++) {
  2473. qdf_mem_zero(nf_info, DP_BLOCKMEM_SIZE);
  2474. for (nr_nbuf = 0; nr_nbuf < nbuf_ptrs_per_page; nr_nbuf++) {
  2475. /*
  2476. * The last page of buffer pointers may not be required
  2477. * completely based on the number of descriptors. Below
  2478. * check will ensure we are allocating only the
  2479. * required number of descriptors.
  2480. */
  2481. if (nr_nbuf_total >= nr_descs)
  2482. break;
  2483. /* Flag is set while pdev rx_desc_pool initialization */
  2484. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  2485. ret = dp_pdev_frag_alloc_and_map(dp_soc,
  2486. &nf_info[nr_nbuf], dp_pdev,
  2487. rx_desc_pool);
  2488. else
  2489. ret = dp_pdev_nbuf_alloc_and_map(dp_soc,
  2490. &nf_info[nr_nbuf], dp_pdev,
  2491. rx_desc_pool);
  2492. if (QDF_IS_STATUS_ERROR(ret))
  2493. break;
  2494. nr_nbuf_total++;
  2495. }
  2496. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  2497. for (buffer_index = 0; buffer_index < nr_nbuf; buffer_index++) {
  2498. rxdma_ring_entry =
  2499. hal_srng_src_get_next(dp_soc->hal_soc,
  2500. rxdma_srng);
  2501. qdf_assert_always(rxdma_ring_entry);
  2502. next = desc_list->next;
  2503. paddr = nf_info[buffer_index].paddr;
  2504. nbuf = nf_info[buffer_index].virt_addr.nbuf;
  2505. /* Flag is set while pdev rx_desc_pool initialization */
  2506. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  2507. dp_rx_desc_frag_prep(&desc_list->rx_desc,
  2508. &nf_info[buffer_index]);
  2509. else
  2510. dp_rx_desc_prep(&desc_list->rx_desc,
  2511. &nf_info[buffer_index]);
  2512. desc_list->rx_desc.in_use = 1;
  2513. dp_rx_desc_alloc_dbg_info(&desc_list->rx_desc);
  2514. dp_rx_desc_update_dbg_info(&desc_list->rx_desc,
  2515. __func__,
  2516. RX_DESC_REPLENISHED);
  2517. hal_rxdma_buff_addr_info_set(dp_soc->hal_soc ,rxdma_ring_entry, paddr,
  2518. desc_list->rx_desc.cookie,
  2519. rx_desc_pool->owner);
  2520. dp_ipa_handle_rx_buf_smmu_mapping(
  2521. dp_soc, nbuf,
  2522. rx_desc_pool->buf_size,
  2523. true);
  2524. desc_list = next;
  2525. }
  2526. dp_rx_refill_ring_record_entry(dp_soc, dp_pdev->lmac_id,
  2527. rxdma_srng, nr_nbuf, nr_nbuf);
  2528. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2529. }
  2530. dp_info("filled %u RX buffers for driver attach", nr_nbuf_total);
  2531. qdf_mem_free(nf_info);
  2532. if (!nr_nbuf_total) {
  2533. dp_err("No nbuf's allocated");
  2534. QDF_BUG(0);
  2535. return QDF_STATUS_E_RESOURCES;
  2536. }
  2537. /* No need to count the number of bytes received during replenish.
  2538. * Therefore set replenish.pkts.bytes as 0.
  2539. */
  2540. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, nr_nbuf, 0);
  2541. return QDF_STATUS_SUCCESS;
  2542. }
  2543. qdf_export_symbol(dp_pdev_rx_buffers_attach);
  2544. /**
  2545. * dp_rx_enable_mon_dest_frag() - Enable frag processing for
  2546. * monitor destination ring via frag.
  2547. *
  2548. * Enable this flag only for monitor destination buffer processing
  2549. * if DP_RX_MON_MEM_FRAG feature is enabled.
  2550. * If flag is set then frag based function will be called for alloc,
  2551. * map, prep desc and free ops for desc buffer else normal nbuf based
  2552. * function will be called.
  2553. *
  2554. * @rx_desc_pool: Rx desc pool
  2555. * @is_mon_dest_desc: Is it for monitor dest buffer
  2556. *
  2557. * Return: None
  2558. */
  2559. #ifdef DP_RX_MON_MEM_FRAG
  2560. void dp_rx_enable_mon_dest_frag(struct rx_desc_pool *rx_desc_pool,
  2561. bool is_mon_dest_desc)
  2562. {
  2563. rx_desc_pool->rx_mon_dest_frag_enable = is_mon_dest_desc;
  2564. if (is_mon_dest_desc)
  2565. dp_alert("Feature DP_RX_MON_MEM_FRAG for mon_dest is enabled");
  2566. }
  2567. #else
  2568. void dp_rx_enable_mon_dest_frag(struct rx_desc_pool *rx_desc_pool,
  2569. bool is_mon_dest_desc)
  2570. {
  2571. rx_desc_pool->rx_mon_dest_frag_enable = false;
  2572. if (is_mon_dest_desc)
  2573. dp_alert("Feature DP_RX_MON_MEM_FRAG for mon_dest is disabled");
  2574. }
  2575. #endif
  2576. qdf_export_symbol(dp_rx_enable_mon_dest_frag);
  2577. /*
  2578. * dp_rx_pdev_desc_pool_alloc() - allocate memory for software rx descriptor
  2579. * pool
  2580. *
  2581. * @pdev: core txrx pdev context
  2582. *
  2583. * Return: QDF_STATUS - QDF_STATUS_SUCCESS
  2584. * QDF_STATUS_E_NOMEM
  2585. */
  2586. QDF_STATUS
  2587. dp_rx_pdev_desc_pool_alloc(struct dp_pdev *pdev)
  2588. {
  2589. struct dp_soc *soc = pdev->soc;
  2590. uint32_t rxdma_entries;
  2591. uint32_t rx_sw_desc_num;
  2592. struct dp_srng *dp_rxdma_srng;
  2593. struct rx_desc_pool *rx_desc_pool;
  2594. uint32_t status = QDF_STATUS_SUCCESS;
  2595. int mac_for_pdev;
  2596. mac_for_pdev = pdev->lmac_id;
  2597. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2598. dp_rx_info("%pK: nss-wifi<4> skip Rx refil %d",
  2599. soc, mac_for_pdev);
  2600. return status;
  2601. }
  2602. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2603. rxdma_entries = dp_rxdma_srng->num_entries;
  2604. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2605. rx_sw_desc_num = wlan_cfg_get_dp_soc_rx_sw_desc_num(soc->wlan_cfg_ctx);
  2606. rx_desc_pool->desc_type = DP_RX_DESC_BUF_TYPE;
  2607. status = dp_rx_desc_pool_alloc(soc,
  2608. rx_sw_desc_num,
  2609. rx_desc_pool);
  2610. if (status != QDF_STATUS_SUCCESS)
  2611. return status;
  2612. return status;
  2613. }
  2614. /*
  2615. * dp_rx_pdev_desc_pool_free() - free software rx descriptor pool
  2616. *
  2617. * @pdev: core txrx pdev context
  2618. */
  2619. void dp_rx_pdev_desc_pool_free(struct dp_pdev *pdev)
  2620. {
  2621. int mac_for_pdev = pdev->lmac_id;
  2622. struct dp_soc *soc = pdev->soc;
  2623. struct rx_desc_pool *rx_desc_pool;
  2624. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2625. dp_rx_desc_pool_free(soc, rx_desc_pool);
  2626. }
  2627. /*
  2628. * dp_rx_pdev_desc_pool_init() - initialize software rx descriptors
  2629. *
  2630. * @pdev: core txrx pdev context
  2631. *
  2632. * Return: QDF_STATUS - QDF_STATUS_SUCCESS
  2633. * QDF_STATUS_E_NOMEM
  2634. */
  2635. QDF_STATUS dp_rx_pdev_desc_pool_init(struct dp_pdev *pdev)
  2636. {
  2637. int mac_for_pdev = pdev->lmac_id;
  2638. struct dp_soc *soc = pdev->soc;
  2639. uint32_t rxdma_entries;
  2640. uint32_t rx_sw_desc_num;
  2641. struct dp_srng *dp_rxdma_srng;
  2642. struct rx_desc_pool *rx_desc_pool;
  2643. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2644. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2645. /**
  2646. * If NSS is enabled, rx_desc_pool is already filled.
  2647. * Hence, just disable desc_pool frag flag.
  2648. */
  2649. dp_rx_enable_mon_dest_frag(rx_desc_pool, false);
  2650. dp_rx_info("%pK: nss-wifi<4> skip Rx refil %d",
  2651. soc, mac_for_pdev);
  2652. return QDF_STATUS_SUCCESS;
  2653. }
  2654. if (dp_rx_desc_pool_is_allocated(rx_desc_pool) == QDF_STATUS_E_NOMEM)
  2655. return QDF_STATUS_E_NOMEM;
  2656. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2657. rxdma_entries = dp_rxdma_srng->num_entries;
  2658. soc->process_rx_status = CONFIG_PROCESS_RX_STATUS;
  2659. rx_sw_desc_num =
  2660. wlan_cfg_get_dp_soc_rx_sw_desc_num(soc->wlan_cfg_ctx);
  2661. rx_desc_pool->owner = dp_rx_get_rx_bm_id(soc);
  2662. rx_desc_pool->buf_size = RX_DATA_BUFFER_SIZE;
  2663. rx_desc_pool->buf_alignment = RX_DATA_BUFFER_ALIGNMENT;
  2664. /* Disable monitor dest processing via frag */
  2665. dp_rx_enable_mon_dest_frag(rx_desc_pool, false);
  2666. dp_rx_desc_pool_init(soc, mac_for_pdev,
  2667. rx_sw_desc_num, rx_desc_pool);
  2668. return QDF_STATUS_SUCCESS;
  2669. }
  2670. /*
  2671. * dp_rx_pdev_desc_pool_deinit() - de-initialize software rx descriptor pools
  2672. * @pdev: core txrx pdev context
  2673. *
  2674. * This function resets the freelist of rx descriptors and destroys locks
  2675. * associated with this list of descriptors.
  2676. */
  2677. void dp_rx_pdev_desc_pool_deinit(struct dp_pdev *pdev)
  2678. {
  2679. int mac_for_pdev = pdev->lmac_id;
  2680. struct dp_soc *soc = pdev->soc;
  2681. struct rx_desc_pool *rx_desc_pool;
  2682. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2683. dp_rx_desc_pool_deinit(soc, rx_desc_pool, mac_for_pdev);
  2684. }
  2685. /*
  2686. * dp_rx_pdev_buffers_alloc() - Allocate nbufs (skbs) and replenish RxDMA ring
  2687. *
  2688. * @pdev: core txrx pdev context
  2689. *
  2690. * Return: QDF_STATUS - QDF_STATUS_SUCCESS
  2691. * QDF_STATUS_E_NOMEM
  2692. */
  2693. QDF_STATUS
  2694. dp_rx_pdev_buffers_alloc(struct dp_pdev *pdev)
  2695. {
  2696. int mac_for_pdev = pdev->lmac_id;
  2697. struct dp_soc *soc = pdev->soc;
  2698. struct dp_srng *dp_rxdma_srng;
  2699. struct rx_desc_pool *rx_desc_pool;
  2700. uint32_t rxdma_entries;
  2701. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2702. rxdma_entries = dp_rxdma_srng->num_entries;
  2703. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2704. /* Initialize RX buffer pool which will be
  2705. * used during low memory conditions
  2706. */
  2707. dp_rx_buffer_pool_init(soc, mac_for_pdev);
  2708. return dp_pdev_rx_buffers_attach_simple(soc, mac_for_pdev,
  2709. dp_rxdma_srng,
  2710. rx_desc_pool,
  2711. rxdma_entries - 1);
  2712. }
  2713. /*
  2714. * dp_rx_pdev_buffers_free - Free nbufs (skbs)
  2715. *
  2716. * @pdev: core txrx pdev context
  2717. */
  2718. void
  2719. dp_rx_pdev_buffers_free(struct dp_pdev *pdev)
  2720. {
  2721. int mac_for_pdev = pdev->lmac_id;
  2722. struct dp_soc *soc = pdev->soc;
  2723. struct rx_desc_pool *rx_desc_pool;
  2724. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2725. dp_rx_desc_nbuf_free(soc, rx_desc_pool);
  2726. dp_rx_buffer_pool_deinit(soc, mac_for_pdev);
  2727. }
  2728. #ifdef DP_RX_SPECIAL_FRAME_NEED
  2729. bool dp_rx_deliver_special_frame(struct dp_soc *soc,
  2730. struct dp_txrx_peer *txrx_peer,
  2731. qdf_nbuf_t nbuf, uint32_t frame_mask,
  2732. uint8_t *rx_tlv_hdr)
  2733. {
  2734. uint32_t l2_hdr_offset = 0;
  2735. uint16_t msdu_len = 0;
  2736. uint32_t skip_len;
  2737. l2_hdr_offset =
  2738. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, rx_tlv_hdr);
  2739. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  2740. skip_len = l2_hdr_offset;
  2741. } else {
  2742. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2743. skip_len = l2_hdr_offset + soc->rx_pkt_tlv_size;
  2744. qdf_nbuf_set_pktlen(nbuf, msdu_len + skip_len);
  2745. }
  2746. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(nbuf) = 1;
  2747. dp_rx_set_hdr_pad(nbuf, l2_hdr_offset);
  2748. qdf_nbuf_pull_head(nbuf, skip_len);
  2749. if (txrx_peer->vdev) {
  2750. dp_rx_send_pktlog(soc, txrx_peer->vdev->pdev, nbuf,
  2751. QDF_TX_RX_STATUS_OK);
  2752. }
  2753. if (dp_rx_is_special_frame(nbuf, frame_mask)) {
  2754. dp_info("special frame, mpdu sn 0x%x",
  2755. hal_rx_get_rx_sequence(soc->hal_soc, rx_tlv_hdr));
  2756. qdf_nbuf_set_exc_frame(nbuf, 1);
  2757. dp_rx_deliver_to_stack(soc, txrx_peer->vdev, txrx_peer,
  2758. nbuf, NULL);
  2759. return true;
  2760. }
  2761. return false;
  2762. }
  2763. #endif
  2764. #ifdef WLAN_FEATURE_MARK_FIRST_WAKEUP_PACKET
  2765. void dp_rx_mark_first_packet_after_wow_wakeup(struct dp_pdev *pdev,
  2766. uint8_t *rx_tlv,
  2767. qdf_nbuf_t nbuf)
  2768. {
  2769. struct dp_soc *soc;
  2770. if (!pdev->is_first_wakeup_packet)
  2771. return;
  2772. soc = pdev->soc;
  2773. if (hal_get_first_wow_wakeup_packet(soc->hal_soc, rx_tlv)) {
  2774. qdf_nbuf_mark_wakeup_frame(nbuf);
  2775. dp_info("First packet after WOW Wakeup rcvd");
  2776. }
  2777. }
  2778. #endif