wsa884x.c 57 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/module.h>
  6. #include <linux/init.h>
  7. #include <linux/slab.h>
  8. #include <linux/platform_device.h>
  9. #include <linux/device.h>
  10. #include <linux/printk.h>
  11. #include <linux/bitops.h>
  12. #include <linux/regulator/consumer.h>
  13. #include <linux/pm_runtime.h>
  14. #include <linux/delay.h>
  15. #include <linux/kernel.h>
  16. #include <linux/gpio.h>
  17. #include <linux/of_gpio.h>
  18. #include <linux/of_platform.h>
  19. #include <linux/regmap.h>
  20. #include <linux/debugfs.h>
  21. #include <soc/soundwire.h>
  22. #include <sound/pcm.h>
  23. #include <sound/pcm_params.h>
  24. #include <sound/soc.h>
  25. #include <sound/soc-dapm.h>
  26. #include <sound/tlv.h>
  27. #include <asoc/msm-cdc-pinctrl.h>
  28. #include <asoc/msm-cdc-supply.h>
  29. #include "wsa884x.h"
  30. #include "internal.h"
  31. #include "asoc/bolero-slave-internal.h"
  32. #include <linux/qti-regmap-debugfs.h>
  33. #define T1_TEMP -10
  34. #define T2_TEMP 150
  35. #define LOW_TEMP_THRESHOLD 5
  36. #define HIGH_TEMP_THRESHOLD 45
  37. #define TEMP_INVALID 0xFFFF
  38. #define WSA884X_TEMP_RETRY 3
  39. #define MAX_NAME_LEN 40
  40. #define WSA884X_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
  41. SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |\
  42. SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000 |\
  43. SNDRV_PCM_RATE_384000)
  44. /* Fractional Rates */
  45. #define WSA884X_FRAC_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_88200 |\
  46. SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_352800)
  47. #define WSA884X_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
  48. SNDRV_PCM_FMTBIT_S24_LE |\
  49. SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S32_LE)
  50. #define REG_FIELD_VALUE(register_name, field_name, value) \
  51. WSA884X_##register_name, FIELD_MASK(register_name, field_name), \
  52. value << FIELD_SHIFT(register_name, field_name)
  53. struct wsa_temp_register {
  54. u8 d1_msb;
  55. u8 d1_lsb;
  56. u8 d2_msb;
  57. u8 d2_lsb;
  58. u8 dmeas_msb;
  59. u8 dmeas_lsb;
  60. };
  61. enum {
  62. COMP_OFFSET0,
  63. COMP_OFFSET1,
  64. COMP_OFFSET2,
  65. COMP_OFFSET3,
  66. COMP_OFFSET4,
  67. };
  68. struct wsa_reg_mask_val {
  69. u16 reg;
  70. u8 mask;
  71. u8 val;
  72. };
  73. static const struct wsa_reg_mask_val reg_init[] = {
  74. {REG_FIELD_VALUE(CDC_SPK_DSM_A2_0, COEF_A2, 0x0A)},
  75. {REG_FIELD_VALUE(CDC_SPK_DSM_A2_1, COEF_A2, 0x08)},
  76. {REG_FIELD_VALUE(CDC_SPK_DSM_A3_0, COEF_A3, 0xF3)},
  77. {REG_FIELD_VALUE(CDC_SPK_DSM_A3_1, COEF_A3, 0x07)},
  78. {REG_FIELD_VALUE(CDC_SPK_DSM_A4_0, COEF_A4, 0x79)},
  79. {REG_FIELD_VALUE(CDC_SPK_DSM_A5_0, COEF_A5, 0x0B)},
  80. {REG_FIELD_VALUE(CDC_SPK_DSM_A6_0, COEF_A6, 0x8A)},
  81. {REG_FIELD_VALUE(CDC_SPK_DSM_A7_0, COEF_A7, 0x9B)},
  82. {REG_FIELD_VALUE(CDC_SPK_DSM_C_0, COEF_C3, 0x06)},
  83. {REG_FIELD_VALUE(CDC_SPK_DSM_C_0, COEF_C2, 0x08)},
  84. {REG_FIELD_VALUE(CDC_SPK_DSM_C_2, COEF_C7, 0x0F)},
  85. {REG_FIELD_VALUE(CDC_SPK_DSM_C_3, COEF_C7, 0x20)},
  86. {REG_FIELD_VALUE(CDC_SPK_DSM_R1, SAT_LIMIT_R1, 0x83)},
  87. {REG_FIELD_VALUE(CDC_SPK_DSM_R2, SAT_LIMIT_R2, 0x7F)},
  88. {REG_FIELD_VALUE(CDC_SPK_DSM_R3, SAT_LIMIT_R3, 0x9D)},
  89. {REG_FIELD_VALUE(CDC_SPK_DSM_R4, SAT_LIMIT_R4, 0x82)},
  90. {REG_FIELD_VALUE(CDC_SPK_DSM_R5, SAT_LIMIT_R5, 0x8B)},
  91. {REG_FIELD_VALUE(CDC_SPK_DSM_R6, SAT_LIMIT_R6, 0x9B)},
  92. {REG_FIELD_VALUE(CDC_SPK_DSM_R7, SAT_LIMIT_R7, 0x3F)},
  93. {REG_FIELD_VALUE(DRE_CTL_0, PROG_DELAY, 0x00)},
  94. {REG_FIELD_VALUE(BOP_DEGLITCH_CTL, BOP_DEGLITCH_SETTING, 0x08)},
  95. {REG_FIELD_VALUE(GAIN_RAMPING_MIN, MIN_GAIN, 0x0E)},
  96. {REG_FIELD_VALUE(CLSH_SOFT_MAX, SOFT_MAX, 0xFF)},
  97. {REG_FIELD_VALUE(CLSH_VTH1, CLSH_VTH1, 0xFF)},
  98. {REG_FIELD_VALUE(VSENSE1, GAIN_VSENSE_FE, 0x04)},
  99. {REG_FIELD_VALUE(ADC_2, ISNS_LOAD_STORED, 0x00)},
  100. {REG_FIELD_VALUE(ADC_7, EN_AZ_REG, 0x01)},
  101. {REG_FIELD_VALUE(ADC_7, EN_SAR_REG, 0x01)}
  102. };
  103. static int wsa884x_handle_post_irq(void *data);
  104. static int wsa884x_get_temperature(struct snd_soc_component *component,
  105. int *temp);
  106. enum {
  107. WSA8840 = 0,
  108. WSA8845 = 5,
  109. WSA884H = 12,
  110. };
  111. enum {
  112. SPKR_STATUS = 0,
  113. WSA_SUPPLIES_LPM_MODE,
  114. SPKR_ADIE_LB,
  115. };
  116. enum {
  117. WSA884X_IRQ_INT_SAF2WAR = 0,
  118. WSA884X_IRQ_INT_WAR2SAF,
  119. WSA884X_IRQ_INT_DISABLE,
  120. WSA884X_IRQ_INT_OCP,
  121. WSA884X_IRQ_INT_CLIP,
  122. WSA884X_IRQ_INT_PDM_WD,
  123. WSA884X_IRQ_INT_CLK_WD,
  124. WSA884X_IRQ_INT_INTR_PIN,
  125. WSA884X_IRQ_INT_UVLO,
  126. WSA884X_IRQ_INT_PA_ON_ERR,
  127. WSA884X_NUM_IRQS,
  128. };
  129. static const struct regmap_irq wsa884x_irqs[WSA884X_NUM_IRQS] = {
  130. REGMAP_IRQ_REG(WSA884X_IRQ_INT_SAF2WAR, 0, 0x01),
  131. REGMAP_IRQ_REG(WSA884X_IRQ_INT_WAR2SAF, 0, 0x02),
  132. REGMAP_IRQ_REG(WSA884X_IRQ_INT_DISABLE, 0, 0x04),
  133. REGMAP_IRQ_REG(WSA884X_IRQ_INT_OCP, 0, 0x08),
  134. REGMAP_IRQ_REG(WSA884X_IRQ_INT_CLIP, 0, 0x10),
  135. REGMAP_IRQ_REG(WSA884X_IRQ_INT_PDM_WD, 0, 0x20),
  136. REGMAP_IRQ_REG(WSA884X_IRQ_INT_CLK_WD, 0, 0x40),
  137. REGMAP_IRQ_REG(WSA884X_IRQ_INT_INTR_PIN, 0, 0x80),
  138. REGMAP_IRQ_REG(WSA884X_IRQ_INT_UVLO, 1, 0x01),
  139. REGMAP_IRQ_REG(WSA884X_IRQ_INT_PA_ON_ERR, 1, 0x02),
  140. };
  141. static struct regmap_irq_chip wsa884x_regmap_irq_chip = {
  142. .name = "wsa884x",
  143. .irqs = wsa884x_irqs,
  144. .num_irqs = ARRAY_SIZE(wsa884x_irqs),
  145. .num_regs = 2,
  146. .status_base = WSA884X_INTR_STATUS0,
  147. .mask_base = WSA884X_INTR_MASK0,
  148. .type_base = WSA884X_INTR_LEVEL0,
  149. .ack_base = WSA884X_INTR_CLEAR0,
  150. .use_ack = 1,
  151. .runtime_pm = false,
  152. .handle_post_irq = wsa884x_handle_post_irq,
  153. .irq_drv_data = NULL,
  154. };
  155. static int wsa884x_handle_post_irq(void *data)
  156. {
  157. struct wsa884x_priv *wsa884x = data;
  158. u32 sts1 = 0, sts2 = 0;
  159. regmap_read(wsa884x->regmap, WSA884X_INTR_STATUS0, &sts1);
  160. regmap_read(wsa884x->regmap, WSA884X_INTR_STATUS1, &sts2);
  161. wsa884x->swr_slave->slave_irq_pending =
  162. ((sts1 || sts2) ? true : false);
  163. return IRQ_HANDLED;
  164. }
  165. #ifdef CONFIG_DEBUG_FS
  166. static int codec_debug_open(struct inode *inode, struct file *file)
  167. {
  168. file->private_data = inode->i_private;
  169. return 0;
  170. }
  171. static int get_parameters(char *buf, u32 *param1, int num_of_par)
  172. {
  173. char *token;
  174. int base, cnt;
  175. token = strsep(&buf, " ");
  176. for (cnt = 0; cnt < num_of_par; cnt++) {
  177. if (token) {
  178. if ((token[1] == 'x') || (token[1] == 'X'))
  179. base = 16;
  180. else
  181. base = 10;
  182. if (kstrtou32(token, base, &param1[cnt]) != 0)
  183. return -EINVAL;
  184. token = strsep(&buf, " ");
  185. } else {
  186. return -EINVAL;
  187. }
  188. }
  189. return 0;
  190. }
  191. static bool is_swr_slave_reg_readable(int reg)
  192. {
  193. int ret = true;
  194. if (((reg > 0x46) && (reg < 0x4A)) ||
  195. ((reg > 0x4A) && (reg < 0x50)) ||
  196. ((reg > 0x55) && (reg < 0xD0)) ||
  197. ((reg > 0xD0) && (reg < 0xE0)) ||
  198. ((reg > 0xE0) && (reg < 0xF0)) ||
  199. ((reg > 0xF0) && (reg < 0x100)) ||
  200. ((reg > 0x105) && (reg < 0x120)) ||
  201. ((reg > 0x205) && (reg < 0x220)) ||
  202. ((reg > 0x305) && (reg < 0x320)) ||
  203. ((reg > 0x405) && (reg < 0x420)) ||
  204. ((reg > 0x128) && (reg < 0x130)) ||
  205. ((reg > 0x228) && (reg < 0x230)) ||
  206. ((reg > 0x328) && (reg < 0x330)) ||
  207. ((reg > 0x428) && (reg < 0x430)) ||
  208. ((reg > 0x138) && (reg < 0x205)) ||
  209. ((reg > 0x238) && (reg < 0x305)) ||
  210. ((reg > 0x338) && (reg < 0x405)) ||
  211. ((reg > 0x405) && (reg < 0xF00)) ||
  212. ((reg > 0xF05) && (reg < 0xF20)) ||
  213. ((reg > 0xF25) && (reg < 0xF30)) ||
  214. ((reg > 0xF35) && (reg < 0x2000)))
  215. ret = false;
  216. return ret;
  217. }
  218. static ssize_t swr_slave_reg_show(struct swr_device *pdev, char __user *ubuf,
  219. size_t count, loff_t *ppos)
  220. {
  221. int i, reg_val, len;
  222. ssize_t total = 0;
  223. char tmp_buf[SWR_SLV_MAX_BUF_LEN];
  224. if (!ubuf || !ppos)
  225. return 0;
  226. for (i = (((int) *ppos/BYTES_PER_LINE) + SWR_SLV_START_REG_ADDR);
  227. i <= SWR_SLV_MAX_REG_ADDR; i++) {
  228. if (!is_swr_slave_reg_readable(i))
  229. continue;
  230. swr_read(pdev, pdev->dev_num, i, &reg_val, 1);
  231. len = snprintf(tmp_buf, sizeof(tmp_buf), "0x%.3x: 0x%.2x\n", i,
  232. (reg_val & 0xFF));
  233. if (len < 0) {
  234. pr_err("%s: fail to fill the buffer\n", __func__);
  235. total = -EFAULT;
  236. goto copy_err;
  237. }
  238. if ((total + len) >= count - 1)
  239. break;
  240. if (copy_to_user((ubuf + total), tmp_buf, len)) {
  241. pr_err("%s: fail to copy reg dump\n", __func__);
  242. total = -EFAULT;
  243. goto copy_err;
  244. }
  245. total += len;
  246. *ppos += len;
  247. }
  248. copy_err:
  249. *ppos = SWR_SLV_MAX_REG_ADDR * BYTES_PER_LINE;
  250. return total;
  251. }
  252. static ssize_t codec_debug_dump(struct file *file, char __user *ubuf,
  253. size_t count, loff_t *ppos)
  254. {
  255. struct swr_device *pdev;
  256. if (!count || !file || !ppos || !ubuf)
  257. return -EINVAL;
  258. pdev = file->private_data;
  259. if (!pdev)
  260. return -EINVAL;
  261. if (*ppos < 0)
  262. return -EINVAL;
  263. return swr_slave_reg_show(pdev, ubuf, count, ppos);
  264. }
  265. static ssize_t codec_debug_read(struct file *file, char __user *ubuf,
  266. size_t count, loff_t *ppos)
  267. {
  268. char lbuf[SWR_SLV_RD_BUF_LEN];
  269. struct swr_device *pdev = NULL;
  270. struct wsa884x_priv *wsa884x = NULL;
  271. if (!count || !file || !ppos || !ubuf)
  272. return -EINVAL;
  273. pdev = file->private_data;
  274. if (!pdev)
  275. return -EINVAL;
  276. wsa884x = swr_get_dev_data(pdev);
  277. if (!wsa884x)
  278. return -EINVAL;
  279. if (*ppos < 0)
  280. return -EINVAL;
  281. snprintf(lbuf, sizeof(lbuf), "0x%x\n",
  282. (wsa884x->read_data & 0xFF));
  283. return simple_read_from_buffer(ubuf, count, ppos, lbuf,
  284. strnlen(lbuf, 7));
  285. }
  286. static ssize_t codec_debug_peek_write(struct file *file,
  287. const char __user *ubuf, size_t cnt, loff_t *ppos)
  288. {
  289. char lbuf[SWR_SLV_WR_BUF_LEN];
  290. int rc = 0;
  291. u32 param[5];
  292. struct swr_device *pdev = NULL;
  293. struct wsa884x_priv *wsa884x = NULL;
  294. if (!cnt || !file || !ppos || !ubuf)
  295. return -EINVAL;
  296. pdev = file->private_data;
  297. if (!pdev)
  298. return -EINVAL;
  299. wsa884x = swr_get_dev_data(pdev);
  300. if (!wsa884x)
  301. return -EINVAL;
  302. if (*ppos < 0)
  303. return -EINVAL;
  304. if (cnt > sizeof(lbuf) - 1)
  305. return -EINVAL;
  306. rc = copy_from_user(lbuf, ubuf, cnt);
  307. if (rc)
  308. return -EFAULT;
  309. lbuf[cnt] = '\0';
  310. rc = get_parameters(lbuf, param, 1);
  311. if (!((param[0] <= SWR_SLV_MAX_REG_ADDR) && (rc == 0)))
  312. return -EINVAL;
  313. swr_read(pdev, pdev->dev_num, param[0], &wsa884x->read_data, 1);
  314. if (rc == 0)
  315. rc = cnt;
  316. else
  317. pr_err("%s: rc = %d\n", __func__, rc);
  318. return rc;
  319. }
  320. static ssize_t codec_debug_write(struct file *file,
  321. const char __user *ubuf, size_t cnt, loff_t *ppos)
  322. {
  323. char lbuf[SWR_SLV_WR_BUF_LEN];
  324. int rc = 0;
  325. u32 param[5];
  326. struct swr_device *pdev;
  327. if (!file || !ppos || !ubuf)
  328. return -EINVAL;
  329. pdev = file->private_data;
  330. if (!pdev)
  331. return -EINVAL;
  332. if (cnt > sizeof(lbuf) - 1)
  333. return -EINVAL;
  334. rc = copy_from_user(lbuf, ubuf, cnt);
  335. if (rc)
  336. return -EFAULT;
  337. lbuf[cnt] = '\0';
  338. rc = get_parameters(lbuf, param, 2);
  339. if (!((param[0] <= SWR_SLV_MAX_REG_ADDR) &&
  340. (param[1] <= 0xFF) && (rc == 0)))
  341. return -EINVAL;
  342. swr_write(pdev, pdev->dev_num, param[0], &param[1]);
  343. if (rc == 0)
  344. rc = cnt;
  345. else
  346. pr_err("%s: rc = %d\n", __func__, rc);
  347. return rc;
  348. }
  349. static const struct file_operations codec_debug_write_ops = {
  350. .open = codec_debug_open,
  351. .write = codec_debug_write,
  352. };
  353. static const struct file_operations codec_debug_read_ops = {
  354. .open = codec_debug_open,
  355. .read = codec_debug_read,
  356. .write = codec_debug_peek_write,
  357. };
  358. static const struct file_operations codec_debug_dump_ops = {
  359. .open = codec_debug_open,
  360. .read = codec_debug_dump,
  361. };
  362. #endif
  363. static void wsa884x_regcache_sync(struct wsa884x_priv *wsa884x)
  364. {
  365. mutex_lock(&wsa884x->res_lock);
  366. regcache_mark_dirty(wsa884x->regmap);
  367. regcache_sync(wsa884x->regmap);
  368. mutex_unlock(&wsa884x->res_lock);
  369. }
  370. static irqreturn_t wsa884x_saf2war_handle_irq(int irq, void *data)
  371. {
  372. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  373. __func__, irq);
  374. return IRQ_HANDLED;
  375. }
  376. static irqreturn_t wsa884x_war2saf_handle_irq(int irq, void *data)
  377. {
  378. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  379. __func__, irq);
  380. return IRQ_HANDLED;
  381. }
  382. static irqreturn_t wsa884x_otp_handle_irq(int irq, void *data)
  383. {
  384. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  385. __func__, irq);
  386. return IRQ_HANDLED;
  387. }
  388. static irqreturn_t wsa884x_ocp_handle_irq(int irq, void *data)
  389. {
  390. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  391. __func__, irq);
  392. return IRQ_HANDLED;
  393. }
  394. static irqreturn_t wsa884x_clip_handle_irq(int irq, void *data)
  395. {
  396. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  397. __func__, irq);
  398. return IRQ_HANDLED;
  399. }
  400. static irqreturn_t wsa884x_pdm_wd_handle_irq(int irq, void *data)
  401. {
  402. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  403. __func__, irq);
  404. return IRQ_HANDLED;
  405. }
  406. static irqreturn_t wsa884x_clk_wd_handle_irq(int irq, void *data)
  407. {
  408. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  409. __func__, irq);
  410. return IRQ_HANDLED;
  411. }
  412. static irqreturn_t wsa884x_ext_int_handle_irq(int irq, void *data)
  413. {
  414. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  415. __func__, irq);
  416. return IRQ_HANDLED;
  417. }
  418. static irqreturn_t wsa884x_uvlo_handle_irq(int irq, void *data)
  419. {
  420. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  421. __func__, irq);
  422. return IRQ_HANDLED;
  423. }
  424. static irqreturn_t wsa884x_pa_on_err_handle_irq(int irq, void *data)
  425. {
  426. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  427. __func__, irq);
  428. return IRQ_HANDLED;
  429. }
  430. static const char * const wsa_dev_mode_text[] = {
  431. "speaker", "receiver", "ultrasound"
  432. };
  433. static const struct soc_enum wsa_dev_mode_enum =
  434. SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(wsa_dev_mode_text), wsa_dev_mode_text);
  435. static int wsa_dev_mode_get(struct snd_kcontrol *kcontrol,
  436. struct snd_ctl_elem_value *ucontrol)
  437. {
  438. struct snd_soc_component *component =
  439. snd_soc_kcontrol_component(kcontrol);
  440. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  441. ucontrol->value.integer.value[0] = wsa884x->dev_mode;
  442. dev_dbg(component->dev, "%s: mode = 0x%x\n", __func__,
  443. wsa884x->dev_mode);
  444. return 0;
  445. }
  446. static int wsa_dev_mode_put(struct snd_kcontrol *kcontrol,
  447. struct snd_ctl_elem_value *ucontrol)
  448. {
  449. struct snd_soc_component *component =
  450. snd_soc_kcontrol_component(kcontrol);
  451. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  452. dev_dbg(component->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
  453. __func__, ucontrol->value.integer.value[0]);
  454. wsa884x->dev_mode = ucontrol->value.integer.value[0];
  455. return 0;
  456. }
  457. static const char * const wsa_pa_gain_text[] = {
  458. "G_18_DB", "G_16P5_DB", "G_15_DB", "G_13P5_DB", "G_12_DB", "G_10P5_DB",
  459. "G_9_DB", "G_7P5_DB", "G_6_DB", "G_4P5_DB", "G_3_DB", "G_1P5_DB",
  460. "G_0_DB"
  461. };
  462. static const struct soc_enum wsa_pa_gain_enum =
  463. SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(wsa_pa_gain_text), wsa_pa_gain_text);
  464. static int wsa_pa_gain_get(struct snd_kcontrol *kcontrol,
  465. struct snd_ctl_elem_value *ucontrol)
  466. {
  467. struct snd_soc_component *component =
  468. snd_soc_kcontrol_component(kcontrol);
  469. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  470. ucontrol->value.integer.value[0] = wsa884x->pa_gain;
  471. dev_dbg(component->dev, "%s: PA gain = 0x%x\n", __func__,
  472. wsa884x->pa_gain);
  473. return 0;
  474. }
  475. static int wsa_pa_gain_put(struct snd_kcontrol *kcontrol,
  476. struct snd_ctl_elem_value *ucontrol)
  477. {
  478. struct snd_soc_component *component =
  479. snd_soc_kcontrol_component(kcontrol);
  480. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  481. dev_dbg(component->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
  482. __func__, ucontrol->value.integer.value[0]);
  483. wsa884x->pa_gain = ucontrol->value.integer.value[0];
  484. return 0;
  485. }
  486. static int wsa884x_get_mute(struct snd_kcontrol *kcontrol,
  487. struct snd_ctl_elem_value *ucontrol)
  488. {
  489. struct snd_soc_component *component =
  490. snd_soc_kcontrol_component(kcontrol);
  491. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  492. ucontrol->value.integer.value[0] = wsa884x->pa_mute;
  493. return 0;
  494. }
  495. static int wsa884x_set_mute(struct snd_kcontrol *kcontrol,
  496. struct snd_ctl_elem_value *ucontrol)
  497. {
  498. struct snd_soc_component *component =
  499. snd_soc_kcontrol_component(kcontrol);
  500. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  501. int value = ucontrol->value.integer.value[0];
  502. dev_dbg(component->dev, "%s: mute current %d, new %d\n",
  503. __func__, wsa884x->pa_mute, value);
  504. wsa884x->pa_mute = value;
  505. return 0;
  506. }
  507. static int wsa_get_temp(struct snd_kcontrol *kcontrol,
  508. struct snd_ctl_elem_value *ucontrol)
  509. {
  510. struct snd_soc_component *component =
  511. snd_soc_kcontrol_component(kcontrol);
  512. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  513. int temp = 0;
  514. if (test_bit(SPKR_STATUS, &wsa884x->status_mask))
  515. temp = wsa884x->curr_temp;
  516. else
  517. wsa884x_get_temperature(component, &temp);
  518. ucontrol->value.integer.value[0] = temp;
  519. return 0;
  520. }
  521. static ssize_t wsa884x_codec_version_read(struct snd_info_entry *entry,
  522. void *file_private_data, struct file *file,
  523. char __user *buf, size_t count, loff_t pos)
  524. {
  525. struct wsa884x_priv *wsa884x;
  526. char buffer[WSA884X_VERSION_ENTRY_SIZE];
  527. int len = 0;
  528. wsa884x = (struct wsa884x_priv *) entry->private_data;
  529. if (!wsa884x) {
  530. pr_err("%s: wsa884x priv is null\n", __func__);
  531. return -EINVAL;
  532. }
  533. switch (wsa884x->version) {
  534. case WSA884X_VERSION_1_0:
  535. len = snprintf(buffer, sizeof(buffer), "WSA884X_1_0\n");
  536. break;
  537. default:
  538. len = snprintf(buffer, sizeof(buffer), "VER_UNDEFINED\n");
  539. break;
  540. }
  541. return simple_read_from_buffer(buf, count, &pos, buffer, len);
  542. }
  543. static struct snd_info_entry_ops wsa884x_codec_info_ops = {
  544. .read = wsa884x_codec_version_read,
  545. };
  546. static ssize_t wsa884x_variant_read(struct snd_info_entry *entry,
  547. void *file_private_data,
  548. struct file *file,
  549. char __user *buf, size_t count,
  550. loff_t pos)
  551. {
  552. struct wsa884x_priv *wsa884x;
  553. char buffer[WSA884X_VARIANT_ENTRY_SIZE];
  554. int len = 0;
  555. wsa884x = (struct wsa884x_priv *) entry->private_data;
  556. if (!wsa884x) {
  557. pr_err("%s: wsa884x priv is null\n", __func__);
  558. return -EINVAL;
  559. }
  560. switch (wsa884x->variant) {
  561. case WSA8840:
  562. len = snprintf(buffer, sizeof(buffer), "WSA8840\n");
  563. break;
  564. case WSA8845:
  565. len = snprintf(buffer, sizeof(buffer), "WSA8845\n");
  566. break;
  567. case WSA884H:
  568. len = snprintf(buffer, sizeof(buffer), "WSA884H\n");
  569. break;
  570. default:
  571. len = snprintf(buffer, sizeof(buffer), "UNDEFINED\n");
  572. break;
  573. }
  574. return simple_read_from_buffer(buf, count, &pos, buffer, len);
  575. }
  576. static struct snd_info_entry_ops wsa884x_variant_ops = {
  577. .read = wsa884x_variant_read,
  578. };
  579. /*
  580. * wsa884x_codec_info_create_codec_entry - creates wsa884x module
  581. * @codec_root: The parent directory
  582. * @component: Codec instance
  583. *
  584. * Creates wsa884x module and version entry under the given
  585. * parent directory.
  586. *
  587. * Return: 0 on success or negative error code on failure.
  588. */
  589. int wsa884x_codec_info_create_codec_entry(struct snd_info_entry *codec_root,
  590. struct snd_soc_component *component)
  591. {
  592. struct snd_info_entry *version_entry;
  593. struct snd_info_entry *variant_entry;
  594. struct wsa884x_priv *wsa884x;
  595. struct snd_soc_card *card;
  596. char name[80];
  597. if (!codec_root || !component)
  598. return -EINVAL;
  599. wsa884x = snd_soc_component_get_drvdata(component);
  600. if (wsa884x->entry) {
  601. dev_dbg(wsa884x->dev,
  602. "%s:wsa884x module already created\n", __func__);
  603. return 0;
  604. }
  605. card = component->card;
  606. snprintf(name, sizeof(name), "%s.%llx", "wsa884x",
  607. wsa884x->swr_slave->addr);
  608. wsa884x->entry = snd_info_create_module_entry(codec_root->module,
  609. (const char *)name,
  610. codec_root);
  611. if (!wsa884x->entry) {
  612. dev_dbg(component->dev, "%s: failed to create wsa884x entry\n",
  613. __func__);
  614. return -ENOMEM;
  615. }
  616. wsa884x->entry->mode = S_IFDIR | 0555;
  617. if (snd_info_register(wsa884x->entry) < 0) {
  618. snd_info_free_entry(wsa884x->entry);
  619. return -ENOMEM;
  620. }
  621. version_entry = snd_info_create_card_entry(card->snd_card,
  622. "version",
  623. wsa884x->entry);
  624. if (!version_entry) {
  625. dev_dbg(component->dev, "%s: failed to create wsa884x version entry\n",
  626. __func__);
  627. snd_info_free_entry(wsa884x->entry);
  628. return -ENOMEM;
  629. }
  630. version_entry->private_data = wsa884x;
  631. version_entry->size = WSA884X_VERSION_ENTRY_SIZE;
  632. version_entry->content = SNDRV_INFO_CONTENT_DATA;
  633. version_entry->c.ops = &wsa884x_codec_info_ops;
  634. if (snd_info_register(version_entry) < 0) {
  635. snd_info_free_entry(version_entry);
  636. snd_info_free_entry(wsa884x->entry);
  637. return -ENOMEM;
  638. }
  639. wsa884x->version_entry = version_entry;
  640. variant_entry = snd_info_create_card_entry(card->snd_card,
  641. "variant",
  642. wsa884x->entry);
  643. if (!variant_entry) {
  644. dev_dbg(component->dev,
  645. "%s: failed to create wsa884x variant entry\n",
  646. __func__);
  647. snd_info_free_entry(version_entry);
  648. snd_info_free_entry(wsa884x->entry);
  649. return -ENOMEM;
  650. }
  651. variant_entry->private_data = wsa884x;
  652. variant_entry->size = WSA884X_VARIANT_ENTRY_SIZE;
  653. variant_entry->content = SNDRV_INFO_CONTENT_DATA;
  654. variant_entry->c.ops = &wsa884x_variant_ops;
  655. if (snd_info_register(variant_entry) < 0) {
  656. snd_info_free_entry(variant_entry);
  657. snd_info_free_entry(version_entry);
  658. snd_info_free_entry(wsa884x->entry);
  659. return -ENOMEM;
  660. }
  661. wsa884x->variant_entry = variant_entry;
  662. return 0;
  663. }
  664. EXPORT_SYMBOL(wsa884x_codec_info_create_codec_entry);
  665. /*
  666. * wsa884x_codec_get_dev_num - returns swr device number
  667. * @component: Codec instance
  668. *
  669. * Return: swr device number on success or negative error
  670. * code on failure.
  671. */
  672. int wsa884x_codec_get_dev_num(struct snd_soc_component *component)
  673. {
  674. struct wsa884x_priv *wsa884x;
  675. if (!component)
  676. return -EINVAL;
  677. wsa884x = snd_soc_component_get_drvdata(component);
  678. if (!wsa884x) {
  679. pr_err("%s: wsa884x component is NULL\n", __func__);
  680. return -EINVAL;
  681. }
  682. return wsa884x->swr_slave->dev_num;
  683. }
  684. EXPORT_SYMBOL(wsa884x_codec_get_dev_num);
  685. static int wsa884x_get_dev_num(struct snd_kcontrol *kcontrol,
  686. struct snd_ctl_elem_value *ucontrol)
  687. {
  688. struct snd_soc_component *component =
  689. snd_soc_kcontrol_component(kcontrol);
  690. struct wsa884x_priv *wsa884x;
  691. if (!component)
  692. return -EINVAL;
  693. wsa884x = snd_soc_component_get_drvdata(component);
  694. if (!wsa884x) {
  695. pr_err("%s: wsa884x component is NULL\n", __func__);
  696. return -EINVAL;
  697. }
  698. ucontrol->value.integer.value[0] = wsa884x->swr_slave->dev_num;
  699. return 0;
  700. }
  701. static int wsa884x_get_compander(struct snd_kcontrol *kcontrol,
  702. struct snd_ctl_elem_value *ucontrol)
  703. {
  704. struct snd_soc_component *component =
  705. snd_soc_kcontrol_component(kcontrol);
  706. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  707. ucontrol->value.integer.value[0] = wsa884x->comp_enable;
  708. return 0;
  709. }
  710. static int wsa884x_set_compander(struct snd_kcontrol *kcontrol,
  711. struct snd_ctl_elem_value *ucontrol)
  712. {
  713. struct snd_soc_component *component =
  714. snd_soc_kcontrol_component(kcontrol);
  715. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  716. int value = ucontrol->value.integer.value[0];
  717. dev_dbg(component->dev, "%s: Compander enable current %d, new %d\n",
  718. __func__, wsa884x->comp_enable, value);
  719. wsa884x->comp_enable = value;
  720. return 0;
  721. }
  722. static int wsa884x_get_comp_offset(struct snd_kcontrol *kcontrol,
  723. struct snd_ctl_elem_value *ucontrol)
  724. {
  725. struct snd_soc_component *component =
  726. snd_soc_kcontrol_component(kcontrol);
  727. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  728. ucontrol->value.integer.value[0] = wsa884x->comp_offset;
  729. return 0;
  730. }
  731. static int wsa884x_set_comp_offset(struct snd_kcontrol *kcontrol,
  732. struct snd_ctl_elem_value *ucontrol)
  733. {
  734. struct snd_soc_component *component =
  735. snd_soc_kcontrol_component(kcontrol);
  736. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  737. int value = ucontrol->value.integer.value[0];
  738. dev_dbg(component->dev, "%s: comp_offset %d\n",
  739. __func__, wsa884x->comp_offset);
  740. wsa884x->comp_offset = value;
  741. return 0;
  742. }
  743. static int wsa884x_get_visense(struct snd_kcontrol *kcontrol,
  744. struct snd_ctl_elem_value *ucontrol)
  745. {
  746. struct snd_soc_component *component =
  747. snd_soc_kcontrol_component(kcontrol);
  748. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  749. ucontrol->value.integer.value[0] = wsa884x->visense_enable;
  750. return 0;
  751. }
  752. static int wsa884x_set_visense(struct snd_kcontrol *kcontrol,
  753. struct snd_ctl_elem_value *ucontrol)
  754. {
  755. struct snd_soc_component *component =
  756. snd_soc_kcontrol_component(kcontrol);
  757. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  758. int value = ucontrol->value.integer.value[0];
  759. dev_dbg(component->dev, "%s: VIsense enable current %d, new %d\n",
  760. __func__, wsa884x->visense_enable, value);
  761. wsa884x->visense_enable = value;
  762. return 0;
  763. }
  764. static int wsa884x_get_pbr(struct snd_kcontrol *kcontrol,
  765. struct snd_ctl_elem_value *ucontrol)
  766. {
  767. struct snd_soc_component *component =
  768. snd_soc_kcontrol_component(kcontrol);
  769. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  770. ucontrol->value.integer.value[0] = wsa884x->pbr_enable;
  771. return 0;
  772. }
  773. static int wsa884x_set_pbr(struct snd_kcontrol *kcontrol,
  774. struct snd_ctl_elem_value *ucontrol)
  775. {
  776. struct snd_soc_component *component =
  777. snd_soc_kcontrol_component(kcontrol);
  778. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  779. int value = ucontrol->value.integer.value[0];
  780. dev_dbg(component->dev, "%s: VIsense enable current %d, new %d\n",
  781. __func__, wsa884x->pbr_enable, value);
  782. wsa884x->pbr_enable = value;
  783. return 0;
  784. }
  785. static int wsa884x_get_cps(struct snd_kcontrol *kcontrol,
  786. struct snd_ctl_elem_value *ucontrol)
  787. {
  788. struct snd_soc_component *component =
  789. snd_soc_kcontrol_component(kcontrol);
  790. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  791. ucontrol->value.integer.value[0] = wsa884x->cps_enable;
  792. return 0;
  793. }
  794. static int wsa884x_set_cps(struct snd_kcontrol *kcontrol,
  795. struct snd_ctl_elem_value *ucontrol)
  796. {
  797. struct snd_soc_component *component =
  798. snd_soc_kcontrol_component(kcontrol);
  799. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  800. int value = ucontrol->value.integer.value[0];
  801. dev_dbg(component->dev, "%s: VIsense enable current %d, new %d\n",
  802. __func__, wsa884x->cps_enable, value);
  803. wsa884x->cps_enable = value;
  804. return 0;
  805. }
  806. static int wsa884x_get_ext_vdd_spk(struct snd_kcontrol *kcontrol,
  807. struct snd_ctl_elem_value *ucontrol)
  808. {
  809. struct snd_soc_component *component =
  810. snd_soc_kcontrol_component(kcontrol);
  811. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  812. ucontrol->value.integer.value[0] = wsa884x->ext_vdd_spk;
  813. return 0;
  814. }
  815. static int wsa884x_put_ext_vdd_spk(struct snd_kcontrol *kcontrol,
  816. struct snd_ctl_elem_value *ucontrol)
  817. {
  818. struct snd_soc_component *component =
  819. snd_soc_kcontrol_component(kcontrol);
  820. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  821. int value = ucontrol->value.integer.value[0];
  822. dev_dbg(component->dev, "%s: Ext VDD SPK enable current %d, new %d\n",
  823. __func__, wsa884x->ext_vdd_spk, value);
  824. wsa884x->ext_vdd_spk = value;
  825. return 0;
  826. }
  827. static const struct snd_kcontrol_new wsa884x_snd_controls[] = {
  828. SOC_ENUM_EXT("WSA PA Gain", wsa_pa_gain_enum,
  829. wsa_pa_gain_get, wsa_pa_gain_put),
  830. SOC_SINGLE_EXT("WSA PA Mute", SND_SOC_NOPM, 0, 1, 0,
  831. wsa884x_get_mute, wsa884x_set_mute),
  832. SOC_SINGLE_EXT("WSA Temp", SND_SOC_NOPM, 0, UINT_MAX, 0,
  833. wsa_get_temp, NULL),
  834. SOC_SINGLE_EXT("WSA Get DevNum", SND_SOC_NOPM, 0, UINT_MAX, 0,
  835. wsa884x_get_dev_num, NULL),
  836. SOC_ENUM_EXT("WSA MODE", wsa_dev_mode_enum,
  837. wsa_dev_mode_get, wsa_dev_mode_put),
  838. SOC_SINGLE_EXT("COMP Offset", SND_SOC_NOPM, 0, 4, 0,
  839. wsa884x_get_comp_offset, wsa884x_set_comp_offset),
  840. SOC_SINGLE_EXT("COMP Switch", SND_SOC_NOPM, 0, 1, 0,
  841. wsa884x_get_compander, wsa884x_set_compander),
  842. SOC_SINGLE_EXT("VISENSE Switch", SND_SOC_NOPM, 0, 1, 0,
  843. wsa884x_get_visense, wsa884x_set_visense),
  844. SOC_SINGLE_EXT("PBR Switch", SND_SOC_NOPM, 0, 1, 0,
  845. wsa884x_get_pbr, wsa884x_set_pbr),
  846. SOC_SINGLE_EXT("CPS Switch", SND_SOC_NOPM, 0, 1, 0,
  847. wsa884x_get_cps, wsa884x_set_cps),
  848. SOC_SINGLE_EXT("External VDD_SPK", SND_SOC_NOPM, 0, 1, 0,
  849. wsa884x_get_ext_vdd_spk, wsa884x_put_ext_vdd_spk),
  850. };
  851. static const struct snd_kcontrol_new swr_dac_port[] = {
  852. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  853. };
  854. static int wsa884x_set_port(struct snd_soc_component *component, int port_idx,
  855. u8 *port_id, u8 *num_ch, u8 *ch_mask, u32 *ch_rate,
  856. u8 *port_type)
  857. {
  858. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  859. *port_id = wsa884x->port[port_idx].port_id;
  860. *num_ch = wsa884x->port[port_idx].num_ch;
  861. *ch_mask = wsa884x->port[port_idx].ch_mask;
  862. *ch_rate = wsa884x->port[port_idx].ch_rate;
  863. *port_type = wsa884x->port[port_idx].port_type;
  864. return 0;
  865. }
  866. static int wsa884x_enable_swr_dac_port(struct snd_soc_dapm_widget *w,
  867. struct snd_kcontrol *kcontrol, int event)
  868. {
  869. struct snd_soc_component *component =
  870. snd_soc_dapm_to_component(w->dapm);
  871. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  872. u8 port_id[WSA884X_MAX_SWR_PORTS];
  873. u8 num_ch[WSA884X_MAX_SWR_PORTS];
  874. u8 ch_mask[WSA884X_MAX_SWR_PORTS];
  875. u32 ch_rate[WSA884X_MAX_SWR_PORTS];
  876. u8 port_type[WSA884X_MAX_SWR_PORTS];
  877. u8 num_port = 0;
  878. dev_dbg(component->dev, "%s: event %d name %s\n", __func__,
  879. event, w->name);
  880. if (wsa884x == NULL)
  881. return -EINVAL;
  882. switch (event) {
  883. case SND_SOC_DAPM_PRE_PMU:
  884. wsa884x_set_port(component, SWR_DAC_PORT,
  885. &port_id[num_port], &num_ch[num_port],
  886. &ch_mask[num_port], &ch_rate[num_port],
  887. &port_type[num_port]);
  888. ++num_port;
  889. if (wsa884x->comp_enable) {
  890. wsa884x_set_port(component, SWR_COMP_PORT,
  891. &port_id[num_port], &num_ch[num_port],
  892. &ch_mask[num_port], &ch_rate[num_port],
  893. &port_type[num_port]);
  894. ++num_port;
  895. }
  896. if (wsa884x->pbr_enable) {
  897. wsa884x_set_port(component, SWR_PBR_PORT,
  898. &port_id[num_port], &num_ch[num_port],
  899. &ch_mask[num_port], &ch_rate[num_port],
  900. &port_type[num_port]);
  901. ++num_port;
  902. }
  903. if (wsa884x->visense_enable) {
  904. wsa884x_set_port(component, SWR_VISENSE_PORT,
  905. &port_id[num_port], &num_ch[num_port],
  906. &ch_mask[num_port], &ch_rate[num_port],
  907. &port_type[num_port]);
  908. ++num_port;
  909. }
  910. if (wsa884x->cps_enable) {
  911. wsa884x_set_port(component, SWR_CPS_PORT,
  912. &port_id[num_port], &num_ch[num_port],
  913. &ch_mask[num_port], &ch_rate[num_port],
  914. &port_type[num_port]);
  915. ++num_port;
  916. }
  917. swr_connect_port(wsa884x->swr_slave, &port_id[0], num_port,
  918. &ch_mask[0], &ch_rate[0], &num_ch[0],
  919. &port_type[0]);
  920. break;
  921. case SND_SOC_DAPM_POST_PMU:
  922. set_bit(SPKR_STATUS, &wsa884x->status_mask);
  923. break;
  924. case SND_SOC_DAPM_PRE_PMD:
  925. wsa884x_set_port(component, SWR_DAC_PORT,
  926. &port_id[num_port], &num_ch[num_port],
  927. &ch_mask[num_port], &ch_rate[num_port],
  928. &port_type[num_port]);
  929. ++num_port;
  930. if (wsa884x->comp_enable) {
  931. wsa884x_set_port(component, SWR_COMP_PORT,
  932. &port_id[num_port], &num_ch[num_port],
  933. &ch_mask[num_port], &ch_rate[num_port],
  934. &port_type[num_port]);
  935. ++num_port;
  936. }
  937. if (wsa884x->pbr_enable) {
  938. wsa884x_set_port(component, SWR_PBR_PORT,
  939. &port_id[num_port], &num_ch[num_port],
  940. &ch_mask[num_port], &ch_rate[num_port],
  941. &port_type[num_port]);
  942. ++num_port;
  943. }
  944. if (wsa884x->visense_enable) {
  945. wsa884x_set_port(component, SWR_VISENSE_PORT,
  946. &port_id[num_port], &num_ch[num_port],
  947. &ch_mask[num_port], &ch_rate[num_port],
  948. &port_type[num_port]);
  949. ++num_port;
  950. }
  951. if (wsa884x->cps_enable) {
  952. wsa884x_set_port(component, SWR_CPS_PORT,
  953. &port_id[num_port], &num_ch[num_port],
  954. &ch_mask[num_port], &ch_rate[num_port],
  955. &port_type[num_port]);
  956. ++num_port;
  957. }
  958. swr_disconnect_port(wsa884x->swr_slave, &port_id[0], num_port,
  959. &ch_mask[0], &port_type[0]);
  960. break;
  961. case SND_SOC_DAPM_POST_PMD:
  962. if (swr_set_device_group(wsa884x->swr_slave, SWR_GROUP_NONE))
  963. dev_err(component->dev,
  964. "%s: set num ch failed\n", __func__);
  965. swr_slvdev_datapath_control(wsa884x->swr_slave,
  966. wsa884x->swr_slave->dev_num,
  967. false);
  968. break;
  969. default:
  970. break;
  971. }
  972. return 0;
  973. }
  974. static int wsa884x_spkr_event(struct snd_soc_dapm_widget *w,
  975. struct snd_kcontrol *kcontrol, int event)
  976. {
  977. struct snd_soc_component *component =
  978. snd_soc_dapm_to_component(w->dapm);
  979. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  980. dev_dbg(component->dev, "%s: %s %d\n", __func__, w->name, event);
  981. switch (event) {
  982. case SND_SOC_DAPM_POST_PMU:
  983. swr_slvdev_datapath_control(wsa884x->swr_slave,
  984. wsa884x->swr_slave->dev_num,
  985. true);
  986. /* Added delay as per HW sequence */
  987. usleep_range(250, 300);
  988. snd_soc_component_update_bits(component,
  989. REG_FIELD_VALUE(DRE_CTL_1, CSR_GAIN_EN, 0x01));
  990. /* Added delay as per HW sequence */
  991. usleep_range(250, 300);
  992. if (wsa884x->comp_enable)
  993. snd_soc_component_update_bits(component,
  994. REG_FIELD_VALUE(DRE_CTL_0, OFFSET,
  995. wsa884x->comp_offset));
  996. wcd_enable_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_UVLO);
  997. /* Force remove group */
  998. swr_remove_from_group(wsa884x->swr_slave,
  999. wsa884x->swr_slave->dev_num);
  1000. snd_soc_component_update_bits(component,
  1001. REG_FIELD_VALUE(VBAT_THRM_FLT_CTL, VBAT_COEF_SEL, 0x03));
  1002. snd_soc_component_update_bits(component,
  1003. REG_FIELD_VALUE(VBAT_THRM_FLT_CTL, VBAT_FLT_EN, 0x01));
  1004. if (test_bit(SPKR_ADIE_LB, &wsa884x->status_mask))
  1005. snd_soc_component_update_bits(component,
  1006. REG_FIELD_VALUE(PA_FSM_EN, GLOBAL_PA_EN, 0x01));
  1007. break;
  1008. case SND_SOC_DAPM_PRE_PMD:
  1009. if (!test_bit(SPKR_ADIE_LB, &wsa884x->status_mask))
  1010. wcd_disable_irq(&wsa884x->irq_info,
  1011. WSA884X_IRQ_INT_PDM_WD);
  1012. snd_soc_component_update_bits(component,
  1013. REG_FIELD_VALUE(VBAT_THRM_FLT_CTL, VBAT_FLT_EN, 0x00));
  1014. snd_soc_component_update_bits(component,
  1015. REG_FIELD_VALUE(VBAT_THRM_FLT_CTL, VBAT_COEF_SEL, 0x00));
  1016. snd_soc_component_update_bits(component,
  1017. REG_FIELD_VALUE(PA_FSM_EN, GLOBAL_PA_EN, 0x00));
  1018. snd_soc_component_update_bits(component,
  1019. REG_FIELD_VALUE(PDM_WD_CTL, PDM_WD_EN, 0x00));
  1020. wcd_disable_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_UVLO);
  1021. clear_bit(SPKR_STATUS, &wsa884x->status_mask);
  1022. clear_bit(SPKR_ADIE_LB, &wsa884x->status_mask);
  1023. break;
  1024. }
  1025. return 0;
  1026. }
  1027. static const struct snd_soc_dapm_widget wsa884x_dapm_widgets[] = {
  1028. SND_SOC_DAPM_INPUT("IN"),
  1029. SND_SOC_DAPM_MIXER_E("SWR DAC_Port", SND_SOC_NOPM, 0, 0, swr_dac_port,
  1030. ARRAY_SIZE(swr_dac_port), wsa884x_enable_swr_dac_port,
  1031. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1032. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1033. SND_SOC_DAPM_SPK("SPKR", wsa884x_spkr_event),
  1034. };
  1035. static const struct snd_soc_dapm_route wsa884x_audio_map[] = {
  1036. {"SWR DAC_Port", "Switch", "IN"},
  1037. {"SPKR", NULL, "SWR DAC_Port"},
  1038. };
  1039. int wsa884x_set_channel_map(struct snd_soc_component *component, u8 *port,
  1040. u8 num_port, unsigned int *ch_mask,
  1041. unsigned int *ch_rate, u8 *port_type)
  1042. {
  1043. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  1044. int i;
  1045. if (!port || !ch_mask || !ch_rate ||
  1046. (num_port > WSA884X_MAX_SWR_PORTS)) {
  1047. dev_err(component->dev,
  1048. "%s: Invalid port=%pK, ch_mask=%pK, ch_rate=%pK\n",
  1049. __func__, port, ch_mask, ch_rate);
  1050. return -EINVAL;
  1051. }
  1052. for (i = 0; i < num_port; i++) {
  1053. wsa884x->port[i].port_id = port[i];
  1054. wsa884x->port[i].ch_mask = ch_mask[i];
  1055. wsa884x->port[i].ch_rate = ch_rate[i];
  1056. wsa884x->port[i].num_ch = __sw_hweight8(ch_mask[i]);
  1057. if (port_type)
  1058. wsa884x->port[i].port_type = port_type[i];
  1059. }
  1060. return 0;
  1061. }
  1062. EXPORT_SYMBOL(wsa884x_set_channel_map);
  1063. static void wsa884x_codec_init(struct snd_soc_component *component)
  1064. {
  1065. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  1066. int i;
  1067. if (!wsa884x)
  1068. return;
  1069. for (i = 0; i < ARRAY_SIZE(reg_init); i++)
  1070. snd_soc_component_update_bits(component, reg_init[i].reg,
  1071. reg_init[i].mask, reg_init[i].val);
  1072. if (wsa884x->variant == WSA8840 || wsa884x->variant == WSA8845) {
  1073. snd_soc_component_update_bits(component,
  1074. REG_FIELD_VALUE(DRE_CTL_0, OFFSET, 0x03));
  1075. wsa884x->comp_offset = COMP_OFFSET3;
  1076. }
  1077. }
  1078. static int32_t wsa884x_temp_reg_read(struct snd_soc_component *component,
  1079. struct wsa_temp_register *wsa_temp_reg)
  1080. {
  1081. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  1082. if (!wsa884x) {
  1083. dev_err(component->dev, "%s: wsa884x is NULL\n", __func__);
  1084. return -EINVAL;
  1085. }
  1086. mutex_lock(&wsa884x->res_lock);
  1087. snd_soc_component_update_bits(component,
  1088. REG_FIELD_VALUE(PA_FSM_BYP0, DC_CAL_EN, 0x01));
  1089. snd_soc_component_update_bits(component,
  1090. REG_FIELD_VALUE(PA_FSM_BYP0, BG_EN, 0x01));
  1091. snd_soc_component_update_bits(component,
  1092. REG_FIELD_VALUE(PA_FSM_BYP0, CLK_WD_EN, 0x01));
  1093. snd_soc_component_update_bits(component,
  1094. REG_FIELD_VALUE(PA_FSM_BYP0, TSADC_EN, 0x01));
  1095. snd_soc_component_update_bits(component,
  1096. REG_FIELD_VALUE(PA_FSM_BYP0, D_UNMUTE, 0x01));
  1097. snd_soc_component_update_bits(component,
  1098. REG_FIELD_VALUE(PA_FSM_BYP0, SPKR_PROT_EN, 0x01));
  1099. snd_soc_component_update_bits(component,
  1100. REG_FIELD_VALUE(TADC_VALUE_CTL, TEMP_VALUE_RD_EN, 0x00));
  1101. wsa_temp_reg->dmeas_msb = snd_soc_component_read(component,
  1102. WSA884X_TEMP_DIN_MSB);
  1103. wsa_temp_reg->dmeas_lsb = snd_soc_component_read(component,
  1104. WSA884X_TEMP_DIN_LSB);
  1105. snd_soc_component_update_bits(component,
  1106. REG_FIELD_VALUE(TADC_VALUE_CTL, TEMP_VALUE_RD_EN, 0x01));
  1107. wsa_temp_reg->d1_msb = snd_soc_component_read(component,
  1108. WSA884X_OTP_REG_1);
  1109. wsa_temp_reg->d1_lsb = snd_soc_component_read(component,
  1110. WSA884X_OTP_REG_2);
  1111. wsa_temp_reg->d2_msb = snd_soc_component_read(component,
  1112. WSA884X_OTP_REG_3);
  1113. wsa_temp_reg->d2_lsb = snd_soc_component_read(component,
  1114. WSA884X_OTP_REG_4);
  1115. snd_soc_component_update_bits(component,
  1116. WSA884X_PA_FSM_BYP0, 0xE7, 0x00);
  1117. mutex_unlock(&wsa884x->res_lock);
  1118. return 0;
  1119. }
  1120. static int wsa884x_get_temperature(struct snd_soc_component *component,
  1121. int *temp)
  1122. {
  1123. struct wsa_temp_register reg;
  1124. int dmeas, d1, d2;
  1125. int ret = 0;
  1126. int temp_val = 0;
  1127. int t1 = T1_TEMP;
  1128. int t2 = T2_TEMP;
  1129. u8 retry = WSA884X_TEMP_RETRY;
  1130. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  1131. if (!wsa884x)
  1132. return -EINVAL;
  1133. do {
  1134. ret = wsa884x_temp_reg_read(component, &reg);
  1135. if (ret) {
  1136. pr_err("%s: temp read failed: %d, current temp: %d\n",
  1137. __func__, ret, wsa884x->curr_temp);
  1138. if (temp)
  1139. *temp = wsa884x->curr_temp;
  1140. return 0;
  1141. }
  1142. /*
  1143. * Temperature register values are expected to be in the
  1144. * following range.
  1145. * d1_msb = 68 - 92 and d1_lsb = 0, 64, 128, 192
  1146. * d2_msb = 185 -218 and d2_lsb = 0, 64, 128, 192
  1147. */
  1148. if ((reg.d1_msb < 68 || reg.d1_msb > 92) ||
  1149. (!(reg.d1_lsb == 0 || reg.d1_lsb == 64 || reg.d1_lsb == 128 ||
  1150. reg.d1_lsb == 192)) ||
  1151. (reg.d2_msb < 185 || reg.d2_msb > 218) ||
  1152. (!(reg.d2_lsb == 0 || reg.d2_lsb == 64 || reg.d2_lsb == 128 ||
  1153. reg.d2_lsb == 192))) {
  1154. printk_ratelimited("%s: Temperature registers[%d %d %d %d] are out of range\n",
  1155. __func__, reg.d1_msb, reg.d1_lsb, reg.d2_msb,
  1156. reg.d2_lsb);
  1157. }
  1158. dmeas = ((reg.dmeas_msb << 0x8) | reg.dmeas_lsb) >> 0x6;
  1159. d1 = ((reg.d1_msb << 0x8) | reg.d1_lsb) >> 0x6;
  1160. d2 = ((reg.d2_msb << 0x8) | reg.d2_lsb) >> 0x6;
  1161. if (d1 == d2)
  1162. temp_val = TEMP_INVALID;
  1163. else
  1164. temp_val = t1 + (((dmeas - d1) * (t2 - t1))/(d2 - d1));
  1165. if (temp_val <= LOW_TEMP_THRESHOLD ||
  1166. temp_val >= HIGH_TEMP_THRESHOLD) {
  1167. pr_debug("%s: T0: %d is out of range[%d, %d]\n", __func__,
  1168. temp_val, LOW_TEMP_THRESHOLD, HIGH_TEMP_THRESHOLD);
  1169. if (retry--)
  1170. msleep(10);
  1171. } else {
  1172. break;
  1173. }
  1174. } while (retry);
  1175. wsa884x->curr_temp = temp_val;
  1176. if (temp)
  1177. *temp = temp_val;
  1178. pr_debug("%s: t0 measured: %d dmeas = %d, d1 = %d, d2 = %d\n",
  1179. __func__, temp_val, dmeas, d1, d2);
  1180. return ret;
  1181. }
  1182. static int wsa884x_codec_probe(struct snd_soc_component *component)
  1183. {
  1184. char w_name[MAX_NAME_LEN];
  1185. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  1186. struct swr_device *dev;
  1187. int variant = 0, version = 0;
  1188. struct snd_soc_dapm_context *dapm =
  1189. snd_soc_component_get_dapm(component);
  1190. if (!wsa884x)
  1191. return -EINVAL;
  1192. if (!component->name_prefix)
  1193. return -EINVAL;
  1194. snd_soc_component_init_regmap(component, wsa884x->regmap);
  1195. dev = wsa884x->swr_slave;
  1196. wsa884x->component = component;
  1197. variant = (snd_soc_component_read(component, WSA884X_OTP_REG_0)
  1198. & FIELD_MASK(OTP_REG_0, WSA884X_ID));
  1199. wsa884x->variant = variant;
  1200. version = (snd_soc_component_read(component, WSA884X_CHIP_ID0)
  1201. & FIELD_MASK(CHIP_ID0, BYTE_0));
  1202. wsa884x->version = version;
  1203. wsa884x->comp_offset = COMP_OFFSET2;
  1204. wsa884x_codec_init(component);
  1205. wsa884x->global_pa_cnt = 0;
  1206. memset(w_name, 0, sizeof(w_name));
  1207. strlcpy(w_name, component->name_prefix, sizeof(w_name));
  1208. strlcat(w_name, " ", sizeof(w_name));
  1209. strlcat(w_name, wsa884x->dai_driver->playback.stream_name,
  1210. sizeof(w_name));
  1211. snd_soc_dapm_ignore_suspend(dapm, w_name);
  1212. memset(w_name, 0, sizeof(w_name));
  1213. strlcpy(w_name, component->name_prefix, sizeof(w_name));
  1214. strlcat(w_name, " IN", sizeof(w_name));
  1215. snd_soc_dapm_ignore_suspend(dapm, w_name);
  1216. memset(w_name, 0, sizeof(w_name));
  1217. strlcpy(w_name, component->name_prefix, sizeof(w_name));
  1218. strlcat(w_name, " SWR DAC_Port", sizeof(w_name));
  1219. snd_soc_dapm_ignore_suspend(dapm, w_name);
  1220. memset(w_name, 0, sizeof(w_name));
  1221. strlcpy(w_name, component->name_prefix, sizeof(w_name));
  1222. strlcat(w_name, " SPKR", sizeof(w_name));
  1223. snd_soc_dapm_ignore_suspend(dapm, w_name);
  1224. snd_soc_dapm_sync(dapm);
  1225. return 0;
  1226. }
  1227. static void wsa884x_codec_remove(struct snd_soc_component *component)
  1228. {
  1229. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  1230. if (!wsa884x)
  1231. return;
  1232. snd_soc_component_exit_regmap(component);
  1233. return;
  1234. }
  1235. static int wsa884x_soc_codec_suspend(struct snd_soc_component *component)
  1236. {
  1237. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  1238. if (!wsa884x)
  1239. return 0;
  1240. wsa884x->dapm_bias_off = true;
  1241. return 0;
  1242. }
  1243. static int wsa884x_soc_codec_resume(struct snd_soc_component *component)
  1244. {
  1245. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  1246. if (!wsa884x)
  1247. return 0;
  1248. wsa884x->dapm_bias_off = false;
  1249. return 0;
  1250. }
  1251. static const struct snd_soc_component_driver soc_codec_dev_wsa884x_wsa = {
  1252. .name = "",
  1253. .probe = wsa884x_codec_probe,
  1254. .remove = wsa884x_codec_remove,
  1255. .controls = wsa884x_snd_controls,
  1256. .num_controls = ARRAY_SIZE(wsa884x_snd_controls),
  1257. .dapm_widgets = wsa884x_dapm_widgets,
  1258. .num_dapm_widgets = ARRAY_SIZE(wsa884x_dapm_widgets),
  1259. .dapm_routes = wsa884x_audio_map,
  1260. .num_dapm_routes = ARRAY_SIZE(wsa884x_audio_map),
  1261. .suspend = wsa884x_soc_codec_suspend,
  1262. .resume = wsa884x_soc_codec_resume,
  1263. };
  1264. static int wsa884x_gpio_ctrl(struct wsa884x_priv *wsa884x, bool enable)
  1265. {
  1266. int ret = 0;
  1267. if (enable)
  1268. ret = msm_cdc_pinctrl_select_active_state(
  1269. wsa884x->wsa_rst_np);
  1270. else
  1271. ret = msm_cdc_pinctrl_select_sleep_state(
  1272. wsa884x->wsa_rst_np);
  1273. if (ret != 0)
  1274. dev_err(wsa884x->dev,
  1275. "%s: Failed to turn state %d; ret=%d\n",
  1276. __func__, enable, ret);
  1277. return ret;
  1278. }
  1279. static int wsa884x_swr_up(struct wsa884x_priv *wsa884x)
  1280. {
  1281. int ret;
  1282. ret = wsa884x_gpio_ctrl(wsa884x, true);
  1283. if (ret)
  1284. dev_err(wsa884x->dev, "%s: Failed to enable gpio\n", __func__);
  1285. return ret;
  1286. }
  1287. static int wsa884x_swr_down(struct wsa884x_priv *wsa884x)
  1288. {
  1289. int ret;
  1290. ret = wsa884x_gpio_ctrl(wsa884x, false);
  1291. if (ret)
  1292. dev_err(wsa884x->dev, "%s: Failed to disable gpio\n", __func__);
  1293. return ret;
  1294. }
  1295. static int wsa884x_swr_reset(struct wsa884x_priv *wsa884x)
  1296. {
  1297. u8 retry = WSA884X_NUM_RETRY;
  1298. u8 devnum = 0;
  1299. struct swr_device *pdev;
  1300. pdev = wsa884x->swr_slave;
  1301. while (swr_get_logical_dev_num(pdev, pdev->addr, &devnum) && retry--) {
  1302. /* Retry after 1 msec delay */
  1303. usleep_range(1000, 1100);
  1304. }
  1305. pdev->dev_num = devnum;
  1306. wsa884x_regcache_sync(wsa884x);
  1307. return 0;
  1308. }
  1309. static int wsa884x_event_notify(struct notifier_block *nb,
  1310. unsigned long val, void *ptr)
  1311. {
  1312. u16 event = (val & 0xffff);
  1313. struct wsa884x_priv *wsa884x = container_of(nb, struct wsa884x_priv,
  1314. parent_nblock);
  1315. if (!wsa884x)
  1316. return -EINVAL;
  1317. switch (event) {
  1318. case BOLERO_SLV_EVT_PA_OFF_PRE_SSR:
  1319. if (test_bit(SPKR_STATUS, &wsa884x->status_mask))
  1320. snd_soc_component_update_bits(wsa884x->component,
  1321. REG_FIELD_VALUE(PA_FSM_EN, GLOBAL_PA_EN, 0x00));
  1322. wsa884x_swr_down(wsa884x);
  1323. break;
  1324. case BOLERO_SLV_EVT_SSR_UP:
  1325. wsa884x_swr_up(wsa884x);
  1326. /* Add delay to allow enumerate */
  1327. usleep_range(20000, 20010);
  1328. wsa884x_swr_reset(wsa884x);
  1329. break;
  1330. case BOLERO_SLV_EVT_PA_ON_POST_FSCLK:
  1331. if (test_bit(SPKR_STATUS, &wsa884x->status_mask)) {
  1332. snd_soc_component_update_bits(wsa884x->component,
  1333. REG_FIELD_VALUE(PDM_WD_CTL, PDM_WD_EN, 0x01));
  1334. snd_soc_component_update_bits(wsa884x->component,
  1335. REG_FIELD_VALUE(PA_FSM_EN, GLOBAL_PA_EN, 0x01));
  1336. wcd_enable_irq(&wsa884x->irq_info,
  1337. WSA884X_IRQ_INT_PDM_WD);
  1338. /* Added delay as per HW sequence */
  1339. usleep_range(3000, 3100);
  1340. snd_soc_component_update_bits(wsa884x->component,
  1341. REG_FIELD_VALUE(DRE_CTL_1, CSR_GAIN_EN, 0x00));
  1342. /* Added delay as per HW sequence */
  1343. usleep_range(5000, 5050);
  1344. }
  1345. break;
  1346. case BOLERO_SLV_EVT_PA_ON_POST_FSCLK_ADIE_LB:
  1347. if (test_bit(SPKR_STATUS, &wsa884x->status_mask))
  1348. set_bit(SPKR_ADIE_LB, &wsa884x->status_mask);
  1349. break;
  1350. default:
  1351. dev_dbg(wsa884x->dev, "%s: unknown event %d\n",
  1352. __func__, event);
  1353. break;
  1354. }
  1355. return 0;
  1356. }
  1357. static int wsa884x_enable_supplies(struct device *dev,
  1358. struct wsa884x_priv *priv)
  1359. {
  1360. int ret = 0;
  1361. /* Parse power supplies */
  1362. msm_cdc_get_power_supplies(dev, &priv->regulator,
  1363. &priv->num_supplies);
  1364. if (!priv->regulator || (priv->num_supplies <= 0)) {
  1365. dev_err(dev, "%s: no power supplies defined\n", __func__);
  1366. return -EINVAL;
  1367. }
  1368. ret = msm_cdc_init_supplies(dev, &priv->supplies,
  1369. priv->regulator, priv->num_supplies);
  1370. if (!priv->supplies) {
  1371. dev_err(dev, "%s: Cannot init wsa supplies\n",
  1372. __func__);
  1373. return ret;
  1374. }
  1375. ret = msm_cdc_enable_static_supplies(dev, priv->supplies,
  1376. priv->regulator,
  1377. priv->num_supplies);
  1378. if (ret)
  1379. dev_err(dev, "%s: wsa static supply enable failed!\n",
  1380. __func__);
  1381. return ret;
  1382. }
  1383. static struct snd_soc_dai_driver wsa_dai[] = {
  1384. {
  1385. .name = "",
  1386. .playback = {
  1387. .stream_name = "",
  1388. .rates = WSA884X_RATES | WSA884X_FRAC_RATES,
  1389. .formats = WSA884X_FORMATS,
  1390. .rate_max = 192000,
  1391. .rate_min = 8000,
  1392. .channels_min = 1,
  1393. .channels_max = 2,
  1394. },
  1395. },
  1396. };
  1397. static int wsa884x_swr_probe(struct swr_device *pdev)
  1398. {
  1399. int ret = 0, i = 0;
  1400. struct wsa884x_priv *wsa884x;
  1401. u8 devnum = 0;
  1402. bool pin_state_current = false;
  1403. struct wsa_ctrl_platform_data *plat_data = NULL;
  1404. struct snd_soc_component *component;
  1405. const char *wsa884x_name_prefix_of = NULL;
  1406. char buffer[MAX_NAME_LEN];
  1407. int dev_index = 0;
  1408. wsa884x = devm_kzalloc(&pdev->dev, sizeof(struct wsa884x_priv),
  1409. GFP_KERNEL);
  1410. if (!wsa884x)
  1411. return -ENOMEM;
  1412. ret = wsa884x_enable_supplies(&pdev->dev, wsa884x);
  1413. if (ret) {
  1414. ret = -EPROBE_DEFER;
  1415. goto err;
  1416. }
  1417. wsa884x->wsa_rst_np = of_parse_phandle(pdev->dev.of_node,
  1418. "qcom,spkr-sd-n-node", 0);
  1419. if (!wsa884x->wsa_rst_np) {
  1420. dev_dbg(&pdev->dev, "%s: pinctrl not defined\n", __func__);
  1421. goto err_supply;
  1422. }
  1423. swr_set_dev_data(pdev, wsa884x);
  1424. wsa884x->swr_slave = pdev;
  1425. pin_state_current = msm_cdc_pinctrl_get_state(wsa884x->wsa_rst_np);
  1426. wsa884x_gpio_ctrl(wsa884x, true);
  1427. /*
  1428. * Add 5msec delay to provide sufficient time for
  1429. * soundwire auto enumeration of slave devices as
  1430. * per HW requirement.
  1431. */
  1432. usleep_range(5000, 5010);
  1433. ret = swr_get_logical_dev_num(pdev, pdev->addr, &devnum);
  1434. if (ret) {
  1435. dev_dbg(&pdev->dev,
  1436. "%s get devnum %d for dev addr %lx failed\n",
  1437. __func__, devnum, pdev->addr);
  1438. ret = -EPROBE_DEFER;
  1439. goto err_supply;
  1440. }
  1441. pdev->dev_num = devnum;
  1442. wsa884x->regmap = devm_regmap_init_swr(pdev,
  1443. &wsa884x_regmap_config);
  1444. if (IS_ERR(wsa884x->regmap)) {
  1445. ret = PTR_ERR(wsa884x->regmap);
  1446. dev_err(&pdev->dev, "%s: regmap_init failed %d\n",
  1447. __func__, ret);
  1448. goto dev_err;
  1449. }
  1450. devm_regmap_qti_debugfs_register(&pdev->dev, wsa884x->regmap);
  1451. /* Set all interrupts as edge triggered */
  1452. for (i = 0; i < wsa884x_regmap_irq_chip.num_regs; i++)
  1453. regmap_write(wsa884x->regmap, (WSA884X_INTR_LEVEL0 + i), 0);
  1454. wsa884x_regmap_irq_chip.irq_drv_data = wsa884x;
  1455. wsa884x->irq_info.wcd_regmap_irq_chip = &wsa884x_regmap_irq_chip;
  1456. wsa884x->irq_info.codec_name = "WSA884X";
  1457. wsa884x->irq_info.regmap = wsa884x->regmap;
  1458. wsa884x->irq_info.dev = &pdev->dev;
  1459. ret = wcd_irq_init(&wsa884x->irq_info, &wsa884x->virq);
  1460. if (ret) {
  1461. dev_err(wsa884x->dev, "%s: IRQ init failed: %d\n",
  1462. __func__, ret);
  1463. goto dev_err;
  1464. }
  1465. wcd_request_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_SAF2WAR,
  1466. "WSA SAF2WAR", wsa884x_saf2war_handle_irq, NULL);
  1467. wcd_disable_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_SAF2WAR);
  1468. wcd_request_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_WAR2SAF,
  1469. "WSA WAR2SAF", wsa884x_war2saf_handle_irq, NULL);
  1470. wcd_disable_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_WAR2SAF);
  1471. wcd_request_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_DISABLE,
  1472. "WSA OTP", wsa884x_otp_handle_irq, NULL);
  1473. wcd_disable_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_DISABLE);
  1474. wcd_request_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_OCP,
  1475. "WSA OCP", wsa884x_ocp_handle_irq, NULL);
  1476. wcd_disable_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_OCP);
  1477. wcd_request_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_CLIP,
  1478. "WSA CLIP", wsa884x_clip_handle_irq, NULL);
  1479. wcd_disable_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_CLIP);
  1480. wcd_request_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_PDM_WD,
  1481. "WSA PDM WD", wsa884x_pdm_wd_handle_irq, NULL);
  1482. wcd_disable_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_PDM_WD);
  1483. wcd_request_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_CLK_WD,
  1484. "WSA CLK WD", wsa884x_clk_wd_handle_irq, NULL);
  1485. wcd_disable_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_CLK_WD);
  1486. wcd_request_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_INTR_PIN,
  1487. "WSA EXT INT", wsa884x_ext_int_handle_irq, NULL);
  1488. wcd_disable_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_INTR_PIN);
  1489. /* Under Voltage Lock out (UVLO) interrupt handle */
  1490. wcd_request_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_UVLO,
  1491. "WSA UVLO", wsa884x_uvlo_handle_irq, NULL);
  1492. wcd_disable_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_UVLO);
  1493. wcd_request_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_PA_ON_ERR,
  1494. "WSA PA ERR", wsa884x_pa_on_err_handle_irq, NULL);
  1495. wcd_disable_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_PA_ON_ERR);
  1496. ret = of_property_read_string(pdev->dev.of_node, "qcom,wsa-prefix",
  1497. &wsa884x_name_prefix_of);
  1498. if (ret) {
  1499. dev_err(&pdev->dev,
  1500. "%s: Looking up %s property in node %s failed\n",
  1501. __func__, "qcom,wsa-prefix",
  1502. pdev->dev.of_node->full_name);
  1503. goto err_irq;
  1504. }
  1505. wsa884x->driver = devm_kzalloc(&pdev->dev,
  1506. sizeof(struct snd_soc_component_driver), GFP_KERNEL);
  1507. if (!wsa884x->driver) {
  1508. ret = -ENOMEM;
  1509. goto err_irq;
  1510. }
  1511. memcpy(wsa884x->driver, &soc_codec_dev_wsa884x_wsa,
  1512. sizeof(struct snd_soc_component_driver));
  1513. wsa884x->dai_driver = devm_kzalloc(&pdev->dev,
  1514. sizeof(struct snd_soc_dai_driver), GFP_KERNEL);
  1515. if (!wsa884x->dai_driver) {
  1516. ret = -ENOMEM;
  1517. goto err_mem;
  1518. }
  1519. memcpy(wsa884x->dai_driver, wsa_dai, sizeof(struct snd_soc_dai_driver));
  1520. /* Get last digit from HEX format */
  1521. dev_index = (int)((char)(pdev->addr & 0xF));
  1522. dev_index += 1;
  1523. if (of_device_is_compatible(pdev->dev.of_node, "qcom,wsa884x_2"))
  1524. dev_index += 2;
  1525. snprintf(buffer, sizeof(buffer), "wsa-codec.%d", dev_index);
  1526. wsa884x->driver->name = kstrndup(buffer, strlen(buffer), GFP_KERNEL);
  1527. snprintf(buffer, sizeof(buffer), "wsa_rx%d", dev_index);
  1528. wsa884x->dai_driver->name =
  1529. kstrndup(buffer, strlen(buffer), GFP_KERNEL);
  1530. snprintf(buffer, sizeof(buffer), "WSA884X_AIF%d Playback", dev_index);
  1531. wsa884x->dai_driver->playback.stream_name =
  1532. kstrndup(buffer, strlen(buffer), GFP_KERNEL);
  1533. /* Number of DAI's used is 1 */
  1534. ret = snd_soc_register_component(&pdev->dev,
  1535. wsa884x->driver, wsa884x->dai_driver, 1);
  1536. wsa884x->wsa884x_name_prefix = kstrndup(wsa884x_name_prefix_of,
  1537. strlen(wsa884x_name_prefix_of), GFP_KERNEL);
  1538. component = snd_soc_lookup_component(&pdev->dev, wsa884x->driver->name);
  1539. if (!component) {
  1540. dev_err(&pdev->dev, "%s: component is NULL\n", __func__);
  1541. ret = -EINVAL;
  1542. goto err_mem;
  1543. }
  1544. component->name_prefix = wsa884x->wsa884x_name_prefix;
  1545. wsa884x->parent_np = of_parse_phandle(pdev->dev.of_node,
  1546. "qcom,bolero-handle", 0);
  1547. if (!wsa884x->parent_np)
  1548. wsa884x->parent_np = of_parse_phandle(pdev->dev.of_node,
  1549. "qcom,lpass-cdc-handle", 0);
  1550. if (wsa884x->parent_np) {
  1551. wsa884x->parent_dev =
  1552. of_find_device_by_node(wsa884x->parent_np);
  1553. if (wsa884x->parent_dev) {
  1554. plat_data = dev_get_platdata(&wsa884x->parent_dev->dev);
  1555. if (plat_data) {
  1556. wsa884x->parent_nblock.notifier_call =
  1557. wsa884x_event_notify;
  1558. if (plat_data->register_notifier)
  1559. plat_data->register_notifier(
  1560. plat_data->handle,
  1561. &wsa884x->parent_nblock,
  1562. true);
  1563. wsa884x->register_notifier =
  1564. plat_data->register_notifier;
  1565. wsa884x->handle = plat_data->handle;
  1566. } else {
  1567. dev_err(&pdev->dev, "%s: plat data not found\n",
  1568. __func__);
  1569. }
  1570. } else {
  1571. dev_err(&pdev->dev, "%s: parent dev not found\n",
  1572. __func__);
  1573. }
  1574. } else {
  1575. dev_info(&pdev->dev, "%s: parent node not found\n", __func__);
  1576. }
  1577. mutex_init(&wsa884x->res_lock);
  1578. #ifdef CONFIG_DEBUG_FS
  1579. if (!wsa884x->debugfs_dent) {
  1580. wsa884x->debugfs_dent = debugfs_create_dir(
  1581. dev_name(&pdev->dev), 0);
  1582. if (!IS_ERR(wsa884x->debugfs_dent)) {
  1583. wsa884x->debugfs_peek =
  1584. debugfs_create_file("swrslave_peek",
  1585. S_IFREG | 0444,
  1586. wsa884x->debugfs_dent,
  1587. (void *) pdev,
  1588. &codec_debug_read_ops);
  1589. wsa884x->debugfs_poke =
  1590. debugfs_create_file("swrslave_poke",
  1591. S_IFREG | 0444,
  1592. wsa884x->debugfs_dent,
  1593. (void *) pdev,
  1594. &codec_debug_write_ops);
  1595. wsa884x->debugfs_reg_dump =
  1596. debugfs_create_file(
  1597. "swrslave_reg_dump",
  1598. S_IFREG | 0444,
  1599. wsa884x->debugfs_dent,
  1600. (void *) pdev,
  1601. &codec_debug_dump_ops);
  1602. }
  1603. }
  1604. #endif
  1605. return 0;
  1606. err_mem:
  1607. kfree(wsa884x->wsa884x_name_prefix);
  1608. if (wsa884x->dai_driver) {
  1609. kfree(wsa884x->dai_driver->name);
  1610. kfree(wsa884x->dai_driver->playback.stream_name);
  1611. kfree(wsa884x->dai_driver);
  1612. }
  1613. if (wsa884x->driver) {
  1614. kfree(wsa884x->driver->name);
  1615. kfree(wsa884x->driver);
  1616. }
  1617. err_irq:
  1618. wcd_free_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_SAF2WAR, NULL);
  1619. wcd_free_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_WAR2SAF, NULL);
  1620. wcd_free_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_DISABLE, NULL);
  1621. wcd_free_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_OCP, NULL);
  1622. wcd_free_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_CLIP, NULL);
  1623. wcd_free_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_PDM_WD, NULL);
  1624. wcd_free_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_CLK_WD, NULL);
  1625. wcd_free_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_INTR_PIN, NULL);
  1626. wcd_free_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_UVLO, NULL);
  1627. wcd_free_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_PA_ON_ERR, NULL);
  1628. wcd_irq_exit(&wsa884x->irq_info, wsa884x->virq);
  1629. dev_err:
  1630. if (pin_state_current == false)
  1631. wsa884x_gpio_ctrl(wsa884x, false);
  1632. swr_remove_device(pdev);
  1633. err_supply:
  1634. msm_cdc_release_supplies(&pdev->dev, wsa884x->supplies,
  1635. wsa884x->regulator,
  1636. wsa884x->num_supplies);
  1637. err:
  1638. swr_set_dev_data(pdev, NULL);
  1639. return ret;
  1640. }
  1641. static int wsa884x_swr_remove(struct swr_device *pdev)
  1642. {
  1643. struct wsa884x_priv *wsa884x;
  1644. wsa884x = swr_get_dev_data(pdev);
  1645. if (!wsa884x) {
  1646. dev_err(&pdev->dev, "%s: wsa884x is NULL\n", __func__);
  1647. return -EINVAL;
  1648. }
  1649. wcd_free_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_SAF2WAR, NULL);
  1650. wcd_free_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_WAR2SAF, NULL);
  1651. wcd_free_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_DISABLE, NULL);
  1652. wcd_free_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_OCP, NULL);
  1653. wcd_free_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_CLIP, NULL);
  1654. wcd_free_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_PDM_WD, NULL);
  1655. wcd_free_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_CLK_WD, NULL);
  1656. wcd_free_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_INTR_PIN, NULL);
  1657. wcd_free_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_UVLO, NULL);
  1658. wcd_free_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_PA_ON_ERR, NULL);
  1659. if (wsa884x->register_notifier)
  1660. wsa884x->register_notifier(wsa884x->handle,
  1661. &wsa884x->parent_nblock, false);
  1662. #ifdef CONFIG_DEBUG_FS
  1663. debugfs_remove_recursive(wsa884x->debugfs_dent);
  1664. wsa884x->debugfs_dent = NULL;
  1665. #endif
  1666. mutex_destroy(&wsa884x->res_lock);
  1667. snd_soc_unregister_component(&pdev->dev);
  1668. kfree(wsa884x->wsa884x_name_prefix);
  1669. if (wsa884x->dai_driver) {
  1670. kfree(wsa884x->dai_driver->name);
  1671. kfree(wsa884x->dai_driver->playback.stream_name);
  1672. kfree(wsa884x->dai_driver);
  1673. }
  1674. if (wsa884x->driver) {
  1675. kfree(wsa884x->driver->name);
  1676. kfree(wsa884x->driver);
  1677. }
  1678. msm_cdc_release_supplies(&pdev->dev, wsa884x->supplies,
  1679. wsa884x->regulator,
  1680. wsa884x->num_supplies);
  1681. swr_set_dev_data(pdev, NULL);
  1682. return 0;
  1683. }
  1684. #ifdef CONFIG_PM_SLEEP
  1685. static int wsa884x_swr_suspend(struct device *dev)
  1686. {
  1687. struct wsa884x_priv *wsa884x = swr_get_dev_data(to_swr_device(dev));
  1688. if (!wsa884x) {
  1689. dev_err(dev, "%s: wsa884x private data is NULL\n", __func__);
  1690. return -EINVAL;
  1691. }
  1692. dev_dbg(dev, "%s: system suspend\n", __func__);
  1693. if (wsa884x->dapm_bias_off) {
  1694. msm_cdc_set_supplies_lpm_mode(dev, wsa884x->supplies,
  1695. wsa884x->regulator,
  1696. wsa884x->num_supplies,
  1697. true);
  1698. set_bit(WSA_SUPPLIES_LPM_MODE, &wsa884x->status_mask);
  1699. }
  1700. return 0;
  1701. }
  1702. static int wsa884x_swr_resume(struct device *dev)
  1703. {
  1704. struct wsa884x_priv *wsa884x = swr_get_dev_data(to_swr_device(dev));
  1705. if (!wsa884x) {
  1706. dev_err(dev, "%s: wsa884x private data is NULL\n", __func__);
  1707. return -EINVAL;
  1708. }
  1709. if (test_bit(WSA_SUPPLIES_LPM_MODE, &wsa884x->status_mask)) {
  1710. msm_cdc_set_supplies_lpm_mode(dev, wsa884x->supplies,
  1711. wsa884x->regulator,
  1712. wsa884x->num_supplies,
  1713. false);
  1714. clear_bit(WSA_SUPPLIES_LPM_MODE, &wsa884x->status_mask);
  1715. }
  1716. dev_dbg(dev, "%s: system resume\n", __func__);
  1717. return 0;
  1718. }
  1719. #endif /* CONFIG_PM_SLEEP */
  1720. static const struct dev_pm_ops wsa884x_swr_pm_ops = {
  1721. .suspend_late = wsa884x_swr_suspend,
  1722. .resume_early = wsa884x_swr_resume,
  1723. };
  1724. static const struct swr_device_id wsa884x_swr_id[] = {
  1725. {"wsa884x", 0},
  1726. {"wsa884x_2", 0},
  1727. {}
  1728. };
  1729. static const struct of_device_id wsa884x_swr_dt_match[] = {
  1730. {
  1731. .compatible = "qcom,wsa884x",
  1732. },
  1733. {
  1734. .compatible = "qcom,wsa884x_2",
  1735. },
  1736. {}
  1737. };
  1738. static struct swr_driver wsa884x_swr_driver = {
  1739. .driver = {
  1740. .name = "wsa884x",
  1741. .owner = THIS_MODULE,
  1742. .pm = &wsa884x_swr_pm_ops,
  1743. .of_match_table = wsa884x_swr_dt_match,
  1744. },
  1745. .probe = wsa884x_swr_probe,
  1746. .remove = wsa884x_swr_remove,
  1747. .id_table = wsa884x_swr_id,
  1748. };
  1749. static int __init wsa884x_swr_init(void)
  1750. {
  1751. return swr_driver_register(&wsa884x_swr_driver);
  1752. }
  1753. static void __exit wsa884x_swr_exit(void)
  1754. {
  1755. swr_driver_unregister(&wsa884x_swr_driver);
  1756. }
  1757. module_init(wsa884x_swr_init);
  1758. module_exit(wsa884x_swr_exit);
  1759. MODULE_DESCRIPTION("WSA884x codec driver");
  1760. MODULE_LICENSE("GPL v2");