dp_rx_mon_dest.c 30 KB

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  1. /*
  2. * Copyright (c) 2017 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "dp_types.h"
  19. #include "dp_rx.h"
  20. #include "dp_peer.h"
  21. #include "hal_rx.h"
  22. #include "hal_api.h"
  23. #include "qdf_trace.h"
  24. #include "qdf_nbuf.h"
  25. #include "hal_api_mon.h"
  26. #include "linux/ieee80211.h"
  27. #include "dp_rx_mon.h"
  28. #include "wlan_cfg.h"
  29. /**
  30. * dp_rx_mon_link_desc_return() - Return a MPDU link descriptor to HW
  31. * (WBM), following error handling
  32. *
  33. * @dp_pdev: core txrx pdev context
  34. * @buf_addr_info: void pointer to monitor link descriptor buf addr info
  35. * Return: QDF_STATUS
  36. */
  37. static QDF_STATUS
  38. dp_rx_mon_link_desc_return(struct dp_pdev *dp_pdev,
  39. void *buf_addr_info)
  40. {
  41. struct dp_srng *dp_srng;
  42. void *hal_srng;
  43. void *hal_soc;
  44. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  45. void *src_srng_desc;
  46. hal_soc = dp_pdev->soc->hal_soc;
  47. dp_srng = &dp_pdev->rxdma_mon_desc_ring;
  48. hal_srng = dp_srng->hal_srng;
  49. qdf_assert(hal_srng);
  50. if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_srng))) {
  51. /* TODO */
  52. /*
  53. * Need API to convert from hal_ring pointer to
  54. * Ring Type / Ring Id combo
  55. */
  56. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  57. "%s %d : \
  58. HAL RING Access For WBM Release SRNG Failed -- %pK\n",
  59. __func__, __LINE__, hal_srng);
  60. goto done;
  61. }
  62. src_srng_desc = hal_srng_src_get_next(hal_soc, hal_srng);
  63. if (qdf_likely(src_srng_desc)) {
  64. /* Return link descriptor through WBM ring (SW2WBM)*/
  65. hal_rx_mon_msdu_link_desc_set(hal_soc,
  66. src_srng_desc, buf_addr_info);
  67. status = QDF_STATUS_SUCCESS;
  68. } else {
  69. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  70. "%s %d -- Monitor Link Desc WBM Release Ring Full\n",
  71. __func__, __LINE__);
  72. }
  73. done:
  74. hal_srng_access_end(hal_soc, hal_srng);
  75. return status;
  76. }
  77. /**
  78. * dp_mon_adjust_frag_len() - MPDU and MSDU may spread across
  79. * multiple nbufs. This function
  80. * is to return data length in
  81. * fragmented buffer
  82. *
  83. * @total_len: pointer to remaining data length.
  84. * @frag_len: poiter to data length in this fragment.
  85. */
  86. static inline void dp_mon_adjust_frag_len(uint32_t *total_len,
  87. uint32_t *frag_len)
  88. {
  89. if (*total_len >= (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN)) {
  90. *frag_len = RX_BUFFER_SIZE - RX_PKT_TLVS_LEN;
  91. *total_len -= *frag_len;
  92. } else {
  93. *frag_len = *total_len;
  94. *total_len = 0;
  95. }
  96. }
  97. /**
  98. * dp_rx_mon_mpdu_pop() - Return a MPDU link descriptor to HW
  99. * (WBM), following error handling
  100. *
  101. * @soc: core DP main context
  102. * @mac_id: mac id which is one of 3 mac_ids
  103. * @rxdma_dst_ring_desc: void pointer to monitor link descriptor buf addr info
  104. * @head_msdu: head of msdu to be popped
  105. * @tail_msdu: tail of msdu to be popped
  106. * @npackets: number of packet to be popped
  107. * @ppdu_id: ppdu id of processing ppdu
  108. * @head: head of descs list to be freed
  109. * @tail: tail of decs list to be freed
  110. * Return: number of msdu in MPDU to be popped
  111. */
  112. static inline uint32_t
  113. dp_rx_mon_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
  114. void *rxdma_dst_ring_desc, qdf_nbuf_t *head_msdu,
  115. qdf_nbuf_t *tail_msdu, uint32_t *npackets, uint32_t *ppdu_id,
  116. union dp_rx_desc_list_elem_t **head,
  117. union dp_rx_desc_list_elem_t **tail)
  118. {
  119. struct dp_pdev *dp_pdev = soc->pdev_list[mac_id];
  120. void *rx_desc_tlv;
  121. void *rx_msdu_link_desc;
  122. qdf_nbuf_t msdu;
  123. qdf_nbuf_t last;
  124. struct hal_rx_msdu_list msdu_list;
  125. uint16_t num_msdus;
  126. uint32_t rx_buf_size, rx_pkt_offset;
  127. struct hal_buf_info buf_info;
  128. void *p_buf_addr_info;
  129. void *p_last_buf_addr_info;
  130. uint32_t rx_bufs_used = 0;
  131. uint32_t msdu_ppdu_id, msdu_cnt;
  132. uint8_t *data;
  133. uint32_t i;
  134. uint32_t total_frag_len, frag_len;
  135. bool is_frag, is_first_msdu;
  136. msdu = 0;
  137. last = NULL;
  138. hal_rx_reo_ent_buf_paddr_get(rxdma_dst_ring_desc, &buf_info,
  139. &p_last_buf_addr_info, &msdu_cnt);
  140. is_frag = false;
  141. is_first_msdu = true;
  142. do {
  143. rx_msdu_link_desc =
  144. dp_rx_cookie_2_mon_link_desc_va(dp_pdev, &buf_info);
  145. qdf_assert(rx_msdu_link_desc);
  146. hal_rx_msdu_list_get(rx_msdu_link_desc, &msdu_list, &num_msdus);
  147. for (i = 0; i < num_msdus; i++) {
  148. uint32_t l2_hdr_offset;
  149. struct dp_rx_desc *rx_desc =
  150. dp_rx_cookie_2_va_mon_buf(soc,
  151. msdu_list.sw_cookie[i]);
  152. qdf_assert(rx_desc);
  153. msdu = rx_desc->nbuf;
  154. qdf_nbuf_unmap_single(soc->osdev, msdu,
  155. QDF_DMA_FROM_DEVICE);
  156. data = qdf_nbuf_data(msdu);
  157. QDF_TRACE(QDF_MODULE_ID_DP,
  158. QDF_TRACE_LEVEL_DEBUG,
  159. "[%s][%d] msdu_nbuf=%pK, data=%pK\n",
  160. __func__, __LINE__, msdu, data);
  161. rx_desc_tlv = HAL_RX_MON_DEST_GET_DESC(data);
  162. if(is_first_msdu) {
  163. msdu_ppdu_id =
  164. HAL_RX_MON_HW_DESC_GET_PPDUID_GET(rx_desc_tlv);
  165. is_first_msdu = false;
  166. }
  167. QDF_TRACE(QDF_MODULE_ID_DP,
  168. QDF_TRACE_LEVEL_DEBUG,
  169. "[%s][%d] i=%d, ppdu_id=%x, msdu_ppdu_id=%x\n",
  170. __func__, __LINE__, i, *ppdu_id, msdu_ppdu_id);
  171. if (*ppdu_id > msdu_ppdu_id)
  172. QDF_TRACE(QDF_MODULE_ID_DP,
  173. QDF_TRACE_LEVEL_WARN,
  174. "[%s][%d] ppdu_id=%id \
  175. msdu_ppdu_id=%d\n",
  176. __func__, __LINE__, *ppdu_id,
  177. msdu_ppdu_id);
  178. if (*ppdu_id < msdu_ppdu_id) {
  179. *ppdu_id = msdu_ppdu_id;
  180. return rx_bufs_used;
  181. }
  182. if (hal_rx_desc_is_first_msdu(rx_desc_tlv))
  183. hal_rx_mon_hw_desc_get_mpdu_status(rx_desc_tlv,
  184. &(dp_pdev->ppdu_info.rx_status));
  185. if(msdu_list.msdu_info[i].msdu_flags &
  186. HAL_MSDU_F_MSDU_CONTINUATION) {
  187. if(!is_frag) {
  188. total_frag_len =
  189. msdu_list.msdu_info[i].msdu_len;
  190. is_frag = true;
  191. }
  192. dp_mon_adjust_frag_len(
  193. &total_frag_len, &frag_len);
  194. } else {
  195. if(is_frag) {
  196. dp_mon_adjust_frag_len(
  197. &total_frag_len, &frag_len);
  198. } else {
  199. frag_len =
  200. msdu_list.msdu_info[i].msdu_len;
  201. }
  202. is_frag = false;
  203. msdu_cnt--;
  204. }
  205. rx_pkt_offset = HAL_RX_MON_HW_RX_DESC_SIZE();
  206. /*
  207. * HW structures call this L3 header padding
  208. * -- even though this is actually the offset
  209. * from the buffer beginning where the L2
  210. * header begins.
  211. */
  212. l2_hdr_offset =
  213. hal_rx_msdu_end_l3_hdr_padding_get(data);
  214. rx_buf_size = rx_pkt_offset + l2_hdr_offset
  215. + frag_len;
  216. qdf_nbuf_set_pktlen(msdu, rx_buf_size);
  217. #if 0
  218. /* Disble it.see packet on msdu done set to 0 */
  219. /*
  220. * Check if DMA completed -- msdu_done is the
  221. * last bit to be written
  222. */
  223. if (!hal_rx_attn_msdu_done_get(rx_desc_tlv)) {
  224. QDF_TRACE(QDF_MODULE_ID_DP,
  225. QDF_TRACE_LEVEL_ERROR,
  226. "%s %d\n",
  227. __func__, __LINE__);
  228. print_hex_dump(KERN_ERR,
  229. "\t Pkt Desc:",
  230. DUMP_PREFIX_NONE, 32, 4,
  231. rx_desc_tlv, 128, false);
  232. qdf_assert(0);
  233. }
  234. #endif
  235. rx_bufs_used++;
  236. QDF_TRACE(QDF_MODULE_ID_DP,
  237. QDF_TRACE_LEVEL_DEBUG,
  238. "rx_pkt_offset=%d, \
  239. l2_hdr_offset=%d, msdu_len=%d, \
  240. addr=%pK\n",
  241. rx_pkt_offset,
  242. l2_hdr_offset,
  243. msdu_list.msdu_info[i].msdu_len,
  244. qdf_nbuf_data(msdu));
  245. if (*head_msdu == NULL)
  246. *head_msdu = msdu;
  247. else
  248. qdf_nbuf_set_next(last, msdu);
  249. last = msdu;
  250. dp_rx_add_to_free_desc_list(head,
  251. tail, rx_desc);
  252. }
  253. hal_rx_mon_next_link_desc_get(rx_msdu_link_desc, &buf_info,
  254. &p_buf_addr_info);
  255. dp_rx_mon_link_desc_return(dp_pdev, p_last_buf_addr_info);
  256. p_last_buf_addr_info = p_buf_addr_info;
  257. } while (buf_info.paddr && msdu_cnt);
  258. qdf_nbuf_set_next(last, NULL);
  259. *tail_msdu = msdu;
  260. return rx_bufs_used;
  261. }
  262. static inline
  263. void dp_rx_msdus_set_payload(qdf_nbuf_t msdu)
  264. {
  265. uint8_t *data;
  266. uint32_t rx_pkt_offset, l2_hdr_offset;
  267. data = qdf_nbuf_data(msdu);
  268. rx_pkt_offset = HAL_RX_MON_HW_RX_DESC_SIZE();
  269. l2_hdr_offset = hal_rx_msdu_end_l3_hdr_padding_get(data);
  270. qdf_nbuf_pull_head(msdu, rx_pkt_offset + l2_hdr_offset);
  271. data = qdf_nbuf_data(msdu);
  272. /* hexdump(data, 32); */
  273. }
  274. static inline
  275. qdf_nbuf_t dp_rx_mon_restitch_mpdu_from_msdus(struct dp_soc *soc,
  276. uint32_t mac_id, qdf_nbuf_t head_msdu, qdf_nbuf_t last_msdu,
  277. struct cdp_mon_status *rx_status)
  278. {
  279. struct dp_pdev *dp_pdev = soc->pdev_list[mac_id];
  280. qdf_nbuf_t msdu, mpdu_buf, prev_buf, msdu_orig, head_frag_list;
  281. uint32_t decap_format, wifi_hdr_len, sec_hdr_len, msdu_llc_len,
  282. mpdu_buf_len, decap_hdr_pull_bytes, frag_list_sum_len, dir,
  283. is_amsdu, is_first_frag, amsdu_pad;
  284. void *rx_desc;
  285. char *hdr_desc;
  286. unsigned char *dest;
  287. struct ieee80211_frame *wh;
  288. struct ieee80211_qoscntl *qos;
  289. qdf_nbuf_t amsdu_llc_buf;
  290. head_frag_list = NULL;
  291. /* The nbuf has been pulled just beyond the status and points to the
  292. * payload
  293. */
  294. msdu_orig = head_msdu;
  295. rx_desc = qdf_nbuf_data(msdu_orig);
  296. if (HAL_RX_DESC_GET_MPDU_LENGTH_ERR(rx_desc)) {
  297. /* It looks like there is some issue on MPDU len err */
  298. /* Need further investigate if drop the packet */
  299. /* return NULL; */
  300. }
  301. rx_desc = qdf_nbuf_data(last_msdu);
  302. rx_status->cdp_rs_fcs_err = HAL_RX_DESC_GET_MPDU_FCS_ERR(rx_desc);
  303. /* Fill out the rx_status from the PPDU start and end fields */
  304. /* HAL_RX_GET_PPDU_STATUS(soc, mac_id, rx_status); */
  305. rx_desc = qdf_nbuf_data(head_msdu);
  306. decap_format = HAL_RX_DESC_GET_DECAP_FORMAT(rx_desc);
  307. /* Easy case - The MSDU status indicates that this is a non-decapped
  308. * packet in RAW mode.
  309. */
  310. if (decap_format == HAL_HW_RX_DECAP_FORMAT_RAW) {
  311. /* Note that this path might suffer from headroom unavailabilty
  312. * - but the RX status is usually enough
  313. */
  314. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  315. "[%s][%d] decap format raw\n", __func__, __LINE__);
  316. dp_rx_msdus_set_payload(head_msdu);
  317. mpdu_buf = head_msdu;
  318. if (!mpdu_buf)
  319. goto mpdu_stitch_fail;
  320. prev_buf = mpdu_buf;
  321. frag_list_sum_len = 0;
  322. msdu_orig = qdf_nbuf_next(head_msdu);
  323. is_first_frag = 1;
  324. while (msdu_orig) {
  325. dp_rx_msdus_set_payload(head_msdu);
  326. msdu = msdu_orig;
  327. if (!msdu)
  328. goto mpdu_stitch_fail;
  329. if (is_first_frag) {
  330. is_first_frag = 0;
  331. head_frag_list = msdu;
  332. }
  333. frag_list_sum_len += qdf_nbuf_len(msdu);
  334. /* Maintain the linking of the cloned MSDUS */
  335. qdf_nbuf_set_next_ext(prev_buf, msdu);
  336. /* Move to the next */
  337. prev_buf = msdu;
  338. msdu_orig = qdf_nbuf_next(msdu_orig);
  339. }
  340. qdf_nbuf_trim_tail(prev_buf, HAL_RX_FCS_LEN);
  341. /* If there were more fragments to this RAW frame */
  342. if (head_frag_list) {
  343. frag_list_sum_len -= HAL_RX_FCS_LEN;
  344. qdf_nbuf_append_ext_list(mpdu_buf, head_frag_list,
  345. frag_list_sum_len);
  346. }
  347. goto mpdu_stitch_done;
  348. }
  349. /* Decap mode:
  350. * Calculate the amount of header in decapped packet to knock off based
  351. * on the decap type and the corresponding number of raw bytes to copy
  352. * status header
  353. */
  354. rx_desc = qdf_nbuf_data(head_msdu);
  355. hdr_desc = HAL_RX_DESC_GET_80211_HDR(rx_desc);
  356. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  357. "[%s][%d] decap format not raw\n", __func__, __LINE__);
  358. /* Base size */
  359. wifi_hdr_len = sizeof(struct ieee80211_frame);
  360. wh = (struct ieee80211_frame *)hdr_desc;
  361. dir = wh->i_fc[1] & IEEE80211_FC1_DIR_MASK;
  362. if (dir == IEEE80211_FC1_DIR_DSTODS)
  363. wifi_hdr_len += 6;
  364. is_amsdu = 0;
  365. if (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_QOS) {
  366. qos = (struct ieee80211_qoscntl *)
  367. (hdr_desc + wifi_hdr_len);
  368. wifi_hdr_len += 2;
  369. is_amsdu = (qos->i_qos[0] & IEEE80211_QOS_AMSDU);
  370. }
  371. /*Calculate security header length based on 'Protected'
  372. * and 'EXT_IV' flag
  373. * */
  374. if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
  375. char *iv = (char *)wh + wifi_hdr_len;
  376. if (iv[3] & KEY_EXTIV)
  377. sec_hdr_len = 8;
  378. else
  379. sec_hdr_len = 4;
  380. } else {
  381. sec_hdr_len = 0;
  382. }
  383. wifi_hdr_len += sec_hdr_len;
  384. /* MSDU related stuff LLC - AMSDU subframe header etc */
  385. msdu_llc_len = is_amsdu ? (14 + 8) : 8;
  386. mpdu_buf_len = wifi_hdr_len + msdu_llc_len;
  387. /* "Decap" header to remove from MSDU buffer */
  388. decap_hdr_pull_bytes = 14;
  389. /* Allocate a new nbuf for holding the 802.11 header retrieved from the
  390. * status of the now decapped first msdu. Leave enough headroom for
  391. * accomodating any radio-tap /prism like PHY header
  392. */
  393. #define MAX_MONITOR_HEADER (512)
  394. mpdu_buf = qdf_nbuf_alloc(dp_pdev->osif_pdev,
  395. MAX_MONITOR_HEADER + mpdu_buf_len,
  396. MAX_MONITOR_HEADER, 4, FALSE);
  397. if (!mpdu_buf)
  398. goto mpdu_stitch_done;
  399. /* Copy the MPDU related header and enc headers into the first buffer
  400. * - Note that there can be a 2 byte pad between heaader and enc header
  401. */
  402. prev_buf = mpdu_buf;
  403. dest = qdf_nbuf_put_tail(prev_buf, wifi_hdr_len);
  404. if (!dest) {
  405. prev_buf = mpdu_buf = NULL;
  406. goto mpdu_stitch_done;
  407. }
  408. qdf_mem_copy(dest, hdr_desc, wifi_hdr_len);
  409. hdr_desc += wifi_hdr_len;
  410. #if 0
  411. dest = qdf_nbuf_put_tail(prev_buf, sec_hdr_len);
  412. adf_os_mem_copy(dest, hdr_desc, sec_hdr_len);
  413. hdr_desc += sec_hdr_len;
  414. #endif
  415. /* The first LLC len is copied into the MPDU buffer */
  416. frag_list_sum_len = 0;
  417. frag_list_sum_len -= msdu_llc_len;
  418. msdu_orig = head_msdu;
  419. is_first_frag = 1;
  420. amsdu_pad = 0;
  421. while (msdu_orig) {
  422. /* TODO: intra AMSDU padding - do we need it ??? */
  423. msdu = msdu_orig;
  424. if (!msdu)
  425. goto mpdu_stitch_fail;
  426. if (is_first_frag) {
  427. head_frag_list = msdu;
  428. } else {
  429. /* Reload the hdr ptr only on non-first MSDUs */
  430. rx_desc = qdf_nbuf_data(msdu_orig);
  431. hdr_desc = HAL_RX_DESC_GET_80211_HDR(rx_desc);
  432. }
  433. /* Copy this buffers MSDU related status into the prev buffer */
  434. if (is_first_frag) {
  435. is_first_frag = 0;
  436. dest = qdf_nbuf_put_tail(prev_buf,
  437. msdu_llc_len + amsdu_pad);
  438. if (!dest) {
  439. mpdu_buf = NULL;
  440. qdf_nbuf_free(msdu);
  441. goto mpdu_stitch_done;
  442. }
  443. dest += amsdu_pad;
  444. qdf_mem_copy(dest, hdr_desc, msdu_llc_len);
  445. } else {
  446. amsdu_llc_buf = qdf_nbuf_alloc(
  447. dp_pdev->osif_pdev,
  448. 32 + 32,
  449. 32, 4, FALSE);
  450. if (!amsdu_llc_buf)
  451. goto mpdu_stitch_fail;
  452. dest = qdf_nbuf_put_tail(amsdu_llc_buf,
  453. msdu_llc_len + amsdu_pad);
  454. if (!dest)
  455. goto mpdu_stitch_fail;
  456. dest += amsdu_pad;
  457. qdf_mem_copy(dest, hdr_desc, msdu_llc_len);
  458. /* Maintain the linking of the MSDU header
  459. * and cloned MSDUS */
  460. qdf_nbuf_set_next_ext(prev_buf, amsdu_llc_buf);
  461. prev_buf = amsdu_llc_buf;
  462. qdf_nbuf_set_next_ext(prev_buf, msdu);
  463. }
  464. dp_rx_msdus_set_payload(msdu);
  465. /* Push the MSDU buffer beyond the decap header */
  466. qdf_nbuf_pull_head(msdu, decap_hdr_pull_bytes);
  467. frag_list_sum_len += msdu_llc_len + qdf_nbuf_len(msdu)
  468. + amsdu_pad;
  469. /* Set up intra-AMSDU pad to be added to start of next buffer -
  470. * AMSDU pad is 4 byte pad on AMSDU subframe */
  471. amsdu_pad = (msdu_llc_len + qdf_nbuf_len(msdu)) & 0x3;
  472. amsdu_pad = amsdu_pad ? (4 - amsdu_pad) : 0;
  473. /* TODO FIXME How do we handle MSDUs that have fraglist - Should
  474. * probably iterate all the frags cloning them along the way and
  475. * and also updating the prev_buf pointer
  476. */
  477. /* Move to the next */
  478. prev_buf = msdu;
  479. msdu_orig = qdf_nbuf_next(msdu_orig);
  480. }
  481. #if 0
  482. /* Add in the trailer section - encryption trailer + FCS */
  483. qdf_nbuf_put_tail(prev_buf, HAL_RX_FCS_LEN);
  484. frag_list_sum_len += HAL_RX_FCS_LEN;
  485. #endif
  486. /* TODO: Convert this to suitable adf routines */
  487. qdf_nbuf_append_ext_list(mpdu_buf, head_frag_list,
  488. frag_list_sum_len);
  489. mpdu_stitch_done:
  490. /* Check if this buffer contains the PPDU end status for TSF */
  491. /* Need revist this code to see where we can get tsf timestamp */
  492. #if 0
  493. /* PPDU end TLV will be retrived from monitor status ring */
  494. last_mpdu =
  495. (*(((u_int32_t *)&rx_desc->attention)) &
  496. RX_ATTENTION_0_LAST_MPDU_MASK) >>
  497. RX_ATTENTION_0_LAST_MPDU_LSB;
  498. if (last_mpdu)
  499. rx_status->rs_tstamp.tsf = rx_desc->ppdu_end.tsf_timestamp;
  500. #endif
  501. return mpdu_buf;
  502. mpdu_stitch_fail:
  503. if ((mpdu_buf) && (decap_format != HAL_HW_RX_DECAP_FORMAT_RAW)) {
  504. /* Free the head buffer */
  505. qdf_nbuf_free(mpdu_buf);
  506. }
  507. return NULL;
  508. }
  509. /**
  510. * dp_rx_extract_radiotap_info(): Extract and populate information in
  511. * struct mon_rx_status type
  512. * @rx_status: Receive status
  513. * @mon_rx_status: Monitor mode status
  514. *
  515. * Returns: None
  516. */
  517. static inline
  518. void dp_rx_extract_radiotap_info(struct cdp_mon_status *rx_status,
  519. struct mon_rx_status *rx_mon_status)
  520. {
  521. rx_mon_status->tsft = rx_status->cdp_rs_tstamp.cdp_tsf;
  522. rx_mon_status->chan_freq = rx_status->rs_freq;
  523. rx_mon_status->chan_num = rx_status->rs_channel;
  524. rx_mon_status->chan_flags = rx_status->rs_flags;
  525. rx_mon_status->rate = rx_status->rs_datarate;
  526. /* TODO: rx_mon_status->ant_signal_db */
  527. /* TODO: rx_mon_status->nr_ant */
  528. rx_mon_status->mcs = rx_status->cdf_rs_rate_mcs;
  529. rx_mon_status->is_stbc = rx_status->cdp_rs_stbc;
  530. rx_mon_status->sgi = rx_status->cdp_rs_sgi;
  531. /* TODO: rx_mon_status->ldpc */
  532. /* TODO: rx_mon_status->beamformed */
  533. /* TODO: rx_mon_status->vht_flags */
  534. /* TODO: rx_mon_status->vht_flag_values1 */
  535. }
  536. QDF_STATUS dp_rx_mon_deliver(struct dp_soc *soc, uint32_t mac_id,
  537. qdf_nbuf_t head_msdu, qdf_nbuf_t tail_msdu)
  538. {
  539. struct dp_pdev *pdev = soc->pdev_list[mac_id];
  540. struct cdp_mon_status *rs = &pdev->rx_mon_recv_status;
  541. qdf_nbuf_t mon_skb, skb_next;
  542. qdf_nbuf_t mon_mpdu = NULL;
  543. if ((pdev->monitor_vdev == NULL) ||
  544. (pdev->monitor_vdev->osif_rx_mon == NULL)) {
  545. goto mon_deliver_fail;
  546. }
  547. /* restitch mon MPDU for delivery via monitor interface */
  548. mon_mpdu = dp_rx_mon_restitch_mpdu_from_msdus(soc, mac_id, head_msdu,
  549. tail_msdu, rs);
  550. if (mon_mpdu) {
  551. qdf_nbuf_update_radiotap(&(pdev->ppdu_info.rx_status),
  552. mon_mpdu, sizeof(struct rx_pkt_tlvs));
  553. pdev->monitor_vdev->osif_rx_mon(
  554. pdev->monitor_vdev->osif_vdev, mon_mpdu, NULL);
  555. } else {
  556. goto mon_deliver_fail;
  557. }
  558. return QDF_STATUS_SUCCESS;
  559. mon_deliver_fail:
  560. mon_skb = head_msdu;
  561. while (mon_skb) {
  562. skb_next = qdf_nbuf_next(mon_skb);
  563. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  564. "[%s][%d] mon_skb=%pK\n", __func__, __LINE__, mon_skb);
  565. qdf_nbuf_free(mon_skb);
  566. mon_skb = skb_next;
  567. }
  568. return QDF_STATUS_E_INVAL;
  569. }
  570. /**
  571. * dp_rx_mon_dest_process() - Brain of the Rx processing functionality
  572. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  573. * @soc: core txrx main contex
  574. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  575. * @quota: No. of units (packets) that can be serviced in one shot.
  576. *
  577. * This function implements the core of Rx functionality. This is
  578. * expected to handle only non-error frames.
  579. *
  580. * Return: none
  581. */
  582. void dp_rx_mon_dest_process(struct dp_soc *soc, uint32_t mac_id, uint32_t quota)
  583. {
  584. struct dp_pdev *pdev = soc->pdev_list[mac_id];
  585. uint8_t pdev_id;
  586. void *hal_soc;
  587. void *rxdma_dst_ring_desc;
  588. void *mon_dst_srng;
  589. union dp_rx_desc_list_elem_t *head = NULL;
  590. union dp_rx_desc_list_elem_t *tail = NULL;
  591. uint32_t ppdu_id;
  592. uint32_t rx_bufs_used;
  593. pdev_id = pdev->pdev_id;
  594. mon_dst_srng = pdev->rxdma_mon_dst_ring.hal_srng;
  595. if (!mon_dst_srng || !hal_srng_initialized(mon_dst_srng)) {
  596. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  597. "%s %d : HAL Monitor Destination Ring Init Failed -- %pK\n",
  598. __func__, __LINE__, mon_dst_srng);
  599. return;
  600. }
  601. hal_soc = soc->hal_soc;
  602. qdf_assert(hal_soc);
  603. if (qdf_unlikely(hal_srng_access_start(hal_soc, mon_dst_srng))) {
  604. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  605. "%s %d : HAL Monitor Destination Ring access Failed -- %pK\n",
  606. __func__, __LINE__, mon_dst_srng);
  607. return;
  608. }
  609. ppdu_id = pdev->ppdu_info.com_info.ppdu_id;
  610. rx_bufs_used = 0;
  611. while (qdf_likely(rxdma_dst_ring_desc =
  612. hal_srng_dst_peek(hal_soc, mon_dst_srng))) {
  613. qdf_nbuf_t head_msdu, tail_msdu;
  614. uint32_t npackets;
  615. head_msdu = (qdf_nbuf_t) NULL;
  616. tail_msdu = (qdf_nbuf_t) NULL;
  617. rx_bufs_used += dp_rx_mon_mpdu_pop(soc, mac_id,
  618. rxdma_dst_ring_desc,
  619. &head_msdu, &tail_msdu,
  620. &npackets, &ppdu_id,
  621. &head, &tail);
  622. if (ppdu_id != pdev->ppdu_info.com_info.ppdu_id) {
  623. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  624. qdf_mem_zero(&(pdev->ppdu_info.rx_status),
  625. sizeof(pdev->ppdu_info.rx_status));
  626. break;
  627. }
  628. dp_rx_mon_deliver(soc, mac_id, head_msdu, tail_msdu);
  629. rxdma_dst_ring_desc = hal_srng_dst_get_next(hal_soc,
  630. mon_dst_srng);
  631. }
  632. hal_srng_access_end(hal_soc, mon_dst_srng);
  633. if (rx_bufs_used) {
  634. dp_rx_buffers_replenish(soc, pdev_id,
  635. &pdev->rxdma_mon_buf_ring, &soc->rx_desc_mon[pdev_id],
  636. rx_bufs_used, &head, &tail, HAL_RX_BUF_RBM_SW3_BM);
  637. }
  638. }
  639. static QDF_STATUS
  640. dp_rx_pdev_mon_buf_attach(struct dp_pdev *pdev) {
  641. uint8_t pdev_id = pdev->pdev_id;
  642. struct dp_soc *soc = pdev->soc;
  643. union dp_rx_desc_list_elem_t *desc_list = NULL;
  644. union dp_rx_desc_list_elem_t *tail = NULL;
  645. struct dp_srng *rxdma_srng;
  646. uint32_t rxdma_entries;
  647. struct rx_desc_pool *rx_desc_pool;
  648. QDF_STATUS status;
  649. rxdma_srng = &pdev->rxdma_mon_buf_ring;
  650. rxdma_entries = rxdma_srng->alloc_size/hal_srng_get_entrysize(
  651. soc->hal_soc,
  652. RXDMA_MONITOR_BUF);
  653. rx_desc_pool = &soc->rx_desc_mon[pdev_id];
  654. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  655. "%s: Mon RX Desc Pool[%d] allocation size=%d\n"
  656. , __func__, pdev_id, rxdma_entries*3);
  657. status = dp_rx_desc_pool_alloc(soc, pdev_id,
  658. rxdma_entries*3, rx_desc_pool);
  659. if (!QDF_IS_STATUS_SUCCESS(status)) {
  660. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  661. "%s: dp_rx_desc_pool_alloc() failed \n", __func__);
  662. return status;
  663. }
  664. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  665. "%s: Mon RX Buffers Replenish pdev_id=%d\n",
  666. __func__, pdev_id);
  667. status = dp_rx_buffers_replenish(soc, pdev_id, rxdma_srng, rx_desc_pool,
  668. rxdma_entries, &desc_list, &tail,
  669. HAL_RX_BUF_RBM_SW3_BM);
  670. if (!QDF_IS_STATUS_SUCCESS(status)) {
  671. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  672. "%s: dp_rx_buffers_replenish() failed \n", __func__);
  673. return status;
  674. }
  675. return QDF_STATUS_SUCCESS;
  676. }
  677. static QDF_STATUS
  678. dp_rx_pdev_mon_buf_detach(struct dp_pdev *pdev) {
  679. uint8_t pdev_id = pdev->pdev_id;
  680. struct dp_soc *soc = pdev->soc;
  681. struct rx_desc_pool *rx_desc_pool;
  682. rx_desc_pool = &soc->rx_desc_mon[pdev_id];
  683. if (rx_desc_pool->pool_size != 0) {
  684. dp_rx_desc_pool_free(soc, pdev_id, rx_desc_pool);
  685. }
  686. return QDF_STATUS_SUCCESS;
  687. }
  688. /*
  689. * Allocate and setup link descriptor pool that will be used by HW for
  690. * various link and queue descriptors and managed by WBM
  691. */
  692. static int dp_mon_link_desc_pool_setup(struct dp_soc *soc, uint32_t mac_id)
  693. {
  694. struct dp_pdev *dp_pdev = soc->pdev_list[mac_id];
  695. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  696. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  697. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  698. uint32_t total_link_descs, total_mem_size;
  699. uint32_t num_link_desc_banks;
  700. uint32_t last_bank_size = 0;
  701. uint32_t entry_size, num_entries;
  702. void *mon_desc_srng;
  703. uint32_t num_replenish_buf;
  704. struct dp_srng *dp_srng;
  705. int i;
  706. dp_srng = &dp_pdev->rxdma_mon_desc_ring;
  707. num_entries = dp_srng->alloc_size/hal_srng_get_entrysize(
  708. soc->hal_soc, RXDMA_MONITOR_DESC);
  709. /* Round up to power of 2 */
  710. total_link_descs = 1;
  711. while (total_link_descs < num_entries)
  712. total_link_descs <<= 1;
  713. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  714. "%s: total_link_descs: %u, link_desc_size: %d\n",
  715. __func__, total_link_descs, link_desc_size);
  716. total_mem_size = total_link_descs * link_desc_size;
  717. total_mem_size += link_desc_align;
  718. if (total_mem_size <= max_alloc_size) {
  719. num_link_desc_banks = 0;
  720. last_bank_size = total_mem_size;
  721. } else {
  722. num_link_desc_banks = (total_mem_size) /
  723. (max_alloc_size - link_desc_align);
  724. last_bank_size = total_mem_size %
  725. (max_alloc_size - link_desc_align);
  726. }
  727. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  728. "%s: total_mem_size: %d, num_link_desc_banks: %u, \
  729. max_alloc_size: %d last_bank_size: %d\n",
  730. __func__, total_mem_size, num_link_desc_banks, max_alloc_size,
  731. last_bank_size);
  732. for (i = 0; i < num_link_desc_banks; i++) {
  733. dp_pdev->link_desc_banks[i].base_vaddr_unaligned =
  734. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  735. max_alloc_size,
  736. &(dp_pdev->link_desc_banks[i].base_paddr_unaligned));
  737. if (!dp_pdev->link_desc_banks[i].base_vaddr_unaligned) {
  738. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  739. "%s: Link desc memory allocation failed\n",
  740. __func__);
  741. goto fail;
  742. }
  743. dp_pdev->link_desc_banks[i].size = max_alloc_size;
  744. dp_pdev->link_desc_banks[i].base_vaddr =
  745. (void *)((unsigned long)
  746. (dp_pdev->link_desc_banks[i].base_vaddr_unaligned) +
  747. ((unsigned long)
  748. (dp_pdev->link_desc_banks[i].base_vaddr_unaligned) %
  749. link_desc_align));
  750. dp_pdev->link_desc_banks[i].base_paddr =
  751. (unsigned long)
  752. (dp_pdev->link_desc_banks[i].base_paddr_unaligned) +
  753. ((unsigned long)
  754. (dp_pdev->link_desc_banks[i].base_vaddr) -
  755. (unsigned long)
  756. (dp_pdev->link_desc_banks[i].base_vaddr_unaligned));
  757. }
  758. if (last_bank_size) {
  759. /* Allocate last bank in case total memory required is not exact
  760. * multiple of max_alloc_size
  761. */
  762. dp_pdev->link_desc_banks[i].base_vaddr_unaligned =
  763. qdf_mem_alloc_consistent(soc->osdev,
  764. soc->osdev->dev, last_bank_size,
  765. &(dp_pdev->link_desc_banks[i].base_paddr_unaligned));
  766. if (dp_pdev->link_desc_banks[i].base_vaddr_unaligned == NULL) {
  767. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  768. "%s: allocation failed for mon link desc pool\n",
  769. __func__);
  770. goto fail;
  771. }
  772. dp_pdev->link_desc_banks[i].size = last_bank_size;
  773. dp_pdev->link_desc_banks[i].base_vaddr =
  774. (void *)((unsigned long)
  775. (dp_pdev->link_desc_banks[i].base_vaddr_unaligned) +
  776. ((unsigned long)
  777. (dp_pdev->link_desc_banks[i].base_vaddr_unaligned) %
  778. link_desc_align));
  779. dp_pdev->link_desc_banks[i].base_paddr =
  780. (unsigned long)
  781. (dp_pdev->link_desc_banks[i].base_paddr_unaligned) +
  782. ((unsigned long)
  783. (dp_pdev->link_desc_banks[i].base_vaddr) -
  784. (unsigned long)
  785. (dp_pdev->link_desc_banks[i].base_vaddr_unaligned));
  786. }
  787. /* Allocate and setup link descriptor idle list for HW internal use */
  788. entry_size = hal_srng_get_entrysize(soc->hal_soc, RXDMA_MONITOR_DESC);
  789. total_mem_size = entry_size * total_link_descs;
  790. mon_desc_srng = dp_pdev->rxdma_mon_desc_ring.hal_srng;
  791. num_replenish_buf = 0;
  792. if (total_mem_size <= max_alloc_size) {
  793. void *desc;
  794. hal_srng_access_start_unlocked(soc->hal_soc, mon_desc_srng);
  795. for (i = 0; i < MAX_MON_LINK_DESC_BANKS &&
  796. dp_pdev->link_desc_banks[i].base_paddr; i++) {
  797. uint32_t num_entries =
  798. (dp_pdev->link_desc_banks[i].size -
  799. (unsigned long)
  800. (dp_pdev->link_desc_banks[i].base_vaddr) -
  801. (unsigned long)
  802. (dp_pdev->link_desc_banks[i].base_vaddr_unaligned))
  803. / link_desc_size;
  804. unsigned long paddr =
  805. (unsigned long)
  806. (dp_pdev->link_desc_banks[i].base_paddr);
  807. unsigned long vaddr =
  808. (unsigned long)
  809. (dp_pdev->link_desc_banks[i].base_vaddr);
  810. while (num_entries && (desc =
  811. hal_srng_src_get_next(soc->hal_soc,
  812. mon_desc_srng))) {
  813. hal_set_link_desc_addr(desc, i, paddr);
  814. num_entries--;
  815. num_replenish_buf++;
  816. paddr += link_desc_size;
  817. vaddr += link_desc_size;
  818. }
  819. }
  820. hal_srng_access_end_unlocked(soc->hal_soc, mon_desc_srng);
  821. } else {
  822. qdf_assert(0);
  823. }
  824. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  825. "%s: successfully replenished %d buffer\n",
  826. __func__, num_replenish_buf);
  827. return 0;
  828. fail:
  829. for (i = 0; i < MAX_MON_LINK_DESC_BANKS; i++) {
  830. if (dp_pdev->link_desc_banks[i].base_vaddr_unaligned) {
  831. qdf_mem_free_consistent(soc->osdev, NULL,
  832. dp_pdev->link_desc_banks[i].size,
  833. dp_pdev->link_desc_banks[i].base_vaddr_unaligned,
  834. dp_pdev->link_desc_banks[i].base_paddr_unaligned, 0);
  835. }
  836. }
  837. return QDF_STATUS_E_FAILURE;
  838. }
  839. /*
  840. * Free link descriptor pool that was setup HW
  841. */
  842. static void dp_mon_link_desc_pool_cleanup(struct dp_soc *soc, uint32_t mac_id)
  843. {
  844. struct dp_pdev *dp_pdev = soc->pdev_list[mac_id];
  845. int i;
  846. for (i = 0; i < MAX_MON_LINK_DESC_BANKS; i++) {
  847. if (dp_pdev->link_desc_banks[i].base_vaddr_unaligned) {
  848. qdf_mem_free_consistent(soc->osdev, NULL,
  849. dp_pdev->link_desc_banks[i].size,
  850. dp_pdev->link_desc_banks[i].base_vaddr_unaligned,
  851. dp_pdev->link_desc_banks[i].base_paddr_unaligned, 0);
  852. }
  853. }
  854. }
  855. /**
  856. * dp_rx_pdev_mon_attach() - attach DP RX for monitor mode
  857. * @pdev: core txrx pdev context
  858. *
  859. * This function will attach a DP RX for monitor mode instance into
  860. * the main device (SOC) context. Will allocate dp rx resource and
  861. * initialize resources.
  862. *
  863. * Return: QDF_STATUS_SUCCESS: success
  864. * QDF_STATUS_E_RESOURCES: Error return
  865. */
  866. QDF_STATUS
  867. dp_rx_pdev_mon_attach(struct dp_pdev *pdev) {
  868. uint8_t pdev_id = pdev->pdev_id;
  869. struct dp_soc *soc = pdev->soc;
  870. QDF_STATUS status;
  871. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  872. "%s: pdev attach id=%d\n", __func__, pdev_id);
  873. status = dp_rx_pdev_mon_buf_attach(pdev);
  874. if (!QDF_IS_STATUS_SUCCESS(status)) {
  875. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  876. "%s: dp_rx_pdev_mon_buf_attach() failed \n", __func__);
  877. return status;
  878. }
  879. status = dp_rx_pdev_mon_status_attach(pdev);
  880. if (!QDF_IS_STATUS_SUCCESS(status)) {
  881. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  882. "%s: dp_rx_pdev_mon_status_attach() failed \n",
  883. __func__);
  884. return status;
  885. }
  886. status = dp_mon_link_desc_pool_setup(soc, pdev_id);
  887. if (!QDF_IS_STATUS_SUCCESS(status)) {
  888. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  889. "%s: dp_mon_link_desc_pool_setup() failed \n",
  890. __func__);
  891. return status;
  892. }
  893. return QDF_STATUS_SUCCESS;
  894. }
  895. /**
  896. * dp_rx_pdev_mon_detach() - detach dp rx for monitor mode
  897. * @pdev: core txrx pdev context
  898. *
  899. * This function will detach DP RX for monitor mode from
  900. * main device context. will free DP Rx resources for
  901. * monitor mode
  902. *
  903. * Return: QDF_STATUS_SUCCESS: success
  904. * QDF_STATUS_E_RESOURCES: Error return
  905. */
  906. QDF_STATUS
  907. dp_rx_pdev_mon_detach(struct dp_pdev *pdev) {
  908. uint8_t pdev_id = pdev->pdev_id;
  909. struct dp_soc *soc = pdev->soc;
  910. dp_mon_link_desc_pool_cleanup(soc, pdev_id);
  911. dp_rx_pdev_mon_status_detach(pdev);
  912. dp_rx_pdev_mon_buf_detach(pdev);
  913. return QDF_STATUS_SUCCESS;
  914. }