dp_rx_err.c 81 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_tx.h"
  22. #include "dp_peer.h"
  23. #include "dp_internal.h"
  24. #include "hal_api.h"
  25. #include "qdf_trace.h"
  26. #include "qdf_nbuf.h"
  27. #include "dp_rx_defrag.h"
  28. #include "dp_ipa.h"
  29. #ifdef FEATURE_WDS
  30. #include "dp_txrx_wds.h"
  31. #endif
  32. #include <enet.h> /* LLC_SNAP_HDR_LEN */
  33. #include "qdf_net_types.h"
  34. #include "dp_rx_buffer_pool.h"
  35. #define dp_rx_err_alert(params...) QDF_TRACE_FATAL(QDF_MODULE_ID_DP_RX_ERROR, params)
  36. #define dp_rx_err_err(params...) QDF_TRACE_ERROR(QDF_MODULE_ID_DP_RX_ERROR, params)
  37. #define dp_rx_err_warn(params...) QDF_TRACE_WARN(QDF_MODULE_ID_DP_RX_ERROR, params)
  38. #define dp_rx_err_info(params...) \
  39. __QDF_TRACE_FL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_RX_ERROR, ## params)
  40. #define dp_rx_err_info_rl(params...) \
  41. __QDF_TRACE_RL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_RX_ERROR, ## params)
  42. #define dp_rx_err_debug(params...) QDF_TRACE_DEBUG(QDF_MODULE_ID_DP_RX_ERROR, params)
  43. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  44. /* Max buffer in invalid peer SG list*/
  45. #define DP_MAX_INVALID_BUFFERS 10
  46. /* Max regular Rx packet routing error */
  47. #define DP_MAX_REG_RX_ROUTING_ERRS_THRESHOLD 20
  48. #define DP_MAX_REG_RX_ROUTING_ERRS_IN_TIMEOUT 10
  49. #define DP_RX_ERR_ROUTE_TIMEOUT_US (5 * 1000 * 1000) /* micro seconds */
  50. #ifdef FEATURE_MEC
  51. bool dp_rx_mcast_echo_check(struct dp_soc *soc,
  52. struct dp_peer *peer,
  53. uint8_t *rx_tlv_hdr,
  54. qdf_nbuf_t nbuf)
  55. {
  56. struct dp_vdev *vdev = peer->vdev;
  57. struct dp_pdev *pdev = vdev->pdev;
  58. struct dp_mec_entry *mecentry = NULL;
  59. struct dp_ast_entry *ase = NULL;
  60. uint16_t sa_idx = 0;
  61. uint8_t *data;
  62. /*
  63. * Multicast Echo Check is required only if vdev is STA and
  64. * received pkt is a multicast/broadcast pkt. otherwise
  65. * skip the MEC check.
  66. */
  67. if (vdev->opmode != wlan_op_mode_sta)
  68. return false;
  69. if (!hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc, rx_tlv_hdr))
  70. return false;
  71. data = qdf_nbuf_data(nbuf);
  72. /*
  73. * if the received pkts src mac addr matches with vdev
  74. * mac address then drop the pkt as it is looped back
  75. */
  76. if (!(qdf_mem_cmp(&data[QDF_MAC_ADDR_SIZE],
  77. vdev->mac_addr.raw,
  78. QDF_MAC_ADDR_SIZE)))
  79. return true;
  80. /*
  81. * In case of qwrap isolation mode, donot drop loopback packets.
  82. * In isolation mode, all packets from the wired stations need to go
  83. * to rootap and loop back to reach the wireless stations and
  84. * vice-versa.
  85. */
  86. if (qdf_unlikely(vdev->isolation_vdev))
  87. return false;
  88. /*
  89. * if the received pkts src mac addr matches with the
  90. * wired PCs MAC addr which is behind the STA or with
  91. * wireless STAs MAC addr which are behind the Repeater,
  92. * then drop the pkt as it is looped back
  93. */
  94. if (hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc, rx_tlv_hdr)) {
  95. sa_idx = hal_rx_msdu_end_sa_idx_get(soc->hal_soc, rx_tlv_hdr);
  96. if ((sa_idx < 0) ||
  97. (sa_idx >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) {
  98. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  99. "invalid sa_idx: %d", sa_idx);
  100. qdf_assert_always(0);
  101. }
  102. qdf_spin_lock_bh(&soc->ast_lock);
  103. ase = soc->ast_table[sa_idx];
  104. /*
  105. * this check was not needed since MEC is not dependent on AST,
  106. * but if we dont have this check SON has some issues in
  107. * dual backhaul scenario. in APS SON mode, client connected
  108. * to RE 2G and sends multicast packets. the RE sends it to CAP
  109. * over 5G backhaul. the CAP loopback it on 2G to RE.
  110. * On receiving in 2G STA vap, we assume that client has roamed
  111. * and kickout the client.
  112. */
  113. if (ase && (ase->peer_id != peer->peer_id)) {
  114. qdf_spin_unlock_bh(&soc->ast_lock);
  115. goto drop;
  116. }
  117. qdf_spin_unlock_bh(&soc->ast_lock);
  118. }
  119. qdf_spin_lock_bh(&soc->mec_lock);
  120. mecentry = dp_peer_mec_hash_find_by_pdevid(soc, pdev->pdev_id,
  121. &data[QDF_MAC_ADDR_SIZE]);
  122. if (!mecentry) {
  123. qdf_spin_unlock_bh(&soc->mec_lock);
  124. return false;
  125. }
  126. qdf_spin_unlock_bh(&soc->mec_lock);
  127. drop:
  128. dp_rx_err_info("%pK: received pkt with same src mac " QDF_MAC_ADDR_FMT,
  129. soc, QDF_MAC_ADDR_REF(&data[QDF_MAC_ADDR_SIZE]));
  130. return true;
  131. }
  132. #endif
  133. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  134. void dp_rx_link_desc_refill_duplicate_check(
  135. struct dp_soc *soc,
  136. struct hal_buf_info *buf_info,
  137. hal_buff_addrinfo_t ring_buf_info)
  138. {
  139. struct hal_buf_info current_link_desc_buf_info = { 0 };
  140. /* do duplicate link desc address check */
  141. hal_rx_buffer_addr_info_get_paddr(ring_buf_info,
  142. &current_link_desc_buf_info);
  143. /*
  144. * TODO - Check if the hal soc api call can be removed
  145. * since the cookie is just used for print.
  146. * buffer_addr_info is the first element of ring_desc
  147. */
  148. hal_rx_buf_cookie_rbm_get(soc->hal_soc,
  149. (uint32_t *)ring_buf_info,
  150. &current_link_desc_buf_info);
  151. if (qdf_unlikely(current_link_desc_buf_info.paddr ==
  152. buf_info->paddr)) {
  153. dp_info_rl("duplicate link desc addr: %llu, cookie: 0x%x",
  154. current_link_desc_buf_info.paddr,
  155. current_link_desc_buf_info.sw_cookie);
  156. DP_STATS_INC(soc, rx.err.dup_refill_link_desc, 1);
  157. }
  158. *buf_info = current_link_desc_buf_info;
  159. }
  160. /**
  161. * dp_rx_link_desc_return_by_addr - Return a MPDU link descriptor to
  162. * (WBM) by address
  163. *
  164. * @soc: core DP main context
  165. * @link_desc_addr: link descriptor addr
  166. *
  167. * Return: QDF_STATUS
  168. */
  169. QDF_STATUS
  170. dp_rx_link_desc_return_by_addr(struct dp_soc *soc,
  171. hal_buff_addrinfo_t link_desc_addr,
  172. uint8_t bm_action)
  173. {
  174. struct dp_srng *wbm_desc_rel_ring = &soc->wbm_desc_rel_ring;
  175. hal_ring_handle_t wbm_rel_srng = wbm_desc_rel_ring->hal_srng;
  176. hal_soc_handle_t hal_soc = soc->hal_soc;
  177. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  178. void *src_srng_desc;
  179. if (!wbm_rel_srng) {
  180. dp_rx_err_err("%pK: WBM RELEASE RING not initialized", soc);
  181. return status;
  182. }
  183. /* do duplicate link desc address check */
  184. dp_rx_link_desc_refill_duplicate_check(
  185. soc,
  186. &soc->last_op_info.wbm_rel_link_desc,
  187. link_desc_addr);
  188. if (qdf_unlikely(hal_srng_access_start(hal_soc, wbm_rel_srng))) {
  189. /* TODO */
  190. /*
  191. * Need API to convert from hal_ring pointer to
  192. * Ring Type / Ring Id combo
  193. */
  194. dp_rx_err_err("%pK: HAL RING Access For WBM Release SRNG Failed - %pK",
  195. soc, wbm_rel_srng);
  196. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  197. goto done;
  198. }
  199. src_srng_desc = hal_srng_src_get_next(hal_soc, wbm_rel_srng);
  200. if (qdf_likely(src_srng_desc)) {
  201. /* Return link descriptor through WBM ring (SW2WBM)*/
  202. hal_rx_msdu_link_desc_set(hal_soc,
  203. src_srng_desc, link_desc_addr, bm_action);
  204. status = QDF_STATUS_SUCCESS;
  205. } else {
  206. struct hal_srng *srng = (struct hal_srng *)wbm_rel_srng;
  207. DP_STATS_INC(soc, rx.err.hal_ring_access_full_fail, 1);
  208. dp_info_rl("WBM Release Ring (Id %d) Full(Fail CNT %u)",
  209. srng->ring_id,
  210. soc->stats.rx.err.hal_ring_access_full_fail);
  211. dp_info_rl("HP 0x%x Reap HP 0x%x TP 0x%x Cached TP 0x%x",
  212. *srng->u.src_ring.hp_addr,
  213. srng->u.src_ring.reap_hp,
  214. *srng->u.src_ring.tp_addr,
  215. srng->u.src_ring.cached_tp);
  216. QDF_BUG(0);
  217. }
  218. done:
  219. hal_srng_access_end(hal_soc, wbm_rel_srng);
  220. return status;
  221. }
  222. /**
  223. * dp_rx_link_desc_return() - Return a MPDU link descriptor to HW
  224. * (WBM), following error handling
  225. *
  226. * @soc: core DP main context
  227. * @ring_desc: opaque pointer to the REO error ring descriptor
  228. *
  229. * Return: QDF_STATUS
  230. */
  231. QDF_STATUS
  232. dp_rx_link_desc_return(struct dp_soc *soc, hal_ring_desc_t ring_desc,
  233. uint8_t bm_action)
  234. {
  235. void *buf_addr_info = HAL_RX_REO_BUF_ADDR_INFO_GET(ring_desc);
  236. return dp_rx_link_desc_return_by_addr(soc, buf_addr_info, bm_action);
  237. }
  238. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  239. /**
  240. * dp_rx_msdus_drop() - Drops all MSDU's per MPDU
  241. *
  242. * @soc: core txrx main context
  243. * @ring_desc: opaque pointer to the REO error ring descriptor
  244. * @mpdu_desc_info: MPDU descriptor information from ring descriptor
  245. * @head: head of the local descriptor free-list
  246. * @tail: tail of the local descriptor free-list
  247. * @quota: No. of units (packets) that can be serviced in one shot.
  248. *
  249. * This function is used to drop all MSDU in an MPDU
  250. *
  251. * Return: uint32_t: No. of elements processed
  252. */
  253. static uint32_t
  254. dp_rx_msdus_drop(struct dp_soc *soc, hal_ring_desc_t ring_desc,
  255. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  256. uint8_t *mac_id,
  257. uint32_t quota)
  258. {
  259. uint32_t rx_bufs_used = 0;
  260. void *link_desc_va;
  261. struct hal_buf_info buf_info;
  262. struct dp_pdev *pdev;
  263. struct hal_rx_msdu_list msdu_list; /* MSDU's per MPDU */
  264. int i;
  265. uint8_t *rx_tlv_hdr;
  266. uint32_t tid;
  267. struct rx_desc_pool *rx_desc_pool;
  268. struct dp_rx_desc *rx_desc;
  269. /* First field in REO Dst ring Desc is buffer_addr_info */
  270. void *buf_addr_info = ring_desc;
  271. struct buffer_addr_info cur_link_desc_addr_info = { 0 };
  272. struct buffer_addr_info next_link_desc_addr_info = { 0 };
  273. hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &buf_info);
  274. /* buffer_addr_info is the first element of ring_desc */
  275. hal_rx_buf_cookie_rbm_get(soc->hal_soc,
  276. (uint32_t *)ring_desc,
  277. &buf_info);
  278. link_desc_va = dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  279. more_msdu_link_desc:
  280. /* No UNMAP required -- this is "malloc_consistent" memory */
  281. hal_rx_msdu_list_get(soc->hal_soc, link_desc_va, &msdu_list,
  282. &mpdu_desc_info->msdu_count);
  283. for (i = 0; (i < mpdu_desc_info->msdu_count); i++) {
  284. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc,
  285. msdu_list.sw_cookie[i]);
  286. qdf_assert_always(rx_desc);
  287. /* all buffers from a MSDU link link belong to same pdev */
  288. *mac_id = rx_desc->pool_id;
  289. pdev = dp_get_pdev_for_lmac_id(soc, rx_desc->pool_id);
  290. if (!pdev) {
  291. dp_rx_err_debug("%pK: pdev is null for pool_id = %d",
  292. soc, rx_desc->pool_id);
  293. return rx_bufs_used;
  294. }
  295. if (!dp_rx_desc_check_magic(rx_desc)) {
  296. dp_rx_err_err("%pK: Invalid rx_desc cookie=%d",
  297. soc, msdu_list.sw_cookie[i]);
  298. return rx_bufs_used;
  299. }
  300. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  301. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  302. dp_ipa_handle_rx_buf_smmu_mapping(soc, rx_desc->nbuf,
  303. rx_desc_pool->buf_size,
  304. false);
  305. qdf_nbuf_unmap_nbytes_single(soc->osdev, rx_desc->nbuf,
  306. QDF_DMA_FROM_DEVICE,
  307. rx_desc_pool->buf_size);
  308. rx_desc->unmapped = 1;
  309. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  310. rx_desc->rx_buf_start = qdf_nbuf_data(rx_desc->nbuf);
  311. rx_bufs_used++;
  312. tid = hal_rx_mpdu_start_tid_get(soc->hal_soc,
  313. rx_desc->rx_buf_start);
  314. dp_rx_err_err("%pK: Packet received with PN error for tid :%d",
  315. soc, tid);
  316. rx_tlv_hdr = qdf_nbuf_data(rx_desc->nbuf);
  317. if (hal_rx_encryption_info_valid(soc->hal_soc, rx_tlv_hdr))
  318. hal_rx_print_pn(soc->hal_soc, rx_tlv_hdr);
  319. /* Just free the buffers */
  320. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf, *mac_id);
  321. dp_rx_add_to_free_desc_list(&pdev->free_list_head,
  322. &pdev->free_list_tail, rx_desc);
  323. }
  324. /*
  325. * If the msdu's are spread across multiple link-descriptors,
  326. * we cannot depend solely on the msdu_count(e.g., if msdu is
  327. * spread across multiple buffers).Hence, it is
  328. * necessary to check the next link_descriptor and release
  329. * all the msdu's that are part of it.
  330. */
  331. hal_rx_get_next_msdu_link_desc_buf_addr_info(
  332. link_desc_va,
  333. &next_link_desc_addr_info);
  334. if (hal_rx_is_buf_addr_info_valid(
  335. &next_link_desc_addr_info)) {
  336. /* Clear the next link desc info for the current link_desc */
  337. hal_rx_clear_next_msdu_link_desc_buf_addr_info(link_desc_va);
  338. dp_rx_link_desc_return_by_addr(soc, buf_addr_info,
  339. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  340. hal_rx_buffer_addr_info_get_paddr(
  341. &next_link_desc_addr_info,
  342. &buf_info);
  343. /* buffer_addr_info is the first element of ring_desc */
  344. hal_rx_buf_cookie_rbm_get(soc->hal_soc,
  345. (uint32_t *)&next_link_desc_addr_info,
  346. &buf_info);
  347. cur_link_desc_addr_info = next_link_desc_addr_info;
  348. buf_addr_info = &cur_link_desc_addr_info;
  349. link_desc_va =
  350. dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  351. goto more_msdu_link_desc;
  352. }
  353. quota--;
  354. dp_rx_link_desc_return_by_addr(soc, buf_addr_info,
  355. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  356. return rx_bufs_used;
  357. }
  358. /**
  359. * dp_rx_pn_error_handle() - Handles PN check errors
  360. *
  361. * @soc: core txrx main context
  362. * @ring_desc: opaque pointer to the REO error ring descriptor
  363. * @mpdu_desc_info: MPDU descriptor information from ring descriptor
  364. * @head: head of the local descriptor free-list
  365. * @tail: tail of the local descriptor free-list
  366. * @quota: No. of units (packets) that can be serviced in one shot.
  367. *
  368. * This function implements PN error handling
  369. * If the peer is configured to ignore the PN check errors
  370. * or if DP feels, that this frame is still OK, the frame can be
  371. * re-injected back to REO to use some of the other features
  372. * of REO e.g. duplicate detection/routing to other cores
  373. *
  374. * Return: uint32_t: No. of elements processed
  375. */
  376. static uint32_t
  377. dp_rx_pn_error_handle(struct dp_soc *soc, hal_ring_desc_t ring_desc,
  378. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  379. uint8_t *mac_id,
  380. uint32_t quota)
  381. {
  382. uint16_t peer_id;
  383. uint32_t rx_bufs_used = 0;
  384. struct dp_peer *peer;
  385. bool peer_pn_policy = false;
  386. peer_id = DP_PEER_METADATA_PEER_ID_GET(
  387. mpdu_desc_info->peer_meta_data);
  388. peer = dp_peer_get_ref_by_id(soc, peer_id, DP_MOD_ID_RX_ERR);
  389. if (qdf_likely(peer)) {
  390. /*
  391. * TODO: Check for peer specific policies & set peer_pn_policy
  392. */
  393. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  394. "discard rx due to PN error for peer %pK "QDF_MAC_ADDR_FMT,
  395. peer, QDF_MAC_ADDR_REF(peer->mac_addr.raw));
  396. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  397. }
  398. dp_rx_err_err("%pK: Packet received with PN error", soc);
  399. /* No peer PN policy -- definitely drop */
  400. if (!peer_pn_policy)
  401. rx_bufs_used = dp_rx_msdus_drop(soc, ring_desc,
  402. mpdu_desc_info,
  403. mac_id, quota);
  404. return rx_bufs_used;
  405. }
  406. /**
  407. * dp_rx_oor_handle() - Handles the msdu which is OOR error
  408. *
  409. * @soc: core txrx main context
  410. * @nbuf: pointer to msdu skb
  411. * @peer_id: dp peer ID
  412. * @rx_tlv_hdr: start of rx tlv header
  413. *
  414. * This function process the msdu delivered from REO2TCL
  415. * ring with error type OOR
  416. *
  417. * Return: None
  418. */
  419. static void
  420. dp_rx_oor_handle(struct dp_soc *soc,
  421. qdf_nbuf_t nbuf,
  422. uint16_t peer_id,
  423. uint8_t *rx_tlv_hdr)
  424. {
  425. uint32_t frame_mask = FRAME_MASK_IPV4_ARP | FRAME_MASK_IPV4_DHCP |
  426. FRAME_MASK_IPV4_EAPOL | FRAME_MASK_IPV6_DHCP;
  427. struct dp_peer *peer = NULL;
  428. peer = dp_peer_get_ref_by_id(soc, peer_id, DP_MOD_ID_RX_ERR);
  429. if (!peer) {
  430. dp_info_rl("peer not found");
  431. goto free_nbuf;
  432. }
  433. if (dp_rx_deliver_special_frame(soc, peer, nbuf, frame_mask,
  434. rx_tlv_hdr)) {
  435. DP_STATS_INC(soc, rx.err.reo_err_oor_to_stack, 1);
  436. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  437. return;
  438. }
  439. free_nbuf:
  440. if (peer)
  441. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  442. DP_STATS_INC(soc, rx.err.reo_err_oor_drop, 1);
  443. qdf_nbuf_free(nbuf);
  444. }
  445. /**
  446. * dp_rx_reo_err_entry_process() - Handles for REO error entry processing
  447. *
  448. * @soc: core txrx main context
  449. * @ring_desc: opaque pointer to the REO error ring descriptor
  450. * @mpdu_desc_info: pointer to mpdu level description info
  451. * @link_desc_va: pointer to msdu_link_desc virtual address
  452. * @err_code: reo erro code fetched from ring entry
  453. *
  454. * Function to handle msdus fetched from msdu link desc, currently
  455. * only support 2K jump, OOR error.
  456. *
  457. * Return: msdu count processed.
  458. */
  459. static uint32_t
  460. dp_rx_reo_err_entry_process(struct dp_soc *soc,
  461. void *ring_desc,
  462. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  463. void *link_desc_va,
  464. enum hal_reo_error_code err_code)
  465. {
  466. uint32_t rx_bufs_used = 0;
  467. struct dp_pdev *pdev;
  468. int i;
  469. uint8_t *rx_tlv_hdr_first;
  470. uint8_t *rx_tlv_hdr_last;
  471. uint32_t tid = DP_MAX_TIDS;
  472. uint16_t peer_id;
  473. struct dp_rx_desc *rx_desc;
  474. struct rx_desc_pool *rx_desc_pool;
  475. qdf_nbuf_t nbuf;
  476. struct hal_buf_info buf_info;
  477. struct hal_rx_msdu_list msdu_list;
  478. uint16_t num_msdus;
  479. struct buffer_addr_info cur_link_desc_addr_info = { 0 };
  480. struct buffer_addr_info next_link_desc_addr_info = { 0 };
  481. /* First field in REO Dst ring Desc is buffer_addr_info */
  482. void *buf_addr_info = ring_desc;
  483. qdf_nbuf_t head_nbuf = NULL;
  484. qdf_nbuf_t tail_nbuf = NULL;
  485. uint16_t msdu_processed = 0;
  486. bool ret;
  487. peer_id = DP_PEER_METADATA_PEER_ID_GET(
  488. mpdu_desc_info->peer_meta_data);
  489. more_msdu_link_desc:
  490. hal_rx_msdu_list_get(soc->hal_soc, link_desc_va, &msdu_list,
  491. &num_msdus);
  492. for (i = 0; i < num_msdus; i++) {
  493. rx_desc = dp_rx_cookie_2_va_rxdma_buf(
  494. soc,
  495. msdu_list.sw_cookie[i]);
  496. qdf_assert_always(rx_desc);
  497. /* all buffers from a MSDU link belong to same pdev */
  498. pdev = dp_get_pdev_for_lmac_id(soc, rx_desc->pool_id);
  499. nbuf = rx_desc->nbuf;
  500. ret = dp_rx_desc_paddr_sanity_check(rx_desc,
  501. msdu_list.paddr[i]);
  502. if (!ret) {
  503. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  504. rx_desc->in_err_state = 1;
  505. continue;
  506. }
  507. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  508. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  509. dp_ipa_handle_rx_buf_smmu_mapping(soc, nbuf,
  510. rx_desc_pool->buf_size,
  511. false);
  512. qdf_nbuf_unmap_nbytes_single(soc->osdev, nbuf,
  513. QDF_DMA_FROM_DEVICE,
  514. rx_desc_pool->buf_size);
  515. rx_desc->unmapped = 1;
  516. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  517. QDF_NBUF_CB_RX_PKT_LEN(nbuf) = msdu_list.msdu_info[i].msdu_len;
  518. rx_bufs_used++;
  519. dp_rx_add_to_free_desc_list(&pdev->free_list_head,
  520. &pdev->free_list_tail, rx_desc);
  521. DP_RX_LIST_APPEND(head_nbuf, tail_nbuf, nbuf);
  522. if (qdf_unlikely(msdu_list.msdu_info[i].msdu_flags &
  523. HAL_MSDU_F_MSDU_CONTINUATION))
  524. continue;
  525. if (dp_rx_buffer_pool_refill(soc, head_nbuf,
  526. rx_desc->pool_id)) {
  527. /* MSDU queued back to the pool */
  528. goto process_next_msdu;
  529. }
  530. rx_tlv_hdr_first = qdf_nbuf_data(head_nbuf);
  531. rx_tlv_hdr_last = qdf_nbuf_data(tail_nbuf);
  532. if (qdf_unlikely(head_nbuf != tail_nbuf)) {
  533. nbuf = dp_rx_sg_create(soc, head_nbuf);
  534. qdf_nbuf_set_is_frag(nbuf, 1);
  535. DP_STATS_INC(soc, rx.err.reo_err_oor_sg_count, 1);
  536. }
  537. switch (err_code) {
  538. case HAL_REO_ERR_REGULAR_FRAME_2K_JUMP:
  539. /*
  540. * only first msdu, mpdu start description tlv valid?
  541. * and use it for following msdu.
  542. */
  543. if (hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  544. rx_tlv_hdr_last))
  545. tid = hal_rx_mpdu_start_tid_get(
  546. soc->hal_soc,
  547. rx_tlv_hdr_first);
  548. dp_2k_jump_handle(soc, nbuf, rx_tlv_hdr_last,
  549. peer_id, tid);
  550. break;
  551. case HAL_REO_ERR_REGULAR_FRAME_OOR:
  552. dp_rx_oor_handle(soc, nbuf, peer_id, rx_tlv_hdr_last);
  553. break;
  554. default:
  555. dp_err_rl("Non-support error code %d", err_code);
  556. qdf_nbuf_free(nbuf);
  557. }
  558. process_next_msdu:
  559. msdu_processed++;
  560. head_nbuf = NULL;
  561. tail_nbuf = NULL;
  562. }
  563. /*
  564. * If the msdu's are spread across multiple link-descriptors,
  565. * we cannot depend solely on the msdu_count(e.g., if msdu is
  566. * spread across multiple buffers).Hence, it is
  567. * necessary to check the next link_descriptor and release
  568. * all the msdu's that are part of it.
  569. */
  570. hal_rx_get_next_msdu_link_desc_buf_addr_info(
  571. link_desc_va,
  572. &next_link_desc_addr_info);
  573. if (hal_rx_is_buf_addr_info_valid(
  574. &next_link_desc_addr_info)) {
  575. /* Clear the next link desc info for the current link_desc */
  576. hal_rx_clear_next_msdu_link_desc_buf_addr_info(link_desc_va);
  577. dp_rx_link_desc_return_by_addr(
  578. soc,
  579. buf_addr_info,
  580. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  581. hal_rx_buffer_addr_info_get_paddr(
  582. &next_link_desc_addr_info,
  583. &buf_info);
  584. /* buffer_addr_info is the first element of ring_desc */
  585. hal_rx_buf_cookie_rbm_get(soc->hal_soc,
  586. (uint32_t *)&next_link_desc_addr_info,
  587. &buf_info);
  588. link_desc_va =
  589. dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  590. cur_link_desc_addr_info = next_link_desc_addr_info;
  591. buf_addr_info = &cur_link_desc_addr_info;
  592. goto more_msdu_link_desc;
  593. }
  594. dp_rx_link_desc_return_by_addr(soc, buf_addr_info,
  595. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  596. if (qdf_unlikely(msdu_processed != mpdu_desc_info->msdu_count))
  597. DP_STATS_INC(soc, rx.err.msdu_count_mismatch, 1);
  598. return rx_bufs_used;
  599. }
  600. #ifdef DP_INVALID_PEER_ASSERT
  601. #define DP_PDEV_INVALID_PEER_MSDU_CHECK(head, tail) \
  602. do { \
  603. qdf_assert_always(!(head)); \
  604. qdf_assert_always(!(tail)); \
  605. } while (0)
  606. #else
  607. #define DP_PDEV_INVALID_PEER_MSDU_CHECK(head, tail) /* no op */
  608. #endif
  609. /**
  610. * dp_rx_chain_msdus() - Function to chain all msdus of a mpdu
  611. * to pdev invalid peer list
  612. *
  613. * @soc: core DP main context
  614. * @nbuf: Buffer pointer
  615. * @rx_tlv_hdr: start of rx tlv header
  616. * @mac_id: mac id
  617. *
  618. * Return: bool: true for last msdu of mpdu
  619. */
  620. static bool
  621. dp_rx_chain_msdus(struct dp_soc *soc, qdf_nbuf_t nbuf,
  622. uint8_t *rx_tlv_hdr, uint8_t mac_id)
  623. {
  624. bool mpdu_done = false;
  625. qdf_nbuf_t curr_nbuf = NULL;
  626. qdf_nbuf_t tmp_nbuf = NULL;
  627. /* TODO: Currently only single radio is supported, hence
  628. * pdev hard coded to '0' index
  629. */
  630. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  631. if (!dp_pdev) {
  632. dp_rx_err_debug("%pK: pdev is null for mac_id = %d", soc, mac_id);
  633. return mpdu_done;
  634. }
  635. /* if invalid peer SG list has max values free the buffers in list
  636. * and treat current buffer as start of list
  637. *
  638. * current logic to detect the last buffer from attn_tlv is not reliable
  639. * in OFDMA UL scenario hence add max buffers check to avoid list pile
  640. * up
  641. */
  642. if (!dp_pdev->first_nbuf ||
  643. (dp_pdev->invalid_peer_head_msdu &&
  644. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST
  645. (dp_pdev->invalid_peer_head_msdu) >= DP_MAX_INVALID_BUFFERS)) {
  646. qdf_nbuf_set_rx_chfrag_start(nbuf, 1);
  647. dp_pdev->ppdu_id = hal_rx_get_ppdu_id(soc->hal_soc,
  648. rx_tlv_hdr);
  649. dp_pdev->first_nbuf = true;
  650. /* If the new nbuf received is the first msdu of the
  651. * amsdu and there are msdus in the invalid peer msdu
  652. * list, then let us free all the msdus of the invalid
  653. * peer msdu list.
  654. * This scenario can happen when we start receiving
  655. * new a-msdu even before the previous a-msdu is completely
  656. * received.
  657. */
  658. curr_nbuf = dp_pdev->invalid_peer_head_msdu;
  659. while (curr_nbuf) {
  660. tmp_nbuf = curr_nbuf->next;
  661. qdf_nbuf_free(curr_nbuf);
  662. curr_nbuf = tmp_nbuf;
  663. }
  664. dp_pdev->invalid_peer_head_msdu = NULL;
  665. dp_pdev->invalid_peer_tail_msdu = NULL;
  666. hal_rx_mon_hw_desc_get_mpdu_status(soc->hal_soc, rx_tlv_hdr,
  667. &(dp_pdev->ppdu_info.rx_status));
  668. }
  669. if (dp_pdev->ppdu_id == hal_rx_attn_phy_ppdu_id_get(soc->hal_soc,
  670. rx_tlv_hdr) &&
  671. hal_rx_attn_msdu_done_get(soc->hal_soc, rx_tlv_hdr)) {
  672. qdf_nbuf_set_rx_chfrag_end(nbuf, 1);
  673. qdf_assert_always(dp_pdev->first_nbuf == true);
  674. dp_pdev->first_nbuf = false;
  675. mpdu_done = true;
  676. }
  677. /*
  678. * For MCL, invalid_peer_head_msdu and invalid_peer_tail_msdu
  679. * should be NULL here, add the checking for debugging purpose
  680. * in case some corner case.
  681. */
  682. DP_PDEV_INVALID_PEER_MSDU_CHECK(dp_pdev->invalid_peer_head_msdu,
  683. dp_pdev->invalid_peer_tail_msdu);
  684. DP_RX_LIST_APPEND(dp_pdev->invalid_peer_head_msdu,
  685. dp_pdev->invalid_peer_tail_msdu,
  686. nbuf);
  687. return mpdu_done;
  688. }
  689. static
  690. void dp_rx_err_handle_bar(struct dp_soc *soc,
  691. struct dp_peer *peer,
  692. qdf_nbuf_t nbuf)
  693. {
  694. uint8_t *rx_tlv_hdr;
  695. unsigned char type, subtype;
  696. uint16_t start_seq_num;
  697. uint32_t tid;
  698. QDF_STATUS status;
  699. struct ieee80211_frame_bar *bar;
  700. /*
  701. * 1. Is this a BAR frame. If not Discard it.
  702. * 2. If it is, get the peer id, tid, ssn
  703. * 2a Do a tid update
  704. */
  705. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  706. bar = (struct ieee80211_frame_bar *)(rx_tlv_hdr + soc->rx_pkt_tlv_size);
  707. type = bar->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
  708. subtype = bar->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
  709. if (!(type == IEEE80211_FC0_TYPE_CTL &&
  710. subtype == QDF_IEEE80211_FC0_SUBTYPE_BAR)) {
  711. dp_err_rl("Not a BAR frame!");
  712. return;
  713. }
  714. tid = hal_rx_mpdu_start_tid_get(soc->hal_soc, rx_tlv_hdr);
  715. qdf_assert_always(tid < DP_MAX_TIDS);
  716. start_seq_num = le16toh(bar->i_seq) >> IEEE80211_SEQ_SEQ_SHIFT;
  717. dp_info_rl("tid %u window_size %u start_seq_num %u",
  718. tid, peer->rx_tid[tid].ba_win_size, start_seq_num);
  719. status = dp_rx_tid_update_wifi3(peer, tid,
  720. peer->rx_tid[tid].ba_win_size,
  721. start_seq_num);
  722. if (status != QDF_STATUS_SUCCESS) {
  723. dp_err_rl("failed to handle bar frame update rx tid");
  724. DP_STATS_INC(soc, rx.err.bar_handle_fail_count, 1);
  725. } else {
  726. DP_STATS_INC(soc, rx.err.ssn_update_count, 1);
  727. }
  728. }
  729. /**
  730. * dp_rx_bar_frame_handle() - Function to handle err BAR frames
  731. * @soc: core DP main context
  732. * @ring_desc: Hal ring desc
  733. * @rx_desc: dp rx desc
  734. * @mpdu_desc_info: mpdu desc info
  735. *
  736. * Handle the error BAR frames received. Ensure the SOC level
  737. * stats are updated based on the REO error code. The BAR frames
  738. * are further processed by updating the Rx tids with the start
  739. * sequence number (SSN) and BA window size. Desc is returned
  740. * to the free desc list
  741. *
  742. * Return: none
  743. */
  744. static void
  745. dp_rx_bar_frame_handle(struct dp_soc *soc,
  746. hal_ring_desc_t ring_desc,
  747. struct dp_rx_desc *rx_desc,
  748. struct hal_rx_mpdu_desc_info *mpdu_desc_info)
  749. {
  750. qdf_nbuf_t nbuf;
  751. struct dp_pdev *pdev;
  752. struct dp_peer *peer;
  753. struct rx_desc_pool *rx_desc_pool;
  754. uint16_t peer_id;
  755. uint8_t *rx_tlv_hdr;
  756. uint32_t tid;
  757. uint8_t reo_err_code;
  758. nbuf = rx_desc->nbuf;
  759. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  760. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  761. dp_ipa_handle_rx_buf_smmu_mapping(soc, nbuf,
  762. rx_desc_pool->buf_size,
  763. false);
  764. qdf_nbuf_unmap_nbytes_single(soc->osdev, nbuf,
  765. QDF_DMA_FROM_DEVICE,
  766. rx_desc_pool->buf_size);
  767. rx_desc->unmapped = 1;
  768. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  769. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  770. peer_id =
  771. hal_rx_mpdu_start_sw_peer_id_get(soc->hal_soc,
  772. rx_tlv_hdr);
  773. peer = dp_peer_get_ref_by_id(soc, peer_id,
  774. DP_MOD_ID_RX_ERR);
  775. tid = hal_rx_mpdu_start_tid_get(soc->hal_soc,
  776. rx_tlv_hdr);
  777. pdev = dp_get_pdev_for_lmac_id(soc, rx_desc->pool_id);
  778. if (!peer)
  779. goto next;
  780. reo_err_code = hal_rx_get_reo_error_code(soc->hal_soc, ring_desc);
  781. dp_info("BAR frame: peer = "QDF_MAC_ADDR_FMT
  782. " peer_id = %d"
  783. " tid = %u"
  784. " SSN = %d"
  785. " error code = %d",
  786. QDF_MAC_ADDR_REF(peer->mac_addr.raw),
  787. peer->peer_id,
  788. tid,
  789. mpdu_desc_info->mpdu_seq,
  790. reo_err_code);
  791. switch (reo_err_code) {
  792. case HAL_REO_ERR_BAR_FRAME_2K_JUMP:
  793. /* fallthrough */
  794. case HAL_REO_ERR_BAR_FRAME_OOR:
  795. dp_rx_err_handle_bar(soc, peer, nbuf);
  796. DP_STATS_INC(soc,
  797. rx.err.reo_error[reo_err_code], 1);
  798. break;
  799. default:
  800. DP_STATS_INC(soc, rx.bar_frame, 1);
  801. }
  802. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  803. next:
  804. dp_rx_link_desc_return(soc, ring_desc,
  805. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  806. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf,
  807. rx_desc->pool_id);
  808. dp_rx_add_to_free_desc_list(&pdev->free_list_head,
  809. &pdev->free_list_tail,
  810. rx_desc);
  811. }
  812. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  813. /**
  814. * dp_2k_jump_handle() - Function to handle 2k jump exception
  815. * on WBM ring
  816. *
  817. * @soc: core DP main context
  818. * @nbuf: buffer pointer
  819. * @rx_tlv_hdr: start of rx tlv header
  820. * @peer_id: peer id of first msdu
  821. * @tid: Tid for which exception occurred
  822. *
  823. * This function handles 2k jump violations arising out
  824. * of receiving aggregates in non BA case. This typically
  825. * may happen if aggregates are received on a QOS enabled TID
  826. * while Rx window size is still initialized to value of 2. Or
  827. * it may also happen if negotiated window size is 1 but peer
  828. * sends aggregates.
  829. *
  830. */
  831. void
  832. dp_2k_jump_handle(struct dp_soc *soc,
  833. qdf_nbuf_t nbuf,
  834. uint8_t *rx_tlv_hdr,
  835. uint16_t peer_id,
  836. uint8_t tid)
  837. {
  838. struct dp_peer *peer = NULL;
  839. struct dp_rx_tid *rx_tid = NULL;
  840. uint32_t frame_mask = FRAME_MASK_IPV4_ARP;
  841. peer = dp_peer_get_ref_by_id(soc, peer_id, DP_MOD_ID_RX_ERR);
  842. if (!peer) {
  843. dp_rx_err_err("%pK: peer not found", soc);
  844. goto free_nbuf;
  845. }
  846. if (tid >= DP_MAX_TIDS) {
  847. dp_info_rl("invalid tid");
  848. goto nbuf_deliver;
  849. }
  850. rx_tid = &peer->rx_tid[tid];
  851. qdf_spin_lock_bh(&rx_tid->tid_lock);
  852. /* only if BA session is active, allow send Delba */
  853. if (rx_tid->ba_status != DP_RX_BA_ACTIVE) {
  854. qdf_spin_unlock_bh(&rx_tid->tid_lock);
  855. goto nbuf_deliver;
  856. }
  857. if (!rx_tid->delba_tx_status) {
  858. rx_tid->delba_tx_retry++;
  859. rx_tid->delba_tx_status = 1;
  860. rx_tid->delba_rcode =
  861. IEEE80211_REASON_QOS_SETUP_REQUIRED;
  862. qdf_spin_unlock_bh(&rx_tid->tid_lock);
  863. if (soc->cdp_soc.ol_ops->send_delba) {
  864. DP_STATS_INC(soc, rx.err.rx_2k_jump_delba_sent, 1);
  865. soc->cdp_soc.ol_ops->send_delba(
  866. peer->vdev->pdev->soc->ctrl_psoc,
  867. peer->vdev->vdev_id,
  868. peer->mac_addr.raw,
  869. tid,
  870. rx_tid->delba_rcode);
  871. }
  872. } else {
  873. qdf_spin_unlock_bh(&rx_tid->tid_lock);
  874. }
  875. nbuf_deliver:
  876. if (dp_rx_deliver_special_frame(soc, peer, nbuf, frame_mask,
  877. rx_tlv_hdr)) {
  878. DP_STATS_INC(soc, rx.err.rx_2k_jump_to_stack, 1);
  879. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  880. return;
  881. }
  882. free_nbuf:
  883. if (peer)
  884. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  885. DP_STATS_INC(soc, rx.err.rx_2k_jump_drop, 1);
  886. qdf_nbuf_free(nbuf);
  887. }
  888. #if defined(QCA_WIFI_QCA6390) || defined(QCA_WIFI_QCA6490) || \
  889. defined(QCA_WIFI_QCA6750) || defined(QCA_WIFI_WCN7850)
  890. /**
  891. * dp_rx_null_q_handle_invalid_peer_id_exception() - to find exception
  892. * @soc: pointer to dp_soc struct
  893. * @pool_id: Pool id to find dp_pdev
  894. * @rx_tlv_hdr: TLV header of received packet
  895. * @nbuf: SKB
  896. *
  897. * In certain types of packets if peer_id is not correct then
  898. * driver may not be able find. Try finding peer by addr_2 of
  899. * received MPDU. If you find the peer then most likely sw_peer_id &
  900. * ast_idx is corrupted.
  901. *
  902. * Return: True if you find the peer by addr_2 of received MPDU else false
  903. */
  904. static bool
  905. dp_rx_null_q_handle_invalid_peer_id_exception(struct dp_soc *soc,
  906. uint8_t pool_id,
  907. uint8_t *rx_tlv_hdr,
  908. qdf_nbuf_t nbuf)
  909. {
  910. struct dp_peer *peer = NULL;
  911. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(soc->hal_soc, rx_tlv_hdr);
  912. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, pool_id);
  913. struct ieee80211_frame *wh = (struct ieee80211_frame *)rx_pkt_hdr;
  914. if (!pdev) {
  915. dp_rx_err_debug("%pK: pdev is null for pool_id = %d",
  916. soc, pool_id);
  917. return false;
  918. }
  919. /*
  920. * WAR- In certain types of packets if peer_id is not correct then
  921. * driver may not be able find. Try finding peer by addr_2 of
  922. * received MPDU
  923. */
  924. if (wh)
  925. peer = dp_peer_find_hash_find(soc, wh->i_addr2, 0,
  926. DP_VDEV_ALL, DP_MOD_ID_RX_ERR);
  927. if (peer) {
  928. dp_verbose_debug("MPDU sw_peer_id & ast_idx is corrupted");
  929. hal_rx_dump_pkt_tlvs(soc->hal_soc, rx_tlv_hdr,
  930. QDF_TRACE_LEVEL_DEBUG);
  931. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer_id,
  932. 1, qdf_nbuf_len(nbuf));
  933. qdf_nbuf_free(nbuf);
  934. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  935. return true;
  936. }
  937. return false;
  938. }
  939. /**
  940. * dp_rx_check_pkt_len() - Check for pktlen validity
  941. * @soc: DP SOC context
  942. * @pkt_len: computed length of the pkt from caller in bytes
  943. *
  944. * Return: true if pktlen > RX_BUFFER_SIZE, else return false
  945. *
  946. */
  947. static inline
  948. bool dp_rx_check_pkt_len(struct dp_soc *soc, uint32_t pkt_len)
  949. {
  950. if (qdf_unlikely(pkt_len > RX_DATA_BUFFER_SIZE)) {
  951. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_pkt_len,
  952. 1, pkt_len);
  953. return true;
  954. } else {
  955. return false;
  956. }
  957. }
  958. #else
  959. static inline bool
  960. dp_rx_null_q_handle_invalid_peer_id_exception(struct dp_soc *soc,
  961. uint8_t pool_id,
  962. uint8_t *rx_tlv_hdr,
  963. qdf_nbuf_t nbuf)
  964. {
  965. return false;
  966. }
  967. static inline
  968. bool dp_rx_check_pkt_len(struct dp_soc *soc, uint32_t pkt_len)
  969. {
  970. return false;
  971. }
  972. #endif
  973. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  974. /**
  975. * dp_rx_null_q_desc_handle() - Function to handle NULL Queue
  976. * descriptor violation on either a
  977. * REO or WBM ring
  978. *
  979. * @soc: core DP main context
  980. * @nbuf: buffer pointer
  981. * @rx_tlv_hdr: start of rx tlv header
  982. * @pool_id: mac id
  983. * @peer: peer handle
  984. *
  985. * This function handles NULL queue descriptor violations arising out
  986. * a missing REO queue for a given peer or a given TID. This typically
  987. * may happen if a packet is received on a QOS enabled TID before the
  988. * ADDBA negotiation for that TID, when the TID queue is setup. Or
  989. * it may also happen for MC/BC frames if they are not routed to the
  990. * non-QOS TID queue, in the absence of any other default TID queue.
  991. * This error can show up both in a REO destination or WBM release ring.
  992. *
  993. * Return: QDF_STATUS_SUCCESS, if nbuf handled successfully. QDF status code
  994. * if nbuf could not be handled or dropped.
  995. */
  996. static QDF_STATUS
  997. dp_rx_null_q_desc_handle(struct dp_soc *soc, qdf_nbuf_t nbuf,
  998. uint8_t *rx_tlv_hdr, uint8_t pool_id,
  999. struct dp_peer *peer)
  1000. {
  1001. uint32_t pkt_len;
  1002. uint16_t msdu_len;
  1003. struct dp_vdev *vdev;
  1004. uint8_t tid;
  1005. qdf_ether_header_t *eh;
  1006. struct hal_rx_msdu_metadata msdu_metadata;
  1007. uint16_t sa_idx = 0;
  1008. qdf_nbuf_set_rx_chfrag_start(nbuf,
  1009. hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  1010. rx_tlv_hdr));
  1011. qdf_nbuf_set_rx_chfrag_end(nbuf,
  1012. hal_rx_msdu_end_last_msdu_get(soc->hal_soc,
  1013. rx_tlv_hdr));
  1014. qdf_nbuf_set_da_mcbc(nbuf, hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  1015. rx_tlv_hdr));
  1016. qdf_nbuf_set_da_valid(nbuf,
  1017. hal_rx_msdu_end_da_is_valid_get(soc->hal_soc,
  1018. rx_tlv_hdr));
  1019. qdf_nbuf_set_sa_valid(nbuf,
  1020. hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc,
  1021. rx_tlv_hdr));
  1022. hal_rx_msdu_metadata_get(soc->hal_soc, rx_tlv_hdr, &msdu_metadata);
  1023. msdu_len = hal_rx_msdu_start_msdu_len_get(soc->hal_soc, rx_tlv_hdr);
  1024. pkt_len = msdu_len + msdu_metadata.l3_hdr_pad + soc->rx_pkt_tlv_size;
  1025. if (qdf_likely(!qdf_nbuf_is_frag(nbuf))) {
  1026. if (dp_rx_check_pkt_len(soc, pkt_len))
  1027. goto drop_nbuf;
  1028. /* Set length in nbuf */
  1029. qdf_nbuf_set_pktlen(
  1030. nbuf, qdf_min(pkt_len, (uint32_t)RX_DATA_BUFFER_SIZE));
  1031. qdf_assert_always(nbuf->data == rx_tlv_hdr);
  1032. }
  1033. /*
  1034. * Check if DMA completed -- msdu_done is the last bit
  1035. * to be written
  1036. */
  1037. if (!hal_rx_attn_msdu_done_get(soc->hal_soc, rx_tlv_hdr)) {
  1038. dp_err_rl("MSDU DONE failure");
  1039. hal_rx_dump_pkt_tlvs(soc->hal_soc, rx_tlv_hdr,
  1040. QDF_TRACE_LEVEL_INFO);
  1041. qdf_assert(0);
  1042. }
  1043. if (!peer &&
  1044. dp_rx_null_q_handle_invalid_peer_id_exception(soc, pool_id,
  1045. rx_tlv_hdr, nbuf))
  1046. return QDF_STATUS_E_FAILURE;
  1047. if (!peer) {
  1048. bool mpdu_done = false;
  1049. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, pool_id);
  1050. if (!pdev) {
  1051. dp_err_rl("pdev is null for pool_id = %d", pool_id);
  1052. return QDF_STATUS_E_FAILURE;
  1053. }
  1054. dp_err_rl("peer is NULL");
  1055. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1056. qdf_nbuf_len(nbuf));
  1057. /* QCN9000 has the support enabled */
  1058. if (qdf_unlikely(soc->wbm_release_desc_rx_sg_support)) {
  1059. mpdu_done = true;
  1060. nbuf->next = NULL;
  1061. /* Trigger invalid peer handler wrapper */
  1062. dp_rx_process_invalid_peer_wrapper(soc,
  1063. nbuf, mpdu_done, pool_id);
  1064. } else {
  1065. mpdu_done = dp_rx_chain_msdus(soc, nbuf, rx_tlv_hdr, pool_id);
  1066. /* Trigger invalid peer handler wrapper */
  1067. dp_rx_process_invalid_peer_wrapper(soc,
  1068. pdev->invalid_peer_head_msdu,
  1069. mpdu_done, pool_id);
  1070. }
  1071. if (mpdu_done) {
  1072. pdev->invalid_peer_head_msdu = NULL;
  1073. pdev->invalid_peer_tail_msdu = NULL;
  1074. }
  1075. return QDF_STATUS_E_FAILURE;
  1076. }
  1077. vdev = peer->vdev;
  1078. if (!vdev) {
  1079. dp_err_rl("Null vdev!");
  1080. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1081. goto drop_nbuf;
  1082. }
  1083. /*
  1084. * Advance the packet start pointer by total size of
  1085. * pre-header TLV's
  1086. */
  1087. if (qdf_nbuf_is_frag(nbuf))
  1088. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  1089. else
  1090. qdf_nbuf_pull_head(nbuf, (msdu_metadata.l3_hdr_pad +
  1091. soc->rx_pkt_tlv_size));
  1092. dp_vdev_peer_stats_update_protocol_cnt(vdev, nbuf, NULL, 0, 1);
  1093. if (hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc, rx_tlv_hdr)) {
  1094. sa_idx = hal_rx_msdu_end_sa_idx_get(soc->hal_soc, rx_tlv_hdr);
  1095. if ((sa_idx < 0) ||
  1096. (sa_idx >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) {
  1097. DP_STATS_INC(soc, rx.err.invalid_sa_da_idx, 1);
  1098. goto drop_nbuf;
  1099. }
  1100. }
  1101. if (dp_rx_mcast_echo_check(soc, peer, rx_tlv_hdr, nbuf)) {
  1102. /* this is a looped back MCBC pkt, drop it */
  1103. DP_STATS_INC_PKT(peer, rx.mec_drop, 1, qdf_nbuf_len(nbuf));
  1104. goto drop_nbuf;
  1105. }
  1106. /*
  1107. * In qwrap mode if the received packet matches with any of the vdev
  1108. * mac addresses, drop it. Donot receive multicast packets originated
  1109. * from any proxysta.
  1110. */
  1111. if (check_qwrap_multicast_loopback(vdev, nbuf)) {
  1112. DP_STATS_INC_PKT(peer, rx.mec_drop, 1, qdf_nbuf_len(nbuf));
  1113. goto drop_nbuf;
  1114. }
  1115. if (qdf_unlikely((peer->nawds_enabled == true) &&
  1116. hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  1117. rx_tlv_hdr))) {
  1118. dp_err_rl("free buffer for multicast packet");
  1119. DP_STATS_INC(peer, rx.nawds_mcast_drop, 1);
  1120. goto drop_nbuf;
  1121. }
  1122. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, peer)) {
  1123. dp_err_rl("mcast Policy Check Drop pkt");
  1124. goto drop_nbuf;
  1125. }
  1126. /* WDS Source Port Learning */
  1127. if (qdf_likely(vdev->rx_decap_type == htt_cmn_pkt_type_ethernet &&
  1128. vdev->wds_enabled))
  1129. dp_rx_wds_srcport_learn(soc, rx_tlv_hdr, peer, nbuf,
  1130. msdu_metadata);
  1131. if (hal_rx_is_unicast(soc->hal_soc, rx_tlv_hdr)) {
  1132. tid = hal_rx_tid_get(soc->hal_soc, rx_tlv_hdr);
  1133. if (!peer->rx_tid[tid].hw_qdesc_vaddr_unaligned)
  1134. dp_rx_tid_setup_wifi3(peer, tid, 1, IEEE80211_SEQ_MAX);
  1135. /* IEEE80211_SEQ_MAX indicates invalid start_seq */
  1136. }
  1137. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw)) {
  1138. qdf_nbuf_set_next(nbuf, NULL);
  1139. dp_rx_deliver_raw(vdev, nbuf, peer);
  1140. } else {
  1141. qdf_nbuf_set_next(nbuf, NULL);
  1142. DP_STATS_INC_PKT(peer, rx.to_stack, 1,
  1143. qdf_nbuf_len(nbuf));
  1144. /*
  1145. * Update the protocol tag in SKB based on
  1146. * CCE metadata
  1147. */
  1148. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  1149. EXCEPTION_DEST_RING_ID,
  1150. true, true);
  1151. /* Update the flow tag in SKB based on FSE metadata */
  1152. dp_rx_update_flow_tag(soc, vdev, nbuf,
  1153. rx_tlv_hdr, true);
  1154. if (qdf_unlikely(hal_rx_msdu_end_da_is_mcbc_get(
  1155. soc->hal_soc, rx_tlv_hdr) &&
  1156. (vdev->rx_decap_type ==
  1157. htt_cmn_pkt_type_ethernet))) {
  1158. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1159. DP_STATS_INC_PKT(peer, rx.multicast, 1,
  1160. qdf_nbuf_len(nbuf));
  1161. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost))
  1162. DP_STATS_INC_PKT(peer, rx.bcast, 1,
  1163. qdf_nbuf_len(nbuf));
  1164. }
  1165. qdf_nbuf_set_exc_frame(nbuf, 1);
  1166. dp_rx_deliver_to_stack(soc, vdev, peer, nbuf, NULL);
  1167. }
  1168. return QDF_STATUS_SUCCESS;
  1169. drop_nbuf:
  1170. qdf_nbuf_free(nbuf);
  1171. return QDF_STATUS_E_FAILURE;
  1172. }
  1173. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1174. /**
  1175. * dp_rx_process_rxdma_err() - Function to deliver rxdma unencrypted_err
  1176. * frames to OS or wifi parse errors.
  1177. * @soc: core DP main context
  1178. * @nbuf: buffer pointer
  1179. * @rx_tlv_hdr: start of rx tlv header
  1180. * @peer: peer reference
  1181. * @err_code: rxdma err code
  1182. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  1183. * pool_id has same mapping)
  1184. *
  1185. * Return: None
  1186. */
  1187. void
  1188. dp_rx_process_rxdma_err(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1189. uint8_t *rx_tlv_hdr, struct dp_peer *peer,
  1190. uint8_t err_code, uint8_t mac_id)
  1191. {
  1192. uint32_t pkt_len, l2_hdr_offset;
  1193. uint16_t msdu_len;
  1194. struct dp_vdev *vdev;
  1195. qdf_ether_header_t *eh;
  1196. bool is_broadcast;
  1197. /*
  1198. * Check if DMA completed -- msdu_done is the last bit
  1199. * to be written
  1200. */
  1201. if (!hal_rx_attn_msdu_done_get(soc->hal_soc, rx_tlv_hdr)) {
  1202. dp_err_rl("MSDU DONE failure");
  1203. hal_rx_dump_pkt_tlvs(soc->hal_soc, rx_tlv_hdr,
  1204. QDF_TRACE_LEVEL_INFO);
  1205. qdf_assert(0);
  1206. }
  1207. l2_hdr_offset = hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc,
  1208. rx_tlv_hdr);
  1209. msdu_len = hal_rx_msdu_start_msdu_len_get(soc->hal_soc, rx_tlv_hdr);
  1210. pkt_len = msdu_len + l2_hdr_offset + soc->rx_pkt_tlv_size;
  1211. if (dp_rx_check_pkt_len(soc, pkt_len)) {
  1212. /* Drop & free packet */
  1213. qdf_nbuf_free(nbuf);
  1214. return;
  1215. }
  1216. /* Set length in nbuf */
  1217. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1218. qdf_nbuf_set_next(nbuf, NULL);
  1219. qdf_nbuf_set_rx_chfrag_start(nbuf, 1);
  1220. qdf_nbuf_set_rx_chfrag_end(nbuf, 1);
  1221. if (!peer) {
  1222. QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP, "peer is NULL");
  1223. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1224. qdf_nbuf_len(nbuf));
  1225. /* Trigger invalid peer handler wrapper */
  1226. dp_rx_process_invalid_peer_wrapper(soc, nbuf, true, mac_id);
  1227. return;
  1228. }
  1229. vdev = peer->vdev;
  1230. if (!vdev) {
  1231. dp_rx_err_info_rl("%pK: INVALID vdev %pK OR osif_rx", soc,
  1232. vdev);
  1233. /* Drop & free packet */
  1234. qdf_nbuf_free(nbuf);
  1235. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1236. return;
  1237. }
  1238. /*
  1239. * Advance the packet start pointer by total size of
  1240. * pre-header TLV's
  1241. */
  1242. dp_rx_skip_tlvs(soc, nbuf, l2_hdr_offset);
  1243. if (err_code == HAL_RXDMA_ERR_WIFI_PARSE) {
  1244. uint8_t *pkt_type;
  1245. pkt_type = qdf_nbuf_data(nbuf) + (2 * QDF_MAC_ADDR_SIZE);
  1246. if (*(uint16_t *)pkt_type == htons(QDF_ETH_TYPE_8021Q)) {
  1247. if (*(uint16_t *)(pkt_type + DP_SKIP_VLAN) ==
  1248. htons(QDF_LLC_STP)) {
  1249. DP_STATS_INC(vdev->pdev, vlan_tag_stp_cnt, 1);
  1250. goto process_mesh;
  1251. } else {
  1252. goto process_rx;
  1253. }
  1254. }
  1255. }
  1256. if (vdev->rx_decap_type == htt_cmn_pkt_type_raw)
  1257. goto process_mesh;
  1258. /*
  1259. * WAPI cert AP sends rekey frames as unencrypted.
  1260. * Thus RXDMA will report unencrypted frame error.
  1261. * To pass WAPI cert case, SW needs to pass unencrypted
  1262. * rekey frame to stack.
  1263. */
  1264. if (qdf_nbuf_is_ipv4_wapi_pkt(nbuf)) {
  1265. goto process_rx;
  1266. }
  1267. /*
  1268. * In dynamic WEP case rekey frames are not encrypted
  1269. * similar to WAPI. Allow EAPOL when 8021+wep is enabled and
  1270. * key install is already done
  1271. */
  1272. if ((vdev->sec_type == cdp_sec_type_wep104) &&
  1273. (qdf_nbuf_is_ipv4_eapol_pkt(nbuf)))
  1274. goto process_rx;
  1275. process_mesh:
  1276. if (!vdev->mesh_vdev && err_code == HAL_RXDMA_ERR_UNENCRYPTED) {
  1277. qdf_nbuf_free(nbuf);
  1278. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1279. return;
  1280. }
  1281. if (vdev->mesh_vdev) {
  1282. if (dp_rx_filter_mesh_packets(vdev, nbuf, rx_tlv_hdr)
  1283. == QDF_STATUS_SUCCESS) {
  1284. dp_rx_err_info("%pK: mesh pkt filtered", soc);
  1285. DP_STATS_INC(vdev->pdev, dropped.mesh_filter, 1);
  1286. qdf_nbuf_free(nbuf);
  1287. return;
  1288. }
  1289. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr, peer);
  1290. }
  1291. process_rx:
  1292. if (qdf_unlikely(hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  1293. rx_tlv_hdr) &&
  1294. (vdev->rx_decap_type ==
  1295. htt_cmn_pkt_type_ethernet))) {
  1296. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1297. is_broadcast = (QDF_IS_ADDR_BROADCAST
  1298. (eh->ether_dhost)) ? 1 : 0 ;
  1299. DP_STATS_INC_PKT(peer, rx.multicast, 1, qdf_nbuf_len(nbuf));
  1300. if (is_broadcast) {
  1301. DP_STATS_INC_PKT(peer, rx.bcast, 1,
  1302. qdf_nbuf_len(nbuf));
  1303. }
  1304. }
  1305. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw)) {
  1306. dp_rx_deliver_raw(vdev, nbuf, peer);
  1307. } else {
  1308. /* Update the protocol tag in SKB based on CCE metadata */
  1309. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  1310. EXCEPTION_DEST_RING_ID, true, true);
  1311. /* Update the flow tag in SKB based on FSE metadata */
  1312. dp_rx_update_flow_tag(soc, vdev, nbuf, rx_tlv_hdr, true);
  1313. DP_STATS_INC(peer, rx.to_stack.num, 1);
  1314. qdf_nbuf_set_exc_frame(nbuf, 1);
  1315. dp_rx_deliver_to_stack(soc, vdev, peer, nbuf, NULL);
  1316. }
  1317. return;
  1318. }
  1319. /**
  1320. * dp_rx_process_mic_error(): Function to pass mic error indication to umac
  1321. * @soc: core DP main context
  1322. * @nbuf: buffer pointer
  1323. * @rx_tlv_hdr: start of rx tlv header
  1324. * @peer: peer handle
  1325. *
  1326. * return: void
  1327. */
  1328. void dp_rx_process_mic_error(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1329. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  1330. {
  1331. struct dp_vdev *vdev = NULL;
  1332. struct dp_pdev *pdev = NULL;
  1333. struct ol_if_ops *tops = NULL;
  1334. uint16_t rx_seq, fragno;
  1335. uint8_t is_raw;
  1336. unsigned int tid;
  1337. QDF_STATUS status;
  1338. struct cdp_rx_mic_err_info mic_failure_info;
  1339. if (!hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  1340. rx_tlv_hdr))
  1341. return;
  1342. if (!peer) {
  1343. dp_info_rl("peer not found");
  1344. goto fail;
  1345. }
  1346. vdev = peer->vdev;
  1347. if (!vdev) {
  1348. dp_info_rl("VDEV not found");
  1349. goto fail;
  1350. }
  1351. pdev = vdev->pdev;
  1352. if (!pdev) {
  1353. dp_info_rl("PDEV not found");
  1354. goto fail;
  1355. }
  1356. is_raw = HAL_IS_DECAP_FORMAT_RAW(soc->hal_soc, qdf_nbuf_data(nbuf));
  1357. if (is_raw) {
  1358. fragno = dp_rx_frag_get_mpdu_frag_number(soc,
  1359. qdf_nbuf_data(nbuf));
  1360. /* Can get only last fragment */
  1361. if (fragno) {
  1362. tid = hal_rx_mpdu_start_tid_get(soc->hal_soc,
  1363. qdf_nbuf_data(nbuf));
  1364. rx_seq = hal_rx_get_rx_sequence(soc->hal_soc,
  1365. qdf_nbuf_data(nbuf));
  1366. status = dp_rx_defrag_add_last_frag(soc, peer,
  1367. tid, rx_seq, nbuf);
  1368. dp_info_rl("Frag pkt seq# %d frag# %d consumed "
  1369. "status %d !", rx_seq, fragno, status);
  1370. return;
  1371. }
  1372. }
  1373. if (hal_rx_mpdu_get_addr1(soc->hal_soc, qdf_nbuf_data(nbuf),
  1374. &mic_failure_info.da_mac_addr.bytes[0])) {
  1375. dp_err_rl("Failed to get da_mac_addr");
  1376. goto fail;
  1377. }
  1378. if (hal_rx_mpdu_get_addr2(soc->hal_soc, qdf_nbuf_data(nbuf),
  1379. &mic_failure_info.ta_mac_addr.bytes[0])) {
  1380. dp_err_rl("Failed to get ta_mac_addr");
  1381. goto fail;
  1382. }
  1383. mic_failure_info.key_id = 0;
  1384. mic_failure_info.multicast =
  1385. IEEE80211_IS_MULTICAST(mic_failure_info.da_mac_addr.bytes);
  1386. qdf_mem_zero(mic_failure_info.tsc, MIC_SEQ_CTR_SIZE);
  1387. mic_failure_info.frame_type = cdp_rx_frame_type_802_11;
  1388. mic_failure_info.data = NULL;
  1389. mic_failure_info.vdev_id = vdev->vdev_id;
  1390. tops = pdev->soc->cdp_soc.ol_ops;
  1391. if (tops->rx_mic_error)
  1392. tops->rx_mic_error(soc->ctrl_psoc, pdev->pdev_id,
  1393. &mic_failure_info);
  1394. fail:
  1395. qdf_nbuf_free(nbuf);
  1396. return;
  1397. }
  1398. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1399. #ifdef DP_RX_DESC_COOKIE_INVALIDATE
  1400. /**
  1401. * dp_rx_link_cookie_check() - Validate link desc cookie
  1402. * @ring_desc: ring descriptor
  1403. *
  1404. * Return: qdf status
  1405. */
  1406. static inline QDF_STATUS
  1407. dp_rx_link_cookie_check(hal_ring_desc_t ring_desc)
  1408. {
  1409. if (qdf_unlikely(HAL_RX_REO_BUF_LINK_COOKIE_INVALID_GET(ring_desc)))
  1410. return QDF_STATUS_E_FAILURE;
  1411. return QDF_STATUS_SUCCESS;
  1412. }
  1413. /**
  1414. * dp_rx_link_cookie_invalidate() - Invalidate link desc cookie
  1415. * @ring_desc: ring descriptor
  1416. *
  1417. * Return: None
  1418. */
  1419. static inline void
  1420. dp_rx_link_cookie_invalidate(hal_ring_desc_t ring_desc)
  1421. {
  1422. HAL_RX_REO_BUF_LINK_COOKIE_INVALID_SET(ring_desc);
  1423. }
  1424. #else
  1425. static inline QDF_STATUS
  1426. dp_rx_link_cookie_check(hal_ring_desc_t ring_desc)
  1427. {
  1428. return QDF_STATUS_SUCCESS;
  1429. }
  1430. static inline void
  1431. dp_rx_link_cookie_invalidate(hal_ring_desc_t ring_desc)
  1432. {
  1433. }
  1434. #endif
  1435. #ifdef WLAN_FEATURE_DP_RX_RING_HISTORY
  1436. /**
  1437. * dp_rx_err_ring_record_entry() - Record rx err ring history
  1438. * @soc: Datapath soc structure
  1439. * @paddr: paddr of the buffer in RX err ring
  1440. * @sw_cookie: SW cookie of the buffer in RX err ring
  1441. * @rbm: Return buffer manager of the buffer in RX err ring
  1442. *
  1443. * Returns: None
  1444. */
  1445. static inline void
  1446. dp_rx_err_ring_record_entry(struct dp_soc *soc, uint64_t paddr,
  1447. uint32_t sw_cookie, uint8_t rbm)
  1448. {
  1449. struct dp_buf_info_record *record;
  1450. uint32_t idx;
  1451. if (qdf_unlikely(!soc->rx_err_ring_history))
  1452. return;
  1453. idx = dp_history_get_next_index(&soc->rx_err_ring_history->index,
  1454. DP_RX_ERR_HIST_MAX);
  1455. /* No NULL check needed for record since its an array */
  1456. record = &soc->rx_err_ring_history->entry[idx];
  1457. record->timestamp = qdf_get_log_timestamp();
  1458. record->hbi.paddr = paddr;
  1459. record->hbi.sw_cookie = sw_cookie;
  1460. record->hbi.rbm = rbm;
  1461. }
  1462. #else
  1463. static inline void
  1464. dp_rx_err_ring_record_entry(struct dp_soc *soc, uint64_t paddr,
  1465. uint32_t sw_cookie, uint8_t rbm)
  1466. {
  1467. }
  1468. #endif
  1469. #ifdef HANDLE_RX_REROUTE_ERR
  1470. static int dp_rx_err_handle_msdu_buf(struct dp_soc *soc,
  1471. hal_ring_desc_t ring_desc)
  1472. {
  1473. int lmac_id = DP_INVALID_LMAC_ID;
  1474. struct dp_rx_desc *rx_desc;
  1475. struct hal_buf_info hbi;
  1476. struct dp_pdev *pdev;
  1477. hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &hbi);
  1478. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, hbi.sw_cookie);
  1479. /* sanity */
  1480. if (!rx_desc) {
  1481. DP_STATS_INC(soc, rx.err.reo_err_msdu_buf_invalid_cookie, 1);
  1482. goto assert_return;
  1483. }
  1484. if (!rx_desc->nbuf)
  1485. goto assert_return;
  1486. dp_rx_err_ring_record_entry(soc, hbi.paddr,
  1487. hbi.sw_cookie,
  1488. hal_rx_ret_buf_manager_get(soc->hal_soc,
  1489. ring_desc));
  1490. if (hbi.paddr != qdf_nbuf_get_frag_paddr(rx_desc->nbuf, 0)) {
  1491. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  1492. rx_desc->in_err_state = 1;
  1493. goto assert_return;
  1494. }
  1495. /* After this point the rx_desc and nbuf are valid */
  1496. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  1497. qdf_assert_always(rx_desc->unmapped);
  1498. dp_ipa_handle_rx_buf_smmu_mapping(soc,
  1499. rx_desc->nbuf,
  1500. RX_DATA_BUFFER_SIZE,
  1501. false);
  1502. qdf_nbuf_unmap_nbytes_single(soc->osdev,
  1503. rx_desc->nbuf,
  1504. QDF_DMA_FROM_DEVICE,
  1505. RX_DATA_BUFFER_SIZE);
  1506. rx_desc->unmapped = 1;
  1507. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  1508. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf,
  1509. rx_desc->pool_id);
  1510. pdev = dp_get_pdev_for_lmac_id(soc, rx_desc->pool_id);
  1511. lmac_id = rx_desc->pool_id;
  1512. dp_rx_add_to_free_desc_list(&pdev->free_list_head,
  1513. &pdev->free_list_tail,
  1514. rx_desc);
  1515. return lmac_id;
  1516. assert_return:
  1517. qdf_assert(0);
  1518. return lmac_id;
  1519. }
  1520. static int dp_rx_err_exception(struct dp_soc *soc, hal_ring_desc_t ring_desc)
  1521. {
  1522. int ret;
  1523. uint64_t cur_time_stamp;
  1524. DP_STATS_INC(soc, rx.err.reo_err_msdu_buf_rcved, 1);
  1525. /* Recover if overall error count exceeds threshold */
  1526. if (soc->stats.rx.err.reo_err_msdu_buf_rcved >
  1527. DP_MAX_REG_RX_ROUTING_ERRS_THRESHOLD) {
  1528. dp_err("pkt threshold breached! reo_err_msdu_buf_rcved %u first err pkt time_stamp %llu",
  1529. soc->stats.rx.err.reo_err_msdu_buf_rcved,
  1530. soc->rx_route_err_start_pkt_ts);
  1531. qdf_trigger_self_recovery(NULL, QDF_RX_REG_PKT_ROUTE_ERR);
  1532. }
  1533. cur_time_stamp = qdf_get_log_timestamp_usecs();
  1534. if (!soc->rx_route_err_start_pkt_ts)
  1535. soc->rx_route_err_start_pkt_ts = cur_time_stamp;
  1536. /* Recover if threshold number of packets received in threshold time */
  1537. if ((cur_time_stamp - soc->rx_route_err_start_pkt_ts) >
  1538. DP_RX_ERR_ROUTE_TIMEOUT_US) {
  1539. soc->rx_route_err_start_pkt_ts = cur_time_stamp;
  1540. if (soc->rx_route_err_in_window >
  1541. DP_MAX_REG_RX_ROUTING_ERRS_IN_TIMEOUT) {
  1542. qdf_trigger_self_recovery(NULL,
  1543. QDF_RX_REG_PKT_ROUTE_ERR);
  1544. dp_err("rate threshold breached! reo_err_msdu_buf_rcved %u first err pkt time_stamp %llu",
  1545. soc->stats.rx.err.reo_err_msdu_buf_rcved,
  1546. soc->rx_route_err_start_pkt_ts);
  1547. } else {
  1548. soc->rx_route_err_in_window = 1;
  1549. }
  1550. } else {
  1551. soc->rx_route_err_in_window++;
  1552. }
  1553. ret = dp_rx_err_handle_msdu_buf(soc, ring_desc);
  1554. return ret;
  1555. }
  1556. #else /* HANDLE_RX_REROUTE_ERR */
  1557. static int dp_rx_err_exception(struct dp_soc *soc, hal_ring_desc_t ring_desc)
  1558. {
  1559. qdf_assert_always(0);
  1560. return DP_INVALID_LMAC_ID;
  1561. }
  1562. #endif /* HANDLE_RX_REROUTE_ERR */
  1563. uint32_t
  1564. dp_rx_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  1565. hal_ring_handle_t hal_ring_hdl, uint32_t quota)
  1566. {
  1567. hal_ring_desc_t ring_desc;
  1568. hal_soc_handle_t hal_soc;
  1569. uint32_t count = 0;
  1570. uint32_t rx_bufs_used = 0;
  1571. uint32_t rx_bufs_reaped[MAX_PDEV_CNT] = { 0 };
  1572. uint8_t mac_id = 0;
  1573. uint8_t buf_type;
  1574. uint8_t error;
  1575. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  1576. struct hal_buf_info hbi;
  1577. struct dp_pdev *dp_pdev;
  1578. struct dp_srng *dp_rxdma_srng;
  1579. struct rx_desc_pool *rx_desc_pool;
  1580. void *link_desc_va;
  1581. struct hal_rx_msdu_list msdu_list; /* MSDU's per MPDU */
  1582. uint16_t num_msdus;
  1583. struct dp_rx_desc *rx_desc = NULL;
  1584. QDF_STATUS status;
  1585. bool ret;
  1586. uint32_t error_code = 0;
  1587. /* Debug -- Remove later */
  1588. qdf_assert(soc && hal_ring_hdl);
  1589. hal_soc = soc->hal_soc;
  1590. /* Debug -- Remove later */
  1591. qdf_assert(hal_soc);
  1592. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  1593. /* TODO */
  1594. /*
  1595. * Need API to convert from hal_ring pointer to
  1596. * Ring Type / Ring Id combo
  1597. */
  1598. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  1599. dp_rx_err_err("%pK: HAL RING Access Failed -- %pK", soc,
  1600. hal_ring_hdl);
  1601. goto done;
  1602. }
  1603. while (qdf_likely(quota-- && (ring_desc =
  1604. hal_srng_dst_peek(hal_soc,
  1605. hal_ring_hdl)))) {
  1606. DP_STATS_INC(soc, rx.err_ring_pkts, 1);
  1607. error = hal_rx_err_status_get(hal_soc, ring_desc);
  1608. buf_type = hal_rx_reo_buf_type_get(hal_soc, ring_desc);
  1609. /* Get the MPDU DESC info */
  1610. hal_rx_mpdu_desc_info_get(hal_soc, ring_desc, &mpdu_desc_info);
  1611. if (mpdu_desc_info.msdu_count == 0)
  1612. goto next_entry;
  1613. /*
  1614. * For REO error ring, only MSDU LINK DESC is expected.
  1615. * Handle HAL_RX_REO_MSDU_BUF_ADDR_TYPE exception case.
  1616. */
  1617. if (qdf_unlikely(buf_type != HAL_RX_REO_MSDU_LINK_DESC_TYPE)) {
  1618. int lmac_id;
  1619. lmac_id = dp_rx_err_exception(soc, ring_desc);
  1620. if (lmac_id >= 0)
  1621. rx_bufs_reaped[lmac_id] += 1;
  1622. goto next_entry;
  1623. }
  1624. hal_rx_buf_cookie_rbm_get(hal_soc, (uint32_t *)ring_desc,
  1625. &hbi);
  1626. /*
  1627. * check for the magic number in the sw cookie
  1628. */
  1629. qdf_assert_always((hbi.sw_cookie >> LINK_DESC_ID_SHIFT) &
  1630. soc->link_desc_id_start);
  1631. status = dp_rx_link_cookie_check(ring_desc);
  1632. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  1633. DP_STATS_INC(soc, rx.err.invalid_link_cookie, 1);
  1634. break;
  1635. }
  1636. hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &hbi);
  1637. link_desc_va = dp_rx_cookie_2_link_desc_va(soc, &hbi);
  1638. hal_rx_msdu_list_get(soc->hal_soc, link_desc_va, &msdu_list,
  1639. &num_msdus);
  1640. dp_rx_err_ring_record_entry(soc, msdu_list.paddr[0],
  1641. msdu_list.sw_cookie[0],
  1642. msdu_list.rbm[0]);
  1643. // TODO - BE- Check if the RBM is to be checked for all chips
  1644. if (qdf_unlikely((msdu_list.rbm[0] !=
  1645. DP_WBM2SW_RBM(soc->wbm_sw0_bm_id)) &&
  1646. (msdu_list.rbm[0] !=
  1647. HAL_RX_BUF_RBM_WBM_CHIP0_IDLE_DESC_LIST) &&
  1648. (msdu_list.rbm[0] !=
  1649. DP_DEFRAG_RBM(soc->wbm_sw0_bm_id)))) {
  1650. /* TODO */
  1651. /* Call appropriate handler */
  1652. if (!wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx)) {
  1653. DP_STATS_INC(soc, rx.err.invalid_rbm, 1);
  1654. dp_rx_err_err("%pK: Invalid RBM %d",
  1655. soc, msdu_list.rbm[0]);
  1656. }
  1657. /* Return link descriptor through WBM ring (SW2WBM)*/
  1658. dp_rx_link_desc_return(soc, ring_desc,
  1659. HAL_BM_ACTION_RELEASE_MSDU_LIST);
  1660. goto next_entry;
  1661. }
  1662. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc,
  1663. msdu_list.sw_cookie[0]);
  1664. qdf_assert_always(rx_desc);
  1665. mac_id = rx_desc->pool_id;
  1666. if (mpdu_desc_info.bar_frame) {
  1667. qdf_assert_always(mpdu_desc_info.msdu_count == 1);
  1668. dp_rx_bar_frame_handle(soc,
  1669. ring_desc,
  1670. rx_desc,
  1671. &mpdu_desc_info);
  1672. rx_bufs_reaped[mac_id] += 1;
  1673. goto next_entry;
  1674. }
  1675. if (mpdu_desc_info.mpdu_flags & HAL_MPDU_F_FRAGMENT) {
  1676. /*
  1677. * We only handle one msdu per link desc for fragmented
  1678. * case. We drop the msdus and release the link desc
  1679. * back if there are more than one msdu in link desc.
  1680. */
  1681. if (qdf_unlikely(num_msdus > 1)) {
  1682. count = dp_rx_msdus_drop(soc, ring_desc,
  1683. &mpdu_desc_info,
  1684. &mac_id, quota);
  1685. rx_bufs_reaped[mac_id] += count;
  1686. goto next_entry;
  1687. }
  1688. /*
  1689. * this is a unlikely scenario where the host is reaping
  1690. * a descriptor which it already reaped just a while ago
  1691. * but is yet to replenish it back to HW.
  1692. * In this case host will dump the last 128 descriptors
  1693. * including the software descriptor rx_desc and assert.
  1694. */
  1695. if (qdf_unlikely(!rx_desc->in_use)) {
  1696. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  1697. dp_info_rl("Reaping rx_desc not in use!");
  1698. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  1699. ring_desc, rx_desc);
  1700. /* ignore duplicate RX desc and continue */
  1701. /* Pop out the descriptor */
  1702. goto next_entry;
  1703. }
  1704. ret = dp_rx_desc_paddr_sanity_check(rx_desc,
  1705. msdu_list.paddr[0]);
  1706. if (!ret) {
  1707. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  1708. rx_desc->in_err_state = 1;
  1709. goto next_entry;
  1710. }
  1711. count = dp_rx_frag_handle(soc,
  1712. ring_desc, &mpdu_desc_info,
  1713. rx_desc, &mac_id, quota);
  1714. rx_bufs_reaped[mac_id] += count;
  1715. DP_STATS_INC(soc, rx.rx_frags, 1);
  1716. goto next_entry;
  1717. }
  1718. /*
  1719. * Expect REO errors to be handled after this point
  1720. */
  1721. qdf_assert_always(error == HAL_REO_ERROR_DETECTED);
  1722. error_code = hal_rx_get_reo_error_code(hal_soc, ring_desc);
  1723. if (hal_rx_reo_is_pn_error(error_code)) {
  1724. /* TOD0 */
  1725. DP_STATS_INC(soc,
  1726. rx.err.
  1727. reo_error[HAL_REO_ERR_PN_CHECK_FAILED],
  1728. 1);
  1729. /* increment @pdev level */
  1730. dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1731. if (dp_pdev)
  1732. DP_STATS_INC(dp_pdev, err.reo_error, 1);
  1733. count = dp_rx_pn_error_handle(soc,
  1734. ring_desc,
  1735. &mpdu_desc_info, &mac_id,
  1736. quota);
  1737. rx_bufs_reaped[mac_id] += count;
  1738. goto next_entry;
  1739. }
  1740. if (hal_rx_reo_is_2k_jump(error_code)) {
  1741. /* TOD0 */
  1742. DP_STATS_INC(soc,
  1743. rx.err.
  1744. reo_error[HAL_REO_ERR_REGULAR_FRAME_2K_JUMP],
  1745. 1);
  1746. /* increment @pdev level */
  1747. dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1748. if (dp_pdev)
  1749. DP_STATS_INC(dp_pdev, err.reo_error, 1);
  1750. count = dp_rx_reo_err_entry_process(
  1751. soc,
  1752. ring_desc,
  1753. &mpdu_desc_info,
  1754. link_desc_va,
  1755. HAL_REO_ERR_REGULAR_FRAME_2K_JUMP);
  1756. rx_bufs_reaped[mac_id] += count;
  1757. goto next_entry;
  1758. }
  1759. if (hal_rx_reo_is_oor_error(error_code)) {
  1760. DP_STATS_INC(
  1761. soc,
  1762. rx.err.
  1763. reo_error[HAL_REO_ERR_REGULAR_FRAME_OOR],
  1764. 1);
  1765. /* increment @pdev level */
  1766. dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1767. if (dp_pdev)
  1768. DP_STATS_INC(dp_pdev, err.reo_error, 1);
  1769. count = dp_rx_reo_err_entry_process(
  1770. soc,
  1771. ring_desc,
  1772. &mpdu_desc_info,
  1773. link_desc_va,
  1774. HAL_REO_ERR_REGULAR_FRAME_OOR);
  1775. rx_bufs_reaped[mac_id] += count;
  1776. goto next_entry;
  1777. }
  1778. /* Assert if unexpected error type */
  1779. qdf_assert_always(0);
  1780. next_entry:
  1781. dp_rx_link_cookie_invalidate(ring_desc);
  1782. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  1783. }
  1784. done:
  1785. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  1786. if (soc->rx.flags.defrag_timeout_check) {
  1787. uint32_t now_ms =
  1788. qdf_system_ticks_to_msecs(qdf_system_ticks());
  1789. if (now_ms >= soc->rx.defrag.next_flush_ms)
  1790. dp_rx_defrag_waitlist_flush(soc);
  1791. }
  1792. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  1793. if (rx_bufs_reaped[mac_id]) {
  1794. dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1795. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_id];
  1796. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  1797. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  1798. rx_desc_pool,
  1799. rx_bufs_reaped[mac_id],
  1800. &dp_pdev->free_list_head,
  1801. &dp_pdev->free_list_tail);
  1802. rx_bufs_used += rx_bufs_reaped[mac_id];
  1803. }
  1804. }
  1805. return rx_bufs_used; /* Assume no scale factor for now */
  1806. }
  1807. #ifdef DROP_RXDMA_DECRYPT_ERR
  1808. /**
  1809. * dp_handle_rxdma_decrypt_err() - Check if decrypt err frames can be handled
  1810. *
  1811. * Return: true if rxdma decrypt err frames are handled and false otheriwse
  1812. */
  1813. static inline bool dp_handle_rxdma_decrypt_err(void)
  1814. {
  1815. return false;
  1816. }
  1817. #else
  1818. static inline bool dp_handle_rxdma_decrypt_err(void)
  1819. {
  1820. return true;
  1821. }
  1822. #endif
  1823. static inline bool
  1824. dp_rx_is_sg_formation_required(struct hal_wbm_err_desc_info *info)
  1825. {
  1826. /*
  1827. * Currently Null Queue and Unencrypted error handlers has support for
  1828. * SG. Other error handler do not deal with SG buffer.
  1829. */
  1830. if (((info->wbm_err_src == HAL_RX_WBM_ERR_SRC_REO) &&
  1831. (info->reo_err_code == HAL_REO_ERR_QUEUE_DESC_ADDR_0)) ||
  1832. ((info->wbm_err_src == HAL_RX_WBM_ERR_SRC_RXDMA) &&
  1833. (info->rxdma_err_code == HAL_RXDMA_ERR_UNENCRYPTED)))
  1834. return true;
  1835. return false;
  1836. }
  1837. uint32_t
  1838. dp_rx_wbm_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  1839. hal_ring_handle_t hal_ring_hdl, uint32_t quota)
  1840. {
  1841. hal_ring_desc_t ring_desc;
  1842. hal_soc_handle_t hal_soc;
  1843. struct dp_rx_desc *rx_desc;
  1844. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT] = { NULL };
  1845. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT] = { NULL };
  1846. uint32_t rx_bufs_used = 0;
  1847. uint32_t rx_bufs_reaped[MAX_PDEV_CNT] = { 0 };
  1848. uint8_t buf_type;
  1849. uint8_t mac_id;
  1850. struct dp_pdev *dp_pdev;
  1851. struct dp_srng *dp_rxdma_srng;
  1852. struct rx_desc_pool *rx_desc_pool;
  1853. uint8_t *rx_tlv_hdr;
  1854. qdf_nbuf_t nbuf_head = NULL;
  1855. qdf_nbuf_t nbuf_tail = NULL;
  1856. qdf_nbuf_t nbuf, next;
  1857. struct hal_wbm_err_desc_info wbm_err_info = { 0 };
  1858. uint8_t pool_id;
  1859. uint8_t tid = 0;
  1860. uint8_t msdu_continuation = 0;
  1861. bool process_sg_buf = false;
  1862. uint32_t wbm_err_src;
  1863. struct hal_buf_info buf_info = {0};
  1864. /* Debug -- Remove later */
  1865. qdf_assert(soc && hal_ring_hdl);
  1866. hal_soc = soc->hal_soc;
  1867. /* Debug -- Remove later */
  1868. qdf_assert(hal_soc);
  1869. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  1870. /* TODO */
  1871. /*
  1872. * Need API to convert from hal_ring pointer to
  1873. * Ring Type / Ring Id combo
  1874. */
  1875. dp_rx_err_err("%pK: HAL RING Access Failed -- %pK",
  1876. soc, hal_ring_hdl);
  1877. goto done;
  1878. }
  1879. while (qdf_likely(quota)) {
  1880. ring_desc = hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  1881. if (qdf_unlikely(!ring_desc))
  1882. break;
  1883. /* XXX */
  1884. buf_type = HAL_RX_WBM_BUF_TYPE_GET(ring_desc);
  1885. /*
  1886. * For WBM ring, expect only MSDU buffers
  1887. */
  1888. qdf_assert_always(buf_type == HAL_RX_WBM_BUF_TYPE_REL_BUF);
  1889. wbm_err_src = hal_rx_wbm_err_src_get(hal_soc, ring_desc);
  1890. qdf_assert((wbm_err_src == HAL_RX_WBM_ERR_SRC_RXDMA) ||
  1891. (wbm_err_src == HAL_RX_WBM_ERR_SRC_REO));
  1892. /*
  1893. * Check if the buffer is to be processed on this processor
  1894. */
  1895. /* only cookie and rbm will be valid in buf_info */
  1896. hal_rx_buf_cookie_rbm_get(hal_soc, (uint32_t *)ring_desc,
  1897. &buf_info);
  1898. if (qdf_unlikely(buf_info.rbm !=
  1899. HAL_RX_BUF_RBM_SW3_BM(soc->wbm_sw0_bm_id))) {
  1900. /* TODO */
  1901. /* Call appropriate handler */
  1902. DP_STATS_INC(soc, rx.err.invalid_rbm, 1);
  1903. dp_rx_err_err("%pK: Invalid RBM %d", soc,
  1904. buf_info.rbm);
  1905. continue;
  1906. }
  1907. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, buf_info.sw_cookie);
  1908. qdf_assert_always(rx_desc);
  1909. if (!dp_rx_desc_check_magic(rx_desc)) {
  1910. dp_rx_err_err("%pk: Invalid rx_desc cookie=%d",
  1911. soc, buf_info.sw_cookie);
  1912. continue;
  1913. }
  1914. /*
  1915. * this is a unlikely scenario where the host is reaping
  1916. * a descriptor which it already reaped just a while ago
  1917. * but is yet to replenish it back to HW.
  1918. * In this case host will dump the last 128 descriptors
  1919. * including the software descriptor rx_desc and assert.
  1920. */
  1921. if (qdf_unlikely(!rx_desc->in_use)) {
  1922. DP_STATS_INC(soc, rx.err.hal_wbm_rel_dup, 1);
  1923. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  1924. ring_desc, rx_desc);
  1925. continue;
  1926. }
  1927. hal_rx_wbm_err_info_get(ring_desc, &wbm_err_info, hal_soc);
  1928. nbuf = rx_desc->nbuf;
  1929. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  1930. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  1931. dp_ipa_handle_rx_buf_smmu_mapping(soc, nbuf,
  1932. rx_desc_pool->buf_size,
  1933. false);
  1934. qdf_nbuf_unmap_nbytes_single(soc->osdev, nbuf,
  1935. QDF_DMA_FROM_DEVICE,
  1936. rx_desc_pool->buf_size);
  1937. rx_desc->unmapped = 1;
  1938. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  1939. if (qdf_unlikely(soc->wbm_release_desc_rx_sg_support &&
  1940. dp_rx_is_sg_formation_required(&wbm_err_info))) {
  1941. /* SG is detected from continuation bit */
  1942. msdu_continuation =
  1943. hal_rx_wbm_err_msdu_continuation_get(hal_soc,
  1944. ring_desc);
  1945. if (msdu_continuation &&
  1946. !(soc->wbm_sg_param.wbm_is_first_msdu_in_sg)) {
  1947. /* Update length from first buffer in SG */
  1948. soc->wbm_sg_param.wbm_sg_desc_msdu_len =
  1949. hal_rx_msdu_start_msdu_len_get(
  1950. soc->hal_soc,
  1951. qdf_nbuf_data(nbuf));
  1952. soc->wbm_sg_param.wbm_is_first_msdu_in_sg = true;
  1953. }
  1954. if (msdu_continuation) {
  1955. /* MSDU continued packets */
  1956. qdf_nbuf_set_rx_chfrag_cont(nbuf, 1);
  1957. QDF_NBUF_CB_RX_PKT_LEN(nbuf) =
  1958. soc->wbm_sg_param.wbm_sg_desc_msdu_len;
  1959. } else {
  1960. /* This is the terminal packet in SG */
  1961. qdf_nbuf_set_rx_chfrag_start(nbuf, 1);
  1962. qdf_nbuf_set_rx_chfrag_end(nbuf, 1);
  1963. QDF_NBUF_CB_RX_PKT_LEN(nbuf) =
  1964. soc->wbm_sg_param.wbm_sg_desc_msdu_len;
  1965. process_sg_buf = true;
  1966. }
  1967. }
  1968. /*
  1969. * save the wbm desc info in nbuf TLV. We will need this
  1970. * info when we do the actual nbuf processing
  1971. */
  1972. wbm_err_info.pool_id = rx_desc->pool_id;
  1973. hal_rx_priv_info_set_in_tlv(soc->hal_soc,
  1974. qdf_nbuf_data(nbuf),
  1975. (uint8_t *)&wbm_err_info,
  1976. sizeof(wbm_err_info));
  1977. rx_bufs_reaped[rx_desc->pool_id]++;
  1978. if (qdf_nbuf_is_rx_chfrag_cont(nbuf) || process_sg_buf) {
  1979. DP_RX_LIST_APPEND(soc->wbm_sg_param.wbm_sg_nbuf_head,
  1980. soc->wbm_sg_param.wbm_sg_nbuf_tail,
  1981. nbuf);
  1982. if (process_sg_buf) {
  1983. if (!dp_rx_buffer_pool_refill(
  1984. soc,
  1985. soc->wbm_sg_param.wbm_sg_nbuf_head,
  1986. rx_desc->pool_id))
  1987. DP_RX_MERGE_TWO_LIST(
  1988. nbuf_head, nbuf_tail,
  1989. soc->wbm_sg_param.wbm_sg_nbuf_head,
  1990. soc->wbm_sg_param.wbm_sg_nbuf_tail);
  1991. dp_rx_wbm_sg_list_reset(soc);
  1992. process_sg_buf = false;
  1993. }
  1994. } else if (!dp_rx_buffer_pool_refill(soc, nbuf,
  1995. rx_desc->pool_id)) {
  1996. DP_RX_LIST_APPEND(nbuf_head, nbuf_tail, nbuf);
  1997. }
  1998. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  1999. &tail[rx_desc->pool_id],
  2000. rx_desc);
  2001. /*
  2002. * if continuation bit is set then we have MSDU spread
  2003. * across multiple buffers, let us not decrement quota
  2004. * till we reap all buffers of that MSDU.
  2005. */
  2006. if (qdf_likely(!msdu_continuation))
  2007. quota -= 1;
  2008. }
  2009. done:
  2010. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  2011. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  2012. if (rx_bufs_reaped[mac_id]) {
  2013. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_id];
  2014. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  2015. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  2016. rx_desc_pool, rx_bufs_reaped[mac_id],
  2017. &head[mac_id], &tail[mac_id]);
  2018. rx_bufs_used += rx_bufs_reaped[mac_id];
  2019. }
  2020. }
  2021. nbuf = nbuf_head;
  2022. while (nbuf) {
  2023. struct dp_peer *peer;
  2024. uint16_t peer_id;
  2025. uint8_t err_code;
  2026. uint8_t *tlv_hdr;
  2027. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  2028. /*
  2029. * retrieve the wbm desc info from nbuf TLV, so we can
  2030. * handle error cases appropriately
  2031. */
  2032. hal_rx_priv_info_get_from_tlv(soc->hal_soc, rx_tlv_hdr,
  2033. (uint8_t *)&wbm_err_info,
  2034. sizeof(wbm_err_info));
  2035. peer_id = hal_rx_mpdu_start_sw_peer_id_get(soc->hal_soc,
  2036. rx_tlv_hdr);
  2037. peer = dp_peer_get_ref_by_id(soc, peer_id, DP_MOD_ID_RX_ERR);
  2038. if (!peer)
  2039. dp_info_rl("peer is null peer_id%u err_src%u err_rsn%u",
  2040. peer_id, wbm_err_info.wbm_err_src,
  2041. wbm_err_info.reo_psh_rsn);
  2042. /* Set queue_mapping in nbuf to 0 */
  2043. dp_set_rx_queue(nbuf, 0);
  2044. next = nbuf->next;
  2045. /*
  2046. * Form the SG for msdu continued buffers
  2047. * QCN9000 has this support
  2048. */
  2049. if (qdf_nbuf_is_rx_chfrag_cont(nbuf)) {
  2050. nbuf = dp_rx_sg_create(soc, nbuf);
  2051. next = nbuf->next;
  2052. /*
  2053. * SG error handling is not done correctly,
  2054. * drop SG frames for now.
  2055. */
  2056. qdf_nbuf_free(nbuf);
  2057. dp_info_rl("scattered msdu dropped");
  2058. nbuf = next;
  2059. if (peer)
  2060. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  2061. continue;
  2062. }
  2063. if (wbm_err_info.wbm_err_src == HAL_RX_WBM_ERR_SRC_REO) {
  2064. if (wbm_err_info.reo_psh_rsn
  2065. == HAL_RX_WBM_REO_PSH_RSN_ERROR) {
  2066. DP_STATS_INC(soc,
  2067. rx.err.reo_error
  2068. [wbm_err_info.reo_err_code], 1);
  2069. /* increment @pdev level */
  2070. pool_id = wbm_err_info.pool_id;
  2071. dp_pdev = dp_get_pdev_for_lmac_id(soc, pool_id);
  2072. if (dp_pdev)
  2073. DP_STATS_INC(dp_pdev, err.reo_error,
  2074. 1);
  2075. switch (wbm_err_info.reo_err_code) {
  2076. /*
  2077. * Handling for packets which have NULL REO
  2078. * queue descriptor
  2079. */
  2080. case HAL_REO_ERR_QUEUE_DESC_ADDR_0:
  2081. pool_id = wbm_err_info.pool_id;
  2082. dp_rx_null_q_desc_handle(soc, nbuf,
  2083. rx_tlv_hdr,
  2084. pool_id, peer);
  2085. break;
  2086. /* TODO */
  2087. /* Add per error code accounting */
  2088. case HAL_REO_ERR_REGULAR_FRAME_2K_JUMP:
  2089. pool_id = wbm_err_info.pool_id;
  2090. if (hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  2091. rx_tlv_hdr)) {
  2092. peer_id =
  2093. hal_rx_mpdu_start_sw_peer_id_get(soc->hal_soc,
  2094. rx_tlv_hdr);
  2095. tid =
  2096. hal_rx_mpdu_start_tid_get(hal_soc, rx_tlv_hdr);
  2097. }
  2098. QDF_NBUF_CB_RX_PKT_LEN(nbuf) =
  2099. hal_rx_msdu_start_msdu_len_get(
  2100. soc->hal_soc, rx_tlv_hdr);
  2101. nbuf->next = NULL;
  2102. dp_2k_jump_handle(soc, nbuf,
  2103. rx_tlv_hdr,
  2104. peer_id, tid);
  2105. break;
  2106. case HAL_REO_ERR_REGULAR_FRAME_OOR:
  2107. if (peer)
  2108. DP_STATS_INC(peer,
  2109. rx.err.oor_err, 1);
  2110. if (hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  2111. rx_tlv_hdr)) {
  2112. peer_id =
  2113. hal_rx_mpdu_start_sw_peer_id_get(soc->hal_soc,
  2114. rx_tlv_hdr);
  2115. tid =
  2116. hal_rx_mpdu_start_tid_get(hal_soc, rx_tlv_hdr);
  2117. }
  2118. QDF_NBUF_CB_RX_PKT_LEN(nbuf) =
  2119. hal_rx_msdu_start_msdu_len_get(
  2120. soc->hal_soc, rx_tlv_hdr);
  2121. nbuf->next = NULL;
  2122. dp_rx_oor_handle(soc, nbuf,
  2123. peer_id,
  2124. rx_tlv_hdr);
  2125. break;
  2126. case HAL_REO_ERR_BAR_FRAME_2K_JUMP:
  2127. case HAL_REO_ERR_BAR_FRAME_OOR:
  2128. if (peer)
  2129. dp_rx_err_handle_bar(soc,
  2130. peer,
  2131. nbuf);
  2132. qdf_nbuf_free(nbuf);
  2133. break;
  2134. case HAL_REO_ERR_PN_CHECK_FAILED:
  2135. case HAL_REO_ERR_PN_ERROR_HANDLING_FLAG_SET:
  2136. if (peer)
  2137. DP_STATS_INC(peer,
  2138. rx.err.pn_err, 1);
  2139. qdf_nbuf_free(nbuf);
  2140. break;
  2141. default:
  2142. dp_info_rl("Got pkt with REO ERROR: %d",
  2143. wbm_err_info.reo_err_code);
  2144. qdf_nbuf_free(nbuf);
  2145. }
  2146. } else if (wbm_err_info.reo_psh_rsn
  2147. == HAL_RX_WBM_REO_PSH_RSN_ROUTE) {
  2148. DP_STATS_INC(soc, rx.reo2rel_route_drop, 1);
  2149. qdf_nbuf_free(nbuf);
  2150. }
  2151. } else if (wbm_err_info.wbm_err_src ==
  2152. HAL_RX_WBM_ERR_SRC_RXDMA) {
  2153. if (wbm_err_info.rxdma_psh_rsn
  2154. == HAL_RX_WBM_RXDMA_PSH_RSN_ERROR) {
  2155. DP_STATS_INC(soc,
  2156. rx.err.rxdma_error
  2157. [wbm_err_info.rxdma_err_code], 1);
  2158. /* increment @pdev level */
  2159. pool_id = wbm_err_info.pool_id;
  2160. dp_pdev = dp_get_pdev_for_lmac_id(soc, pool_id);
  2161. if (dp_pdev)
  2162. DP_STATS_INC(dp_pdev,
  2163. err.rxdma_error, 1);
  2164. switch (wbm_err_info.rxdma_err_code) {
  2165. case HAL_RXDMA_ERR_UNENCRYPTED:
  2166. case HAL_RXDMA_ERR_WIFI_PARSE:
  2167. pool_id = wbm_err_info.pool_id;
  2168. dp_rx_process_rxdma_err(soc, nbuf,
  2169. rx_tlv_hdr,
  2170. peer,
  2171. wbm_err_info.
  2172. rxdma_err_code,
  2173. pool_id);
  2174. break;
  2175. case HAL_RXDMA_ERR_TKIP_MIC:
  2176. dp_rx_process_mic_error(soc, nbuf,
  2177. rx_tlv_hdr,
  2178. peer);
  2179. if (peer)
  2180. DP_STATS_INC(peer, rx.err.mic_err, 1);
  2181. break;
  2182. case HAL_RXDMA_ERR_DECRYPT:
  2183. if (peer) {
  2184. DP_STATS_INC(peer, rx.err.
  2185. decrypt_err, 1);
  2186. qdf_nbuf_free(nbuf);
  2187. break;
  2188. }
  2189. if (!dp_handle_rxdma_decrypt_err()) {
  2190. qdf_nbuf_free(nbuf);
  2191. break;
  2192. }
  2193. pool_id = wbm_err_info.pool_id;
  2194. err_code = wbm_err_info.rxdma_err_code;
  2195. tlv_hdr = rx_tlv_hdr;
  2196. dp_rx_process_rxdma_err(soc, nbuf,
  2197. tlv_hdr, NULL,
  2198. err_code,
  2199. pool_id);
  2200. break;
  2201. default:
  2202. qdf_nbuf_free(nbuf);
  2203. dp_err_rl("RXDMA error %d",
  2204. wbm_err_info.rxdma_err_code);
  2205. }
  2206. } else if (wbm_err_info.rxdma_psh_rsn
  2207. == HAL_RX_WBM_RXDMA_PSH_RSN_ROUTE) {
  2208. DP_STATS_INC(soc, rx.rxdma2rel_route_drop, 1);
  2209. qdf_nbuf_free(nbuf);
  2210. }
  2211. } else {
  2212. /* Should not come here */
  2213. qdf_assert(0);
  2214. }
  2215. if (peer)
  2216. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  2217. nbuf = next;
  2218. }
  2219. return rx_bufs_used; /* Assume no scale factor for now */
  2220. }
  2221. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  2222. /**
  2223. * dup_desc_dbg() - dump and assert if duplicate rx desc found
  2224. *
  2225. * @soc: core DP main context
  2226. * @rxdma_dst_ring_desc: void pointer to monitor link descriptor buf addr info
  2227. * @rx_desc: void pointer to rx descriptor
  2228. *
  2229. * Return: void
  2230. */
  2231. static void dup_desc_dbg(struct dp_soc *soc,
  2232. hal_rxdma_desc_t rxdma_dst_ring_desc,
  2233. void *rx_desc)
  2234. {
  2235. DP_STATS_INC(soc, rx.err.hal_rxdma_err_dup, 1);
  2236. dp_rx_dump_info_and_assert(
  2237. soc,
  2238. soc->rx_rel_ring.hal_srng,
  2239. hal_rxdma_desc_to_hal_ring_desc(rxdma_dst_ring_desc),
  2240. rx_desc);
  2241. }
  2242. /**
  2243. * dp_rx_err_mpdu_pop() - extract the MSDU's from link descs
  2244. *
  2245. * @soc: core DP main context
  2246. * @mac_id: mac id which is one of 3 mac_ids
  2247. * @rxdma_dst_ring_desc: void pointer to monitor link descriptor buf addr info
  2248. * @head: head of descs list to be freed
  2249. * @tail: tail of decs list to be freed
  2250. * Return: number of msdu in MPDU to be popped
  2251. */
  2252. static inline uint32_t
  2253. dp_rx_err_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
  2254. hal_rxdma_desc_t rxdma_dst_ring_desc,
  2255. union dp_rx_desc_list_elem_t **head,
  2256. union dp_rx_desc_list_elem_t **tail)
  2257. {
  2258. void *rx_msdu_link_desc;
  2259. qdf_nbuf_t msdu;
  2260. qdf_nbuf_t last;
  2261. struct hal_rx_msdu_list msdu_list;
  2262. uint16_t num_msdus;
  2263. struct hal_buf_info buf_info;
  2264. uint32_t rx_bufs_used = 0;
  2265. uint32_t msdu_cnt;
  2266. uint32_t i;
  2267. uint8_t push_reason;
  2268. uint8_t rxdma_error_code = 0;
  2269. uint8_t bm_action = HAL_BM_ACTION_PUT_IN_IDLE_LIST;
  2270. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  2271. uint32_t rx_link_buf_info[HAL_RX_BUFFINFO_NUM_DWORDS];
  2272. hal_rxdma_desc_t ring_desc;
  2273. struct rx_desc_pool *rx_desc_pool;
  2274. if (!pdev) {
  2275. dp_rx_err_debug("%pK: pdev is null for mac_id = %d",
  2276. soc, mac_id);
  2277. return rx_bufs_used;
  2278. }
  2279. msdu = 0;
  2280. last = NULL;
  2281. hal_rx_reo_ent_buf_paddr_get(soc->hal_soc, rxdma_dst_ring_desc,
  2282. &buf_info, &msdu_cnt);
  2283. push_reason =
  2284. hal_rx_reo_ent_rxdma_push_reason_get(rxdma_dst_ring_desc);
  2285. if (push_reason == HAL_RX_WBM_RXDMA_PSH_RSN_ERROR) {
  2286. rxdma_error_code =
  2287. hal_rx_reo_ent_rxdma_error_code_get(rxdma_dst_ring_desc);
  2288. }
  2289. do {
  2290. rx_msdu_link_desc =
  2291. dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  2292. qdf_assert_always(rx_msdu_link_desc);
  2293. hal_rx_msdu_list_get(soc->hal_soc, rx_msdu_link_desc,
  2294. &msdu_list, &num_msdus);
  2295. if (msdu_list.sw_cookie[0] != HAL_RX_COOKIE_SPECIAL) {
  2296. /* if the msdus belongs to NSS offloaded radio &&
  2297. * the rbm is not SW1_BM then return the msdu_link
  2298. * descriptor without freeing the msdus (nbufs). let
  2299. * these buffers be given to NSS completion ring for
  2300. * NSS to free them.
  2301. * else iterate through the msdu link desc list and
  2302. * free each msdu in the list.
  2303. */
  2304. if (msdu_list.rbm[0] !=
  2305. HAL_RX_BUF_RBM_SW3_BM(soc->wbm_sw0_bm_id) &&
  2306. wlan_cfg_get_dp_pdev_nss_enabled(
  2307. pdev->wlan_cfg_ctx))
  2308. bm_action = HAL_BM_ACTION_RELEASE_MSDU_LIST;
  2309. else {
  2310. for (i = 0; i < num_msdus; i++) {
  2311. struct dp_rx_desc *rx_desc =
  2312. dp_rx_cookie_2_va_rxdma_buf(soc,
  2313. msdu_list.sw_cookie[i]);
  2314. qdf_assert_always(rx_desc);
  2315. msdu = rx_desc->nbuf;
  2316. /*
  2317. * this is a unlikely scenario
  2318. * where the host is reaping
  2319. * a descriptor which
  2320. * it already reaped just a while ago
  2321. * but is yet to replenish
  2322. * it back to HW.
  2323. * In this case host will dump
  2324. * the last 128 descriptors
  2325. * including the software descriptor
  2326. * rx_desc and assert.
  2327. */
  2328. ring_desc = rxdma_dst_ring_desc;
  2329. if (qdf_unlikely(!rx_desc->in_use)) {
  2330. dup_desc_dbg(soc,
  2331. ring_desc,
  2332. rx_desc);
  2333. continue;
  2334. }
  2335. rx_desc_pool = &soc->
  2336. rx_desc_buf[rx_desc->pool_id];
  2337. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  2338. dp_ipa_handle_rx_buf_smmu_mapping(
  2339. soc, msdu,
  2340. rx_desc_pool->buf_size,
  2341. false);
  2342. qdf_nbuf_unmap_nbytes_single(
  2343. soc->osdev, msdu,
  2344. QDF_DMA_FROM_DEVICE,
  2345. rx_desc_pool->buf_size);
  2346. rx_desc->unmapped = 1;
  2347. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  2348. dp_rx_err_debug("%pK: msdu_nbuf=%pK ",
  2349. soc, msdu);
  2350. dp_rx_buffer_pool_nbuf_free(soc, msdu,
  2351. rx_desc->pool_id);
  2352. rx_bufs_used++;
  2353. dp_rx_add_to_free_desc_list(head,
  2354. tail, rx_desc);
  2355. }
  2356. }
  2357. } else {
  2358. rxdma_error_code = HAL_RXDMA_ERR_WAR;
  2359. }
  2360. /*
  2361. * Store the current link buffer into to the local structure
  2362. * to be used for release purpose.
  2363. */
  2364. hal_rxdma_buff_addr_info_set(soc->hal_soc, rx_link_buf_info,
  2365. buf_info.paddr, buf_info.sw_cookie,
  2366. buf_info.rbm);
  2367. hal_rx_mon_next_link_desc_get(soc->hal_soc, rx_msdu_link_desc,
  2368. &buf_info);
  2369. dp_rx_link_desc_return_by_addr(soc,
  2370. (hal_buff_addrinfo_t)
  2371. rx_link_buf_info,
  2372. bm_action);
  2373. } while (buf_info.paddr);
  2374. DP_STATS_INC(soc, rx.err.rxdma_error[rxdma_error_code], 1);
  2375. if (pdev)
  2376. DP_STATS_INC(pdev, err.rxdma_error, 1);
  2377. if (rxdma_error_code == HAL_RXDMA_ERR_DECRYPT) {
  2378. dp_rx_err_err("%pK: Packet received with Decrypt error", soc);
  2379. }
  2380. return rx_bufs_used;
  2381. }
  2382. uint32_t
  2383. dp_rxdma_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  2384. uint32_t mac_id, uint32_t quota)
  2385. {
  2386. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  2387. hal_rxdma_desc_t rxdma_dst_ring_desc;
  2388. hal_soc_handle_t hal_soc;
  2389. void *err_dst_srng;
  2390. union dp_rx_desc_list_elem_t *head = NULL;
  2391. union dp_rx_desc_list_elem_t *tail = NULL;
  2392. struct dp_srng *dp_rxdma_srng;
  2393. struct rx_desc_pool *rx_desc_pool;
  2394. uint32_t work_done = 0;
  2395. uint32_t rx_bufs_used = 0;
  2396. if (!pdev)
  2397. return 0;
  2398. err_dst_srng = soc->rxdma_err_dst_ring[mac_id].hal_srng;
  2399. if (!err_dst_srng) {
  2400. dp_rx_err_err("%pK: HAL Monitor Destination Ring Init Failed -- %pK",
  2401. soc, err_dst_srng);
  2402. return 0;
  2403. }
  2404. hal_soc = soc->hal_soc;
  2405. qdf_assert(hal_soc);
  2406. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, err_dst_srng))) {
  2407. dp_rx_err_err("%pK: HAL Monitor Destination Ring Init Failed -- %pK",
  2408. soc, err_dst_srng);
  2409. return 0;
  2410. }
  2411. while (qdf_likely(quota-- && (rxdma_dst_ring_desc =
  2412. hal_srng_dst_get_next(hal_soc, err_dst_srng)))) {
  2413. rx_bufs_used += dp_rx_err_mpdu_pop(soc, mac_id,
  2414. rxdma_dst_ring_desc,
  2415. &head, &tail);
  2416. }
  2417. dp_srng_access_end(int_ctx, soc, err_dst_srng);
  2418. if (rx_bufs_used) {
  2419. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  2420. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_id];
  2421. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  2422. } else {
  2423. dp_rxdma_srng = &soc->rx_refill_buf_ring[pdev->lmac_id];
  2424. rx_desc_pool = &soc->rx_desc_buf[pdev->lmac_id];
  2425. }
  2426. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  2427. rx_desc_pool, rx_bufs_used, &head, &tail);
  2428. work_done += rx_bufs_used;
  2429. }
  2430. return work_done;
  2431. }
  2432. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  2433. static inline uint32_t
  2434. dp_wbm_int_err_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
  2435. hal_rxdma_desc_t rxdma_dst_ring_desc,
  2436. union dp_rx_desc_list_elem_t **head,
  2437. union dp_rx_desc_list_elem_t **tail)
  2438. {
  2439. void *rx_msdu_link_desc;
  2440. qdf_nbuf_t msdu;
  2441. qdf_nbuf_t last;
  2442. struct hal_rx_msdu_list msdu_list;
  2443. uint16_t num_msdus;
  2444. struct hal_buf_info buf_info;
  2445. uint32_t rx_bufs_used = 0, msdu_cnt, i;
  2446. uint32_t rx_link_buf_info[HAL_RX_BUFFINFO_NUM_DWORDS];
  2447. struct rx_desc_pool *rx_desc_pool;
  2448. msdu = 0;
  2449. last = NULL;
  2450. hal_rx_reo_ent_buf_paddr_get(soc->hal_soc, rxdma_dst_ring_desc,
  2451. &buf_info, &msdu_cnt);
  2452. do {
  2453. rx_msdu_link_desc =
  2454. dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  2455. if (!rx_msdu_link_desc) {
  2456. DP_STATS_INC(soc, tx.wbm_internal_error[WBM_INT_ERROR_REO_NULL_LINK_DESC], 1);
  2457. break;
  2458. }
  2459. hal_rx_msdu_list_get(soc->hal_soc, rx_msdu_link_desc,
  2460. &msdu_list, &num_msdus);
  2461. if (msdu_list.sw_cookie[0] != HAL_RX_COOKIE_SPECIAL) {
  2462. for (i = 0; i < num_msdus; i++) {
  2463. struct dp_rx_desc *rx_desc =
  2464. dp_rx_cookie_2_va_rxdma_buf(
  2465. soc,
  2466. msdu_list.sw_cookie[i]);
  2467. qdf_assert_always(rx_desc);
  2468. rx_desc_pool =
  2469. &soc->rx_desc_buf[rx_desc->pool_id];
  2470. msdu = rx_desc->nbuf;
  2471. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  2472. dp_ipa_handle_rx_buf_smmu_mapping(
  2473. soc, msdu,
  2474. rx_desc_pool->buf_size,
  2475. false);
  2476. qdf_nbuf_unmap_nbytes_single(
  2477. soc->osdev,
  2478. msdu,
  2479. QDF_DMA_FROM_DEVICE,
  2480. rx_desc_pool->buf_size);
  2481. rx_desc->unmapped = 1;
  2482. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  2483. dp_rx_buffer_pool_nbuf_free(soc, msdu,
  2484. rx_desc->pool_id);
  2485. rx_bufs_used++;
  2486. dp_rx_add_to_free_desc_list(head,
  2487. tail, rx_desc);
  2488. }
  2489. }
  2490. /*
  2491. * Store the current link buffer into to the local structure
  2492. * to be used for release purpose.
  2493. */
  2494. hal_rxdma_buff_addr_info_set(soc->hal_soc, rx_link_buf_info,
  2495. buf_info.paddr, buf_info.sw_cookie,
  2496. buf_info.rbm);
  2497. hal_rx_mon_next_link_desc_get(soc->hal_soc, rx_msdu_link_desc,
  2498. &buf_info);
  2499. dp_rx_link_desc_return_by_addr(soc, (hal_buff_addrinfo_t)
  2500. rx_link_buf_info,
  2501. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  2502. } while (buf_info.paddr);
  2503. return rx_bufs_used;
  2504. }
  2505. /*
  2506. *
  2507. * dp_handle_wbm_internal_error() - handles wbm_internal_error case
  2508. *
  2509. * @soc: core DP main context
  2510. * @hal_desc: hal descriptor
  2511. * @buf_type: indicates if the buffer is of type link disc or msdu
  2512. * Return: None
  2513. *
  2514. * wbm_internal_error is seen in following scenarios :
  2515. *
  2516. * 1. Null pointers detected in WBM_RELEASE_RING descriptors
  2517. * 2. Null pointers detected during delinking process
  2518. *
  2519. * Some null pointer cases:
  2520. *
  2521. * a. MSDU buffer pointer is NULL
  2522. * b. Next_MSDU_Link_Desc pointer is NULL, with no last msdu flag
  2523. * c. MSDU buffer pointer is NULL or Next_Link_Desc pointer is NULL
  2524. */
  2525. void
  2526. dp_handle_wbm_internal_error(struct dp_soc *soc, void *hal_desc,
  2527. uint32_t buf_type)
  2528. {
  2529. struct hal_buf_info buf_info = {0};
  2530. struct dp_rx_desc *rx_desc = NULL;
  2531. struct rx_desc_pool *rx_desc_pool;
  2532. uint32_t rx_bufs_reaped = 0;
  2533. union dp_rx_desc_list_elem_t *head = NULL;
  2534. union dp_rx_desc_list_elem_t *tail = NULL;
  2535. uint8_t pool_id;
  2536. hal_rx_reo_buf_paddr_get(soc->hal_soc, hal_desc, &buf_info);
  2537. if (!buf_info.paddr) {
  2538. DP_STATS_INC(soc, tx.wbm_internal_error[WBM_INT_ERROR_REO_NULL_BUFFER], 1);
  2539. return;
  2540. }
  2541. /* buffer_addr_info is the first element of ring_desc */
  2542. hal_rx_buf_cookie_rbm_get(soc->hal_soc, (uint32_t *)hal_desc,
  2543. &buf_info);
  2544. pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(buf_info.sw_cookie);
  2545. if (buf_type == HAL_WBM_RELEASE_RING_2_BUFFER_TYPE) {
  2546. DP_STATS_INC(soc, tx.wbm_internal_error[WBM_INT_ERROR_REO_NULL_MSDU_BUFF], 1);
  2547. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, buf_info.sw_cookie);
  2548. if (rx_desc && rx_desc->nbuf) {
  2549. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  2550. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  2551. dp_ipa_handle_rx_buf_smmu_mapping(
  2552. soc, rx_desc->nbuf,
  2553. rx_desc_pool->buf_size,
  2554. false);
  2555. qdf_nbuf_unmap_nbytes_single(soc->osdev, rx_desc->nbuf,
  2556. QDF_DMA_FROM_DEVICE,
  2557. rx_desc_pool->buf_size);
  2558. rx_desc->unmapped = 1;
  2559. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  2560. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf,
  2561. rx_desc->pool_id);
  2562. dp_rx_add_to_free_desc_list(&head,
  2563. &tail,
  2564. rx_desc);
  2565. rx_bufs_reaped++;
  2566. }
  2567. } else if (buf_type == HAL_WBM_RELEASE_RING_2_DESC_TYPE) {
  2568. rx_bufs_reaped = dp_wbm_int_err_mpdu_pop(soc, pool_id,
  2569. hal_desc,
  2570. &head, &tail);
  2571. }
  2572. if (rx_bufs_reaped) {
  2573. struct rx_desc_pool *rx_desc_pool;
  2574. struct dp_srng *dp_rxdma_srng;
  2575. DP_STATS_INC(soc, tx.wbm_internal_error[WBM_INT_ERROR_REO_BUFF_REAPED], 1);
  2576. dp_rxdma_srng = &soc->rx_refill_buf_ring[pool_id];
  2577. rx_desc_pool = &soc->rx_desc_buf[pool_id];
  2578. dp_rx_buffers_replenish(soc, pool_id, dp_rxdma_srng,
  2579. rx_desc_pool,
  2580. rx_bufs_reaped,
  2581. &head, &tail);
  2582. }
  2583. }
  2584. #endif /* QCA_HOST_MODE_WIFI_DISABLED */