hif_main.c 19 KB

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  1. /*
  2. * Copyright (c) 2015-2016 The Linux Foundation. All rights reserved.
  3. *
  4. * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
  5. *
  6. *
  7. * Permission to use, copy, modify, and/or distribute this software for
  8. * any purpose with or without fee is hereby granted, provided that the
  9. * above copyright notice and this permission notice appear in all
  10. * copies.
  11. *
  12. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  13. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  14. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  15. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  16. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  17. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  18. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  19. * PERFORMANCE OF THIS SOFTWARE.
  20. */
  21. /*
  22. * This file was originally distributed by Qualcomm Atheros, Inc.
  23. * under proprietary terms before Copyright ownership was assigned
  24. * to the Linux Foundation.
  25. */
  26. #include <osdep.h>
  27. #include "a_types.h"
  28. #include "athdefs.h"
  29. #include "osapi_linux.h"
  30. #include "targcfg.h"
  31. #include "cdf_lock.h"
  32. #include "cdf_status.h"
  33. #include <cdf_atomic.h> /* cdf_atomic_read */
  34. #include <targaddrs.h>
  35. #include <bmi_msg.h>
  36. #include "hif_io32.h"
  37. #include <hif.h>
  38. #include <htc_services.h>
  39. #include "regtable.h"
  40. #define ATH_MODULE_NAME hif
  41. #include <a_debug.h>
  42. #include "hif_main.h"
  43. #include "hif_hw_version.h"
  44. #include "ce_api.h"
  45. #include "ce_tasklet.h"
  46. #include "cdf_trace.h"
  47. #include "cdf_status.h"
  48. #include "cds_api.h"
  49. #ifdef CONFIG_CNSS
  50. #include <net/cnss.h>
  51. #endif
  52. #include "epping_main.h"
  53. #include "hif_debug.h"
  54. #include "mp_dev.h"
  55. #ifdef HIF_PCI
  56. #include "icnss_stub.h"
  57. #else
  58. #include <soc/qcom/icnss.h>
  59. #endif
  60. #include "cds_concurrency.h"
  61. #define AGC_DUMP 1
  62. #define CHANINFO_DUMP 2
  63. #define BB_WATCHDOG_DUMP 3
  64. #ifdef CONFIG_ATH_PCIE_ACCESS_DEBUG
  65. #define PCIE_ACCESS_DUMP 4
  66. #endif
  67. void hif_dump(struct ol_softc *scn, uint8_t cmd_id, bool start)
  68. {
  69. switch (cmd_id) {
  70. case AGC_DUMP:
  71. if (start)
  72. priv_start_agc(scn);
  73. else
  74. priv_dump_agc(scn);
  75. break;
  76. case CHANINFO_DUMP:
  77. if (start)
  78. priv_start_cap_chaninfo(scn);
  79. else
  80. priv_dump_chaninfo(scn);
  81. break;
  82. case BB_WATCHDOG_DUMP:
  83. priv_dump_bbwatchdog(scn);
  84. break;
  85. #ifdef CONFIG_ATH_PCIE_ACCESS_DEBUG
  86. case PCIE_ACCESS_DUMP:
  87. hif_target_dump_access_log();
  88. break;
  89. #endif
  90. default:
  91. HIF_ERROR("%s: Invalid htc dump command", __func__);
  92. break;
  93. }
  94. }
  95. /**
  96. * hif_shut_down_device() - hif_shut_down_device
  97. *
  98. * SThis fucntion shuts down the device
  99. *
  100. * @scn: ol_softc
  101. *
  102. * Return: void
  103. */
  104. void hif_shut_down_device(struct ol_softc *scn)
  105. {
  106. if (scn && scn->hif_hdl) {
  107. struct HIF_CE_state *hif_state =
  108. (struct HIF_CE_state *)scn->hif_hdl;
  109. hif_stop(scn);
  110. cdf_mem_free(hif_state);
  111. scn->hif_hdl = NULL;
  112. }
  113. }
  114. /**
  115. * hif_cancel_deferred_target_sleep() - cancel deferred target sleep
  116. *
  117. * This function cancels the defered target sleep
  118. *
  119. * @scn: ol_softc
  120. *
  121. * Return: void
  122. */
  123. void hif_cancel_deferred_target_sleep(struct ol_softc *scn)
  124. {
  125. hif_pci_cancel_deferred_target_sleep(scn);
  126. }
  127. /**
  128. * hif_get_target_id(): hif_get_target_id
  129. *
  130. * Return the virtual memory base address to the caller
  131. *
  132. * @scn: ol_softc
  133. *
  134. * Return: A_target_id_t
  135. */
  136. A_target_id_t hif_get_target_id(struct ol_softc *scn)
  137. {
  138. return scn->mem;
  139. }
  140. /**
  141. * hif_set_target_sleep(): hif_set_target_sleep
  142. * @scn: scn
  143. * @sleep_ok: sleep_ok
  144. * @wait_for_it: wait
  145. *
  146. * Return: void
  147. */
  148. void hif_set_target_sleep(struct ol_softc *scn,
  149. bool sleep_ok, bool wait_for_it)
  150. {
  151. hif_target_sleep_state_adjust(scn,
  152. sleep_ok, wait_for_it);
  153. }
  154. /**
  155. * hif_target_forced_awake(): hif_target_forced_awake
  156. * @scn: scn
  157. *
  158. * Return: bool
  159. */
  160. bool hif_target_forced_awake(struct ol_softc *scn)
  161. {
  162. A_target_id_t addr = scn->mem;
  163. bool awake;
  164. bool forced_awake;
  165. awake = hif_targ_is_awake(scn, addr);
  166. forced_awake =
  167. !!(hif_read32_mb
  168. (addr + PCIE_LOCAL_BASE_ADDRESS +
  169. PCIE_SOC_WAKE_ADDRESS) & PCIE_SOC_WAKE_V_MASK);
  170. return awake && forced_awake;
  171. }
  172. static inline void hif_fw_event_handler(struct HIF_CE_state *hif_state)
  173. {
  174. struct hif_msg_callbacks *msg_callbacks =
  175. &hif_state->msg_callbacks_current;
  176. if (!msg_callbacks->fwEventHandler)
  177. return;
  178. msg_callbacks->fwEventHandler(msg_callbacks->Context,
  179. CDF_STATUS_E_FAILURE);
  180. }
  181. /**
  182. * hif_fw_interrupt_handler(): FW interrupt handler
  183. *
  184. * This function is the FW interrupt handlder
  185. *
  186. * @irq: irq number
  187. * @arg: the user pointer
  188. *
  189. * Return: bool
  190. */
  191. #ifndef QCA_WIFI_3_0
  192. irqreturn_t hif_fw_interrupt_handler(int irq, void *arg)
  193. {
  194. struct ol_softc *scn = arg;
  195. struct HIF_CE_state *hif_state = (struct HIF_CE_state *)scn->hif_hdl;
  196. uint32_t fw_indicator_address, fw_indicator;
  197. A_TARGET_ACCESS_BEGIN_RET(scn);
  198. fw_indicator_address = hif_state->fw_indicator_address;
  199. /* For sudden unplug this will return ~0 */
  200. fw_indicator = A_TARGET_READ(scn, fw_indicator_address);
  201. if ((fw_indicator != ~0) && (fw_indicator & FW_IND_EVENT_PENDING)) {
  202. /* ACK: clear Target-side pending event */
  203. A_TARGET_WRITE(scn, fw_indicator_address,
  204. fw_indicator & ~FW_IND_EVENT_PENDING);
  205. A_TARGET_ACCESS_END_RET(scn);
  206. if (hif_state->started) {
  207. hif_fw_event_handler(hif_state);
  208. } else {
  209. /*
  210. * Probable Target failure before we're prepared
  211. * to handle it. Generally unexpected.
  212. */
  213. AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
  214. ("%s: Early firmware event indicated\n",
  215. __func__));
  216. }
  217. } else {
  218. A_TARGET_ACCESS_END_RET(scn);
  219. }
  220. return ATH_ISR_SCHED;
  221. }
  222. #else
  223. irqreturn_t hif_fw_interrupt_handler(int irq, void *arg)
  224. {
  225. return ATH_ISR_SCHED;
  226. }
  227. #endif /* #ifdef QCA_WIFI_3_0 */
  228. /**
  229. * hif_get_targetdef(): hif_get_targetdef
  230. * @scn: scn
  231. *
  232. * Return: void *
  233. */
  234. void *hif_get_targetdef(struct ol_softc *scn)
  235. {
  236. return scn->targetdef;
  237. }
  238. /**
  239. * hif_vote_link_down(): unvote for link up
  240. *
  241. * Call hif_vote_link_down to release a previous request made using
  242. * hif_vote_link_up. A hif_vote_link_down call should only be made
  243. * after a corresponding hif_vote_link_up, otherwise you could be
  244. * negating a vote from another source. When no votes are present
  245. * hif will not guarantee the linkstate after hif_bus_suspend.
  246. *
  247. * SYNCHRONIZE WITH hif_vote_link_up by only calling in MC thread
  248. * and initialization deinitialization sequencences.
  249. *
  250. * Return: n/a
  251. */
  252. void hif_vote_link_down(void *hif_ctx)
  253. {
  254. struct ol_softc *scn = hif_ctx;
  255. CDF_BUG(scn);
  256. scn->linkstate_vote--;
  257. if (scn->linkstate_vote == 0)
  258. hif_bus_prevent_linkdown(scn, false);
  259. }
  260. /**
  261. * hif_vote_link_up(): vote to prevent bus from suspending
  262. *
  263. * Makes hif guarantee that fw can message the host normally
  264. * durring suspend.
  265. *
  266. * SYNCHRONIZE WITH hif_vote_link_up by only calling in MC thread
  267. * and initialization deinitialization sequencences.
  268. *
  269. * Return: n/a
  270. */
  271. void hif_vote_link_up(void *hif_ctx)
  272. {
  273. struct ol_softc *scn = hif_ctx;
  274. CDF_BUG(scn);
  275. scn->linkstate_vote++;
  276. if (scn->linkstate_vote == 1)
  277. hif_bus_prevent_linkdown(scn, true);
  278. }
  279. /**
  280. * hif_can_suspend_link(): query if hif is permitted to suspend the link
  281. *
  282. * Hif will ensure that the link won't be suspended if the upperlayers
  283. * don't want it to.
  284. *
  285. * SYNCHRONIZATION: MC thread is stopped before bus suspend thus
  286. * we don't need extra locking to ensure votes dont change while
  287. * we are in the process of suspending or resuming.
  288. *
  289. * Return: false if hif will guarantee link up durring suspend.
  290. */
  291. bool hif_can_suspend_link(void *hif_ctx)
  292. {
  293. struct ol_softc *scn = hif_ctx;
  294. CDF_BUG(scn);
  295. return scn->linkstate_vote == 0;
  296. }
  297. /**
  298. * hif_hia_item_address(): hif_hia_item_address
  299. * @target_type: target_type
  300. * @item_offset: item_offset
  301. *
  302. * Return: n/a
  303. */
  304. uint32_t hif_hia_item_address(uint32_t target_type, uint32_t item_offset)
  305. {
  306. switch (target_type) {
  307. case TARGET_TYPE_AR6002:
  308. return AR6002_HOST_INTEREST_ADDRESS + item_offset;
  309. case TARGET_TYPE_AR6003:
  310. return AR6003_HOST_INTEREST_ADDRESS + item_offset;
  311. case TARGET_TYPE_AR6004:
  312. return AR6004_HOST_INTEREST_ADDRESS + item_offset;
  313. case TARGET_TYPE_AR6006:
  314. return AR6006_HOST_INTEREST_ADDRESS + item_offset;
  315. case TARGET_TYPE_AR9888:
  316. return AR9888_HOST_INTEREST_ADDRESS + item_offset;
  317. case TARGET_TYPE_AR6320:
  318. case TARGET_TYPE_AR6320V2:
  319. return AR6320_HOST_INTEREST_ADDRESS + item_offset;
  320. case TARGET_TYPE_QCA6180:
  321. return QCA6180_HOST_INTEREST_ADDRESS + item_offset;
  322. case TARGET_TYPE_ADRASTEA:
  323. /* ADRASTEA doesn't have a host interest address */
  324. ASSERT(0);
  325. return 0;
  326. default:
  327. ASSERT(0);
  328. return 0;
  329. }
  330. }
  331. /**
  332. * hif_max_num_receives_reached() - check max receive is reached
  333. * @count: unsigned int.
  334. *
  335. * Output check status as bool
  336. *
  337. * Return: bool
  338. */
  339. bool hif_max_num_receives_reached(unsigned int count)
  340. {
  341. if (WLAN_IS_EPPING_ENABLED(cds_get_conparam()))
  342. return count > 120;
  343. else
  344. return count > MAX_NUM_OF_RECEIVES;
  345. }
  346. /**
  347. * init_buffer_count() - initial buffer count
  348. * @maxSize: cdf_size_t
  349. *
  350. * routine to modify the initial buffer count to be allocated on an os
  351. * platform basis. Platform owner will need to modify this as needed
  352. *
  353. * Return: cdf_size_t
  354. */
  355. cdf_size_t init_buffer_count(cdf_size_t maxSize)
  356. {
  357. return maxSize;
  358. }
  359. /**
  360. * hif_init_cdf_ctx(): hif_init_cdf_ctx
  361. * @hif_ctx: hif_ctx
  362. *
  363. * Return: int
  364. */
  365. int hif_init_cdf_ctx(void *hif_ctx)
  366. {
  367. struct ol_softc *scn = (struct ol_softc *)hif_ctx;
  368. cdf_device_t cdf_ctx = scn->cdf_dev;
  369. cdf_ctx->drv = &scn->aps_osdev;
  370. cdf_ctx->drv_hdl = scn->aps_osdev.bdev;
  371. cdf_ctx->dev = scn->aps_osdev.device;
  372. return 0;
  373. }
  374. /**
  375. * hif_deinit_cdf_ctx(): hif_deinit_cdf_ctx
  376. * @hif_ctx: hif_ctx
  377. *
  378. * Return: void
  379. */
  380. void hif_deinit_cdf_ctx(void *hif_ctx)
  381. {
  382. struct ol_softc *scn = (struct ol_softc *)hif_ctx;
  383. if (scn == NULL || !scn->cdf_dev)
  384. return;
  385. scn->cdf_dev = NULL;
  386. }
  387. /**
  388. * hif_save_htc_htt_config_endpoint():
  389. * hif_save_htc_htt_config_endpoint
  390. * @htc_endpoint: htc_endpoint
  391. *
  392. * Return: void
  393. */
  394. void hif_save_htc_htt_config_endpoint(void *hif_ctx, int htc_endpoint)
  395. {
  396. struct ol_softc *scn = hif_ctx;
  397. if (!scn) {
  398. HIF_ERROR("%s: error: scn or scn->hif_sc is NULL!",
  399. __func__);
  400. return;
  401. }
  402. scn->htc_endpoint = htc_endpoint;
  403. }
  404. /**
  405. * hif_get_hw_name(): get a human readable name for the hardware
  406. * @info: Target Info
  407. *
  408. * Return: human readable name for the underlying wifi hardware.
  409. */
  410. static const char *hif_get_hw_name(struct hif_target_info *info)
  411. {
  412. int i;
  413. for (i = 0; i < ARRAY_SIZE(qwlan_hw_list); i++) {
  414. if (info->target_version == qwlan_hw_list[i].id &&
  415. info->target_revision == qwlan_hw_list[i].subid) {
  416. return qwlan_hw_list[i].name;
  417. }
  418. }
  419. return "Unknown Device";
  420. }
  421. /**
  422. * hif_get_hw_info(): hif_get_hw_info
  423. * @scn: scn
  424. * @version: version
  425. * @revision: revision
  426. *
  427. * Return: n/a
  428. */
  429. void hif_get_hw_info(struct ol_softc *scn, u32 *version, u32 *revision,
  430. const char **target_name)
  431. {
  432. struct hif_target_info *info = hif_get_target_info_handle(scn);
  433. *version = info->target_version;
  434. *revision = info->target_revision;
  435. *target_name = hif_get_hw_name(info);
  436. }
  437. /**
  438. * hif_open(): hif_open
  439. *
  440. * Return: scn
  441. */
  442. CDF_STATUS hif_open(cdf_device_t cdf_ctx, enum ath_hal_bus_type bus_type)
  443. {
  444. struct ol_softc *scn;
  445. v_CONTEXT_t cds_context;
  446. CDF_STATUS status = CDF_STATUS_SUCCESS;
  447. struct hif_config_info *cfg;
  448. cds_context = cds_get_global_context();
  449. status = cds_alloc_context(cds_context, CDF_MODULE_ID_HIF,
  450. (void **)&scn, sizeof(*scn));
  451. if (status != CDF_STATUS_SUCCESS) {
  452. HIF_ERROR("%s: cannot alloc ol_sc", __func__);
  453. return status;
  454. }
  455. cdf_mem_zero(scn, sizeof(*scn));
  456. scn->cdf_dev = cdf_ctx;
  457. cfg = hif_get_ini_handle(scn);
  458. cfg->max_no_of_peers = 1;
  459. cdf_atomic_init(&scn->wow_done);
  460. cdf_atomic_init(&scn->active_tasklet_cnt);
  461. cdf_atomic_init(&scn->link_suspended);
  462. cdf_atomic_init(&scn->tasklet_from_intr);
  463. init_waitqueue_head(&scn->aps_osdev.event_queue);
  464. scn->linkstate_vote = 0;
  465. status = hif_bus_open(scn, bus_type);
  466. if (status != CDF_STATUS_SUCCESS) {
  467. HIF_ERROR("%s: hif_bus_open error = %d, bus_type = %d",
  468. __func__, status, bus_type);
  469. cds_free_context(cds_context, CDF_MODULE_ID_HIF, scn);
  470. }
  471. return status;
  472. }
  473. /**
  474. * hif_close(): hif_close
  475. * @hif_ctx: hif_ctx
  476. *
  477. * Return: n/a
  478. */
  479. void hif_close(void *hif_ctx)
  480. {
  481. struct ol_softc *scn = hif_ctx;
  482. if (scn == NULL) {
  483. HIF_ERROR("%s: ol_softc is NULL", __func__);
  484. return;
  485. }
  486. if (scn->athdiag_procfs_inited) {
  487. athdiag_procfs_remove();
  488. scn->athdiag_procfs_inited = false;
  489. }
  490. if (scn->hif_hdl) {
  491. cdf_mem_free(scn->hif_hdl);
  492. scn->hif_hdl = NULL;
  493. }
  494. hif_bus_close(scn);
  495. cds_free_context(cds_get_global_context(),
  496. CDF_MODULE_ID_HIF, hif_ctx);
  497. }
  498. /**
  499. * hif_enable(): hif_enable
  500. * @hif_ctx: hif_ctx
  501. * @dev: dev
  502. * @bdev: bus dev
  503. * @bid: bus ID
  504. * @bus_type: bus type
  505. * @type: enable type
  506. *
  507. * Return: CDF_STATUS
  508. */
  509. CDF_STATUS hif_enable(void *hif_ctx, struct device *dev,
  510. void *bdev, const hif_bus_id *bid,
  511. enum ath_hal_bus_type bus_type,
  512. enum hif_enable_type type)
  513. {
  514. CDF_STATUS status;
  515. struct ol_softc *scn = hif_ctx;
  516. if (scn == NULL) {
  517. HIF_ERROR("%s: hif_ctx = NULL", __func__);
  518. return CDF_STATUS_E_NULL_VALUE;
  519. }
  520. status = hif_enable_bus(scn, dev, bdev, bid, type);
  521. if (status != CDF_STATUS_SUCCESS) {
  522. HIF_ERROR("%s: hif_enable_bus error = %d",
  523. __func__, status);
  524. return status;
  525. }
  526. if (ADRASTEA_BU)
  527. hif_vote_link_up(hif_ctx);
  528. if (hif_config_ce(scn)) {
  529. HIF_ERROR("%s: Target probe failed.", __func__);
  530. hif_disable_bus(scn->aps_osdev.bdev);
  531. status = CDF_STATUS_E_FAILURE;
  532. return status;
  533. }
  534. /*
  535. * Flag to avoid potential unallocated memory access from MSI
  536. * interrupt handler which could get scheduled as soon as MSI
  537. * is enabled, i.e to take care of the race due to the order
  538. * in where MSI is enabled before the memory, that will be
  539. * in interrupt handlers, is allocated.
  540. */
  541. #ifdef HIF_PCI
  542. status = hif_configure_irq(scn->hif_sc);
  543. if (status < 0) {
  544. HIF_ERROR("%s: ERROR - configure_IRQ_and_CE failed, status = %d",
  545. __func__, status);
  546. return CDF_STATUS_E_FAILURE;
  547. }
  548. #endif
  549. scn->hif_init_done = true;
  550. HIF_TRACE("%s: X OK", __func__);
  551. return CDF_STATUS_SUCCESS;
  552. }
  553. /**
  554. * hif_wlan_disable(): call the platform driver to disable wlan
  555. *
  556. * This function passes the con_mode to platform driver to disable
  557. * wlan.
  558. *
  559. * Return: void
  560. */
  561. void hif_wlan_disable(void)
  562. {
  563. enum icnss_driver_mode mode;
  564. uint32_t con_mode = cds_get_conparam();
  565. if (CDF_GLOBAL_FTM_MODE == con_mode)
  566. mode = ICNSS_FTM;
  567. else if (WLAN_IS_EPPING_ENABLED(cds_get_conparam()))
  568. mode = ICNSS_EPPING;
  569. else
  570. mode = ICNSS_MISSION;
  571. icnss_wlan_disable(mode);
  572. }
  573. void hif_disable(void *hif_ctx, enum hif_disable_type type)
  574. {
  575. struct ol_softc *scn = hif_ctx;
  576. if (!scn)
  577. return;
  578. hif_nointrs(scn);
  579. if (scn->hif_init_done == false)
  580. hif_shut_down_device(scn);
  581. else
  582. hif_stop(scn);
  583. if (ADRASTEA_BU)
  584. hif_vote_link_down(hif_ctx);
  585. if (scn->aps_osdev.bdev)
  586. hif_disable_bus(scn->aps_osdev.bdev);
  587. hif_wlan_disable();
  588. scn->notice_send = false;
  589. HIF_INFO("%s: X", __func__);
  590. }
  591. /**
  592. * hif_crash_shutdown_dump_bus_register() - dump bus registers
  593. * @hif_ctx: hif_ctx
  594. *
  595. * Return: n/a
  596. */
  597. #if defined(TARGET_RAMDUMP_AFTER_KERNEL_PANIC) \
  598. && defined(HIF_PCI) && defined(DEBUG)
  599. static void hif_crash_shutdown_dump_bus_register(void *hif_ctx)
  600. {
  601. struct ol_softc *scn = hif_ctx;
  602. if (hif_check_soc_status(scn))
  603. return;
  604. if (hif_dump_registers(scn))
  605. HIF_ERROR("Failed to dump bus registers!");
  606. }
  607. /**
  608. * hif_crash_shutdown(): hif_crash_shutdown
  609. *
  610. * This function is called by the platform driver to dump CE registers
  611. *
  612. * @hif_ctx: hif_ctx
  613. *
  614. * Return: n/a
  615. */
  616. void hif_crash_shutdown(void *hif_ctx)
  617. {
  618. struct ol_softc *scn = hif_ctx;
  619. struct HIF_CE_state *hif_state;
  620. if (!scn)
  621. return;
  622. hif_state = (struct HIF_CE_state *)scn->hif_hdl;
  623. if (!hif_state)
  624. return;
  625. if (OL_TRGET_STATUS_RESET == scn->target_status) {
  626. HIF_INFO_MED("%s: Target is already asserted, ignore!",
  627. __func__);
  628. return;
  629. }
  630. if (cds_is_load_or_unload_in_progress()) {
  631. HIF_ERROR("%s: Load/unload is in progress, ignore!", __func__);
  632. return;
  633. }
  634. hif_crash_shutdown_dump_bus_register(hif_ctx);
  635. if (ol_copy_ramdump(scn))
  636. goto out;
  637. HIF_INFO_MED("%s: RAM dump collecting completed!", __func__);
  638. out:
  639. return;
  640. }
  641. #else
  642. void hif_crash_shutdown(void *hif_ctx)
  643. {
  644. HIF_INFO_MED("%s: Collecting target RAM dump disabled",
  645. __func__);
  646. return;
  647. }
  648. #endif /* TARGET_RAMDUMP_AFTER_KERNEL_PANIC */
  649. #ifdef QCA_WIFI_3_0
  650. /**
  651. * hif_check_fw_reg(): hif_check_fw_reg
  652. * @scn: scn
  653. * @state:
  654. *
  655. * Return: int
  656. */
  657. int hif_check_fw_reg(struct ol_softc *scn)
  658. {
  659. return 0;
  660. }
  661. #endif
  662. #ifdef IPA_OFFLOAD
  663. /**
  664. * hif_read_phy_mem_base(): hif_read_phy_mem_base
  665. * @scn: scn
  666. * @phy_mem_base: physical mem base
  667. *
  668. * Return: n/a
  669. */
  670. void hif_read_phy_mem_base(struct ol_softc *scn, cdf_dma_addr_t *phy_mem_base)
  671. {
  672. *phy_mem_base = scn->mem_pa;
  673. }
  674. #endif /* IPA_OFFLOAD */
  675. /**
  676. * hif_get_device_type(): hif_get_device_type
  677. * @device_id: device_id
  678. * @revision_id: revision_id
  679. * @hif_type: returned hif_type
  680. * @target_type: returned target_type
  681. *
  682. * Return: int
  683. */
  684. int hif_get_device_type(uint32_t device_id,
  685. uint32_t revision_id,
  686. uint32_t *hif_type, uint32_t *target_type)
  687. {
  688. int ret = 0;
  689. switch (device_id) {
  690. #ifdef QCA_WIFI_3_0_ADRASTEA
  691. case ADRASTEA_DEVICE_ID:
  692. case ADRASTEA_DEVICE_ID_P2_E12:
  693. *hif_type = HIF_TYPE_ADRASTEA;
  694. *target_type = TARGET_TYPE_ADRASTEA;
  695. break;
  696. #else
  697. case QCA6180_DEVICE_ID:
  698. *hif_type = HIF_TYPE_QCA6180;
  699. *target_type = TARGET_TYPE_QCA6180;
  700. break;
  701. #endif
  702. case AR9888_DEVICE_ID:
  703. *hif_type = HIF_TYPE_AR9888;
  704. *target_type = TARGET_TYPE_AR9888;
  705. break;
  706. case AR6320_DEVICE_ID:
  707. switch (revision_id) {
  708. case AR6320_FW_1_1:
  709. case AR6320_FW_1_3:
  710. *hif_type = HIF_TYPE_AR6320;
  711. *target_type = TARGET_TYPE_AR6320;
  712. break;
  713. case AR6320_FW_2_0:
  714. case AR6320_FW_3_0:
  715. case AR6320_FW_3_2:
  716. *hif_type = HIF_TYPE_AR6320V2;
  717. *target_type = TARGET_TYPE_AR6320V2;
  718. break;
  719. default:
  720. HIF_ERROR("%s: error - dev_id = 0x%x, rev_id = 0x%x",
  721. __func__, device_id, revision_id);
  722. ret = -ENODEV;
  723. goto end;
  724. }
  725. break;
  726. default:
  727. HIF_ERROR("%s: Unsupported device ID!", __func__);
  728. ret = -ENODEV;
  729. break;
  730. }
  731. end:
  732. return ret;
  733. }
  734. /**
  735. * Target info and ini parameters are global to the driver
  736. * Hence these structures are exposed to all the modules in
  737. * the driver and they don't need to maintains multiple copies
  738. * of the same info, instead get the handle from hif and
  739. * modify them in hif
  740. */
  741. /**
  742. * hif_get_ini_handle() - API to get hif_config_param handle
  743. * @scn: HIF Context
  744. *
  745. * Return: pointer to hif_config_info
  746. */
  747. struct hif_config_info *hif_get_ini_handle(struct ol_softc *scn)
  748. {
  749. return &scn->hif_config;
  750. }
  751. /**
  752. * hif_get_target_info_handle() - API to get hif_target_info handle
  753. * @scn: HIF context
  754. *
  755. * Return: Pointer to hif_target_info
  756. */
  757. struct hif_target_info *hif_get_target_info_handle(struct ol_softc *scn)
  758. {
  759. return &scn->target_info;
  760. }
  761. #if defined(FEATURE_LRO)
  762. /**
  763. * hif_lro_flush_cb_register - API to register for LRO Flush Callback
  764. * @scn: HIF Context
  765. * @handler: Function pointer to be called by HIF
  766. * @data: Private data to be used by the module registering to HIF
  767. *
  768. * Return: void
  769. */
  770. void hif_lro_flush_cb_register(struct ol_softc *scn,
  771. void (handler)(void *), void *data)
  772. {
  773. ce_lro_flush_cb_register(scn, handler, data);
  774. }
  775. /**
  776. * hif_lro_flush_cb_deregister - API to deregister for LRO Flush Callbacks
  777. * @scn: HIF Context
  778. *
  779. * Return: void
  780. */
  781. void hif_lro_flush_cb_deregister(struct ol_softc *scn)
  782. {
  783. ce_lro_flush_cb_deregister(scn);
  784. }
  785. #endif