dp_mst_sim_helper.c 21 KB

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  1. /*
  2. * Copyright (c) 2019-2021, The Linux Foundation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 and
  6. * only version 2 as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. *
  13. */
  14. /*
  15. * Copyright © 2014 Red Hat
  16. *
  17. * Permission to use, copy, modify, distribute, and sell this software and its
  18. * documentation for any purpose is hereby granted without fee, provided that
  19. * the above copyright notice appear in all copies and that both that copyright
  20. * notice and this permission notice appear in supporting documentation, and
  21. * that the name of the copyright holders not be used in advertising or
  22. * publicity pertaining to distribution of the software without specific,
  23. * written prior permission. The copyright holders make no representations
  24. * about the suitability of this software for any purpose. It is provided "as
  25. * is" without express or implied warranty.
  26. *
  27. * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
  28. * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
  29. * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
  30. * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
  31. * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  32. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
  33. * OF THIS SOFTWARE.
  34. */
  35. #include <linux/types.h>
  36. #include <linux/completion.h>
  37. #include <linux/delay.h>
  38. #include <drm/drm_fixed.h>
  39. #include <drm/drm_edid.h>
  40. #include <drm/drm_dp_mst_helper.h>
  41. #include "dp_mst_sim_helper.h"
  42. #include "dp_debug.h"
  43. #define DP_MST_DEBUG(fmt, ...) DP_DEBUG(fmt, ##__VA_ARGS__)
  44. #define DP_MST_INFO(fmt, ...) DP_DEBUG(fmt, ##__VA_ARGS__)
  45. #define DDC_SEGMENT_ADDR 0x30
  46. struct dp_mst_sim_context {
  47. void *host_dev;
  48. void (*host_hpd_irq)(void *host_dev);
  49. void (*host_req)(void *host_dev, const u8 *in, int in_size,
  50. u8 *out, int *out_size);
  51. struct dp_mst_sim_port *ports;
  52. u32 port_num;
  53. struct drm_dp_sideband_msg_rx down_req;
  54. struct drm_dp_sideband_msg_rx down_rep;
  55. struct mutex session_lock;
  56. struct completion session_comp;
  57. struct workqueue_struct *wq;
  58. u8 esi[16];
  59. u8 guid[16];
  60. u8 dpcd[1024];
  61. };
  62. struct dp_mst_sim_work {
  63. struct work_struct base;
  64. struct dp_mst_sim_context *ctx;
  65. unsigned int address;
  66. u8 buffer[256];
  67. size_t size;
  68. };
  69. #ifdef CONFIG_DYNAMIC_DEBUG
  70. static void dp_sideband_hex_dump(const char *name,
  71. u32 address, u8 *buffer, size_t size)
  72. {
  73. char prefix[64];
  74. int i, linelen, remaining = size;
  75. const int rowsize = 16;
  76. u8 linebuf[64];
  77. snprintf(prefix, sizeof(prefix), "%s(%d) %4xh(%2zu): ",
  78. name, current->pid, address, size);
  79. for (i = 0; i < size; i += rowsize) {
  80. linelen = min(remaining, rowsize);
  81. remaining -= rowsize;
  82. hex_dump_to_buffer(buffer + i, linelen, rowsize, 1,
  83. linebuf, sizeof(linebuf), false);
  84. DP_MST_DEBUG("%s%s\n", prefix, linebuf);
  85. }
  86. }
  87. #else
  88. static void dp_sideband_hex_dump(const char *name,
  89. u32 address, u8 *buffer, size_t size)
  90. {
  91. }
  92. #endif
  93. static u8 dp_mst_sim_msg_header_crc4(const uint8_t *data, size_t num_nibbles)
  94. {
  95. u8 bitmask = 0x80;
  96. u8 bitshift = 7;
  97. u8 array_index = 0;
  98. int number_of_bits = num_nibbles * 4;
  99. u8 remainder = 0;
  100. while (number_of_bits != 0) {
  101. number_of_bits--;
  102. remainder <<= 1;
  103. remainder |= (data[array_index] & bitmask) >> bitshift;
  104. bitmask >>= 1;
  105. bitshift--;
  106. if (bitmask == 0) {
  107. bitmask = 0x80;
  108. bitshift = 7;
  109. array_index++;
  110. }
  111. if ((remainder & 0x10) == 0x10)
  112. remainder ^= 0x13;
  113. }
  114. number_of_bits = 4;
  115. while (number_of_bits != 0) {
  116. number_of_bits--;
  117. remainder <<= 1;
  118. if ((remainder & 0x10) != 0)
  119. remainder ^= 0x13;
  120. }
  121. return remainder;
  122. }
  123. static u8 dp_mst_sim_msg_data_crc4(const uint8_t *data, u8 number_of_bytes)
  124. {
  125. u8 bitmask = 0x80;
  126. u8 bitshift = 7;
  127. u8 array_index = 0;
  128. int number_of_bits = number_of_bytes * 8;
  129. u16 remainder = 0;
  130. while (number_of_bits != 0) {
  131. number_of_bits--;
  132. remainder <<= 1;
  133. remainder |= (data[array_index] & bitmask) >> bitshift;
  134. bitmask >>= 1;
  135. bitshift--;
  136. if (bitmask == 0) {
  137. bitmask = 0x80;
  138. bitshift = 7;
  139. array_index++;
  140. }
  141. if ((remainder & 0x100) == 0x100)
  142. remainder ^= 0xd5;
  143. }
  144. number_of_bits = 8;
  145. while (number_of_bits != 0) {
  146. number_of_bits--;
  147. remainder <<= 1;
  148. if ((remainder & 0x100) != 0)
  149. remainder ^= 0xd5;
  150. }
  151. return remainder & 0xff;
  152. }
  153. static bool dp_mst_sim_decode_sideband_msg_hdr(struct drm_dp_sideband_msg_hdr *hdr,
  154. u8 *buf, int buflen, u8 *hdrlen)
  155. {
  156. u8 crc4;
  157. u8 len;
  158. int i;
  159. u8 idx;
  160. if (buf[0] == 0)
  161. return false;
  162. len = 3;
  163. len += ((buf[0] & 0xf0) >> 4) / 2;
  164. if (len > buflen)
  165. return false;
  166. crc4 = dp_mst_sim_msg_header_crc4(buf, (len * 2) - 1);
  167. if ((crc4 & 0xf) != (buf[len - 1] & 0xf)) {
  168. DP_MST_DEBUG("crc4 mismatch 0x%x 0x%x\n", crc4, buf[len - 1]);
  169. return false;
  170. }
  171. hdr->lct = (buf[0] & 0xf0) >> 4;
  172. hdr->lcr = (buf[0] & 0xf);
  173. idx = 1;
  174. for (i = 0; i < (hdr->lct / 2); i++)
  175. hdr->rad[i] = buf[idx++];
  176. hdr->broadcast = (buf[idx] >> 7) & 0x1;
  177. hdr->path_msg = (buf[idx] >> 6) & 0x1;
  178. hdr->msg_len = buf[idx] & 0x3f;
  179. idx++;
  180. hdr->somt = (buf[idx] >> 7) & 0x1;
  181. hdr->eomt = (buf[idx] >> 6) & 0x1;
  182. hdr->seqno = (buf[idx] >> 4) & 0x1;
  183. idx++;
  184. *hdrlen = idx;
  185. return true;
  186. }
  187. static bool dp_mst_sim_sideband_msg_build(struct drm_dp_sideband_msg_rx *msg,
  188. u8 *replybuf, u8 replybuflen, bool hdr)
  189. {
  190. int ret;
  191. u8 crc4;
  192. if (hdr) {
  193. u8 hdrlen;
  194. struct drm_dp_sideband_msg_hdr recv_hdr;
  195. ret = dp_mst_sim_decode_sideband_msg_hdr(&recv_hdr,
  196. replybuf, replybuflen, &hdrlen);
  197. if (ret == false)
  198. return false;
  199. /*
  200. * ignore out-of-order messages or messages that are part of a
  201. * failed transaction
  202. */
  203. if (!recv_hdr.somt && !msg->have_somt)
  204. return false;
  205. /* get length contained in this portion */
  206. msg->curchunk_len = recv_hdr.msg_len;
  207. msg->curchunk_hdrlen = hdrlen;
  208. /* we have already gotten an somt - don't bother parsing */
  209. if (recv_hdr.somt && msg->have_somt)
  210. return false;
  211. if (recv_hdr.somt) {
  212. memcpy(&msg->initial_hdr, &recv_hdr,
  213. sizeof(struct drm_dp_sideband_msg_hdr));
  214. msg->have_somt = true;
  215. }
  216. if (recv_hdr.eomt)
  217. msg->have_eomt = true;
  218. /* copy the bytes for the remainder of this header chunk */
  219. msg->curchunk_idx = min(msg->curchunk_len,
  220. (u8)(replybuflen - hdrlen));
  221. memcpy(&msg->chunk[0], replybuf + hdrlen, msg->curchunk_idx);
  222. } else {
  223. memcpy(&msg->chunk[msg->curchunk_idx], replybuf, replybuflen);
  224. msg->curchunk_idx += replybuflen;
  225. }
  226. if (msg->curchunk_idx >= msg->curchunk_len) {
  227. /* do CRC */
  228. crc4 = dp_mst_sim_msg_data_crc4(msg->chunk, msg->curchunk_len - 1);
  229. /* copy chunk into bigger msg */
  230. memcpy(&msg->msg[msg->curlen], msg->chunk,
  231. msg->curchunk_len - 1);
  232. msg->curlen += msg->curchunk_len - 1;
  233. }
  234. return true;
  235. }
  236. static void dp_mst_sim_encode_sideband_msg_hdr(struct drm_dp_sideband_msg_hdr *hdr,
  237. u8 *buf, int *len)
  238. {
  239. int idx = 0;
  240. int i;
  241. u8 crc4;
  242. buf[idx++] = ((hdr->lct & 0xf) << 4) | (hdr->lcr & 0xf);
  243. for (i = 0; i < (hdr->lct / 2); i++)
  244. buf[idx++] = hdr->rad[i];
  245. buf[idx++] = (hdr->broadcast << 7) | (hdr->path_msg << 6) |
  246. (hdr->msg_len & 0x3f);
  247. buf[idx++] = (hdr->somt << 7) | (hdr->eomt << 6) | (hdr->seqno << 4);
  248. crc4 = dp_mst_sim_msg_header_crc4(buf, (idx * 2) - 1);
  249. buf[idx - 1] |= (crc4 & 0xf);
  250. *len = idx;
  251. }
  252. static bool dp_get_one_sb_msg(struct drm_dp_sideband_msg_rx *msg,
  253. struct drm_dp_aux_msg *aux_msg)
  254. {
  255. int ret;
  256. if (!msg->have_somt) {
  257. ret = dp_mst_sim_sideband_msg_build(msg,
  258. aux_msg->buffer, aux_msg->size, true);
  259. if (!ret) {
  260. DP_ERR("sideband hdr build failed\n");
  261. return false;
  262. }
  263. } else {
  264. ret = dp_mst_sim_sideband_msg_build(msg,
  265. aux_msg->buffer, aux_msg->size, false);
  266. if (!ret) {
  267. DP_ERR("sideband msg build failed\n");
  268. return false;
  269. }
  270. }
  271. return true;
  272. }
  273. static int dp_sideband_build_nak_rep(
  274. struct dp_mst_sim_context *ctx)
  275. {
  276. struct drm_dp_sideband_msg_rx *msg = &ctx->down_req;
  277. u8 *buf = ctx->down_rep.msg;
  278. int idx = 0;
  279. buf[idx] = msg->msg[0] | 0x80;
  280. idx++;
  281. memcpy(&buf[idx], ctx->guid, 16);
  282. idx += 16;
  283. buf[idx] = 0x4;
  284. idx++;
  285. buf[idx] = 0;
  286. idx++;
  287. return idx;
  288. }
  289. static int dp_sideband_build_link_address_rep(
  290. struct dp_mst_sim_context *ctx)
  291. {
  292. struct dp_mst_sim_port *port;
  293. u8 *buf = ctx->down_rep.msg;
  294. int idx = 0;
  295. u32 i, tmp;
  296. buf[idx] = DP_LINK_ADDRESS;
  297. idx++;
  298. memcpy(&buf[idx], ctx->guid, 16);
  299. idx += 16;
  300. buf[idx] = ctx->port_num;
  301. idx++;
  302. for (i = 0; i < ctx->port_num; i++) {
  303. port = &ctx->ports[i];
  304. tmp = 0;
  305. if (port->input)
  306. tmp |= 0x80;
  307. tmp |= port->pdt << 4;
  308. tmp |= i & 0xF;
  309. buf[idx] = tmp;
  310. idx++;
  311. tmp = 0;
  312. if (port->mcs)
  313. tmp |= 0x80;
  314. if (port->ddps)
  315. tmp |= 0x40;
  316. if (port->input) {
  317. buf[idx] = tmp;
  318. idx++;
  319. continue;
  320. }
  321. if (port->ldps)
  322. tmp |= 0x20;
  323. buf[idx] = tmp;
  324. idx++;
  325. buf[idx] = port->dpcd_rev;
  326. idx++;
  327. memcpy(&buf[idx], port->peer_guid, 16);
  328. idx += 16;
  329. buf[idx] = (port->num_sdp_streams << 4) |
  330. (port->num_sdp_stream_sinks);
  331. idx++;
  332. }
  333. return idx;
  334. }
  335. static int dp_sideband_build_remote_i2c_read_rep(
  336. struct dp_mst_sim_context *ctx)
  337. {
  338. struct dp_mst_sim_port *port;
  339. struct drm_dp_remote_i2c_read i2c_read;
  340. u8 *buf;
  341. int idx;
  342. u32 i, start, len;
  343. buf = ctx->down_req.msg;
  344. idx = 1;
  345. i2c_read.num_transactions = buf[idx] & 0x3;
  346. i2c_read.port_number = buf[idx] >> 4;
  347. idx++;
  348. if (i2c_read.port_number >= ctx->port_num)
  349. goto err;
  350. for (i = 0; i < i2c_read.num_transactions; i++) {
  351. i2c_read.transactions[i].i2c_dev_id = buf[idx] & 0x7f;
  352. idx++;
  353. i2c_read.transactions[i].num_bytes = buf[idx];
  354. idx++;
  355. i2c_read.transactions[i].bytes = &buf[idx];
  356. idx += i2c_read.transactions[i].num_bytes;
  357. i2c_read.transactions[i].no_stop_bit = (buf[idx] >> 4) & 0x1;
  358. i2c_read.transactions[i].i2c_transaction_delay = buf[idx] & 0xf;
  359. idx++;
  360. }
  361. i2c_read.read_i2c_device_id = buf[idx];
  362. idx++;
  363. i2c_read.num_bytes_read = buf[idx];
  364. idx++;
  365. port = &ctx->ports[i2c_read.port_number];
  366. if (i2c_read.num_transactions == 1) {
  367. if (i2c_read.transactions[0].i2c_dev_id != DDC_ADDR ||
  368. i2c_read.transactions[0].num_bytes != 1) {
  369. DP_ERR("unsupported i2c address\n");
  370. goto err;
  371. }
  372. start = i2c_read.transactions[0].bytes[0];
  373. } else if (i2c_read.num_transactions == 2) {
  374. if (i2c_read.transactions[0].i2c_dev_id != DDC_SEGMENT_ADDR ||
  375. i2c_read.transactions[0].num_bytes != 1 ||
  376. i2c_read.transactions[1].i2c_dev_id != DDC_ADDR ||
  377. i2c_read.transactions[1].num_bytes != 1) {
  378. DP_ERR("unsupported i2c address\n");
  379. goto err;
  380. }
  381. start = i2c_read.transactions[0].bytes[0] * EDID_LENGTH * 2 +
  382. i2c_read.transactions[1].bytes[0];
  383. } else {
  384. DP_ERR("unsupported i2c transaction\n");
  385. goto err;
  386. }
  387. len = i2c_read.num_bytes_read;
  388. if (start + len > port->edid_size) {
  389. DP_ERR("edid data exceeds maximum\n");
  390. goto err;
  391. }
  392. buf = ctx->down_rep.msg;
  393. idx = 0;
  394. buf[idx] = DP_REMOTE_I2C_READ;
  395. idx++;
  396. buf[idx] = i2c_read.port_number;
  397. idx++;
  398. buf[idx] = len;
  399. idx++;
  400. memcpy(&buf[idx], &port->edid[start], len);
  401. idx += len;
  402. return idx;
  403. err:
  404. return dp_sideband_build_nak_rep(ctx);
  405. }
  406. static int dp_sideband_build_enum_path_resources_rep(
  407. struct dp_mst_sim_context *ctx)
  408. {
  409. struct dp_mst_sim_port *port;
  410. u8 port_num;
  411. u8 *buf;
  412. int idx;
  413. buf = ctx->down_req.msg;
  414. port_num = buf[1] >> 4;
  415. if (port_num >= ctx->port_num) {
  416. DP_ERR("invalid port num\n");
  417. goto err;
  418. }
  419. port = &ctx->ports[port_num];
  420. buf = ctx->down_rep.msg;
  421. idx = 0;
  422. buf[idx] = DP_ENUM_PATH_RESOURCES;
  423. idx++;
  424. buf[idx] = port_num << 4;
  425. idx++;
  426. buf[idx] = port->full_pbn >> 8;
  427. idx++;
  428. buf[idx] = port->full_pbn & 0xFF;
  429. idx++;
  430. buf[idx] = port->avail_pbn >> 8;
  431. idx++;
  432. buf[idx] = port->avail_pbn & 0xFF;
  433. idx++;
  434. return idx;
  435. err:
  436. return dp_sideband_build_nak_rep(ctx);
  437. }
  438. static int dp_sideband_build_allocate_payload_rep(
  439. struct dp_mst_sim_context *ctx)
  440. {
  441. struct drm_dp_allocate_payload allocate_payload;
  442. u8 *buf;
  443. int idx;
  444. u32 i;
  445. buf = ctx->down_req.msg;
  446. idx = 1;
  447. allocate_payload.port_number = buf[idx] >> 4;
  448. allocate_payload.number_sdp_streams = buf[idx] & 0xF;
  449. idx++;
  450. allocate_payload.vcpi = buf[idx];
  451. idx++;
  452. allocate_payload.pbn = (buf[idx] << 8) | buf[idx+1];
  453. idx += 2;
  454. for (i = 0; i < allocate_payload.number_sdp_streams / 2; i++) {
  455. allocate_payload.sdp_stream_sink[i * 2] = buf[idx] >> 4;
  456. allocate_payload.sdp_stream_sink[i * 2 + 1] = buf[idx] & 0xf;
  457. idx++;
  458. }
  459. if (allocate_payload.number_sdp_streams & 1) {
  460. i = allocate_payload.number_sdp_streams - 1;
  461. allocate_payload.sdp_stream_sink[i] = buf[idx] >> 4;
  462. idx++;
  463. }
  464. if (allocate_payload.port_number >= ctx->port_num) {
  465. DP_ERR("invalid port num\n");
  466. goto err;
  467. }
  468. buf = ctx->down_rep.msg;
  469. idx = 0;
  470. buf[idx] = DP_ALLOCATE_PAYLOAD;
  471. idx++;
  472. buf[idx] = allocate_payload.port_number;
  473. idx++;
  474. buf[idx] = allocate_payload.vcpi;
  475. idx++;
  476. buf[idx] = allocate_payload.pbn >> 8;
  477. idx++;
  478. buf[idx] = allocate_payload.pbn & 0xFF;
  479. idx++;
  480. return idx;
  481. err:
  482. return dp_sideband_build_nak_rep(ctx);
  483. }
  484. static int dp_sideband_build_power_updown_phy_rep(
  485. struct dp_mst_sim_context *ctx)
  486. {
  487. u8 port_num;
  488. u8 *buf;
  489. int idx;
  490. buf = ctx->down_req.msg;
  491. port_num = buf[1] >> 4;
  492. if (port_num >= ctx->port_num) {
  493. DP_ERR("invalid port num\n");
  494. goto err;
  495. }
  496. buf = ctx->down_rep.msg;
  497. idx = 0;
  498. buf[idx] = ctx->down_req.msg[0];
  499. idx++;
  500. buf[idx] = port_num;
  501. idx++;
  502. return idx;
  503. err:
  504. return dp_sideband_build_nak_rep(ctx);
  505. }
  506. static int dp_sideband_build_clear_payload_id_table_rep(
  507. struct dp_mst_sim_context *ctx)
  508. {
  509. u8 *buf = ctx->down_rep.msg;
  510. int idx = 0;
  511. buf[idx] = DP_CLEAR_PAYLOAD_ID_TABLE;
  512. idx++;
  513. return idx;
  514. }
  515. static inline int dp_sideband_update_esi(struct dp_mst_sim_context *ctx)
  516. {
  517. ctx->esi[0] = ctx->port_num;
  518. ctx->esi[1] = DP_DOWN_REP_MSG_RDY;
  519. ctx->esi[2] = 0;
  520. return 0;
  521. }
  522. static inline bool dp_sideband_pending_esi(
  523. struct dp_mst_sim_context *ctx)
  524. {
  525. return !!(ctx->esi[1] & DP_DOWN_REP_MSG_RDY);
  526. }
  527. static int dp_mst_sim_clear_esi(struct dp_mst_sim_context *ctx,
  528. struct drm_dp_aux_msg *msg)
  529. {
  530. size_t i;
  531. u8 old_esi = ctx->esi[1];
  532. u32 addr = msg->address - DP_SINK_COUNT_ESI;
  533. if (msg->size - addr >= 16) {
  534. msg->reply = DP_AUX_NATIVE_REPLY_NACK;
  535. return 0;
  536. }
  537. mutex_lock(&ctx->session_lock);
  538. for (i = 0; i < msg->size; i++)
  539. ctx->esi[addr + i] &= ~((u8 *)msg->buffer)[i];
  540. if ((old_esi & DP_DOWN_REP_MSG_RDY) &&
  541. !(ctx->esi[1] & DP_DOWN_REP_MSG_RDY)) {
  542. complete(&ctx->session_comp);
  543. }
  544. mutex_unlock(&ctx->session_lock);
  545. msg->reply = DP_AUX_NATIVE_REPLY_ACK;
  546. return 0;
  547. }
  548. static int dp_mst_sim_read_esi(struct dp_mst_sim_context *ctx,
  549. struct drm_dp_aux_msg *msg)
  550. {
  551. u32 addr = msg->address - DP_SINK_COUNT_ESI;
  552. if (msg->size - addr >= 16) {
  553. msg->reply = DP_AUX_NATIVE_REPLY_NACK;
  554. return 0;
  555. }
  556. memcpy(msg->buffer, &ctx->esi[addr], msg->size);
  557. msg->reply = DP_AUX_NATIVE_REPLY_ACK;
  558. return 0;
  559. }
  560. static int dp_mst_sim_down_req_internal(struct dp_mst_sim_context *ctx,
  561. struct drm_dp_aux_msg *aux_msg)
  562. {
  563. struct drm_dp_sideband_msg_rx *msg = &ctx->down_req;
  564. struct drm_dp_sideband_msg_hdr hdr;
  565. bool seqno;
  566. int ret, size, len, hdr_len;
  567. ret = dp_get_one_sb_msg(msg, aux_msg);
  568. if (!ret)
  569. return -EINVAL;
  570. if (!msg->have_eomt)
  571. return 0;
  572. seqno = msg->initial_hdr.seqno;
  573. switch (msg->msg[0]) {
  574. case DP_LINK_ADDRESS:
  575. size = dp_sideband_build_link_address_rep(ctx);
  576. break;
  577. case DP_REMOTE_I2C_READ:
  578. size = dp_sideband_build_remote_i2c_read_rep(ctx);
  579. break;
  580. case DP_ENUM_PATH_RESOURCES:
  581. size = dp_sideband_build_enum_path_resources_rep(ctx);
  582. break;
  583. case DP_ALLOCATE_PAYLOAD:
  584. size = dp_sideband_build_allocate_payload_rep(ctx);
  585. break;
  586. case DP_POWER_DOWN_PHY:
  587. case DP_POWER_UP_PHY:
  588. size = dp_sideband_build_power_updown_phy_rep(ctx);
  589. break;
  590. case DP_CLEAR_PAYLOAD_ID_TABLE:
  591. size = dp_sideband_build_clear_payload_id_table_rep(ctx);
  592. break;
  593. default:
  594. size = dp_sideband_build_nak_rep(ctx);
  595. break;
  596. }
  597. if (ctx->host_req)
  598. ctx->host_req(ctx->host_dev,
  599. ctx->down_req.msg, ctx->down_req.curlen,
  600. ctx->down_rep.msg, &size);
  601. memset(msg, 0, sizeof(*msg));
  602. msg = &ctx->down_rep;
  603. msg->curlen = 0;
  604. while (msg->curlen < size) {
  605. /* copy data */
  606. len = min(size - msg->curlen, 44);
  607. memcpy(&ctx->dpcd[3], &msg->msg[msg->curlen], len);
  608. msg->curlen += len;
  609. /* build header */
  610. memset(&hdr, 0, sizeof(struct drm_dp_sideband_msg_hdr));
  611. hdr.broadcast = 0;
  612. hdr.path_msg = 0;
  613. hdr.lct = 1;
  614. hdr.lcr = 0;
  615. hdr.seqno = seqno;
  616. hdr.msg_len = len + 1;
  617. hdr.eomt = (msg->curlen == size);
  618. hdr.somt = (msg->curlen == len);
  619. dp_mst_sim_encode_sideband_msg_hdr(&hdr, ctx->dpcd, &hdr_len);
  620. /* build crc */
  621. ctx->dpcd[len + 3] = dp_mst_sim_msg_data_crc4(&ctx->dpcd[3], len);
  622. /* update esi */
  623. mutex_lock(&ctx->session_lock);
  624. dp_sideband_update_esi(ctx);
  625. mutex_unlock(&ctx->session_lock);
  626. /* notify host */
  627. ctx->host_hpd_irq(ctx->host_dev);
  628. /* wait until esi is cleared */
  629. mutex_lock(&ctx->session_lock);
  630. while (dp_sideband_pending_esi(ctx)) {
  631. mutex_unlock(&ctx->session_lock);
  632. wait_for_completion(&ctx->session_comp);
  633. mutex_lock(&ctx->session_lock);
  634. }
  635. mutex_unlock(&ctx->session_lock);
  636. }
  637. return 0;
  638. }
  639. static void dp_mst_sim_down_req_work(struct work_struct *work)
  640. {
  641. struct dp_mst_sim_work *sim_work =
  642. container_of(work, struct dp_mst_sim_work, base);
  643. struct drm_dp_aux_msg msg;
  644. msg.address = sim_work->address;
  645. msg.buffer = sim_work->buffer;
  646. msg.size = sim_work->size;
  647. dp_mst_sim_down_req_internal(sim_work->ctx, &msg);
  648. kfree(sim_work);
  649. }
  650. static int dp_mst_sim_down_req(struct dp_mst_sim_context *ctx,
  651. struct drm_dp_aux_msg *aux_msg)
  652. {
  653. struct dp_mst_sim_work *work;
  654. if (aux_msg->size >= 256) {
  655. aux_msg->reply = DP_AUX_NATIVE_REPLY_NACK;
  656. return 0;
  657. }
  658. dp_sideband_hex_dump("request",
  659. aux_msg->address, aux_msg->buffer, aux_msg->size);
  660. work = kzalloc(sizeof(*work), GFP_KERNEL);
  661. if (!work) {
  662. aux_msg->reply = DP_AUX_NATIVE_REPLY_NACK;
  663. return 0;
  664. }
  665. work->ctx = ctx;
  666. work->address = aux_msg->address;
  667. work->size = aux_msg->size;
  668. memcpy(work->buffer, aux_msg->buffer, aux_msg->size);
  669. INIT_WORK(&work->base, dp_mst_sim_down_req_work);
  670. queue_work(ctx->wq, &work->base);
  671. aux_msg->reply = DP_AUX_NATIVE_REPLY_ACK;
  672. return 0;
  673. }
  674. static int dp_mst_sim_down_rep(struct dp_mst_sim_context *ctx,
  675. struct drm_dp_aux_msg *msg)
  676. {
  677. u32 addr = msg->address - DP_SIDEBAND_MSG_DOWN_REP_BASE;
  678. memcpy(msg->buffer, &ctx->dpcd[addr], msg->size);
  679. msg->reply = DP_AUX_NATIVE_REPLY_ACK;
  680. dp_sideband_hex_dump("reply",
  681. addr, msg->buffer, msg->size);
  682. return 0;
  683. }
  684. int dp_mst_sim_transfer(void *mst_sim_context, struct drm_dp_aux_msg *msg)
  685. {
  686. if (msg->request == DP_AUX_NATIVE_WRITE) {
  687. if (msg->address >= DP_SIDEBAND_MSG_DOWN_REQ_BASE &&
  688. msg->address < DP_SIDEBAND_MSG_DOWN_REQ_BASE + 256)
  689. return dp_mst_sim_down_req(mst_sim_context, msg);
  690. if (msg->address >= DP_SINK_COUNT_ESI &&
  691. msg->address < DP_SINK_COUNT_ESI + 14)
  692. return dp_mst_sim_clear_esi(mst_sim_context, msg);
  693. } else if (msg->request == DP_AUX_NATIVE_READ) {
  694. if (msg->address >= DP_SIDEBAND_MSG_DOWN_REP_BASE &&
  695. msg->address < DP_SIDEBAND_MSG_DOWN_REP_BASE + 256)
  696. return dp_mst_sim_down_rep(mst_sim_context, msg);
  697. if (msg->address >= DP_SINK_COUNT_ESI &&
  698. msg->address < DP_SINK_COUNT_ESI + 14)
  699. return dp_mst_sim_read_esi(mst_sim_context, msg);
  700. }
  701. return -EINVAL;
  702. }
  703. int dp_mst_sim_update(void *mst_sim_context, u32 port_num,
  704. struct dp_mst_sim_port *ports)
  705. {
  706. struct dp_mst_sim_context *ctx = mst_sim_context;
  707. u8 *edid;
  708. int rc = 0;
  709. u32 i;
  710. if (port_num >= 15)
  711. return -EINVAL;
  712. mutex_lock(&ctx->session_lock);
  713. for (i = 0; i < ctx->port_num; i++)
  714. kfree(ctx->ports[i].edid);
  715. kfree(ctx->ports);
  716. ctx->port_num = 0;
  717. ctx->ports = kcalloc(port_num, sizeof(*ports), GFP_KERNEL);
  718. if (!ctx->ports) {
  719. rc = -ENOMEM;
  720. goto fail;
  721. }
  722. ctx->port_num = port_num;
  723. for (i = 0; i < port_num; i++) {
  724. ctx->ports[i] = ports[i];
  725. if (ports[i].edid_size) {
  726. if (!ports[i].edid) {
  727. rc = -EINVAL;
  728. goto fail;
  729. }
  730. edid = kzalloc(ports[i].edid_size,
  731. GFP_KERNEL);
  732. if (!edid) {
  733. rc = -ENOMEM;
  734. goto fail;
  735. }
  736. memcpy(edid, ports[i].edid, ports[i].edid_size);
  737. ctx->ports[i].edid = edid;
  738. }
  739. }
  740. fail:
  741. if (rc) {
  742. for (i = 0; i < ctx->port_num; i++)
  743. kfree(ctx->ports[i].edid);
  744. kfree(ctx->ports);
  745. }
  746. mutex_unlock(&ctx->session_lock);
  747. return rc;
  748. }
  749. int dp_mst_sim_create(const struct dp_mst_sim_cfg *cfg,
  750. void **mst_sim_context)
  751. {
  752. struct dp_mst_sim_context *ctx;
  753. ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
  754. if (!ctx)
  755. return -ENOMEM;
  756. ctx->host_dev = cfg->host_dev;
  757. ctx->host_hpd_irq = cfg->host_hpd_irq;
  758. ctx->host_req = cfg->host_req;
  759. memcpy(ctx->guid, cfg->guid, 16);
  760. mutex_init(&ctx->session_lock);
  761. init_completion(&ctx->session_comp);
  762. ctx->wq = create_singlethread_workqueue("dp_mst_sim");
  763. if (IS_ERR_OR_NULL(ctx->wq)) {
  764. DP_ERR("Error creating wq\n");
  765. kfree(ctx);
  766. return -EPERM;
  767. }
  768. *mst_sim_context = ctx;
  769. return 0;
  770. }
  771. int dp_mst_sim_destroy(void *mst_sim_context)
  772. {
  773. struct dp_mst_sim_context *ctx = mst_sim_context;
  774. u32 i;
  775. for (i = 0; i < ctx->port_num; i++)
  776. kfree(ctx->ports[i].edid);
  777. kfree(ctx->ports);
  778. destroy_workqueue(ctx->wq);
  779. return 0;
  780. }