sde_power_handle.c 21 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2014-2019, The Linux Foundation. All rights reserved.
  4. */
  5. #define pr_fmt(fmt) "[drm:%s:%d]: " fmt, __func__, __LINE__
  6. #include <linux/clk.h>
  7. #include <linux/kernel.h>
  8. #include <linux/of.h>
  9. #include <linux/string.h>
  10. #include <linux/of_address.h>
  11. #include <linux/slab.h>
  12. #include <linux/mutex.h>
  13. #include <linux/of_platform.h>
  14. #include <linux/sde_io_util.h>
  15. #include <linux/sde_rsc.h>
  16. #include "sde_power_handle.h"
  17. #include "sde_trace.h"
  18. #include "sde_dbg.h"
  19. static const struct sde_power_bus_scaling_data sde_reg_bus_table[] = {
  20. {0, 0},
  21. {0, 76800},
  22. {0, 150000},
  23. {0, 300000},
  24. };
  25. static const char *data_bus_name[SDE_POWER_HANDLE_DBUS_ID_MAX] = {
  26. [SDE_POWER_HANDLE_DBUS_ID_MNOC] = "qcom,sde-data-bus",
  27. [SDE_POWER_HANDLE_DBUS_ID_LLCC] = "qcom,sde-llcc-bus",
  28. [SDE_POWER_HANDLE_DBUS_ID_EBI] = "qcom,sde-ebi-bus",
  29. };
  30. const char *sde_power_handle_get_dbus_name(u32 bus_id)
  31. {
  32. if (bus_id < SDE_POWER_HANDLE_DBUS_ID_MAX)
  33. return data_bus_name[bus_id];
  34. return NULL;
  35. }
  36. static void sde_power_event_trigger_locked(struct sde_power_handle *phandle,
  37. u32 event_type)
  38. {
  39. struct sde_power_event *event;
  40. list_for_each_entry(event, &phandle->event_list, list) {
  41. if (event->event_type & event_type)
  42. event->cb_fnc(event_type, event->usr);
  43. }
  44. }
  45. static inline void sde_power_rsc_client_init(struct sde_power_handle *phandle)
  46. {
  47. /* creates the rsc client */
  48. if (!phandle->rsc_client_init) {
  49. phandle->rsc_client = sde_rsc_client_create(SDE_RSC_INDEX,
  50. "sde_power_handle", SDE_RSC_CLK_CLIENT, 0);
  51. if (IS_ERR_OR_NULL(phandle->rsc_client)) {
  52. pr_debug("sde rsc client create failed :%ld\n",
  53. PTR_ERR(phandle->rsc_client));
  54. phandle->rsc_client = NULL;
  55. }
  56. phandle->rsc_client_init = true;
  57. }
  58. }
  59. static int sde_power_rsc_update(struct sde_power_handle *phandle, bool enable)
  60. {
  61. u32 rsc_state;
  62. int ret = 0;
  63. rsc_state = enable ? SDE_RSC_CLK_STATE : SDE_RSC_IDLE_STATE;
  64. if (phandle->rsc_client)
  65. ret = sde_rsc_client_state_update(phandle->rsc_client,
  66. rsc_state, NULL, SDE_RSC_INVALID_CRTC_ID, NULL);
  67. return ret;
  68. }
  69. static int sde_power_parse_dt_supply(struct platform_device *pdev,
  70. struct dss_module_power *mp)
  71. {
  72. int i = 0, rc = 0;
  73. u32 tmp = 0;
  74. struct device_node *of_node = NULL, *supply_root_node = NULL;
  75. struct device_node *supply_node = NULL;
  76. if (!pdev || !mp) {
  77. pr_err("invalid input param pdev:%pK mp:%pK\n", pdev, mp);
  78. return -EINVAL;
  79. }
  80. of_node = pdev->dev.of_node;
  81. mp->num_vreg = 0;
  82. supply_root_node = of_get_child_by_name(of_node,
  83. "qcom,platform-supply-entries");
  84. if (!supply_root_node) {
  85. pr_debug("no supply entry present\n");
  86. return rc;
  87. }
  88. for_each_child_of_node(supply_root_node, supply_node)
  89. mp->num_vreg++;
  90. if (mp->num_vreg == 0) {
  91. pr_debug("no vreg\n");
  92. return rc;
  93. }
  94. pr_debug("vreg found. count=%d\n", mp->num_vreg);
  95. mp->vreg_config = devm_kzalloc(&pdev->dev, sizeof(struct dss_vreg) *
  96. mp->num_vreg, GFP_KERNEL);
  97. if (!mp->vreg_config) {
  98. rc = -ENOMEM;
  99. return rc;
  100. }
  101. for_each_child_of_node(supply_root_node, supply_node) {
  102. const char *st = NULL;
  103. rc = of_property_read_string(supply_node,
  104. "qcom,supply-name", &st);
  105. if (rc) {
  106. pr_err("error reading name. rc=%d\n", rc);
  107. goto error;
  108. }
  109. strlcpy(mp->vreg_config[i].vreg_name, st,
  110. sizeof(mp->vreg_config[i].vreg_name));
  111. rc = of_property_read_u32(supply_node,
  112. "qcom,supply-min-voltage", &tmp);
  113. if (rc) {
  114. pr_err("error reading min volt. rc=%d\n", rc);
  115. goto error;
  116. }
  117. mp->vreg_config[i].min_voltage = tmp;
  118. rc = of_property_read_u32(supply_node,
  119. "qcom,supply-max-voltage", &tmp);
  120. if (rc) {
  121. pr_err("error reading max volt. rc=%d\n", rc);
  122. goto error;
  123. }
  124. mp->vreg_config[i].max_voltage = tmp;
  125. rc = of_property_read_u32(supply_node,
  126. "qcom,supply-enable-load", &tmp);
  127. if (rc) {
  128. pr_err("error reading enable load. rc=%d\n", rc);
  129. goto error;
  130. }
  131. mp->vreg_config[i].enable_load = tmp;
  132. rc = of_property_read_u32(supply_node,
  133. "qcom,supply-disable-load", &tmp);
  134. if (rc) {
  135. pr_err("error reading disable load. rc=%d\n", rc);
  136. goto error;
  137. }
  138. mp->vreg_config[i].disable_load = tmp;
  139. rc = of_property_read_u32(supply_node,
  140. "qcom,supply-pre-on-sleep", &tmp);
  141. if (rc)
  142. pr_debug("error reading supply pre sleep value. rc=%d\n",
  143. rc);
  144. mp->vreg_config[i].pre_on_sleep = (!rc ? tmp : 0);
  145. rc = of_property_read_u32(supply_node,
  146. "qcom,supply-pre-off-sleep", &tmp);
  147. if (rc)
  148. pr_debug("error reading supply pre sleep value. rc=%d\n",
  149. rc);
  150. mp->vreg_config[i].pre_off_sleep = (!rc ? tmp : 0);
  151. rc = of_property_read_u32(supply_node,
  152. "qcom,supply-post-on-sleep", &tmp);
  153. if (rc)
  154. pr_debug("error reading supply post sleep value. rc=%d\n",
  155. rc);
  156. mp->vreg_config[i].post_on_sleep = (!rc ? tmp : 0);
  157. rc = of_property_read_u32(supply_node,
  158. "qcom,supply-post-off-sleep", &tmp);
  159. if (rc)
  160. pr_debug("error reading supply post sleep value. rc=%d\n",
  161. rc);
  162. mp->vreg_config[i].post_off_sleep = (!rc ? tmp : 0);
  163. pr_debug("%s min=%d, max=%d, enable=%d, disable=%d, preonsleep=%d, postonsleep=%d, preoffsleep=%d, postoffsleep=%d\n",
  164. mp->vreg_config[i].vreg_name,
  165. mp->vreg_config[i].min_voltage,
  166. mp->vreg_config[i].max_voltage,
  167. mp->vreg_config[i].enable_load,
  168. mp->vreg_config[i].disable_load,
  169. mp->vreg_config[i].pre_on_sleep,
  170. mp->vreg_config[i].post_on_sleep,
  171. mp->vreg_config[i].pre_off_sleep,
  172. mp->vreg_config[i].post_off_sleep);
  173. ++i;
  174. rc = 0;
  175. }
  176. return rc;
  177. error:
  178. if (mp->vreg_config) {
  179. devm_kfree(&pdev->dev, mp->vreg_config);
  180. mp->vreg_config = NULL;
  181. mp->num_vreg = 0;
  182. }
  183. return rc;
  184. }
  185. static int sde_power_parse_dt_clock(struct platform_device *pdev,
  186. struct dss_module_power *mp)
  187. {
  188. u32 i = 0, rc = 0;
  189. const char *clock_name;
  190. u32 clock_rate = 0;
  191. u32 clock_max_rate = 0;
  192. int num_clk = 0;
  193. if (!pdev || !mp) {
  194. pr_err("invalid input param pdev:%pK mp:%pK\n", pdev, mp);
  195. return -EINVAL;
  196. }
  197. mp->num_clk = 0;
  198. num_clk = of_property_count_strings(pdev->dev.of_node,
  199. "clock-names");
  200. if (num_clk <= 0) {
  201. pr_debug("clocks are not defined\n");
  202. goto clk_err;
  203. }
  204. mp->num_clk = num_clk;
  205. mp->clk_config = devm_kzalloc(&pdev->dev,
  206. sizeof(struct dss_clk) * num_clk, GFP_KERNEL);
  207. if (!mp->clk_config) {
  208. rc = -ENOMEM;
  209. mp->num_clk = 0;
  210. goto clk_err;
  211. }
  212. for (i = 0; i < num_clk; i++) {
  213. of_property_read_string_index(pdev->dev.of_node, "clock-names",
  214. i, &clock_name);
  215. strlcpy(mp->clk_config[i].clk_name, clock_name,
  216. sizeof(mp->clk_config[i].clk_name));
  217. of_property_read_u32_index(pdev->dev.of_node, "clock-rate",
  218. i, &clock_rate);
  219. mp->clk_config[i].rate = clock_rate;
  220. if (!clock_rate)
  221. mp->clk_config[i].type = DSS_CLK_AHB;
  222. else
  223. mp->clk_config[i].type = DSS_CLK_PCLK;
  224. clock_max_rate = 0;
  225. of_property_read_u32_index(pdev->dev.of_node, "clock-max-rate",
  226. i, &clock_max_rate);
  227. mp->clk_config[i].max_rate = clock_max_rate;
  228. }
  229. clk_err:
  230. return rc;
  231. }
  232. #define MAX_AXI_PORT_COUNT 3
  233. static int _sde_power_data_bus_set_quota(
  234. struct sde_power_data_bus_handle *pdbus,
  235. u64 in_ab_quota, u64 in_ib_quota)
  236. {
  237. int rc = 0, i = 0, j = 0;
  238. if (!pdbus->data_paths_cnt) {
  239. pr_err("invalid data bus handle\n");
  240. return -EINVAL;
  241. }
  242. pr_debug("ab=%llu ib=%llu\n", in_ab_quota, in_ib_quota);
  243. in_ab_quota = div_u64(in_ab_quota, pdbus->data_paths_cnt);
  244. SDE_ATRACE_BEGIN("msm_bus_scale_req");
  245. for (i = 0; i < pdbus->data_paths_cnt; i++) {
  246. if (pdbus->data_bus_hdl[i]) {
  247. rc = icc_set_bw(pdbus->data_bus_hdl[i],
  248. in_ab_quota, in_ib_quota);
  249. if (rc)
  250. goto err;
  251. }
  252. }
  253. pdbus->curr_val.ab = in_ab_quota;
  254. pdbus->curr_val.ib = in_ib_quota;
  255. SDE_ATRACE_END("msm_bus_scale_req");
  256. return rc;
  257. err:
  258. for (j = 0; j < i; j++)
  259. if (pdbus->data_bus_hdl[j])
  260. icc_set_bw(pdbus->data_bus_hdl[j],
  261. pdbus->curr_val.ab,
  262. pdbus->curr_val.ib);
  263. SDE_ATRACE_END("msm_bus_scale_req");
  264. pr_err("failed to set data bus vote ab=%llu ib=%llu rc=%d\n",
  265. rc, in_ab_quota, in_ib_quota);
  266. return rc;
  267. }
  268. int sde_power_data_bus_set_quota(struct sde_power_handle *phandle,
  269. u32 bus_id, u64 ab_quota, u64 ib_quota)
  270. {
  271. int rc = 0;
  272. if (!phandle || bus_id >= SDE_POWER_HANDLE_DBUS_ID_MAX) {
  273. pr_err("invalid parameters\n");
  274. return -EINVAL;
  275. }
  276. mutex_lock(&phandle->phandle_lock);
  277. trace_sde_perf_update_bus(bus_id, ab_quota, ib_quota);
  278. if (phandle->data_bus_handle[bus_id].data_paths_cnt > 0)
  279. rc = _sde_power_data_bus_set_quota(
  280. &phandle->data_bus_handle[bus_id], ab_quota, ib_quota);
  281. mutex_unlock(&phandle->phandle_lock);
  282. return rc;
  283. }
  284. static void sde_power_data_bus_unregister(
  285. struct sde_power_data_bus_handle *pdbus)
  286. {
  287. int i = 0;
  288. for (i = 0; i < pdbus->data_paths_cnt; i++) {
  289. if (pdbus->data_bus_hdl[i]) {
  290. icc_put(pdbus->data_bus_hdl[i]);
  291. pdbus->data_bus_hdl[i] = NULL;
  292. }
  293. }
  294. }
  295. static int sde_power_data_bus_parse(struct platform_device *pdev,
  296. struct sde_power_data_bus_handle *pdbus, const char *name)
  297. {
  298. char bus_name[32];
  299. int i = 0, ret = 0;
  300. for (i = 0; i < DATA_BUS_PATH_MAX; i++) {
  301. snprintf(bus_name, sizeof(bus_name), "%s%d", name, i);
  302. ret = of_property_match_string(pdev->dev.of_node,
  303. "interconnect-names", bus_name);
  304. if (ret < 0) {
  305. if (!pdbus->data_paths_cnt) {
  306. pr_debug("sde: bus %s dt node missing\n", bus_name);
  307. return 0;
  308. } else
  309. goto end;
  310. } else
  311. pdbus->data_bus_hdl[i] = of_icc_get(&pdev->dev, bus_name);
  312. if (IS_ERR_OR_NULL(pdbus->data_bus_hdl[i])) {
  313. pr_debug("icc get path failed for %s\n", bus_name);
  314. break;
  315. }
  316. pdbus->data_paths_cnt++;
  317. }
  318. if (!pdbus->data_paths_cnt) {
  319. pr_err("get none data bus path for %s\n", name);
  320. return -EINVAL;
  321. }
  322. end:
  323. if (of_find_property(pdev->dev.of_node,
  324. "qcom,msm-bus,active-only", NULL)) {
  325. pdbus->bus_active_only = true;
  326. for (i = 0; i < pdbus->data_paths_cnt; i++) {
  327. icc_set_tag(pdbus->data_bus_hdl[i],
  328. QCOM_ICC_TAG_ACTIVE_ONLY);
  329. }
  330. }
  331. pr_debug("register %s data_bus success, path number=%d\n",
  332. name, pdbus->data_paths_cnt);
  333. return 0;
  334. }
  335. static int sde_power_reg_bus_parse(struct platform_device *pdev,
  336. struct sde_power_handle *phandle)
  337. {
  338. int rc = 0;
  339. phandle->reg_bus_hdl = of_icc_get(&pdev->dev, "qcom,sde-reg-bus");
  340. if (IS_ERR_OR_NULL(phandle->reg_bus_hdl)) {
  341. pr_err("reg bus handle parsing failed\n");
  342. phandle->reg_bus_hdl = NULL;
  343. rc = -EINVAL;
  344. } else {
  345. pr_debug("reg_bus_hdl parsing success\n");
  346. }
  347. return rc;
  348. }
  349. static void sde_power_reg_bus_unregister(struct icc_path *reg_bus_hdl)
  350. {
  351. if (reg_bus_hdl)
  352. icc_put(reg_bus_hdl);
  353. }
  354. static int sde_power_reg_bus_update(struct icc_path *reg_bus_hdl,
  355. u32 usecase_ndx)
  356. {
  357. int rc = 0;
  358. if (reg_bus_hdl) {
  359. SDE_ATRACE_BEGIN("msm_bus_scale_req");
  360. rc = icc_set_bw(reg_bus_hdl,
  361. sde_reg_bus_table[usecase_ndx].ab,
  362. sde_reg_bus_table[usecase_ndx].ib);
  363. SDE_ATRACE_END("msm_bus_scale_req");
  364. }
  365. if (rc)
  366. pr_err("failed to set reg bus vote rc=%d\n", rc);
  367. return rc;
  368. }
  369. int sde_power_resource_init(struct platform_device *pdev,
  370. struct sde_power_handle *phandle)
  371. {
  372. int rc = 0, i;
  373. struct dss_module_power *mp;
  374. if (!phandle || !pdev) {
  375. pr_err("invalid input param\n");
  376. rc = -EINVAL;
  377. goto end;
  378. }
  379. mp = &phandle->mp;
  380. phandle->dev = &pdev->dev;
  381. rc = sde_power_parse_dt_clock(pdev, mp);
  382. if (rc) {
  383. pr_err("device clock parsing failed\n");
  384. goto end;
  385. }
  386. rc = sde_power_parse_dt_supply(pdev, mp);
  387. if (rc) {
  388. pr_err("device vreg supply parsing failed\n");
  389. goto parse_vreg_err;
  390. }
  391. rc = msm_dss_config_vreg(&pdev->dev,
  392. mp->vreg_config, mp->num_vreg, 1);
  393. if (rc) {
  394. pr_err("vreg config failed rc=%d\n", rc);
  395. goto vreg_err;
  396. }
  397. rc = msm_dss_get_clk(&pdev->dev, mp->clk_config, mp->num_clk);
  398. if (rc) {
  399. pr_err("clock get failed rc=%d\n", rc);
  400. goto clk_err;
  401. }
  402. rc = msm_dss_clk_set_rate(mp->clk_config, mp->num_clk);
  403. if (rc) {
  404. pr_err("clock set rate failed rc=%d\n", rc);
  405. goto bus_err;
  406. }
  407. rc = sde_power_reg_bus_parse(pdev, phandle);
  408. if (rc) {
  409. pr_err("register bus parse failed rc=%d\n", rc);
  410. goto bus_err;
  411. }
  412. for (i = SDE_POWER_HANDLE_DBUS_ID_MNOC;
  413. i < SDE_POWER_HANDLE_DBUS_ID_MAX; i++) {
  414. rc = sde_power_data_bus_parse(pdev,
  415. &phandle->data_bus_handle[i],
  416. data_bus_name[i]);
  417. if (rc) {
  418. pr_err("register data bus parse failed id=%d rc=%d\n",
  419. i, rc);
  420. goto data_bus_err;
  421. }
  422. }
  423. INIT_LIST_HEAD(&phandle->event_list);
  424. phandle->rsc_client = NULL;
  425. phandle->rsc_client_init = false;
  426. mutex_init(&phandle->phandle_lock);
  427. return rc;
  428. data_bus_err:
  429. for (i--; i >= 0; i--)
  430. sde_power_data_bus_unregister(&phandle->data_bus_handle[i]);
  431. sde_power_reg_bus_unregister(phandle->reg_bus_hdl);
  432. bus_err:
  433. msm_dss_put_clk(mp->clk_config, mp->num_clk);
  434. clk_err:
  435. msm_dss_config_vreg(&pdev->dev, mp->vreg_config, mp->num_vreg, 0);
  436. vreg_err:
  437. if (mp->vreg_config)
  438. devm_kfree(&pdev->dev, mp->vreg_config);
  439. mp->num_vreg = 0;
  440. parse_vreg_err:
  441. if (mp->clk_config)
  442. devm_kfree(&pdev->dev, mp->clk_config);
  443. mp->num_clk = 0;
  444. end:
  445. return rc;
  446. }
  447. void sde_power_resource_deinit(struct platform_device *pdev,
  448. struct sde_power_handle *phandle)
  449. {
  450. struct dss_module_power *mp;
  451. struct sde_power_event *curr_event, *next_event;
  452. int i;
  453. if (!phandle || !pdev) {
  454. pr_err("invalid input param\n");
  455. return;
  456. }
  457. mp = &phandle->mp;
  458. mutex_lock(&phandle->phandle_lock);
  459. list_for_each_entry_safe(curr_event, next_event,
  460. &phandle->event_list, list) {
  461. pr_err("event:%d, client:%s still registered\n",
  462. curr_event->event_type,
  463. curr_event->client_name);
  464. curr_event->active = false;
  465. list_del(&curr_event->list);
  466. }
  467. mutex_unlock(&phandle->phandle_lock);
  468. for (i = 0; i < SDE_POWER_HANDLE_DBUS_ID_MAX; i++)
  469. sde_power_data_bus_unregister(&phandle->data_bus_handle[i]);
  470. sde_power_reg_bus_unregister(phandle->reg_bus_hdl);
  471. msm_dss_put_clk(mp->clk_config, mp->num_clk);
  472. msm_dss_config_vreg(&pdev->dev, mp->vreg_config, mp->num_vreg, 0);
  473. if (mp->clk_config)
  474. devm_kfree(&pdev->dev, mp->clk_config);
  475. if (mp->vreg_config)
  476. devm_kfree(&pdev->dev, mp->vreg_config);
  477. mp->num_vreg = 0;
  478. mp->num_clk = 0;
  479. if (phandle->rsc_client)
  480. sde_rsc_client_destroy(phandle->rsc_client);
  481. }
  482. int sde_power_scale_reg_bus(struct sde_power_handle *phandle,
  483. u32 usecase_ndx, bool skip_lock)
  484. {
  485. int rc = 0;
  486. if (!skip_lock)
  487. mutex_lock(&phandle->phandle_lock);
  488. pr_debug("%pS: requested:%d\n",
  489. __builtin_return_address(0), usecase_ndx);
  490. rc = sde_power_reg_bus_update(phandle->reg_bus_hdl,
  491. usecase_ndx);
  492. if (rc)
  493. pr_err("failed to set reg bus vote rc=%d\n", rc);
  494. else {
  495. phandle->reg_bus_curr_val.ab =
  496. sde_reg_bus_table[usecase_ndx].ab;
  497. phandle->reg_bus_curr_val.ib =
  498. sde_reg_bus_table[usecase_ndx].ib;
  499. phandle->current_usecase_ndx = usecase_ndx;
  500. }
  501. if (!skip_lock)
  502. mutex_unlock(&phandle->phandle_lock);
  503. return rc;
  504. }
  505. static inline bool _resource_changed(u32 current_usecase_ndx,
  506. u32 max_usecase_ndx)
  507. {
  508. WARN_ON((current_usecase_ndx >= VOTE_INDEX_MAX)
  509. || (max_usecase_ndx >= VOTE_INDEX_MAX));
  510. if (((current_usecase_ndx >= VOTE_INDEX_LOW) && /* enabled */
  511. (max_usecase_ndx == VOTE_INDEX_DISABLE)) || /* max disabled */
  512. ((current_usecase_ndx == VOTE_INDEX_DISABLE) && /* disabled */
  513. (max_usecase_ndx >= VOTE_INDEX_LOW))) /* max enabled */
  514. return true;
  515. return false;
  516. }
  517. int sde_power_resource_enable(struct sde_power_handle *phandle, bool enable)
  518. {
  519. int rc = 0, i = 0;
  520. struct dss_module_power *mp;
  521. if (!phandle) {
  522. pr_err("invalid input argument\n");
  523. return -EINVAL;
  524. }
  525. mp = &phandle->mp;
  526. mutex_lock(&phandle->phandle_lock);
  527. pr_debug("enable:%d\n", enable);
  528. SDE_ATRACE_BEGIN("sde_power_resource_enable");
  529. /* RSC client init */
  530. sde_power_rsc_client_init(phandle);
  531. if (enable) {
  532. sde_power_event_trigger_locked(phandle,
  533. SDE_POWER_EVENT_PRE_ENABLE);
  534. for (i = 0; i < SDE_POWER_HANDLE_DBUS_ID_MAX &&
  535. phandle->data_bus_handle[i].data_paths_cnt > 0; i++) {
  536. rc = _sde_power_data_bus_set_quota(
  537. &phandle->data_bus_handle[i],
  538. SDE_POWER_HANDLE_ENABLE_BUS_AB_QUOTA,
  539. SDE_POWER_HANDLE_ENABLE_BUS_IB_QUOTA);
  540. if (rc) {
  541. pr_err("failed to set data bus vote id=%d rc=%d\n",
  542. i, rc);
  543. goto vreg_err;
  544. }
  545. }
  546. rc = msm_dss_enable_vreg(mp->vreg_config, mp->num_vreg,
  547. enable);
  548. if (rc) {
  549. pr_err("failed to enable vregs rc=%d\n", rc);
  550. goto vreg_err;
  551. }
  552. rc = sde_power_scale_reg_bus(phandle, VOTE_INDEX_LOW, true);
  553. if (rc) {
  554. pr_err("failed to set reg bus vote rc=%d\n", rc);
  555. goto reg_bus_hdl_err;
  556. }
  557. SDE_EVT32_VERBOSE(enable, SDE_EVTLOG_FUNC_CASE1);
  558. rc = sde_power_rsc_update(phandle, true);
  559. if (rc) {
  560. pr_err("failed to update rsc\n");
  561. goto rsc_err;
  562. }
  563. rc = msm_dss_enable_clk(mp->clk_config, mp->num_clk, enable);
  564. if (rc) {
  565. pr_err("clock enable failed rc:%d\n", rc);
  566. goto clk_err;
  567. }
  568. sde_power_event_trigger_locked(phandle,
  569. SDE_POWER_EVENT_POST_ENABLE);
  570. } else {
  571. sde_power_event_trigger_locked(phandle,
  572. SDE_POWER_EVENT_PRE_DISABLE);
  573. SDE_EVT32_VERBOSE(enable, SDE_EVTLOG_FUNC_CASE2);
  574. sde_power_rsc_update(phandle, false);
  575. msm_dss_enable_clk(mp->clk_config, mp->num_clk, enable);
  576. sde_power_scale_reg_bus(phandle, VOTE_INDEX_DISABLE, true);
  577. msm_dss_enable_vreg(mp->vreg_config, mp->num_vreg, enable);
  578. for (i = SDE_POWER_HANDLE_DBUS_ID_MAX - 1; i >= 0; i--)
  579. if (phandle->data_bus_handle[i].data_paths_cnt > 0)
  580. _sde_power_data_bus_set_quota(
  581. &phandle->data_bus_handle[i],
  582. SDE_POWER_HANDLE_DISABLE_BUS_AB_QUOTA,
  583. SDE_POWER_HANDLE_DISABLE_BUS_IB_QUOTA);
  584. sde_power_event_trigger_locked(phandle,
  585. SDE_POWER_EVENT_POST_DISABLE);
  586. }
  587. SDE_EVT32_VERBOSE(enable, SDE_EVTLOG_FUNC_EXIT);
  588. SDE_ATRACE_END("sde_power_resource_enable");
  589. mutex_unlock(&phandle->phandle_lock);
  590. return rc;
  591. clk_err:
  592. sde_power_rsc_update(phandle, false);
  593. rsc_err:
  594. sde_power_scale_reg_bus(phandle, VOTE_INDEX_DISABLE, true);
  595. reg_bus_hdl_err:
  596. msm_dss_enable_vreg(mp->vreg_config, mp->num_vreg, 0);
  597. vreg_err:
  598. for (i-- ; i >= 0 && phandle->data_bus_handle[i].data_paths_cnt > 0; i--)
  599. _sde_power_data_bus_set_quota(
  600. &phandle->data_bus_handle[i],
  601. SDE_POWER_HANDLE_DISABLE_BUS_AB_QUOTA,
  602. SDE_POWER_HANDLE_DISABLE_BUS_IB_QUOTA);
  603. SDE_ATRACE_END("sde_power_resource_enable");
  604. mutex_unlock(&phandle->phandle_lock);
  605. return rc;
  606. }
  607. int sde_power_clk_set_rate(struct sde_power_handle *phandle, char *clock_name,
  608. u64 rate)
  609. {
  610. int i, rc = -EINVAL;
  611. struct dss_module_power *mp;
  612. if (!phandle) {
  613. pr_err("invalid input power handle\n");
  614. return -EINVAL;
  615. }
  616. mp = &phandle->mp;
  617. for (i = 0; i < mp->num_clk; i++) {
  618. if (!strcmp(mp->clk_config[i].clk_name, clock_name)) {
  619. if (mp->clk_config[i].max_rate &&
  620. (rate > mp->clk_config[i].max_rate))
  621. rate = mp->clk_config[i].max_rate;
  622. mp->clk_config[i].rate = rate;
  623. rc = msm_dss_single_clk_set_rate(&mp->clk_config[i]);
  624. break;
  625. }
  626. }
  627. return rc;
  628. }
  629. u64 sde_power_clk_get_rate(struct sde_power_handle *phandle, char *clock_name)
  630. {
  631. int i;
  632. struct dss_module_power *mp;
  633. u64 rate = -EINVAL;
  634. if (!phandle) {
  635. pr_err("invalid input power handle\n");
  636. return -EINVAL;
  637. }
  638. mp = &phandle->mp;
  639. for (i = 0; i < mp->num_clk; i++) {
  640. if (!strcmp(mp->clk_config[i].clk_name, clock_name)) {
  641. rate = clk_get_rate(mp->clk_config[i].clk);
  642. break;
  643. }
  644. }
  645. return rate;
  646. }
  647. u64 sde_power_clk_get_max_rate(struct sde_power_handle *phandle,
  648. char *clock_name)
  649. {
  650. int i;
  651. struct dss_module_power *mp;
  652. u64 rate = 0;
  653. if (!phandle) {
  654. pr_err("invalid input power handle\n");
  655. return 0;
  656. }
  657. mp = &phandle->mp;
  658. for (i = 0; i < mp->num_clk; i++) {
  659. if (!strcmp(mp->clk_config[i].clk_name, clock_name)) {
  660. rate = mp->clk_config[i].max_rate;
  661. break;
  662. }
  663. }
  664. return rate;
  665. }
  666. struct clk *sde_power_clk_get_clk(struct sde_power_handle *phandle,
  667. char *clock_name)
  668. {
  669. int i;
  670. struct dss_module_power *mp;
  671. struct clk *clk = NULL;
  672. if (!phandle) {
  673. pr_err("invalid input power handle\n");
  674. return 0;
  675. }
  676. mp = &phandle->mp;
  677. for (i = 0; i < mp->num_clk; i++) {
  678. if (!strcmp(mp->clk_config[i].clk_name, clock_name)) {
  679. clk = mp->clk_config[i].clk;
  680. break;
  681. }
  682. }
  683. return clk;
  684. }
  685. struct sde_power_event *sde_power_handle_register_event(
  686. struct sde_power_handle *phandle,
  687. u32 event_type, void (*cb_fnc)(u32 event_type, void *usr),
  688. void *usr, char *client_name)
  689. {
  690. struct sde_power_event *event;
  691. if (!phandle) {
  692. pr_err("invalid power handle\n");
  693. return ERR_PTR(-EINVAL);
  694. } else if (!cb_fnc || !event_type) {
  695. pr_err("no callback fnc or event type\n");
  696. return ERR_PTR(-EINVAL);
  697. }
  698. event = kzalloc(sizeof(struct sde_power_event), GFP_KERNEL);
  699. if (!event)
  700. return ERR_PTR(-ENOMEM);
  701. event->event_type = event_type;
  702. event->cb_fnc = cb_fnc;
  703. event->usr = usr;
  704. strlcpy(event->client_name, client_name, MAX_CLIENT_NAME_LEN);
  705. event->active = true;
  706. mutex_lock(&phandle->phandle_lock);
  707. list_add(&event->list, &phandle->event_list);
  708. mutex_unlock(&phandle->phandle_lock);
  709. return event;
  710. }
  711. void sde_power_handle_unregister_event(
  712. struct sde_power_handle *phandle,
  713. struct sde_power_event *event)
  714. {
  715. if (!phandle || !event) {
  716. pr_err("invalid phandle or event\n");
  717. } else if (!event->active) {
  718. pr_err("power handle deinit already done\n");
  719. kfree(event);
  720. } else {
  721. mutex_lock(&phandle->phandle_lock);
  722. list_del_init(&event->list);
  723. mutex_unlock(&phandle->phandle_lock);
  724. kfree(event);
  725. }
  726. }