6758a546bc
WCN6450 is a chip based on Rhine architecture. Unlike LI/BE targets,
chipsets based on Rhine (RH) do not have host facing UMAC HW blocks.
Their corresponding SRNG interfaces are also removed. The functionality
of these UMAC HW blocks is replaced with a software implementation in
the firmware. Communication between the driver and firmware will happen
over copy engine (CE).
Although there are no host facing UMAC HW blocks, the CE hardware used
in WCN6450 expects the host driver to use the TX descriptor (HW) format
of LI targets during TX packet enqueue. Therefore it is required to
create a new pool of TX descriptors (HW) pool for WCN6450 that is used
during TX.
The logic to create/free/init/deinit these descriptors is specific
to WCN6450/Rhine, therefore it is implemented in architecture specific
Rhine code.
Introduce new APIs in struct dp_arch_ops {} to allocate and free
arch specific TX descriptors. These ops will be no-op for LI/BE
architectures.
Also for Rhine targets, allocate/free other TX descriptors like TX EXT &
TSO descriptors as part of the arch APIs.
Change-Id: I452ac69143395881ab8580355a0f75571dc3e929
CRs-Fixed: 3381711
130 lignes
4.1 KiB
C
130 lignes
4.1 KiB
C
/*
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* Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
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* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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* above copyright notice and this permission notice appear in all
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* copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
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* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
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* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
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* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
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* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
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* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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* PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef __DP_LI_TX_H
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#define __DP_LI_TX_H
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#include <dp_types.h>
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/**
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* dp_tx_hw_enqueue_li() - Enqueue to TCL HW for transmit
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* @soc: DP Soc Handle
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* @vdev: DP vdev handle
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* @tx_desc: Tx Descriptor Handle
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* @fw_metadata: Metadata to send to Target Firmware along with frame
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* @tx_exc_metadata: Handle that holds exception path meta data
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* @msdu_info: MSDU information
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*
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* Gets the next free TCL HW DMA descriptor and sets up required parameters
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* from software Tx descriptor
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*
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* Return: QDF_STATUS_SUCCESS: success
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* QDF_STATUS_E_RESOURCES: Error return
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*/
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QDF_STATUS
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dp_tx_hw_enqueue_li(struct dp_soc *soc, struct dp_vdev *vdev,
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struct dp_tx_desc_s *tx_desc, uint16_t fw_metadata,
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struct cdp_tx_exception_metadata *tx_exc_metadata,
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struct dp_tx_msdu_info_s *msdu_info);
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/**
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* dp_tx_comp_get_params_from_hal_desc_li() - Get TX desc from HAL comp desc
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* @soc: DP soc handle
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* @tx_comp_hal_desc: HAL TX Comp Descriptor
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* @r_tx_desc: SW Tx Descriptor retrieved from HAL desc.
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*
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* Return: None
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*/
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void dp_tx_comp_get_params_from_hal_desc_li(struct dp_soc *soc,
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void *tx_comp_hal_desc,
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struct dp_tx_desc_s **r_tx_desc);
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/**
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* dp_tx_process_htt_completion_li() - Tx HTT Completion Indication Handler
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* @soc: Handle to DP soc structure
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* @tx_desc: software descriptor head pointer
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* @status: Tx completion status from HTT descriptor
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* @ring_id: ring number
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*
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* This function will process HTT Tx indication messages from Target
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*
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* Return: none
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*/
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void dp_tx_process_htt_completion_li(struct dp_soc *soc,
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struct dp_tx_desc_s *tx_desc,
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uint8_t *status,
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uint8_t ring_id);
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/**
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* dp_tx_desc_pool_init_li() - Initialize Tx Descriptor pool(s)
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* @soc: Handle to DP Soc structure
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* @num_elem: pool descriptor number
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* @pool_id: pool to allocate
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*
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* Return: QDF_STATUS_SUCCESS - success, others - failure
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*/
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QDF_STATUS dp_tx_desc_pool_init_li(struct dp_soc *soc,
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uint32_t num_elem,
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uint8_t pool_id);
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/**
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* dp_tx_desc_pool_deinit_li() - De-initialize Tx Descriptor pool(s)
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* @soc: Handle to DP Soc structure
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* @tx_desc_pool: Tx descriptor pool handler
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* @pool_id: pool to deinit
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*
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* Return: None.
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*/
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void dp_tx_desc_pool_deinit_li(struct dp_soc *soc,
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struct dp_tx_desc_pool_s *tx_desc_pool,
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uint8_t pool_id);
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/**
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* dp_tx_compute_tx_delay_li() - Compute HW Tx completion delay
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* @soc: Handle to DP Soc structure
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* @vdev: vdev
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* @ts: Tx completion status
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* @delay_us: Delay to be calculated in microseconds
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*
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* Return: QDF_STATUS
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*/
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QDF_STATUS dp_tx_compute_tx_delay_li(struct dp_soc *soc,
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struct dp_vdev *vdev,
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struct hal_tx_completion_status *ts,
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uint32_t *delay_us);
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/**
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* dp_tx_desc_pool_alloc_li() - Allocate TX descriptor pool
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* @soc: Handle to DP Soc structure
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* @num_elem: Number of elements to allocate
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* @pool_id: TCL descriptor pool ID
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*
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* Return: QDF_STATUS
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*/
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QDF_STATUS dp_tx_desc_pool_alloc_li(struct dp_soc *soc, uint32_t num_elem,
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uint8_t pool_id);
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/**
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* dp_tx_desc_pool_free_li() - Free TX descriptor pool
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* @soc: Handle to DP Soc structure
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* @pool_id: TCL descriptor pool ID
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*
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* Return: none
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*/
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void dp_tx_desc_pool_free_li(struct dp_soc *soc, uint8_t pool_id);
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#endif
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