sde_rm.c 53 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
  4. */
  5. #define pr_fmt(fmt) "[drm:%s] " fmt, __func__
  6. #include "sde_kms.h"
  7. #include "sde_hw_lm.h"
  8. #include "sde_hw_ctl.h"
  9. #include "sde_hw_cdm.h"
  10. #include "sde_hw_dspp.h"
  11. #include "sde_hw_ds.h"
  12. #include "sde_hw_pingpong.h"
  13. #include "sde_hw_intf.h"
  14. #include "sde_hw_wb.h"
  15. #include "sde_encoder.h"
  16. #include "sde_connector.h"
  17. #include "sde_hw_dsc.h"
  18. #include "sde_crtc.h"
  19. #include "sde_hw_qdss.h"
  20. #define RESERVED_BY_OTHER(h, r) \
  21. (((h)->rsvp && ((h)->rsvp->enc_id != (r)->enc_id)) ||\
  22. ((h)->rsvp_nxt && ((h)->rsvp_nxt->enc_id != (r)->enc_id)))
  23. #define RM_RQ_LOCK(r) ((r)->top_ctrl & BIT(SDE_RM_TOPCTL_RESERVE_LOCK))
  24. #define RM_RQ_CLEAR(r) ((r)->top_ctrl & BIT(SDE_RM_TOPCTL_RESERVE_CLEAR))
  25. #define RM_RQ_DSPP(r) ((r)->top_ctrl & BIT(SDE_RM_TOPCTL_DSPP))
  26. #define RM_RQ_DS(r) ((r)->top_ctrl & BIT(SDE_RM_TOPCTL_DS))
  27. #define RM_RQ_CWB(r) ((r)->top_ctrl & BIT(SDE_RM_TOPCTL_CWB))
  28. #define RM_IS_TOPOLOGY_MATCH(t, r) ((t).num_lm == (r).num_lm && \
  29. (t).num_comp_enc == (r).num_enc && \
  30. (t).num_intf == (r).num_intf)
  31. /**
  32. * toplogy information to be used when ctl path version does not
  33. * support driving more than one interface per ctl_path
  34. */
  35. static const struct sde_rm_topology_def g_top_table[] = {
  36. { SDE_RM_TOPOLOGY_NONE, 0, 0, 0, 0, false },
  37. { SDE_RM_TOPOLOGY_SINGLEPIPE, 1, 0, 1, 1, false },
  38. { SDE_RM_TOPOLOGY_SINGLEPIPE_DSC, 1, 1, 1, 1, false },
  39. { SDE_RM_TOPOLOGY_DUALPIPE, 2, 0, 2, 2, true },
  40. { SDE_RM_TOPOLOGY_DUALPIPE_DSC, 2, 2, 2, 2, true },
  41. { SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE, 2, 0, 1, 1, false },
  42. { SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE_DSC, 2, 1, 1, 1, false },
  43. { SDE_RM_TOPOLOGY_DUALPIPE_DSCMERGE, 2, 2, 1, 1, false },
  44. { SDE_RM_TOPOLOGY_PPSPLIT, 1, 0, 2, 1, true },
  45. };
  46. /**
  47. * topology information to be used when the ctl path version
  48. * is SDE_CTL_CFG_VERSION_1_0_0
  49. */
  50. static const struct sde_rm_topology_def g_ctl_ver_1_top_table[] = {
  51. { SDE_RM_TOPOLOGY_NONE, 0, 0, 0, 0, false },
  52. { SDE_RM_TOPOLOGY_SINGLEPIPE, 1, 0, 1, 1, false },
  53. { SDE_RM_TOPOLOGY_SINGLEPIPE_DSC, 1, 1, 1, 1, false },
  54. { SDE_RM_TOPOLOGY_DUALPIPE, 2, 0, 2, 1, true },
  55. { SDE_RM_TOPOLOGY_DUALPIPE_DSC, 2, 2, 2, 1, true },
  56. { SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE, 2, 0, 1, 1, false },
  57. { SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE_DSC, 2, 1, 1, 1, false },
  58. { SDE_RM_TOPOLOGY_DUALPIPE_DSCMERGE, 2, 2, 1, 1, false },
  59. { SDE_RM_TOPOLOGY_PPSPLIT, 1, 0, 2, 1, true },
  60. };
  61. /**
  62. * struct sde_rm_requirements - Reservation requirements parameter bundle
  63. * @top_ctrl: topology control preference from kernel client
  64. * @top: selected topology for the display
  65. * @hw_res: Hardware resources required as reported by the encoders
  66. */
  67. struct sde_rm_requirements {
  68. uint64_t top_ctrl;
  69. const struct sde_rm_topology_def *topology;
  70. struct sde_encoder_hw_resources hw_res;
  71. };
  72. /**
  73. * struct sde_rm_rsvp - Use Case Reservation tagging structure
  74. * Used to tag HW blocks as reserved by a CRTC->Encoder->Connector chain
  75. * By using as a tag, rather than lists of pointers to HW blocks used
  76. * we can avoid some list management since we don't know how many blocks
  77. * of each type a given use case may require.
  78. * @list: List head for list of all reservations
  79. * @seq: Global RSVP sequence number for debugging, especially for
  80. * differentiating differenct allocations for same encoder.
  81. * @enc_id: Reservations are tracked by Encoder DRM object ID.
  82. * CRTCs may be connected to multiple Encoders.
  83. * An encoder or connector id identifies the display path.
  84. * @topology DRM<->HW topology use case
  85. */
  86. struct sde_rm_rsvp {
  87. struct list_head list;
  88. uint32_t seq;
  89. uint32_t enc_id;
  90. enum sde_rm_topology_name topology;
  91. };
  92. /**
  93. * struct sde_rm_hw_blk - hardware block tracking list member
  94. * @list: List head for list of all hardware blocks tracking items
  95. * @rsvp: Pointer to use case reservation if reserved by a client
  96. * @rsvp_nxt: Temporary pointer used during reservation to the incoming
  97. * request. Will be swapped into rsvp if proposal is accepted
  98. * @type: Type of hardware block this structure tracks
  99. * @id: Hardware ID number, within it's own space, ie. LM_X
  100. * @catalog: Pointer to the hardware catalog entry for this block
  101. * @hw: Pointer to the hardware register access object for this block
  102. */
  103. struct sde_rm_hw_blk {
  104. struct list_head list;
  105. struct sde_rm_rsvp *rsvp;
  106. struct sde_rm_rsvp *rsvp_nxt;
  107. enum sde_hw_blk_type type;
  108. uint32_t id;
  109. struct sde_hw_blk *hw;
  110. };
  111. /**
  112. * sde_rm_dbg_rsvp_stage - enum of steps in making reservation for event logging
  113. */
  114. enum sde_rm_dbg_rsvp_stage {
  115. SDE_RM_STAGE_BEGIN,
  116. SDE_RM_STAGE_AFTER_CLEAR,
  117. SDE_RM_STAGE_AFTER_RSVPNEXT,
  118. SDE_RM_STAGE_FINAL
  119. };
  120. static void _sde_rm_inc_resource_info_lm(struct sde_rm *rm,
  121. struct msm_resource_caps_info *avail_res,
  122. struct sde_rm_hw_blk *blk)
  123. {
  124. struct sde_rm_hw_blk *blk2;
  125. const struct sde_lm_cfg *lm_cfg, *lm_cfg2;
  126. avail_res->num_lm++;
  127. lm_cfg = to_sde_hw_mixer(blk->hw)->cap;
  128. /* Check for 3d muxes by comparing paired lms */
  129. list_for_each_entry(blk2, &rm->hw_blks[SDE_HW_BLK_LM], list) {
  130. lm_cfg2 = to_sde_hw_mixer(blk2->hw)->cap;
  131. /*
  132. * If lm2 is free, or
  133. * lm1 & lm2 reserved by same enc, check mask
  134. */
  135. if ((!blk2->rsvp || (blk->rsvp &&
  136. blk2->rsvp->enc_id == blk->rsvp->enc_id
  137. && lm_cfg->id > lm_cfg2->id)) &&
  138. test_bit(lm_cfg->id, &lm_cfg2->lm_pair_mask))
  139. avail_res->num_3dmux++;
  140. }
  141. }
  142. static void _sde_rm_dec_resource_info_lm(struct sde_rm *rm,
  143. struct msm_resource_caps_info *avail_res,
  144. struct sde_rm_hw_blk *blk)
  145. {
  146. struct sde_rm_hw_blk *blk2;
  147. const struct sde_lm_cfg *lm_cfg, *lm_cfg2;
  148. avail_res->num_lm--;
  149. lm_cfg = to_sde_hw_mixer(blk->hw)->cap;
  150. /* Check for 3d muxes by comparing paired lms */
  151. list_for_each_entry(blk2, &rm->hw_blks[SDE_HW_BLK_LM], list) {
  152. lm_cfg2 = to_sde_hw_mixer(blk2->hw)->cap;
  153. /* If lm2 is free and lm1 is now being reserved */
  154. if (!blk2->rsvp &&
  155. test_bit(lm_cfg->id, &lm_cfg2->lm_pair_mask))
  156. avail_res->num_3dmux--;
  157. }
  158. }
  159. static void _sde_rm_inc_resource_info(struct sde_rm *rm,
  160. struct msm_resource_caps_info *avail_res,
  161. struct sde_rm_hw_blk *blk)
  162. {
  163. enum sde_hw_blk_type type = blk->type;
  164. if (type == SDE_HW_BLK_LM)
  165. _sde_rm_inc_resource_info_lm(rm, avail_res, blk);
  166. else if (type == SDE_HW_BLK_CTL)
  167. avail_res->num_ctl++;
  168. else if (type == SDE_HW_BLK_DSC)
  169. avail_res->num_dsc++;
  170. }
  171. static void _sde_rm_dec_resource_info(struct sde_rm *rm,
  172. struct msm_resource_caps_info *avail_res,
  173. struct sde_rm_hw_blk *blk)
  174. {
  175. enum sde_hw_blk_type type = blk->type;
  176. if (type == SDE_HW_BLK_LM)
  177. _sde_rm_dec_resource_info_lm(rm, avail_res, blk);
  178. else if (type == SDE_HW_BLK_CTL)
  179. avail_res->num_ctl--;
  180. else if (type == SDE_HW_BLK_DSC)
  181. avail_res->num_dsc--;
  182. }
  183. void sde_rm_get_resource_info(struct sde_rm *rm,
  184. struct drm_encoder *drm_enc,
  185. struct msm_resource_caps_info *avail_res)
  186. {
  187. struct sde_rm_hw_blk *blk;
  188. enum sde_hw_blk_type type;
  189. struct sde_rm_rsvp rsvp;
  190. memcpy(avail_res, &rm->avail_res,
  191. sizeof(rm->avail_res));
  192. if (!drm_enc)
  193. return;
  194. rsvp.enc_id = drm_enc->base.id;
  195. for (type = 0; type < SDE_HW_BLK_MAX; type++)
  196. list_for_each_entry(blk, &rm->hw_blks[type], list)
  197. if (blk->rsvp && blk->rsvp->enc_id == rsvp.enc_id)
  198. _sde_rm_inc_resource_info(rm, avail_res, blk);
  199. }
  200. static void _sde_rm_print_rsvps(
  201. struct sde_rm *rm,
  202. enum sde_rm_dbg_rsvp_stage stage)
  203. {
  204. struct sde_rm_rsvp *rsvp;
  205. struct sde_rm_hw_blk *blk;
  206. enum sde_hw_blk_type type;
  207. SDE_DEBUG("%d\n", stage);
  208. list_for_each_entry(rsvp, &rm->rsvps, list) {
  209. SDE_DEBUG("%d rsvp[s%ue%u] topology %d\n", stage, rsvp->seq,
  210. rsvp->enc_id, rsvp->topology);
  211. SDE_EVT32(stage, rsvp->seq, rsvp->enc_id, rsvp->topology);
  212. }
  213. for (type = 0; type < SDE_HW_BLK_MAX; type++) {
  214. list_for_each_entry(blk, &rm->hw_blks[type], list) {
  215. if (!blk->rsvp && !blk->rsvp_nxt)
  216. continue;
  217. SDE_DEBUG("%d rsvp[s%ue%u->s%ue%u] %d %d\n", stage,
  218. (blk->rsvp) ? blk->rsvp->seq : 0,
  219. (blk->rsvp) ? blk->rsvp->enc_id : 0,
  220. (blk->rsvp_nxt) ? blk->rsvp_nxt->seq : 0,
  221. (blk->rsvp_nxt) ? blk->rsvp_nxt->enc_id : 0,
  222. blk->type, blk->id);
  223. SDE_EVT32(stage,
  224. (blk->rsvp) ? blk->rsvp->seq : 0,
  225. (blk->rsvp) ? blk->rsvp->enc_id : 0,
  226. (blk->rsvp_nxt) ? blk->rsvp_nxt->seq : 0,
  227. (blk->rsvp_nxt) ? blk->rsvp_nxt->enc_id : 0,
  228. blk->type, blk->id);
  229. }
  230. }
  231. }
  232. struct sde_hw_mdp *sde_rm_get_mdp(struct sde_rm *rm)
  233. {
  234. return rm->hw_mdp;
  235. }
  236. void sde_rm_init_hw_iter(
  237. struct sde_rm_hw_iter *iter,
  238. uint32_t enc_id,
  239. enum sde_hw_blk_type type)
  240. {
  241. memset(iter, 0, sizeof(*iter));
  242. iter->enc_id = enc_id;
  243. iter->type = type;
  244. }
  245. enum sde_rm_topology_name sde_rm_get_topology_name(
  246. struct msm_display_topology topology)
  247. {
  248. int i;
  249. for (i = 0; i < SDE_RM_TOPOLOGY_MAX; i++)
  250. if (RM_IS_TOPOLOGY_MATCH(g_top_table[i], topology))
  251. return g_top_table[i].top_name;
  252. return SDE_RM_TOPOLOGY_NONE;
  253. }
  254. static bool _sde_rm_get_hw_locked(struct sde_rm *rm, struct sde_rm_hw_iter *i)
  255. {
  256. struct list_head *blk_list;
  257. if (!rm || !i || i->type >= SDE_HW_BLK_MAX) {
  258. SDE_ERROR("invalid rm\n");
  259. return false;
  260. }
  261. i->hw = NULL;
  262. blk_list = &rm->hw_blks[i->type];
  263. if (i->blk && (&i->blk->list == blk_list)) {
  264. SDE_DEBUG("attempt resume iteration past last\n");
  265. return false;
  266. }
  267. i->blk = list_prepare_entry(i->blk, blk_list, list);
  268. list_for_each_entry_continue(i->blk, blk_list, list) {
  269. struct sde_rm_rsvp *rsvp = i->blk->rsvp;
  270. if (i->blk->type != i->type) {
  271. SDE_ERROR("found incorrect block type %d on %d list\n",
  272. i->blk->type, i->type);
  273. return false;
  274. }
  275. if ((i->enc_id == 0) || (rsvp && rsvp->enc_id == i->enc_id)) {
  276. i->hw = i->blk->hw;
  277. SDE_DEBUG("found type %d id %d for enc %d\n",
  278. i->type, i->blk->id, i->enc_id);
  279. return true;
  280. }
  281. }
  282. SDE_DEBUG("no match, type %d for enc %d\n", i->type, i->enc_id);
  283. return false;
  284. }
  285. static bool _sde_rm_request_hw_blk_locked(struct sde_rm *rm,
  286. struct sde_rm_hw_request *hw_blk_info)
  287. {
  288. struct list_head *blk_list;
  289. struct sde_rm_hw_blk *blk = NULL;
  290. if (!rm || !hw_blk_info || hw_blk_info->type >= SDE_HW_BLK_MAX) {
  291. SDE_ERROR("invalid rm\n");
  292. return false;
  293. }
  294. hw_blk_info->hw = NULL;
  295. blk_list = &rm->hw_blks[hw_blk_info->type];
  296. blk = list_prepare_entry(blk, blk_list, list);
  297. list_for_each_entry_continue(blk, blk_list, list) {
  298. if (blk->type != hw_blk_info->type) {
  299. SDE_ERROR("found incorrect block type %d on %d list\n",
  300. blk->type, hw_blk_info->type);
  301. return false;
  302. }
  303. if (blk->hw->id == hw_blk_info->id) {
  304. hw_blk_info->hw = blk->hw;
  305. SDE_DEBUG("found type %d id %d\n",
  306. blk->type, blk->id);
  307. return true;
  308. }
  309. }
  310. SDE_DEBUG("no match, type %d id %d\n", hw_blk_info->type,
  311. hw_blk_info->id);
  312. return false;
  313. }
  314. bool sde_rm_get_hw(struct sde_rm *rm, struct sde_rm_hw_iter *i)
  315. {
  316. bool ret;
  317. mutex_lock(&rm->rm_lock);
  318. ret = _sde_rm_get_hw_locked(rm, i);
  319. mutex_unlock(&rm->rm_lock);
  320. return ret;
  321. }
  322. bool sde_rm_request_hw_blk(struct sde_rm *rm, struct sde_rm_hw_request *hw)
  323. {
  324. bool ret;
  325. mutex_lock(&rm->rm_lock);
  326. ret = _sde_rm_request_hw_blk_locked(rm, hw);
  327. mutex_unlock(&rm->rm_lock);
  328. return ret;
  329. }
  330. static void _sde_rm_hw_destroy(enum sde_hw_blk_type type, void *hw)
  331. {
  332. switch (type) {
  333. case SDE_HW_BLK_LM:
  334. sde_hw_lm_destroy(hw);
  335. break;
  336. case SDE_HW_BLK_DSPP:
  337. sde_hw_dspp_destroy(hw);
  338. break;
  339. case SDE_HW_BLK_DS:
  340. sde_hw_ds_destroy(hw);
  341. break;
  342. case SDE_HW_BLK_CTL:
  343. sde_hw_ctl_destroy(hw);
  344. break;
  345. case SDE_HW_BLK_CDM:
  346. sde_hw_cdm_destroy(hw);
  347. break;
  348. case SDE_HW_BLK_PINGPONG:
  349. sde_hw_pingpong_destroy(hw);
  350. break;
  351. case SDE_HW_BLK_INTF:
  352. sde_hw_intf_destroy(hw);
  353. break;
  354. case SDE_HW_BLK_WB:
  355. sde_hw_wb_destroy(hw);
  356. break;
  357. case SDE_HW_BLK_DSC:
  358. sde_hw_dsc_destroy(hw);
  359. break;
  360. case SDE_HW_BLK_QDSS:
  361. sde_hw_qdss_destroy(hw);
  362. break;
  363. case SDE_HW_BLK_SSPP:
  364. /* SSPPs are not managed by the resource manager */
  365. case SDE_HW_BLK_TOP:
  366. /* Top is a singleton, not managed in hw_blks list */
  367. case SDE_HW_BLK_MAX:
  368. default:
  369. SDE_ERROR("unsupported block type %d\n", type);
  370. break;
  371. }
  372. }
  373. int sde_rm_destroy(struct sde_rm *rm)
  374. {
  375. struct sde_rm_rsvp *rsvp_cur, *rsvp_nxt;
  376. struct sde_rm_hw_blk *hw_cur, *hw_nxt;
  377. enum sde_hw_blk_type type;
  378. if (!rm) {
  379. SDE_ERROR("invalid rm\n");
  380. return -EINVAL;
  381. }
  382. list_for_each_entry_safe(rsvp_cur, rsvp_nxt, &rm->rsvps, list) {
  383. list_del(&rsvp_cur->list);
  384. kfree(rsvp_cur);
  385. }
  386. for (type = 0; type < SDE_HW_BLK_MAX; type++) {
  387. list_for_each_entry_safe(hw_cur, hw_nxt, &rm->hw_blks[type],
  388. list) {
  389. list_del(&hw_cur->list);
  390. _sde_rm_hw_destroy(hw_cur->type, hw_cur->hw);
  391. kfree(hw_cur);
  392. }
  393. }
  394. sde_hw_mdp_destroy(rm->hw_mdp);
  395. rm->hw_mdp = NULL;
  396. mutex_destroy(&rm->rm_lock);
  397. return 0;
  398. }
  399. static int _sde_rm_hw_blk_create(
  400. struct sde_rm *rm,
  401. struct sde_mdss_cfg *cat,
  402. void __iomem *mmio,
  403. enum sde_hw_blk_type type,
  404. uint32_t id,
  405. void *hw_catalog_info)
  406. {
  407. struct sde_rm_hw_blk *blk;
  408. struct sde_hw_mdp *hw_mdp;
  409. void *hw;
  410. hw_mdp = rm->hw_mdp;
  411. switch (type) {
  412. case SDE_HW_BLK_LM:
  413. hw = sde_hw_lm_init(id, mmio, cat);
  414. break;
  415. case SDE_HW_BLK_DSPP:
  416. hw = sde_hw_dspp_init(id, mmio, cat);
  417. break;
  418. case SDE_HW_BLK_DS:
  419. hw = sde_hw_ds_init(id, mmio, cat);
  420. break;
  421. case SDE_HW_BLK_CTL:
  422. hw = sde_hw_ctl_init(id, mmio, cat);
  423. break;
  424. case SDE_HW_BLK_CDM:
  425. hw = sde_hw_cdm_init(id, mmio, cat, hw_mdp);
  426. break;
  427. case SDE_HW_BLK_PINGPONG:
  428. hw = sde_hw_pingpong_init(id, mmio, cat);
  429. break;
  430. case SDE_HW_BLK_INTF:
  431. hw = sde_hw_intf_init(id, mmio, cat);
  432. break;
  433. case SDE_HW_BLK_WB:
  434. hw = sde_hw_wb_init(id, mmio, cat, hw_mdp);
  435. break;
  436. case SDE_HW_BLK_DSC:
  437. hw = sde_hw_dsc_init(id, mmio, cat);
  438. break;
  439. case SDE_HW_BLK_QDSS:
  440. hw = sde_hw_qdss_init(id, mmio, cat);
  441. break;
  442. case SDE_HW_BLK_SSPP:
  443. /* SSPPs are not managed by the resource manager */
  444. case SDE_HW_BLK_TOP:
  445. /* Top is a singleton, not managed in hw_blks list */
  446. case SDE_HW_BLK_MAX:
  447. default:
  448. SDE_ERROR("unsupported block type %d\n", type);
  449. return -EINVAL;
  450. }
  451. if (IS_ERR_OR_NULL(hw)) {
  452. SDE_ERROR("failed hw object creation: type %d, err %ld\n",
  453. type, PTR_ERR(hw));
  454. return -EFAULT;
  455. }
  456. blk = kzalloc(sizeof(*blk), GFP_KERNEL);
  457. if (!blk) {
  458. _sde_rm_hw_destroy(type, hw);
  459. return -ENOMEM;
  460. }
  461. blk->type = type;
  462. blk->id = id;
  463. blk->hw = hw;
  464. list_add_tail(&blk->list, &rm->hw_blks[type]);
  465. _sde_rm_inc_resource_info(rm, &rm->avail_res, blk);
  466. return 0;
  467. }
  468. static int _sde_rm_hw_blk_create_new(struct sde_rm *rm,
  469. struct sde_mdss_cfg *cat,
  470. void __iomem *mmio)
  471. {
  472. int i, rc = 0;
  473. for (i = 0; i < cat->dspp_count; i++) {
  474. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_DSPP,
  475. cat->dspp[i].id, &cat->dspp[i]);
  476. if (rc) {
  477. SDE_ERROR("failed: dspp hw not available\n");
  478. goto fail;
  479. }
  480. }
  481. if (cat->mdp[0].has_dest_scaler) {
  482. for (i = 0; i < cat->ds_count; i++) {
  483. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_DS,
  484. cat->ds[i].id, &cat->ds[i]);
  485. if (rc) {
  486. SDE_ERROR("failed: ds hw not available\n");
  487. goto fail;
  488. }
  489. }
  490. }
  491. for (i = 0; i < cat->pingpong_count; i++) {
  492. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_PINGPONG,
  493. cat->pingpong[i].id, &cat->pingpong[i]);
  494. if (rc) {
  495. SDE_ERROR("failed: pp hw not available\n");
  496. goto fail;
  497. }
  498. }
  499. for (i = 0; i < cat->dsc_count; i++) {
  500. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_DSC,
  501. cat->dsc[i].id, &cat->dsc[i]);
  502. if (rc) {
  503. SDE_ERROR("failed: dsc hw not available\n");
  504. goto fail;
  505. }
  506. }
  507. for (i = 0; i < cat->intf_count; i++) {
  508. if (cat->intf[i].type == INTF_NONE) {
  509. SDE_DEBUG("skip intf %d with type none\n", i);
  510. continue;
  511. }
  512. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_INTF,
  513. cat->intf[i].id, &cat->intf[i]);
  514. if (rc) {
  515. SDE_ERROR("failed: intf hw not available\n");
  516. goto fail;
  517. }
  518. }
  519. for (i = 0; i < cat->wb_count; i++) {
  520. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_WB,
  521. cat->wb[i].id, &cat->wb[i]);
  522. if (rc) {
  523. SDE_ERROR("failed: wb hw not available\n");
  524. goto fail;
  525. }
  526. }
  527. for (i = 0; i < cat->ctl_count; i++) {
  528. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_CTL,
  529. cat->ctl[i].id, &cat->ctl[i]);
  530. if (rc) {
  531. SDE_ERROR("failed: ctl hw not available\n");
  532. goto fail;
  533. }
  534. }
  535. for (i = 0; i < cat->cdm_count; i++) {
  536. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_CDM,
  537. cat->cdm[i].id, &cat->cdm[i]);
  538. if (rc) {
  539. SDE_ERROR("failed: cdm hw not available\n");
  540. goto fail;
  541. }
  542. }
  543. for (i = 0; i < cat->qdss_count; i++) {
  544. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_QDSS,
  545. cat->qdss[i].id, &cat->qdss[i]);
  546. if (rc) {
  547. SDE_ERROR("failed: qdss hw not available\n");
  548. goto fail;
  549. }
  550. }
  551. fail:
  552. return rc;
  553. }
  554. int sde_rm_init(struct sde_rm *rm,
  555. struct sde_mdss_cfg *cat,
  556. void __iomem *mmio,
  557. struct drm_device *dev)
  558. {
  559. int i, rc = 0;
  560. enum sde_hw_blk_type type;
  561. if (!rm || !cat || !mmio || !dev) {
  562. SDE_ERROR("invalid input params\n");
  563. return -EINVAL;
  564. }
  565. /* Clear, setup lists */
  566. memset(rm, 0, sizeof(*rm));
  567. mutex_init(&rm->rm_lock);
  568. INIT_LIST_HEAD(&rm->rsvps);
  569. for (type = 0; type < SDE_HW_BLK_MAX; type++)
  570. INIT_LIST_HEAD(&rm->hw_blks[type]);
  571. rm->dev = dev;
  572. if (IS_SDE_CTL_REV_100(cat->ctl_rev))
  573. rm->topology_tbl = g_ctl_ver_1_top_table;
  574. else
  575. rm->topology_tbl = g_top_table;
  576. /* Some of the sub-blocks require an mdptop to be created */
  577. rm->hw_mdp = sde_hw_mdptop_init(MDP_TOP, mmio, cat);
  578. if (IS_ERR_OR_NULL(rm->hw_mdp)) {
  579. rc = PTR_ERR(rm->hw_mdp);
  580. rm->hw_mdp = NULL;
  581. SDE_ERROR("failed: mdp hw not available\n");
  582. goto fail;
  583. }
  584. /* Interrogate HW catalog and create tracking items for hw blocks */
  585. for (i = 0; i < cat->mixer_count; i++) {
  586. struct sde_lm_cfg *lm = &cat->mixer[i];
  587. if (lm->pingpong == PINGPONG_MAX) {
  588. SDE_ERROR("mixer %d without pingpong\n", lm->id);
  589. goto fail;
  590. }
  591. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_LM,
  592. cat->mixer[i].id, &cat->mixer[i]);
  593. if (rc) {
  594. SDE_ERROR("failed: lm hw not available\n");
  595. goto fail;
  596. }
  597. if (!rm->lm_max_width) {
  598. rm->lm_max_width = lm->sblk->maxwidth;
  599. } else if (rm->lm_max_width != lm->sblk->maxwidth) {
  600. /*
  601. * Don't expect to have hw where lm max widths differ.
  602. * If found, take the min.
  603. */
  604. SDE_ERROR("unsupported: lm maxwidth differs\n");
  605. if (rm->lm_max_width > lm->sblk->maxwidth)
  606. rm->lm_max_width = lm->sblk->maxwidth;
  607. }
  608. }
  609. rc = _sde_rm_hw_blk_create_new(rm, cat, mmio);
  610. if (!rc)
  611. return 0;
  612. fail:
  613. sde_rm_destroy(rm);
  614. return rc;
  615. }
  616. static bool _sde_rm_check_lm(
  617. struct sde_rm *rm,
  618. struct sde_rm_rsvp *rsvp,
  619. struct sde_rm_requirements *reqs,
  620. const struct sde_lm_cfg *lm_cfg,
  621. struct sde_rm_hw_blk *lm,
  622. struct sde_rm_hw_blk **dspp,
  623. struct sde_rm_hw_blk **ds,
  624. struct sde_rm_hw_blk **pp)
  625. {
  626. bool is_valid_dspp, is_valid_ds, ret;
  627. is_valid_dspp = (lm_cfg->dspp != DSPP_MAX) ? true : false;
  628. is_valid_ds = (lm_cfg->ds != DS_MAX) ? true : false;
  629. /**
  630. * RM_RQ_X: specification of which LMs to choose
  631. * is_valid_X: indicates whether LM is tied with block X
  632. * ret: true if given LM matches the user requirement,
  633. * false otherwise
  634. */
  635. if (RM_RQ_DSPP(reqs) && RM_RQ_DS(reqs))
  636. ret = (is_valid_dspp && is_valid_ds);
  637. else if (RM_RQ_DSPP(reqs))
  638. ret = is_valid_dspp;
  639. else if (RM_RQ_DS(reqs))
  640. ret = is_valid_ds;
  641. else
  642. ret = !(is_valid_dspp || is_valid_ds);
  643. if (!ret) {
  644. SDE_DEBUG(
  645. "fail:lm(%d)req_dspp(%d)dspp(%d)req_ds(%d)ds(%d)\n",
  646. lm_cfg->id, (bool)(RM_RQ_DSPP(reqs)),
  647. lm_cfg->dspp, (bool)(RM_RQ_DS(reqs)),
  648. lm_cfg->ds);
  649. return ret;
  650. }
  651. return true;
  652. }
  653. static bool _sde_rm_reserve_dspp(
  654. struct sde_rm *rm,
  655. struct sde_rm_rsvp *rsvp,
  656. const struct sde_lm_cfg *lm_cfg,
  657. struct sde_rm_hw_blk *lm,
  658. struct sde_rm_hw_blk **dspp)
  659. {
  660. struct sde_rm_hw_iter iter;
  661. if (lm_cfg->dspp != DSPP_MAX) {
  662. sde_rm_init_hw_iter(&iter, 0, SDE_HW_BLK_DSPP);
  663. while (_sde_rm_get_hw_locked(rm, &iter)) {
  664. if (iter.blk->id == lm_cfg->dspp) {
  665. *dspp = iter.blk;
  666. break;
  667. }
  668. }
  669. if (!*dspp) {
  670. SDE_DEBUG("lm %d failed to retrieve dspp %d\n", lm->id,
  671. lm_cfg->dspp);
  672. return false;
  673. }
  674. if (RESERVED_BY_OTHER(*dspp, rsvp)) {
  675. SDE_DEBUG("lm %d dspp %d already reserved\n",
  676. lm->id, (*dspp)->id);
  677. return false;
  678. }
  679. }
  680. return true;
  681. }
  682. static bool _sde_rm_reserve_ds(
  683. struct sde_rm *rm,
  684. struct sde_rm_rsvp *rsvp,
  685. const struct sde_lm_cfg *lm_cfg,
  686. struct sde_rm_hw_blk *lm,
  687. struct sde_rm_hw_blk **ds)
  688. {
  689. struct sde_rm_hw_iter iter;
  690. if (lm_cfg->ds != DS_MAX) {
  691. sde_rm_init_hw_iter(&iter, 0, SDE_HW_BLK_DS);
  692. while (_sde_rm_get_hw_locked(rm, &iter)) {
  693. if (iter.blk->id == lm_cfg->ds) {
  694. *ds = iter.blk;
  695. break;
  696. }
  697. }
  698. if (!*ds) {
  699. SDE_DEBUG("lm %d failed to retrieve ds %d\n", lm->id,
  700. lm_cfg->ds);
  701. return false;
  702. }
  703. if (RESERVED_BY_OTHER(*ds, rsvp)) {
  704. SDE_DEBUG("lm %d ds %d already reserved\n",
  705. lm->id, (*ds)->id);
  706. return false;
  707. }
  708. }
  709. return true;
  710. }
  711. static bool _sde_rm_reserve_pp(
  712. struct sde_rm *rm,
  713. struct sde_rm_rsvp *rsvp,
  714. struct sde_rm_requirements *reqs,
  715. const struct sde_lm_cfg *lm_cfg,
  716. const struct sde_pingpong_cfg *pp_cfg,
  717. struct sde_rm_hw_blk *lm,
  718. struct sde_rm_hw_blk **dspp,
  719. struct sde_rm_hw_blk **ds,
  720. struct sde_rm_hw_blk **pp)
  721. {
  722. struct sde_rm_hw_iter iter;
  723. sde_rm_init_hw_iter(&iter, 0, SDE_HW_BLK_PINGPONG);
  724. while (_sde_rm_get_hw_locked(rm, &iter)) {
  725. if (iter.blk->id == lm_cfg->pingpong) {
  726. *pp = iter.blk;
  727. break;
  728. }
  729. }
  730. if (!*pp) {
  731. SDE_ERROR("failed to get pp on lm %d\n", lm_cfg->pingpong);
  732. return false;
  733. }
  734. if (RESERVED_BY_OTHER(*pp, rsvp)) {
  735. SDE_DEBUG("lm %d pp %d already reserved\n", lm->id,
  736. (*pp)->id);
  737. *dspp = NULL;
  738. *ds = NULL;
  739. return false;
  740. }
  741. pp_cfg = to_sde_hw_pingpong((*pp)->hw)->caps;
  742. if ((reqs->topology->top_name == SDE_RM_TOPOLOGY_PPSPLIT) &&
  743. !(test_bit(SDE_PINGPONG_SPLIT, &pp_cfg->features))) {
  744. SDE_DEBUG("pp %d doesn't support ppsplit\n", pp_cfg->id);
  745. *dspp = NULL;
  746. *ds = NULL;
  747. return false;
  748. }
  749. return true;
  750. }
  751. /**
  752. * _sde_rm_check_lm_and_get_connected_blks - check if proposed layer mixer meets
  753. * proposed use case requirements, incl. hardwired dependent blocks like
  754. * pingpong, and dspp.
  755. * @rm: sde resource manager handle
  756. * @rsvp: reservation currently being created
  757. * @reqs: proposed use case requirements
  758. * @lm: proposed layer mixer, function checks if lm, and all other hardwired
  759. * blocks connected to the lm (pp, dspp) are available and appropriate
  760. * @dspp: output parameter, dspp block attached to the layer mixer.
  761. * NULL if dspp was not available, or not matching requirements.
  762. * @pp: output parameter, pingpong block attached to the layer mixer.
  763. * NULL if dspp was not available, or not matching requirements.
  764. * @primary_lm: if non-null, this function check if lm is compatible primary_lm
  765. * as well as satisfying all other requirements
  766. * @Return: true if lm matches all requirements, false otherwise
  767. */
  768. static bool _sde_rm_check_lm_and_get_connected_blks(
  769. struct sde_rm *rm,
  770. struct sde_rm_rsvp *rsvp,
  771. struct sde_rm_requirements *reqs,
  772. struct sde_rm_hw_blk *lm,
  773. struct sde_rm_hw_blk **dspp,
  774. struct sde_rm_hw_blk **ds,
  775. struct sde_rm_hw_blk **pp,
  776. struct sde_rm_hw_blk *primary_lm)
  777. {
  778. const struct sde_lm_cfg *lm_cfg = to_sde_hw_mixer(lm->hw)->cap;
  779. const struct sde_pingpong_cfg *pp_cfg;
  780. bool ret;
  781. u32 display_pref, cwb_pref;
  782. *dspp = NULL;
  783. *ds = NULL;
  784. *pp = NULL;
  785. display_pref = lm_cfg->features & BIT(SDE_DISP_PRIMARY_PREF) ||
  786. lm_cfg->features & BIT(SDE_DISP_SECONDARY_PREF);
  787. cwb_pref = lm_cfg->features & BIT(SDE_DISP_CWB_PREF);
  788. SDE_DEBUG("check lm %d: dspp %d ds %d pp %d disp_pref: %d cwb_pref%d\n",
  789. lm_cfg->id, lm_cfg->dspp, lm_cfg->ds,
  790. lm_cfg->pingpong, display_pref, cwb_pref);
  791. /* Check if this layer mixer is a peer of the proposed primary LM */
  792. if (primary_lm) {
  793. const struct sde_lm_cfg *prim_lm_cfg =
  794. to_sde_hw_mixer(primary_lm->hw)->cap;
  795. if (!test_bit(lm_cfg->id, &prim_lm_cfg->lm_pair_mask)) {
  796. SDE_DEBUG("lm %d not peer of lm %d\n", lm_cfg->id,
  797. prim_lm_cfg->id);
  798. return false;
  799. }
  800. }
  801. /* bypass rest of the checks if LM for primary display is found */
  802. if (!display_pref) {
  803. /* Check lm for valid requirements */
  804. ret = _sde_rm_check_lm(rm, rsvp, reqs, lm_cfg, lm,
  805. dspp, ds, pp);
  806. if (!ret)
  807. return ret;
  808. /**
  809. * If CWB is enabled and LM is not CWB supported
  810. * then return false.
  811. */
  812. if (RM_RQ_CWB(reqs) && !cwb_pref) {
  813. SDE_DEBUG("fail: cwb supported lm not allocated\n");
  814. return false;
  815. }
  816. } else if (!(reqs->hw_res.display_type && display_pref)) {
  817. SDE_DEBUG(
  818. "display preference is not met. display_type: %d display_pref: %d\n",
  819. (int)reqs->hw_res.display_type, (int)display_pref);
  820. return false;
  821. }
  822. /* Already reserved? */
  823. if (RESERVED_BY_OTHER(lm, rsvp)) {
  824. SDE_DEBUG("lm %d already reserved\n", lm_cfg->id);
  825. return false;
  826. }
  827. /* Reserve dspp */
  828. ret = _sde_rm_reserve_dspp(rm, rsvp, lm_cfg, lm, dspp);
  829. if (!ret)
  830. return ret;
  831. /* Reserve ds */
  832. ret = _sde_rm_reserve_ds(rm, rsvp, lm_cfg, lm, ds);
  833. if (!ret)
  834. return ret;
  835. /* Reserve pp */
  836. ret = _sde_rm_reserve_pp(rm, rsvp, reqs, lm_cfg, pp_cfg, lm,
  837. dspp, ds, pp);
  838. if (!ret)
  839. return ret;
  840. return true;
  841. }
  842. static int _sde_rm_reserve_lms(
  843. struct sde_rm *rm,
  844. struct sde_rm_rsvp *rsvp,
  845. struct sde_rm_requirements *reqs,
  846. u8 *_lm_ids)
  847. {
  848. struct sde_rm_hw_blk *lm[MAX_BLOCKS];
  849. struct sde_rm_hw_blk *dspp[MAX_BLOCKS];
  850. struct sde_rm_hw_blk *ds[MAX_BLOCKS];
  851. struct sde_rm_hw_blk *pp[MAX_BLOCKS];
  852. struct sde_rm_hw_iter iter_i, iter_j;
  853. int lm_count = 0;
  854. int i, rc = 0;
  855. if (!reqs->topology->num_lm) {
  856. SDE_DEBUG("invalid number of lm: %d\n", reqs->topology->num_lm);
  857. return 0;
  858. }
  859. /* Find a primary mixer */
  860. sde_rm_init_hw_iter(&iter_i, 0, SDE_HW_BLK_LM);
  861. while (lm_count != reqs->topology->num_lm &&
  862. _sde_rm_get_hw_locked(rm, &iter_i)) {
  863. memset(&lm, 0, sizeof(lm));
  864. memset(&dspp, 0, sizeof(dspp));
  865. memset(&ds, 0, sizeof(ds));
  866. memset(&pp, 0, sizeof(pp));
  867. lm_count = 0;
  868. lm[lm_count] = iter_i.blk;
  869. SDE_DEBUG("blk id = %d, _lm_ids[%d] = %d\n",
  870. iter_i.blk->id,
  871. lm_count,
  872. _lm_ids ? _lm_ids[lm_count] : -1);
  873. if (_lm_ids && (lm[lm_count])->id != _lm_ids[lm_count])
  874. continue;
  875. if (!_sde_rm_check_lm_and_get_connected_blks(
  876. rm, rsvp, reqs, lm[lm_count],
  877. &dspp[lm_count], &ds[lm_count],
  878. &pp[lm_count], NULL))
  879. continue;
  880. ++lm_count;
  881. /* Valid primary mixer found, find matching peers */
  882. sde_rm_init_hw_iter(&iter_j, 0, SDE_HW_BLK_LM);
  883. while (lm_count != reqs->topology->num_lm &&
  884. _sde_rm_get_hw_locked(rm, &iter_j)) {
  885. if (iter_i.blk == iter_j.blk)
  886. continue;
  887. if (!_sde_rm_check_lm_and_get_connected_blks(
  888. rm, rsvp, reqs, iter_j.blk,
  889. &dspp[lm_count], &ds[lm_count],
  890. &pp[lm_count], iter_i.blk))
  891. continue;
  892. lm[lm_count] = iter_j.blk;
  893. SDE_DEBUG("blk id = %d, _lm_ids[%d] = %d\n",
  894. iter_i.blk->id,
  895. lm_count,
  896. _lm_ids ? _lm_ids[lm_count] : -1);
  897. if (_lm_ids && (lm[lm_count])->id != _lm_ids[lm_count])
  898. continue;
  899. ++lm_count;
  900. }
  901. }
  902. if (lm_count != reqs->topology->num_lm) {
  903. SDE_DEBUG("unable to find appropriate mixers\n");
  904. return -ENAVAIL;
  905. }
  906. for (i = 0; i < ARRAY_SIZE(lm); i++) {
  907. if (!lm[i])
  908. break;
  909. lm[i]->rsvp_nxt = rsvp;
  910. pp[i]->rsvp_nxt = rsvp;
  911. if (dspp[i])
  912. dspp[i]->rsvp_nxt = rsvp;
  913. if (ds[i])
  914. ds[i]->rsvp_nxt = rsvp;
  915. SDE_EVT32(lm[i]->type, rsvp->enc_id, lm[i]->id, pp[i]->id,
  916. dspp[i] ? dspp[i]->id : 0,
  917. ds[i] ? ds[i]->id : 0);
  918. }
  919. if (reqs->topology->top_name == SDE_RM_TOPOLOGY_PPSPLIT) {
  920. /* reserve a free PINGPONG_SLAVE block */
  921. rc = -ENAVAIL;
  922. sde_rm_init_hw_iter(&iter_i, 0, SDE_HW_BLK_PINGPONG);
  923. while (_sde_rm_get_hw_locked(rm, &iter_i)) {
  924. const struct sde_hw_pingpong *pp =
  925. to_sde_hw_pingpong(iter_i.blk->hw);
  926. const struct sde_pingpong_cfg *pp_cfg = pp->caps;
  927. if (!(test_bit(SDE_PINGPONG_SLAVE, &pp_cfg->features)))
  928. continue;
  929. if (RESERVED_BY_OTHER(iter_i.blk, rsvp))
  930. continue;
  931. iter_i.blk->rsvp_nxt = rsvp;
  932. rc = 0;
  933. break;
  934. }
  935. }
  936. return rc;
  937. }
  938. static int _sde_rm_reserve_ctls(
  939. struct sde_rm *rm,
  940. struct sde_rm_rsvp *rsvp,
  941. struct sde_rm_requirements *reqs,
  942. const struct sde_rm_topology_def *top,
  943. u8 *_ctl_ids)
  944. {
  945. struct sde_rm_hw_blk *ctls[MAX_BLOCKS];
  946. struct sde_rm_hw_iter iter;
  947. int i = 0;
  948. if (!top->num_ctl) {
  949. SDE_DEBUG("invalid number of ctl: %d\n", top->num_ctl);
  950. return 0;
  951. }
  952. memset(&ctls, 0, sizeof(ctls));
  953. sde_rm_init_hw_iter(&iter, 0, SDE_HW_BLK_CTL);
  954. while (_sde_rm_get_hw_locked(rm, &iter)) {
  955. const struct sde_hw_ctl *ctl = to_sde_hw_ctl(iter.blk->hw);
  956. unsigned long features = ctl->caps->features;
  957. bool has_split_display, has_ppsplit, primary_pref;
  958. if (RESERVED_BY_OTHER(iter.blk, rsvp))
  959. continue;
  960. has_split_display = BIT(SDE_CTL_SPLIT_DISPLAY) & features;
  961. has_ppsplit = BIT(SDE_CTL_PINGPONG_SPLIT) & features;
  962. primary_pref = BIT(SDE_CTL_PRIMARY_PREF) & features;
  963. SDE_DEBUG("ctl %d caps 0x%lX\n", iter.blk->id, features);
  964. /*
  965. * bypass rest feature checks on finding CTL preferred
  966. * for primary displays.
  967. */
  968. if (!primary_pref && !_ctl_ids) {
  969. if (top->needs_split_display != has_split_display)
  970. continue;
  971. if (top->top_name == SDE_RM_TOPOLOGY_PPSPLIT &&
  972. !has_ppsplit)
  973. continue;
  974. } else if (!(reqs->hw_res.display_type ==
  975. SDE_CONNECTOR_PRIMARY && primary_pref) && !_ctl_ids) {
  976. SDE_DEBUG(
  977. "display pref not met. display_type: %d primary_pref: %d\n",
  978. reqs->hw_res.display_type, primary_pref);
  979. continue;
  980. }
  981. ctls[i] = iter.blk;
  982. SDE_DEBUG("blk id = %d, _ctl_ids[%d] = %d\n",
  983. iter.blk->id, i,
  984. _ctl_ids ? _ctl_ids[i] : -1);
  985. if (_ctl_ids && (ctls[i]->id != _ctl_ids[i]))
  986. continue;
  987. SDE_DEBUG("ctl %d match\n", iter.blk->id);
  988. if (++i == top->num_ctl)
  989. break;
  990. }
  991. if (i != top->num_ctl)
  992. return -ENAVAIL;
  993. for (i = 0; i < ARRAY_SIZE(ctls) && i < top->num_ctl; i++) {
  994. ctls[i]->rsvp_nxt = rsvp;
  995. SDE_EVT32(ctls[i]->type, rsvp->enc_id, ctls[i]->id);
  996. }
  997. return 0;
  998. }
  999. static int _sde_rm_reserve_dsc(
  1000. struct sde_rm *rm,
  1001. struct sde_rm_rsvp *rsvp,
  1002. const struct sde_rm_topology_def *top,
  1003. u8 *_dsc_ids)
  1004. {
  1005. struct sde_rm_hw_iter iter;
  1006. int alloc_count = 0;
  1007. int num_dsc_enc = top->num_lm;
  1008. if (!top->num_comp_enc)
  1009. return 0;
  1010. sde_rm_init_hw_iter(&iter, 0, SDE_HW_BLK_DSC);
  1011. while (_sde_rm_get_hw_locked(rm, &iter)) {
  1012. if (RESERVED_BY_OTHER(iter.blk, rsvp))
  1013. continue;
  1014. SDE_DEBUG("blk id = %d, _dsc_ids[%d] = %d\n",
  1015. iter.blk->id,
  1016. alloc_count,
  1017. _dsc_ids ? _dsc_ids[alloc_count] : -1);
  1018. if (_dsc_ids && (iter.blk->id != _dsc_ids[alloc_count]))
  1019. continue;
  1020. iter.blk->rsvp_nxt = rsvp;
  1021. SDE_EVT32(iter.blk->type, rsvp->enc_id, iter.blk->id);
  1022. if (++alloc_count == num_dsc_enc)
  1023. return 0;
  1024. }
  1025. SDE_ERROR("couldn't reserve %d dsc blocks for enc id %d\n",
  1026. num_dsc_enc, rsvp->enc_id);
  1027. return -ENAVAIL;
  1028. }
  1029. static int _sde_rm_reserve_qdss(
  1030. struct sde_rm *rm,
  1031. struct sde_rm_rsvp *rsvp,
  1032. const struct sde_rm_topology_def *top,
  1033. u8 *_qdss_ids)
  1034. {
  1035. struct sde_rm_hw_iter iter;
  1036. struct msm_drm_private *priv = rm->dev->dev_private;
  1037. struct sde_kms *sde_kms;
  1038. if (!priv->kms) {
  1039. SDE_ERROR("invalid kms\n");
  1040. return -EINVAL;
  1041. }
  1042. sde_kms = to_sde_kms(priv->kms);
  1043. sde_rm_init_hw_iter(&iter, 0, SDE_HW_BLK_QDSS);
  1044. while (_sde_rm_get_hw_locked(rm, &iter)) {
  1045. if (RESERVED_BY_OTHER(iter.blk, rsvp))
  1046. continue;
  1047. SDE_DEBUG("blk id = %d\n", iter.blk->id);
  1048. iter.blk->rsvp_nxt = rsvp;
  1049. SDE_EVT32(iter.blk->type, rsvp->enc_id, iter.blk->id);
  1050. return 0;
  1051. }
  1052. if (!iter.hw && sde_kms->catalog->qdss_count) {
  1053. SDE_DEBUG("couldn't reserve qdss for type %d id %d\n",
  1054. SDE_HW_BLK_QDSS, iter.blk->id);
  1055. return -ENAVAIL;
  1056. }
  1057. return 0;
  1058. }
  1059. static int _sde_rm_reserve_cdm(
  1060. struct sde_rm *rm,
  1061. struct sde_rm_rsvp *rsvp,
  1062. uint32_t id,
  1063. enum sde_hw_blk_type type)
  1064. {
  1065. struct sde_rm_hw_iter iter;
  1066. sde_rm_init_hw_iter(&iter, 0, SDE_HW_BLK_CDM);
  1067. while (_sde_rm_get_hw_locked(rm, &iter)) {
  1068. const struct sde_hw_cdm *cdm = to_sde_hw_cdm(iter.blk->hw);
  1069. const struct sde_cdm_cfg *caps = cdm->caps;
  1070. bool match = false;
  1071. if (RESERVED_BY_OTHER(iter.blk, rsvp))
  1072. continue;
  1073. if (type == SDE_HW_BLK_INTF && id != INTF_MAX)
  1074. match = test_bit(id, &caps->intf_connect);
  1075. else if (type == SDE_HW_BLK_WB && id != WB_MAX)
  1076. match = test_bit(id, &caps->wb_connect);
  1077. SDE_DEBUG("type %d id %d, cdm intfs %lu wbs %lu match %d\n",
  1078. type, id, caps->intf_connect, caps->wb_connect,
  1079. match);
  1080. if (!match)
  1081. continue;
  1082. iter.blk->rsvp_nxt = rsvp;
  1083. SDE_EVT32(iter.blk->type, rsvp->enc_id, iter.blk->id);
  1084. break;
  1085. }
  1086. if (!iter.hw) {
  1087. SDE_ERROR("couldn't reserve cdm for type %d id %d\n", type, id);
  1088. return -ENAVAIL;
  1089. }
  1090. return 0;
  1091. }
  1092. static int _sde_rm_reserve_intf_or_wb(
  1093. struct sde_rm *rm,
  1094. struct sde_rm_rsvp *rsvp,
  1095. uint32_t id,
  1096. enum sde_hw_blk_type type,
  1097. bool needs_cdm)
  1098. {
  1099. struct sde_rm_hw_iter iter;
  1100. int ret = 0;
  1101. /* Find the block entry in the rm, and note the reservation */
  1102. sde_rm_init_hw_iter(&iter, 0, type);
  1103. while (_sde_rm_get_hw_locked(rm, &iter)) {
  1104. if (iter.blk->id != id)
  1105. continue;
  1106. if (RESERVED_BY_OTHER(iter.blk, rsvp)) {
  1107. SDE_ERROR("type %d id %d already reserved\n", type, id);
  1108. return -ENAVAIL;
  1109. }
  1110. iter.blk->rsvp_nxt = rsvp;
  1111. SDE_EVT32(iter.blk->type, rsvp->enc_id, iter.blk->id);
  1112. break;
  1113. }
  1114. /* Shouldn't happen since wbs / intfs are fixed at probe */
  1115. if (!iter.hw) {
  1116. SDE_ERROR("couldn't find type %d id %d\n", type, id);
  1117. return -EINVAL;
  1118. }
  1119. /* Expected only one intf or wb will request cdm */
  1120. if (needs_cdm)
  1121. ret = _sde_rm_reserve_cdm(rm, rsvp, id, type);
  1122. return ret;
  1123. }
  1124. static int _sde_rm_reserve_intf_related_hw(
  1125. struct sde_rm *rm,
  1126. struct sde_rm_rsvp *rsvp,
  1127. struct sde_encoder_hw_resources *hw_res)
  1128. {
  1129. int i, ret = 0;
  1130. u32 id;
  1131. for (i = 0; i < ARRAY_SIZE(hw_res->intfs); i++) {
  1132. if (hw_res->intfs[i] == INTF_MODE_NONE)
  1133. continue;
  1134. id = i + INTF_0;
  1135. ret = _sde_rm_reserve_intf_or_wb(rm, rsvp, id,
  1136. SDE_HW_BLK_INTF, hw_res->needs_cdm);
  1137. if (ret)
  1138. return ret;
  1139. }
  1140. for (i = 0; i < ARRAY_SIZE(hw_res->wbs); i++) {
  1141. if (hw_res->wbs[i] == INTF_MODE_NONE)
  1142. continue;
  1143. id = i + WB_0;
  1144. ret = _sde_rm_reserve_intf_or_wb(rm, rsvp, id,
  1145. SDE_HW_BLK_WB, hw_res->needs_cdm);
  1146. if (ret)
  1147. return ret;
  1148. }
  1149. return ret;
  1150. }
  1151. static bool _sde_rm_is_display_in_cont_splash(struct sde_kms *sde_kms,
  1152. struct drm_encoder *enc)
  1153. {
  1154. int i;
  1155. struct sde_splash_display *splash_dpy;
  1156. for (i = 0; i < MAX_DSI_DISPLAYS; i++) {
  1157. splash_dpy = &sde_kms->splash_data.splash_display[i];
  1158. if (splash_dpy->encoder == enc)
  1159. return splash_dpy->cont_splash_enabled;
  1160. }
  1161. return false;
  1162. }
  1163. static int _sde_rm_make_lm_rsvp(struct sde_rm *rm, struct sde_rm_rsvp *rsvp,
  1164. struct sde_rm_requirements *reqs,
  1165. struct sde_splash_display *splash_display)
  1166. {
  1167. int ret, i;
  1168. u8 *hw_ids = NULL;
  1169. /* Check if splash data provided lm_ids */
  1170. if (splash_display) {
  1171. hw_ids = splash_display->lm_ids;
  1172. for (i = 0; i < splash_display->lm_cnt; i++)
  1173. SDE_DEBUG("splash_display->lm_ids[%d] = %d\n",
  1174. i, splash_display->lm_ids[i]);
  1175. if (splash_display->lm_cnt != reqs->topology->num_lm)
  1176. SDE_DEBUG("Configured splash LMs != needed LM cnt\n");
  1177. }
  1178. /*
  1179. * Assign LMs and blocks whose usage is tied to them: DSPP & Pingpong.
  1180. * Do assignment preferring to give away low-resource mixers first:
  1181. * - Check mixers without DSPPs
  1182. * - Only then allow to grab from mixers with DSPP capability
  1183. */
  1184. ret = _sde_rm_reserve_lms(rm, rsvp, reqs, hw_ids);
  1185. if (ret && !RM_RQ_DSPP(reqs)) {
  1186. reqs->top_ctrl |= BIT(SDE_RM_TOPCTL_DSPP);
  1187. ret = _sde_rm_reserve_lms(rm, rsvp, reqs, hw_ids);
  1188. }
  1189. return ret;
  1190. }
  1191. static int _sde_rm_make_ctl_rsvp(struct sde_rm *rm, struct sde_rm_rsvp *rsvp,
  1192. struct sde_rm_requirements *reqs,
  1193. struct sde_splash_display *splash_display)
  1194. {
  1195. int ret, i;
  1196. u8 *hw_ids = NULL;
  1197. struct sde_rm_topology_def topology;
  1198. /* Check if splash data provided ctl_ids */
  1199. if (splash_display) {
  1200. hw_ids = splash_display->ctl_ids;
  1201. for (i = 0; i < splash_display->ctl_cnt; i++)
  1202. SDE_DEBUG("splash_display->ctl_ids[%d] = %d\n",
  1203. i, splash_display->ctl_ids[i]);
  1204. }
  1205. /*
  1206. * Do assignment preferring to give away low-resource CTLs first:
  1207. * - Check mixers without Split Display
  1208. * - Only then allow to grab from CTLs with split display capability
  1209. */
  1210. ret = _sde_rm_reserve_ctls(rm, rsvp, reqs, reqs->topology, hw_ids);
  1211. if (ret && !reqs->topology->needs_split_display &&
  1212. reqs->topology->num_ctl > SINGLE_CTL) {
  1213. memcpy(&topology, reqs->topology, sizeof(topology));
  1214. topology.needs_split_display = true;
  1215. ret = _sde_rm_reserve_ctls(rm, rsvp, reqs, &topology, hw_ids);
  1216. }
  1217. return ret;
  1218. }
  1219. static int _sde_rm_make_dsc_rsvp(struct sde_rm *rm, struct sde_rm_rsvp *rsvp,
  1220. struct sde_rm_requirements *reqs,
  1221. struct sde_splash_display *splash_display)
  1222. {
  1223. int ret, i;
  1224. u8 *hw_ids = NULL;
  1225. /* Check if splash data provided dsc_ids */
  1226. if (splash_display) {
  1227. hw_ids = splash_display->dsc_ids;
  1228. for (i = 0; i < splash_display->dsc_cnt; i++)
  1229. SDE_DEBUG("splash_data.dsc_ids[%d] = %d\n",
  1230. i, splash_display->dsc_ids[i]);
  1231. }
  1232. ret = _sde_rm_reserve_dsc(rm, rsvp, reqs->topology, hw_ids);
  1233. return ret;
  1234. }
  1235. static int _sde_rm_make_next_rsvp(struct sde_rm *rm, struct drm_encoder *enc,
  1236. struct drm_crtc_state *crtc_state,
  1237. struct drm_connector_state *conn_state,
  1238. struct sde_rm_rsvp *rsvp,
  1239. struct sde_rm_requirements *reqs)
  1240. {
  1241. struct msm_drm_private *priv;
  1242. struct sde_kms *sde_kms;
  1243. struct sde_splash_display *splash_display = NULL;
  1244. struct sde_splash_data *splash_data;
  1245. int i, ret;
  1246. priv = enc->dev->dev_private;
  1247. sde_kms = to_sde_kms(priv->kms);
  1248. splash_data = &sde_kms->splash_data;
  1249. if (_sde_rm_is_display_in_cont_splash(sde_kms, enc)) {
  1250. for (i = 0; i < ARRAY_SIZE(splash_data->splash_display); i++) {
  1251. if (enc == splash_data->splash_display[i].encoder)
  1252. splash_display =
  1253. &splash_data->splash_display[i];
  1254. }
  1255. if (!splash_display) {
  1256. SDE_ERROR("rm is in cont_splash but data not found\n");
  1257. return -EINVAL;
  1258. }
  1259. }
  1260. /* Create reservation info, tag reserved blocks with it as we go */
  1261. rsvp->seq = ++rm->rsvp_next_seq;
  1262. rsvp->enc_id = enc->base.id;
  1263. rsvp->topology = reqs->topology->top_name;
  1264. list_add_tail(&rsvp->list, &rm->rsvps);
  1265. ret = _sde_rm_make_lm_rsvp(rm, rsvp, reqs, splash_display);
  1266. if (ret) {
  1267. SDE_ERROR("unable to find appropriate mixers\n");
  1268. return ret;
  1269. }
  1270. ret = _sde_rm_make_ctl_rsvp(rm, rsvp, reqs, splash_display);
  1271. if (ret) {
  1272. SDE_ERROR("unable to find appropriate CTL\n");
  1273. return ret;
  1274. }
  1275. /* Assign INTFs, WBs, and blks whose usage is tied to them: CTL & CDM */
  1276. ret = _sde_rm_reserve_intf_related_hw(rm, rsvp, &reqs->hw_res);
  1277. if (ret)
  1278. return ret;
  1279. ret = _sde_rm_make_dsc_rsvp(rm, rsvp, reqs, splash_display);
  1280. if (ret)
  1281. return ret;
  1282. ret = _sde_rm_reserve_qdss(rm, rsvp, reqs->topology, NULL);
  1283. if (ret)
  1284. return ret;
  1285. return ret;
  1286. }
  1287. /**
  1288. * _sde_rm_get_hw_blk_for_cont_splash - retrieve the LM blocks on given CTL
  1289. * and populate the connected HW blk ids in sde_splash_display
  1290. * @rm: Pointer to resource manager structure
  1291. * @ctl: Pointer to CTL hardware block
  1292. * @splash_display: Pointer to struct sde_splash_display
  1293. * return: number of active LM blocks for this CTL block
  1294. */
  1295. static int _sde_rm_get_hw_blk_for_cont_splash(struct sde_rm *rm,
  1296. struct sde_hw_ctl *ctl,
  1297. struct sde_splash_display *splash_display)
  1298. {
  1299. u32 lm_reg;
  1300. struct sde_rm_hw_iter iter_lm, iter_pp;
  1301. struct sde_hw_pingpong *pp;
  1302. if (!rm || !ctl || !splash_display) {
  1303. SDE_ERROR("invalid input parameters\n");
  1304. return 0;
  1305. }
  1306. sde_rm_init_hw_iter(&iter_lm, 0, SDE_HW_BLK_LM);
  1307. sde_rm_init_hw_iter(&iter_pp, 0, SDE_HW_BLK_PINGPONG);
  1308. while (_sde_rm_get_hw_locked(rm, &iter_lm)) {
  1309. _sde_rm_get_hw_locked(rm, &iter_pp);
  1310. if (splash_display->lm_cnt >= MAX_DATA_PATH_PER_DSIPLAY)
  1311. break;
  1312. lm_reg = ctl->ops.read_ctl_layers(ctl, iter_lm.blk->id);
  1313. if (!lm_reg)
  1314. continue;
  1315. splash_display->lm_ids[splash_display->lm_cnt++] =
  1316. iter_lm.blk->id;
  1317. SDE_DEBUG("lm_cnt=%d lm_reg[%d]=0x%x\n", splash_display->lm_cnt,
  1318. iter_lm.blk->id - LM_0, lm_reg);
  1319. if (ctl->ops.get_staged_sspp &&
  1320. ctl->ops.get_staged_sspp(ctl, iter_lm.blk->id,
  1321. &splash_display->pipes[
  1322. splash_display->pipe_cnt], 1)) {
  1323. splash_display->pipe_cnt++;
  1324. } else {
  1325. SDE_ERROR("no pipe detected on LM-%d\n",
  1326. iter_lm.blk->id - LM_0);
  1327. return 0;
  1328. }
  1329. pp = to_sde_hw_pingpong(iter_pp.blk->hw);
  1330. if (pp && pp->ops.get_dsc_status &&
  1331. pp->ops.get_dsc_status(pp)) {
  1332. splash_display->dsc_ids[splash_display->dsc_cnt++] =
  1333. iter_pp.blk->id;
  1334. SDE_DEBUG("lm/pp[%d] path, using dsc[%d]\n",
  1335. iter_lm.blk->id - LM_0,
  1336. iter_pp.blk->id - DSC_0);
  1337. }
  1338. }
  1339. return splash_display->lm_cnt;
  1340. }
  1341. int sde_rm_cont_splash_res_init(struct msm_drm_private *priv,
  1342. struct sde_rm *rm,
  1343. struct sde_splash_data *splash_data,
  1344. struct sde_mdss_cfg *cat)
  1345. {
  1346. struct sde_rm_hw_iter iter_c;
  1347. int index = 0, ctl_top_cnt;
  1348. struct sde_kms *sde_kms = NULL;
  1349. struct sde_hw_mdp *hw_mdp;
  1350. struct sde_splash_display *splash_display;
  1351. u8 intf_sel;
  1352. if (!priv || !rm || !cat || !splash_data) {
  1353. SDE_ERROR("invalid input parameters\n");
  1354. return -EINVAL;
  1355. }
  1356. SDE_DEBUG("mixer_count=%d, ctl_count=%d, dsc_count=%d\n",
  1357. cat->mixer_count,
  1358. cat->ctl_count,
  1359. cat->dsc_count);
  1360. ctl_top_cnt = cat->ctl_count;
  1361. if (!priv->kms) {
  1362. SDE_ERROR("invalid kms\n");
  1363. return -EINVAL;
  1364. }
  1365. sde_kms = to_sde_kms(priv->kms);
  1366. hw_mdp = sde_rm_get_mdp(rm);
  1367. sde_rm_init_hw_iter(&iter_c, 0, SDE_HW_BLK_CTL);
  1368. while (_sde_rm_get_hw_locked(rm, &iter_c)
  1369. && (index < splash_data->num_splash_displays)) {
  1370. struct sde_hw_ctl *ctl = to_sde_hw_ctl(iter_c.blk->hw);
  1371. if (!ctl->ops.get_ctl_intf) {
  1372. SDE_ERROR("get_ctl_intf not initialized\n");
  1373. return -EINVAL;
  1374. }
  1375. intf_sel = ctl->ops.get_ctl_intf(ctl);
  1376. if (intf_sel) {
  1377. splash_display = &splash_data->splash_display[index];
  1378. SDE_DEBUG("finding resources for display=%d ctl=%d\n",
  1379. index, iter_c.blk->id - CTL_0);
  1380. _sde_rm_get_hw_blk_for_cont_splash(rm,
  1381. ctl, splash_display);
  1382. splash_display->cont_splash_enabled = true;
  1383. splash_display->ctl_ids[splash_display->ctl_cnt++] =
  1384. iter_c.blk->id;
  1385. }
  1386. index++;
  1387. }
  1388. return 0;
  1389. }
  1390. static int _sde_rm_populate_requirements(
  1391. struct sde_rm *rm,
  1392. struct drm_encoder *enc,
  1393. struct drm_crtc_state *crtc_state,
  1394. struct drm_connector_state *conn_state,
  1395. struct sde_rm_requirements *reqs)
  1396. {
  1397. const struct drm_display_mode *mode = &crtc_state->mode;
  1398. int i;
  1399. memset(reqs, 0, sizeof(*reqs));
  1400. reqs->top_ctrl = sde_connector_get_property(conn_state,
  1401. CONNECTOR_PROP_TOPOLOGY_CONTROL);
  1402. sde_encoder_get_hw_resources(enc, &reqs->hw_res, conn_state);
  1403. for (i = 0; i < SDE_RM_TOPOLOGY_MAX; i++) {
  1404. if (RM_IS_TOPOLOGY_MATCH(rm->topology_tbl[i],
  1405. reqs->hw_res.topology)) {
  1406. reqs->topology = &rm->topology_tbl[i];
  1407. break;
  1408. }
  1409. }
  1410. if (!reqs->topology) {
  1411. SDE_ERROR("invalid topology for the display\n");
  1412. return -EINVAL;
  1413. }
  1414. /*
  1415. * select dspp HW block for all dsi displays and ds for only
  1416. * primary dsi display.
  1417. */
  1418. if (conn_state->connector->connector_type == DRM_MODE_CONNECTOR_DSI) {
  1419. if (!RM_RQ_DSPP(reqs))
  1420. reqs->top_ctrl |= BIT(SDE_RM_TOPCTL_DSPP);
  1421. if (!RM_RQ_DS(reqs) && rm->hw_mdp->caps->has_dest_scaler &&
  1422. sde_encoder_is_primary_display(enc))
  1423. reqs->top_ctrl |= BIT(SDE_RM_TOPCTL_DS);
  1424. }
  1425. /**
  1426. * Set the requirement for LM which has CWB support if CWB is
  1427. * found enabled.
  1428. */
  1429. if (!RM_RQ_CWB(reqs) && sde_encoder_in_clone_mode(enc)) {
  1430. reqs->top_ctrl |= BIT(SDE_RM_TOPCTL_CWB);
  1431. /*
  1432. * topology selection based on conn mode is not valid for CWB
  1433. * as WB conn populates modes based on max_mixer_width check
  1434. * but primary can be using dual LMs. This topology override for
  1435. * CWB is to check number of datapath active in primary and
  1436. * allocate same number of LM/PP blocks reserved for CWB
  1437. */
  1438. reqs->topology =
  1439. &rm->topology_tbl[SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE];
  1440. if (sde_crtc_get_num_datapath(crtc_state->crtc) == 1)
  1441. reqs->topology =
  1442. &rm->topology_tbl[SDE_RM_TOPOLOGY_SINGLEPIPE];
  1443. }
  1444. SDE_DEBUG("top_ctrl: 0x%llX num_h_tiles: %d\n", reqs->top_ctrl,
  1445. reqs->hw_res.display_num_of_h_tiles);
  1446. SDE_DEBUG("num_lm: %d num_ctl: %d topology: %d split_display: %d\n",
  1447. reqs->topology->num_lm, reqs->topology->num_ctl,
  1448. reqs->topology->top_name,
  1449. reqs->topology->needs_split_display);
  1450. SDE_EVT32(mode->hdisplay, rm->lm_max_width, reqs->topology->num_lm,
  1451. reqs->top_ctrl, reqs->topology->top_name,
  1452. reqs->topology->num_ctl);
  1453. return 0;
  1454. }
  1455. static struct sde_rm_rsvp *_sde_rm_get_rsvp(
  1456. struct sde_rm *rm,
  1457. struct drm_encoder *enc)
  1458. {
  1459. struct sde_rm_rsvp *i;
  1460. if (!rm || !enc) {
  1461. SDE_ERROR("invalid params\n");
  1462. return NULL;
  1463. }
  1464. if (list_empty(&rm->rsvps))
  1465. return NULL;
  1466. list_for_each_entry(i, &rm->rsvps, list)
  1467. if (i->enc_id == enc->base.id)
  1468. return i;
  1469. return NULL;
  1470. }
  1471. static struct sde_rm_rsvp *_sde_rm_get_rsvp_nxt(
  1472. struct sde_rm *rm,
  1473. struct drm_encoder *enc)
  1474. {
  1475. struct sde_rm_rsvp *i;
  1476. if (list_empty(&rm->rsvps))
  1477. return NULL;
  1478. list_for_each_entry(i, &rm->rsvps, list)
  1479. if (i->enc_id == enc->base.id)
  1480. break;
  1481. list_for_each_entry_continue(i, &rm->rsvps, list)
  1482. if (i->enc_id == enc->base.id)
  1483. return i;
  1484. return NULL;
  1485. }
  1486. static struct drm_connector *_sde_rm_get_connector(
  1487. struct drm_encoder *enc)
  1488. {
  1489. struct drm_connector *conn = NULL;
  1490. struct list_head *connector_list =
  1491. &enc->dev->mode_config.connector_list;
  1492. list_for_each_entry(conn, connector_list, head)
  1493. if (conn->encoder == enc)
  1494. return conn;
  1495. return NULL;
  1496. }
  1497. int sde_rm_update_topology(struct drm_connector_state *conn_state,
  1498. struct msm_display_topology *topology)
  1499. {
  1500. int i, ret = 0;
  1501. struct msm_display_topology top;
  1502. enum sde_rm_topology_name top_name = SDE_RM_TOPOLOGY_NONE;
  1503. if (!conn_state)
  1504. return -EINVAL;
  1505. if (topology) {
  1506. top = *topology;
  1507. for (i = 0; i < SDE_RM_TOPOLOGY_MAX; i++)
  1508. if (RM_IS_TOPOLOGY_MATCH(g_top_table[i], top)) {
  1509. top_name = g_top_table[i].top_name;
  1510. break;
  1511. }
  1512. }
  1513. ret = msm_property_set_property(
  1514. sde_connector_get_propinfo(conn_state->connector),
  1515. sde_connector_get_property_state(conn_state),
  1516. CONNECTOR_PROP_TOPOLOGY_NAME, top_name);
  1517. return ret;
  1518. }
  1519. /**
  1520. * _sde_rm_release_rsvp - release resources and release a reservation
  1521. * @rm: KMS handle
  1522. * @rsvp: RSVP pointer to release and release resources for
  1523. */
  1524. static void _sde_rm_release_rsvp(
  1525. struct sde_rm *rm,
  1526. struct sde_rm_rsvp *rsvp,
  1527. struct drm_connector *conn)
  1528. {
  1529. struct sde_rm_rsvp *rsvp_c, *rsvp_n;
  1530. struct sde_rm_hw_blk *blk;
  1531. enum sde_hw_blk_type type;
  1532. if (!rsvp)
  1533. return;
  1534. SDE_DEBUG("rel rsvp %d enc %d\n", rsvp->seq, rsvp->enc_id);
  1535. list_for_each_entry_safe(rsvp_c, rsvp_n, &rm->rsvps, list) {
  1536. if (rsvp == rsvp_c) {
  1537. list_del(&rsvp_c->list);
  1538. break;
  1539. }
  1540. }
  1541. for (type = 0; type < SDE_HW_BLK_MAX; type++) {
  1542. list_for_each_entry(blk, &rm->hw_blks[type], list) {
  1543. if (blk->rsvp == rsvp) {
  1544. blk->rsvp = NULL;
  1545. SDE_DEBUG("rel rsvp %d enc %d %d %d\n",
  1546. rsvp->seq, rsvp->enc_id,
  1547. blk->type, blk->id);
  1548. _sde_rm_inc_resource_info(rm,
  1549. &rm->avail_res, blk);
  1550. }
  1551. if (blk->rsvp_nxt == rsvp) {
  1552. blk->rsvp_nxt = NULL;
  1553. SDE_DEBUG("rel rsvp_nxt %d enc %d %d %d\n",
  1554. rsvp->seq, rsvp->enc_id,
  1555. blk->type, blk->id);
  1556. }
  1557. }
  1558. }
  1559. kfree(rsvp);
  1560. }
  1561. void sde_rm_release(struct sde_rm *rm, struct drm_encoder *enc, bool nxt)
  1562. {
  1563. struct sde_rm_rsvp *rsvp;
  1564. struct drm_connector *conn;
  1565. struct msm_drm_private *priv;
  1566. struct sde_kms *sde_kms;
  1567. uint64_t top_ctrl;
  1568. if (!rm || !enc) {
  1569. SDE_ERROR("invalid params\n");
  1570. return;
  1571. }
  1572. priv = enc->dev->dev_private;
  1573. if (!priv->kms) {
  1574. SDE_ERROR("invalid kms\n");
  1575. return;
  1576. }
  1577. sde_kms = to_sde_kms(priv->kms);
  1578. mutex_lock(&rm->rm_lock);
  1579. if (nxt)
  1580. rsvp = _sde_rm_get_rsvp_nxt(rm, enc);
  1581. else
  1582. rsvp = _sde_rm_get_rsvp(rm, enc);
  1583. if (!rsvp) {
  1584. SDE_DEBUG("failed to find rsvp for enc %d, nxt %d",
  1585. enc->base.id, nxt);
  1586. goto end;
  1587. }
  1588. if (_sde_rm_is_display_in_cont_splash(sde_kms, enc)) {
  1589. _sde_rm_release_rsvp(rm, rsvp, conn);
  1590. goto end;
  1591. }
  1592. conn = _sde_rm_get_connector(enc);
  1593. if (!conn) {
  1594. SDE_ERROR("failed to get connector for enc %d, nxt %d",
  1595. enc->base.id, nxt);
  1596. goto end;
  1597. }
  1598. top_ctrl = sde_connector_get_property(conn->state,
  1599. CONNECTOR_PROP_TOPOLOGY_CONTROL);
  1600. if (top_ctrl & BIT(SDE_RM_TOPCTL_RESERVE_LOCK)) {
  1601. SDE_DEBUG("rsvp[s%de%d] not releasing locked resources\n",
  1602. rsvp->seq, rsvp->enc_id);
  1603. } else {
  1604. SDE_DEBUG("release rsvp[s%de%d]\n", rsvp->seq,
  1605. rsvp->enc_id);
  1606. _sde_rm_release_rsvp(rm, rsvp, conn);
  1607. }
  1608. end:
  1609. mutex_unlock(&rm->rm_lock);
  1610. }
  1611. static int _sde_rm_commit_rsvp(
  1612. struct sde_rm *rm,
  1613. struct sde_rm_rsvp *rsvp,
  1614. struct drm_connector_state *conn_state)
  1615. {
  1616. struct sde_rm_hw_blk *blk;
  1617. enum sde_hw_blk_type type;
  1618. int ret = 0;
  1619. /* Swap next rsvp to be the active */
  1620. for (type = 0; type < SDE_HW_BLK_MAX; type++) {
  1621. list_for_each_entry(blk, &rm->hw_blks[type], list) {
  1622. if (blk->rsvp_nxt) {
  1623. blk->rsvp = blk->rsvp_nxt;
  1624. blk->rsvp_nxt = NULL;
  1625. _sde_rm_dec_resource_info(rm,
  1626. &rm->avail_res, blk);
  1627. }
  1628. }
  1629. }
  1630. if (!ret) {
  1631. SDE_DEBUG("rsrv enc %d topology %d\n", rsvp->enc_id,
  1632. rsvp->topology);
  1633. SDE_EVT32(rsvp->enc_id, rsvp->topology);
  1634. }
  1635. return ret;
  1636. }
  1637. int sde_rm_reserve(
  1638. struct sde_rm *rm,
  1639. struct drm_encoder *enc,
  1640. struct drm_crtc_state *crtc_state,
  1641. struct drm_connector_state *conn_state,
  1642. bool test_only)
  1643. {
  1644. struct sde_rm_rsvp *rsvp_cur, *rsvp_nxt;
  1645. struct sde_rm_requirements reqs;
  1646. struct msm_drm_private *priv;
  1647. struct sde_kms *sde_kms;
  1648. int ret;
  1649. if (!rm || !enc || !crtc_state || !conn_state) {
  1650. SDE_ERROR("invalid arguments\n");
  1651. return -EINVAL;
  1652. }
  1653. if (!enc->dev || !enc->dev->dev_private) {
  1654. SDE_ERROR("drm device invalid\n");
  1655. return -EINVAL;
  1656. }
  1657. priv = enc->dev->dev_private;
  1658. if (!priv->kms) {
  1659. SDE_ERROR("invalid kms\n");
  1660. return -EINVAL;
  1661. }
  1662. sde_kms = to_sde_kms(priv->kms);
  1663. /* Check if this is just a page-flip */
  1664. if (!_sde_rm_is_display_in_cont_splash(sde_kms, enc) &&
  1665. !drm_atomic_crtc_needs_modeset(crtc_state))
  1666. return 0;
  1667. SDE_DEBUG("reserving hw for conn %d enc %d crtc %d test_only %d\n",
  1668. conn_state->connector->base.id, enc->base.id,
  1669. crtc_state->crtc->base.id, test_only);
  1670. SDE_EVT32(enc->base.id, conn_state->connector->base.id);
  1671. mutex_lock(&rm->rm_lock);
  1672. _sde_rm_print_rsvps(rm, SDE_RM_STAGE_BEGIN);
  1673. rsvp_cur = _sde_rm_get_rsvp(rm, enc);
  1674. rsvp_nxt = _sde_rm_get_rsvp_nxt(rm, enc);
  1675. if (!test_only && rsvp_nxt)
  1676. goto commit_rsvp;
  1677. ret = _sde_rm_populate_requirements(rm, enc, crtc_state,
  1678. conn_state, &reqs);
  1679. if (ret) {
  1680. SDE_ERROR("failed to populate hw requirements\n");
  1681. goto end;
  1682. }
  1683. /*
  1684. * We only support one active reservation per-hw-block. But to implement
  1685. * transactional semantics for test-only, and for allowing failure while
  1686. * modifying your existing reservation, over the course of this
  1687. * function we can have two reservations:
  1688. * Current: Existing reservation
  1689. * Next: Proposed reservation. The proposed reservation may fail, or may
  1690. * be discarded if in test-only mode.
  1691. * If reservation is successful, and we're not in test-only, then we
  1692. * replace the current with the next.
  1693. */
  1694. rsvp_nxt = kzalloc(sizeof(*rsvp_nxt), GFP_KERNEL);
  1695. if (!rsvp_nxt) {
  1696. ret = -ENOMEM;
  1697. goto end;
  1698. }
  1699. /*
  1700. * User can request that we clear out any reservation during the
  1701. * atomic_check phase by using this CLEAR bit
  1702. */
  1703. if (rsvp_cur && test_only && RM_RQ_CLEAR(&reqs)) {
  1704. SDE_DEBUG("test_only & CLEAR: clear rsvp[s%de%d]\n",
  1705. rsvp_cur->seq, rsvp_cur->enc_id);
  1706. _sde_rm_release_rsvp(rm, rsvp_cur, conn_state->connector);
  1707. rsvp_cur = NULL;
  1708. _sde_rm_print_rsvps(rm, SDE_RM_STAGE_AFTER_CLEAR);
  1709. }
  1710. /* Check the proposed reservation, store it in hw's "next" field */
  1711. ret = _sde_rm_make_next_rsvp(rm, enc, crtc_state, conn_state,
  1712. rsvp_nxt, &reqs);
  1713. _sde_rm_print_rsvps(rm, SDE_RM_STAGE_AFTER_RSVPNEXT);
  1714. if (ret) {
  1715. SDE_ERROR("failed to reserve hw resources: %d, test_only %d\n",
  1716. ret, test_only);
  1717. _sde_rm_release_rsvp(rm, rsvp_nxt, conn_state->connector);
  1718. goto end;
  1719. } else if (test_only && !RM_RQ_LOCK(&reqs)) {
  1720. /*
  1721. * Normally, if test_only, test the reservation and then undo
  1722. * However, if the user requests LOCK, then keep the reservation
  1723. * made during the atomic_check phase.
  1724. */
  1725. SDE_DEBUG("test_only: rsvp[s%de%d]\n",
  1726. rsvp_nxt->seq, rsvp_nxt->enc_id);
  1727. goto end;
  1728. } else {
  1729. if (test_only && RM_RQ_LOCK(&reqs))
  1730. SDE_DEBUG("test_only & LOCK: lock rsvp[s%de%d]\n",
  1731. rsvp_nxt->seq, rsvp_nxt->enc_id);
  1732. }
  1733. commit_rsvp:
  1734. _sde_rm_release_rsvp(rm, rsvp_cur, conn_state->connector);
  1735. ret = _sde_rm_commit_rsvp(rm, rsvp_nxt, conn_state);
  1736. end:
  1737. _sde_rm_print_rsvps(rm, SDE_RM_STAGE_FINAL);
  1738. mutex_unlock(&rm->rm_lock);
  1739. return ret;
  1740. }
  1741. int sde_rm_ext_blk_create_reserve(struct sde_rm *rm,
  1742. struct sde_hw_blk *hw, struct drm_encoder *enc)
  1743. {
  1744. struct sde_rm_hw_blk *blk;
  1745. struct sde_rm_rsvp *rsvp;
  1746. int ret = 0;
  1747. if (!rm || !hw || !enc) {
  1748. SDE_ERROR("invalid parameters\n");
  1749. return -EINVAL;
  1750. }
  1751. if (hw->type >= SDE_HW_BLK_MAX) {
  1752. SDE_ERROR("invalid HW type\n");
  1753. return -EINVAL;
  1754. }
  1755. mutex_lock(&rm->rm_lock);
  1756. rsvp = _sde_rm_get_rsvp(rm, enc);
  1757. if (!rsvp) {
  1758. rsvp = kzalloc(sizeof(*rsvp), GFP_KERNEL);
  1759. if (!rsvp) {
  1760. ret = -ENOMEM;
  1761. goto end;
  1762. }
  1763. rsvp->seq = ++rm->rsvp_next_seq;
  1764. rsvp->enc_id = enc->base.id;
  1765. list_add_tail(&rsvp->list, &rm->rsvps);
  1766. SDE_DEBUG("create rsvp %d for enc %d\n",
  1767. rsvp->seq, rsvp->enc_id);
  1768. }
  1769. blk = kzalloc(sizeof(*blk), GFP_KERNEL);
  1770. if (!blk) {
  1771. ret = -ENOMEM;
  1772. goto end;
  1773. }
  1774. blk->type = hw->type;
  1775. blk->id = hw->id;
  1776. blk->hw = hw;
  1777. blk->rsvp = rsvp;
  1778. list_add_tail(&blk->list, &rm->hw_blks[hw->type]);
  1779. SDE_DEBUG("create blk %d %d for rsvp %d enc %d\n", blk->type, blk->id,
  1780. rsvp->seq, rsvp->enc_id);
  1781. end:
  1782. mutex_unlock(&rm->rm_lock);
  1783. return ret;
  1784. }
  1785. int sde_rm_ext_blk_destroy(struct sde_rm *rm,
  1786. struct drm_encoder *enc)
  1787. {
  1788. struct sde_rm_hw_blk *blk = NULL, *p;
  1789. struct sde_rm_rsvp *rsvp;
  1790. enum sde_hw_blk_type type;
  1791. int ret = 0;
  1792. if (!rm || !enc) {
  1793. SDE_ERROR("invalid parameters\n");
  1794. return -EINVAL;
  1795. }
  1796. mutex_lock(&rm->rm_lock);
  1797. rsvp = _sde_rm_get_rsvp(rm, enc);
  1798. if (!rsvp) {
  1799. ret = -ENOENT;
  1800. SDE_ERROR("failed to find rsvp for enc %d\n", enc->base.id);
  1801. goto end;
  1802. }
  1803. for (type = 0; type < SDE_HW_BLK_MAX; type++) {
  1804. list_for_each_entry_safe(blk, p, &rm->hw_blks[type], list) {
  1805. if (blk->rsvp == rsvp) {
  1806. list_del(&blk->list);
  1807. SDE_DEBUG("del blk %d %d from rsvp %d enc %d\n",
  1808. blk->type, blk->id,
  1809. rsvp->seq, rsvp->enc_id);
  1810. kfree(blk);
  1811. }
  1812. }
  1813. }
  1814. SDE_DEBUG("del rsvp %d\n", rsvp->seq);
  1815. list_del(&rsvp->list);
  1816. kfree(rsvp);
  1817. end:
  1818. mutex_unlock(&rm->rm_lock);
  1819. return ret;
  1820. }