dp_be_rx.c 66 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include "cdp_txrx_cmn_struct.h"
  20. #include "hal_hw_headers.h"
  21. #include "dp_types.h"
  22. #include "dp_rx.h"
  23. #include "dp_tx.h"
  24. #include "dp_be_rx.h"
  25. #include "dp_peer.h"
  26. #include "hal_rx.h"
  27. #include "hal_be_rx.h"
  28. #include "hal_api.h"
  29. #include "hal_be_api.h"
  30. #include "qdf_nbuf.h"
  31. #ifdef MESH_MODE_SUPPORT
  32. #include "if_meta_hdr.h"
  33. #endif
  34. #include "dp_internal.h"
  35. #include "dp_ipa.h"
  36. #ifdef FEATURE_WDS
  37. #include "dp_txrx_wds.h"
  38. #endif
  39. #include "dp_hist.h"
  40. #include "dp_rx_buffer_pool.h"
  41. #ifdef WLAN_SUPPORT_RX_FLOW_TAG
  42. static inline void
  43. dp_rx_update_flow_info(qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr)
  44. {
  45. uint32_t fse_metadata;
  46. /* Set the flow idx valid flag only when there is no timeout */
  47. if (hal_rx_msdu_flow_idx_timeout_be(rx_tlv_hdr))
  48. return;
  49. /*
  50. * If invalid bit is not set and the fse metadata indicates that it is
  51. * a valid SFE flow match in FSE, do not set the rx flow tag and let it
  52. * go via stack instead of VP.
  53. */
  54. fse_metadata = hal_rx_msdu_fse_metadata_get_be(rx_tlv_hdr);
  55. if (!hal_rx_msdu_flow_idx_invalid_be(rx_tlv_hdr) && (fse_metadata == DP_RX_FSE_FLOW_MATCH_SFE))
  56. return;
  57. qdf_nbuf_set_rx_flow_idx_valid(nbuf,
  58. !hal_rx_msdu_flow_idx_invalid_be(rx_tlv_hdr));
  59. }
  60. #else
  61. static inline void
  62. dp_rx_update_flow_info(qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr)
  63. {
  64. }
  65. #endif
  66. #ifndef AST_OFFLOAD_ENABLE
  67. static void
  68. dp_rx_wds_learn(struct dp_soc *soc,
  69. struct dp_vdev *vdev,
  70. uint8_t *rx_tlv_hdr,
  71. struct dp_txrx_peer *txrx_peer,
  72. qdf_nbuf_t nbuf)
  73. {
  74. struct hal_rx_msdu_metadata msdu_metadata;
  75. hal_rx_msdu_packet_metadata_get_generic_be(rx_tlv_hdr, &msdu_metadata);
  76. /* WDS Source Port Learning */
  77. if (qdf_likely(vdev->wds_enabled))
  78. dp_rx_wds_srcport_learn(soc,
  79. rx_tlv_hdr,
  80. txrx_peer,
  81. nbuf,
  82. msdu_metadata);
  83. }
  84. #else
  85. #ifdef QCA_SUPPORT_WDS_EXTENDED
  86. /**
  87. * dp_wds_ext_peer_learn_be() - function to send event to control
  88. * path on receiving 1st 4-address frame from backhaul.
  89. * @soc: DP soc
  90. * @ta_txrx_peer: WDS repeater txrx peer
  91. * @rx_tlv_hdr: start address of rx tlvs
  92. * @nbuf: RX packet buffer
  93. *
  94. * Return: void
  95. */
  96. static inline void dp_wds_ext_peer_learn_be(struct dp_soc *soc,
  97. struct dp_txrx_peer *ta_txrx_peer,
  98. uint8_t *rx_tlv_hdr,
  99. qdf_nbuf_t nbuf)
  100. {
  101. uint8_t wds_ext_src_mac[QDF_MAC_ADDR_SIZE];
  102. struct dp_peer *ta_base_peer;
  103. /* instead of checking addr4 is valid or not in per packet path
  104. * check for init bit, which will be set on reception of
  105. * first addr4 valid packet.
  106. */
  107. if (!ta_txrx_peer->vdev->wds_ext_enabled ||
  108. qdf_atomic_test_bit(WDS_EXT_PEER_INIT_BIT,
  109. &ta_txrx_peer->wds_ext.init))
  110. return;
  111. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  112. (qdf_nbuf_is_fr_ds_set(nbuf) && qdf_nbuf_is_to_ds_set(nbuf))) {
  113. qdf_atomic_test_and_set_bit(WDS_EXT_PEER_INIT_BIT,
  114. &ta_txrx_peer->wds_ext.init);
  115. if (qdf_unlikely(ta_txrx_peer->nawds_enabled &&
  116. ta_txrx_peer->is_mld_peer)) {
  117. ta_base_peer = dp_get_primary_link_peer_by_id(
  118. soc,
  119. ta_txrx_peer->peer_id,
  120. DP_MOD_ID_RX);
  121. } else {
  122. ta_base_peer = dp_peer_get_ref_by_id(
  123. soc,
  124. ta_txrx_peer->peer_id,
  125. DP_MOD_ID_RX);
  126. }
  127. if (!ta_base_peer)
  128. return;
  129. qdf_mem_copy(wds_ext_src_mac, &ta_base_peer->mac_addr.raw[0],
  130. QDF_MAC_ADDR_SIZE);
  131. dp_peer_unref_delete(ta_base_peer, DP_MOD_ID_RX);
  132. soc->cdp_soc.ol_ops->rx_wds_ext_peer_learn(
  133. soc->ctrl_psoc,
  134. ta_txrx_peer->peer_id,
  135. ta_txrx_peer->vdev->vdev_id,
  136. wds_ext_src_mac);
  137. }
  138. }
  139. #else
  140. static inline void dp_wds_ext_peer_learn_be(struct dp_soc *soc,
  141. struct dp_txrx_peer *ta_txrx_peer,
  142. uint8_t *rx_tlv_hdr,
  143. qdf_nbuf_t nbuf)
  144. {
  145. }
  146. #endif
  147. static void
  148. dp_rx_wds_learn(struct dp_soc *soc,
  149. struct dp_vdev *vdev,
  150. uint8_t *rx_tlv_hdr,
  151. struct dp_txrx_peer *ta_txrx_peer,
  152. qdf_nbuf_t nbuf)
  153. {
  154. dp_wds_ext_peer_learn_be(soc, ta_txrx_peer, rx_tlv_hdr, nbuf);
  155. }
  156. #endif
  157. uint32_t dp_rx_process_be(struct dp_intr *int_ctx,
  158. hal_ring_handle_t hal_ring_hdl, uint8_t reo_ring_num,
  159. uint32_t quota)
  160. {
  161. hal_ring_desc_t ring_desc;
  162. hal_ring_desc_t last_prefetched_hw_desc;
  163. hal_soc_handle_t hal_soc;
  164. struct dp_rx_desc *rx_desc = NULL;
  165. struct dp_rx_desc *last_prefetched_sw_desc = NULL;
  166. qdf_nbuf_t nbuf, next;
  167. bool near_full;
  168. union dp_rx_desc_list_elem_t *head[WLAN_MAX_MLO_CHIPS][MAX_PDEV_CNT];
  169. union dp_rx_desc_list_elem_t *tail[WLAN_MAX_MLO_CHIPS][MAX_PDEV_CNT];
  170. uint32_t num_pending = 0;
  171. uint32_t rx_bufs_used = 0, rx_buf_cookie;
  172. uint16_t msdu_len = 0;
  173. uint16_t peer_id;
  174. uint8_t vdev_id;
  175. struct dp_txrx_peer *txrx_peer;
  176. dp_txrx_ref_handle txrx_ref_handle = NULL;
  177. struct dp_vdev *vdev;
  178. uint32_t pkt_len = 0;
  179. enum hal_reo_error_status error;
  180. uint8_t *rx_tlv_hdr;
  181. uint32_t rx_bufs_reaped[WLAN_MAX_MLO_CHIPS][MAX_PDEV_CNT];
  182. uint8_t mac_id = 0;
  183. struct dp_pdev *rx_pdev;
  184. uint8_t enh_flag;
  185. struct dp_srng *dp_rxdma_srng;
  186. struct rx_desc_pool *rx_desc_pool;
  187. struct dp_soc *soc = int_ctx->soc;
  188. struct cdp_tid_rx_stats *tid_stats;
  189. qdf_nbuf_t nbuf_head;
  190. qdf_nbuf_t nbuf_tail;
  191. qdf_nbuf_t deliver_list_head;
  192. qdf_nbuf_t deliver_list_tail;
  193. uint32_t num_rx_bufs_reaped = 0;
  194. uint32_t intr_id;
  195. struct hif_opaque_softc *scn;
  196. int32_t tid = 0;
  197. bool is_prev_msdu_last = true;
  198. uint32_t num_entries_avail = 0;
  199. uint32_t rx_ol_pkt_cnt = 0;
  200. uint32_t num_entries = 0;
  201. QDF_STATUS status;
  202. qdf_nbuf_t ebuf_head;
  203. qdf_nbuf_t ebuf_tail;
  204. uint8_t pkt_capture_offload = 0;
  205. struct dp_srng *rx_ring = &soc->reo_dest_ring[reo_ring_num];
  206. int max_reap_limit, ring_near_full;
  207. struct dp_soc *replenish_soc;
  208. uint8_t chip_id;
  209. uint64_t current_time = 0;
  210. uint32_t old_tid;
  211. uint32_t peer_ext_stats;
  212. uint32_t dsf;
  213. uint32_t l3_pad;
  214. uint8_t link_id = 0;
  215. DP_HIST_INIT();
  216. qdf_assert_always(soc && hal_ring_hdl);
  217. hal_soc = soc->hal_soc;
  218. qdf_assert_always(hal_soc);
  219. scn = soc->hif_handle;
  220. intr_id = int_ctx->dp_intr_id;
  221. num_entries = hal_srng_get_num_entries(hal_soc, hal_ring_hdl);
  222. dp_runtime_pm_mark_last_busy(soc);
  223. more_data:
  224. /* reset local variables here to be re-used in the function */
  225. nbuf_head = NULL;
  226. nbuf_tail = NULL;
  227. deliver_list_head = NULL;
  228. deliver_list_tail = NULL;
  229. txrx_peer = NULL;
  230. vdev = NULL;
  231. num_rx_bufs_reaped = 0;
  232. ebuf_head = NULL;
  233. ebuf_tail = NULL;
  234. ring_near_full = 0;
  235. max_reap_limit = dp_rx_get_loop_pkt_limit(soc);
  236. qdf_mem_zero(rx_bufs_reaped, sizeof(rx_bufs_reaped));
  237. qdf_mem_zero(head, sizeof(head));
  238. qdf_mem_zero(tail, sizeof(tail));
  239. old_tid = 0xff;
  240. dsf = 0;
  241. peer_ext_stats = 0;
  242. rx_pdev = NULL;
  243. tid_stats = NULL;
  244. dp_pkt_get_timestamp(&current_time);
  245. ring_near_full = _dp_srng_test_and_update_nf_params(soc, rx_ring,
  246. &max_reap_limit);
  247. peer_ext_stats = wlan_cfg_is_peer_ext_stats_enabled(soc->wlan_cfg_ctx);
  248. if (qdf_unlikely(dp_rx_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  249. /*
  250. * Need API to convert from hal_ring pointer to
  251. * Ring Type / Ring Id combo
  252. */
  253. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  254. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  255. FL("HAL RING Access Failed -- %pK"), hal_ring_hdl);
  256. goto done;
  257. }
  258. hal_srng_update_ring_usage_wm_no_lock(soc->hal_soc, hal_ring_hdl);
  259. if (!num_pending)
  260. num_pending = hal_srng_dst_num_valid(hal_soc, hal_ring_hdl, 0);
  261. if (num_pending > quota)
  262. num_pending = quota;
  263. dp_srng_dst_inv_cached_descs(soc, hal_ring_hdl, num_pending);
  264. last_prefetched_hw_desc = dp_srng_dst_prefetch_32_byte_desc(hal_soc,
  265. hal_ring_hdl,
  266. num_pending);
  267. /*
  268. * start reaping the buffers from reo ring and queue
  269. * them in per vdev queue.
  270. * Process the received pkts in a different per vdev loop.
  271. */
  272. while (qdf_likely(num_pending)) {
  273. ring_desc = dp_srng_dst_get_next(soc, hal_ring_hdl);
  274. if (qdf_unlikely(!ring_desc))
  275. break;
  276. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  277. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  278. dp_rx_err("%pK: HAL RING 0x%pK:error %d",
  279. soc, hal_ring_hdl, error);
  280. DP_STATS_INC(soc, rx.err.hal_reo_error[reo_ring_num],
  281. 1);
  282. /* Don't know how to deal with this -- assert */
  283. qdf_assert(0);
  284. }
  285. dp_rx_ring_record_entry(soc, reo_ring_num, ring_desc);
  286. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  287. status = dp_rx_cookie_check_and_invalidate(ring_desc);
  288. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  289. DP_STATS_INC(soc, rx.err.stale_cookie, 1);
  290. break;
  291. }
  292. rx_desc = (struct dp_rx_desc *)
  293. hal_rx_get_reo_desc_va(ring_desc);
  294. dp_rx_desc_sw_cc_check(soc, rx_buf_cookie, &rx_desc);
  295. status = dp_rx_desc_sanity(soc, hal_soc, hal_ring_hdl,
  296. ring_desc, rx_desc);
  297. if (QDF_IS_STATUS_ERROR(status)) {
  298. if (qdf_unlikely(rx_desc && rx_desc->nbuf)) {
  299. qdf_assert_always(!rx_desc->unmapped);
  300. dp_rx_nbuf_unmap(soc, rx_desc, reo_ring_num);
  301. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf,
  302. rx_desc->pool_id);
  303. dp_rx_add_to_free_desc_list(
  304. &head[rx_desc->chip_id][rx_desc->pool_id],
  305. &tail[rx_desc->chip_id][rx_desc->pool_id],
  306. rx_desc);
  307. }
  308. continue;
  309. }
  310. /*
  311. * this is a unlikely scenario where the host is reaping
  312. * a descriptor which it already reaped just a while ago
  313. * but is yet to replenish it back to HW.
  314. * In this case host will dump the last 128 descriptors
  315. * including the software descriptor rx_desc and assert.
  316. */
  317. if (qdf_unlikely(!rx_desc->in_use)) {
  318. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  319. dp_info_rl("Reaping rx_desc not in use!");
  320. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  321. ring_desc, rx_desc);
  322. continue;
  323. }
  324. status = dp_rx_desc_nbuf_sanity_check(soc, ring_desc, rx_desc);
  325. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  326. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  327. dp_info_rl("Nbuf sanity check failure!");
  328. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  329. ring_desc, rx_desc);
  330. rx_desc->in_err_state = 1;
  331. continue;
  332. }
  333. if (qdf_unlikely(!dp_rx_desc_check_magic(rx_desc))) {
  334. dp_err("Invalid rx_desc cookie=%d", rx_buf_cookie);
  335. DP_STATS_INC(soc, rx.err.rx_desc_invalid_magic, 1);
  336. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  337. ring_desc, rx_desc);
  338. }
  339. pkt_capture_offload =
  340. dp_rx_copy_desc_info_in_nbuf_cb(soc, ring_desc,
  341. rx_desc->nbuf,
  342. reo_ring_num);
  343. if (qdf_unlikely(qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf))) {
  344. /* In dp_rx_sg_create() until the last buffer,
  345. * end bit should not be set. As continuation bit set,
  346. * this is not a last buffer.
  347. */
  348. qdf_nbuf_set_rx_chfrag_end(rx_desc->nbuf, 0);
  349. /* previous msdu has end bit set, so current one is
  350. * the new MPDU
  351. */
  352. if (is_prev_msdu_last) {
  353. /* Get number of entries available in HW ring */
  354. num_entries_avail =
  355. hal_srng_dst_num_valid(hal_soc,
  356. hal_ring_hdl, 1);
  357. /* For new MPDU check if we can read complete
  358. * MPDU by comparing the number of buffers
  359. * available and number of buffers needed to
  360. * reap this MPDU
  361. */
  362. if ((QDF_NBUF_CB_RX_PKT_LEN(rx_desc->nbuf) /
  363. (RX_DATA_BUFFER_SIZE -
  364. soc->rx_pkt_tlv_size) + 1) >
  365. num_pending) {
  366. DP_STATS_INC(soc,
  367. rx.msdu_scatter_wait_break,
  368. 1);
  369. dp_rx_cookie_reset_invalid_bit(
  370. ring_desc);
  371. /* As we are going to break out of the
  372. * loop because of unavailability of
  373. * descs to form complete SG, we need to
  374. * reset the TP in the REO destination
  375. * ring.
  376. */
  377. hal_srng_dst_dec_tp(hal_soc,
  378. hal_ring_hdl);
  379. break;
  380. }
  381. is_prev_msdu_last = false;
  382. }
  383. }
  384. if (!is_prev_msdu_last &&
  385. !(qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf)))
  386. is_prev_msdu_last = true;
  387. rx_bufs_reaped[rx_desc->chip_id][rx_desc->pool_id]++;
  388. /*
  389. * move unmap after scattered msdu waiting break logic
  390. * in case double skb unmap happened.
  391. */
  392. dp_rx_nbuf_unmap(soc, rx_desc, reo_ring_num);
  393. DP_RX_PROCESS_NBUF(soc, nbuf_head, nbuf_tail, ebuf_head,
  394. ebuf_tail, rx_desc);
  395. quota -= 1;
  396. num_pending -= 1;
  397. dp_rx_add_to_free_desc_list
  398. (&head[rx_desc->chip_id][rx_desc->pool_id],
  399. &tail[rx_desc->chip_id][rx_desc->pool_id], rx_desc);
  400. num_rx_bufs_reaped++;
  401. dp_rx_prefetch_hw_sw_nbuf_32_byte_desc(soc, hal_soc,
  402. num_pending,
  403. hal_ring_hdl,
  404. &last_prefetched_hw_desc,
  405. &last_prefetched_sw_desc);
  406. /*
  407. * only if complete msdu is received for scatter case,
  408. * then allow break.
  409. */
  410. if (is_prev_msdu_last &&
  411. dp_rx_reap_loop_pkt_limit_hit(soc, num_rx_bufs_reaped,
  412. max_reap_limit))
  413. break;
  414. }
  415. done:
  416. dp_rx_srng_access_end(int_ctx, soc, hal_ring_hdl);
  417. qdf_dsb();
  418. dp_rx_per_core_stats_update(soc, reo_ring_num, num_rx_bufs_reaped);
  419. for (chip_id = 0; chip_id < WLAN_MAX_MLO_CHIPS; chip_id++) {
  420. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  421. /*
  422. * continue with next mac_id if no pkts were reaped
  423. * from that pool
  424. */
  425. if (!rx_bufs_reaped[chip_id][mac_id])
  426. continue;
  427. replenish_soc = dp_rx_replenish_soc_get(soc, chip_id);
  428. dp_rxdma_srng =
  429. &replenish_soc->rx_refill_buf_ring[mac_id];
  430. rx_desc_pool = &replenish_soc->rx_desc_buf[mac_id];
  431. dp_rx_buffers_replenish_simple(replenish_soc, mac_id,
  432. dp_rxdma_srng,
  433. rx_desc_pool,
  434. rx_bufs_reaped[chip_id][mac_id],
  435. &head[chip_id][mac_id],
  436. &tail[chip_id][mac_id]);
  437. }
  438. }
  439. /* Peer can be NULL is case of LFR */
  440. if (qdf_likely(txrx_peer))
  441. vdev = NULL;
  442. /*
  443. * BIG loop where each nbuf is dequeued from global queue,
  444. * processed and queued back on a per vdev basis. These nbufs
  445. * are sent to stack as and when we run out of nbufs
  446. * or a new nbuf dequeued from global queue has a different
  447. * vdev when compared to previous nbuf.
  448. */
  449. nbuf = nbuf_head;
  450. while (nbuf) {
  451. next = nbuf->next;
  452. dp_rx_prefetch_nbuf_data_be(nbuf, next);
  453. if (qdf_unlikely(dp_rx_is_raw_frame_dropped(nbuf))) {
  454. nbuf = next;
  455. DP_STATS_INC(soc, rx.err.raw_frm_drop, 1);
  456. continue;
  457. }
  458. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  459. vdev_id = QDF_NBUF_CB_RX_VDEV_ID(nbuf);
  460. peer_id = dp_rx_get_peer_id_be(nbuf);
  461. dp_rx_set_mpdu_seq_number_be(nbuf, rx_tlv_hdr);
  462. if (dp_rx_is_list_ready(deliver_list_head, vdev, txrx_peer,
  463. peer_id, vdev_id)) {
  464. dp_rx_deliver_to_stack(soc, vdev, txrx_peer,
  465. deliver_list_head,
  466. deliver_list_tail);
  467. deliver_list_head = NULL;
  468. deliver_list_tail = NULL;
  469. }
  470. /* Get TID from struct cb->tid_val, save to tid */
  471. tid = qdf_nbuf_get_tid_val(nbuf);
  472. if (qdf_unlikely(tid >= CDP_MAX_DATA_TIDS)) {
  473. DP_STATS_INC(soc, rx.err.rx_invalid_tid_err, 1);
  474. dp_rx_nbuf_free(nbuf);
  475. nbuf = next;
  476. continue;
  477. }
  478. if (qdf_unlikely(!txrx_peer)) {
  479. txrx_peer = dp_rx_get_txrx_peer_and_vdev(soc, nbuf,
  480. peer_id,
  481. &txrx_ref_handle,
  482. pkt_capture_offload,
  483. &vdev,
  484. &rx_pdev, &dsf,
  485. &old_tid);
  486. if (qdf_unlikely(!txrx_peer) || qdf_unlikely(!vdev)) {
  487. nbuf = next;
  488. continue;
  489. }
  490. enh_flag = rx_pdev->enhanced_stats_en;
  491. } else if (txrx_peer && txrx_peer->peer_id != peer_id) {
  492. dp_txrx_peer_unref_delete(txrx_ref_handle,
  493. DP_MOD_ID_RX);
  494. txrx_peer = dp_rx_get_txrx_peer_and_vdev(soc, nbuf,
  495. peer_id,
  496. &txrx_ref_handle,
  497. pkt_capture_offload,
  498. &vdev,
  499. &rx_pdev, &dsf,
  500. &old_tid);
  501. if (qdf_unlikely(!txrx_peer) || qdf_unlikely(!vdev)) {
  502. nbuf = next;
  503. continue;
  504. }
  505. enh_flag = rx_pdev->enhanced_stats_en;
  506. }
  507. if (txrx_peer) {
  508. QDF_NBUF_CB_DP_TRACE_PRINT(nbuf) = false;
  509. qdf_dp_trace_set_track(nbuf, QDF_RX);
  510. QDF_NBUF_CB_RX_DP_TRACE(nbuf) = 1;
  511. QDF_NBUF_CB_RX_PACKET_TRACK(nbuf) =
  512. QDF_NBUF_RX_PKT_DATA_TRACK;
  513. }
  514. rx_bufs_used++;
  515. /* MLD Link Peer Statistics support */
  516. if (txrx_peer->is_mld_peer && rx_pdev->link_peer_stats) {
  517. link_id = dp_rx_get_stats_arr_idx_from_link_id(
  518. nbuf,
  519. txrx_peer);
  520. } else {
  521. link_id = 0;
  522. }
  523. dp_rx_set_nbuf_band(nbuf, txrx_peer, link_id);
  524. /* when hlos tid override is enabled, save tid in
  525. * skb->priority
  526. */
  527. if (qdf_unlikely(vdev->skip_sw_tid_classification &
  528. DP_TXRX_HLOS_TID_OVERRIDE_ENABLED))
  529. qdf_nbuf_set_priority(nbuf, tid);
  530. DP_RX_TID_SAVE(nbuf, tid);
  531. if (qdf_unlikely(dsf) || qdf_unlikely(peer_ext_stats) ||
  532. dp_rx_pkt_tracepoints_enabled())
  533. qdf_nbuf_set_timestamp(nbuf);
  534. if (qdf_likely(old_tid != tid)) {
  535. tid_stats =
  536. &rx_pdev->stats.tid_stats.tid_rx_stats[reo_ring_num][tid];
  537. old_tid = tid;
  538. }
  539. /*
  540. * Check if DMA completed -- msdu_done is the last bit
  541. * to be written
  542. */
  543. if (qdf_unlikely(!qdf_nbuf_is_rx_chfrag_cont(nbuf) &&
  544. !hal_rx_tlv_msdu_done_get_be(rx_tlv_hdr))) {
  545. dp_err("MSDU DONE failure");
  546. DP_STATS_INC(soc, rx.err.msdu_done_fail, 1);
  547. hal_rx_dump_pkt_tlvs(hal_soc, rx_tlv_hdr,
  548. QDF_TRACE_LEVEL_INFO);
  549. tid_stats->fail_cnt[MSDU_DONE_FAILURE]++;
  550. dp_rx_nbuf_free(nbuf);
  551. qdf_assert(0);
  552. nbuf = next;
  553. continue;
  554. }
  555. DP_HIST_PACKET_COUNT_INC(vdev->pdev->pdev_id);
  556. /*
  557. * First IF condition:
  558. * 802.11 Fragmented pkts are reinjected to REO
  559. * HW block as SG pkts and for these pkts we only
  560. * need to pull the RX TLVS header length.
  561. * Second IF condition:
  562. * The below condition happens when an MSDU is spread
  563. * across multiple buffers. This can happen in two cases
  564. * 1. The nbuf size is smaller then the received msdu.
  565. * ex: we have set the nbuf size to 2048 during
  566. * nbuf_alloc. but we received an msdu which is
  567. * 2304 bytes in size then this msdu is spread
  568. * across 2 nbufs.
  569. *
  570. * 2. AMSDUs when RAW mode is enabled.
  571. * ex: 1st MSDU is in 1st nbuf and 2nd MSDU is spread
  572. * across 1st nbuf and 2nd nbuf and last MSDU is
  573. * spread across 2nd nbuf and 3rd nbuf.
  574. *
  575. * for these scenarios let us create a skb frag_list and
  576. * append these buffers till the last MSDU of the AMSDU
  577. * Third condition:
  578. * This is the most likely case, we receive 802.3 pkts
  579. * decapsulated by HW, here we need to set the pkt length.
  580. */
  581. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  582. bool is_mcbc, is_sa_vld, is_da_vld;
  583. is_mcbc = hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  584. rx_tlv_hdr);
  585. is_sa_vld =
  586. hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc,
  587. rx_tlv_hdr);
  588. is_da_vld =
  589. hal_rx_msdu_end_da_is_valid_get(soc->hal_soc,
  590. rx_tlv_hdr);
  591. qdf_nbuf_set_da_mcbc(nbuf, is_mcbc);
  592. qdf_nbuf_set_da_valid(nbuf, is_da_vld);
  593. qdf_nbuf_set_sa_valid(nbuf, is_sa_vld);
  594. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  595. } else if (qdf_nbuf_is_rx_chfrag_cont(nbuf)) {
  596. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  597. nbuf = dp_rx_sg_create(soc, nbuf);
  598. next = nbuf->next;
  599. if (qdf_nbuf_is_raw_frame(nbuf)) {
  600. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  601. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  602. rx.raw, 1,
  603. msdu_len,
  604. link_id);
  605. } else {
  606. DP_STATS_INC(soc, rx.err.scatter_msdu, 1);
  607. if (!dp_rx_is_sg_supported()) {
  608. dp_rx_nbuf_free(nbuf);
  609. dp_info_rl("sg msdu len %d, dropped",
  610. msdu_len);
  611. nbuf = next;
  612. continue;
  613. }
  614. }
  615. } else {
  616. l3_pad = hal_rx_get_l3_pad_bytes_be(nbuf, rx_tlv_hdr);
  617. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  618. pkt_len = msdu_len + l3_pad + soc->rx_pkt_tlv_size;
  619. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  620. dp_rx_skip_tlvs(soc, nbuf, l3_pad);
  621. }
  622. dp_rx_send_pktlog(soc, rx_pdev, nbuf, QDF_TX_RX_STATUS_OK);
  623. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, txrx_peer)) {
  624. dp_rx_err("%pK: Policy Check Drop pkt", soc);
  625. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  626. rx.policy_check_drop,
  627. 1, link_id);
  628. tid_stats->fail_cnt[POLICY_CHECK_DROP]++;
  629. /* Drop & free packet */
  630. dp_rx_nbuf_free(nbuf);
  631. /* Statistics */
  632. nbuf = next;
  633. continue;
  634. }
  635. /*
  636. * Drop non-EAPOL frames from unauthorized peer.
  637. */
  638. if (qdf_likely(txrx_peer) &&
  639. qdf_unlikely(!txrx_peer->authorize) &&
  640. !qdf_nbuf_is_raw_frame(nbuf)) {
  641. bool is_eapol = qdf_nbuf_is_ipv4_eapol_pkt(nbuf) ||
  642. qdf_nbuf_is_ipv4_wapi_pkt(nbuf);
  643. if (!is_eapol) {
  644. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  645. rx.peer_unauth_rx_pkt_drop,
  646. 1, link_id);
  647. dp_rx_nbuf_free(nbuf);
  648. nbuf = next;
  649. continue;
  650. }
  651. }
  652. dp_rx_cksum_offload(vdev->pdev, nbuf, rx_tlv_hdr);
  653. dp_rx_update_flow_info(nbuf, rx_tlv_hdr);
  654. if (qdf_unlikely(!rx_pdev->rx_fast_flag)) {
  655. /*
  656. * process frame for mulitpass phrase processing
  657. */
  658. if (qdf_unlikely(vdev->multipass_en)) {
  659. if (dp_rx_multipass_process(txrx_peer, nbuf,
  660. tid) == false) {
  661. DP_PEER_PER_PKT_STATS_INC
  662. (txrx_peer,
  663. rx.multipass_rx_pkt_drop,
  664. 1, link_id);
  665. dp_rx_nbuf_free(nbuf);
  666. nbuf = next;
  667. continue;
  668. }
  669. }
  670. if (qdf_unlikely(txrx_peer &&
  671. (txrx_peer->nawds_enabled) &&
  672. (qdf_nbuf_is_da_mcbc(nbuf)) &&
  673. (hal_rx_get_mpdu_mac_ad4_valid_be
  674. (rx_tlv_hdr) == false))) {
  675. tid_stats->fail_cnt[NAWDS_MCAST_DROP]++;
  676. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  677. rx.nawds_mcast_drop,
  678. 1, link_id);
  679. dp_rx_nbuf_free(nbuf);
  680. nbuf = next;
  681. continue;
  682. }
  683. /* Update the protocol tag in SKB based on CCE metadata
  684. */
  685. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  686. reo_ring_num, false, true);
  687. /* Update the flow tag in SKB based on FSE metadata */
  688. dp_rx_update_flow_tag(soc, vdev, nbuf, rx_tlv_hdr,
  689. true);
  690. if (qdf_unlikely(vdev->mesh_vdev)) {
  691. if (dp_rx_filter_mesh_packets(vdev, nbuf,
  692. rx_tlv_hdr)
  693. == QDF_STATUS_SUCCESS) {
  694. dp_rx_info("%pK: mesh pkt filtered",
  695. soc);
  696. tid_stats->fail_cnt[MESH_FILTER_DROP]++;
  697. DP_STATS_INC(vdev->pdev,
  698. dropped.mesh_filter, 1);
  699. dp_rx_nbuf_free(nbuf);
  700. nbuf = next;
  701. continue;
  702. }
  703. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr,
  704. txrx_peer);
  705. }
  706. }
  707. if (qdf_likely(vdev->rx_decap_type ==
  708. htt_cmn_pkt_type_ethernet) &&
  709. qdf_likely(!vdev->mesh_vdev)) {
  710. dp_rx_wds_learn(soc, vdev,
  711. rx_tlv_hdr,
  712. txrx_peer,
  713. nbuf);
  714. }
  715. dp_rx_msdu_stats_update(soc, nbuf, rx_tlv_hdr, txrx_peer,
  716. reo_ring_num, tid_stats, link_id);
  717. if (qdf_likely(vdev->rx_decap_type ==
  718. htt_cmn_pkt_type_ethernet) &&
  719. qdf_likely(!vdev->mesh_vdev)) {
  720. /* Intrabss-fwd */
  721. if (dp_rx_check_ap_bridge(vdev))
  722. if (dp_rx_intrabss_fwd_be(soc, txrx_peer,
  723. rx_tlv_hdr,
  724. nbuf,
  725. link_id)) {
  726. nbuf = next;
  727. tid_stats->intrabss_cnt++;
  728. continue; /* Get next desc */
  729. }
  730. }
  731. dp_rx_fill_gro_info(soc, rx_tlv_hdr, nbuf, &rx_ol_pkt_cnt);
  732. dp_rx_mark_first_packet_after_wow_wakeup(vdev->pdev, rx_tlv_hdr,
  733. nbuf);
  734. dp_rx_update_stats(soc, nbuf);
  735. dp_pkt_add_timestamp(txrx_peer->vdev, QDF_PKT_RX_DRIVER_ENTRY,
  736. current_time, nbuf);
  737. DP_RX_LIST_APPEND(deliver_list_head,
  738. deliver_list_tail,
  739. nbuf);
  740. DP_PEER_TO_STACK_INCC_PKT(txrx_peer, 1,
  741. QDF_NBUF_CB_RX_PKT_LEN(nbuf),
  742. enh_flag);
  743. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  744. rx.rx_success, 1,
  745. QDF_NBUF_CB_RX_PKT_LEN(nbuf),
  746. link_id);
  747. if (qdf_unlikely(txrx_peer->in_twt))
  748. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  749. rx.to_stack_twt, 1,
  750. QDF_NBUF_CB_RX_PKT_LEN(nbuf),
  751. link_id);
  752. tid_stats->delivered_to_stack++;
  753. nbuf = next;
  754. }
  755. DP_RX_DELIVER_TO_STACK(soc, vdev, txrx_peer, peer_id,
  756. pkt_capture_offload,
  757. deliver_list_head,
  758. deliver_list_tail);
  759. if (qdf_likely(txrx_peer))
  760. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX);
  761. /*
  762. * If we are processing in near-full condition, there are 3 scenario
  763. * 1) Ring entries has reached critical state
  764. * 2) Ring entries are still near high threshold
  765. * 3) Ring entries are below the safe level
  766. *
  767. * One more loop will move the state to normal processing and yield
  768. */
  769. if (ring_near_full && quota)
  770. goto more_data;
  771. if (dp_rx_enable_eol_data_check(soc) && rx_bufs_used) {
  772. if (quota) {
  773. num_pending =
  774. dp_rx_srng_get_num_pending(hal_soc,
  775. hal_ring_hdl,
  776. num_entries,
  777. &near_full);
  778. if (num_pending) {
  779. DP_STATS_INC(soc, rx.hp_oos2, 1);
  780. if (!hif_exec_should_yield(scn, intr_id))
  781. goto more_data;
  782. if (qdf_unlikely(near_full)) {
  783. DP_STATS_INC(soc, rx.near_full, 1);
  784. goto more_data;
  785. }
  786. }
  787. }
  788. if (vdev && vdev->osif_fisa_flush)
  789. vdev->osif_fisa_flush(soc, reo_ring_num);
  790. if (vdev && vdev->osif_gro_flush && rx_ol_pkt_cnt) {
  791. vdev->osif_gro_flush(vdev->osif_vdev,
  792. reo_ring_num);
  793. }
  794. }
  795. /* Update histogram statistics by looping through pdev's */
  796. DP_RX_HIST_STATS_PER_PDEV();
  797. return rx_bufs_used; /* Assume no scale factor for now */
  798. }
  799. #ifdef RX_DESC_MULTI_PAGE_ALLOC
  800. /**
  801. * dp_rx_desc_pool_init_be_cc() - initial RX desc pool for cookie conversion
  802. * @soc: Handle to DP Soc structure
  803. * @rx_desc_pool: Rx descriptor pool handler
  804. * @pool_id: Rx descriptor pool ID
  805. *
  806. * Return: QDF_STATUS_SUCCESS - succeeded, others - failed
  807. */
  808. static QDF_STATUS
  809. dp_rx_desc_pool_init_be_cc(struct dp_soc *soc,
  810. struct rx_desc_pool *rx_desc_pool,
  811. uint32_t pool_id)
  812. {
  813. struct dp_hw_cookie_conversion_t *cc_ctx;
  814. struct dp_soc_be *be_soc;
  815. union dp_rx_desc_list_elem_t *rx_desc_elem;
  816. struct dp_spt_page_desc *page_desc;
  817. uint32_t ppt_idx = 0;
  818. uint32_t avail_entry_index = 0;
  819. if (!rx_desc_pool->pool_size) {
  820. dp_err("desc_num 0 !!");
  821. return QDF_STATUS_E_FAILURE;
  822. }
  823. be_soc = dp_get_be_soc_from_dp_soc(soc);
  824. cc_ctx = &be_soc->rx_cc_ctx[pool_id];
  825. page_desc = &cc_ctx->page_desc_base[0];
  826. rx_desc_elem = rx_desc_pool->freelist;
  827. while (rx_desc_elem) {
  828. if (avail_entry_index == 0) {
  829. if (ppt_idx >= cc_ctx->total_page_num) {
  830. dp_alert("insufficient secondary page tables");
  831. qdf_assert_always(0);
  832. }
  833. page_desc = &cc_ctx->page_desc_base[ppt_idx++];
  834. }
  835. /* put each RX Desc VA to SPT pages and
  836. * get corresponding ID
  837. */
  838. DP_CC_SPT_PAGE_UPDATE_VA(page_desc->page_v_addr,
  839. avail_entry_index,
  840. &rx_desc_elem->rx_desc);
  841. rx_desc_elem->rx_desc.cookie =
  842. dp_cc_desc_id_generate(page_desc->ppt_index,
  843. avail_entry_index);
  844. rx_desc_elem->rx_desc.chip_id = dp_mlo_get_chip_id(soc);
  845. rx_desc_elem->rx_desc.pool_id = pool_id;
  846. rx_desc_elem->rx_desc.in_use = 0;
  847. rx_desc_elem = rx_desc_elem->next;
  848. avail_entry_index = (avail_entry_index + 1) &
  849. DP_CC_SPT_PAGE_MAX_ENTRIES_MASK;
  850. }
  851. return QDF_STATUS_SUCCESS;
  852. }
  853. #else
  854. static QDF_STATUS
  855. dp_rx_desc_pool_init_be_cc(struct dp_soc *soc,
  856. struct rx_desc_pool *rx_desc_pool,
  857. uint32_t pool_id)
  858. {
  859. struct dp_hw_cookie_conversion_t *cc_ctx;
  860. struct dp_soc_be *be_soc;
  861. struct dp_spt_page_desc *page_desc;
  862. uint32_t ppt_idx = 0;
  863. uint32_t avail_entry_index = 0;
  864. int i = 0;
  865. if (!rx_desc_pool->pool_size) {
  866. dp_err("desc_num 0 !!");
  867. return QDF_STATUS_E_FAILURE;
  868. }
  869. be_soc = dp_get_be_soc_from_dp_soc(soc);
  870. cc_ctx = &be_soc->rx_cc_ctx[pool_id];
  871. page_desc = &cc_ctx->page_desc_base[0];
  872. for (i = 0; i <= rx_desc_pool->pool_size - 1; i++) {
  873. if (i == rx_desc_pool->pool_size - 1)
  874. rx_desc_pool->array[i].next = NULL;
  875. else
  876. rx_desc_pool->array[i].next =
  877. &rx_desc_pool->array[i + 1];
  878. if (avail_entry_index == 0) {
  879. if (ppt_idx >= cc_ctx->total_page_num) {
  880. dp_alert("insufficient secondary page tables");
  881. qdf_assert_always(0);
  882. }
  883. page_desc = &cc_ctx->page_desc_base[ppt_idx++];
  884. }
  885. /* put each RX Desc VA to SPT pages and
  886. * get corresponding ID
  887. */
  888. DP_CC_SPT_PAGE_UPDATE_VA(page_desc->page_v_addr,
  889. avail_entry_index,
  890. &rx_desc_pool->array[i].rx_desc);
  891. rx_desc_pool->array[i].rx_desc.cookie =
  892. dp_cc_desc_id_generate(page_desc->ppt_index,
  893. avail_entry_index);
  894. rx_desc_pool->array[i].rx_desc.pool_id = pool_id;
  895. rx_desc_pool->array[i].rx_desc.in_use = 0;
  896. rx_desc_pool->array[i].rx_desc.chip_id =
  897. dp_mlo_get_chip_id(soc);
  898. avail_entry_index = (avail_entry_index + 1) &
  899. DP_CC_SPT_PAGE_MAX_ENTRIES_MASK;
  900. }
  901. return QDF_STATUS_SUCCESS;
  902. }
  903. #endif
  904. static void
  905. dp_rx_desc_pool_deinit_be_cc(struct dp_soc *soc,
  906. struct rx_desc_pool *rx_desc_pool,
  907. uint32_t pool_id)
  908. {
  909. struct dp_spt_page_desc *page_desc;
  910. struct dp_soc_be *be_soc;
  911. int i = 0;
  912. struct dp_hw_cookie_conversion_t *cc_ctx;
  913. be_soc = dp_get_be_soc_from_dp_soc(soc);
  914. cc_ctx = &be_soc->rx_cc_ctx[pool_id];
  915. for (i = 0; i < cc_ctx->total_page_num; i++) {
  916. page_desc = &cc_ctx->page_desc_base[i];
  917. qdf_mem_zero(page_desc->page_v_addr, qdf_page_size);
  918. }
  919. }
  920. QDF_STATUS dp_rx_desc_pool_init_be(struct dp_soc *soc,
  921. struct rx_desc_pool *rx_desc_pool,
  922. uint32_t pool_id)
  923. {
  924. QDF_STATUS status = QDF_STATUS_SUCCESS;
  925. /* Only regular RX buffer desc pool use HW cookie conversion */
  926. if (rx_desc_pool->desc_type == QDF_DP_RX_DESC_BUF_TYPE) {
  927. dp_info("rx_desc_buf pool init");
  928. status = dp_rx_desc_pool_init_be_cc(soc,
  929. rx_desc_pool,
  930. pool_id);
  931. } else {
  932. dp_info("non_rx_desc_buf_pool init");
  933. status = dp_rx_desc_pool_init_generic(soc, rx_desc_pool,
  934. pool_id);
  935. }
  936. return status;
  937. }
  938. void dp_rx_desc_pool_deinit_be(struct dp_soc *soc,
  939. struct rx_desc_pool *rx_desc_pool,
  940. uint32_t pool_id)
  941. {
  942. if (rx_desc_pool->desc_type == QDF_DP_RX_DESC_BUF_TYPE)
  943. dp_rx_desc_pool_deinit_be_cc(soc, rx_desc_pool, pool_id);
  944. }
  945. #ifdef DP_FEATURE_HW_COOKIE_CONVERSION
  946. #ifdef DP_HW_COOKIE_CONVERT_EXCEPTION
  947. QDF_STATUS dp_wbm_get_rx_desc_from_hal_desc_be(struct dp_soc *soc,
  948. void *ring_desc,
  949. struct dp_rx_desc **r_rx_desc)
  950. {
  951. if (hal_rx_wbm_get_cookie_convert_done(ring_desc)) {
  952. /* HW cookie conversion done */
  953. *r_rx_desc = (struct dp_rx_desc *)
  954. hal_rx_wbm_get_desc_va(ring_desc);
  955. } else {
  956. /* SW do cookie conversion */
  957. uint32_t cookie = HAL_RX_BUF_COOKIE_GET(ring_desc);
  958. *r_rx_desc = (struct dp_rx_desc *)
  959. dp_cc_desc_find(soc, cookie);
  960. }
  961. return QDF_STATUS_SUCCESS;
  962. }
  963. #else
  964. QDF_STATUS dp_wbm_get_rx_desc_from_hal_desc_be(struct dp_soc *soc,
  965. void *ring_desc,
  966. struct dp_rx_desc **r_rx_desc)
  967. {
  968. *r_rx_desc = (struct dp_rx_desc *)
  969. hal_rx_wbm_get_desc_va(ring_desc);
  970. return QDF_STATUS_SUCCESS;
  971. }
  972. #endif /* DP_HW_COOKIE_CONVERT_EXCEPTION */
  973. struct dp_rx_desc *dp_rx_desc_ppeds_cookie_2_va(struct dp_soc *soc,
  974. unsigned long cookie)
  975. {
  976. return (struct dp_rx_desc *)cookie;
  977. }
  978. #else
  979. struct dp_rx_desc *dp_rx_desc_ppeds_cookie_2_va(struct dp_soc *soc,
  980. unsigned long cookie)
  981. {
  982. if (!cookie)
  983. return NULL;
  984. return (struct dp_rx_desc *)dp_cc_desc_find(soc, cookie);
  985. }
  986. QDF_STATUS dp_wbm_get_rx_desc_from_hal_desc_be(struct dp_soc *soc,
  987. void *ring_desc,
  988. struct dp_rx_desc **r_rx_desc)
  989. {
  990. /* SW do cookie conversion */
  991. uint32_t cookie = HAL_RX_BUF_COOKIE_GET(ring_desc);
  992. *r_rx_desc = (struct dp_rx_desc *)
  993. dp_cc_desc_find(soc, cookie);
  994. return QDF_STATUS_SUCCESS;
  995. }
  996. #endif /* DP_FEATURE_HW_COOKIE_CONVERSION */
  997. struct dp_rx_desc *dp_rx_desc_cookie_2_va_be(struct dp_soc *soc,
  998. uint32_t cookie)
  999. {
  1000. return (struct dp_rx_desc *)dp_cc_desc_find(soc, cookie);
  1001. }
  1002. #if defined(WLAN_FEATURE_11BE_MLO)
  1003. #if defined(WLAN_MLO_MULTI_CHIP) && defined(WLAN_MCAST_MLO)
  1004. #define DP_RANDOM_MAC_ID_BIT_MASK 0xC0
  1005. #define DP_RANDOM_MAC_OFFSET 1
  1006. #define DP_MAC_LOCAL_ADMBIT_MASK 0x2
  1007. #define DP_MAC_LOCAL_ADMBIT_OFFSET 0
  1008. static inline void dp_rx_dummy_src_mac(struct dp_vdev *vdev,
  1009. qdf_nbuf_t nbuf)
  1010. {
  1011. qdf_ether_header_t *eh =
  1012. (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1013. eh->ether_shost[DP_MAC_LOCAL_ADMBIT_OFFSET] =
  1014. eh->ether_shost[DP_MAC_LOCAL_ADMBIT_OFFSET] |
  1015. DP_MAC_LOCAL_ADMBIT_MASK;
  1016. }
  1017. #ifdef QCA_SUPPORT_WDS_EXTENDED
  1018. static inline bool dp_rx_mlo_igmp_wds_ext_handler(struct dp_txrx_peer *peer)
  1019. {
  1020. return qdf_atomic_test_bit(WDS_EXT_PEER_INIT_BIT, &peer->wds_ext.init);
  1021. }
  1022. #else
  1023. static inline bool dp_rx_mlo_igmp_wds_ext_handler(struct dp_txrx_peer *peer)
  1024. {
  1025. return false;
  1026. }
  1027. #endif
  1028. #ifdef EXT_HYBRID_MLO_MODE
  1029. static inline
  1030. bool dp_rx_check_ext_hybrid_mode(struct dp_soc *soc, struct dp_vdev *vdev)
  1031. {
  1032. return ((DP_MLD_MODE_HYBRID_NONBOND == soc->mld_mode_ap) &&
  1033. (wlan_op_mode_ap == vdev->opmode));
  1034. }
  1035. #else
  1036. static inline
  1037. bool dp_rx_check_ext_hybrid_mode(struct dp_soc *soc, struct dp_vdev *vdev)
  1038. {
  1039. return false;
  1040. }
  1041. #endif
  1042. bool dp_rx_mlo_igmp_handler(struct dp_soc *soc,
  1043. struct dp_vdev *vdev,
  1044. struct dp_txrx_peer *peer,
  1045. qdf_nbuf_t nbuf,
  1046. uint8_t link_id)
  1047. {
  1048. qdf_nbuf_t nbuf_copy;
  1049. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  1050. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  1051. struct cdp_tid_rx_stats *tid_stats = &peer->vdev->pdev->stats.
  1052. tid_stats.tid_rx_wbm_stats[0][tid];
  1053. if (!(qdf_nbuf_is_ipv4_igmp_pkt(nbuf) ||
  1054. qdf_nbuf_is_ipv6_igmp_pkt(nbuf)))
  1055. return false;
  1056. if (qdf_unlikely(vdev->multipass_en)) {
  1057. if (dp_rx_multipass_process(peer, nbuf, tid) == false) {
  1058. DP_PEER_PER_PKT_STATS_INC(peer,
  1059. rx.multipass_rx_pkt_drop,
  1060. 1, link_id);
  1061. return false;
  1062. }
  1063. }
  1064. if (!peer->bss_peer) {
  1065. if (dp_rx_intrabss_mcbc_fwd(soc, peer, NULL, nbuf,
  1066. tid_stats, link_id))
  1067. dp_rx_err("forwarding failed");
  1068. }
  1069. qdf_nbuf_set_next(nbuf, NULL);
  1070. /* REO sends IGMP to driver only if AP is operating in hybrid
  1071. * mld mode.
  1072. */
  1073. if (qdf_unlikely(dp_rx_mlo_igmp_wds_ext_handler(peer))) {
  1074. /* send the IGMP to the netdev corresponding to the interface
  1075. * its received on
  1076. */
  1077. goto send_pkt;
  1078. }
  1079. if (dp_rx_check_ext_hybrid_mode(soc, vdev)) {
  1080. /* send the IGMP to the netdev corresponding to the interface
  1081. * its received on
  1082. */
  1083. goto send_pkt;
  1084. }
  1085. /*
  1086. * In the case of ME5/ME6, Backhaul WDS for a mld peer, NAWDS,
  1087. * legacy non-mlo AP vdev & non-AP vdev(which is very unlikely),
  1088. * send the igmp pkt on the same link where it received, as these
  1089. * features will use peer based tcl metadata.
  1090. */
  1091. if (vdev->mcast_enhancement_en ||
  1092. peer->is_mld_peer ||
  1093. peer->nawds_enabled ||
  1094. !vdev->mlo_vdev ||
  1095. qdf_unlikely(wlan_op_mode_ap != vdev->opmode)) {
  1096. /* send the IGMP to the netdev corresponding to the interface
  1097. * its received on
  1098. */
  1099. goto send_pkt;
  1100. }
  1101. /* We are here, it means a legacy non-wds sta is connected
  1102. * to a hybrid mld ap, So send a clone of the IGPMP packet
  1103. * on the interface where it was received.
  1104. */
  1105. nbuf_copy = qdf_nbuf_copy(nbuf);
  1106. if (qdf_likely(nbuf_copy))
  1107. dp_rx_deliver_to_stack(soc, vdev, peer, nbuf_copy, NULL);
  1108. dp_rx_dummy_src_mac(vdev, nbuf);
  1109. /* Set the ml peer valid bit in skb peer metadata, so that osif
  1110. * can deliver the SA mangled IGMP packet to mld netdev.
  1111. */
  1112. QDF_NBUF_CB_RX_PEER_ID(nbuf) |= CDP_RX_ML_PEER_VALID_MASK;
  1113. /* Deliver the original IGMP with dummy src on the mld netdev */
  1114. send_pkt:
  1115. dp_rx_deliver_to_stack(be_vdev->vdev.pdev->soc,
  1116. &be_vdev->vdev,
  1117. peer,
  1118. nbuf,
  1119. NULL);
  1120. return true;
  1121. }
  1122. #else
  1123. bool dp_rx_mlo_igmp_handler(struct dp_soc *soc,
  1124. struct dp_vdev *vdev,
  1125. struct dp_txrx_peer *peer,
  1126. qdf_nbuf_t nbuf,
  1127. uint8_t link_id)
  1128. {
  1129. return false;
  1130. }
  1131. #endif
  1132. #endif
  1133. #ifdef WLAN_FEATURE_NEAR_FULL_IRQ
  1134. uint32_t dp_rx_nf_process(struct dp_intr *int_ctx,
  1135. hal_ring_handle_t hal_ring_hdl,
  1136. uint8_t reo_ring_num,
  1137. uint32_t quota)
  1138. {
  1139. struct dp_soc *soc = int_ctx->soc;
  1140. struct dp_srng *rx_ring = &soc->reo_dest_ring[reo_ring_num];
  1141. uint32_t work_done = 0;
  1142. if (dp_srng_get_near_full_level(soc, rx_ring) <
  1143. DP_SRNG_THRESH_NEAR_FULL)
  1144. return 0;
  1145. qdf_atomic_set(&rx_ring->near_full, 1);
  1146. work_done++;
  1147. return work_done;
  1148. }
  1149. #endif
  1150. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1151. #ifdef WLAN_FEATURE_11BE_MLO
  1152. /**
  1153. * dp_rx_intrabss_fwd_mlo_allow() - check if MLO forwarding is allowed
  1154. * @ta_peer: transmitter peer handle
  1155. * @da_peer: destination peer handle
  1156. *
  1157. * Return: true - MLO forwarding case, false: not
  1158. */
  1159. static inline bool
  1160. dp_rx_intrabss_fwd_mlo_allow(struct dp_txrx_peer *ta_peer,
  1161. struct dp_txrx_peer *da_peer)
  1162. {
  1163. /* TA peer and DA peer's vdev should be partner MLO vdevs */
  1164. if (dp_peer_find_mac_addr_cmp(&ta_peer->vdev->mld_mac_addr,
  1165. &da_peer->vdev->mld_mac_addr))
  1166. return false;
  1167. return true;
  1168. }
  1169. #else
  1170. static inline bool
  1171. dp_rx_intrabss_fwd_mlo_allow(struct dp_txrx_peer *ta_peer,
  1172. struct dp_txrx_peer *da_peer)
  1173. {
  1174. return false;
  1175. }
  1176. #endif
  1177. #ifdef INTRA_BSS_FWD_OFFLOAD
  1178. /**
  1179. * dp_rx_intrabss_ucast_check_be() - Check if intrabss is allowed
  1180. * for unicast frame
  1181. * @nbuf: RX packet buffer
  1182. * @ta_peer: transmitter DP peer handle
  1183. * @rx_tlv_hdr: Rx TLV header
  1184. * @msdu_metadata: MSDU meta data info
  1185. * @params: params to be filled in
  1186. *
  1187. * Return: true - intrabss allowed
  1188. * false - not allow
  1189. */
  1190. static bool
  1191. dp_rx_intrabss_ucast_check_be(qdf_nbuf_t nbuf,
  1192. struct dp_txrx_peer *ta_peer,
  1193. uint8_t *rx_tlv_hdr,
  1194. struct hal_rx_msdu_metadata *msdu_metadata,
  1195. struct dp_be_intrabss_params *params)
  1196. {
  1197. uint8_t dest_chip_id, dest_chip_pmac_id;
  1198. struct dp_vdev_be *be_vdev =
  1199. dp_get_be_vdev_from_dp_vdev(ta_peer->vdev);
  1200. struct dp_soc_be *be_soc =
  1201. dp_get_be_soc_from_dp_soc(params->dest_soc);
  1202. uint16_t da_peer_id;
  1203. struct dp_peer *da_peer = NULL;
  1204. if (!qdf_nbuf_is_intra_bss(nbuf))
  1205. return false;
  1206. if (!be_vdev->mlo_dev_ctxt) {
  1207. params->tx_vdev_id = ta_peer->vdev->vdev_id;
  1208. return true;
  1209. }
  1210. hal_rx_tlv_get_dest_chip_pmac_id(rx_tlv_hdr,
  1211. &dest_chip_id,
  1212. &dest_chip_pmac_id);
  1213. if (dp_assert_always_internal_stat(
  1214. (dest_chip_id <= (DP_MLO_MAX_DEST_CHIP_ID - 1)),
  1215. &be_soc->soc, rx.err.intra_bss_bad_chipid))
  1216. return false;
  1217. params->dest_soc =
  1218. dp_mlo_get_soc_ref_by_chip_id(be_soc->ml_ctxt,
  1219. dest_chip_id);
  1220. if (!params->dest_soc)
  1221. return false;
  1222. da_peer_id = HAL_RX_PEER_ID_GET(msdu_metadata);
  1223. da_peer = dp_peer_get_tgt_peer_by_id(params->dest_soc, da_peer_id,
  1224. DP_MOD_ID_RX);
  1225. if (da_peer) {
  1226. if (da_peer->bss_peer || (da_peer->txrx_peer == ta_peer)) {
  1227. dp_peer_unref_delete(da_peer, DP_MOD_ID_RX);
  1228. return false;
  1229. }
  1230. dp_peer_unref_delete(da_peer, DP_MOD_ID_RX);
  1231. }
  1232. if (dest_chip_id == be_soc->mlo_chip_id) {
  1233. if (dest_chip_pmac_id == ta_peer->vdev->pdev->pdev_id)
  1234. params->tx_vdev_id = ta_peer->vdev->vdev_id;
  1235. else
  1236. params->tx_vdev_id =
  1237. be_vdev->mlo_dev_ctxt->vdev_list[dest_chip_id]
  1238. [dest_chip_pmac_id];
  1239. return true;
  1240. }
  1241. params->tx_vdev_id =
  1242. be_vdev->mlo_dev_ctxt->vdev_list[dest_chip_id]
  1243. [dest_chip_pmac_id];
  1244. return true;
  1245. }
  1246. #else
  1247. #ifdef WLAN_MLO_MULTI_CHIP
  1248. static bool
  1249. dp_rx_intrabss_ucast_check_be(qdf_nbuf_t nbuf,
  1250. struct dp_txrx_peer *ta_peer,
  1251. uint8_t *rx_tlv_hdr,
  1252. struct hal_rx_msdu_metadata *msdu_metadata,
  1253. struct dp_be_intrabss_params *params)
  1254. {
  1255. uint16_t da_peer_id;
  1256. struct dp_txrx_peer *da_peer;
  1257. bool ret = false;
  1258. uint8_t dest_chip_id;
  1259. dp_txrx_ref_handle txrx_ref_handle = NULL;
  1260. struct dp_vdev_be *be_vdev =
  1261. dp_get_be_vdev_from_dp_vdev(ta_peer->vdev);
  1262. struct dp_soc_be *be_soc =
  1263. dp_get_be_soc_from_dp_soc(params->dest_soc);
  1264. if (!(qdf_nbuf_is_da_valid(nbuf) || qdf_nbuf_is_da_mcbc(nbuf)))
  1265. return false;
  1266. dest_chip_id = HAL_RX_DEST_CHIP_ID_GET(msdu_metadata);
  1267. if (dp_assert_always_internal_stat(
  1268. (dest_chip_id <= (DP_MLO_MAX_DEST_CHIP_ID - 1)),
  1269. &be_soc->soc, rx.err.intra_bss_bad_chipid))
  1270. return false;
  1271. da_peer_id = HAL_RX_PEER_ID_GET(msdu_metadata);
  1272. /* use dest chip id when TA is MLD peer and DA is legacy */
  1273. if (be_soc->mlo_enabled &&
  1274. ta_peer->mld_peer &&
  1275. !(da_peer_id & HAL_RX_DA_IDX_ML_PEER_MASK)) {
  1276. /* validate chip_id, get a ref, and re-assign soc */
  1277. params->dest_soc =
  1278. dp_mlo_get_soc_ref_by_chip_id(be_soc->ml_ctxt,
  1279. dest_chip_id);
  1280. if (!params->dest_soc)
  1281. return false;
  1282. da_peer = dp_txrx_peer_get_ref_by_id(params->dest_soc,
  1283. da_peer_id,
  1284. &txrx_ref_handle,
  1285. DP_MOD_ID_RX);
  1286. if (!da_peer)
  1287. return false;
  1288. } else {
  1289. da_peer = dp_txrx_peer_get_ref_by_id(params->dest_soc,
  1290. da_peer_id,
  1291. &txrx_ref_handle,
  1292. DP_MOD_ID_RX);
  1293. if (!da_peer)
  1294. return false;
  1295. params->dest_soc = da_peer->vdev->pdev->soc;
  1296. if (!params->dest_soc)
  1297. goto rel_da_peer;
  1298. }
  1299. params->tx_vdev_id = da_peer->vdev->vdev_id;
  1300. /* If the source or destination peer in the isolation
  1301. * list then dont forward instead push to bridge stack.
  1302. */
  1303. if (dp_get_peer_isolation(ta_peer) ||
  1304. dp_get_peer_isolation(da_peer)) {
  1305. ret = false;
  1306. goto rel_da_peer;
  1307. }
  1308. if (da_peer->bss_peer || (da_peer == ta_peer)) {
  1309. ret = false;
  1310. goto rel_da_peer;
  1311. }
  1312. /* Same vdev, support Inra-BSS */
  1313. if (da_peer->vdev == ta_peer->vdev) {
  1314. ret = true;
  1315. goto rel_da_peer;
  1316. }
  1317. if (!be_vdev->mlo_dev_ctxt)
  1318. ret = false;
  1319. goto rel_da_peer;
  1320. }
  1321. /* MLO specific Intra-BSS check */
  1322. if (dp_rx_intrabss_fwd_mlo_allow(ta_peer, da_peer)) {
  1323. /* use dest chip id for legacy dest peer */
  1324. if (!(da_peer_id & HAL_RX_DA_IDX_ML_PEER_MASK)) {
  1325. if (!(be_vdev->mlo_dev_ctxt->vdev_list[dest_chip_id][0]
  1326. == params->tx_vdev_id) &&
  1327. !(be_vdev->mlo_dev_ctxt->vdev_list[dest_chip_id][1]
  1328. == params->tx_vdev_id)) {
  1329. /*dp_soc_unref_delete(soc);*/
  1330. goto rel_da_peer;
  1331. }
  1332. }
  1333. ret = true;
  1334. }
  1335. rel_da_peer:
  1336. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX);
  1337. return ret;
  1338. }
  1339. #else
  1340. static bool
  1341. dp_rx_intrabss_ucast_check_be(qdf_nbuf_t nbuf,
  1342. struct dp_txrx_peer *ta_peer,
  1343. uint8_t *rx_tlv_hdr,
  1344. struct hal_rx_msdu_metadata *msdu_metadata,
  1345. struct dp_be_intrabss_params *params)
  1346. {
  1347. uint16_t da_peer_id;
  1348. struct dp_txrx_peer *da_peer;
  1349. bool ret = false;
  1350. dp_txrx_ref_handle txrx_ref_handle = NULL;
  1351. if (!qdf_nbuf_is_da_valid(nbuf) || qdf_nbuf_is_da_mcbc(nbuf))
  1352. return false;
  1353. da_peer_id = dp_rx_peer_metadata_peer_id_get_be(
  1354. params->dest_soc,
  1355. msdu_metadata->da_idx);
  1356. da_peer = dp_txrx_peer_get_ref_by_id(params->dest_soc, da_peer_id,
  1357. &txrx_ref_handle, DP_MOD_ID_RX);
  1358. if (!da_peer)
  1359. return false;
  1360. params->tx_vdev_id = da_peer->vdev->vdev_id;
  1361. /* If the source or destination peer in the isolation
  1362. * list then dont forward instead push to bridge stack.
  1363. */
  1364. if (dp_get_peer_isolation(ta_peer) ||
  1365. dp_get_peer_isolation(da_peer))
  1366. goto rel_da_peer;
  1367. if (da_peer->bss_peer || da_peer == ta_peer)
  1368. goto rel_da_peer;
  1369. /* Same vdev, support Inra-BSS */
  1370. if (da_peer->vdev == ta_peer->vdev) {
  1371. ret = true;
  1372. goto rel_da_peer;
  1373. }
  1374. /* MLO specific Intra-BSS check */
  1375. if (dp_rx_intrabss_fwd_mlo_allow(ta_peer, da_peer)) {
  1376. ret = true;
  1377. goto rel_da_peer;
  1378. }
  1379. rel_da_peer:
  1380. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX);
  1381. return ret;
  1382. }
  1383. #endif /* WLAN_MLO_MULTI_CHIP */
  1384. #endif /* INTRA_BSS_FWD_OFFLOAD */
  1385. #if defined(WLAN_PKT_CAPTURE_RX_2_0) || defined(CONFIG_WORD_BASED_TLV)
  1386. void dp_rx_word_mask_subscribe_be(struct dp_soc *soc,
  1387. uint32_t *msg_word,
  1388. void *rx_filter)
  1389. {
  1390. struct htt_rx_ring_tlv_filter *tlv_filter =
  1391. (struct htt_rx_ring_tlv_filter *)rx_filter;
  1392. if (!msg_word || !tlv_filter)
  1393. return;
  1394. /* tlv_filter->enable is set to 1 for monitor rings */
  1395. if (tlv_filter->enable)
  1396. return;
  1397. /* if word mask is zero, FW will set the default values */
  1398. if (!(tlv_filter->rx_mpdu_start_wmask > 0 &&
  1399. tlv_filter->rx_msdu_end_wmask > 0)) {
  1400. return;
  1401. }
  1402. HTT_RX_RING_SELECTION_CFG_WORD_MASK_COMPACTION_ENABLE_SET(*msg_word, 1);
  1403. /* word 14 */
  1404. msg_word += 3;
  1405. *msg_word = 0;
  1406. HTT_RX_RING_SELECTION_CFG_RX_MPDU_START_WORD_MASK_SET(
  1407. *msg_word,
  1408. tlv_filter->rx_mpdu_start_wmask);
  1409. /* word 15 */
  1410. msg_word++;
  1411. *msg_word = 0;
  1412. HTT_RX_RING_SELECTION_CFG_RX_MSDU_END_WORD_MASK_SET(
  1413. *msg_word,
  1414. tlv_filter->rx_msdu_end_wmask);
  1415. }
  1416. #else
  1417. void dp_rx_word_mask_subscribe_be(struct dp_soc *soc,
  1418. uint32_t *msg_word,
  1419. void *rx_filter)
  1420. {
  1421. }
  1422. #endif
  1423. #if defined(WLAN_MCAST_MLO) && defined(CONFIG_MLO_SINGLE_DEV)
  1424. static inline
  1425. bool dp_rx_intrabss_mlo_mcbc_fwd(struct dp_soc *soc, struct dp_vdev *vdev,
  1426. qdf_nbuf_t nbuf_copy)
  1427. {
  1428. struct dp_vdev *mcast_primary_vdev = NULL;
  1429. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  1430. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1431. struct cdp_tx_exception_metadata tx_exc_metadata = {0};
  1432. tx_exc_metadata.is_mlo_mcast = 1;
  1433. tx_exc_metadata.tx_encap_type = CDP_INVALID_TX_ENCAP_TYPE;
  1434. tx_exc_metadata.sec_type = CDP_INVALID_SEC_TYPE;
  1435. tx_exc_metadata.peer_id = CDP_INVALID_PEER;
  1436. tx_exc_metadata.tid = CDP_INVALID_TID;
  1437. mcast_primary_vdev = dp_mlo_get_mcast_primary_vdev(be_soc,
  1438. be_vdev,
  1439. DP_MOD_ID_RX);
  1440. if (!mcast_primary_vdev)
  1441. return false;
  1442. nbuf_copy = dp_tx_send_exception((struct cdp_soc_t *)
  1443. mcast_primary_vdev->pdev->soc,
  1444. mcast_primary_vdev->vdev_id,
  1445. nbuf_copy, &tx_exc_metadata);
  1446. if (nbuf_copy)
  1447. qdf_nbuf_free(nbuf_copy);
  1448. dp_vdev_unref_delete(mcast_primary_vdev->pdev->soc,
  1449. mcast_primary_vdev, DP_MOD_ID_RX);
  1450. return true;
  1451. }
  1452. #else
  1453. static inline
  1454. bool dp_rx_intrabss_mlo_mcbc_fwd(struct dp_soc *soc, struct dp_vdev *vdev,
  1455. qdf_nbuf_t nbuf_copy)
  1456. {
  1457. return false;
  1458. }
  1459. #endif
  1460. bool
  1461. dp_rx_intrabss_mcast_handler_be(struct dp_soc *soc,
  1462. struct dp_txrx_peer *ta_txrx_peer,
  1463. qdf_nbuf_t nbuf_copy,
  1464. struct cdp_tid_rx_stats *tid_stats,
  1465. uint8_t link_id)
  1466. {
  1467. if (qdf_unlikely(ta_txrx_peer->vdev->nawds_enabled)) {
  1468. struct cdp_tx_exception_metadata tx_exc_metadata = {0};
  1469. uint16_t len = QDF_NBUF_CB_RX_PKT_LEN(nbuf_copy);
  1470. tx_exc_metadata.peer_id = ta_txrx_peer->peer_id;
  1471. tx_exc_metadata.is_intrabss_fwd = 1;
  1472. tx_exc_metadata.tid = HTT_TX_EXT_TID_INVALID;
  1473. if (dp_tx_send_exception((struct cdp_soc_t *)soc,
  1474. ta_txrx_peer->vdev->vdev_id,
  1475. nbuf_copy,
  1476. &tx_exc_metadata)) {
  1477. DP_PEER_PER_PKT_STATS_INC_PKT(ta_txrx_peer,
  1478. rx.intra_bss.fail, 1,
  1479. len, link_id);
  1480. tid_stats->fail_cnt[INTRABSS_DROP]++;
  1481. qdf_nbuf_free(nbuf_copy);
  1482. } else {
  1483. DP_PEER_PER_PKT_STATS_INC_PKT(ta_txrx_peer,
  1484. rx.intra_bss.pkts, 1,
  1485. len, link_id);
  1486. tid_stats->intrabss_cnt++;
  1487. }
  1488. return true;
  1489. }
  1490. if (dp_rx_intrabss_mlo_mcbc_fwd(soc, ta_txrx_peer->vdev,
  1491. nbuf_copy))
  1492. return true;
  1493. return false;
  1494. }
  1495. bool dp_rx_intrabss_fwd_be(struct dp_soc *soc, struct dp_txrx_peer *ta_peer,
  1496. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  1497. uint8_t link_id)
  1498. {
  1499. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  1500. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  1501. struct cdp_tid_rx_stats *tid_stats = &ta_peer->vdev->pdev->stats.
  1502. tid_stats.tid_rx_stats[ring_id][tid];
  1503. bool ret = false;
  1504. struct dp_be_intrabss_params params;
  1505. struct hal_rx_msdu_metadata msdu_metadata;
  1506. /* if it is a broadcast pkt (eg: ARP) and it is not its own
  1507. * source, then clone the pkt and send the cloned pkt for
  1508. * intra BSS forwarding and original pkt up the network stack
  1509. * Note: how do we handle multicast pkts. do we forward
  1510. * all multicast pkts as is or let a higher layer module
  1511. * like igmpsnoop decide whether to forward or not with
  1512. * Mcast enhancement.
  1513. */
  1514. if (qdf_nbuf_is_da_mcbc(nbuf) && !ta_peer->bss_peer) {
  1515. return dp_rx_intrabss_mcbc_fwd(soc, ta_peer, rx_tlv_hdr,
  1516. nbuf, tid_stats, link_id);
  1517. }
  1518. if (dp_rx_intrabss_eapol_drop_check(soc, ta_peer, rx_tlv_hdr,
  1519. nbuf))
  1520. return true;
  1521. hal_rx_msdu_packet_metadata_get_generic_be(rx_tlv_hdr, &msdu_metadata);
  1522. params.dest_soc = soc;
  1523. if (dp_rx_intrabss_ucast_check_be(nbuf, ta_peer, rx_tlv_hdr,
  1524. &msdu_metadata, &params)) {
  1525. ret = dp_rx_intrabss_ucast_fwd(params.dest_soc, ta_peer,
  1526. params.tx_vdev_id,
  1527. rx_tlv_hdr, nbuf, tid_stats,
  1528. link_id);
  1529. }
  1530. return ret;
  1531. }
  1532. #endif
  1533. #ifndef BE_WBM_RELEASE_DESC_RX_SG_SUPPORT
  1534. /**
  1535. * dp_rx_chain_msdus_be() - Function to chain all msdus of a mpdu
  1536. * to pdev invalid peer list
  1537. *
  1538. * @soc: core DP main context
  1539. * @nbuf: Buffer pointer
  1540. * @rx_tlv_hdr: start of rx tlv header
  1541. * @mac_id: mac id
  1542. *
  1543. * Return: bool: true for last msdu of mpdu
  1544. */
  1545. static bool dp_rx_chain_msdus_be(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1546. uint8_t *rx_tlv_hdr, uint8_t mac_id)
  1547. {
  1548. bool mpdu_done = false;
  1549. qdf_nbuf_t curr_nbuf = NULL;
  1550. qdf_nbuf_t tmp_nbuf = NULL;
  1551. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1552. if (!dp_pdev) {
  1553. dp_rx_debug("%pK: pdev is null for mac_id = %d", soc, mac_id);
  1554. return mpdu_done;
  1555. }
  1556. /* if invalid peer SG list has max values free the buffers in list
  1557. * and treat current buffer as start of list
  1558. *
  1559. * current logic to detect the last buffer from attn_tlv is not reliable
  1560. * in OFDMA UL scenario hence add max buffers check to avoid list pile
  1561. * up
  1562. */
  1563. if (!dp_pdev->first_nbuf ||
  1564. (dp_pdev->invalid_peer_head_msdu &&
  1565. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST
  1566. (dp_pdev->invalid_peer_head_msdu) >= DP_MAX_INVALID_BUFFERS)) {
  1567. qdf_nbuf_set_rx_chfrag_start(nbuf, 1);
  1568. dp_pdev->first_nbuf = true;
  1569. /* If the new nbuf received is the first msdu of the
  1570. * amsdu and there are msdus in the invalid peer msdu
  1571. * list, then let us free all the msdus of the invalid
  1572. * peer msdu list.
  1573. * This scenario can happen when we start receiving
  1574. * new a-msdu even before the previous a-msdu is completely
  1575. * received.
  1576. */
  1577. curr_nbuf = dp_pdev->invalid_peer_head_msdu;
  1578. while (curr_nbuf) {
  1579. tmp_nbuf = curr_nbuf->next;
  1580. dp_rx_nbuf_free(curr_nbuf);
  1581. curr_nbuf = tmp_nbuf;
  1582. }
  1583. dp_pdev->invalid_peer_head_msdu = NULL;
  1584. dp_pdev->invalid_peer_tail_msdu = NULL;
  1585. dp_monitor_get_mpdu_status(dp_pdev, soc, rx_tlv_hdr);
  1586. }
  1587. if (qdf_nbuf_is_rx_chfrag_end(nbuf) &&
  1588. hal_rx_attn_msdu_done_get(soc->hal_soc, rx_tlv_hdr)) {
  1589. qdf_assert_always(dp_pdev->first_nbuf);
  1590. dp_pdev->first_nbuf = false;
  1591. mpdu_done = true;
  1592. }
  1593. /*
  1594. * For MCL, invalid_peer_head_msdu and invalid_peer_tail_msdu
  1595. * should be NULL here, add the checking for debugging purpose
  1596. * in case some corner case.
  1597. */
  1598. DP_PDEV_INVALID_PEER_MSDU_CHECK(dp_pdev->invalid_peer_head_msdu,
  1599. dp_pdev->invalid_peer_tail_msdu);
  1600. DP_RX_LIST_APPEND(dp_pdev->invalid_peer_head_msdu,
  1601. dp_pdev->invalid_peer_tail_msdu,
  1602. nbuf);
  1603. return mpdu_done;
  1604. }
  1605. #else
  1606. static bool dp_rx_chain_msdus_be(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1607. uint8_t *rx_tlv_hdr, uint8_t mac_id)
  1608. {
  1609. return false;
  1610. }
  1611. #endif
  1612. qdf_nbuf_t
  1613. dp_rx_wbm_err_reap_desc_be(struct dp_intr *int_ctx, struct dp_soc *soc,
  1614. hal_ring_handle_t hal_ring_hdl, uint32_t quota,
  1615. uint32_t *rx_bufs_used)
  1616. {
  1617. hal_ring_desc_t ring_desc;
  1618. hal_soc_handle_t hal_soc;
  1619. struct dp_rx_desc *rx_desc;
  1620. union dp_rx_desc_list_elem_t
  1621. *head[WLAN_MAX_MLO_CHIPS][MAX_PDEV_CNT] = { { NULL } };
  1622. union dp_rx_desc_list_elem_t
  1623. *tail[WLAN_MAX_MLO_CHIPS][MAX_PDEV_CNT] = { { NULL } };
  1624. uint32_t rx_bufs_reaped[WLAN_MAX_MLO_CHIPS][MAX_PDEV_CNT] = { { 0 } };
  1625. uint8_t mac_id;
  1626. struct dp_srng *dp_rxdma_srng;
  1627. struct rx_desc_pool *rx_desc_pool;
  1628. qdf_nbuf_t nbuf_head = NULL;
  1629. qdf_nbuf_t nbuf_tail = NULL;
  1630. qdf_nbuf_t nbuf;
  1631. uint8_t msdu_continuation = 0;
  1632. bool process_sg_buf = false;
  1633. QDF_STATUS status;
  1634. struct dp_soc *replenish_soc;
  1635. uint8_t chip_id;
  1636. union hal_wbm_err_info_u wbm_err = { 0 };
  1637. qdf_assert(soc && hal_ring_hdl);
  1638. hal_soc = soc->hal_soc;
  1639. qdf_assert(hal_soc);
  1640. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  1641. /* TODO */
  1642. /*
  1643. * Need API to convert from hal_ring pointer to
  1644. * Ring Type / Ring Id combo
  1645. */
  1646. dp_rx_err_err("%pK: HAL RING Access Failed -- %pK",
  1647. soc, hal_ring_hdl);
  1648. goto done;
  1649. }
  1650. while (qdf_likely(quota)) {
  1651. ring_desc = hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  1652. if (qdf_unlikely(!ring_desc))
  1653. break;
  1654. /* Get SW Desc from HAL desc */
  1655. if (dp_wbm_get_rx_desc_from_hal_desc_be(soc,
  1656. ring_desc,
  1657. &rx_desc)) {
  1658. dp_rx_err_err("get rx sw desc from hal_desc failed");
  1659. continue;
  1660. }
  1661. if (dp_assert_always_internal_stat(rx_desc, soc,
  1662. rx.err.rx_desc_null))
  1663. continue;
  1664. if (!dp_rx_desc_check_magic(rx_desc)) {
  1665. dp_rx_err_err("%pK: Invalid rx_desc %pK",
  1666. soc, rx_desc);
  1667. continue;
  1668. }
  1669. /*
  1670. * this is a unlikely scenario where the host is reaping
  1671. * a descriptor which it already reaped just a while ago
  1672. * but is yet to replenish it back to HW.
  1673. * In this case host will dump the last 128 descriptors
  1674. * including the software descriptor rx_desc and assert.
  1675. */
  1676. if (qdf_unlikely(!rx_desc->in_use)) {
  1677. DP_STATS_INC(soc, rx.err.hal_wbm_rel_dup, 1);
  1678. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  1679. ring_desc, rx_desc);
  1680. continue;
  1681. }
  1682. status = dp_rx_wbm_desc_nbuf_sanity_check(soc, hal_ring_hdl,
  1683. ring_desc, rx_desc);
  1684. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  1685. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  1686. dp_info_rl("Rx error Nbuf %pK sanity check failure!",
  1687. rx_desc->nbuf);
  1688. rx_desc->in_err_state = 1;
  1689. rx_desc->unmapped = 1;
  1690. rx_bufs_reaped[rx_desc->chip_id][rx_desc->pool_id]++;
  1691. dp_rx_add_to_free_desc_list(
  1692. &head[rx_desc->chip_id][rx_desc->pool_id],
  1693. &tail[rx_desc->chip_id][rx_desc->pool_id],
  1694. rx_desc);
  1695. continue;
  1696. }
  1697. nbuf = rx_desc->nbuf;
  1698. /*
  1699. * Read wbm err info , MSDU info , MPDU info , peer meta data,
  1700. * from desc. Save all the info in nbuf CB/TLV.
  1701. * We will need this info when we do the actual nbuf processing
  1702. */
  1703. wbm_err.info = dp_rx_wbm_err_copy_desc_info_in_nbuf(
  1704. soc,
  1705. ring_desc,
  1706. nbuf,
  1707. rx_desc->pool_id);
  1708. /*
  1709. * For WBM ring, expect only MSDU buffers
  1710. */
  1711. if (dp_assert_always_internal_stat(
  1712. wbm_err.info_bit.buffer_or_desc_type ==
  1713. HAL_RX_WBM_BUF_TYPE_REL_BUF,
  1714. soc, rx.err.wbm_err_buf_rel_type))
  1715. continue;
  1716. /*
  1717. * Errors are handled only if the source is RXDMA or REO
  1718. */
  1719. qdf_assert((wbm_err.info_bit.wbm_err_src ==
  1720. HAL_RX_WBM_ERR_SRC_RXDMA) ||
  1721. (wbm_err.info_bit.wbm_err_src ==
  1722. HAL_RX_WBM_ERR_SRC_REO));
  1723. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  1724. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  1725. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, nbuf);
  1726. rx_desc->unmapped = 1;
  1727. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  1728. if (qdf_unlikely(
  1729. soc->wbm_release_desc_rx_sg_support &&
  1730. dp_rx_is_sg_formation_required(&wbm_err.info_bit))) {
  1731. /* SG is detected from continuation bit */
  1732. msdu_continuation =
  1733. dp_rx_wbm_err_msdu_continuation_get(soc,
  1734. ring_desc,
  1735. nbuf);
  1736. if (msdu_continuation &&
  1737. !(soc->wbm_sg_param.wbm_is_first_msdu_in_sg)) {
  1738. /* Update length from first buffer in SG */
  1739. soc->wbm_sg_param.wbm_sg_desc_msdu_len =
  1740. hal_rx_msdu_start_msdu_len_get(
  1741. soc->hal_soc,
  1742. qdf_nbuf_data(nbuf));
  1743. soc->wbm_sg_param.wbm_is_first_msdu_in_sg =
  1744. true;
  1745. }
  1746. if (msdu_continuation) {
  1747. /* MSDU continued packets */
  1748. qdf_nbuf_set_rx_chfrag_cont(nbuf, 1);
  1749. QDF_NBUF_CB_RX_PKT_LEN(nbuf) =
  1750. soc->wbm_sg_param.wbm_sg_desc_msdu_len;
  1751. } else {
  1752. /* This is the terminal packet in SG */
  1753. qdf_nbuf_set_rx_chfrag_start(nbuf, 1);
  1754. qdf_nbuf_set_rx_chfrag_end(nbuf, 1);
  1755. QDF_NBUF_CB_RX_PKT_LEN(nbuf) =
  1756. soc->wbm_sg_param.wbm_sg_desc_msdu_len;
  1757. process_sg_buf = true;
  1758. }
  1759. } else {
  1760. qdf_nbuf_set_rx_chfrag_cont(nbuf, 0);
  1761. }
  1762. rx_bufs_reaped[rx_desc->chip_id][rx_desc->pool_id]++;
  1763. if (qdf_nbuf_is_rx_chfrag_cont(nbuf) || process_sg_buf) {
  1764. DP_RX_LIST_APPEND(soc->wbm_sg_param.wbm_sg_nbuf_head,
  1765. soc->wbm_sg_param.wbm_sg_nbuf_tail,
  1766. nbuf);
  1767. if (process_sg_buf) {
  1768. if (!dp_rx_buffer_pool_refill(
  1769. soc,
  1770. soc->wbm_sg_param.wbm_sg_nbuf_head,
  1771. rx_desc->pool_id))
  1772. DP_RX_MERGE_TWO_LIST(
  1773. nbuf_head, nbuf_tail,
  1774. soc->wbm_sg_param.wbm_sg_nbuf_head,
  1775. soc->wbm_sg_param.wbm_sg_nbuf_tail);
  1776. dp_rx_wbm_sg_list_last_msdu_war(soc);
  1777. dp_rx_wbm_sg_list_reset(soc);
  1778. process_sg_buf = false;
  1779. }
  1780. } else if (!dp_rx_buffer_pool_refill(soc, nbuf,
  1781. rx_desc->pool_id)) {
  1782. DP_RX_LIST_APPEND(nbuf_head, nbuf_tail, nbuf);
  1783. }
  1784. dp_rx_add_to_free_desc_list
  1785. (&head[rx_desc->chip_id][rx_desc->pool_id],
  1786. &tail[rx_desc->chip_id][rx_desc->pool_id], rx_desc);
  1787. /*
  1788. * if continuation bit is set then we have MSDU spread
  1789. * across multiple buffers, let us not decrement quota
  1790. * till we reap all buffers of that MSDU.
  1791. */
  1792. if (qdf_likely(!msdu_continuation))
  1793. quota -= 1;
  1794. }
  1795. done:
  1796. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  1797. for (chip_id = 0; chip_id < WLAN_MAX_MLO_CHIPS; chip_id++) {
  1798. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  1799. /*
  1800. * continue with next mac_id if no pkts were reaped
  1801. * from that pool
  1802. */
  1803. if (!rx_bufs_reaped[chip_id][mac_id])
  1804. continue;
  1805. replenish_soc = dp_rx_replenish_soc_get(soc, chip_id);
  1806. dp_rxdma_srng =
  1807. &replenish_soc->rx_refill_buf_ring[mac_id];
  1808. rx_desc_pool = &replenish_soc->rx_desc_buf[mac_id];
  1809. dp_rx_buffers_replenish_simple(replenish_soc, mac_id,
  1810. dp_rxdma_srng,
  1811. rx_desc_pool,
  1812. rx_bufs_reaped[chip_id][mac_id],
  1813. &head[chip_id][mac_id],
  1814. &tail[chip_id][mac_id]);
  1815. *rx_bufs_used += rx_bufs_reaped[chip_id][mac_id];
  1816. }
  1817. }
  1818. return nbuf_head;
  1819. }
  1820. #ifdef WLAN_FEATURE_11BE_MLO
  1821. /**
  1822. * check_extap_multicast_loopback() - Check if rx packet is a loopback packet.
  1823. *
  1824. * @vdev: vdev on which rx packet is received
  1825. * @addr: src address of the received packet
  1826. *
  1827. */
  1828. static bool check_extap_multicast_loopback(struct dp_vdev *vdev, uint8_t *addr)
  1829. {
  1830. /* if src mac addr matches with vdev mac address then drop the pkt */
  1831. if (!(qdf_mem_cmp(addr, vdev->mac_addr.raw, QDF_MAC_ADDR_SIZE)))
  1832. return true;
  1833. /* if src mac addr matches with mld mac address then drop the pkt */
  1834. if (!(qdf_mem_cmp(addr, vdev->mld_mac_addr.raw, QDF_MAC_ADDR_SIZE)))
  1835. return true;
  1836. return false;
  1837. }
  1838. #else
  1839. static bool check_extap_multicast_loopback(struct dp_vdev *vdev, uint8_t *addr)
  1840. {
  1841. return false;
  1842. }
  1843. #endif
  1844. QDF_STATUS
  1845. dp_rx_null_q_desc_handle_be(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1846. uint8_t *rx_tlv_hdr, uint8_t pool_id,
  1847. struct dp_txrx_peer *txrx_peer,
  1848. bool is_reo_exception,
  1849. uint8_t link_id)
  1850. {
  1851. uint32_t pkt_len;
  1852. uint16_t msdu_len;
  1853. struct dp_vdev *vdev;
  1854. uint8_t tid;
  1855. qdf_ether_header_t *eh;
  1856. struct hal_rx_msdu_metadata msdu_metadata;
  1857. uint16_t sa_idx = 0;
  1858. bool is_eapol = 0;
  1859. bool enh_flag;
  1860. qdf_nbuf_set_rx_chfrag_start(
  1861. nbuf,
  1862. hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  1863. rx_tlv_hdr));
  1864. qdf_nbuf_set_rx_chfrag_end(nbuf,
  1865. hal_rx_msdu_end_last_msdu_get(soc->hal_soc,
  1866. rx_tlv_hdr));
  1867. qdf_nbuf_set_da_mcbc(nbuf, hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  1868. rx_tlv_hdr));
  1869. qdf_nbuf_set_da_valid(nbuf,
  1870. hal_rx_msdu_end_da_is_valid_get(soc->hal_soc,
  1871. rx_tlv_hdr));
  1872. qdf_nbuf_set_sa_valid(nbuf,
  1873. hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc,
  1874. rx_tlv_hdr));
  1875. tid = hal_rx_tid_get(soc->hal_soc, rx_tlv_hdr);
  1876. hal_rx_msdu_metadata_get(soc->hal_soc, rx_tlv_hdr, &msdu_metadata);
  1877. msdu_len = hal_rx_msdu_start_msdu_len_get(soc->hal_soc, rx_tlv_hdr);
  1878. pkt_len = msdu_len + msdu_metadata.l3_hdr_pad + soc->rx_pkt_tlv_size;
  1879. if (qdf_likely(!qdf_nbuf_is_frag(nbuf))) {
  1880. if (dp_rx_check_pkt_len(soc, pkt_len))
  1881. goto drop_nbuf;
  1882. /* Set length in nbuf */
  1883. qdf_nbuf_set_pktlen(
  1884. nbuf, qdf_min(pkt_len, (uint32_t)RX_DATA_BUFFER_SIZE));
  1885. }
  1886. /*
  1887. * Check if DMA completed -- msdu_done is the last bit
  1888. * to be written
  1889. */
  1890. if (!hal_rx_attn_msdu_done_get(soc->hal_soc, rx_tlv_hdr)) {
  1891. dp_err_rl("MSDU DONE failure");
  1892. hal_rx_dump_pkt_tlvs(soc->hal_soc, rx_tlv_hdr,
  1893. QDF_TRACE_LEVEL_INFO);
  1894. qdf_assert(0);
  1895. }
  1896. if (!txrx_peer &&
  1897. dp_rx_null_q_handle_invalid_peer_id_exception(soc, pool_id,
  1898. rx_tlv_hdr, nbuf))
  1899. return QDF_STATUS_E_FAILURE;
  1900. if (!txrx_peer) {
  1901. bool mpdu_done = false;
  1902. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, pool_id);
  1903. if (!pdev) {
  1904. dp_err_rl("pdev is null for pool_id = %d", pool_id);
  1905. return QDF_STATUS_E_FAILURE;
  1906. }
  1907. dp_err_rl("txrx_peer is NULL");
  1908. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1909. qdf_nbuf_len(nbuf));
  1910. /* QCN9000 has the support enabled */
  1911. if (qdf_unlikely(soc->wbm_release_desc_rx_sg_support)) {
  1912. mpdu_done = true;
  1913. nbuf->next = NULL;
  1914. /* Trigger invalid peer handler wrapper */
  1915. dp_rx_process_invalid_peer_wrapper(soc,
  1916. nbuf,
  1917. mpdu_done,
  1918. pool_id);
  1919. } else {
  1920. mpdu_done = dp_rx_chain_msdus_be(soc, nbuf, rx_tlv_hdr,
  1921. pool_id);
  1922. /* Trigger invalid peer handler wrapper */
  1923. dp_rx_process_invalid_peer_wrapper(
  1924. soc,
  1925. pdev->invalid_peer_head_msdu,
  1926. mpdu_done, pool_id);
  1927. }
  1928. if (mpdu_done) {
  1929. pdev->invalid_peer_head_msdu = NULL;
  1930. pdev->invalid_peer_tail_msdu = NULL;
  1931. }
  1932. return QDF_STATUS_E_FAILURE;
  1933. }
  1934. vdev = txrx_peer->vdev;
  1935. if (!vdev) {
  1936. dp_err_rl("Null vdev!");
  1937. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1938. goto drop_nbuf;
  1939. }
  1940. /*
  1941. * Advance the packet start pointer by total size of
  1942. * pre-header TLV's
  1943. */
  1944. if (qdf_nbuf_is_frag(nbuf))
  1945. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  1946. else
  1947. qdf_nbuf_pull_head(nbuf, (msdu_metadata.l3_hdr_pad +
  1948. soc->rx_pkt_tlv_size));
  1949. DP_STATS_INC_PKT(vdev, rx_i.null_q_desc_pkt, 1, qdf_nbuf_len(nbuf));
  1950. dp_vdev_peer_stats_update_protocol_cnt(vdev, nbuf, NULL, 0, 1);
  1951. if (dp_rx_err_drop_3addr_mcast(vdev, rx_tlv_hdr)) {
  1952. DP_PEER_PER_PKT_STATS_INC(txrx_peer, rx.mcast_3addr_drop, 1,
  1953. link_id);
  1954. goto drop_nbuf;
  1955. }
  1956. if (hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc, rx_tlv_hdr)) {
  1957. sa_idx = hal_rx_msdu_end_sa_idx_get(soc->hal_soc, rx_tlv_hdr);
  1958. if ((sa_idx < 0) ||
  1959. (sa_idx >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) {
  1960. DP_STATS_INC(soc, rx.err.invalid_sa_da_idx, 1);
  1961. goto drop_nbuf;
  1962. }
  1963. }
  1964. if ((!soc->mec_fw_offload) &&
  1965. dp_rx_mcast_echo_check(soc, txrx_peer, rx_tlv_hdr, nbuf)) {
  1966. /* this is a looped back MCBC pkt, drop it */
  1967. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.mec_drop, 1,
  1968. qdf_nbuf_len(nbuf), link_id);
  1969. goto drop_nbuf;
  1970. }
  1971. /*
  1972. * In qwrap mode if the received packet matches with any of the vdev
  1973. * mac addresses, drop it. Donot receive multicast packets originated
  1974. * from any proxysta.
  1975. */
  1976. if (check_qwrap_multicast_loopback(vdev, nbuf)) {
  1977. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.mec_drop, 1,
  1978. qdf_nbuf_len(nbuf), link_id);
  1979. goto drop_nbuf;
  1980. }
  1981. if (qdf_unlikely(txrx_peer->nawds_enabled &&
  1982. hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  1983. rx_tlv_hdr))) {
  1984. dp_err_rl("free buffer for multicast packet");
  1985. DP_PEER_PER_PKT_STATS_INC(txrx_peer, rx.nawds_mcast_drop, 1,
  1986. link_id);
  1987. goto drop_nbuf;
  1988. }
  1989. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, txrx_peer)) {
  1990. dp_err_rl("mcast Policy Check Drop pkt");
  1991. DP_PEER_PER_PKT_STATS_INC(txrx_peer, rx.policy_check_drop, 1,
  1992. link_id);
  1993. goto drop_nbuf;
  1994. }
  1995. /* WDS Source Port Learning */
  1996. if (!soc->ast_offload_support &&
  1997. qdf_likely(vdev->rx_decap_type == htt_cmn_pkt_type_ethernet &&
  1998. vdev->wds_enabled))
  1999. dp_rx_wds_srcport_learn(soc, rx_tlv_hdr, txrx_peer, nbuf,
  2000. msdu_metadata);
  2001. if (hal_rx_is_unicast(soc->hal_soc, rx_tlv_hdr)) {
  2002. struct dp_peer *peer;
  2003. struct dp_rx_tid *rx_tid;
  2004. peer = dp_peer_get_ref_by_id(soc, txrx_peer->peer_id,
  2005. DP_MOD_ID_RX_ERR);
  2006. if (peer) {
  2007. rx_tid = &peer->rx_tid[tid];
  2008. qdf_spin_lock_bh(&rx_tid->tid_lock);
  2009. if (!peer->rx_tid[tid].hw_qdesc_vaddr_unaligned) {
  2010. /* For Mesh peer, if on one of the mesh AP the
  2011. * mesh peer is not deleted, the new addition of mesh
  2012. * peer on other mesh AP doesn't do BA negotiation
  2013. * leading to mismatch in BA windows.
  2014. * To avoid this send max BA window during init.
  2015. */
  2016. if (qdf_unlikely(vdev->mesh_vdev) ||
  2017. qdf_unlikely(txrx_peer->nawds_enabled))
  2018. dp_rx_tid_setup_wifi3(
  2019. peer, tid,
  2020. hal_get_rx_max_ba_window(soc->hal_soc,tid),
  2021. IEEE80211_SEQ_MAX);
  2022. else
  2023. dp_rx_tid_setup_wifi3(peer, tid, 1,
  2024. IEEE80211_SEQ_MAX);
  2025. }
  2026. qdf_spin_unlock_bh(&rx_tid->tid_lock);
  2027. /* IEEE80211_SEQ_MAX indicates invalid start_seq */
  2028. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  2029. }
  2030. }
  2031. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  2032. if (!txrx_peer->authorize) {
  2033. is_eapol = qdf_nbuf_is_ipv4_eapol_pkt(nbuf);
  2034. if (is_eapol || qdf_nbuf_is_ipv4_wapi_pkt(nbuf)) {
  2035. if (!dp_rx_err_match_dhost(eh, vdev))
  2036. goto drop_nbuf;
  2037. } else {
  2038. goto drop_nbuf;
  2039. }
  2040. }
  2041. /*
  2042. * Drop packets in this path if cce_match is found. Packets will come
  2043. * in following path depending on whether tidQ is setup.
  2044. * 1. If tidQ is setup: WIFILI_HAL_RX_WBM_REO_PSH_RSN_ROUTE and
  2045. * cce_match = 1
  2046. * Packets with WIFILI_HAL_RX_WBM_REO_PSH_RSN_ROUTE are already
  2047. * dropped.
  2048. * 2. If tidQ is not setup: WIFILI_HAL_RX_WBM_REO_PSH_RSN_ERROR and
  2049. * cce_match = 1
  2050. * These packets need to be dropped and should not get delivered
  2051. * to stack.
  2052. */
  2053. if (qdf_unlikely(dp_rx_err_cce_drop(soc, vdev, nbuf, rx_tlv_hdr)))
  2054. goto drop_nbuf;
  2055. /*
  2056. * In extap mode if the received packet matches with mld mac address
  2057. * drop it. For non IP packets conversion might not be possible
  2058. * due to that MEC entry will not be updated, resulting loopback.
  2059. */
  2060. if (qdf_unlikely(check_extap_multicast_loopback(vdev,
  2061. eh->ether_shost))) {
  2062. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.mec_drop, 1,
  2063. qdf_nbuf_len(nbuf), link_id);
  2064. goto drop_nbuf;
  2065. }
  2066. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw)) {
  2067. qdf_nbuf_set_raw_frame(nbuf, 1);
  2068. qdf_nbuf_set_next(nbuf, NULL);
  2069. dp_rx_deliver_raw(vdev, nbuf, txrx_peer, link_id);
  2070. } else {
  2071. enh_flag = vdev->pdev->enhanced_stats_en;
  2072. qdf_nbuf_set_next(nbuf, NULL);
  2073. DP_PEER_TO_STACK_INCC_PKT(txrx_peer, 1, qdf_nbuf_len(nbuf),
  2074. enh_flag);
  2075. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  2076. rx.rx_success, 1,
  2077. qdf_nbuf_len(nbuf),
  2078. link_id);
  2079. /*
  2080. * Update the protocol tag in SKB based on
  2081. * CCE metadata
  2082. */
  2083. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  2084. EXCEPTION_DEST_RING_ID,
  2085. true, true);
  2086. /* Update the flow tag in SKB based on FSE metadata */
  2087. dp_rx_update_flow_tag(soc, vdev, nbuf,
  2088. rx_tlv_hdr, true);
  2089. if (qdf_unlikely(hal_rx_msdu_end_da_is_mcbc_get(
  2090. soc->hal_soc, rx_tlv_hdr) &&
  2091. (vdev->rx_decap_type ==
  2092. htt_cmn_pkt_type_ethernet))) {
  2093. DP_PEER_MC_INCC_PKT(txrx_peer, 1, qdf_nbuf_len(nbuf),
  2094. enh_flag, link_id);
  2095. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost))
  2096. DP_PEER_BC_INCC_PKT(txrx_peer, 1,
  2097. qdf_nbuf_len(nbuf),
  2098. enh_flag,
  2099. link_id);
  2100. } else {
  2101. DP_PEER_UC_INCC_PKT(txrx_peer, 1,
  2102. qdf_nbuf_len(nbuf),
  2103. enh_flag,
  2104. link_id);
  2105. }
  2106. qdf_nbuf_set_exc_frame(nbuf, 1);
  2107. if (qdf_unlikely(vdev->multipass_en)) {
  2108. if (dp_rx_multipass_process(txrx_peer, nbuf,
  2109. tid) == false) {
  2110. DP_PEER_PER_PKT_STATS_INC
  2111. (txrx_peer,
  2112. rx.multipass_rx_pkt_drop,
  2113. 1, link_id);
  2114. goto drop_nbuf;
  2115. }
  2116. }
  2117. dp_rx_deliver_to_osif_stack(soc, vdev, txrx_peer, nbuf, NULL,
  2118. is_eapol);
  2119. }
  2120. return QDF_STATUS_SUCCESS;
  2121. drop_nbuf:
  2122. dp_rx_nbuf_free(nbuf);
  2123. return QDF_STATUS_E_FAILURE;
  2124. }