dp_rx_mon_status.c 58 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123
  1. /*
  2. * Copyright (c) 2017-2020 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_peer.h"
  22. #include "hal_rx.h"
  23. #include "hal_api.h"
  24. #include "qdf_trace.h"
  25. #include "qdf_nbuf.h"
  26. #include "hal_api_mon.h"
  27. #include "dp_rx_mon.h"
  28. #include "dp_internal.h"
  29. #include "qdf_mem.h" /* qdf_mem_malloc,free */
  30. #include "htt.h"
  31. #ifdef FEATURE_PERPKT_INFO
  32. #include "dp_ratetable.h"
  33. #endif
  34. static inline void
  35. dp_rx_populate_cfr_non_assoc_sta(struct dp_pdev *pdev,
  36. struct hal_rx_ppdu_info *ppdu_info,
  37. struct cdp_rx_indication_ppdu *cdp_rx_ppdu);
  38. #ifndef QCA_SUPPORT_FULL_MON
  39. /**
  40. * dp_rx_mon_process () - Core brain processing for monitor mode
  41. *
  42. * This API processes monitor destination ring followed by monitor status ring
  43. * Called from bottom half (tasklet/NET_RX_SOFTIRQ)
  44. *
  45. * @soc: datapath soc context
  46. * @mac_id: mac_id on which interrupt is received
  47. * @quota: Number of status ring entry that can be serviced in one shot.
  48. *
  49. * @Return: Number of reaped status ring entries
  50. */
  51. static inline uint32_t
  52. dp_rx_mon_process(struct dp_soc *soc, uint32_t mac_id, uint32_t quota)
  53. {
  54. return quota;
  55. }
  56. #endif
  57. #ifdef WLAN_RX_PKT_CAPTURE_ENH
  58. #include "dp_rx_mon_feature.h"
  59. #else
  60. static QDF_STATUS
  61. dp_rx_handle_enh_capture(struct dp_soc *soc, struct dp_pdev *pdev,
  62. struct hal_rx_ppdu_info *ppdu_info)
  63. {
  64. return QDF_STATUS_SUCCESS;
  65. }
  66. static void
  67. dp_rx_mon_enh_capture_process(struct dp_pdev *pdev, uint32_t tlv_status,
  68. qdf_nbuf_t status_nbuf,
  69. struct hal_rx_ppdu_info *ppdu_info,
  70. bool *nbuf_used)
  71. {
  72. }
  73. #endif
  74. #ifdef WLAN_TX_PKT_CAPTURE_ENH
  75. #include "dp_rx_mon_feature.h"
  76. #else
  77. static QDF_STATUS
  78. dp_send_ack_frame_to_stack(struct dp_soc *soc,
  79. struct dp_pdev *pdev,
  80. struct hal_rx_ppdu_info *ppdu_info)
  81. {
  82. return QDF_STATUS_SUCCESS;
  83. }
  84. #endif
  85. #ifdef FEATURE_PERPKT_INFO
  86. static inline void
  87. dp_rx_populate_rx_rssi_chain(struct hal_rx_ppdu_info *ppdu_info,
  88. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  89. {
  90. uint8_t chain, bw;
  91. int8_t rssi;
  92. for (chain = 0; chain < SS_COUNT; chain++) {
  93. for (bw = 0; bw < MAX_BW; bw++) {
  94. rssi = ppdu_info->rx_status.rssi_chain[chain][bw];
  95. if (rssi != DP_RSSI_INVAL)
  96. cdp_rx_ppdu->rssi_chain[chain][bw] = rssi;
  97. else
  98. cdp_rx_ppdu->rssi_chain[chain][bw] = 0;
  99. }
  100. }
  101. }
  102. /*
  103. * dp_rx_populate_su_evm_details() - Populate su evm info
  104. * @ppdu_info: ppdu info structure from ppdu ring
  105. * @cdp_rx_ppdu: rx ppdu indication structure
  106. */
  107. static inline void
  108. dp_rx_populate_su_evm_details(struct hal_rx_ppdu_info *ppdu_info,
  109. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  110. {
  111. uint8_t pilot_evm;
  112. uint8_t nss_count;
  113. uint8_t pilot_count;
  114. nss_count = ppdu_info->evm_info.nss_count;
  115. pilot_count = ppdu_info->evm_info.pilot_count;
  116. if ((nss_count * pilot_count) > DP_RX_MAX_SU_EVM_COUNT) {
  117. qdf_err("pilot evm count is more than expected");
  118. return;
  119. }
  120. cdp_rx_ppdu->evm_info.pilot_count = pilot_count;
  121. cdp_rx_ppdu->evm_info.nss_count = nss_count;
  122. /* Populate evm for pilot_evm = nss_count*pilot_count */
  123. for (pilot_evm = 0; pilot_evm < nss_count * pilot_count; pilot_evm++) {
  124. cdp_rx_ppdu->evm_info.pilot_evm[pilot_evm] =
  125. ppdu_info->evm_info.pilot_evm[pilot_evm];
  126. }
  127. }
  128. /**
  129. * dp_rx_inc_rusize_cnt() - increment pdev stats based on RU size
  130. * @pdev: pdev ctx
  131. * @rx_user_status: mon rx user status
  132. *
  133. * Return: bool
  134. */
  135. static inline bool
  136. dp_rx_inc_rusize_cnt(struct dp_pdev *pdev,
  137. struct mon_rx_user_status *rx_user_status)
  138. {
  139. uint32_t ru_size;
  140. bool is_data;
  141. ru_size = rx_user_status->ofdma_ru_size;
  142. if (dp_is_subtype_data(rx_user_status->frame_control)) {
  143. DP_STATS_INC(pdev,
  144. ul_ofdma.data_rx_ru_size[ru_size], 1);
  145. is_data = true;
  146. } else {
  147. DP_STATS_INC(pdev,
  148. ul_ofdma.nondata_rx_ru_size[ru_size], 1);
  149. is_data = false;
  150. }
  151. return is_data;
  152. }
  153. /**
  154. * dp_rx_populate_cdp_indication_ppdu_user() - Populate per user cdp indication
  155. * @pdev: pdev ctx
  156. * @ppdu_info: ppdu info structure from ppdu ring
  157. * @cdp_rx_ppdu: Rx PPDU indication structure
  158. *
  159. * Return: none
  160. */
  161. static inline void
  162. dp_rx_populate_cdp_indication_ppdu_user(struct dp_pdev *pdev,
  163. struct hal_rx_ppdu_info *ppdu_info,
  164. struct cdp_rx_indication_ppdu
  165. *cdp_rx_ppdu)
  166. {
  167. struct dp_peer *peer;
  168. struct dp_soc *soc = pdev->soc;
  169. struct dp_ast_entry *ast_entry;
  170. uint32_t ast_index;
  171. int i;
  172. struct mon_rx_user_status *rx_user_status;
  173. struct cdp_rx_stats_ppdu_user *rx_stats_peruser;
  174. int ru_size;
  175. bool is_data = false;
  176. uint32_t num_users;
  177. num_users = ppdu_info->com_info.num_users;
  178. for (i = 0; i < num_users; i++) {
  179. if (i > OFDMA_NUM_USERS)
  180. return;
  181. rx_user_status = &ppdu_info->rx_user_status[i];
  182. rx_stats_peruser = &cdp_rx_ppdu->user[i];
  183. ast_index = rx_user_status->ast_index;
  184. if (ast_index >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx)) {
  185. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  186. continue;
  187. }
  188. ast_entry = soc->ast_table[ast_index];
  189. if (!ast_entry) {
  190. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  191. continue;
  192. }
  193. peer = ast_entry->peer;
  194. if (!peer || peer->peer_ids[0] == HTT_INVALID_PEER) {
  195. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  196. continue;
  197. }
  198. rx_stats_peruser->first_data_seq_ctrl =
  199. rx_user_status->first_data_seq_ctrl;
  200. rx_stats_peruser->frame_control_info_valid =
  201. rx_user_status->frame_control_info_valid;
  202. rx_stats_peruser->frame_control =
  203. rx_user_status->frame_control;
  204. rx_stats_peruser->tcp_msdu_count =
  205. rx_user_status->tcp_msdu_count;
  206. rx_stats_peruser->udp_msdu_count =
  207. rx_user_status->udp_msdu_count;
  208. rx_stats_peruser->other_msdu_count =
  209. rx_user_status->other_msdu_count;
  210. rx_stats_peruser->num_msdu =
  211. rx_stats_peruser->tcp_msdu_count +
  212. rx_stats_peruser->udp_msdu_count +
  213. rx_stats_peruser->other_msdu_count;
  214. rx_stats_peruser->preamble_type =
  215. rx_user_status->preamble_type;
  216. rx_stats_peruser->mpdu_cnt_fcs_ok =
  217. rx_user_status->mpdu_cnt_fcs_ok;
  218. rx_stats_peruser->mpdu_cnt_fcs_err =
  219. rx_user_status->mpdu_cnt_fcs_err;
  220. qdf_mem_copy(&rx_stats_peruser->mpdu_fcs_ok_bitmap,
  221. &rx_user_status->mpdu_fcs_ok_bitmap,
  222. HAL_RX_NUM_WORDS_PER_PPDU_BITMAP *
  223. sizeof(rx_user_status->mpdu_fcs_ok_bitmap[0]));
  224. rx_stats_peruser->mpdu_ok_byte_count =
  225. rx_user_status->mpdu_ok_byte_count;
  226. rx_stats_peruser->mpdu_err_byte_count =
  227. rx_user_status->mpdu_err_byte_count;
  228. cdp_rx_ppdu->num_mpdu += rx_user_status->mpdu_cnt_fcs_ok;
  229. cdp_rx_ppdu->num_msdu += rx_stats_peruser->num_msdu;
  230. rx_stats_peruser->retries =
  231. CDP_FC_IS_RETRY_SET(rx_stats_peruser->frame_control) ?
  232. rx_stats_peruser->mpdu_cnt_fcs_ok : 0;
  233. if (rx_stats_peruser->mpdu_cnt_fcs_ok > 1)
  234. rx_stats_peruser->is_ampdu = 1;
  235. else
  236. rx_stats_peruser->is_ampdu = 0;
  237. rx_stats_peruser->tid = ppdu_info->rx_status.tid;
  238. qdf_mem_copy(rx_stats_peruser->mac_addr,
  239. peer->mac_addr.raw, QDF_MAC_ADDR_SIZE);
  240. rx_stats_peruser->peer_id = peer->peer_ids[0];
  241. cdp_rx_ppdu->vdev_id = peer->vdev->vdev_id;
  242. rx_stats_peruser->vdev_id = peer->vdev->vdev_id;
  243. rx_stats_peruser->mu_ul_info_valid = 0;
  244. if (cdp_rx_ppdu->u.ppdu_type == HAL_RX_TYPE_MU_OFDMA ||
  245. cdp_rx_ppdu->u.ppdu_type == HAL_RX_TYPE_MU_MIMO) {
  246. if (rx_user_status->mu_ul_info_valid) {
  247. rx_stats_peruser->nss = rx_user_status->nss;
  248. rx_stats_peruser->mcs = rx_user_status->mcs;
  249. rx_stats_peruser->mu_ul_info_valid =
  250. rx_user_status->mu_ul_info_valid;
  251. rx_stats_peruser->ofdma_ru_start_index =
  252. rx_user_status->ofdma_ru_start_index;
  253. rx_stats_peruser->ofdma_ru_width =
  254. rx_user_status->ofdma_ru_width;
  255. rx_stats_peruser->user_index = i;
  256. ru_size = rx_user_status->ofdma_ru_size;
  257. /*
  258. * max RU size will be equal to
  259. * HTT_UL_OFDMA_V0_RU_SIZE_RU_996x2
  260. */
  261. if (ru_size >= OFDMA_NUM_RU_SIZE) {
  262. dp_err("invalid ru_size %d\n",
  263. ru_size);
  264. return;
  265. }
  266. is_data = dp_rx_inc_rusize_cnt(pdev,
  267. rx_user_status);
  268. }
  269. if (is_data) {
  270. /* counter to get number of MU OFDMA */
  271. pdev->stats.ul_ofdma.data_rx_ppdu++;
  272. pdev->stats.ul_ofdma.data_users[num_users]++;
  273. }
  274. }
  275. }
  276. }
  277. /**
  278. * dp_rx_populate_cdp_indication_ppdu() - Populate cdp rx indication structure
  279. * @pdev: pdev ctx
  280. * @ppdu_info: ppdu info structure from ppdu ring
  281. * @cdp_rx_ppdu: Rx PPDU indication structure
  282. *
  283. * Return: none
  284. */
  285. static inline void
  286. dp_rx_populate_cdp_indication_ppdu(struct dp_pdev *pdev,
  287. struct hal_rx_ppdu_info *ppdu_info,
  288. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  289. {
  290. struct dp_peer *peer;
  291. struct dp_soc *soc = pdev->soc;
  292. struct dp_ast_entry *ast_entry;
  293. uint32_t ast_index;
  294. uint32_t i;
  295. cdp_rx_ppdu->first_data_seq_ctrl =
  296. ppdu_info->rx_status.first_data_seq_ctrl;
  297. cdp_rx_ppdu->frame_ctrl =
  298. ppdu_info->rx_status.frame_control;
  299. cdp_rx_ppdu->tcp_msdu_count = ppdu_info->rx_status.tcp_msdu_count;
  300. cdp_rx_ppdu->udp_msdu_count = ppdu_info->rx_status.udp_msdu_count;
  301. cdp_rx_ppdu->other_msdu_count = ppdu_info->rx_status.other_msdu_count;
  302. cdp_rx_ppdu->u.preamble = ppdu_info->rx_status.preamble_type;
  303. /* num mpdu is consolidated and added together in num user loop */
  304. cdp_rx_ppdu->num_mpdu = ppdu_info->com_info.mpdu_cnt_fcs_ok;
  305. /* num msdu is consolidated and added together in num user loop */
  306. cdp_rx_ppdu->num_msdu = (cdp_rx_ppdu->tcp_msdu_count +
  307. cdp_rx_ppdu->udp_msdu_count +
  308. cdp_rx_ppdu->other_msdu_count);
  309. cdp_rx_ppdu->retries = CDP_FC_IS_RETRY_SET(cdp_rx_ppdu->frame_ctrl) ?
  310. ppdu_info->com_info.mpdu_cnt_fcs_ok : 0;
  311. if (ppdu_info->com_info.mpdu_cnt_fcs_ok > 1)
  312. cdp_rx_ppdu->is_ampdu = 1;
  313. else
  314. cdp_rx_ppdu->is_ampdu = 0;
  315. cdp_rx_ppdu->tid = ppdu_info->rx_status.tid;
  316. ast_index = ppdu_info->rx_status.ast_index;
  317. if (ast_index >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx)) {
  318. cdp_rx_ppdu->peer_id = HTT_INVALID_PEER;
  319. cdp_rx_ppdu->num_users = 0;
  320. goto end;
  321. }
  322. ast_entry = soc->ast_table[ast_index];
  323. if (!ast_entry) {
  324. cdp_rx_ppdu->peer_id = HTT_INVALID_PEER;
  325. cdp_rx_ppdu->num_users = 0;
  326. goto end;
  327. }
  328. peer = ast_entry->peer;
  329. if (!peer || peer->peer_ids[0] == HTT_INVALID_PEER) {
  330. cdp_rx_ppdu->peer_id = HTT_INVALID_PEER;
  331. cdp_rx_ppdu->num_users = 0;
  332. goto end;
  333. }
  334. qdf_mem_copy(cdp_rx_ppdu->mac_addr,
  335. peer->mac_addr.raw, QDF_MAC_ADDR_SIZE);
  336. cdp_rx_ppdu->peer_id = peer->peer_ids[0];
  337. cdp_rx_ppdu->vdev_id = peer->vdev->vdev_id;
  338. cdp_rx_ppdu->ppdu_id = ppdu_info->com_info.ppdu_id;
  339. cdp_rx_ppdu->length = ppdu_info->rx_status.ppdu_len;
  340. cdp_rx_ppdu->duration = ppdu_info->rx_status.duration;
  341. cdp_rx_ppdu->u.bw = ppdu_info->rx_status.bw;
  342. cdp_rx_ppdu->u.nss = ppdu_info->rx_status.nss;
  343. cdp_rx_ppdu->u.mcs = ppdu_info->rx_status.mcs;
  344. if ((ppdu_info->rx_status.sgi == VHT_SGI_NYSM) &&
  345. (ppdu_info->rx_status.preamble_type == HAL_RX_PKT_TYPE_11AC))
  346. cdp_rx_ppdu->u.gi = CDP_SGI_0_4_US;
  347. else
  348. cdp_rx_ppdu->u.gi = ppdu_info->rx_status.sgi;
  349. cdp_rx_ppdu->u.ldpc = ppdu_info->rx_status.ldpc;
  350. cdp_rx_ppdu->u.ppdu_type = ppdu_info->rx_status.reception_type;
  351. cdp_rx_ppdu->u.ltf_size = (ppdu_info->rx_status.he_data5 >>
  352. QDF_MON_STATUS_HE_LTF_SIZE_SHIFT) & 0x3;
  353. cdp_rx_ppdu->rssi = ppdu_info->rx_status.rssi_comb;
  354. cdp_rx_ppdu->timestamp = ppdu_info->rx_status.tsft;
  355. cdp_rx_ppdu->channel = ppdu_info->rx_status.chan_num;
  356. cdp_rx_ppdu->beamformed = ppdu_info->rx_status.beamformed;
  357. cdp_rx_ppdu->num_bytes = ppdu_info->rx_status.ppdu_len;
  358. cdp_rx_ppdu->lsig_a = ppdu_info->rx_status.rate;
  359. cdp_rx_ppdu->u.ltf_size = ppdu_info->rx_status.ltf_size;
  360. dp_rx_populate_rx_rssi_chain(ppdu_info, cdp_rx_ppdu);
  361. dp_rx_populate_su_evm_details(ppdu_info, cdp_rx_ppdu);
  362. cdp_rx_ppdu->rx_antenna = ppdu_info->rx_status.rx_antenna;
  363. cdp_rx_ppdu->nf = ppdu_info->rx_status.chan_noise_floor;
  364. for (i = 0; i < MAX_CHAIN; i++)
  365. cdp_rx_ppdu->per_chain_rssi[i] = ppdu_info->rx_status.rssi[i];
  366. cdp_rx_ppdu->is_mcast_bcast = ppdu_info->nac_info.mcast_bcast;
  367. cdp_rx_ppdu->num_users = ppdu_info->com_info.num_users;
  368. cdp_rx_ppdu->num_mpdu = 0;
  369. cdp_rx_ppdu->num_msdu = 0;
  370. dp_rx_populate_cdp_indication_ppdu_user(pdev, ppdu_info, cdp_rx_ppdu);
  371. return;
  372. end:
  373. dp_rx_populate_cfr_non_assoc_sta(pdev, ppdu_info, cdp_rx_ppdu);
  374. }
  375. #else
  376. static inline void
  377. dp_rx_populate_cdp_indication_ppdu(struct dp_pdev *pdev,
  378. struct hal_rx_ppdu_info *ppdu_info,
  379. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  380. {
  381. }
  382. #endif
  383. /**
  384. * dp_rx_stats_update() - Update per-peer statistics
  385. * @soc: Datapath SOC handle
  386. * @peer: Datapath peer handle
  387. * @ppdu: PPDU Descriptor
  388. *
  389. * Return: None
  390. */
  391. #ifdef FEATURE_PERPKT_INFO
  392. static inline void dp_rx_rate_stats_update(struct dp_peer *peer,
  393. struct cdp_rx_indication_ppdu *ppdu,
  394. uint32_t user)
  395. {
  396. uint32_t ratekbps = 0;
  397. uint32_t ppdu_rx_rate = 0;
  398. uint32_t nss = 0;
  399. uint8_t mcs = 0;
  400. uint32_t rix;
  401. uint16_t ratecode;
  402. struct cdp_rx_stats_ppdu_user *ppdu_user = NULL;
  403. if (!peer || !ppdu)
  404. return;
  405. if (ppdu->u.ppdu_type != HAL_RX_TYPE_SU) {
  406. ppdu_user = &ppdu->user[user];
  407. if (ppdu_user->nss == 0)
  408. nss = 0;
  409. else
  410. nss = ppdu_user->nss - 1;
  411. mcs = ppdu_user->mcs;
  412. } else {
  413. mcs = ppdu->u.mcs;
  414. nss = ppdu->u.nss;
  415. }
  416. ratekbps = dp_getrateindex(ppdu->u.gi,
  417. mcs,
  418. nss,
  419. ppdu->u.preamble,
  420. ppdu->u.bw,
  421. &rix,
  422. &ratecode);
  423. if (!ratekbps)
  424. return;
  425. ppdu->rix = rix;
  426. DP_STATS_UPD(peer, rx.last_rx_rate, ratekbps);
  427. dp_ath_rate_lpf(peer->stats.rx.avg_rx_rate, ratekbps);
  428. ppdu_rx_rate = dp_ath_rate_out(peer->stats.rx.avg_rx_rate);
  429. DP_STATS_UPD(peer, rx.rnd_avg_rx_rate, ppdu_rx_rate);
  430. ppdu->rx_ratekbps = ratekbps;
  431. ppdu->rx_ratecode = ratecode;
  432. if (peer->vdev)
  433. peer->vdev->stats.rx.last_rx_rate = ratekbps;
  434. }
  435. static void dp_rx_stats_update(struct dp_pdev *pdev,
  436. struct cdp_rx_indication_ppdu *ppdu)
  437. {
  438. struct dp_soc *soc = NULL;
  439. uint8_t mcs, preamble, ac = 0, nss, ppdu_type;
  440. uint16_t num_msdu;
  441. uint8_t pkt_bw_offset;
  442. struct dp_peer *peer;
  443. struct cdp_rx_stats_ppdu_user *ppdu_user;
  444. uint32_t i;
  445. enum cdp_mu_packet_type mu_pkt_type;
  446. if (pdev)
  447. soc = pdev->soc;
  448. else
  449. return;
  450. if (!soc || soc->process_rx_status)
  451. return;
  452. preamble = ppdu->u.preamble;
  453. ppdu_type = ppdu->u.ppdu_type;
  454. for (i = 0; i < ppdu->num_users; i++) {
  455. peer = NULL;
  456. ppdu_user = &ppdu->user[i];
  457. if (ppdu_user->peer_id != HTT_INVALID_PEER)
  458. peer = dp_peer_find_hash_find(soc, ppdu_user->mac_addr,
  459. 0, ppdu_user->vdev_id);
  460. if (!peer)
  461. peer = pdev->invalid_peer;
  462. ppdu->cookie = (void *)peer->wlanstats_ctx;
  463. if (ppdu_type == HAL_RX_TYPE_SU) {
  464. mcs = ppdu->u.mcs;
  465. nss = ppdu->u.nss;
  466. } else {
  467. mcs = ppdu_user->mcs;
  468. nss = ppdu_user->nss;
  469. }
  470. num_msdu = ppdu_user->num_msdu;
  471. switch (ppdu->u.bw) {
  472. case CMN_BW_20MHZ:
  473. pkt_bw_offset = PKT_BW_GAIN_20MHZ;
  474. break;
  475. case CMN_BW_40MHZ:
  476. pkt_bw_offset = PKT_BW_GAIN_40MHZ;
  477. break;
  478. case CMN_BW_80MHZ:
  479. pkt_bw_offset = PKT_BW_GAIN_80MHZ;
  480. break;
  481. case CMN_BW_160MHZ:
  482. pkt_bw_offset = PKT_BW_GAIN_160MHZ;
  483. break;
  484. default:
  485. pkt_bw_offset = 0;
  486. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  487. "Invalid BW index = %d", ppdu->u.bw);
  488. }
  489. DP_STATS_UPD(peer, rx.rssi, (ppdu->rssi + pkt_bw_offset));
  490. if (peer->stats.rx.avg_rssi == INVALID_RSSI)
  491. peer->stats.rx.avg_rssi =
  492. CDP_RSSI_IN(peer->stats.rx.rssi);
  493. else
  494. CDP_RSSI_UPDATE_AVG(peer->stats.rx.avg_rssi,
  495. peer->stats.rx.rssi);
  496. if ((preamble == DOT11_A) || (preamble == DOT11_B))
  497. nss = 1;
  498. if (ppdu_type == HAL_RX_TYPE_SU) {
  499. if (nss) {
  500. DP_STATS_INC(peer, rx.nss[nss - 1], num_msdu);
  501. DP_STATS_INC(peer, rx.ppdu_nss[nss - 1], 1);
  502. }
  503. DP_STATS_INC(peer, rx.mpdu_cnt_fcs_ok,
  504. ppdu_user->mpdu_cnt_fcs_ok);
  505. DP_STATS_INC(peer, rx.mpdu_cnt_fcs_err,
  506. ppdu_user->mpdu_cnt_fcs_err);
  507. }
  508. if (ppdu_type >= HAL_RX_TYPE_MU_MIMO &&
  509. ppdu_type <= HAL_RX_TYPE_MU_OFDMA) {
  510. if (ppdu_type == HAL_RX_TYPE_MU_MIMO)
  511. mu_pkt_type = RX_TYPE_MU_MIMO;
  512. else
  513. mu_pkt_type = RX_TYPE_MU_OFDMA;
  514. if (nss) {
  515. DP_STATS_INC(peer, rx.nss[nss - 1], num_msdu);
  516. DP_STATS_INC(peer,
  517. rx.rx_mu[mu_pkt_type].ppdu_nss[nss - 1],
  518. 1);
  519. }
  520. DP_STATS_INC(peer,
  521. rx.rx_mu[mu_pkt_type].mpdu_cnt_fcs_ok,
  522. ppdu_user->mpdu_cnt_fcs_ok);
  523. DP_STATS_INC(peer,
  524. rx.rx_mu[mu_pkt_type].mpdu_cnt_fcs_err,
  525. ppdu_user->mpdu_cnt_fcs_err);
  526. }
  527. DP_STATS_INC(peer, rx.sgi_count[ppdu->u.gi], num_msdu);
  528. DP_STATS_INC(peer, rx.bw[ppdu->u.bw], num_msdu);
  529. DP_STATS_INC(peer, rx.reception_type[ppdu->u.ppdu_type],
  530. num_msdu);
  531. DP_STATS_INC(peer, rx.ppdu_cnt[ppdu->u.ppdu_type], 1);
  532. DP_STATS_INCC(peer, rx.ampdu_cnt, num_msdu,
  533. ppdu_user->is_ampdu);
  534. DP_STATS_INCC(peer, rx.non_ampdu_cnt, num_msdu,
  535. !(ppdu_user->is_ampdu));
  536. DP_STATS_UPD(peer, rx.rx_rate, mcs);
  537. DP_STATS_INCC(peer,
  538. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  539. ((mcs >= MAX_MCS_11A) && (preamble == DOT11_A)));
  540. DP_STATS_INCC(peer,
  541. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  542. ((mcs < MAX_MCS_11A) && (preamble == DOT11_A)));
  543. DP_STATS_INCC(peer,
  544. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  545. ((mcs >= MAX_MCS_11B) && (preamble == DOT11_B)));
  546. DP_STATS_INCC(peer,
  547. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  548. ((mcs < MAX_MCS_11B) && (preamble == DOT11_B)));
  549. DP_STATS_INCC(peer,
  550. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  551. ((mcs >= MAX_MCS_11A) && (preamble == DOT11_N)));
  552. DP_STATS_INCC(peer,
  553. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  554. ((mcs < MAX_MCS_11A) && (preamble == DOT11_N)));
  555. DP_STATS_INCC(peer,
  556. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  557. ((mcs >= MAX_MCS_11AC) && (preamble == DOT11_AC)));
  558. DP_STATS_INCC(peer,
  559. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  560. ((mcs < MAX_MCS_11AC) && (preamble == DOT11_AC)));
  561. DP_STATS_INCC(peer,
  562. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  563. ((mcs >= (MAX_MCS - 1)) && (preamble == DOT11_AX)));
  564. DP_STATS_INCC(peer,
  565. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  566. ((mcs < (MAX_MCS - 1)) && (preamble == DOT11_AX)));
  567. DP_STATS_INCC(peer,
  568. rx.su_ax_ppdu_cnt.mcs_count[MAX_MCS - 1], 1,
  569. ((mcs >= (MAX_MCS - 1)) && (preamble == DOT11_AX) &&
  570. (ppdu_type == HAL_RX_TYPE_SU)));
  571. DP_STATS_INCC(peer,
  572. rx.su_ax_ppdu_cnt.mcs_count[mcs], 1,
  573. ((mcs < (MAX_MCS - 1)) && (preamble == DOT11_AX) &&
  574. (ppdu_type == HAL_RX_TYPE_SU)));
  575. DP_STATS_INCC(peer,
  576. rx.rx_mu[RX_TYPE_MU_OFDMA].ppdu.mcs_count[MAX_MCS - 1],
  577. 1, ((mcs >= (MAX_MCS - 1)) &&
  578. (preamble == DOT11_AX) &&
  579. (ppdu_type == HAL_RX_TYPE_MU_OFDMA)));
  580. DP_STATS_INCC(peer,
  581. rx.rx_mu[RX_TYPE_MU_OFDMA].ppdu.mcs_count[mcs],
  582. 1, ((mcs < (MAX_MCS - 1)) &&
  583. (preamble == DOT11_AX) &&
  584. (ppdu_type == HAL_RX_TYPE_MU_OFDMA)));
  585. DP_STATS_INCC(peer,
  586. rx.rx_mu[RX_TYPE_MU_MIMO].ppdu.mcs_count[MAX_MCS - 1],
  587. 1, ((mcs >= (MAX_MCS - 1)) &&
  588. (preamble == DOT11_AX) &&
  589. (ppdu_type == HAL_RX_TYPE_MU_MIMO)));
  590. DP_STATS_INCC(peer,
  591. rx.rx_mu[RX_TYPE_MU_MIMO].ppdu.mcs_count[mcs],
  592. 1, ((mcs < (MAX_MCS - 1)) &&
  593. (preamble == DOT11_AX) &&
  594. (ppdu_type == HAL_RX_TYPE_MU_MIMO)));
  595. /*
  596. * If invalid TID, it could be a non-qos frame, hence do not
  597. * update any AC counters
  598. */
  599. ac = TID_TO_WME_AC(ppdu_user->tid);
  600. if (ppdu->tid != HAL_TID_INVALID)
  601. DP_STATS_INC(peer, rx.wme_ac_type[ac], num_msdu);
  602. dp_peer_stats_notify(pdev, peer);
  603. DP_STATS_UPD(peer, rx.last_rssi, ppdu->rssi);
  604. if (peer == pdev->invalid_peer)
  605. continue;
  606. if (dp_is_subtype_data(ppdu->frame_ctrl))
  607. dp_rx_rate_stats_update(peer, ppdu, i);
  608. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  609. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, pdev->soc,
  610. &peer->stats, ppdu->peer_id,
  611. UPDATE_PEER_STATS, pdev->pdev_id);
  612. #endif
  613. dp_peer_unref_delete(peer);
  614. }
  615. }
  616. #endif
  617. /*
  618. * dp_rx_get_fcs_ok_msdu() - get ppdu status buffer containing fcs_ok msdu
  619. * @pdev: pdev object
  620. * @ppdu_info: ppdu info object
  621. *
  622. * Return: nbuf
  623. */
  624. static inline qdf_nbuf_t
  625. dp_rx_get_fcs_ok_msdu(struct dp_pdev *pdev,
  626. struct hal_rx_ppdu_info *ppdu_info)
  627. {
  628. uint16_t mpdu_fcs_ok;
  629. qdf_nbuf_t status_nbuf = NULL;
  630. unsigned long *fcs_ok_bitmap;
  631. if (qdf_unlikely(qdf_nbuf_is_queue_empty(&pdev->rx_ppdu_buf_q)))
  632. return NULL;
  633. /* Obtain fcs_ok passed index from bitmap
  634. * this index is used to get fcs passed first msdu payload
  635. */
  636. fcs_ok_bitmap =
  637. (unsigned long *)&ppdu_info->com_info.mpdu_fcs_ok_bitmap[0];
  638. mpdu_fcs_ok = qdf_find_first_bit(fcs_ok_bitmap,
  639. HAL_RX_MAX_MPDU);
  640. if (qdf_unlikely(mpdu_fcs_ok >= HAL_RX_MAX_MPDU))
  641. goto end;
  642. if (qdf_unlikely(!ppdu_info->ppdu_msdu_info[mpdu_fcs_ok].nbuf))
  643. goto end;
  644. /* Get status buffer by indexing mpdu_fcs_ok index
  645. * containing first msdu payload with fcs passed
  646. * and clone the buffer
  647. */
  648. status_nbuf = ppdu_info->ppdu_msdu_info[mpdu_fcs_ok].nbuf;
  649. ppdu_info->ppdu_msdu_info[mpdu_fcs_ok].nbuf = NULL;
  650. /* Take ref of status nbuf as this nbuf is to be
  651. * freeed by upper layer.
  652. */
  653. qdf_nbuf_ref(status_nbuf);
  654. ppdu_info->fcs_ok_msdu_info.first_msdu_payload =
  655. ppdu_info->ppdu_msdu_info[mpdu_fcs_ok].first_msdu_payload;
  656. ppdu_info->fcs_ok_msdu_info.payload_len =
  657. ppdu_info->ppdu_msdu_info[mpdu_fcs_ok].payload_len;
  658. end:
  659. /* Free the ppdu status buffer queue */
  660. qdf_nbuf_queue_free(&pdev->rx_ppdu_buf_q);
  661. qdf_mem_zero(&ppdu_info->ppdu_msdu_info,
  662. (ppdu_info->com_info.mpdu_cnt_fcs_ok +
  663. ppdu_info->com_info.mpdu_cnt_fcs_err)
  664. * sizeof(struct hal_rx_msdu_payload_info));
  665. return status_nbuf;
  666. }
  667. static inline void
  668. dp_rx_handle_ppdu_status_buf(struct dp_pdev *pdev,
  669. struct hal_rx_ppdu_info *ppdu_info,
  670. qdf_nbuf_t status_nbuf)
  671. {
  672. qdf_nbuf_t dropnbuf;
  673. if (qdf_nbuf_queue_len(&pdev->rx_ppdu_buf_q) >
  674. HAL_RX_MAX_MPDU) {
  675. dropnbuf = qdf_nbuf_queue_remove(&pdev->rx_ppdu_buf_q);
  676. qdf_nbuf_free(dropnbuf);
  677. }
  678. qdf_nbuf_queue_add(&pdev->rx_ppdu_buf_q, status_nbuf);
  679. }
  680. /**
  681. * dp_rx_handle_mcopy_mode() - Allocate and deliver first MSDU payload
  682. * @soc: core txrx main context
  683. * @pdev: pdev strcuture
  684. * @ppdu_info: structure for rx ppdu ring
  685. *
  686. * Return: QDF_STATUS_SUCCESS - If nbuf to be freed by caller
  687. * QDF_STATUS_E_ALREADY - If nbuf not to be freed by caller
  688. */
  689. #ifdef FEATURE_PERPKT_INFO
  690. static inline QDF_STATUS
  691. dp_rx_handle_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  692. struct hal_rx_ppdu_info *ppdu_info, qdf_nbuf_t nbuf)
  693. {
  694. uint8_t size = 0;
  695. struct ieee80211_frame *wh;
  696. uint32_t *nbuf_data;
  697. if (!ppdu_info->fcs_ok_msdu_info.first_msdu_payload)
  698. return QDF_STATUS_SUCCESS;
  699. if (pdev->m_copy_id.rx_ppdu_id == ppdu_info->com_info.ppdu_id)
  700. return QDF_STATUS_SUCCESS;
  701. pdev->m_copy_id.rx_ppdu_id = ppdu_info->com_info.ppdu_id;
  702. wh = (struct ieee80211_frame *)
  703. (ppdu_info->fcs_ok_msdu_info.first_msdu_payload + 4);
  704. size = (ppdu_info->fcs_ok_msdu_info.first_msdu_payload -
  705. qdf_nbuf_data(nbuf));
  706. if (qdf_nbuf_pull_head(nbuf, size) == NULL)
  707. return QDF_STATUS_SUCCESS;
  708. if (((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
  709. IEEE80211_FC0_TYPE_MGT) ||
  710. ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
  711. IEEE80211_FC0_TYPE_CTL)) {
  712. return QDF_STATUS_SUCCESS;
  713. }
  714. ppdu_info->fcs_ok_msdu_info.first_msdu_payload = NULL;
  715. nbuf_data = (uint32_t *)qdf_nbuf_data(nbuf);
  716. *nbuf_data = pdev->ppdu_info.com_info.ppdu_id;
  717. /* only retain RX MSDU payload in the skb */
  718. qdf_nbuf_trim_tail(nbuf, qdf_nbuf_len(nbuf) -
  719. ppdu_info->fcs_ok_msdu_info.payload_len);
  720. dp_wdi_event_handler(WDI_EVENT_RX_DATA, soc,
  721. nbuf, HTT_INVALID_PEER, WDI_NO_VAL, pdev->pdev_id);
  722. return QDF_STATUS_E_ALREADY;
  723. }
  724. #else
  725. static inline QDF_STATUS
  726. dp_rx_handle_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  727. struct hal_rx_ppdu_info *ppdu_info, qdf_nbuf_t nbuf)
  728. {
  729. return QDF_STATUS_SUCCESS;
  730. }
  731. #endif
  732. #ifdef FEATURE_PERPKT_INFO
  733. static inline void
  734. dp_rx_process_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  735. struct hal_rx_ppdu_info *ppdu_info,
  736. uint32_t tlv_status,
  737. qdf_nbuf_t status_nbuf)
  738. {
  739. QDF_STATUS mcopy_status;
  740. if (qdf_unlikely(!ppdu_info->com_info.mpdu_cnt)) {
  741. qdf_nbuf_free(status_nbuf);
  742. return;
  743. }
  744. /* Add buffers to queue until we receive
  745. * HAL_TLV_STATUS_PPDU_DONE
  746. */
  747. dp_rx_handle_ppdu_status_buf(pdev, ppdu_info, status_nbuf);
  748. /* If tlv_status is PPDU_DONE, process rx_ppdu_buf_q
  749. * and devliver fcs_ok msdu buffer
  750. */
  751. if (tlv_status == HAL_TLV_STATUS_PPDU_DONE) {
  752. if (qdf_unlikely(ppdu_info->com_info.mpdu_cnt !=
  753. (ppdu_info->com_info.mpdu_cnt_fcs_ok +
  754. ppdu_info->com_info.mpdu_cnt_fcs_err))) {
  755. qdf_nbuf_queue_free(&pdev->rx_ppdu_buf_q);
  756. return;
  757. }
  758. /* Get rx ppdu status buffer having fcs ok msdu */
  759. status_nbuf = dp_rx_get_fcs_ok_msdu(pdev, ppdu_info);
  760. if (status_nbuf) {
  761. mcopy_status = dp_rx_handle_mcopy_mode(soc, pdev,
  762. ppdu_info,
  763. status_nbuf);
  764. if (mcopy_status == QDF_STATUS_SUCCESS)
  765. qdf_nbuf_free(status_nbuf);
  766. }
  767. }
  768. }
  769. #else
  770. static inline void
  771. dp_rx_process_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  772. struct hal_rx_ppdu_info *ppdu_info,
  773. uint32_t tlv_status,
  774. qdf_nbuf_t status_nbuf)
  775. {
  776. }
  777. #endif
  778. /**
  779. * dp_rx_handle_smart_mesh_mode() - Deliver header for smart mesh
  780. * @soc: Datapath SOC handle
  781. * @pdev: Datapath PDEV handle
  782. * @ppdu_info: Structure for rx ppdu info
  783. * @nbuf: Qdf nbuf abstraction for linux skb
  784. *
  785. * Return: 0 on success, 1 on failure
  786. */
  787. static inline int
  788. dp_rx_handle_smart_mesh_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  789. struct hal_rx_ppdu_info *ppdu_info,
  790. qdf_nbuf_t nbuf)
  791. {
  792. uint8_t size = 0;
  793. if (!pdev->monitor_vdev) {
  794. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  795. "[%s]:[%d] Monitor vdev is NULL !!",
  796. __func__, __LINE__);
  797. return 1;
  798. }
  799. if (!ppdu_info->msdu_info.first_msdu_payload) {
  800. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  801. "[%s]:[%d] First msdu payload not present",
  802. __func__, __LINE__);
  803. return 1;
  804. }
  805. /* Adding 4 bytes to get to start of 802.11 frame after phy_ppdu_id */
  806. size = (ppdu_info->msdu_info.first_msdu_payload -
  807. qdf_nbuf_data(nbuf)) + 4;
  808. ppdu_info->msdu_info.first_msdu_payload = NULL;
  809. if (qdf_nbuf_pull_head(nbuf, size) == NULL) {
  810. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  811. "[%s]:[%d] No header present",
  812. __func__, __LINE__);
  813. return 1;
  814. }
  815. /* Only retain RX MSDU payload in the skb */
  816. qdf_nbuf_trim_tail(nbuf, qdf_nbuf_len(nbuf) -
  817. ppdu_info->msdu_info.payload_len);
  818. if (!qdf_nbuf_update_radiotap(&pdev->ppdu_info.rx_status, nbuf,
  819. qdf_nbuf_headroom(nbuf))) {
  820. DP_STATS_INC(pdev, dropped.mon_radiotap_update_err, 1);
  821. return 1;
  822. }
  823. pdev->monitor_vdev->osif_rx_mon(pdev->monitor_vdev->osif_vdev,
  824. nbuf, NULL);
  825. pdev->ppdu_info.rx_status.monitor_direct_used = 0;
  826. return 0;
  827. }
  828. #if defined(WLAN_CFR_ENABLE) && defined(WLAN_ENH_CFR_ENABLE)
  829. /*
  830. * dp_rx_mon_handle_cfr_mu_info() - Gather macaddr and ast_index of peer(s) in
  831. * the PPDU received, this will be used for correlation of CFR data captured
  832. * for an UL-MU-PPDU
  833. * @pdev: pdev ctx
  834. * @ppdu_info: pointer to ppdu info structure populated from ppdu status TLVs
  835. * @cdp_rx_ppdu: Rx PPDU indication structure
  836. *
  837. * Return: none
  838. */
  839. static inline void
  840. dp_rx_mon_handle_cfr_mu_info(struct dp_pdev *pdev,
  841. struct hal_rx_ppdu_info *ppdu_info,
  842. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  843. {
  844. struct dp_peer *peer;
  845. struct dp_soc *soc = pdev->soc;
  846. struct dp_ast_entry *ast_entry;
  847. struct mon_rx_user_status *rx_user_status;
  848. struct cdp_rx_stats_ppdu_user *rx_stats_peruser;
  849. uint32_t num_users;
  850. int user_id;
  851. uint32_t ast_index;
  852. qdf_spin_lock_bh(&soc->ast_lock);
  853. num_users = ppdu_info->com_info.num_users;
  854. for (user_id = 0; user_id < num_users; user_id++) {
  855. if (user_id > OFDMA_NUM_USERS) {
  856. qdf_spin_unlock_bh(&soc->ast_lock);
  857. return;
  858. }
  859. rx_user_status = &ppdu_info->rx_user_status[user_id];
  860. rx_stats_peruser = &cdp_rx_ppdu->user[user_id];
  861. ast_index = rx_user_status->ast_index;
  862. if (ast_index >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx)) {
  863. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  864. continue;
  865. }
  866. ast_entry = soc->ast_table[ast_index];
  867. if (!ast_entry) {
  868. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  869. continue;
  870. }
  871. peer = ast_entry->peer;
  872. if (!peer || peer->peer_ids[0] == HTT_INVALID_PEER) {
  873. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  874. continue;
  875. }
  876. qdf_mem_copy(rx_stats_peruser->mac_addr,
  877. peer->mac_addr.raw, QDF_MAC_ADDR_SIZE);
  878. }
  879. qdf_spin_unlock_bh(&soc->ast_lock);
  880. }
  881. /*
  882. * dp_rx_mon_populate_cfr_ppdu_info() - Populate cdp ppdu info from hal ppdu
  883. * info
  884. * @pdev: pdev ctx
  885. * @ppdu_info: ppdu info structure from ppdu ring
  886. * @cdp_rx_ppdu : Rx PPDU indication structure
  887. *
  888. * Return: none
  889. */
  890. static inline void
  891. dp_rx_mon_populate_cfr_ppdu_info(struct dp_pdev *pdev,
  892. struct hal_rx_ppdu_info *ppdu_info,
  893. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  894. {
  895. int chain;
  896. cdp_rx_ppdu->ppdu_id = ppdu_info->com_info.ppdu_id;
  897. cdp_rx_ppdu->timestamp = ppdu_info->rx_status.tsft;
  898. cdp_rx_ppdu->u.ppdu_type = ppdu_info->rx_status.reception_type;
  899. cdp_rx_ppdu->num_users = ppdu_info->com_info.num_users;
  900. for (chain = 0; chain < MAX_CHAIN; chain++)
  901. cdp_rx_ppdu->per_chain_rssi[chain] =
  902. ppdu_info->rx_status.rssi[chain];
  903. dp_rx_mon_handle_cfr_mu_info(pdev, ppdu_info, cdp_rx_ppdu);
  904. }
  905. /**
  906. * dp_cfr_rcc_mode_status() - Return status of cfr rcc mode
  907. * @pdev: pdev ctx
  908. *
  909. * Return: True or False
  910. */
  911. static inline bool
  912. dp_cfr_rcc_mode_status(struct dp_pdev *pdev)
  913. {
  914. return pdev->cfr_rcc_mode;
  915. }
  916. /*
  917. * dp_rx_mon_populate_cfr_info() - Populate cdp ppdu info from hal cfr info
  918. * @pdev: pdev ctx
  919. * @ppdu_info: ppdu info structure from ppdu ring
  920. * @cdp_rx_ppdu: Rx PPDU indication structure
  921. *
  922. * Return: none
  923. */
  924. static inline void
  925. dp_rx_mon_populate_cfr_info(struct dp_pdev *pdev,
  926. struct hal_rx_ppdu_info *ppdu_info,
  927. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  928. {
  929. struct cdp_rx_ppdu_cfr_info *cfr_info;
  930. if (!dp_cfr_rcc_mode_status(pdev))
  931. return;
  932. cfr_info = &cdp_rx_ppdu->cfr_info;
  933. cfr_info->bb_captured_channel
  934. = ppdu_info->cfr_info.bb_captured_channel;
  935. cfr_info->bb_captured_timeout
  936. = ppdu_info->cfr_info.bb_captured_timeout;
  937. cfr_info->bb_captured_reason
  938. = ppdu_info->cfr_info.bb_captured_reason;
  939. cfr_info->rx_location_info_valid
  940. = ppdu_info->cfr_info.rx_location_info_valid;
  941. cfr_info->chan_capture_status
  942. = ppdu_info->cfr_info.chan_capture_status;
  943. cfr_info->rtt_che_buffer_pointer_high8
  944. = ppdu_info->cfr_info.rtt_che_buffer_pointer_high8;
  945. cfr_info->rtt_che_buffer_pointer_low32
  946. = ppdu_info->cfr_info.rtt_che_buffer_pointer_low32;
  947. }
  948. /**
  949. * dp_update_cfr_dbg_stats() - Increment RCC debug statistics
  950. * @pdev: pdev structure
  951. * @ppdu_info: structure for rx ppdu ring
  952. *
  953. * Return: none
  954. */
  955. static inline void
  956. dp_update_cfr_dbg_stats(struct dp_pdev *pdev,
  957. struct hal_rx_ppdu_info *ppdu_info)
  958. {
  959. struct hal_rx_ppdu_cfr_info *cfr = &ppdu_info->cfr_info;
  960. DP_STATS_INC(pdev,
  961. rcc.chan_capture_status[cfr->chan_capture_status], 1);
  962. if (cfr->rx_location_info_valid) {
  963. DP_STATS_INC(pdev, rcc.rx_loc_info_valid_cnt, 1);
  964. if (cfr->bb_captured_channel) {
  965. DP_STATS_INC(pdev, rcc.bb_captured_channel_cnt, 1);
  966. DP_STATS_INC(pdev,
  967. rcc.reason_cnt[cfr->bb_captured_reason],
  968. 1);
  969. } else if (cfr->bb_captured_timeout) {
  970. DP_STATS_INC(pdev, rcc.bb_captured_timeout_cnt, 1);
  971. DP_STATS_INC(pdev,
  972. rcc.reason_cnt[cfr->bb_captured_reason],
  973. 1);
  974. }
  975. }
  976. }
  977. /*
  978. * dp_rx_handle_cfr() - Gather cfr info from hal ppdu info
  979. * @soc: core txrx main context
  980. * @pdev: pdev ctx
  981. * @ppdu_info: ppdu info structure from ppdu ring
  982. *
  983. * Return: none
  984. */
  985. static inline void
  986. dp_rx_handle_cfr(struct dp_soc *soc, struct dp_pdev *pdev,
  987. struct hal_rx_ppdu_info *ppdu_info)
  988. {
  989. qdf_nbuf_t ppdu_nbuf;
  990. struct cdp_rx_indication_ppdu *cdp_rx_ppdu;
  991. dp_update_cfr_dbg_stats(pdev, ppdu_info);
  992. if (!ppdu_info->cfr_info.bb_captured_channel)
  993. return;
  994. ppdu_nbuf = qdf_nbuf_alloc(soc->osdev,
  995. sizeof(struct cdp_rx_indication_ppdu),
  996. 0,
  997. 0,
  998. FALSE);
  999. if (ppdu_nbuf) {
  1000. cdp_rx_ppdu = (struct cdp_rx_indication_ppdu *)ppdu_nbuf->data;
  1001. dp_rx_mon_populate_cfr_info(pdev, ppdu_info, cdp_rx_ppdu);
  1002. dp_rx_mon_populate_cfr_ppdu_info(pdev, ppdu_info, cdp_rx_ppdu);
  1003. qdf_nbuf_put_tail(ppdu_nbuf,
  1004. sizeof(struct cdp_rx_indication_ppdu));
  1005. dp_wdi_event_handler(WDI_EVENT_RX_PPDU_DESC, soc,
  1006. ppdu_nbuf, HTT_INVALID_PEER,
  1007. WDI_NO_VAL, pdev->pdev_id);
  1008. }
  1009. }
  1010. /**
  1011. * dp_rx_populate_cfr_non_assoc_sta() - Populate cfr ppdu info for PPDUs from
  1012. * non-associated stations
  1013. * @pdev: pdev ctx
  1014. * @ppdu_info: ppdu info structure from ppdu ring
  1015. * @cdp_rx_ppdu: Rx PPDU indication structure
  1016. *
  1017. * Return: none
  1018. */
  1019. static inline void
  1020. dp_rx_populate_cfr_non_assoc_sta(struct dp_pdev *pdev,
  1021. struct hal_rx_ppdu_info *ppdu_info,
  1022. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1023. {
  1024. if (!dp_cfr_rcc_mode_status(pdev))
  1025. return;
  1026. if (ppdu_info->cfr_info.bb_captured_channel)
  1027. dp_rx_mon_populate_cfr_ppdu_info(pdev, ppdu_info, cdp_rx_ppdu);
  1028. }
  1029. /**
  1030. * dp_bb_captured_chan_status() - Get the bb_captured_channel status
  1031. * @ppdu_info: structure for rx ppdu ring
  1032. *
  1033. * Return: Success/ Failure
  1034. */
  1035. static inline QDF_STATUS
  1036. dp_bb_captured_chan_status(struct dp_pdev *pdev,
  1037. struct hal_rx_ppdu_info *ppdu_info)
  1038. {
  1039. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  1040. struct hal_rx_ppdu_cfr_info *cfr = &ppdu_info->cfr_info;
  1041. if (dp_cfr_rcc_mode_status(pdev)) {
  1042. if (cfr->bb_captured_channel)
  1043. status = QDF_STATUS_SUCCESS;
  1044. }
  1045. return status;
  1046. }
  1047. #else
  1048. static inline void
  1049. dp_rx_mon_handle_cfr_mu_info(struct dp_pdev *pdev,
  1050. struct hal_rx_ppdu_info *ppdu_info,
  1051. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1052. {
  1053. }
  1054. static inline void
  1055. dp_rx_mon_populate_cfr_ppdu_info(struct dp_pdev *pdev,
  1056. struct hal_rx_ppdu_info *ppdu_info,
  1057. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1058. {
  1059. }
  1060. static inline void
  1061. dp_rx_mon_populate_cfr_info(struct dp_pdev *pdev,
  1062. struct hal_rx_ppdu_info *ppdu_info,
  1063. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1064. {
  1065. }
  1066. static inline void
  1067. dp_rx_handle_cfr(struct dp_soc *soc, struct dp_pdev *pdev,
  1068. struct hal_rx_ppdu_info *ppdu_info)
  1069. {
  1070. }
  1071. static inline void
  1072. dp_rx_populate_cfr_non_assoc_sta(struct dp_pdev *pdev,
  1073. struct hal_rx_ppdu_info *ppdu_info,
  1074. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1075. {
  1076. }
  1077. static inline void
  1078. dp_update_cfr_dbg_stats(struct dp_pdev *pdev,
  1079. struct hal_rx_ppdu_info *ppdu_info)
  1080. {
  1081. }
  1082. static inline QDF_STATUS
  1083. dp_bb_captured_chan_status(struct dp_pdev *pdev,
  1084. struct hal_rx_ppdu_info *ppdu_info)
  1085. {
  1086. return QDF_STATUS_E_NOSUPPORT;
  1087. }
  1088. static inline bool
  1089. dp_cfr_rcc_mode_status(struct dp_pdev *pdev)
  1090. {
  1091. return false;
  1092. }
  1093. #endif
  1094. /**
  1095. * dp_rx_handle_ppdu_stats() - Allocate and deliver ppdu stats to cdp layer
  1096. * @soc: core txrx main context
  1097. * @pdev: pdev strcuture
  1098. * @ppdu_info: structure for rx ppdu ring
  1099. *
  1100. * Return: none
  1101. */
  1102. #ifdef FEATURE_PERPKT_INFO
  1103. static inline void
  1104. dp_rx_handle_ppdu_stats(struct dp_soc *soc, struct dp_pdev *pdev,
  1105. struct hal_rx_ppdu_info *ppdu_info)
  1106. {
  1107. qdf_nbuf_t ppdu_nbuf;
  1108. struct cdp_rx_indication_ppdu *cdp_rx_ppdu;
  1109. /*
  1110. * Do not allocate if fcs error,
  1111. * ast idx invalid / fctl invalid
  1112. *
  1113. * In CFR RCC mode - PPDU status TLVs of error pkts are also needed
  1114. */
  1115. if (ppdu_info->com_info.mpdu_cnt_fcs_ok == 0)
  1116. return;
  1117. if (ppdu_info->nac_info.fc_valid &&
  1118. ppdu_info->nac_info.to_ds_flag &&
  1119. ppdu_info->nac_info.mac_addr2_valid) {
  1120. struct dp_neighbour_peer *peer = NULL;
  1121. uint8_t rssi = ppdu_info->rx_status.rssi_comb;
  1122. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  1123. if (pdev->neighbour_peers_added) {
  1124. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  1125. neighbour_peer_list_elem) {
  1126. if (!qdf_mem_cmp(&peer->neighbour_peers_macaddr,
  1127. &ppdu_info->nac_info.mac_addr2,
  1128. QDF_MAC_ADDR_SIZE)) {
  1129. peer->rssi = rssi;
  1130. break;
  1131. }
  1132. }
  1133. }
  1134. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  1135. }
  1136. /* need not generate wdi event when mcopy, cfr rcc mode and
  1137. * enhanced stats are not enabled
  1138. */
  1139. if (!pdev->mcopy_mode && !pdev->enhanced_stats_en &&
  1140. !dp_cfr_rcc_mode_status(pdev))
  1141. return;
  1142. if (dp_cfr_rcc_mode_status(pdev))
  1143. dp_update_cfr_dbg_stats(pdev, ppdu_info);
  1144. if (!ppdu_info->rx_status.frame_control_info_valid ||
  1145. (ppdu_info->rx_status.ast_index == HAL_AST_IDX_INVALID)) {
  1146. if (!(pdev->mcopy_mode ||
  1147. (dp_bb_captured_chan_status(pdev, ppdu_info) ==
  1148. QDF_STATUS_SUCCESS)))
  1149. return;
  1150. }
  1151. ppdu_nbuf = qdf_nbuf_alloc(soc->osdev,
  1152. sizeof(struct cdp_rx_indication_ppdu),
  1153. 0, 0, FALSE);
  1154. if (ppdu_nbuf) {
  1155. cdp_rx_ppdu = (struct cdp_rx_indication_ppdu *)ppdu_nbuf->data;
  1156. dp_rx_mon_populate_cfr_info(pdev, ppdu_info, cdp_rx_ppdu);
  1157. dp_rx_populate_cdp_indication_ppdu(pdev,
  1158. ppdu_info, cdp_rx_ppdu);
  1159. qdf_nbuf_put_tail(ppdu_nbuf,
  1160. sizeof(struct cdp_rx_indication_ppdu));
  1161. dp_rx_stats_update(pdev, cdp_rx_ppdu);
  1162. if (cdp_rx_ppdu->peer_id != HTT_INVALID_PEER) {
  1163. dp_wdi_event_handler(WDI_EVENT_RX_PPDU_DESC,
  1164. soc, ppdu_nbuf,
  1165. cdp_rx_ppdu->peer_id,
  1166. WDI_NO_VAL, pdev->pdev_id);
  1167. } else if (pdev->mcopy_mode || dp_cfr_rcc_mode_status(pdev)) {
  1168. dp_wdi_event_handler(WDI_EVENT_RX_PPDU_DESC, soc,
  1169. ppdu_nbuf, HTT_INVALID_PEER,
  1170. WDI_NO_VAL, pdev->pdev_id);
  1171. } else {
  1172. qdf_nbuf_free(ppdu_nbuf);
  1173. }
  1174. }
  1175. }
  1176. #else
  1177. static inline void
  1178. dp_rx_handle_ppdu_stats(struct dp_soc *soc, struct dp_pdev *pdev,
  1179. struct hal_rx_ppdu_info *ppdu_info)
  1180. {
  1181. }
  1182. #endif
  1183. /**
  1184. * dp_rx_process_peer_based_pktlog() - Process Rx pktlog if peer based
  1185. * filtering enabled
  1186. * @soc: core txrx main context
  1187. * @ppdu_info: Structure for rx ppdu info
  1188. * @status_nbuf: Qdf nbuf abstraction for linux skb
  1189. * @mac_id: mac_id/pdev_id correspondinggly for MCL and WIN
  1190. *
  1191. * Return: none
  1192. */
  1193. static inline void
  1194. dp_rx_process_peer_based_pktlog(struct dp_soc *soc,
  1195. struct hal_rx_ppdu_info *ppdu_info,
  1196. qdf_nbuf_t status_nbuf, uint32_t mac_id)
  1197. {
  1198. struct dp_peer *peer;
  1199. struct dp_ast_entry *ast_entry;
  1200. uint32_t ast_index;
  1201. ast_index = ppdu_info->rx_status.ast_index;
  1202. if (ast_index < wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx)) {
  1203. ast_entry = soc->ast_table[ast_index];
  1204. if (ast_entry) {
  1205. peer = ast_entry->peer;
  1206. if (peer && (peer->peer_ids[0] != HTT_INVALID_PEER)) {
  1207. if (peer->peer_based_pktlog_filter) {
  1208. dp_wdi_event_handler(
  1209. WDI_EVENT_RX_DESC, soc,
  1210. status_nbuf,
  1211. peer->peer_ids[0],
  1212. WDI_NO_VAL, mac_id);
  1213. }
  1214. }
  1215. }
  1216. }
  1217. }
  1218. #if defined(HTT_UL_OFDMA_USER_INFO_V0_W0_VALID_M)
  1219. static inline void
  1220. dp_rx_ul_ofdma_ru_size_to_width(
  1221. uint32_t ru_size,
  1222. uint32_t *ru_width)
  1223. {
  1224. uint32_t width;
  1225. width = 0;
  1226. switch (ru_size) {
  1227. case HTT_UL_OFDMA_V0_RU_SIZE_RU_26:
  1228. width = 1;
  1229. break;
  1230. case HTT_UL_OFDMA_V0_RU_SIZE_RU_52:
  1231. width = 2;
  1232. break;
  1233. case HTT_UL_OFDMA_V0_RU_SIZE_RU_106:
  1234. width = 4;
  1235. break;
  1236. case HTT_UL_OFDMA_V0_RU_SIZE_RU_242:
  1237. width = 9;
  1238. break;
  1239. case HTT_UL_OFDMA_V0_RU_SIZE_RU_484:
  1240. width = 18;
  1241. break;
  1242. case HTT_UL_OFDMA_V0_RU_SIZE_RU_996:
  1243. width = 37;
  1244. break;
  1245. case HTT_UL_OFDMA_V0_RU_SIZE_RU_996x2:
  1246. width = 74;
  1247. break;
  1248. default:
  1249. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1250. "RU size to width convert err");
  1251. break;
  1252. }
  1253. *ru_width = width;
  1254. }
  1255. static inline void
  1256. dp_rx_mon_handle_mu_ul_info(struct hal_rx_ppdu_info *ppdu_info)
  1257. {
  1258. struct mon_rx_user_status *mon_rx_user_status;
  1259. uint32_t num_users;
  1260. uint32_t i;
  1261. uint32_t mu_ul_user_v0_word0;
  1262. uint32_t mu_ul_user_v0_word1;
  1263. uint32_t ru_width;
  1264. uint32_t ru_size;
  1265. if (!(ppdu_info->rx_status.reception_type == HAL_RX_TYPE_MU_OFDMA ||
  1266. ppdu_info->rx_status.reception_type == HAL_RX_TYPE_MU_MIMO))
  1267. return;
  1268. num_users = ppdu_info->com_info.num_users;
  1269. if (num_users > HAL_MAX_UL_MU_USERS)
  1270. num_users = HAL_MAX_UL_MU_USERS;
  1271. for (i = 0; i < num_users; i++) {
  1272. mon_rx_user_status = &ppdu_info->rx_user_status[i];
  1273. mu_ul_user_v0_word0 =
  1274. mon_rx_user_status->mu_ul_user_v0_word0;
  1275. mu_ul_user_v0_word1 =
  1276. mon_rx_user_status->mu_ul_user_v0_word1;
  1277. if (HTT_UL_OFDMA_USER_INFO_V0_W0_VALID_GET(
  1278. mu_ul_user_v0_word0) &&
  1279. !HTT_UL_OFDMA_USER_INFO_V0_W0_VER_GET(
  1280. mu_ul_user_v0_word0)) {
  1281. mon_rx_user_status->mcs =
  1282. HTT_UL_OFDMA_USER_INFO_V0_W1_MCS_GET(
  1283. mu_ul_user_v0_word1);
  1284. mon_rx_user_status->nss =
  1285. HTT_UL_OFDMA_USER_INFO_V0_W1_NSS_GET(
  1286. mu_ul_user_v0_word1) + 1;
  1287. mon_rx_user_status->mu_ul_info_valid = 1;
  1288. mon_rx_user_status->ofdma_ru_start_index =
  1289. HTT_UL_OFDMA_USER_INFO_V0_W1_RU_START_GET(
  1290. mu_ul_user_v0_word1);
  1291. ru_size =
  1292. HTT_UL_OFDMA_USER_INFO_V0_W1_RU_SIZE_GET(
  1293. mu_ul_user_v0_word1);
  1294. dp_rx_ul_ofdma_ru_size_to_width(ru_size, &ru_width);
  1295. mon_rx_user_status->ofdma_ru_width = ru_width;
  1296. mon_rx_user_status->ofdma_ru_size = ru_size;
  1297. }
  1298. }
  1299. }
  1300. #else
  1301. static inline void
  1302. dp_rx_mon_handle_mu_ul_info(struct hal_rx_ppdu_info *ppdu_info)
  1303. {
  1304. }
  1305. #endif
  1306. /**
  1307. * dp_rx_mon_status_process_tlv() - Process status TLV in status
  1308. * buffer on Rx status Queue posted by status SRNG processing.
  1309. * @soc: core txrx main context
  1310. * @mac_id: mac_id which is one of 3 mac_ids _ring
  1311. *
  1312. * Return: none
  1313. */
  1314. static inline void
  1315. dp_rx_mon_status_process_tlv(struct dp_soc *soc, uint32_t mac_id,
  1316. uint32_t quota)
  1317. {
  1318. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1319. struct hal_rx_ppdu_info *ppdu_info;
  1320. qdf_nbuf_t status_nbuf;
  1321. uint8_t *rx_tlv;
  1322. uint8_t *rx_tlv_start;
  1323. uint32_t tlv_status = HAL_TLV_STATUS_BUF_DONE;
  1324. QDF_STATUS enh_log_status = QDF_STATUS_SUCCESS;
  1325. struct cdp_pdev_mon_stats *rx_mon_stats;
  1326. int smart_mesh_status;
  1327. enum WDI_EVENT pktlog_mode = WDI_NO_VAL;
  1328. bool nbuf_used;
  1329. uint32_t rx_enh_capture_mode;
  1330. if (!pdev) {
  1331. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1332. "pdev is null for mac_id = %d", mac_id);
  1333. return;
  1334. }
  1335. ppdu_info = &pdev->ppdu_info;
  1336. rx_mon_stats = &pdev->rx_mon_stats;
  1337. if (pdev->mon_ppdu_status != DP_PPDU_STATUS_START)
  1338. return;
  1339. rx_enh_capture_mode = pdev->rx_enh_capture_mode;
  1340. while (!qdf_nbuf_is_queue_empty(&pdev->rx_status_q)) {
  1341. status_nbuf = qdf_nbuf_queue_remove(&pdev->rx_status_q);
  1342. rx_tlv = qdf_nbuf_data(status_nbuf);
  1343. rx_tlv_start = rx_tlv;
  1344. nbuf_used = false;
  1345. if ((pdev->monitor_vdev) || (pdev->enhanced_stats_en) ||
  1346. (pdev->mcopy_mode) || (dp_cfr_rcc_mode_status(pdev)) ||
  1347. (rx_enh_capture_mode != CDP_RX_ENH_CAPTURE_DISABLED)) {
  1348. do {
  1349. tlv_status = hal_rx_status_get_tlv_info(rx_tlv,
  1350. ppdu_info, pdev->soc->hal_soc,
  1351. status_nbuf);
  1352. dp_rx_mon_update_dbg_ppdu_stats(ppdu_info,
  1353. rx_mon_stats);
  1354. dp_rx_mon_enh_capture_process(pdev, tlv_status,
  1355. status_nbuf, ppdu_info,
  1356. &nbuf_used);
  1357. rx_tlv = hal_rx_status_get_next_tlv(rx_tlv);
  1358. if ((rx_tlv - rx_tlv_start) >=
  1359. RX_DATA_BUFFER_SIZE)
  1360. break;
  1361. } while ((tlv_status == HAL_TLV_STATUS_PPDU_NOT_DONE) ||
  1362. (tlv_status == HAL_TLV_STATUS_HEADER) ||
  1363. (tlv_status == HAL_TLV_STATUS_MPDU_END) ||
  1364. (tlv_status == HAL_TLV_STATUS_MSDU_END));
  1365. }
  1366. if (pdev->dp_peer_based_pktlog) {
  1367. dp_rx_process_peer_based_pktlog(soc, ppdu_info,
  1368. status_nbuf, mac_id);
  1369. } else {
  1370. if (pdev->rx_pktlog_mode == DP_RX_PKTLOG_FULL)
  1371. pktlog_mode = WDI_EVENT_RX_DESC;
  1372. else if (pdev->rx_pktlog_mode == DP_RX_PKTLOG_LITE)
  1373. pktlog_mode = WDI_EVENT_LITE_RX;
  1374. if (pktlog_mode != WDI_NO_VAL)
  1375. dp_wdi_event_handler(pktlog_mode, soc,
  1376. status_nbuf,
  1377. HTT_INVALID_PEER,
  1378. WDI_NO_VAL, mac_id);
  1379. }
  1380. /* smart monitor vap and m_copy cannot co-exist */
  1381. if (ppdu_info->rx_status.monitor_direct_used && pdev->neighbour_peers_added
  1382. && pdev->monitor_vdev) {
  1383. smart_mesh_status = dp_rx_handle_smart_mesh_mode(soc,
  1384. pdev, ppdu_info, status_nbuf);
  1385. if (smart_mesh_status)
  1386. qdf_nbuf_free(status_nbuf);
  1387. } else if (qdf_unlikely(pdev->mcopy_mode)) {
  1388. dp_rx_process_mcopy_mode(soc, pdev,
  1389. ppdu_info, tlv_status,
  1390. status_nbuf);
  1391. } else if (rx_enh_capture_mode != CDP_RX_ENH_CAPTURE_DISABLED) {
  1392. if (!nbuf_used)
  1393. qdf_nbuf_free(status_nbuf);
  1394. if (tlv_status == HAL_TLV_STATUS_PPDU_DONE)
  1395. enh_log_status =
  1396. dp_rx_handle_enh_capture(soc,
  1397. pdev, ppdu_info);
  1398. } else {
  1399. qdf_nbuf_free(status_nbuf);
  1400. }
  1401. if (tlv_status == HAL_TLV_STATUS_PPDU_NON_STD_DONE) {
  1402. dp_rx_mon_deliver_non_std(soc, mac_id);
  1403. } else if (tlv_status == HAL_TLV_STATUS_PPDU_DONE) {
  1404. rx_mon_stats->status_ppdu_done++;
  1405. dp_rx_mon_handle_mu_ul_info(ppdu_info);
  1406. if (pdev->tx_capture_enabled
  1407. != CDP_TX_ENH_CAPTURE_DISABLED)
  1408. dp_send_ack_frame_to_stack(soc, pdev,
  1409. ppdu_info);
  1410. if (pdev->enhanced_stats_en ||
  1411. pdev->mcopy_mode || pdev->neighbour_peers_added)
  1412. dp_rx_handle_ppdu_stats(soc, pdev, ppdu_info);
  1413. else if (dp_cfr_rcc_mode_status(pdev))
  1414. dp_rx_handle_cfr(soc, pdev, ppdu_info);
  1415. pdev->mon_ppdu_status = DP_PPDU_STATUS_DONE;
  1416. /*
  1417. * if chan_num is not fetched correctly from ppdu RX TLV,
  1418. * get it from pdev saved.
  1419. */
  1420. if (qdf_unlikely(pdev->ppdu_info.rx_status.chan_num == 0))
  1421. pdev->ppdu_info.rx_status.chan_num = pdev->mon_chan_num;
  1422. /*
  1423. * if chan_freq is not fetched correctly from ppdu RX TLV,
  1424. * get it from pdev saved.
  1425. */
  1426. if (qdf_unlikely(pdev->ppdu_info.rx_status.chan_freq == 0)) {
  1427. pdev->ppdu_info.rx_status.chan_freq =
  1428. pdev->mon_chan_freq;
  1429. }
  1430. if (qdf_unlikely(soc->full_mon_mode))
  1431. dp_rx_mon_process(soc, mac_id, quota);
  1432. else
  1433. dp_rx_mon_dest_process(soc, mac_id, quota);
  1434. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  1435. }
  1436. }
  1437. return;
  1438. }
  1439. /*
  1440. * dp_rx_mon_status_srng_process() - Process monitor status ring
  1441. * post the status ring buffer to Rx status Queue for later
  1442. * processing when status ring is filled with status TLV.
  1443. * Allocate a new buffer to status ring if the filled buffer
  1444. * is posted.
  1445. *
  1446. * @soc: core txrx main context
  1447. * @mac_id: mac_id which is one of 3 mac_ids
  1448. * @quota: No. of ring entry that can be serviced in one shot.
  1449. * Return: uint32_t: No. of ring entry that is processed.
  1450. */
  1451. static inline uint32_t
  1452. dp_rx_mon_status_srng_process(struct dp_soc *soc, uint32_t mac_id,
  1453. uint32_t quota)
  1454. {
  1455. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1456. hal_soc_handle_t hal_soc;
  1457. void *mon_status_srng;
  1458. void *rxdma_mon_status_ring_entry;
  1459. QDF_STATUS status;
  1460. uint32_t work_done = 0;
  1461. if (!pdev) {
  1462. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1463. "pdev is null for mac_id = %d", mac_id);
  1464. return work_done;
  1465. }
  1466. mon_status_srng = soc->rxdma_mon_status_ring[mac_id].hal_srng;
  1467. qdf_assert(mon_status_srng);
  1468. if (!mon_status_srng || !hal_srng_initialized(mon_status_srng)) {
  1469. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1470. "%s %d : HAL Monitor Status Ring Init Failed -- %pK",
  1471. __func__, __LINE__, mon_status_srng);
  1472. return work_done;
  1473. }
  1474. hal_soc = soc->hal_soc;
  1475. qdf_assert(hal_soc);
  1476. if (qdf_unlikely(hal_srng_access_start(hal_soc, mon_status_srng)))
  1477. goto done;
  1478. /* mon_status_ring_desc => WBM_BUFFER_RING STRUCT =>
  1479. * BUFFER_ADDR_INFO STRUCT
  1480. */
  1481. while (qdf_likely((rxdma_mon_status_ring_entry =
  1482. hal_srng_src_peek_n_get_next(hal_soc, mon_status_srng))
  1483. && quota--)) {
  1484. uint32_t rx_buf_cookie;
  1485. qdf_nbuf_t status_nbuf;
  1486. struct dp_rx_desc *rx_desc;
  1487. uint8_t *status_buf;
  1488. qdf_dma_addr_t paddr;
  1489. uint64_t buf_addr;
  1490. struct rx_desc_pool *rx_desc_pool;
  1491. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1492. buf_addr =
  1493. (HAL_RX_BUFFER_ADDR_31_0_GET(
  1494. rxdma_mon_status_ring_entry) |
  1495. ((uint64_t)(HAL_RX_BUFFER_ADDR_39_32_GET(
  1496. rxdma_mon_status_ring_entry)) << 32));
  1497. if (qdf_likely(buf_addr)) {
  1498. rx_buf_cookie =
  1499. HAL_RX_BUF_COOKIE_GET(
  1500. rxdma_mon_status_ring_entry);
  1501. rx_desc = dp_rx_cookie_2_va_mon_status(soc,
  1502. rx_buf_cookie);
  1503. qdf_assert(rx_desc);
  1504. status_nbuf = rx_desc->nbuf;
  1505. qdf_nbuf_sync_for_cpu(soc->osdev, status_nbuf,
  1506. QDF_DMA_FROM_DEVICE);
  1507. status_buf = qdf_nbuf_data(status_nbuf);
  1508. status = hal_get_rx_status_done(status_buf);
  1509. if (status != QDF_STATUS_SUCCESS) {
  1510. uint32_t hp, tp;
  1511. hal_get_sw_hptp(hal_soc, mon_status_srng,
  1512. &tp, &hp);
  1513. dp_info_rl("tlv tag status error hp:%u, tp:%u",
  1514. hp, tp);
  1515. pdev->rx_mon_stats.tlv_tag_status_err++;
  1516. /* RxDMA status done bit might not be set even
  1517. * though tp is moved by HW.
  1518. * So Hold on to current entry on
  1519. * monitor status ring
  1520. */
  1521. /* If done status is missing, hold onto status
  1522. * ring until status is done for this status
  1523. * ring buffer.
  1524. * Keep HP in mon_status_ring unchanged,
  1525. * and break from here.
  1526. * Check status for same buffer for next time
  1527. * dp_rx_mon_status_srng_process
  1528. */
  1529. break;
  1530. }
  1531. qdf_nbuf_set_pktlen(status_nbuf, RX_DATA_BUFFER_SIZE);
  1532. qdf_nbuf_unmap_nbytes_single(soc->osdev, status_nbuf,
  1533. QDF_DMA_FROM_DEVICE,
  1534. rx_desc_pool->buf_size);
  1535. /* Put the status_nbuf to queue */
  1536. qdf_nbuf_queue_add(&pdev->rx_status_q, status_nbuf);
  1537. } else {
  1538. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1539. union dp_rx_desc_list_elem_t *tail = NULL;
  1540. uint32_t num_alloc_desc;
  1541. num_alloc_desc = dp_rx_get_free_desc_list(soc, mac_id,
  1542. rx_desc_pool,
  1543. 1,
  1544. &desc_list,
  1545. &tail);
  1546. /*
  1547. * No free descriptors available
  1548. */
  1549. if (qdf_unlikely(num_alloc_desc == 0)) {
  1550. work_done++;
  1551. break;
  1552. }
  1553. rx_desc = &desc_list->rx_desc;
  1554. }
  1555. status_nbuf = dp_rx_nbuf_prepare(soc, pdev);
  1556. /*
  1557. * qdf_nbuf alloc or map failed,
  1558. * free the dp rx desc to free list,
  1559. * fill in NULL dma address at current HP entry,
  1560. * keep HP in mon_status_ring unchanged,
  1561. * wait next time dp_rx_mon_status_srng_process
  1562. * to fill in buffer at current HP.
  1563. */
  1564. if (qdf_unlikely(!status_nbuf)) {
  1565. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1566. union dp_rx_desc_list_elem_t *tail = NULL;
  1567. struct rx_desc_pool *rx_desc_pool;
  1568. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1569. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1570. "%s: fail to allocate or map qdf_nbuf",
  1571. __func__);
  1572. dp_rx_add_to_free_desc_list(&desc_list,
  1573. &tail, rx_desc);
  1574. dp_rx_add_desc_list_to_free_list(soc, &desc_list,
  1575. &tail, mac_id, rx_desc_pool);
  1576. hal_rxdma_buff_addr_info_set(
  1577. rxdma_mon_status_ring_entry,
  1578. 0, 0, HAL_RX_BUF_RBM_SW3_BM);
  1579. work_done++;
  1580. break;
  1581. }
  1582. paddr = qdf_nbuf_get_frag_paddr(status_nbuf, 0);
  1583. rx_desc->nbuf = status_nbuf;
  1584. rx_desc->in_use = 1;
  1585. hal_rxdma_buff_addr_info_set(rxdma_mon_status_ring_entry,
  1586. paddr, rx_desc->cookie, HAL_RX_BUF_RBM_SW3_BM);
  1587. hal_srng_src_get_next(hal_soc, mon_status_srng);
  1588. work_done++;
  1589. }
  1590. done:
  1591. hal_srng_access_end(hal_soc, mon_status_srng);
  1592. return work_done;
  1593. }
  1594. /*
  1595. * dp_rx_mon_status_process() - Process monitor status ring and
  1596. * TLV in status ring.
  1597. *
  1598. * @soc: core txrx main context
  1599. * @mac_id: mac_id which is one of 3 mac_ids
  1600. * @quota: No. of ring entry that can be serviced in one shot.
  1601. * Return: uint32_t: No. of ring entry that is processed.
  1602. */
  1603. static inline uint32_t
  1604. dp_rx_mon_status_process(struct dp_soc *soc, uint32_t mac_id, uint32_t quota) {
  1605. uint32_t work_done;
  1606. work_done = dp_rx_mon_status_srng_process(soc, mac_id, quota);
  1607. quota -= work_done;
  1608. dp_rx_mon_status_process_tlv(soc, mac_id, quota);
  1609. return work_done;
  1610. }
  1611. /**
  1612. * dp_mon_process() - Main monitor mode processing roution.
  1613. * This call monitor status ring process then monitor
  1614. * destination ring process.
  1615. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  1616. * @soc: core txrx main context
  1617. * @mac_id: mac_id which is one of 3 mac_ids
  1618. * @quota: No. of status ring entry that can be serviced in one shot.
  1619. * Return: uint32_t: No. of ring entry that is processed.
  1620. */
  1621. uint32_t
  1622. dp_mon_process(struct dp_soc *soc, uint32_t mac_id, uint32_t quota) {
  1623. return dp_rx_mon_status_process(soc, mac_id, quota);
  1624. }
  1625. /**
  1626. * dp_rx_pdev_mon_status_detach() - detach dp rx for status ring
  1627. * @pdev: core txrx pdev context
  1628. * @mac_id: mac_id/pdev_id correspondinggly for MCL and WIN
  1629. *
  1630. * This function will detach DP RX status ring from
  1631. * main device context. will free DP Rx resources for
  1632. * status ring
  1633. *
  1634. * Return: QDF_STATUS_SUCCESS: success
  1635. * QDF_STATUS_E_RESOURCES: Error return
  1636. */
  1637. QDF_STATUS
  1638. dp_rx_pdev_mon_status_detach(struct dp_pdev *pdev, int mac_id)
  1639. {
  1640. struct dp_soc *soc = pdev->soc;
  1641. struct rx_desc_pool *rx_desc_pool;
  1642. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1643. if (rx_desc_pool->pool_size != 0) {
  1644. if (!dp_is_soc_reinit(soc))
  1645. dp_rx_desc_nbuf_and_pool_free(soc, mac_id,
  1646. rx_desc_pool);
  1647. else
  1648. dp_rx_desc_nbuf_free(soc, rx_desc_pool);
  1649. }
  1650. return QDF_STATUS_SUCCESS;
  1651. }
  1652. /*
  1653. * dp_rx_buffers_replenish() - replenish monitor status ring with
  1654. * rx nbufs called during dp rx
  1655. * monitor status ring initialization
  1656. *
  1657. * @soc: core txrx main context
  1658. * @mac_id: mac_id which is one of 3 mac_ids
  1659. * @dp_rxdma_srng: dp monitor status circular ring
  1660. * @rx_desc_pool; Pointer to Rx descriptor pool
  1661. * @num_req_buffers: number of buffer to be replenished
  1662. * @desc_list: list of descs if called from dp rx monitor status
  1663. * process or NULL during dp rx initialization or
  1664. * out of buffer interrupt
  1665. * @tail: tail of descs list
  1666. * @owner: who owns the nbuf (host, NSS etc...)
  1667. * Return: return success or failure
  1668. */
  1669. static inline
  1670. QDF_STATUS dp_rx_mon_status_buffers_replenish(struct dp_soc *dp_soc,
  1671. uint32_t mac_id,
  1672. struct dp_srng *dp_rxdma_srng,
  1673. struct rx_desc_pool *rx_desc_pool,
  1674. uint32_t num_req_buffers,
  1675. union dp_rx_desc_list_elem_t **desc_list,
  1676. union dp_rx_desc_list_elem_t **tail,
  1677. uint8_t owner)
  1678. {
  1679. uint32_t num_alloc_desc;
  1680. uint16_t num_desc_to_free = 0;
  1681. uint32_t num_entries_avail;
  1682. uint32_t count = 0;
  1683. int sync_hw_ptr = 1;
  1684. qdf_dma_addr_t paddr;
  1685. qdf_nbuf_t rx_netbuf;
  1686. void *rxdma_ring_entry;
  1687. union dp_rx_desc_list_elem_t *next;
  1688. void *rxdma_srng;
  1689. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  1690. if (!dp_pdev) {
  1691. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1692. "pdev is null for mac_id = %d", mac_id);
  1693. return QDF_STATUS_E_FAILURE;
  1694. }
  1695. rxdma_srng = dp_rxdma_srng->hal_srng;
  1696. qdf_assert(rxdma_srng);
  1697. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1698. "[%s][%d] requested %d buffers for replenish",
  1699. __func__, __LINE__, num_req_buffers);
  1700. /*
  1701. * if desc_list is NULL, allocate the descs from freelist
  1702. */
  1703. if (!(*desc_list)) {
  1704. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  1705. rx_desc_pool,
  1706. num_req_buffers,
  1707. desc_list,
  1708. tail);
  1709. if (!num_alloc_desc) {
  1710. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1711. "[%s][%d] no free rx_descs in freelist",
  1712. __func__, __LINE__);
  1713. return QDF_STATUS_E_NOMEM;
  1714. }
  1715. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1716. "[%s][%d] %d rx desc allocated", __func__, __LINE__,
  1717. num_alloc_desc);
  1718. num_req_buffers = num_alloc_desc;
  1719. }
  1720. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  1721. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  1722. rxdma_srng, sync_hw_ptr);
  1723. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1724. "[%s][%d] no of available entries in rxdma ring: %d",
  1725. __func__, __LINE__, num_entries_avail);
  1726. if (num_entries_avail < num_req_buffers) {
  1727. num_desc_to_free = num_req_buffers - num_entries_avail;
  1728. num_req_buffers = num_entries_avail;
  1729. }
  1730. while (count <= num_req_buffers) {
  1731. rx_netbuf = dp_rx_nbuf_prepare(dp_soc, dp_pdev);
  1732. /*
  1733. * qdf_nbuf alloc or map failed,
  1734. * keep HP in mon_status_ring unchanged,
  1735. * wait dp_rx_mon_status_srng_process
  1736. * to fill in buffer at current HP.
  1737. */
  1738. if (qdf_unlikely(!rx_netbuf)) {
  1739. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1740. "%s: qdf_nbuf allocate or map fail, count %d",
  1741. __func__, count);
  1742. break;
  1743. }
  1744. paddr = qdf_nbuf_get_frag_paddr(rx_netbuf, 0);
  1745. next = (*desc_list)->next;
  1746. rxdma_ring_entry = hal_srng_src_get_cur_hp_n_move_next(
  1747. dp_soc->hal_soc,
  1748. rxdma_srng);
  1749. if (qdf_unlikely(!rxdma_ring_entry)) {
  1750. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1751. "[%s][%d] rxdma_ring_entry is NULL, count - %d",
  1752. __func__, __LINE__, count);
  1753. qdf_nbuf_unmap_nbytes_single(dp_soc->osdev, rx_netbuf,
  1754. QDF_DMA_FROM_DEVICE,
  1755. rx_desc_pool->buf_size);
  1756. qdf_nbuf_free(rx_netbuf);
  1757. break;
  1758. }
  1759. (*desc_list)->rx_desc.nbuf = rx_netbuf;
  1760. (*desc_list)->rx_desc.in_use = 1;
  1761. count++;
  1762. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  1763. (*desc_list)->rx_desc.cookie, owner);
  1764. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1765. "[%s][%d] rx_desc=%pK, cookie=%d, nbuf=%pK, \
  1766. paddr=%pK",
  1767. __func__, __LINE__, &(*desc_list)->rx_desc,
  1768. (*desc_list)->rx_desc.cookie, rx_netbuf,
  1769. (void *)paddr);
  1770. *desc_list = next;
  1771. }
  1772. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  1773. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1774. "successfully replenished %d buffers", num_req_buffers);
  1775. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1776. "%d rx desc added back to free list", num_desc_to_free);
  1777. /*
  1778. * add any available free desc back to the free list
  1779. */
  1780. if (*desc_list) {
  1781. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  1782. mac_id, rx_desc_pool);
  1783. }
  1784. return QDF_STATUS_SUCCESS;
  1785. }
  1786. /**
  1787. * dp_rx_pdev_mon_status_attach() - attach DP RX monitor status ring
  1788. * @pdev: core txrx pdev context
  1789. * @ring_id: ring number
  1790. * This function will attach a DP RX monitor status ring into pDEV
  1791. * and replenish monitor status ring with buffer.
  1792. *
  1793. * Return: QDF_STATUS_SUCCESS: success
  1794. * QDF_STATUS_E_RESOURCES: Error return
  1795. */
  1796. QDF_STATUS
  1797. dp_rx_pdev_mon_status_attach(struct dp_pdev *pdev, int ring_id) {
  1798. struct dp_soc *soc = pdev->soc;
  1799. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1800. union dp_rx_desc_list_elem_t *tail = NULL;
  1801. struct dp_srng *mon_status_ring;
  1802. uint32_t num_entries;
  1803. uint32_t i;
  1804. struct rx_desc_pool *rx_desc_pool;
  1805. QDF_STATUS status;
  1806. mon_status_ring = &soc->rxdma_mon_status_ring[ring_id];
  1807. num_entries = mon_status_ring->num_entries;
  1808. rx_desc_pool = &soc->rx_desc_status[ring_id];
  1809. dp_info("Mon RX Status Pool[%d] entries=%d",
  1810. ring_id, num_entries);
  1811. status = dp_rx_desc_pool_alloc(soc, ring_id, num_entries + 1,
  1812. rx_desc_pool);
  1813. if (!QDF_IS_STATUS_SUCCESS(status))
  1814. return status;
  1815. rx_desc_pool->buf_size = RX_DATA_BUFFER_SIZE;
  1816. rx_desc_pool->buf_alignment = RX_DATA_BUFFER_ALIGNMENT;
  1817. dp_debug("Mon RX Status Buffers Replenish ring_id=%d", ring_id);
  1818. status = dp_rx_mon_status_buffers_replenish(soc, ring_id,
  1819. mon_status_ring,
  1820. rx_desc_pool,
  1821. num_entries,
  1822. &desc_list, &tail,
  1823. HAL_RX_BUF_RBM_SW3_BM);
  1824. if (!QDF_IS_STATUS_SUCCESS(status))
  1825. return status;
  1826. qdf_nbuf_queue_init(&pdev->rx_status_q);
  1827. qdf_nbuf_queue_init(&pdev->rx_ppdu_buf_q);
  1828. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  1829. qdf_mem_zero(&(pdev->ppdu_info.rx_status),
  1830. sizeof(pdev->ppdu_info.rx_status));
  1831. qdf_mem_zero(&pdev->rx_mon_stats,
  1832. sizeof(pdev->rx_mon_stats));
  1833. dp_rx_mon_init_dbg_ppdu_stats(&pdev->ppdu_info,
  1834. &pdev->rx_mon_stats);
  1835. for (i = 0; i < MAX_MU_USERS; i++) {
  1836. qdf_nbuf_queue_init(&pdev->mpdu_q[i]);
  1837. pdev->is_mpdu_hdr[i] = true;
  1838. }
  1839. qdf_mem_zero(pdev->msdu_list, sizeof(pdev->msdu_list[MAX_MU_USERS]));
  1840. pdev->rx_enh_capture_mode = CDP_RX_ENH_CAPTURE_DISABLED;
  1841. return QDF_STATUS_SUCCESS;
  1842. }