dp_rx.c 77 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812
  1. /*
  2. * Copyright (c) 2016-2020 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_peer.h"
  22. #include "hal_rx.h"
  23. #include "hal_api.h"
  24. #include "qdf_nbuf.h"
  25. #ifdef MESH_MODE_SUPPORT
  26. #include "if_meta_hdr.h"
  27. #endif
  28. #include "dp_internal.h"
  29. #include "dp_rx_mon.h"
  30. #include "dp_ipa.h"
  31. #ifdef FEATURE_WDS
  32. #include "dp_txrx_wds.h"
  33. #endif
  34. #ifdef ATH_RX_PRI_SAVE
  35. #define DP_RX_TID_SAVE(_nbuf, _tid) \
  36. (qdf_nbuf_set_priority(_nbuf, _tid))
  37. #else
  38. #define DP_RX_TID_SAVE(_nbuf, _tid)
  39. #endif
  40. #ifdef DP_RX_DISABLE_NDI_MDNS_FORWARDING
  41. static inline
  42. bool dp_rx_check_ndi_mdns_fwding(struct dp_peer *ta_peer, qdf_nbuf_t nbuf)
  43. {
  44. if (ta_peer->vdev->opmode == wlan_op_mode_ndi &&
  45. qdf_nbuf_is_ipv6_mdns_pkt(nbuf)) {
  46. DP_STATS_INC(ta_peer, rx.intra_bss.mdns_no_fwd, 1);
  47. return false;
  48. }
  49. return true;
  50. }
  51. #else
  52. static inline
  53. bool dp_rx_check_ndi_mdns_fwding(struct dp_peer *ta_peer, qdf_nbuf_t nbuf)
  54. {
  55. return true;
  56. }
  57. #endif
  58. static inline bool dp_rx_check_ap_bridge(struct dp_vdev *vdev)
  59. {
  60. return vdev->ap_bridge_enabled;
  61. }
  62. #ifdef DUP_RX_DESC_WAR
  63. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  64. hal_ring_handle_t hal_ring,
  65. hal_ring_desc_t ring_desc,
  66. struct dp_rx_desc *rx_desc)
  67. {
  68. void *hal_soc = soc->hal_soc;
  69. hal_srng_dump_ring_desc(hal_soc, hal_ring, ring_desc);
  70. dp_rx_desc_dump(rx_desc);
  71. }
  72. #else
  73. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  74. hal_ring_handle_t hal_ring_hdl,
  75. hal_ring_desc_t ring_desc,
  76. struct dp_rx_desc *rx_desc)
  77. {
  78. hal_soc_handle_t hal_soc = soc->hal_soc;
  79. dp_rx_desc_dump(rx_desc);
  80. hal_srng_dump_ring_desc(hal_soc, hal_ring_hdl, ring_desc);
  81. hal_srng_dump_ring(hal_soc, hal_ring_hdl);
  82. qdf_assert_always(0);
  83. }
  84. #endif
  85. #ifdef RX_DESC_SANITY_WAR
  86. static inline
  87. QDF_STATUS dp_rx_desc_sanity(struct dp_soc *soc, hal_soc_handle_t hal_soc,
  88. hal_ring_handle_t hal_ring_hdl,
  89. hal_ring_desc_t ring_desc,
  90. struct dp_rx_desc *rx_desc)
  91. {
  92. uint8_t return_buffer_manager;
  93. if (qdf_unlikely(!rx_desc)) {
  94. /*
  95. * This is an unlikely case where the cookie obtained
  96. * from the ring_desc is invalid and hence we are not
  97. * able to find the corresponding rx_desc
  98. */
  99. goto fail;
  100. }
  101. return_buffer_manager = hal_rx_ret_buf_manager_get(ring_desc);
  102. if (qdf_unlikely(!(return_buffer_manager == HAL_RX_BUF_RBM_SW1_BM ||
  103. return_buffer_manager == HAL_RX_BUF_RBM_SW3_BM))) {
  104. goto fail;
  105. }
  106. return QDF_STATUS_SUCCESS;
  107. fail:
  108. DP_STATS_INC(soc, rx.err.invalid_cookie, 1);
  109. dp_err("Ring Desc:");
  110. hal_srng_dump_ring_desc(hal_soc, hal_ring_hdl,
  111. ring_desc);
  112. return QDF_STATUS_E_NULL_VALUE;
  113. }
  114. #else
  115. static inline
  116. QDF_STATUS dp_rx_desc_sanity(struct dp_soc *soc, hal_soc_handle_t hal_soc,
  117. hal_ring_handle_t hal_ring_hdl,
  118. hal_ring_desc_t ring_desc,
  119. struct dp_rx_desc *rx_desc)
  120. {
  121. return QDF_STATUS_SUCCESS;
  122. }
  123. #endif
  124. /*
  125. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  126. * called during dp rx initialization
  127. * and at the end of dp_rx_process.
  128. *
  129. * @soc: core txrx main context
  130. * @mac_id: mac_id which is one of 3 mac_ids
  131. * @dp_rxdma_srng: dp rxdma circular ring
  132. * @rx_desc_pool: Pointer to free Rx descriptor pool
  133. * @num_req_buffers: number of buffer to be replenished
  134. * @desc_list: list of descs if called from dp_rx_process
  135. * or NULL during dp rx initialization or out of buffer
  136. * interrupt.
  137. * @tail: tail of descs list
  138. * Return: return success or failure
  139. */
  140. QDF_STATUS dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  141. struct dp_srng *dp_rxdma_srng,
  142. struct rx_desc_pool *rx_desc_pool,
  143. uint32_t num_req_buffers,
  144. union dp_rx_desc_list_elem_t **desc_list,
  145. union dp_rx_desc_list_elem_t **tail)
  146. {
  147. uint32_t num_alloc_desc;
  148. uint16_t num_desc_to_free = 0;
  149. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  150. uint32_t num_entries_avail;
  151. uint32_t count;
  152. int sync_hw_ptr = 1;
  153. qdf_dma_addr_t paddr;
  154. qdf_nbuf_t rx_netbuf;
  155. void *rxdma_ring_entry;
  156. union dp_rx_desc_list_elem_t *next;
  157. QDF_STATUS ret;
  158. uint16_t buf_size = rx_desc_pool->buf_size;
  159. uint8_t buf_alignment = rx_desc_pool->buf_alignment;
  160. void *rxdma_srng;
  161. rxdma_srng = dp_rxdma_srng->hal_srng;
  162. if (!rxdma_srng) {
  163. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  164. "rxdma srng not initialized");
  165. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  166. return QDF_STATUS_E_FAILURE;
  167. }
  168. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  169. "requested %d buffers for replenish", num_req_buffers);
  170. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  171. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  172. rxdma_srng,
  173. sync_hw_ptr);
  174. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  175. "no of available entries in rxdma ring: %d",
  176. num_entries_avail);
  177. if (!(*desc_list) && (num_entries_avail >
  178. ((dp_rxdma_srng->num_entries * 3) / 4))) {
  179. num_req_buffers = num_entries_avail;
  180. } else if (num_entries_avail < num_req_buffers) {
  181. num_desc_to_free = num_req_buffers - num_entries_avail;
  182. num_req_buffers = num_entries_avail;
  183. }
  184. if (qdf_unlikely(!num_req_buffers)) {
  185. num_desc_to_free = num_req_buffers;
  186. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  187. goto free_descs;
  188. }
  189. /*
  190. * if desc_list is NULL, allocate the descs from freelist
  191. */
  192. if (!(*desc_list)) {
  193. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  194. rx_desc_pool,
  195. num_req_buffers,
  196. desc_list,
  197. tail);
  198. if (!num_alloc_desc) {
  199. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  200. "no free rx_descs in freelist");
  201. DP_STATS_INC(dp_pdev, err.desc_alloc_fail,
  202. num_req_buffers);
  203. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  204. return QDF_STATUS_E_NOMEM;
  205. }
  206. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  207. "%d rx desc allocated", num_alloc_desc);
  208. num_req_buffers = num_alloc_desc;
  209. }
  210. count = 0;
  211. while (count < num_req_buffers) {
  212. rx_netbuf = qdf_nbuf_alloc(dp_soc->osdev,
  213. buf_size,
  214. RX_BUFFER_RESERVATION,
  215. buf_alignment,
  216. FALSE);
  217. if (qdf_unlikely(!rx_netbuf)) {
  218. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  219. break;
  220. }
  221. ret = qdf_nbuf_map_nbytes_single(dp_soc->osdev, rx_netbuf,
  222. QDF_DMA_FROM_DEVICE, buf_size);
  223. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  224. qdf_nbuf_free(rx_netbuf);
  225. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  226. continue;
  227. }
  228. paddr = qdf_nbuf_get_frag_paddr(rx_netbuf, 0);
  229. dp_ipa_handle_rx_buf_smmu_mapping(dp_soc, rx_netbuf, true);
  230. /*
  231. * check if the physical address of nbuf->data is
  232. * less then 0x50000000 then free the nbuf and try
  233. * allocating new nbuf. We can try for 100 times.
  234. * this is a temp WAR till we fix it properly.
  235. */
  236. ret = check_x86_paddr(dp_soc, &rx_netbuf, &paddr, rx_desc_pool);
  237. if (ret == QDF_STATUS_E_FAILURE) {
  238. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  239. break;
  240. }
  241. count++;
  242. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  243. rxdma_srng);
  244. qdf_assert_always(rxdma_ring_entry);
  245. next = (*desc_list)->next;
  246. dp_rx_desc_prep(&((*desc_list)->rx_desc), rx_netbuf);
  247. /* rx_desc.in_use should be zero at this time*/
  248. qdf_assert_always((*desc_list)->rx_desc.in_use == 0);
  249. (*desc_list)->rx_desc.in_use = 1;
  250. dp_verbose_debug("rx_netbuf=%pK, buf=%pK, paddr=0x%llx, cookie=%d",
  251. rx_netbuf, qdf_nbuf_data(rx_netbuf),
  252. (unsigned long long)paddr,
  253. (*desc_list)->rx_desc.cookie);
  254. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  255. (*desc_list)->rx_desc.cookie,
  256. rx_desc_pool->owner);
  257. *desc_list = next;
  258. }
  259. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  260. dp_verbose_debug("replenished buffers %d, rx desc added back to free list %u",
  261. count, num_desc_to_free);
  262. /* No need to count the number of bytes received during replenish.
  263. * Therefore set replenish.pkts.bytes as 0.
  264. */
  265. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  266. free_descs:
  267. DP_STATS_INC(dp_pdev, buf_freelist, num_desc_to_free);
  268. /*
  269. * add any available free desc back to the free list
  270. */
  271. if (*desc_list)
  272. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  273. mac_id, rx_desc_pool);
  274. return QDF_STATUS_SUCCESS;
  275. }
  276. /*
  277. * dp_rx_deliver_raw() - process RAW mode pkts and hand over the
  278. * pkts to RAW mode simulation to
  279. * decapsulate the pkt.
  280. *
  281. * @vdev: vdev on which RAW mode is enabled
  282. * @nbuf_list: list of RAW pkts to process
  283. * @peer: peer object from which the pkt is rx
  284. *
  285. * Return: void
  286. */
  287. void
  288. dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  289. struct dp_peer *peer)
  290. {
  291. qdf_nbuf_t deliver_list_head = NULL;
  292. qdf_nbuf_t deliver_list_tail = NULL;
  293. qdf_nbuf_t nbuf;
  294. nbuf = nbuf_list;
  295. while (nbuf) {
  296. qdf_nbuf_t next = qdf_nbuf_next(nbuf);
  297. DP_RX_LIST_APPEND(deliver_list_head, deliver_list_tail, nbuf);
  298. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  299. DP_STATS_INC_PKT(peer, rx.raw, 1, qdf_nbuf_len(nbuf));
  300. /*
  301. * reset the chfrag_start and chfrag_end bits in nbuf cb
  302. * as this is a non-amsdu pkt and RAW mode simulation expects
  303. * these bit s to be 0 for non-amsdu pkt.
  304. */
  305. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  306. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  307. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  308. qdf_nbuf_set_rx_chfrag_end(nbuf, 0);
  309. }
  310. nbuf = next;
  311. }
  312. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &deliver_list_head,
  313. &deliver_list_tail, peer->mac_addr.raw);
  314. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  315. }
  316. #ifdef DP_LFR
  317. /*
  318. * In case of LFR, data of a new peer might be sent up
  319. * even before peer is added.
  320. */
  321. static inline struct dp_vdev *
  322. dp_get_vdev_from_peer(struct dp_soc *soc,
  323. uint16_t peer_id,
  324. struct dp_peer *peer,
  325. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  326. {
  327. struct dp_vdev *vdev;
  328. uint8_t vdev_id;
  329. if (unlikely(!peer)) {
  330. if (peer_id != HTT_INVALID_PEER) {
  331. vdev_id = DP_PEER_METADATA_VDEV_ID_GET(
  332. mpdu_desc_info.peer_meta_data);
  333. QDF_TRACE(QDF_MODULE_ID_DP,
  334. QDF_TRACE_LEVEL_DEBUG,
  335. FL("PeerID %d not found use vdevID %d"),
  336. peer_id, vdev_id);
  337. vdev = dp_get_vdev_from_soc_vdev_id_wifi3(soc,
  338. vdev_id);
  339. } else {
  340. QDF_TRACE(QDF_MODULE_ID_DP,
  341. QDF_TRACE_LEVEL_DEBUG,
  342. FL("Invalid PeerID %d"),
  343. peer_id);
  344. return NULL;
  345. }
  346. } else {
  347. vdev = peer->vdev;
  348. }
  349. return vdev;
  350. }
  351. #else
  352. static inline struct dp_vdev *
  353. dp_get_vdev_from_peer(struct dp_soc *soc,
  354. uint16_t peer_id,
  355. struct dp_peer *peer,
  356. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  357. {
  358. if (unlikely(!peer)) {
  359. QDF_TRACE(QDF_MODULE_ID_DP,
  360. QDF_TRACE_LEVEL_DEBUG,
  361. FL("Peer not found for peerID %d"),
  362. peer_id);
  363. return NULL;
  364. } else {
  365. return peer->vdev;
  366. }
  367. }
  368. #endif
  369. #ifndef FEATURE_WDS
  370. static void
  371. dp_rx_da_learn(struct dp_soc *soc,
  372. uint8_t *rx_tlv_hdr,
  373. struct dp_peer *ta_peer,
  374. qdf_nbuf_t nbuf)
  375. {
  376. }
  377. #endif
  378. /*
  379. * dp_rx_intrabss_fwd() - Implements the Intra-BSS forwarding logic
  380. *
  381. * @soc: core txrx main context
  382. * @ta_peer : source peer entry
  383. * @rx_tlv_hdr : start address of rx tlvs
  384. * @nbuf : nbuf that has to be intrabss forwarded
  385. *
  386. * Return: bool: true if it is forwarded else false
  387. */
  388. static bool
  389. dp_rx_intrabss_fwd(struct dp_soc *soc,
  390. struct dp_peer *ta_peer,
  391. uint8_t *rx_tlv_hdr,
  392. qdf_nbuf_t nbuf,
  393. struct hal_rx_msdu_metadata msdu_metadata)
  394. {
  395. uint16_t len;
  396. uint8_t is_frag;
  397. struct dp_peer *da_peer;
  398. struct dp_ast_entry *ast_entry;
  399. qdf_nbuf_t nbuf_copy;
  400. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  401. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  402. struct cdp_tid_rx_stats *tid_stats = &ta_peer->vdev->pdev->stats.
  403. tid_stats.tid_rx_stats[ring_id][tid];
  404. /* check if the destination peer is available in peer table
  405. * and also check if the source peer and destination peer
  406. * belong to the same vap and destination peer is not bss peer.
  407. */
  408. if ((qdf_nbuf_is_da_valid(nbuf) && !qdf_nbuf_is_da_mcbc(nbuf))) {
  409. ast_entry = soc->ast_table[msdu_metadata.da_idx];
  410. if (!ast_entry)
  411. return false;
  412. if (ast_entry->type == CDP_TXRX_AST_TYPE_DA) {
  413. ast_entry->is_active = TRUE;
  414. return false;
  415. }
  416. da_peer = ast_entry->peer;
  417. if (!da_peer)
  418. return false;
  419. /* TA peer cannot be same as peer(DA) on which AST is present
  420. * this indicates a change in topology and that AST entries
  421. * are yet to be updated.
  422. */
  423. if (da_peer == ta_peer)
  424. return false;
  425. if (da_peer->vdev == ta_peer->vdev && !da_peer->bss_peer) {
  426. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  427. is_frag = qdf_nbuf_is_frag(nbuf);
  428. memset(nbuf->cb, 0x0, sizeof(nbuf->cb));
  429. /* linearize the nbuf just before we send to
  430. * dp_tx_send()
  431. */
  432. if (qdf_unlikely(is_frag)) {
  433. if (qdf_nbuf_linearize(nbuf) == -ENOMEM)
  434. return false;
  435. nbuf = qdf_nbuf_unshare(nbuf);
  436. if (!nbuf) {
  437. DP_STATS_INC_PKT(ta_peer,
  438. rx.intra_bss.fail,
  439. 1,
  440. len);
  441. /* return true even though the pkt is
  442. * not forwarded. Basically skb_unshare
  443. * failed and we want to continue with
  444. * next nbuf.
  445. */
  446. tid_stats->fail_cnt[INTRABSS_DROP]++;
  447. return true;
  448. }
  449. }
  450. if (!dp_tx_send((struct cdp_soc_t *)soc,
  451. ta_peer->vdev->vdev_id, nbuf)) {
  452. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1,
  453. len);
  454. return true;
  455. } else {
  456. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1,
  457. len);
  458. tid_stats->fail_cnt[INTRABSS_DROP]++;
  459. return false;
  460. }
  461. }
  462. }
  463. /* if it is a broadcast pkt (eg: ARP) and it is not its own
  464. * source, then clone the pkt and send the cloned pkt for
  465. * intra BSS forwarding and original pkt up the network stack
  466. * Note: how do we handle multicast pkts. do we forward
  467. * all multicast pkts as is or let a higher layer module
  468. * like igmpsnoop decide whether to forward or not with
  469. * Mcast enhancement.
  470. */
  471. else if (qdf_unlikely((qdf_nbuf_is_da_mcbc(nbuf) &&
  472. !ta_peer->bss_peer))) {
  473. if (!dp_rx_check_ndi_mdns_fwding(ta_peer, nbuf))
  474. goto end;
  475. nbuf_copy = qdf_nbuf_copy(nbuf);
  476. if (!nbuf_copy)
  477. goto end;
  478. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  479. memset(nbuf_copy->cb, 0x0, sizeof(nbuf_copy->cb));
  480. /* Set cb->ftype to intrabss FWD */
  481. qdf_nbuf_set_tx_ftype(nbuf_copy, CB_FTYPE_INTRABSS_FWD);
  482. if (dp_tx_send((struct cdp_soc_t *)soc,
  483. ta_peer->vdev->vdev_id, nbuf_copy)) {
  484. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1, len);
  485. tid_stats->fail_cnt[INTRABSS_DROP]++;
  486. qdf_nbuf_free(nbuf_copy);
  487. } else {
  488. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1, len);
  489. tid_stats->intrabss_cnt++;
  490. }
  491. }
  492. end:
  493. /* return false as we have to still send the original pkt
  494. * up the stack
  495. */
  496. return false;
  497. }
  498. #ifdef MESH_MODE_SUPPORT
  499. /**
  500. * dp_rx_fill_mesh_stats() - Fills the mesh per packet receive stats
  501. *
  502. * @vdev: DP Virtual device handle
  503. * @nbuf: Buffer pointer
  504. * @rx_tlv_hdr: start of rx tlv header
  505. * @peer: pointer to peer
  506. *
  507. * This function allocated memory for mesh receive stats and fill the
  508. * required stats. Stores the memory address in skb cb.
  509. *
  510. * Return: void
  511. */
  512. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  513. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  514. {
  515. struct mesh_recv_hdr_s *rx_info = NULL;
  516. uint32_t pkt_type;
  517. uint32_t nss;
  518. uint32_t rate_mcs;
  519. uint32_t bw;
  520. uint8_t primary_chan_num;
  521. uint32_t center_chan_freq;
  522. struct dp_soc *soc;
  523. /* fill recv mesh stats */
  524. rx_info = qdf_mem_malloc(sizeof(struct mesh_recv_hdr_s));
  525. /* upper layers are resposible to free this memory */
  526. if (!rx_info) {
  527. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  528. "Memory allocation failed for mesh rx stats");
  529. DP_STATS_INC(vdev->pdev, mesh_mem_alloc, 1);
  530. return;
  531. }
  532. rx_info->rs_flags = MESH_RXHDR_VER1;
  533. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  534. rx_info->rs_flags |= MESH_RX_FIRST_MSDU;
  535. if (qdf_nbuf_is_rx_chfrag_end(nbuf))
  536. rx_info->rs_flags |= MESH_RX_LAST_MSDU;
  537. if (hal_rx_attn_msdu_get_is_decrypted(rx_tlv_hdr)) {
  538. rx_info->rs_flags |= MESH_RX_DECRYPTED;
  539. rx_info->rs_keyix = hal_rx_msdu_get_keyid(rx_tlv_hdr);
  540. if (vdev->osif_get_key)
  541. vdev->osif_get_key(vdev->osif_vdev,
  542. &rx_info->rs_decryptkey[0],
  543. &peer->mac_addr.raw[0],
  544. rx_info->rs_keyix);
  545. }
  546. rx_info->rs_rssi = hal_rx_msdu_start_get_rssi(rx_tlv_hdr);
  547. soc = vdev->pdev->soc;
  548. primary_chan_num = hal_rx_msdu_start_get_freq(rx_tlv_hdr);
  549. center_chan_freq = hal_rx_msdu_start_get_freq(rx_tlv_hdr) >> 16;
  550. if (soc->cdp_soc.ol_ops && soc->cdp_soc.ol_ops->freq_to_band) {
  551. rx_info->rs_band = soc->cdp_soc.ol_ops->freq_to_band(
  552. soc->ctrl_psoc,
  553. vdev->pdev->pdev_id,
  554. center_chan_freq);
  555. }
  556. rx_info->rs_channel = primary_chan_num;
  557. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  558. rate_mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  559. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  560. nss = hal_rx_msdu_start_nss_get(vdev->pdev->soc->hal_soc, rx_tlv_hdr);
  561. rx_info->rs_ratephy1 = rate_mcs | (nss << 0x8) | (pkt_type << 16) |
  562. (bw << 24);
  563. qdf_nbuf_set_rx_fctx_type(nbuf, (void *)rx_info, CB_FTYPE_MESH_RX_INFO);
  564. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_MED,
  565. FL("Mesh rx stats: flags %x, rssi %x, chn %x, rate %x, kix %x"),
  566. rx_info->rs_flags,
  567. rx_info->rs_rssi,
  568. rx_info->rs_channel,
  569. rx_info->rs_ratephy1,
  570. rx_info->rs_keyix);
  571. }
  572. /**
  573. * dp_rx_filter_mesh_packets() - Filters mesh unwanted packets
  574. *
  575. * @vdev: DP Virtual device handle
  576. * @nbuf: Buffer pointer
  577. * @rx_tlv_hdr: start of rx tlv header
  578. *
  579. * This checks if the received packet is matching any filter out
  580. * catogery and and drop the packet if it matches.
  581. *
  582. * Return: status(0 indicates drop, 1 indicate to no drop)
  583. */
  584. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  585. uint8_t *rx_tlv_hdr)
  586. {
  587. union dp_align_mac_addr mac_addr;
  588. struct dp_soc *soc = vdev->pdev->soc;
  589. if (qdf_unlikely(vdev->mesh_rx_filter)) {
  590. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_FROMDS)
  591. if (hal_rx_mpdu_get_fr_ds(soc->hal_soc,
  592. rx_tlv_hdr))
  593. return QDF_STATUS_SUCCESS;
  594. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TODS)
  595. if (hal_rx_mpdu_get_to_ds(soc->hal_soc,
  596. rx_tlv_hdr))
  597. return QDF_STATUS_SUCCESS;
  598. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_NODS)
  599. if (!hal_rx_mpdu_get_fr_ds(soc->hal_soc,
  600. rx_tlv_hdr) &&
  601. !hal_rx_mpdu_get_to_ds(soc->hal_soc,
  602. rx_tlv_hdr))
  603. return QDF_STATUS_SUCCESS;
  604. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_RA) {
  605. if (hal_rx_mpdu_get_addr1(soc->hal_soc,
  606. rx_tlv_hdr,
  607. &mac_addr.raw[0]))
  608. return QDF_STATUS_E_FAILURE;
  609. if (!qdf_mem_cmp(&mac_addr.raw[0],
  610. &vdev->mac_addr.raw[0],
  611. QDF_MAC_ADDR_SIZE))
  612. return QDF_STATUS_SUCCESS;
  613. }
  614. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TA) {
  615. if (hal_rx_mpdu_get_addr2(soc->hal_soc,
  616. rx_tlv_hdr,
  617. &mac_addr.raw[0]))
  618. return QDF_STATUS_E_FAILURE;
  619. if (!qdf_mem_cmp(&mac_addr.raw[0],
  620. &vdev->mac_addr.raw[0],
  621. QDF_MAC_ADDR_SIZE))
  622. return QDF_STATUS_SUCCESS;
  623. }
  624. }
  625. return QDF_STATUS_E_FAILURE;
  626. }
  627. #else
  628. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  629. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  630. {
  631. }
  632. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  633. uint8_t *rx_tlv_hdr)
  634. {
  635. return QDF_STATUS_E_FAILURE;
  636. }
  637. #endif
  638. #ifdef FEATURE_NAC_RSSI
  639. /**
  640. * dp_rx_nac_filter(): Function to perform filtering of non-associated
  641. * clients
  642. * @pdev: DP pdev handle
  643. * @rx_pkt_hdr: Rx packet Header
  644. *
  645. * return: dp_vdev*
  646. */
  647. static
  648. struct dp_vdev *dp_rx_nac_filter(struct dp_pdev *pdev,
  649. uint8_t *rx_pkt_hdr)
  650. {
  651. struct ieee80211_frame *wh;
  652. struct dp_neighbour_peer *peer = NULL;
  653. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  654. if ((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) != IEEE80211_FC1_DIR_TODS)
  655. return NULL;
  656. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  657. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  658. neighbour_peer_list_elem) {
  659. if (qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  660. wh->i_addr2, QDF_MAC_ADDR_SIZE) == 0) {
  661. QDF_TRACE(
  662. QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  663. FL("NAC configuration matched for mac-%2x:%2x:%2x:%2x:%2x:%2x"),
  664. peer->neighbour_peers_macaddr.raw[0],
  665. peer->neighbour_peers_macaddr.raw[1],
  666. peer->neighbour_peers_macaddr.raw[2],
  667. peer->neighbour_peers_macaddr.raw[3],
  668. peer->neighbour_peers_macaddr.raw[4],
  669. peer->neighbour_peers_macaddr.raw[5]);
  670. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  671. return pdev->monitor_vdev;
  672. }
  673. }
  674. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  675. return NULL;
  676. }
  677. /**
  678. * dp_rx_process_invalid_peer(): Function to pass invalid peer list to umac
  679. * @soc: DP SOC handle
  680. * @mpdu: mpdu for which peer is invalid
  681. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  682. * pool_id has same mapping)
  683. *
  684. * return: integer type
  685. */
  686. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  687. uint8_t mac_id)
  688. {
  689. struct dp_invalid_peer_msg msg;
  690. struct dp_vdev *vdev = NULL;
  691. struct dp_pdev *pdev = NULL;
  692. struct ieee80211_frame *wh;
  693. qdf_nbuf_t curr_nbuf, next_nbuf;
  694. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  695. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  696. rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  697. if (!HAL_IS_DECAP_FORMAT_RAW(soc->hal_soc, rx_tlv_hdr)) {
  698. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  699. "Drop decapped frames");
  700. goto free;
  701. }
  702. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  703. if (!DP_FRAME_IS_DATA(wh)) {
  704. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  705. "NAWDS valid only for data frames");
  706. goto free;
  707. }
  708. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  709. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  710. "Invalid nbuf length");
  711. goto free;
  712. }
  713. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  714. if (!pdev || qdf_unlikely(pdev->is_pdev_down)) {
  715. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  716. "PDEV %s", !pdev ? "not found" : "down");
  717. goto free;
  718. }
  719. if (pdev->filter_neighbour_peers) {
  720. /* Next Hop scenario not yet handle */
  721. vdev = dp_rx_nac_filter(pdev, rx_pkt_hdr);
  722. if (vdev) {
  723. dp_rx_mon_deliver(soc, pdev->pdev_id,
  724. pdev->invalid_peer_head_msdu,
  725. pdev->invalid_peer_tail_msdu);
  726. pdev->invalid_peer_head_msdu = NULL;
  727. pdev->invalid_peer_tail_msdu = NULL;
  728. return 0;
  729. }
  730. }
  731. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  732. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  733. QDF_MAC_ADDR_SIZE) == 0) {
  734. goto out;
  735. }
  736. }
  737. if (!vdev) {
  738. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  739. "VDEV not found");
  740. goto free;
  741. }
  742. out:
  743. msg.wh = wh;
  744. qdf_nbuf_pull_head(mpdu, RX_PKT_TLVS_LEN);
  745. msg.nbuf = mpdu;
  746. msg.vdev_id = vdev->vdev_id;
  747. if (pdev->soc->cdp_soc.ol_ops->rx_invalid_peer)
  748. pdev->soc->cdp_soc.ol_ops->rx_invalid_peer(
  749. (struct cdp_ctrl_objmgr_psoc *)soc->ctrl_psoc,
  750. pdev->pdev_id, &msg);
  751. free:
  752. /* Drop and free packet */
  753. curr_nbuf = mpdu;
  754. while (curr_nbuf) {
  755. next_nbuf = qdf_nbuf_next(curr_nbuf);
  756. qdf_nbuf_free(curr_nbuf);
  757. curr_nbuf = next_nbuf;
  758. }
  759. return 0;
  760. }
  761. /**
  762. * dp_rx_process_invalid_peer_wrapper(): Function to wrap invalid peer handler
  763. * @soc: DP SOC handle
  764. * @mpdu: mpdu for which peer is invalid
  765. * @mpdu_done: if an mpdu is completed
  766. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  767. * pool_id has same mapping)
  768. *
  769. * return: integer type
  770. */
  771. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  772. qdf_nbuf_t mpdu, bool mpdu_done,
  773. uint8_t mac_id)
  774. {
  775. /* Only trigger the process when mpdu is completed */
  776. if (mpdu_done)
  777. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  778. }
  779. #else
  780. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  781. uint8_t mac_id)
  782. {
  783. qdf_nbuf_t curr_nbuf, next_nbuf;
  784. struct dp_pdev *pdev;
  785. struct dp_vdev *vdev = NULL;
  786. struct ieee80211_frame *wh;
  787. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  788. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  789. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  790. if (!DP_FRAME_IS_DATA(wh)) {
  791. QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP,
  792. "only for data frames");
  793. goto free;
  794. }
  795. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  796. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  797. "Invalid nbuf length");
  798. goto free;
  799. }
  800. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  801. if (!pdev) {
  802. QDF_TRACE(QDF_MODULE_ID_DP,
  803. QDF_TRACE_LEVEL_ERROR,
  804. "PDEV not found");
  805. goto free;
  806. }
  807. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  808. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  809. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  810. QDF_MAC_ADDR_SIZE) == 0) {
  811. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  812. goto out;
  813. }
  814. }
  815. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  816. if (!vdev) {
  817. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  818. "VDEV not found");
  819. goto free;
  820. }
  821. out:
  822. if (soc->cdp_soc.ol_ops->rx_invalid_peer)
  823. soc->cdp_soc.ol_ops->rx_invalid_peer(vdev->vdev_id, wh);
  824. free:
  825. /* reset the head and tail pointers */
  826. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  827. if (pdev) {
  828. pdev->invalid_peer_head_msdu = NULL;
  829. pdev->invalid_peer_tail_msdu = NULL;
  830. }
  831. /* Drop and free packet */
  832. curr_nbuf = mpdu;
  833. while (curr_nbuf) {
  834. next_nbuf = qdf_nbuf_next(curr_nbuf);
  835. qdf_nbuf_free(curr_nbuf);
  836. curr_nbuf = next_nbuf;
  837. }
  838. /* Reset the head and tail pointers */
  839. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  840. if (pdev) {
  841. pdev->invalid_peer_head_msdu = NULL;
  842. pdev->invalid_peer_tail_msdu = NULL;
  843. }
  844. return 0;
  845. }
  846. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  847. qdf_nbuf_t mpdu, bool mpdu_done,
  848. uint8_t mac_id)
  849. {
  850. /* Process the nbuf */
  851. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  852. }
  853. #endif
  854. #ifdef RECEIVE_OFFLOAD
  855. /**
  856. * dp_rx_print_offload_info() - Print offload info from RX TLV
  857. * @soc: dp soc handle
  858. * @rx_tlv: RX TLV for which offload information is to be printed
  859. *
  860. * Return: None
  861. */
  862. static void dp_rx_print_offload_info(struct dp_soc *soc, uint8_t *rx_tlv)
  863. {
  864. dp_verbose_debug("----------------------RX DESC LRO/GRO----------------------");
  865. dp_verbose_debug("lro_eligible 0x%x", HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv));
  866. dp_verbose_debug("pure_ack 0x%x", HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv));
  867. dp_verbose_debug("chksum 0x%x", hal_rx_tlv_get_tcp_chksum(soc->hal_soc,
  868. rx_tlv));
  869. dp_verbose_debug("TCP seq num 0x%x", HAL_RX_TLV_GET_TCP_SEQ(rx_tlv));
  870. dp_verbose_debug("TCP ack num 0x%x", HAL_RX_TLV_GET_TCP_ACK(rx_tlv));
  871. dp_verbose_debug("TCP window 0x%x", HAL_RX_TLV_GET_TCP_WIN(rx_tlv));
  872. dp_verbose_debug("TCP protocol 0x%x", HAL_RX_TLV_GET_TCP_PROTO(rx_tlv));
  873. dp_verbose_debug("TCP offset 0x%x", HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv));
  874. dp_verbose_debug("toeplitz 0x%x", HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv));
  875. dp_verbose_debug("---------------------------------------------------------");
  876. }
  877. /**
  878. * dp_rx_fill_gro_info() - Fill GRO info from RX TLV into skb->cb
  879. * @soc: DP SOC handle
  880. * @rx_tlv: RX TLV received for the msdu
  881. * @msdu: msdu for which GRO info needs to be filled
  882. * @rx_ol_pkt_cnt: counter to be incremented for GRO eligible packets
  883. *
  884. * Return: None
  885. */
  886. static
  887. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  888. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt)
  889. {
  890. if (!wlan_cfg_is_gro_enabled(soc->wlan_cfg_ctx))
  891. return;
  892. /* Filling up RX offload info only for TCP packets */
  893. if (!HAL_RX_TLV_GET_TCP_PROTO(rx_tlv))
  894. return;
  895. *rx_ol_pkt_cnt = *rx_ol_pkt_cnt + 1;
  896. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) =
  897. HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv);
  898. QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu) =
  899. HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv);
  900. QDF_NBUF_CB_RX_TCP_CHKSUM(msdu) =
  901. hal_rx_tlv_get_tcp_chksum(soc->hal_soc,
  902. rx_tlv);
  903. QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu) =
  904. HAL_RX_TLV_GET_TCP_SEQ(rx_tlv);
  905. QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu) =
  906. HAL_RX_TLV_GET_TCP_ACK(rx_tlv);
  907. QDF_NBUF_CB_RX_TCP_WIN(msdu) =
  908. HAL_RX_TLV_GET_TCP_WIN(rx_tlv);
  909. QDF_NBUF_CB_RX_TCP_PROTO(msdu) =
  910. HAL_RX_TLV_GET_TCP_PROTO(rx_tlv);
  911. QDF_NBUF_CB_RX_IPV6_PROTO(msdu) =
  912. HAL_RX_TLV_GET_IPV6(rx_tlv);
  913. QDF_NBUF_CB_RX_TCP_OFFSET(msdu) =
  914. HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv);
  915. QDF_NBUF_CB_RX_FLOW_ID(msdu) =
  916. HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv);
  917. dp_rx_print_offload_info(soc, rx_tlv);
  918. }
  919. #else
  920. static void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  921. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt)
  922. {
  923. }
  924. #endif /* RECEIVE_OFFLOAD */
  925. /**
  926. * dp_rx_adjust_nbuf_len() - set appropriate msdu length in nbuf.
  927. *
  928. * @nbuf: pointer to msdu.
  929. * @mpdu_len: mpdu length
  930. *
  931. * Return: returns true if nbuf is last msdu of mpdu else retuns false.
  932. */
  933. static inline bool dp_rx_adjust_nbuf_len(qdf_nbuf_t nbuf, uint16_t *mpdu_len)
  934. {
  935. bool last_nbuf;
  936. if (*mpdu_len > (RX_DATA_BUFFER_SIZE - RX_PKT_TLVS_LEN)) {
  937. qdf_nbuf_set_pktlen(nbuf, RX_DATA_BUFFER_SIZE);
  938. last_nbuf = false;
  939. } else {
  940. qdf_nbuf_set_pktlen(nbuf, (*mpdu_len + RX_PKT_TLVS_LEN));
  941. last_nbuf = true;
  942. }
  943. *mpdu_len -= (RX_DATA_BUFFER_SIZE - RX_PKT_TLVS_LEN);
  944. return last_nbuf;
  945. }
  946. /**
  947. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  948. * multiple nbufs.
  949. * @nbuf: pointer to the first msdu of an amsdu.
  950. *
  951. * This function implements the creation of RX frag_list for cases
  952. * where an MSDU is spread across multiple nbufs.
  953. *
  954. * Return: returns the head nbuf which contains complete frag_list.
  955. */
  956. qdf_nbuf_t dp_rx_sg_create(qdf_nbuf_t nbuf)
  957. {
  958. qdf_nbuf_t parent, frag_list, next = NULL;
  959. uint16_t frag_list_len = 0;
  960. uint16_t mpdu_len;
  961. bool last_nbuf;
  962. /*
  963. * Use msdu len got from REO entry descriptor instead since
  964. * there is case the RX PKT TLV is corrupted while msdu_len
  965. * from REO descriptor is right for non-raw RX scatter msdu.
  966. */
  967. mpdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  968. /*
  969. * this is a case where the complete msdu fits in one single nbuf.
  970. * in this case HW sets both start and end bit and we only need to
  971. * reset these bits for RAW mode simulator to decap the pkt
  972. */
  973. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  974. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  975. qdf_nbuf_set_pktlen(nbuf, mpdu_len + RX_PKT_TLVS_LEN);
  976. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  977. return nbuf;
  978. }
  979. /*
  980. * This is a case where we have multiple msdus (A-MSDU) spread across
  981. * multiple nbufs. here we create a fraglist out of these nbufs.
  982. *
  983. * the moment we encounter a nbuf with continuation bit set we
  984. * know for sure we have an MSDU which is spread across multiple
  985. * nbufs. We loop through and reap nbufs till we reach last nbuf.
  986. */
  987. parent = nbuf;
  988. frag_list = nbuf->next;
  989. nbuf = nbuf->next;
  990. /*
  991. * set the start bit in the first nbuf we encounter with continuation
  992. * bit set. This has the proper mpdu length set as it is the first
  993. * msdu of the mpdu. this becomes the parent nbuf and the subsequent
  994. * nbufs will form the frag_list of the parent nbuf.
  995. */
  996. qdf_nbuf_set_rx_chfrag_start(parent, 1);
  997. last_nbuf = dp_rx_adjust_nbuf_len(parent, &mpdu_len);
  998. /*
  999. * this is where we set the length of the fragments which are
  1000. * associated to the parent nbuf. We iterate through the frag_list
  1001. * till we hit the last_nbuf of the list.
  1002. */
  1003. do {
  1004. last_nbuf = dp_rx_adjust_nbuf_len(nbuf, &mpdu_len);
  1005. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  1006. frag_list_len += qdf_nbuf_len(nbuf);
  1007. if (last_nbuf) {
  1008. next = nbuf->next;
  1009. nbuf->next = NULL;
  1010. break;
  1011. }
  1012. nbuf = nbuf->next;
  1013. } while (!last_nbuf);
  1014. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  1015. qdf_nbuf_append_ext_list(parent, frag_list, frag_list_len);
  1016. parent->next = next;
  1017. qdf_nbuf_pull_head(parent, RX_PKT_TLVS_LEN);
  1018. return parent;
  1019. }
  1020. /**
  1021. * dp_rx_compute_delay() - Compute and fill in all timestamps
  1022. * to pass in correct fields
  1023. *
  1024. * @vdev: pdev handle
  1025. * @tx_desc: tx descriptor
  1026. * @tid: tid value
  1027. * Return: none
  1028. */
  1029. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  1030. {
  1031. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  1032. int64_t current_ts = qdf_ktime_to_ms(qdf_ktime_get());
  1033. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  1034. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  1035. uint32_t interframe_delay =
  1036. (uint32_t)(current_ts - vdev->prev_rx_deliver_tstamp);
  1037. dp_update_delay_stats(vdev->pdev, to_stack, tid,
  1038. CDP_DELAY_STATS_REAP_STACK, ring_id);
  1039. /*
  1040. * Update interframe delay stats calculated at deliver_data_ol point.
  1041. * Value of vdev->prev_rx_deliver_tstamp will be 0 for 1st frame, so
  1042. * interframe delay will not be calculate correctly for 1st frame.
  1043. * On the other side, this will help in avoiding extra per packet check
  1044. * of vdev->prev_rx_deliver_tstamp.
  1045. */
  1046. dp_update_delay_stats(vdev->pdev, interframe_delay, tid,
  1047. CDP_DELAY_STATS_RX_INTERFRAME, ring_id);
  1048. vdev->prev_rx_deliver_tstamp = current_ts;
  1049. }
  1050. /**
  1051. * dp_rx_drop_nbuf_list() - drop an nbuf list
  1052. * @pdev: dp pdev reference
  1053. * @buf_list: buffer list to be dropepd
  1054. *
  1055. * Return: int (number of bufs dropped)
  1056. */
  1057. static inline int dp_rx_drop_nbuf_list(struct dp_pdev *pdev,
  1058. qdf_nbuf_t buf_list)
  1059. {
  1060. struct cdp_tid_rx_stats *stats = NULL;
  1061. uint8_t tid = 0, ring_id = 0;
  1062. int num_dropped = 0;
  1063. qdf_nbuf_t buf, next_buf;
  1064. buf = buf_list;
  1065. while (buf) {
  1066. ring_id = QDF_NBUF_CB_RX_CTX_ID(buf);
  1067. next_buf = qdf_nbuf_queue_next(buf);
  1068. tid = qdf_nbuf_get_tid_val(buf);
  1069. if (qdf_likely(pdev)) {
  1070. stats = &pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  1071. stats->fail_cnt[INVALID_PEER_VDEV]++;
  1072. stats->delivered_to_stack--;
  1073. }
  1074. qdf_nbuf_free(buf);
  1075. buf = next_buf;
  1076. num_dropped++;
  1077. }
  1078. return num_dropped;
  1079. }
  1080. #ifdef PEER_CACHE_RX_PKTS
  1081. /**
  1082. * dp_rx_flush_rx_cached() - flush cached rx frames
  1083. * @peer: peer
  1084. * @drop: flag to drop frames or forward to net stack
  1085. *
  1086. * Return: None
  1087. */
  1088. void dp_rx_flush_rx_cached(struct dp_peer *peer, bool drop)
  1089. {
  1090. struct dp_peer_cached_bufq *bufqi;
  1091. struct dp_rx_cached_buf *cache_buf = NULL;
  1092. ol_txrx_rx_fp data_rx = NULL;
  1093. int num_buff_elem;
  1094. QDF_STATUS status;
  1095. if (qdf_atomic_inc_return(&peer->flush_in_progress) > 1) {
  1096. qdf_atomic_dec(&peer->flush_in_progress);
  1097. return;
  1098. }
  1099. qdf_spin_lock_bh(&peer->peer_info_lock);
  1100. if (peer->state >= OL_TXRX_PEER_STATE_CONN && peer->vdev->osif_rx)
  1101. data_rx = peer->vdev->osif_rx;
  1102. else
  1103. drop = true;
  1104. qdf_spin_unlock_bh(&peer->peer_info_lock);
  1105. bufqi = &peer->bufq_info;
  1106. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1107. qdf_list_remove_front(&bufqi->cached_bufq,
  1108. (qdf_list_node_t **)&cache_buf);
  1109. while (cache_buf) {
  1110. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(
  1111. cache_buf->buf);
  1112. bufqi->entries -= num_buff_elem;
  1113. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1114. if (drop) {
  1115. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1116. cache_buf->buf);
  1117. } else {
  1118. /* Flush the cached frames to OSIF DEV */
  1119. status = data_rx(peer->vdev->osif_vdev, cache_buf->buf);
  1120. if (status != QDF_STATUS_SUCCESS)
  1121. bufqi->dropped = dp_rx_drop_nbuf_list(
  1122. peer->vdev->pdev,
  1123. cache_buf->buf);
  1124. }
  1125. qdf_mem_free(cache_buf);
  1126. cache_buf = NULL;
  1127. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1128. qdf_list_remove_front(&bufqi->cached_bufq,
  1129. (qdf_list_node_t **)&cache_buf);
  1130. }
  1131. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1132. qdf_atomic_dec(&peer->flush_in_progress);
  1133. }
  1134. /**
  1135. * dp_rx_enqueue_rx() - cache rx frames
  1136. * @peer: peer
  1137. * @rx_buf_list: cache buffer list
  1138. *
  1139. * Return: None
  1140. */
  1141. static QDF_STATUS
  1142. dp_rx_enqueue_rx(struct dp_peer *peer, qdf_nbuf_t rx_buf_list)
  1143. {
  1144. struct dp_rx_cached_buf *cache_buf;
  1145. struct dp_peer_cached_bufq *bufqi = &peer->bufq_info;
  1146. int num_buff_elem;
  1147. dp_debug_rl("bufq->curr %d bufq->drops %d", bufqi->entries,
  1148. bufqi->dropped);
  1149. if (!peer->valid) {
  1150. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1151. rx_buf_list);
  1152. return QDF_STATUS_E_INVAL;
  1153. }
  1154. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1155. if (bufqi->entries >= bufqi->thresh) {
  1156. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1157. rx_buf_list);
  1158. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1159. return QDF_STATUS_E_RESOURCES;
  1160. }
  1161. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1162. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(rx_buf_list);
  1163. cache_buf = qdf_mem_malloc_atomic(sizeof(*cache_buf));
  1164. if (!cache_buf) {
  1165. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1166. "Failed to allocate buf to cache rx frames");
  1167. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1168. rx_buf_list);
  1169. return QDF_STATUS_E_NOMEM;
  1170. }
  1171. cache_buf->buf = rx_buf_list;
  1172. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1173. qdf_list_insert_back(&bufqi->cached_bufq,
  1174. &cache_buf->node);
  1175. bufqi->entries += num_buff_elem;
  1176. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1177. return QDF_STATUS_SUCCESS;
  1178. }
  1179. static inline
  1180. bool dp_rx_is_peer_cache_bufq_supported(void)
  1181. {
  1182. return true;
  1183. }
  1184. #else
  1185. static inline
  1186. bool dp_rx_is_peer_cache_bufq_supported(void)
  1187. {
  1188. return false;
  1189. }
  1190. static inline QDF_STATUS
  1191. dp_rx_enqueue_rx(struct dp_peer *peer, qdf_nbuf_t rx_buf_list)
  1192. {
  1193. return QDF_STATUS_SUCCESS;
  1194. }
  1195. #endif
  1196. void dp_rx_deliver_to_stack(struct dp_soc *soc,
  1197. struct dp_vdev *vdev,
  1198. struct dp_peer *peer,
  1199. qdf_nbuf_t nbuf_head,
  1200. qdf_nbuf_t nbuf_tail)
  1201. {
  1202. int num_nbuf = 0;
  1203. if (qdf_unlikely(!vdev || vdev->delete.pending)) {
  1204. num_nbuf = dp_rx_drop_nbuf_list(NULL, nbuf_head);
  1205. /*
  1206. * This is a special case where vdev is invalid,
  1207. * so we cannot know the pdev to which this packet
  1208. * belonged. Hence we update the soc rx error stats.
  1209. */
  1210. DP_STATS_INC(soc, rx.err.invalid_vdev, num_nbuf);
  1211. return;
  1212. }
  1213. /*
  1214. * highly unlikely to have a vdev without a registered rx
  1215. * callback function. if so let us free the nbuf_list.
  1216. */
  1217. if (qdf_unlikely(!vdev->osif_rx)) {
  1218. if (peer && dp_rx_is_peer_cache_bufq_supported()) {
  1219. dp_rx_enqueue_rx(peer, nbuf_head);
  1220. } else {
  1221. num_nbuf = dp_rx_drop_nbuf_list(vdev->pdev,
  1222. nbuf_head);
  1223. DP_STATS_DEC(peer, rx.to_stack.num, num_nbuf);
  1224. }
  1225. return;
  1226. }
  1227. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw) ||
  1228. (vdev->rx_decap_type == htt_cmn_pkt_type_native_wifi)) {
  1229. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &nbuf_head,
  1230. &nbuf_tail, peer->mac_addr.raw);
  1231. }
  1232. /* Function pointer initialized only when FISA is enabled */
  1233. if (vdev->osif_fisa_rx)
  1234. /* on failure send it via regular path */
  1235. vdev->osif_fisa_rx(soc, vdev, nbuf_head);
  1236. else
  1237. vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1238. }
  1239. /**
  1240. * dp_rx_cksum_offload() - set the nbuf checksum as defined by hardware.
  1241. * @nbuf: pointer to the first msdu of an amsdu.
  1242. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1243. *
  1244. * The ipsumed field of the skb is set based on whether HW validated the
  1245. * IP/TCP/UDP checksum.
  1246. *
  1247. * Return: void
  1248. */
  1249. static inline void dp_rx_cksum_offload(struct dp_pdev *pdev,
  1250. qdf_nbuf_t nbuf,
  1251. uint8_t *rx_tlv_hdr)
  1252. {
  1253. qdf_nbuf_rx_cksum_t cksum = {0};
  1254. bool ip_csum_err = hal_rx_attn_ip_cksum_fail_get(rx_tlv_hdr);
  1255. bool tcp_udp_csum_er = hal_rx_attn_tcp_udp_cksum_fail_get(rx_tlv_hdr);
  1256. if (qdf_likely(!ip_csum_err && !tcp_udp_csum_er)) {
  1257. cksum.l4_result = QDF_NBUF_RX_CKSUM_TCP_UDP_UNNECESSARY;
  1258. qdf_nbuf_set_rx_cksum(nbuf, &cksum);
  1259. } else {
  1260. DP_STATS_INCC(pdev, err.ip_csum_err, 1, ip_csum_err);
  1261. DP_STATS_INCC(pdev, err.tcp_udp_csum_err, 1, tcp_udp_csum_er);
  1262. }
  1263. }
  1264. #ifdef VDEV_PEER_PROTOCOL_COUNT
  1265. #define dp_rx_msdu_stats_update_prot_cnts(vdev_hdl, nbuf, peer) \
  1266. { \
  1267. qdf_nbuf_t nbuf_local; \
  1268. struct dp_peer *peer_local; \
  1269. struct dp_vdev *vdev_local = vdev_hdl; \
  1270. do { \
  1271. if (qdf_likely(!((vdev_local)->peer_protocol_count_track))) \
  1272. break; \
  1273. nbuf_local = nbuf; \
  1274. peer_local = peer; \
  1275. if (qdf_unlikely(qdf_nbuf_is_frag((nbuf_local)))) \
  1276. break; \
  1277. else if (qdf_unlikely(qdf_nbuf_is_raw_frame((nbuf_local)))) \
  1278. break; \
  1279. dp_vdev_peer_stats_update_protocol_cnt((vdev_local), \
  1280. (nbuf_local), \
  1281. (peer_local), 0, 1); \
  1282. } while (0); \
  1283. }
  1284. #else
  1285. #define dp_rx_msdu_stats_update_prot_cnts(vdev_hdl, nbuf, peer)
  1286. #endif
  1287. /**
  1288. * dp_rx_msdu_stats_update() - update per msdu stats.
  1289. * @soc: core txrx main context
  1290. * @nbuf: pointer to the first msdu of an amsdu.
  1291. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1292. * @peer: pointer to the peer object.
  1293. * @ring_id: reo dest ring number on which pkt is reaped.
  1294. * @tid_stats: per tid rx stats.
  1295. *
  1296. * update all the per msdu stats for that nbuf.
  1297. * Return: void
  1298. */
  1299. static void dp_rx_msdu_stats_update(struct dp_soc *soc,
  1300. qdf_nbuf_t nbuf,
  1301. uint8_t *rx_tlv_hdr,
  1302. struct dp_peer *peer,
  1303. uint8_t ring_id,
  1304. struct cdp_tid_rx_stats *tid_stats)
  1305. {
  1306. bool is_ampdu, is_not_amsdu;
  1307. uint32_t sgi, mcs, tid, nss, bw, reception_type, pkt_type;
  1308. struct dp_vdev *vdev = peer->vdev;
  1309. qdf_ether_header_t *eh;
  1310. uint16_t msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1311. dp_rx_msdu_stats_update_prot_cnts(vdev, nbuf, peer);
  1312. is_not_amsdu = qdf_nbuf_is_rx_chfrag_start(nbuf) &
  1313. qdf_nbuf_is_rx_chfrag_end(nbuf);
  1314. DP_STATS_INC_PKT(peer, rx.rcvd_reo[ring_id], 1, msdu_len);
  1315. DP_STATS_INCC(peer, rx.non_amsdu_cnt, 1, is_not_amsdu);
  1316. DP_STATS_INCC(peer, rx.amsdu_cnt, 1, !is_not_amsdu);
  1317. DP_STATS_INCC(peer, rx.rx_retries, 1, qdf_nbuf_is_rx_retry_flag(nbuf));
  1318. tid_stats->msdu_cnt++;
  1319. if (qdf_unlikely(qdf_nbuf_is_da_mcbc(nbuf) &&
  1320. (vdev->rx_decap_type == htt_cmn_pkt_type_ethernet))) {
  1321. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1322. DP_STATS_INC_PKT(peer, rx.multicast, 1, msdu_len);
  1323. tid_stats->mcast_msdu_cnt++;
  1324. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost)) {
  1325. DP_STATS_INC_PKT(peer, rx.bcast, 1, msdu_len);
  1326. tid_stats->bcast_msdu_cnt++;
  1327. }
  1328. }
  1329. /*
  1330. * currently we can return from here as we have similar stats
  1331. * updated at per ppdu level instead of msdu level
  1332. */
  1333. if (!soc->process_rx_status)
  1334. return;
  1335. is_ampdu = hal_rx_mpdu_info_ampdu_flag_get(rx_tlv_hdr);
  1336. DP_STATS_INCC(peer, rx.ampdu_cnt, 1, is_ampdu);
  1337. DP_STATS_INCC(peer, rx.non_ampdu_cnt, 1, !(is_ampdu));
  1338. sgi = hal_rx_msdu_start_sgi_get(rx_tlv_hdr);
  1339. mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  1340. tid = qdf_nbuf_get_tid_val(nbuf);
  1341. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  1342. reception_type = hal_rx_msdu_start_reception_type_get(soc->hal_soc,
  1343. rx_tlv_hdr);
  1344. nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
  1345. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  1346. DP_STATS_INC(peer, rx.bw[bw], 1);
  1347. /*
  1348. * only if nss > 0 and pkt_type is 11N/AC/AX,
  1349. * then increase index [nss - 1] in array counter.
  1350. */
  1351. if (nss > 0 && (pkt_type == DOT11_N ||
  1352. pkt_type == DOT11_AC ||
  1353. pkt_type == DOT11_AX))
  1354. DP_STATS_INC(peer, rx.nss[nss - 1], 1);
  1355. DP_STATS_INC(peer, rx.sgi_count[sgi], 1);
  1356. DP_STATS_INCC(peer, rx.err.mic_err, 1,
  1357. hal_rx_mpdu_end_mic_err_get(rx_tlv_hdr));
  1358. DP_STATS_INCC(peer, rx.err.decrypt_err, 1,
  1359. hal_rx_mpdu_end_decrypt_err_get(rx_tlv_hdr));
  1360. DP_STATS_INC(peer, rx.wme_ac_type[TID_TO_WME_AC(tid)], 1);
  1361. DP_STATS_INC(peer, rx.reception_type[reception_type], 1);
  1362. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1363. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1364. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1365. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1366. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1367. ((mcs >= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1368. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1369. ((mcs <= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1370. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1371. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1372. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1373. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1374. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1375. ((mcs >= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1376. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1377. ((mcs <= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1378. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1379. ((mcs >= MAX_MCS) && (pkt_type == DOT11_AX)));
  1380. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1381. ((mcs < MAX_MCS) && (pkt_type == DOT11_AX)));
  1382. if ((soc->process_rx_status) &&
  1383. hal_rx_attn_first_mpdu_get(rx_tlv_hdr)) {
  1384. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  1385. if (!vdev->pdev)
  1386. return;
  1387. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, vdev->pdev->soc,
  1388. &peer->stats, peer->peer_ids[0],
  1389. UPDATE_PEER_STATS,
  1390. vdev->pdev->pdev_id);
  1391. #endif
  1392. }
  1393. }
  1394. static inline bool is_sa_da_idx_valid(struct dp_soc *soc,
  1395. uint8_t *rx_tlv_hdr,
  1396. qdf_nbuf_t nbuf,
  1397. struct hal_rx_msdu_metadata msdu_info)
  1398. {
  1399. if ((qdf_nbuf_is_sa_valid(nbuf) &&
  1400. (msdu_info.sa_idx > wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) ||
  1401. (!qdf_nbuf_is_da_mcbc(nbuf) &&
  1402. qdf_nbuf_is_da_valid(nbuf) &&
  1403. (msdu_info.da_idx > wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))))
  1404. return false;
  1405. return true;
  1406. }
  1407. #ifndef WDS_VENDOR_EXTENSION
  1408. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr,
  1409. struct dp_vdev *vdev,
  1410. struct dp_peer *peer)
  1411. {
  1412. return 1;
  1413. }
  1414. #endif
  1415. #ifdef RX_DESC_DEBUG_CHECK
  1416. /**
  1417. * dp_rx_desc_nbuf_sanity_check - Add sanity check to catch REO rx_desc paddr
  1418. * corruption
  1419. *
  1420. * @ring_desc: REO ring descriptor
  1421. * @rx_desc: Rx descriptor
  1422. *
  1423. * Return: NONE
  1424. */
  1425. static inline
  1426. void dp_rx_desc_nbuf_sanity_check(hal_ring_desc_t ring_desc,
  1427. struct dp_rx_desc *rx_desc)
  1428. {
  1429. struct hal_buf_info hbi;
  1430. hal_rx_reo_buf_paddr_get(ring_desc, &hbi);
  1431. /* Sanity check for possible buffer paddr corruption */
  1432. qdf_assert_always((&hbi)->paddr ==
  1433. qdf_nbuf_get_frag_paddr(rx_desc->nbuf, 0));
  1434. }
  1435. #else
  1436. static inline
  1437. void dp_rx_desc_nbuf_sanity_check(hal_ring_desc_t ring_desc,
  1438. struct dp_rx_desc *rx_desc)
  1439. {
  1440. }
  1441. #endif
  1442. #ifdef WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT
  1443. static inline
  1444. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped)
  1445. {
  1446. bool limit_hit = false;
  1447. struct wlan_cfg_dp_soc_ctxt *cfg = soc->wlan_cfg_ctx;
  1448. limit_hit =
  1449. (num_reaped >= cfg->rx_reap_loop_pkt_limit) ? true : false;
  1450. if (limit_hit)
  1451. DP_STATS_INC(soc, rx.reap_loop_pkt_limit_hit, 1)
  1452. return limit_hit;
  1453. }
  1454. static inline bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1455. {
  1456. return soc->wlan_cfg_ctx->rx_enable_eol_data_check;
  1457. }
  1458. #else
  1459. static inline
  1460. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped)
  1461. {
  1462. return false;
  1463. }
  1464. static inline bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1465. {
  1466. return false;
  1467. }
  1468. #endif /* WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT */
  1469. #ifdef DP_RX_PKT_NO_PEER_DELIVER
  1470. /**
  1471. * dp_rx_deliver_to_stack_no_peer() - try deliver rx data even if
  1472. * no corresbonding peer found
  1473. * @soc: core txrx main context
  1474. * @nbuf: pkt skb pointer
  1475. *
  1476. * This function will try to deliver some RX special frames to stack
  1477. * even there is no peer matched found. for instance, LFR case, some
  1478. * eapol data will be sent to host before peer_map done.
  1479. *
  1480. * Return: None
  1481. */
  1482. static
  1483. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1484. {
  1485. uint16_t peer_id;
  1486. uint8_t vdev_id;
  1487. struct dp_vdev *vdev;
  1488. uint32_t l2_hdr_offset = 0;
  1489. uint16_t msdu_len = 0;
  1490. uint32_t pkt_len = 0;
  1491. uint8_t *rx_tlv_hdr;
  1492. uint32_t frame_mask = FRAME_MASK_IPV4_ARP | FRAME_MASK_IPV4_DHCP |
  1493. FRAME_MASK_IPV4_EAPOL | FRAME_MASK_IPV6_DHCP;
  1494. peer_id = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  1495. if (peer_id > soc->max_peers)
  1496. goto deliver_fail;
  1497. vdev_id = QDF_NBUF_CB_RX_VDEV_ID(nbuf);
  1498. vdev = dp_get_vdev_from_soc_vdev_id_wifi3(soc, vdev_id);
  1499. if (!vdev || vdev->delete.pending || !vdev->osif_rx)
  1500. goto deliver_fail;
  1501. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf)))
  1502. goto deliver_fail;
  1503. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1504. l2_hdr_offset =
  1505. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, rx_tlv_hdr);
  1506. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1507. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  1508. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(nbuf) = 1;
  1509. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1510. qdf_nbuf_pull_head(nbuf,
  1511. RX_PKT_TLVS_LEN +
  1512. l2_hdr_offset);
  1513. if (dp_rx_is_special_frame(nbuf, frame_mask)) {
  1514. vdev->osif_rx(vdev->osif_vdev, nbuf);
  1515. DP_STATS_INC(soc, rx.err.pkt_delivered_no_peer, 1);
  1516. return;
  1517. }
  1518. deliver_fail:
  1519. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1520. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1521. qdf_nbuf_free(nbuf);
  1522. }
  1523. #else
  1524. static inline
  1525. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1526. {
  1527. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1528. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1529. qdf_nbuf_free(nbuf);
  1530. }
  1531. #endif
  1532. /**
  1533. * dp_rx_srng_get_num_pending() - get number of pending entries
  1534. * @hal_soc: hal soc opaque pointer
  1535. * @hal_ring: opaque pointer to the HAL Rx Ring
  1536. * @num_entries: number of entries in the hal_ring.
  1537. * @near_full: pointer to a boolean. This is set if ring is near full.
  1538. *
  1539. * The function returns the number of entries in a destination ring which are
  1540. * yet to be reaped. The function also checks if the ring is near full.
  1541. * If more than half of the ring needs to be reaped, the ring is considered
  1542. * approaching full.
  1543. * The function useses hal_srng_dst_num_valid_locked to get the number of valid
  1544. * entries. It should not be called within a SRNG lock. HW pointer value is
  1545. * synced into cached_hp.
  1546. *
  1547. * Return: Number of pending entries if any
  1548. */
  1549. static
  1550. uint32_t dp_rx_srng_get_num_pending(hal_soc_handle_t hal_soc,
  1551. hal_ring_handle_t hal_ring_hdl,
  1552. uint32_t num_entries,
  1553. bool *near_full)
  1554. {
  1555. uint32_t num_pending = 0;
  1556. num_pending = hal_srng_dst_num_valid_locked(hal_soc,
  1557. hal_ring_hdl,
  1558. true);
  1559. if (num_entries && (num_pending >= num_entries >> 1))
  1560. *near_full = true;
  1561. else
  1562. *near_full = false;
  1563. return num_pending;
  1564. }
  1565. #ifdef WLAN_SUPPORT_RX_FISA
  1566. void dp_rx_skip_tlvs(qdf_nbuf_t nbuf, uint32_t l3_padding)
  1567. {
  1568. QDF_NBUF_CB_RX_PACKET_L3_HDR_PAD(nbuf) = l3_padding;
  1569. qdf_nbuf_pull_head(nbuf, l3_padding + RX_PKT_TLVS_LEN);
  1570. }
  1571. #else
  1572. void dp_rx_skip_tlvs(qdf_nbuf_t nbuf, uint32_t l3_padding)
  1573. {
  1574. qdf_nbuf_pull_head(nbuf, l3_padding + RX_PKT_TLVS_LEN);
  1575. }
  1576. #endif
  1577. /**
  1578. * dp_rx_process() - Brain of the Rx processing functionality
  1579. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  1580. * @int_ctx: per interrupt context
  1581. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1582. * @reo_ring_num: ring number (0, 1, 2 or 3) of the reo ring.
  1583. * @quota: No. of units (packets) that can be serviced in one shot.
  1584. *
  1585. * This function implements the core of Rx functionality. This is
  1586. * expected to handle only non-error frames.
  1587. *
  1588. * Return: uint32_t: No. of elements processed
  1589. */
  1590. uint32_t dp_rx_process(struct dp_intr *int_ctx, hal_ring_handle_t hal_ring_hdl,
  1591. uint8_t reo_ring_num, uint32_t quota)
  1592. {
  1593. hal_ring_desc_t ring_desc;
  1594. hal_soc_handle_t hal_soc;
  1595. struct dp_rx_desc *rx_desc = NULL;
  1596. qdf_nbuf_t nbuf, next;
  1597. bool near_full;
  1598. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT];
  1599. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT];
  1600. uint32_t num_pending;
  1601. uint32_t rx_bufs_used = 0, rx_buf_cookie;
  1602. uint16_t msdu_len = 0;
  1603. uint16_t peer_id;
  1604. uint8_t vdev_id;
  1605. struct dp_peer *peer;
  1606. struct dp_vdev *vdev;
  1607. uint32_t pkt_len = 0;
  1608. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  1609. struct hal_rx_msdu_desc_info msdu_desc_info;
  1610. enum hal_reo_error_status error;
  1611. uint32_t peer_mdata;
  1612. uint8_t *rx_tlv_hdr;
  1613. uint32_t rx_bufs_reaped[MAX_PDEV_CNT];
  1614. uint8_t mac_id = 0;
  1615. struct dp_pdev *rx_pdev;
  1616. struct dp_srng *dp_rxdma_srng;
  1617. struct rx_desc_pool *rx_desc_pool;
  1618. struct dp_soc *soc = int_ctx->soc;
  1619. uint8_t ring_id = 0;
  1620. uint8_t core_id = 0;
  1621. struct cdp_tid_rx_stats *tid_stats;
  1622. qdf_nbuf_t nbuf_head;
  1623. qdf_nbuf_t nbuf_tail;
  1624. qdf_nbuf_t deliver_list_head;
  1625. qdf_nbuf_t deliver_list_tail;
  1626. uint32_t num_rx_bufs_reaped = 0;
  1627. uint32_t intr_id;
  1628. struct hif_opaque_softc *scn;
  1629. int32_t tid = 0;
  1630. bool is_prev_msdu_last = true;
  1631. uint32_t num_entries_avail = 0;
  1632. uint32_t rx_ol_pkt_cnt = 0;
  1633. uint32_t num_entries = 0;
  1634. struct hal_rx_msdu_metadata msdu_metadata;
  1635. QDF_STATUS status;
  1636. DP_HIST_INIT();
  1637. qdf_assert_always(soc && hal_ring_hdl);
  1638. hal_soc = soc->hal_soc;
  1639. qdf_assert_always(hal_soc);
  1640. scn = soc->hif_handle;
  1641. hif_pm_runtime_mark_dp_rx_busy(scn);
  1642. intr_id = int_ctx->dp_intr_id;
  1643. num_entries = hal_srng_get_num_entries(hal_soc, hal_ring_hdl);
  1644. more_data:
  1645. /* reset local variables here to be re-used in the function */
  1646. nbuf_head = NULL;
  1647. nbuf_tail = NULL;
  1648. deliver_list_head = NULL;
  1649. deliver_list_tail = NULL;
  1650. peer = NULL;
  1651. vdev = NULL;
  1652. num_rx_bufs_reaped = 0;
  1653. qdf_mem_zero(rx_bufs_reaped, sizeof(rx_bufs_reaped));
  1654. qdf_mem_zero(&mpdu_desc_info, sizeof(mpdu_desc_info));
  1655. qdf_mem_zero(&msdu_desc_info, sizeof(msdu_desc_info));
  1656. qdf_mem_zero(head, sizeof(head));
  1657. qdf_mem_zero(tail, sizeof(tail));
  1658. if (qdf_unlikely(dp_rx_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  1659. /*
  1660. * Need API to convert from hal_ring pointer to
  1661. * Ring Type / Ring Id combo
  1662. */
  1663. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  1664. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1665. FL("HAL RING Access Failed -- %pK"), hal_ring_hdl);
  1666. goto done;
  1667. }
  1668. /*
  1669. * start reaping the buffers from reo ring and queue
  1670. * them in per vdev queue.
  1671. * Process the received pkts in a different per vdev loop.
  1672. */
  1673. while (qdf_likely(quota &&
  1674. (ring_desc = hal_srng_dst_peek(hal_soc,
  1675. hal_ring_hdl)))) {
  1676. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  1677. ring_id = hal_srng_ring_id_get(hal_ring_hdl);
  1678. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  1679. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1680. FL("HAL RING 0x%pK:error %d"), hal_ring_hdl, error);
  1681. DP_STATS_INC(soc, rx.err.hal_reo_error[ring_id], 1);
  1682. /* Don't know how to deal with this -- assert */
  1683. qdf_assert(0);
  1684. }
  1685. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  1686. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, rx_buf_cookie);
  1687. status = dp_rx_desc_sanity(soc, hal_soc, hal_ring_hdl,
  1688. ring_desc, rx_desc);
  1689. if (QDF_IS_STATUS_ERROR(status)) {
  1690. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  1691. continue;
  1692. }
  1693. dp_rx_desc_nbuf_sanity_check(ring_desc, rx_desc);
  1694. /*
  1695. * this is a unlikely scenario where the host is reaping
  1696. * a descriptor which it already reaped just a while ago
  1697. * but is yet to replenish it back to HW.
  1698. * In this case host will dump the last 128 descriptors
  1699. * including the software descriptor rx_desc and assert.
  1700. */
  1701. if (qdf_unlikely(!rx_desc->in_use)) {
  1702. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  1703. dp_info_rl("Reaping rx_desc not in use!");
  1704. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  1705. ring_desc, rx_desc);
  1706. /* ignore duplicate RX desc and continue to process */
  1707. /* Pop out the descriptor */
  1708. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  1709. continue;
  1710. }
  1711. if (qdf_unlikely(!dp_rx_desc_check_magic(rx_desc))) {
  1712. dp_err("Invalid rx_desc cookie=%d", rx_buf_cookie);
  1713. DP_STATS_INC(soc, rx.err.rx_desc_invalid_magic, 1);
  1714. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  1715. ring_desc, rx_desc);
  1716. }
  1717. /* Get MPDU DESC info */
  1718. hal_rx_mpdu_desc_info_get(ring_desc, &mpdu_desc_info);
  1719. /* Get MSDU DESC info */
  1720. hal_rx_msdu_desc_info_get(ring_desc, &msdu_desc_info);
  1721. if (qdf_unlikely(msdu_desc_info.msdu_flags &
  1722. HAL_MSDU_F_MSDU_CONTINUATION)) {
  1723. /* previous msdu has end bit set, so current one is
  1724. * the new MPDU
  1725. */
  1726. if (is_prev_msdu_last) {
  1727. /* Get number of entries available in HW ring */
  1728. num_entries_avail =
  1729. hal_srng_dst_num_valid(hal_soc,
  1730. hal_ring_hdl, 1);
  1731. /* For new MPDU check if we can read complete
  1732. * MPDU by comparing the number of buffers
  1733. * available and number of buffers needed to
  1734. * reap this MPDU
  1735. */
  1736. if (((msdu_desc_info.msdu_len /
  1737. (RX_DATA_BUFFER_SIZE - RX_PKT_TLVS_LEN) +
  1738. 1)) > num_entries_avail) {
  1739. DP_STATS_INC(
  1740. soc,
  1741. rx.msdu_scatter_wait_break,
  1742. 1);
  1743. break;
  1744. }
  1745. is_prev_msdu_last = false;
  1746. }
  1747. }
  1748. core_id = smp_processor_id();
  1749. DP_STATS_INC(soc, rx.ring_packets[core_id][ring_id], 1);
  1750. if (mpdu_desc_info.mpdu_flags & HAL_MPDU_F_RETRY_BIT)
  1751. qdf_nbuf_set_rx_retry_flag(rx_desc->nbuf, 1);
  1752. if (qdf_unlikely(mpdu_desc_info.mpdu_flags &
  1753. HAL_MPDU_F_RAW_AMPDU))
  1754. qdf_nbuf_set_raw_frame(rx_desc->nbuf, 1);
  1755. if (!is_prev_msdu_last &&
  1756. msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  1757. is_prev_msdu_last = true;
  1758. /* Pop out the descriptor*/
  1759. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  1760. rx_bufs_reaped[rx_desc->pool_id]++;
  1761. peer_mdata = mpdu_desc_info.peer_meta_data;
  1762. QDF_NBUF_CB_RX_PEER_ID(rx_desc->nbuf) =
  1763. DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  1764. QDF_NBUF_CB_RX_VDEV_ID(rx_desc->nbuf) =
  1765. DP_PEER_METADATA_VDEV_ID_GET(peer_mdata);
  1766. /*
  1767. * save msdu flags first, last and continuation msdu in
  1768. * nbuf->cb, also save mcbc, is_da_valid, is_sa_valid and
  1769. * length to nbuf->cb. This ensures the info required for
  1770. * per pkt processing is always in the same cache line.
  1771. * This helps in improving throughput for smaller pkt
  1772. * sizes.
  1773. */
  1774. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_FIRST_MSDU_IN_MPDU)
  1775. qdf_nbuf_set_rx_chfrag_start(rx_desc->nbuf, 1);
  1776. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION)
  1777. qdf_nbuf_set_rx_chfrag_cont(rx_desc->nbuf, 1);
  1778. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  1779. qdf_nbuf_set_rx_chfrag_end(rx_desc->nbuf, 1);
  1780. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_MCBC)
  1781. qdf_nbuf_set_da_mcbc(rx_desc->nbuf, 1);
  1782. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_VALID)
  1783. qdf_nbuf_set_da_valid(rx_desc->nbuf, 1);
  1784. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_SA_IS_VALID)
  1785. qdf_nbuf_set_sa_valid(rx_desc->nbuf, 1);
  1786. qdf_nbuf_set_tid_val(rx_desc->nbuf,
  1787. HAL_RX_REO_QUEUE_NUMBER_GET(ring_desc));
  1788. QDF_NBUF_CB_RX_PKT_LEN(rx_desc->nbuf) = msdu_desc_info.msdu_len;
  1789. QDF_NBUF_CB_RX_CTX_ID(rx_desc->nbuf) = reo_ring_num;
  1790. /*
  1791. * move unmap after scattered msdu waiting break logic
  1792. * in case double skb unmap happened.
  1793. */
  1794. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  1795. qdf_nbuf_unmap_nbytes_single(soc->osdev, rx_desc->nbuf,
  1796. QDF_DMA_FROM_DEVICE,
  1797. rx_desc_pool->buf_size);
  1798. rx_desc->unmapped = 1;
  1799. DP_RX_LIST_APPEND(nbuf_head, nbuf_tail, rx_desc->nbuf);
  1800. /*
  1801. * if continuation bit is set then we have MSDU spread
  1802. * across multiple buffers, let us not decrement quota
  1803. * till we reap all buffers of that MSDU.
  1804. */
  1805. if (qdf_likely(!qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf)))
  1806. quota -= 1;
  1807. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  1808. &tail[rx_desc->pool_id],
  1809. rx_desc);
  1810. num_rx_bufs_reaped++;
  1811. /*
  1812. * only if complete msdu is received for scatter case,
  1813. * then allow break.
  1814. */
  1815. if (is_prev_msdu_last &&
  1816. dp_rx_reap_loop_pkt_limit_hit(soc, num_rx_bufs_reaped))
  1817. break;
  1818. }
  1819. done:
  1820. dp_rx_srng_access_end(int_ctx, soc, hal_ring_hdl);
  1821. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  1822. /*
  1823. * continue with next mac_id if no pkts were reaped
  1824. * from that pool
  1825. */
  1826. if (!rx_bufs_reaped[mac_id])
  1827. continue;
  1828. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_id];
  1829. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  1830. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  1831. rx_desc_pool, rx_bufs_reaped[mac_id],
  1832. &head[mac_id], &tail[mac_id]);
  1833. }
  1834. dp_verbose_debug("replenished %u\n", rx_bufs_reaped[0]);
  1835. /* Peer can be NULL is case of LFR */
  1836. if (qdf_likely(peer))
  1837. vdev = NULL;
  1838. /*
  1839. * BIG loop where each nbuf is dequeued from global queue,
  1840. * processed and queued back on a per vdev basis. These nbufs
  1841. * are sent to stack as and when we run out of nbufs
  1842. * or a new nbuf dequeued from global queue has a different
  1843. * vdev when compared to previous nbuf.
  1844. */
  1845. nbuf = nbuf_head;
  1846. while (nbuf) {
  1847. next = nbuf->next;
  1848. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1849. vdev_id = QDF_NBUF_CB_RX_VDEV_ID(nbuf);
  1850. if (deliver_list_head && vdev && (vdev->vdev_id != vdev_id)) {
  1851. dp_rx_deliver_to_stack(soc, vdev, peer,
  1852. deliver_list_head,
  1853. deliver_list_tail);
  1854. deliver_list_head = NULL;
  1855. deliver_list_tail = NULL;
  1856. }
  1857. /* Get TID from struct cb->tid_val, save to tid */
  1858. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  1859. tid = qdf_nbuf_get_tid_val(nbuf);
  1860. peer_id = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  1861. peer = dp_peer_find_by_id(soc, peer_id);
  1862. if (peer) {
  1863. QDF_NBUF_CB_DP_TRACE_PRINT(nbuf) = false;
  1864. qdf_dp_trace_set_track(nbuf, QDF_RX);
  1865. QDF_NBUF_CB_RX_DP_TRACE(nbuf) = 1;
  1866. QDF_NBUF_CB_RX_PACKET_TRACK(nbuf) =
  1867. QDF_NBUF_RX_PKT_DATA_TRACK;
  1868. }
  1869. rx_bufs_used++;
  1870. if (qdf_likely(peer)) {
  1871. vdev = peer->vdev;
  1872. } else {
  1873. nbuf->next = NULL;
  1874. dp_rx_deliver_to_stack_no_peer(soc, nbuf);
  1875. nbuf = next;
  1876. continue;
  1877. }
  1878. if (qdf_unlikely(!vdev)) {
  1879. qdf_nbuf_free(nbuf);
  1880. nbuf = next;
  1881. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1882. dp_peer_unref_del_find_by_id(peer);
  1883. continue;
  1884. }
  1885. rx_pdev = vdev->pdev;
  1886. DP_RX_TID_SAVE(nbuf, tid);
  1887. if (qdf_unlikely(rx_pdev->delay_stats_flag))
  1888. qdf_nbuf_set_timestamp(nbuf);
  1889. ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  1890. tid_stats =
  1891. &rx_pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  1892. /*
  1893. * Check if DMA completed -- msdu_done is the last bit
  1894. * to be written
  1895. */
  1896. if (qdf_unlikely(!qdf_nbuf_is_rx_chfrag_cont(nbuf) &&
  1897. !hal_rx_attn_msdu_done_get(rx_tlv_hdr))) {
  1898. dp_err("MSDU DONE failure");
  1899. DP_STATS_INC(soc, rx.err.msdu_done_fail, 1);
  1900. hal_rx_dump_pkt_tlvs(hal_soc, rx_tlv_hdr,
  1901. QDF_TRACE_LEVEL_INFO);
  1902. tid_stats->fail_cnt[MSDU_DONE_FAILURE]++;
  1903. qdf_nbuf_free(nbuf);
  1904. qdf_assert(0);
  1905. nbuf = next;
  1906. continue;
  1907. }
  1908. DP_HIST_PACKET_COUNT_INC(vdev->pdev->pdev_id);
  1909. /*
  1910. * First IF condition:
  1911. * 802.11 Fragmented pkts are reinjected to REO
  1912. * HW block as SG pkts and for these pkts we only
  1913. * need to pull the RX TLVS header length.
  1914. * Second IF condition:
  1915. * The below condition happens when an MSDU is spread
  1916. * across multiple buffers. This can happen in two cases
  1917. * 1. The nbuf size is smaller then the received msdu.
  1918. * ex: we have set the nbuf size to 2048 during
  1919. * nbuf_alloc. but we received an msdu which is
  1920. * 2304 bytes in size then this msdu is spread
  1921. * across 2 nbufs.
  1922. *
  1923. * 2. AMSDUs when RAW mode is enabled.
  1924. * ex: 1st MSDU is in 1st nbuf and 2nd MSDU is spread
  1925. * across 1st nbuf and 2nd nbuf and last MSDU is
  1926. * spread across 2nd nbuf and 3rd nbuf.
  1927. *
  1928. * for these scenarios let us create a skb frag_list and
  1929. * append these buffers till the last MSDU of the AMSDU
  1930. * Third condition:
  1931. * This is the most likely case, we receive 802.3 pkts
  1932. * decapsulated by HW, here we need to set the pkt length.
  1933. */
  1934. hal_rx_msdu_metadata_get(hal_soc, rx_tlv_hdr, &msdu_metadata);
  1935. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  1936. bool is_mcbc, is_sa_vld, is_da_vld;
  1937. is_mcbc = hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  1938. rx_tlv_hdr);
  1939. is_sa_vld =
  1940. hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc,
  1941. rx_tlv_hdr);
  1942. is_da_vld =
  1943. hal_rx_msdu_end_da_is_valid_get(soc->hal_soc,
  1944. rx_tlv_hdr);
  1945. qdf_nbuf_set_da_mcbc(nbuf, is_mcbc);
  1946. qdf_nbuf_set_da_valid(nbuf, is_da_vld);
  1947. qdf_nbuf_set_sa_valid(nbuf, is_sa_vld);
  1948. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  1949. } else if (qdf_nbuf_is_rx_chfrag_cont(nbuf)) {
  1950. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1951. nbuf = dp_rx_sg_create(nbuf);
  1952. next = nbuf->next;
  1953. if (qdf_nbuf_is_raw_frame(nbuf)) {
  1954. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  1955. DP_STATS_INC_PKT(peer, rx.raw, 1, msdu_len);
  1956. } else {
  1957. qdf_nbuf_free(nbuf);
  1958. DP_STATS_INC(soc, rx.err.scatter_msdu, 1);
  1959. dp_info_rl("scatter msdu len %d, dropped",
  1960. msdu_len);
  1961. nbuf = next;
  1962. dp_peer_unref_del_find_by_id(peer);
  1963. continue;
  1964. }
  1965. } else {
  1966. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1967. pkt_len = msdu_len +
  1968. msdu_metadata.l3_hdr_pad +
  1969. RX_PKT_TLVS_LEN;
  1970. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1971. dp_rx_skip_tlvs(nbuf, msdu_metadata.l3_hdr_pad);
  1972. }
  1973. /*
  1974. * process frame for mulitpass phrase processing
  1975. */
  1976. if (qdf_unlikely(vdev->multipass_en)) {
  1977. if (dp_rx_multipass_process(peer, nbuf, tid) == false) {
  1978. DP_STATS_INC(peer, rx.multipass_rx_pkt_drop, 1);
  1979. qdf_nbuf_free(nbuf);
  1980. nbuf = next;
  1981. dp_peer_unref_del_find_by_id(peer);
  1982. continue;
  1983. }
  1984. }
  1985. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, peer)) {
  1986. QDF_TRACE(QDF_MODULE_ID_DP,
  1987. QDF_TRACE_LEVEL_ERROR,
  1988. FL("Policy Check Drop pkt"));
  1989. tid_stats->fail_cnt[POLICY_CHECK_DROP]++;
  1990. /* Drop & free packet */
  1991. qdf_nbuf_free(nbuf);
  1992. /* Statistics */
  1993. nbuf = next;
  1994. dp_peer_unref_del_find_by_id(peer);
  1995. continue;
  1996. }
  1997. if (qdf_unlikely(peer && (peer->nawds_enabled) &&
  1998. (qdf_nbuf_is_da_mcbc(nbuf)) &&
  1999. (hal_rx_get_mpdu_mac_ad4_valid(soc->hal_soc,
  2000. rx_tlv_hdr) ==
  2001. false))) {
  2002. tid_stats->fail_cnt[NAWDS_MCAST_DROP]++;
  2003. DP_STATS_INC(peer, rx.nawds_mcast_drop, 1);
  2004. qdf_nbuf_free(nbuf);
  2005. nbuf = next;
  2006. dp_peer_unref_del_find_by_id(peer);
  2007. continue;
  2008. }
  2009. if (soc->process_rx_status)
  2010. dp_rx_cksum_offload(vdev->pdev, nbuf, rx_tlv_hdr);
  2011. /* Update the protocol tag in SKB based on CCE metadata */
  2012. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  2013. reo_ring_num, false, true);
  2014. /* Update the flow tag in SKB based on FSE metadata */
  2015. dp_rx_update_flow_tag(soc, vdev, nbuf, rx_tlv_hdr, true);
  2016. dp_rx_msdu_stats_update(soc, nbuf, rx_tlv_hdr, peer,
  2017. ring_id, tid_stats);
  2018. if (qdf_unlikely(vdev->mesh_vdev)) {
  2019. if (dp_rx_filter_mesh_packets(vdev, nbuf, rx_tlv_hdr)
  2020. == QDF_STATUS_SUCCESS) {
  2021. QDF_TRACE(QDF_MODULE_ID_DP,
  2022. QDF_TRACE_LEVEL_INFO_MED,
  2023. FL("mesh pkt filtered"));
  2024. tid_stats->fail_cnt[MESH_FILTER_DROP]++;
  2025. DP_STATS_INC(vdev->pdev, dropped.mesh_filter,
  2026. 1);
  2027. qdf_nbuf_free(nbuf);
  2028. nbuf = next;
  2029. dp_peer_unref_del_find_by_id(peer);
  2030. continue;
  2031. }
  2032. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr, peer);
  2033. }
  2034. if (qdf_likely(vdev->rx_decap_type ==
  2035. htt_cmn_pkt_type_ethernet) &&
  2036. qdf_likely(!vdev->mesh_vdev)) {
  2037. /* WDS Destination Address Learning */
  2038. dp_rx_da_learn(soc, rx_tlv_hdr, peer, nbuf);
  2039. /* Due to HW issue, sometimes we see that the sa_idx
  2040. * and da_idx are invalid with sa_valid and da_valid
  2041. * bits set
  2042. *
  2043. * in this case we also see that value of
  2044. * sa_sw_peer_id is set as 0
  2045. *
  2046. * Drop the packet if sa_idx and da_idx OOB or
  2047. * sa_sw_peerid is 0
  2048. */
  2049. if (!is_sa_da_idx_valid(soc, rx_tlv_hdr, nbuf,
  2050. msdu_metadata)) {
  2051. qdf_nbuf_free(nbuf);
  2052. nbuf = next;
  2053. DP_STATS_INC(soc, rx.err.invalid_sa_da_idx, 1);
  2054. dp_peer_unref_del_find_by_id(peer);
  2055. continue;
  2056. }
  2057. /* WDS Source Port Learning */
  2058. if (qdf_likely(vdev->wds_enabled))
  2059. dp_rx_wds_srcport_learn(soc,
  2060. rx_tlv_hdr,
  2061. peer,
  2062. nbuf,
  2063. msdu_metadata);
  2064. /* Intrabss-fwd */
  2065. if (dp_rx_check_ap_bridge(vdev))
  2066. if (dp_rx_intrabss_fwd(soc,
  2067. peer,
  2068. rx_tlv_hdr,
  2069. nbuf,
  2070. msdu_metadata)) {
  2071. nbuf = next;
  2072. dp_peer_unref_del_find_by_id(peer);
  2073. tid_stats->intrabss_cnt++;
  2074. continue; /* Get next desc */
  2075. }
  2076. }
  2077. dp_rx_fill_gro_info(soc, rx_tlv_hdr, nbuf, &rx_ol_pkt_cnt);
  2078. DP_RX_LIST_APPEND(deliver_list_head,
  2079. deliver_list_tail,
  2080. nbuf);
  2081. DP_STATS_INC_PKT(peer, rx.to_stack, 1,
  2082. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  2083. tid_stats->delivered_to_stack++;
  2084. nbuf = next;
  2085. dp_peer_unref_del_find_by_id(peer);
  2086. }
  2087. if (qdf_likely(deliver_list_head)) {
  2088. if (qdf_likely(peer))
  2089. dp_rx_deliver_to_stack(soc, vdev, peer,
  2090. deliver_list_head,
  2091. deliver_list_tail);
  2092. else {
  2093. nbuf = deliver_list_head;
  2094. while (nbuf) {
  2095. next = nbuf->next;
  2096. nbuf->next = NULL;
  2097. dp_rx_deliver_to_stack_no_peer(soc, nbuf);
  2098. nbuf = next;
  2099. }
  2100. }
  2101. }
  2102. if (dp_rx_enable_eol_data_check(soc) && rx_bufs_used) {
  2103. if (quota) {
  2104. num_pending =
  2105. dp_rx_srng_get_num_pending(hal_soc,
  2106. hal_ring_hdl,
  2107. num_entries,
  2108. &near_full);
  2109. if (num_pending) {
  2110. DP_STATS_INC(soc, rx.hp_oos2, 1);
  2111. if (!hif_exec_should_yield(scn, intr_id))
  2112. goto more_data;
  2113. if (qdf_unlikely(near_full)) {
  2114. DP_STATS_INC(soc, rx.near_full, 1);
  2115. goto more_data;
  2116. }
  2117. }
  2118. }
  2119. if (vdev && vdev->osif_fisa_flush)
  2120. vdev->osif_fisa_flush(soc, reo_ring_num);
  2121. if (vdev && vdev->osif_gro_flush && rx_ol_pkt_cnt) {
  2122. vdev->osif_gro_flush(vdev->osif_vdev,
  2123. reo_ring_num);
  2124. }
  2125. }
  2126. /* Update histogram statistics by looping through pdev's */
  2127. DP_RX_HIST_STATS_PER_PDEV();
  2128. return rx_bufs_used; /* Assume no scale factor for now */
  2129. }
  2130. QDF_STATUS dp_rx_vdev_detach(struct dp_vdev *vdev)
  2131. {
  2132. QDF_STATUS ret;
  2133. if (vdev->osif_rx_flush) {
  2134. ret = vdev->osif_rx_flush(vdev->osif_vdev, vdev->vdev_id);
  2135. if (!ret) {
  2136. dp_err("Failed to flush rx pkts for vdev %d\n",
  2137. vdev->vdev_id);
  2138. return ret;
  2139. }
  2140. }
  2141. return QDF_STATUS_SUCCESS;
  2142. }
  2143. /**
  2144. * dp_rx_pdev_detach() - detach dp rx
  2145. * @pdev: core txrx pdev context
  2146. *
  2147. * This function will detach DP RX into main device context
  2148. * will free DP Rx resources.
  2149. *
  2150. * Return: void
  2151. */
  2152. void
  2153. dp_rx_pdev_detach(struct dp_pdev *pdev)
  2154. {
  2155. uint8_t mac_for_pdev = pdev->lmac_id;
  2156. struct dp_soc *soc = pdev->soc;
  2157. struct rx_desc_pool *rx_desc_pool;
  2158. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2159. if (rx_desc_pool->pool_size != 0) {
  2160. if (!dp_is_soc_reinit(soc))
  2161. dp_rx_desc_nbuf_and_pool_free(soc, mac_for_pdev,
  2162. rx_desc_pool);
  2163. else
  2164. dp_rx_desc_nbuf_free(soc, rx_desc_pool);
  2165. }
  2166. return;
  2167. }
  2168. static QDF_STATUS
  2169. dp_pdev_nbuf_alloc_and_map(struct dp_soc *dp_soc, qdf_nbuf_t *nbuf,
  2170. struct dp_pdev *dp_pdev,
  2171. struct rx_desc_pool *rx_desc_pool)
  2172. {
  2173. qdf_dma_addr_t paddr;
  2174. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  2175. *nbuf = qdf_nbuf_alloc(dp_soc->osdev, rx_desc_pool->buf_size,
  2176. RX_BUFFER_RESERVATION,
  2177. rx_desc_pool->buf_alignment, FALSE);
  2178. if (!(*nbuf)) {
  2179. dp_err("nbuf alloc failed");
  2180. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  2181. return ret;
  2182. }
  2183. ret = qdf_nbuf_map_nbytes_single(dp_soc->osdev, *nbuf,
  2184. QDF_DMA_FROM_DEVICE,
  2185. rx_desc_pool->buf_size);
  2186. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  2187. qdf_nbuf_free(*nbuf);
  2188. dp_err("nbuf map failed");
  2189. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  2190. return ret;
  2191. }
  2192. paddr = qdf_nbuf_get_frag_paddr(*nbuf, 0);
  2193. ret = check_x86_paddr(dp_soc, nbuf, &paddr, rx_desc_pool);
  2194. if (ret == QDF_STATUS_E_FAILURE) {
  2195. qdf_nbuf_unmap_nbytes_single(dp_soc->osdev, *nbuf,
  2196. QDF_DMA_FROM_DEVICE,
  2197. rx_desc_pool->buf_size);
  2198. qdf_nbuf_free(*nbuf);
  2199. dp_err("nbuf check x86 failed");
  2200. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  2201. return ret;
  2202. }
  2203. return QDF_STATUS_SUCCESS;
  2204. }
  2205. QDF_STATUS
  2206. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  2207. struct dp_srng *dp_rxdma_srng,
  2208. struct rx_desc_pool *rx_desc_pool,
  2209. uint32_t num_req_buffers)
  2210. {
  2211. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  2212. hal_ring_handle_t rxdma_srng = dp_rxdma_srng->hal_srng;
  2213. union dp_rx_desc_list_elem_t *next;
  2214. void *rxdma_ring_entry;
  2215. qdf_dma_addr_t paddr;
  2216. qdf_nbuf_t *rx_nbuf_arr;
  2217. uint32_t nr_descs, nr_nbuf = 0, nr_nbuf_total = 0;
  2218. uint32_t buffer_index, nbuf_ptrs_per_page;
  2219. qdf_nbuf_t nbuf;
  2220. QDF_STATUS ret;
  2221. int page_idx, total_pages;
  2222. union dp_rx_desc_list_elem_t *desc_list = NULL;
  2223. union dp_rx_desc_list_elem_t *tail = NULL;
  2224. if (qdf_unlikely(!rxdma_srng)) {
  2225. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  2226. return QDF_STATUS_E_FAILURE;
  2227. }
  2228. dp_debug("requested %u RX buffers for driver attach", num_req_buffers);
  2229. nr_descs = dp_rx_get_free_desc_list(dp_soc, mac_id, rx_desc_pool,
  2230. num_req_buffers, &desc_list, &tail);
  2231. if (!nr_descs) {
  2232. dp_err("no free rx_descs in freelist");
  2233. DP_STATS_INC(dp_pdev, err.desc_alloc_fail, num_req_buffers);
  2234. return QDF_STATUS_E_NOMEM;
  2235. }
  2236. dp_debug("got %u RX descs for driver attach", nr_descs);
  2237. /*
  2238. * Try to allocate pointers to the nbuf one page at a time.
  2239. * Take pointers that can fit in one page of memory and
  2240. * iterate through the total descriptors that need to be
  2241. * allocated in order of pages. Reuse the pointers that
  2242. * have been allocated to fit in one page across each
  2243. * iteration to index into the nbuf.
  2244. */
  2245. total_pages = (nr_descs * sizeof(*rx_nbuf_arr)) / PAGE_SIZE;
  2246. /*
  2247. * Add an extra page to store the remainder if any
  2248. */
  2249. if ((nr_descs * sizeof(*rx_nbuf_arr)) % PAGE_SIZE)
  2250. total_pages++;
  2251. rx_nbuf_arr = qdf_mem_malloc(PAGE_SIZE);
  2252. if (!rx_nbuf_arr) {
  2253. dp_err("failed to allocate nbuf array");
  2254. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  2255. QDF_BUG(0);
  2256. return QDF_STATUS_E_NOMEM;
  2257. }
  2258. nbuf_ptrs_per_page = PAGE_SIZE / sizeof(*rx_nbuf_arr);
  2259. for (page_idx = 0; page_idx < total_pages; page_idx++) {
  2260. qdf_mem_zero(rx_nbuf_arr, PAGE_SIZE);
  2261. for (nr_nbuf = 0; nr_nbuf < nbuf_ptrs_per_page; nr_nbuf++) {
  2262. /*
  2263. * The last page of buffer pointers may not be required
  2264. * completely based on the number of descriptors. Below
  2265. * check will ensure we are allocating only the
  2266. * required number of descriptors.
  2267. */
  2268. if (nr_nbuf_total >= nr_descs)
  2269. break;
  2270. ret = dp_pdev_nbuf_alloc_and_map(dp_soc,
  2271. &rx_nbuf_arr[nr_nbuf],
  2272. dp_pdev, rx_desc_pool);
  2273. if (QDF_IS_STATUS_ERROR(ret))
  2274. break;
  2275. nr_nbuf_total++;
  2276. }
  2277. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  2278. for (buffer_index = 0; buffer_index < nr_nbuf; buffer_index++) {
  2279. rxdma_ring_entry =
  2280. hal_srng_src_get_next(dp_soc->hal_soc,
  2281. rxdma_srng);
  2282. qdf_assert_always(rxdma_ring_entry);
  2283. next = desc_list->next;
  2284. nbuf = rx_nbuf_arr[buffer_index];
  2285. paddr = qdf_nbuf_get_frag_paddr(nbuf, 0);
  2286. dp_rx_desc_prep(&desc_list->rx_desc, nbuf);
  2287. desc_list->rx_desc.in_use = 1;
  2288. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  2289. desc_list->rx_desc.cookie,
  2290. rx_desc_pool->owner);
  2291. dp_ipa_handle_rx_buf_smmu_mapping(dp_soc, nbuf, true);
  2292. desc_list = next;
  2293. }
  2294. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2295. }
  2296. dp_info("filled %u RX buffers for driver attach", nr_nbuf_total);
  2297. qdf_mem_free(rx_nbuf_arr);
  2298. if (!nr_nbuf_total) {
  2299. dp_err("No nbuf's allocated");
  2300. QDF_BUG(0);
  2301. return QDF_STATUS_E_RESOURCES;
  2302. }
  2303. /* No need to count the number of bytes received during replenish.
  2304. * Therefore set replenish.pkts.bytes as 0.
  2305. */
  2306. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, nr_nbuf, 0);
  2307. return QDF_STATUS_SUCCESS;
  2308. }
  2309. /**
  2310. * dp_rx_attach() - attach DP RX
  2311. * @pdev: core txrx pdev context
  2312. *
  2313. * This function will attach a DP RX instance into the main
  2314. * device (SOC) context. Will allocate dp rx resource and
  2315. * initialize resources.
  2316. *
  2317. * Return: QDF_STATUS_SUCCESS: success
  2318. * QDF_STATUS_E_RESOURCES: Error return
  2319. */
  2320. QDF_STATUS
  2321. dp_rx_pdev_attach(struct dp_pdev *pdev)
  2322. {
  2323. uint8_t pdev_id = pdev->pdev_id;
  2324. struct dp_soc *soc = pdev->soc;
  2325. uint32_t rxdma_entries;
  2326. uint32_t rx_sw_desc_weight;
  2327. struct dp_srng *dp_rxdma_srng;
  2328. struct rx_desc_pool *rx_desc_pool;
  2329. QDF_STATUS ret_val;
  2330. int mac_for_pdev;
  2331. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2332. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2333. "nss-wifi<4> skip Rx refil %d", pdev_id);
  2334. return QDF_STATUS_SUCCESS;
  2335. }
  2336. pdev = soc->pdev_list[pdev_id];
  2337. mac_for_pdev = pdev->lmac_id;
  2338. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2339. rxdma_entries = dp_rxdma_srng->num_entries;
  2340. soc->process_rx_status = CONFIG_PROCESS_RX_STATUS;
  2341. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2342. rx_sw_desc_weight = wlan_cfg_get_dp_soc_rx_sw_desc_weight(soc->wlan_cfg_ctx);
  2343. dp_rx_desc_pool_alloc(soc, mac_for_pdev,
  2344. rx_sw_desc_weight * rxdma_entries,
  2345. rx_desc_pool);
  2346. rx_desc_pool->owner = DP_WBM2SW_RBM;
  2347. rx_desc_pool->buf_size = RX_DATA_BUFFER_SIZE;
  2348. rx_desc_pool->buf_alignment = RX_DATA_BUFFER_ALIGNMENT;
  2349. /* For Rx buffers, WBM release ring is SW RING 3,for all pdev's */
  2350. ret_val = dp_rx_fst_attach(soc, pdev);
  2351. if ((ret_val != QDF_STATUS_SUCCESS) &&
  2352. (ret_val != QDF_STATUS_E_NOSUPPORT)) {
  2353. QDF_TRACE(QDF_MODULE_ID_ANY, QDF_TRACE_LEVEL_ERROR,
  2354. "RX Flow Search Table attach failed: pdev %d err %d",
  2355. pdev_id, ret_val);
  2356. return ret_val;
  2357. }
  2358. return dp_pdev_rx_buffers_attach(soc, mac_for_pdev, dp_rxdma_srng,
  2359. rx_desc_pool, rxdma_entries - 1);
  2360. }
  2361. /*
  2362. * dp_rx_nbuf_prepare() - prepare RX nbuf
  2363. * @soc: core txrx main context
  2364. * @pdev: core txrx pdev context
  2365. *
  2366. * This function alloc & map nbuf for RX dma usage, retry it if failed
  2367. * until retry times reaches max threshold or succeeded.
  2368. *
  2369. * Return: qdf_nbuf_t pointer if succeeded, NULL if failed.
  2370. */
  2371. qdf_nbuf_t
  2372. dp_rx_nbuf_prepare(struct dp_soc *soc, struct dp_pdev *pdev)
  2373. {
  2374. uint8_t *buf;
  2375. int32_t nbuf_retry_count;
  2376. QDF_STATUS ret;
  2377. qdf_nbuf_t nbuf = NULL;
  2378. for (nbuf_retry_count = 0; nbuf_retry_count <
  2379. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD;
  2380. nbuf_retry_count++) {
  2381. /* Allocate a new skb */
  2382. nbuf = qdf_nbuf_alloc(soc->osdev,
  2383. RX_DATA_BUFFER_SIZE,
  2384. RX_BUFFER_RESERVATION,
  2385. RX_DATA_BUFFER_ALIGNMENT,
  2386. FALSE);
  2387. if (!nbuf) {
  2388. DP_STATS_INC(pdev,
  2389. replenish.nbuf_alloc_fail, 1);
  2390. continue;
  2391. }
  2392. buf = qdf_nbuf_data(nbuf);
  2393. memset(buf, 0, RX_DATA_BUFFER_SIZE);
  2394. ret = qdf_nbuf_map_nbytes_single(soc->osdev, nbuf,
  2395. QDF_DMA_FROM_DEVICE,
  2396. RX_DATA_BUFFER_SIZE);
  2397. /* nbuf map failed */
  2398. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  2399. qdf_nbuf_free(nbuf);
  2400. DP_STATS_INC(pdev, replenish.map_err, 1);
  2401. continue;
  2402. }
  2403. /* qdf_nbuf alloc and map succeeded */
  2404. break;
  2405. }
  2406. /* qdf_nbuf still alloc or map failed */
  2407. if (qdf_unlikely(nbuf_retry_count >=
  2408. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD))
  2409. return NULL;
  2410. return nbuf;
  2411. }
  2412. #ifdef DP_RX_SPECIAL_FRAME_NEED
  2413. bool dp_rx_deliver_special_frame(struct dp_soc *soc, struct dp_peer *peer,
  2414. qdf_nbuf_t nbuf, uint32_t frame_mask)
  2415. {
  2416. uint32_t l2_hdr_offset = 0;
  2417. uint16_t msdu_len = 0;
  2418. uint32_t pkt_len = 0;
  2419. uint8_t *rx_tlv_hdr;
  2420. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf)))
  2421. return false;
  2422. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  2423. l2_hdr_offset =
  2424. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, rx_tlv_hdr);
  2425. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2426. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  2427. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(nbuf) = 1;
  2428. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  2429. dp_rx_skip_tlvs(nbuf, l2_hdr_offset);
  2430. if (dp_rx_is_special_frame(nbuf, frame_mask)) {
  2431. dp_rx_deliver_to_stack(soc, peer->vdev, peer,
  2432. nbuf, NULL);
  2433. return true;
  2434. }
  2435. return false;
  2436. }
  2437. #endif