sm6150.c 237 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100310131023103310431053106310731083109311031113112311331143115311631173118311931203121312231233124312531263127312831293130313131323133313431353136313731383139314031413142314331443145314631473148314931503151315231533154315531563157315831593160316131623163316431653166316731683169317031713172317331743175317631773178317931803181318231833184318531863187318831893190319131923193319431953196319731983199320032013202320332043205320632073208320932103211321232133214321532163217321832193220322132223223322432253226322732283229323032313232323332343235323632373238323932403241324232433244324532463247324832493250325132523253325432553256325732583259326032613262326332643265326632673268326932703271327232733274327532763277327832793280328132823283328432853286328732883289329032913292329332943295329632973298329933003301330233033304330533063307330833093310331133123313331433153316331733183319332033213322332333243325332633273328332933303331333233333334333533363337333833393340334133423343334433453346334733483349335033513352335333543355335633573358335933603361336233633364336533663367336833693370337133723373337433753376337733783379338033813382338333843385338633873388338933903391339233933394339533963397339833993400340134023403340434053406340734083409341034113412341334143415341634173418341934203421342234233424342534263427342834293430343134323433343434353436343734383439344034413442344334443445344634473448344934503451345234533454345534563457345834593460346134623463346434653466346734683469347034713472347334743475347634773478347934803481348234833484348534863487348834893490349134923493349434953496349734983499350035013502350335043505350635073508350935103511351235133514351535163517351835193520352135223523352435253526352735283529353035313532353335343535353635373538353935403541354235433544354535463547354835493550355135523553355435553556355735583559356035613562356335643565356635673568356935703571357235733574357535763577357835793580358135823583358435853586358735883589359035913592359335943595359635973598359936003601360236033604360536063607360836093610361136123613361436153616361736183619362036213622362336243625362636273628362936303631363236333634363536363637363836393640364136423643364436453646364736483649365036513652365336543655365636573658365936603661366236633664366536663667366836693670367136723673367436753676367736783679368036813682368336843685368636873688368936903691369236933694369536963697369836993700370137023703370437053706370737083709371037113712371337143715371637173718371937203721372237233724372537263727372837293730373137323733373437353736373737383739374037413742374337443745374637473748374937503751375237533754375537563757375837593760376137623763376437653766376737683769377037713772377337743775377637773778377937803781378237833784378537863787378837893790379137923793379437953796379737983799380038013802380338043805380638073808380938103811381238133814381538163817381838193820382138223823382438253826382738283829383038313832383338343835383638373838383938403841384238433844384538463847384838493850385138523853385438553856385738583859386038613862386338643865386638673868386938703871387238733874387538763877387838793880388138823883388438853886388738883889389038913892389338943895389638973898389939003901390239033904390539063907390839093910391139123913391439153916391739183919392039213922392339243925392639273928392939303931393239333934393539363937393839393940394139423943394439453946394739483949395039513952395339543955395639573958395939603961396239633964396539663967396839693970397139723973397439753976397739783979398039813982398339843985398639873988398939903991399239933994399539963997399839994000400140024003400440054006400740084009401040114012401340144015401640174018401940204021402240234024402540264027402840294030403140324033403440354036403740384039404040414042404340444045404640474048404940504051405240534054405540564057405840594060406140624063406440654066406740684069407040714072407340744075407640774078407940804081408240834084408540864087408840894090409140924093409440954096409740984099410041014102410341044105410641074108410941104111411241134114411541164117411841194120412141224123412441254126412741284129413041314132413341344135413641374138413941404141414241434144414541464147414841494150415141524153415441554156415741584159416041614162416341644165416641674168416941704171417241734174417541764177417841794180418141824183418441854186418741884189419041914192419341944195419641974198419942004201420242034204420542064207420842094210421142124213421442154216421742184219422042214222422342244225422642274228422942304231423242334234423542364237423842394240424142424243424442454246424742484249425042514252425342544255425642574258425942604261426242634264426542664267426842694270427142724273427442754276427742784279428042814282428342844285428642874288428942904291429242934294429542964297429842994300430143024303430443054306430743084309431043114312431343144315431643174318431943204321432243234324432543264327432843294330433143324333433443354336433743384339434043414342434343444345434643474348434943504351435243534354435543564357435843594360436143624363436443654366436743684369437043714372437343744375437643774378437943804381438243834384438543864387438843894390439143924393439443954396439743984399440044014402440344044405440644074408440944104411441244134414441544164417441844194420442144224423442444254426442744284429443044314432443344344435443644374438443944404441444244434444444544464447444844494450445144524453445444554456445744584459446044614462446344644465446644674468446944704471447244734474447544764477447844794480448144824483448444854486448744884489449044914492449344944495449644974498449945004501450245034504450545064507450845094510451145124513451445154516451745184519452045214522452345244525452645274528452945304531453245334534453545364537453845394540454145424543454445454546454745484549455045514552455345544555455645574558455945604561456245634564456545664567456845694570457145724573457445754576457745784579458045814582458345844585458645874588458945904591459245934594459545964597459845994600460146024603460446054606460746084609461046114612461346144615461646174618461946204621462246234624462546264627462846294630463146324633463446354636463746384639464046414642464346444645464646474648464946504651465246534654465546564657465846594660466146624663466446654666466746684669467046714672467346744675467646774678467946804681468246834684468546864687468846894690469146924693469446954696469746984699470047014702470347044705470647074708470947104711471247134714471547164717471847194720472147224723472447254726472747284729473047314732473347344735473647374738473947404741474247434744474547464747474847494750475147524753475447554756475747584759476047614762476347644765476647674768476947704771477247734774477547764777477847794780478147824783478447854786478747884789479047914792479347944795479647974798479948004801480248034804480548064807480848094810481148124813481448154816481748184819482048214822482348244825482648274828482948304831483248334834483548364837483848394840484148424843484448454846484748484849485048514852485348544855485648574858485948604861486248634864486548664867486848694870487148724873487448754876487748784879488048814882488348844885488648874888488948904891489248934894489548964897489848994900490149024903490449054906490749084909491049114912491349144915491649174918491949204921492249234924492549264927492849294930493149324933493449354936493749384939494049414942494349444945494649474948494949504951495249534954495549564957495849594960496149624963496449654966496749684969497049714972497349744975497649774978497949804981498249834984498549864987498849894990499149924993499449954996499749984999500050015002500350045005500650075008500950105011501250135014501550165017501850195020502150225023502450255026502750285029503050315032503350345035503650375038503950405041504250435044504550465047504850495050505150525053505450555056505750585059506050615062506350645065506650675068506950705071507250735074507550765077507850795080508150825083508450855086508750885089509050915092509350945095509650975098509951005101510251035104510551065107510851095110511151125113511451155116511751185119512051215122512351245125512651275128512951305131513251335134513551365137513851395140514151425143514451455146514751485149515051515152515351545155515651575158515951605161516251635164516551665167516851695170517151725173517451755176517751785179518051815182518351845185518651875188518951905191519251935194519551965197519851995200520152025203520452055206520752085209521052115212521352145215521652175218521952205221522252235224522552265227522852295230523152325233523452355236523752385239524052415242524352445245524652475248524952505251525252535254525552565257525852595260526152625263526452655266526752685269527052715272527352745275527652775278527952805281528252835284528552865287528852895290529152925293529452955296529752985299530053015302530353045305530653075308530953105311531253135314531553165317531853195320532153225323532453255326532753285329533053315332533353345335533653375338533953405341534253435344534553465347534853495350535153525353535453555356535753585359536053615362536353645365536653675368536953705371537253735374537553765377537853795380538153825383538453855386538753885389539053915392539353945395539653975398539954005401540254035404540554065407540854095410541154125413541454155416541754185419542054215422542354245425542654275428542954305431543254335434543554365437543854395440544154425443544454455446544754485449545054515452545354545455545654575458545954605461546254635464546554665467546854695470547154725473547454755476547754785479548054815482548354845485548654875488548954905491549254935494549554965497549854995500550155025503550455055506550755085509551055115512551355145515551655175518551955205521552255235524552555265527552855295530553155325533553455355536553755385539554055415542554355445545554655475548554955505551555255535554555555565557555855595560556155625563556455655566556755685569557055715572557355745575557655775578557955805581558255835584558555865587558855895590559155925593559455955596559755985599560056015602560356045605560656075608560956105611561256135614561556165617561856195620562156225623562456255626562756285629563056315632563356345635563656375638563956405641564256435644564556465647564856495650565156525653565456555656565756585659566056615662566356645665566656675668566956705671567256735674567556765677567856795680568156825683568456855686568756885689569056915692569356945695569656975698569957005701570257035704570557065707570857095710571157125713571457155716571757185719572057215722572357245725572657275728572957305731573257335734573557365737573857395740574157425743574457455746574757485749575057515752575357545755575657575758575957605761576257635764576557665767576857695770577157725773577457755776577757785779578057815782578357845785578657875788578957905791579257935794579557965797579857995800580158025803580458055806580758085809581058115812581358145815581658175818581958205821582258235824582558265827582858295830583158325833583458355836583758385839584058415842584358445845584658475848584958505851585258535854585558565857585858595860586158625863586458655866586758685869587058715872587358745875587658775878587958805881588258835884588558865887588858895890589158925893589458955896589758985899590059015902590359045905590659075908590959105911591259135914591559165917591859195920592159225923592459255926592759285929593059315932593359345935593659375938593959405941594259435944594559465947594859495950595159525953595459555956595759585959596059615962596359645965596659675968596959705971597259735974597559765977597859795980598159825983598459855986598759885989599059915992599359945995599659975998599960006001600260036004600560066007600860096010601160126013601460156016601760186019602060216022602360246025602660276028602960306031603260336034603560366037603860396040604160426043604460456046604760486049605060516052605360546055605660576058605960606061606260636064606560666067606860696070607160726073607460756076607760786079608060816082608360846085608660876088608960906091609260936094609560966097609860996100610161026103610461056106610761086109611061116112611361146115611661176118611961206121612261236124612561266127612861296130613161326133613461356136613761386139614061416142614361446145614661476148614961506151615261536154615561566157615861596160616161626163616461656166616761686169617061716172617361746175617661776178617961806181618261836184618561866187618861896190619161926193619461956196619761986199620062016202620362046205620662076208620962106211621262136214621562166217621862196220622162226223622462256226622762286229623062316232623362346235623662376238623962406241624262436244624562466247624862496250625162526253625462556256625762586259626062616262626362646265626662676268626962706271627262736274627562766277627862796280628162826283628462856286628762886289629062916292629362946295629662976298629963006301630263036304630563066307630863096310631163126313631463156316631763186319632063216322632363246325632663276328632963306331633263336334633563366337633863396340634163426343634463456346634763486349635063516352635363546355635663576358635963606361636263636364636563666367636863696370637163726373637463756376637763786379638063816382638363846385638663876388638963906391639263936394639563966397639863996400640164026403640464056406640764086409641064116412641364146415641664176418641964206421642264236424642564266427642864296430643164326433643464356436643764386439644064416442644364446445644664476448644964506451645264536454645564566457645864596460646164626463646464656466646764686469647064716472647364746475647664776478647964806481648264836484648564866487648864896490649164926493649464956496649764986499650065016502650365046505650665076508650965106511651265136514651565166517651865196520652165226523652465256526652765286529653065316532653365346535653665376538653965406541654265436544654565466547654865496550655165526553655465556556655765586559656065616562656365646565656665676568656965706571657265736574657565766577657865796580658165826583658465856586658765886589659065916592659365946595659665976598659966006601660266036604660566066607660866096610661166126613661466156616661766186619662066216622662366246625662666276628662966306631663266336634663566366637663866396640664166426643664466456646664766486649665066516652665366546655665666576658665966606661666266636664666566666667666866696670667166726673667466756676667766786679668066816682668366846685668666876688668966906691669266936694669566966697669866996700670167026703670467056706670767086709671067116712671367146715671667176718671967206721672267236724672567266727672867296730673167326733673467356736673767386739674067416742674367446745674667476748674967506751675267536754675567566757675867596760676167626763676467656766676767686769677067716772677367746775677667776778677967806781678267836784678567866787678867896790679167926793679467956796679767986799680068016802680368046805680668076808680968106811681268136814681568166817681868196820682168226823682468256826682768286829683068316832683368346835683668376838683968406841684268436844684568466847684868496850685168526853685468556856685768586859686068616862686368646865686668676868686968706871687268736874687568766877687868796880688168826883688468856886688768886889689068916892689368946895689668976898689969006901690269036904690569066907690869096910691169126913691469156916691769186919692069216922692369246925692669276928692969306931693269336934693569366937693869396940694169426943694469456946694769486949695069516952695369546955695669576958695969606961696269636964696569666967696869696970697169726973697469756976697769786979698069816982698369846985698669876988698969906991699269936994699569966997699869997000700170027003700470057006700770087009701070117012701370147015701670177018701970207021702270237024702570267027702870297030703170327033703470357036703770387039704070417042704370447045704670477048704970507051705270537054705570567057705870597060706170627063706470657066706770687069707070717072707370747075707670777078707970807081708270837084708570867087708870897090709170927093709470957096709770987099710071017102710371047105710671077108710971107111711271137114711571167117711871197120712171227123712471257126712771287129713071317132713371347135713671377138713971407141714271437144714571467147714871497150715171527153715471557156715771587159716071617162716371647165716671677168716971707171717271737174717571767177717871797180718171827183718471857186718771887189719071917192719371947195719671977198719972007201720272037204720572067207720872097210721172127213721472157216721772187219722072217222722372247225722672277228722972307231723272337234723572367237723872397240724172427243724472457246724772487249725072517252725372547255725672577258725972607261726272637264726572667267726872697270727172727273727472757276727772787279728072817282728372847285728672877288728972907291729272937294729572967297729872997300730173027303730473057306730773087309731073117312731373147315731673177318731973207321732273237324732573267327732873297330733173327333733473357336733773387339734073417342734373447345734673477348734973507351735273537354735573567357735873597360736173627363736473657366736773687369737073717372737373747375737673777378737973807381738273837384738573867387738873897390739173927393739473957396739773987399740074017402740374047405740674077408740974107411741274137414741574167417741874197420742174227423742474257426742774287429743074317432743374347435743674377438743974407441744274437444744574467447744874497450745174527453745474557456745774587459746074617462746374647465746674677468746974707471747274737474747574767477747874797480748174827483748474857486748774887489749074917492749374947495749674977498749975007501750275037504750575067507750875097510751175127513751475157516751775187519752075217522752375247525752675277528752975307531753275337534753575367537753875397540754175427543754475457546754775487549755075517552755375547555755675577558755975607561756275637564756575667567756875697570757175727573757475757576757775787579758075817582758375847585758675877588758975907591759275937594759575967597759875997600760176027603760476057606760776087609761076117612761376147615761676177618761976207621762276237624762576267627762876297630763176327633763476357636763776387639764076417642764376447645764676477648764976507651765276537654765576567657765876597660766176627663766476657666766776687669767076717672767376747675767676777678767976807681768276837684768576867687768876897690769176927693769476957696769776987699770077017702770377047705770677077708770977107711771277137714771577167717771877197720772177227723772477257726772777287729773077317732773377347735773677377738773977407741774277437744774577467747774877497750775177527753775477557756775777587759776077617762776377647765776677677768776977707771777277737774777577767777777877797780778177827783778477857786778777887789779077917792779377947795779677977798779978007801780278037804780578067807780878097810781178127813781478157816781778187819782078217822782378247825782678277828782978307831783278337834783578367837783878397840784178427843784478457846784778487849785078517852785378547855785678577858785978607861786278637864786578667867786878697870787178727873787478757876787778787879788078817882788378847885788678877888788978907891789278937894789578967897789878997900790179027903790479057906790779087909791079117912791379147915791679177918791979207921792279237924792579267927792879297930793179327933793479357936793779387939794079417942794379447945794679477948794979507951795279537954795579567957795879597960796179627963796479657966796779687969797079717972797379747975797679777978797979807981798279837984798579867987798879897990799179927993799479957996799779987999800080018002800380048005800680078008800980108011801280138014801580168017801880198020802180228023802480258026802780288029803080318032803380348035803680378038803980408041804280438044804580468047804880498050805180528053805480558056805780588059806080618062806380648065806680678068806980708071807280738074807580768077807880798080808180828083808480858086808780888089809080918092809380948095809680978098809981008101810281038104810581068107810881098110811181128113811481158116811781188119812081218122812381248125812681278128812981308131813281338134813581368137813881398140814181428143814481458146814781488149815081518152815381548155815681578158815981608161816281638164816581668167816881698170817181728173817481758176817781788179818081818182818381848185818681878188818981908191819281938194819581968197819881998200820182028203820482058206820782088209821082118212821382148215821682178218821982208221822282238224822582268227822882298230823182328233823482358236823782388239824082418242824382448245824682478248824982508251825282538254825582568257825882598260826182628263826482658266826782688269827082718272827382748275827682778278827982808281828282838284828582868287828882898290829182928293829482958296829782988299830083018302830383048305830683078308830983108311831283138314831583168317831883198320832183228323832483258326832783288329833083318332833383348335833683378338833983408341834283438344834583468347834883498350835183528353835483558356835783588359836083618362836383648365836683678368836983708371837283738374837583768377837883798380838183828383838483858386838783888389839083918392839383948395839683978398839984008401840284038404840584068407840884098410841184128413841484158416841784188419842084218422842384248425842684278428842984308431843284338434843584368437843884398440844184428443
  1. /*
  2. * Copyright (c) 2018, The Linux Foundation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 and
  6. * only version 2 as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. #include <linux/clk.h>
  14. #include <linux/delay.h>
  15. #include <linux/gpio.h>
  16. #include <linux/of_gpio.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/slab.h>
  19. #include <linux/io.h>
  20. #include <linux/module.h>
  21. #include <linux/input.h>
  22. #include <linux/of_device.h>
  23. #include <linux/pm_qos.h>
  24. #include <sound/core.h>
  25. #include <sound/soc.h>
  26. #include <sound/soc-dapm.h>
  27. #include <sound/pcm.h>
  28. #include <sound/pcm_params.h>
  29. #include <sound/info.h>
  30. #include <dsp/audio_notifier.h>
  31. #include <dsp/q6afe-v2.h>
  32. #include <dsp/q6core.h>
  33. #include "device_event.h"
  34. #include "msm-pcm-routing-v2.h"
  35. #include "codecs/msm-cdc-pinctrl.h"
  36. #include "codecs/wcd934x/wcd934x.h"
  37. #include "codecs/wcd934x/wcd934x-mbhc.h"
  38. #include "codecs/wsa881x.h"
  39. #include "codecs/bolero/bolero-cdc.h"
  40. #include <dt-bindings/sound/audio-codec-port-types.h>
  41. #include "codecs/bolero/wsa-macro.h"
  42. #define DRV_NAME "sm6150-asoc-snd"
  43. #define __CHIPSET__ "SM6150 "
  44. #define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
  45. #define SAMPLING_RATE_8KHZ 8000
  46. #define SAMPLING_RATE_11P025KHZ 11025
  47. #define SAMPLING_RATE_16KHZ 16000
  48. #define SAMPLING_RATE_22P05KHZ 22050
  49. #define SAMPLING_RATE_32KHZ 32000
  50. #define SAMPLING_RATE_44P1KHZ 44100
  51. #define SAMPLING_RATE_48KHZ 48000
  52. #define SAMPLING_RATE_88P2KHZ 88200
  53. #define SAMPLING_RATE_96KHZ 96000
  54. #define SAMPLING_RATE_176P4KHZ 176400
  55. #define SAMPLING_RATE_192KHZ 192000
  56. #define SAMPLING_RATE_352P8KHZ 352800
  57. #define SAMPLING_RATE_384KHZ 384000
  58. #define WCD9XXX_MBHC_DEF_BUTTONS 8
  59. #define WCD9XXX_MBHC_DEF_RLOADS 5
  60. #define CODEC_EXT_CLK_RATE 9600000
  61. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  62. #define DEV_NAME_STR_LEN 32
  63. #define WSA8810_NAME_1 "wsa881x.20170211"
  64. #define WSA8810_NAME_2 "wsa881x.20170212"
  65. #define WCN_CDC_SLIM_RX_CH_MAX 2
  66. #define WCN_CDC_SLIM_TX_CH_MAX 3
  67. #define TDM_CHANNEL_MAX 8
  68. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  69. #define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
  70. #define MSM_HIFI_ON 1
  71. enum {
  72. SLIM_RX_0 = 0,
  73. SLIM_RX_1,
  74. SLIM_RX_2,
  75. SLIM_RX_3,
  76. SLIM_RX_4,
  77. SLIM_RX_5,
  78. SLIM_RX_6,
  79. SLIM_RX_7,
  80. SLIM_RX_MAX,
  81. };
  82. enum {
  83. SLIM_TX_0 = 0,
  84. SLIM_TX_1,
  85. SLIM_TX_2,
  86. SLIM_TX_3,
  87. SLIM_TX_4,
  88. SLIM_TX_5,
  89. SLIM_TX_6,
  90. SLIM_TX_7,
  91. SLIM_TX_8,
  92. SLIM_TX_MAX,
  93. };
  94. enum {
  95. PRIM_MI2S = 0,
  96. SEC_MI2S,
  97. TERT_MI2S,
  98. QUAT_MI2S,
  99. QUIN_MI2S,
  100. MI2S_MAX,
  101. };
  102. enum {
  103. PRIM_AUX_PCM = 0,
  104. SEC_AUX_PCM,
  105. TERT_AUX_PCM,
  106. QUAT_AUX_PCM,
  107. QUIN_AUX_PCM,
  108. AUX_PCM_MAX,
  109. };
  110. enum {
  111. WSA_CDC_DMA_RX_0 = 0,
  112. WSA_CDC_DMA_RX_1,
  113. RX_CDC_DMA_RX_0,
  114. RX_CDC_DMA_RX_1,
  115. RX_CDC_DMA_RX_2,
  116. RX_CDC_DMA_RX_3,
  117. RX_CDC_DMA_RX_5,
  118. CDC_DMA_RX_MAX,
  119. };
  120. enum {
  121. WSA_CDC_DMA_TX_0 = 0,
  122. WSA_CDC_DMA_TX_1,
  123. WSA_CDC_DMA_TX_2,
  124. TX_CDC_DMA_TX_0,
  125. TX_CDC_DMA_TX_3,
  126. TX_CDC_DMA_TX_4,
  127. CDC_DMA_TX_MAX,
  128. };
  129. struct mi2s_conf {
  130. struct mutex lock;
  131. u32 ref_cnt;
  132. u32 msm_is_mi2s_master;
  133. };
  134. static u32 mi2s_ebit_clk[MI2S_MAX] = {
  135. Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
  136. Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
  137. Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
  138. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT,
  139. Q6AFE_LPASS_CLK_ID_QUI_MI2S_EBIT
  140. };
  141. struct dev_config {
  142. u32 sample_rate;
  143. u32 bit_format;
  144. u32 channels;
  145. };
  146. enum {
  147. DP_RX_IDX = 0,
  148. EXT_DISP_RX_IDX_MAX,
  149. };
  150. struct msm_wsa881x_dev_info {
  151. struct device_node *of_node;
  152. u32 index;
  153. };
  154. struct aux_codec_dev_info {
  155. struct device_node *of_node;
  156. u32 index;
  157. };
  158. enum pinctrl_pin_state {
  159. STATE_DISABLE = 0, /* All pins are in sleep state */
  160. STATE_MI2S_ACTIVE, /* I2S = active, TDM = sleep */
  161. STATE_TDM_ACTIVE, /* I2S = sleep, TDM = active */
  162. };
  163. struct msm_pinctrl_info {
  164. struct pinctrl *pinctrl;
  165. struct pinctrl_state *mi2s_disable;
  166. struct pinctrl_state *tdm_disable;
  167. struct pinctrl_state *mi2s_active;
  168. struct pinctrl_state *tdm_active;
  169. enum pinctrl_pin_state curr_state;
  170. };
  171. struct msm_asoc_mach_data {
  172. struct snd_info_entry *codec_root;
  173. struct msm_pinctrl_info pinctrl_info;
  174. int usbc_en2_gpio; /* used by gpio driver API */
  175. struct device_node *dmic01_gpio_p; /* used by pinctrl API */
  176. struct device_node *dmic23_gpio_p; /* used by pinctrl API */
  177. struct device_node *us_euro_gpio_p; /* used by pinctrl API */
  178. struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
  179. struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
  180. struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
  181. };
  182. struct msm_asoc_wcd93xx_codec {
  183. void* (*get_afe_config_fn)(struct snd_soc_codec *codec,
  184. enum afe_config_type config_type);
  185. };
  186. static const char *const pin_states[] = {"sleep", "i2s-active",
  187. "tdm-active"};
  188. static struct snd_soc_card snd_soc_card_sm6150_msm;
  189. enum {
  190. TDM_0 = 0,
  191. TDM_1,
  192. TDM_2,
  193. TDM_3,
  194. TDM_4,
  195. TDM_5,
  196. TDM_6,
  197. TDM_7,
  198. TDM_PORT_MAX,
  199. };
  200. enum {
  201. TDM_PRI = 0,
  202. TDM_SEC,
  203. TDM_TERT,
  204. TDM_QUAT,
  205. TDM_QUIN,
  206. TDM_INTERFACE_MAX,
  207. };
  208. struct tdm_port {
  209. u32 mode;
  210. u32 channel;
  211. };
  212. /* TDM default config */
  213. static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  214. { /* PRI TDM */
  215. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  216. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  217. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  218. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  219. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  220. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  221. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  222. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  223. },
  224. { /* SEC TDM */
  225. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  226. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  227. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  228. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  229. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  230. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  231. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  232. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  233. },
  234. { /* TERT TDM */
  235. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  236. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  237. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  238. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  239. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  240. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  241. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  242. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  243. },
  244. { /* QUAT TDM */
  245. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  246. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  247. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  248. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  249. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  250. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  251. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  252. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  253. },
  254. { /* QUIN TDM */
  255. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  256. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  257. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  258. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  259. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  260. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  261. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  262. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  263. }
  264. };
  265. /* TDM default config */
  266. static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  267. { /* PRI TDM */
  268. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  269. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  270. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  271. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  272. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  273. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  274. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  275. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  276. },
  277. { /* SEC TDM */
  278. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  279. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  280. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  281. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  282. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  283. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  284. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  285. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  286. },
  287. { /* TERT TDM */
  288. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  289. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  290. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  291. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  292. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  293. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  294. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  295. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  296. },
  297. { /* QUAT TDM */
  298. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  299. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  300. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  301. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  302. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  303. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  304. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  305. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  306. },
  307. { /* QUIN TDM */
  308. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  309. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  310. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  311. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  312. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  313. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  314. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  315. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  316. }
  317. };
  318. /* Default configuration of slimbus channels */
  319. static struct dev_config slim_rx_cfg[] = {
  320. [SLIM_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  321. [SLIM_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  322. [SLIM_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  323. [SLIM_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  324. [SLIM_RX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  325. [SLIM_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  326. [SLIM_RX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  327. [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  328. };
  329. static struct dev_config slim_tx_cfg[] = {
  330. [SLIM_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  331. [SLIM_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  332. [SLIM_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  333. [SLIM_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  334. [SLIM_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  335. [SLIM_TX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  336. [SLIM_TX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  337. [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  338. [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  339. };
  340. /* Default configuration of Codec DMA Interface Tx */
  341. static struct dev_config cdc_dma_rx_cfg[] = {
  342. [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  343. [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  344. [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  345. [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  346. [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  347. [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  348. [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  349. };
  350. /* Default configuration of Codec DMA Interface Rx */
  351. static struct dev_config cdc_dma_tx_cfg[] = {
  352. [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  353. [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  354. [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  355. [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  356. [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  357. [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  358. };
  359. /* Default configuration of external display BE */
  360. static struct dev_config ext_disp_rx_cfg[] = {
  361. [DP_RX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  362. };
  363. static struct dev_config usb_rx_cfg = {
  364. .sample_rate = SAMPLING_RATE_48KHZ,
  365. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  366. .channels = 2,
  367. };
  368. static struct dev_config usb_tx_cfg = {
  369. .sample_rate = SAMPLING_RATE_48KHZ,
  370. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  371. .channels = 1,
  372. };
  373. static struct dev_config proxy_rx_cfg = {
  374. .sample_rate = SAMPLING_RATE_48KHZ,
  375. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  376. .channels = 2,
  377. };
  378. /* Default configuration of MI2S channels */
  379. static struct dev_config mi2s_rx_cfg[] = {
  380. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  381. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  382. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  383. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  384. [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  385. };
  386. static struct dev_config mi2s_tx_cfg[] = {
  387. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  388. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  389. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  390. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  391. [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  392. };
  393. static struct dev_config aux_pcm_rx_cfg[] = {
  394. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  395. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  396. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  397. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  398. [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  399. };
  400. static struct dev_config aux_pcm_tx_cfg[] = {
  401. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  402. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  403. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  404. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  405. [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  406. };
  407. static int msm_vi_feed_tx_ch = 2;
  408. static const char *const slim_rx_ch_text[] = {"One", "Two"};
  409. static const char *const slim_tx_ch_text[] = {"One", "Two", "Three", "Four",
  410. "Five", "Six", "Seven",
  411. "Eight"};
  412. static const char *const vi_feed_ch_text[] = {"One", "Two"};
  413. static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
  414. "S32_LE"};
  415. static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
  416. "S24_3LE"};
  417. static char const *slim_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  418. "KHZ_32", "KHZ_44P1", "KHZ_48",
  419. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  420. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  421. static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  422. "KHZ_44P1", "KHZ_48",
  423. "KHZ_88P2", "KHZ_96"};
  424. static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
  425. "Five", "Six", "Seven",
  426. "Eight"};
  427. static char const *ch_text[] = {"Two", "Three", "Four", "Five",
  428. "Six", "Seven", "Eight"};
  429. static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  430. "KHZ_16", "KHZ_22P05",
  431. "KHZ_32", "KHZ_44P1", "KHZ_48",
  432. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  433. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  434. static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
  435. "KHZ_192", "KHZ_32", "KHZ_44P1",
  436. "KHZ_88P2", "KHZ_176P4" };
  437. static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
  438. "Five", "Six", "Seven", "Eight"};
  439. static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
  440. static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
  441. "KHZ_48", "KHZ_176P4",
  442. "KHZ_352P8"};
  443. static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
  444. static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
  445. "KHZ_22P05", "KHZ_32", "KHZ_44P1",
  446. "KHZ_48", "KHZ_96", "KHZ_192"};
  447. static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
  448. "Five", "Six", "Seven",
  449. "Eight"};
  450. static const char *const hifi_text[] = {"Off", "On"};
  451. static const char *const qos_text[] = {"Disable", "Enable"};
  452. static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
  453. static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
  454. "Five", "Six", "Seven",
  455. "Eight"};
  456. static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  457. "KHZ_16", "KHZ_22P05",
  458. "KHZ_32", "KHZ_44P1", "KHZ_48",
  459. "KHZ_88P2", "KHZ_96",
  460. "KHZ_176P4", "KHZ_192",
  461. "KHZ_352P8", "KHZ_384"};
  462. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_chs, slim_rx_ch_text);
  463. static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_chs, slim_rx_ch_text);
  464. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_chs, slim_tx_ch_text);
  465. static SOC_ENUM_SINGLE_EXT_DECL(slim_1_tx_chs, slim_tx_ch_text);
  466. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_chs, slim_rx_ch_text);
  467. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_chs, slim_rx_ch_text);
  468. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
  469. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
  470. static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
  471. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
  472. static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
  473. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_format, bit_format_text);
  474. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_format, bit_format_text);
  475. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_format, bit_format_text);
  476. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_format, bit_format_text);
  477. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
  478. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
  479. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
  480. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_sample_rate, slim_sample_rate_text);
  481. static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_sample_rate, slim_sample_rate_text);
  482. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_sample_rate, slim_sample_rate_text);
  483. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_sample_rate, slim_sample_rate_text);
  484. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_sample_rate, slim_sample_rate_text);
  485. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
  486. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
  487. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
  488. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
  489. ext_disp_sample_rate_text);
  490. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
  491. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
  492. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
  493. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
  494. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
  495. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
  496. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  497. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  498. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  499. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  500. static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  501. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  502. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  503. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  504. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  505. static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  506. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
  507. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
  508. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
  509. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
  510. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
  511. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
  512. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
  513. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
  514. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
  515. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
  516. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
  517. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
  518. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
  519. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
  520. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
  521. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
  522. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
  523. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
  524. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
  525. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
  526. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
  527. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
  528. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
  529. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
  530. static SOC_ENUM_SINGLE_EXT_DECL(hifi_function, hifi_text);
  531. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  532. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  533. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  534. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  535. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
  536. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
  537. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
  538. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  539. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
  540. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
  541. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  542. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
  543. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
  544. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
  545. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
  546. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
  547. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
  548. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
  549. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
  550. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
  551. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
  552. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
  553. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
  554. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
  555. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
  556. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
  557. cdc_dma_sample_rate_text);
  558. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
  559. cdc_dma_sample_rate_text);
  560. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
  561. cdc_dma_sample_rate_text);
  562. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
  563. cdc_dma_sample_rate_text);
  564. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
  565. cdc_dma_sample_rate_text);
  566. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
  567. cdc_dma_sample_rate_text);
  568. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
  569. cdc_dma_sample_rate_text);
  570. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
  571. cdc_dma_sample_rate_text);
  572. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
  573. cdc_dma_sample_rate_text);
  574. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
  575. cdc_dma_sample_rate_text);
  576. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
  577. cdc_dma_sample_rate_text);
  578. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
  579. cdc_dma_sample_rate_text);
  580. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
  581. cdc_dma_sample_rate_text);
  582. static struct platform_device *spdev;
  583. static int msm_hifi_control;
  584. static bool is_initial_boot;
  585. static bool codec_reg_done;
  586. static struct snd_soc_aux_dev *msm_aux_dev;
  587. static struct snd_soc_codec_conf *msm_codec_conf;
  588. static struct msm_asoc_wcd93xx_codec msm_codec_fn;
  589. static int dmic_0_1_gpio_cnt;
  590. static int dmic_2_3_gpio_cnt;
  591. static void *def_wcd_mbhc_cal(void);
  592. static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
  593. int enable, bool dapm);
  594. static int msm_wsa881x_init(struct snd_soc_component *component);
  595. static int msm_aux_codec_init(struct snd_soc_component *component);
  596. /*
  597. * Need to report LINEIN
  598. * if R/L channel impedance is larger than 5K ohm
  599. */
  600. static struct wcd_mbhc_config wcd_mbhc_cfg = {
  601. .read_fw_bin = false,
  602. .calibration = NULL,
  603. .detect_extn_cable = true,
  604. .mono_stero_detection = false,
  605. .swap_gnd_mic = NULL,
  606. .hs_ext_micbias = true,
  607. .key_code[0] = KEY_MEDIA,
  608. .key_code[1] = KEY_VOICECOMMAND,
  609. .key_code[2] = KEY_VOLUMEUP,
  610. .key_code[3] = KEY_VOLUMEDOWN,
  611. .key_code[4] = 0,
  612. .key_code[5] = 0,
  613. .key_code[6] = 0,
  614. .key_code[7] = 0,
  615. .linein_th = 5000,
  616. .moisture_en = true,
  617. .mbhc_micbias = MIC_BIAS_2,
  618. .anc_micbias = MIC_BIAS_2,
  619. .enable_anc_mic_detect = false,
  620. };
  621. static struct snd_soc_dapm_route wcd_audio_paths_tavil[] = {
  622. {"MIC BIAS1", NULL, "MCLK TX"},
  623. {"MIC BIAS2", NULL, "MCLK TX"},
  624. {"MIC BIAS3", NULL, "MCLK TX"},
  625. {"MIC BIAS4", NULL, "MCLK TX"},
  626. };
  627. static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
  628. {
  629. AFE_API_VERSION_I2S_CONFIG,
  630. Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
  631. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  632. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  633. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  634. 0,
  635. },
  636. {
  637. AFE_API_VERSION_I2S_CONFIG,
  638. Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
  639. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  640. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  641. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  642. 0,
  643. },
  644. {
  645. AFE_API_VERSION_I2S_CONFIG,
  646. Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
  647. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  648. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  649. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  650. 0,
  651. },
  652. {
  653. AFE_API_VERSION_I2S_CONFIG,
  654. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
  655. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  656. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  657. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  658. 0,
  659. },
  660. {
  661. AFE_API_VERSION_I2S_CONFIG,
  662. Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
  663. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  664. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  665. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  666. 0,
  667. }
  668. };
  669. static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
  670. static int slim_get_sample_rate_val(int sample_rate)
  671. {
  672. int sample_rate_val = 0;
  673. switch (sample_rate) {
  674. case SAMPLING_RATE_8KHZ:
  675. sample_rate_val = 0;
  676. break;
  677. case SAMPLING_RATE_16KHZ:
  678. sample_rate_val = 1;
  679. break;
  680. case SAMPLING_RATE_32KHZ:
  681. sample_rate_val = 2;
  682. break;
  683. case SAMPLING_RATE_44P1KHZ:
  684. sample_rate_val = 3;
  685. break;
  686. case SAMPLING_RATE_48KHZ:
  687. sample_rate_val = 4;
  688. break;
  689. case SAMPLING_RATE_88P2KHZ:
  690. sample_rate_val = 5;
  691. break;
  692. case SAMPLING_RATE_96KHZ:
  693. sample_rate_val = 6;
  694. break;
  695. case SAMPLING_RATE_176P4KHZ:
  696. sample_rate_val = 7;
  697. break;
  698. case SAMPLING_RATE_192KHZ:
  699. sample_rate_val = 8;
  700. break;
  701. case SAMPLING_RATE_352P8KHZ:
  702. sample_rate_val = 9;
  703. break;
  704. case SAMPLING_RATE_384KHZ:
  705. sample_rate_val = 10;
  706. break;
  707. default:
  708. sample_rate_val = 4;
  709. break;
  710. }
  711. return sample_rate_val;
  712. }
  713. static int slim_get_sample_rate(int value)
  714. {
  715. int sample_rate = 0;
  716. switch (value) {
  717. case 0:
  718. sample_rate = SAMPLING_RATE_8KHZ;
  719. break;
  720. case 1:
  721. sample_rate = SAMPLING_RATE_16KHZ;
  722. break;
  723. case 2:
  724. sample_rate = SAMPLING_RATE_32KHZ;
  725. break;
  726. case 3:
  727. sample_rate = SAMPLING_RATE_44P1KHZ;
  728. break;
  729. case 4:
  730. sample_rate = SAMPLING_RATE_48KHZ;
  731. break;
  732. case 5:
  733. sample_rate = SAMPLING_RATE_88P2KHZ;
  734. break;
  735. case 6:
  736. sample_rate = SAMPLING_RATE_96KHZ;
  737. break;
  738. case 7:
  739. sample_rate = SAMPLING_RATE_176P4KHZ;
  740. break;
  741. case 8:
  742. sample_rate = SAMPLING_RATE_192KHZ;
  743. break;
  744. case 9:
  745. sample_rate = SAMPLING_RATE_352P8KHZ;
  746. break;
  747. case 10:
  748. sample_rate = SAMPLING_RATE_384KHZ;
  749. break;
  750. default:
  751. sample_rate = SAMPLING_RATE_48KHZ;
  752. break;
  753. }
  754. return sample_rate;
  755. }
  756. static int slim_get_bit_format_val(int bit_format)
  757. {
  758. int val = 0;
  759. switch (bit_format) {
  760. case SNDRV_PCM_FORMAT_S32_LE:
  761. val = 3;
  762. break;
  763. case SNDRV_PCM_FORMAT_S24_3LE:
  764. val = 2;
  765. break;
  766. case SNDRV_PCM_FORMAT_S24_LE:
  767. val = 1;
  768. break;
  769. case SNDRV_PCM_FORMAT_S16_LE:
  770. default:
  771. val = 0;
  772. break;
  773. }
  774. return val;
  775. }
  776. static int slim_get_bit_format(int val)
  777. {
  778. int bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  779. switch (val) {
  780. case 0:
  781. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  782. break;
  783. case 1:
  784. bit_fmt = SNDRV_PCM_FORMAT_S24_LE;
  785. break;
  786. case 2:
  787. bit_fmt = SNDRV_PCM_FORMAT_S24_3LE;
  788. break;
  789. case 3:
  790. bit_fmt = SNDRV_PCM_FORMAT_S32_LE;
  791. break;
  792. default:
  793. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  794. break;
  795. }
  796. return bit_fmt;
  797. }
  798. static int slim_get_port_idx(struct snd_kcontrol *kcontrol)
  799. {
  800. int port_id = 0;
  801. if (strnstr(kcontrol->id.name, "SLIM_0_RX", sizeof("SLIM_0_RX"))) {
  802. port_id = SLIM_RX_0;
  803. } else if (strnstr(kcontrol->id.name,
  804. "SLIM_2_RX", sizeof("SLIM_2_RX"))) {
  805. port_id = SLIM_RX_2;
  806. } else if (strnstr(kcontrol->id.name,
  807. "SLIM_5_RX", sizeof("SLIM_5_RX"))) {
  808. port_id = SLIM_RX_5;
  809. } else if (strnstr(kcontrol->id.name,
  810. "SLIM_6_RX", sizeof("SLIM_6_RX"))) {
  811. port_id = SLIM_RX_6;
  812. } else if (strnstr(kcontrol->id.name,
  813. "SLIM_0_TX", sizeof("SLIM_0_TX"))) {
  814. port_id = SLIM_TX_0;
  815. } else if (strnstr(kcontrol->id.name,
  816. "SLIM_1_TX", sizeof("SLIM_1_TX"))) {
  817. port_id = SLIM_TX_1;
  818. } else {
  819. pr_err("%s: unsupported channel: %s\n",
  820. __func__, kcontrol->id.name);
  821. return -EINVAL;
  822. }
  823. return port_id;
  824. }
  825. static int slim_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  826. struct snd_ctl_elem_value *ucontrol)
  827. {
  828. int ch_num = slim_get_port_idx(kcontrol);
  829. if (ch_num < 0)
  830. return ch_num;
  831. ucontrol->value.enumerated.item[0] =
  832. slim_get_sample_rate_val(slim_rx_cfg[ch_num].sample_rate);
  833. pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  834. ch_num, slim_rx_cfg[ch_num].sample_rate,
  835. ucontrol->value.enumerated.item[0]);
  836. return 0;
  837. }
  838. static int slim_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  839. struct snd_ctl_elem_value *ucontrol)
  840. {
  841. int ch_num = slim_get_port_idx(kcontrol);
  842. if (ch_num < 0)
  843. return ch_num;
  844. slim_rx_cfg[ch_num].sample_rate =
  845. slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
  846. pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  847. ch_num, slim_rx_cfg[ch_num].sample_rate,
  848. ucontrol->value.enumerated.item[0]);
  849. return 0;
  850. }
  851. static int slim_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  852. struct snd_ctl_elem_value *ucontrol)
  853. {
  854. int ch_num = slim_get_port_idx(kcontrol);
  855. if (ch_num < 0)
  856. return ch_num;
  857. ucontrol->value.enumerated.item[0] =
  858. slim_get_sample_rate_val(slim_tx_cfg[ch_num].sample_rate);
  859. pr_debug("%s: slim[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  860. ch_num, slim_tx_cfg[ch_num].sample_rate,
  861. ucontrol->value.enumerated.item[0]);
  862. return 0;
  863. }
  864. static int slim_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  865. struct snd_ctl_elem_value *ucontrol)
  866. {
  867. int sample_rate = 0;
  868. int ch_num = slim_get_port_idx(kcontrol);
  869. if (ch_num < 0)
  870. return ch_num;
  871. sample_rate = slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
  872. if (sample_rate == SAMPLING_RATE_44P1KHZ) {
  873. pr_err("%s: Unsupported sample rate %d: for Tx path\n",
  874. __func__, sample_rate);
  875. return -EINVAL;
  876. }
  877. slim_tx_cfg[ch_num].sample_rate = sample_rate;
  878. pr_debug("%s: slim[%d]_tx_sample_rate = %d, value = %d\n", __func__,
  879. ch_num, slim_tx_cfg[ch_num].sample_rate,
  880. ucontrol->value.enumerated.item[0]);
  881. return 0;
  882. }
  883. static int slim_rx_bit_format_get(struct snd_kcontrol *kcontrol,
  884. struct snd_ctl_elem_value *ucontrol)
  885. {
  886. int ch_num = slim_get_port_idx(kcontrol);
  887. if (ch_num < 0)
  888. return ch_num;
  889. ucontrol->value.enumerated.item[0] =
  890. slim_get_bit_format_val(slim_rx_cfg[ch_num].bit_format);
  891. pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
  892. __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
  893. ucontrol->value.enumerated.item[0]);
  894. return 0;
  895. }
  896. static int slim_rx_bit_format_put(struct snd_kcontrol *kcontrol,
  897. struct snd_ctl_elem_value *ucontrol)
  898. {
  899. int ch_num = slim_get_port_idx(kcontrol);
  900. if (ch_num < 0)
  901. return ch_num;
  902. slim_rx_cfg[ch_num].bit_format =
  903. slim_get_bit_format(ucontrol->value.enumerated.item[0]);
  904. pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
  905. __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
  906. ucontrol->value.enumerated.item[0]);
  907. return 0;
  908. }
  909. static int slim_tx_bit_format_get(struct snd_kcontrol *kcontrol,
  910. struct snd_ctl_elem_value *ucontrol)
  911. {
  912. int ch_num = slim_get_port_idx(kcontrol);
  913. if (ch_num < 0)
  914. return ch_num;
  915. ucontrol->value.enumerated.item[0] =
  916. slim_get_bit_format_val(slim_tx_cfg[ch_num].bit_format);
  917. pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
  918. __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
  919. ucontrol->value.enumerated.item[0]);
  920. return 0;
  921. }
  922. static int slim_tx_bit_format_put(struct snd_kcontrol *kcontrol,
  923. struct snd_ctl_elem_value *ucontrol)
  924. {
  925. int ch_num = slim_get_port_idx(kcontrol);
  926. if (ch_num < 0)
  927. return ch_num;
  928. slim_tx_cfg[ch_num].bit_format =
  929. slim_get_bit_format(ucontrol->value.enumerated.item[0]);
  930. pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
  931. __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
  932. ucontrol->value.enumerated.item[0]);
  933. return 0;
  934. }
  935. static int slim_rx_ch_get(struct snd_kcontrol *kcontrol,
  936. struct snd_ctl_elem_value *ucontrol)
  937. {
  938. int ch_num = slim_get_port_idx(kcontrol);
  939. if (ch_num < 0)
  940. return ch_num;
  941. pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
  942. ch_num, slim_rx_cfg[ch_num].channels);
  943. ucontrol->value.enumerated.item[0] = slim_rx_cfg[ch_num].channels - 1;
  944. return 0;
  945. }
  946. static int slim_rx_ch_put(struct snd_kcontrol *kcontrol,
  947. struct snd_ctl_elem_value *ucontrol)
  948. {
  949. int ch_num = slim_get_port_idx(kcontrol);
  950. if (ch_num < 0)
  951. return ch_num;
  952. slim_rx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
  953. pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
  954. ch_num, slim_rx_cfg[ch_num].channels);
  955. return 1;
  956. }
  957. static int slim_tx_ch_get(struct snd_kcontrol *kcontrol,
  958. struct snd_ctl_elem_value *ucontrol)
  959. {
  960. int ch_num = slim_get_port_idx(kcontrol);
  961. if (ch_num < 0)
  962. return ch_num;
  963. pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
  964. ch_num, slim_tx_cfg[ch_num].channels);
  965. ucontrol->value.enumerated.item[0] = slim_tx_cfg[ch_num].channels - 1;
  966. return 0;
  967. }
  968. static int slim_tx_ch_put(struct snd_kcontrol *kcontrol,
  969. struct snd_ctl_elem_value *ucontrol)
  970. {
  971. int ch_num = slim_get_port_idx(kcontrol);
  972. if (ch_num < 0)
  973. return ch_num;
  974. slim_tx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
  975. pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
  976. ch_num, slim_tx_cfg[ch_num].channels);
  977. return 1;
  978. }
  979. static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
  980. struct snd_ctl_elem_value *ucontrol)
  981. {
  982. ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
  983. pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
  984. ucontrol->value.integer.value[0]);
  985. return 0;
  986. }
  987. static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
  988. struct snd_ctl_elem_value *ucontrol)
  989. {
  990. msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
  991. pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
  992. return 1;
  993. }
  994. static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
  995. struct snd_ctl_elem_value *ucontrol)
  996. {
  997. /*
  998. * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
  999. * when used for BT_SCO use case. Return either Rx or Tx sample rate
  1000. * value.
  1001. */
  1002. switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
  1003. case SAMPLING_RATE_96KHZ:
  1004. ucontrol->value.integer.value[0] = 5;
  1005. break;
  1006. case SAMPLING_RATE_88P2KHZ:
  1007. ucontrol->value.integer.value[0] = 4;
  1008. break;
  1009. case SAMPLING_RATE_48KHZ:
  1010. ucontrol->value.integer.value[0] = 3;
  1011. break;
  1012. case SAMPLING_RATE_44P1KHZ:
  1013. ucontrol->value.integer.value[0] = 2;
  1014. break;
  1015. case SAMPLING_RATE_16KHZ:
  1016. ucontrol->value.integer.value[0] = 1;
  1017. break;
  1018. case SAMPLING_RATE_8KHZ:
  1019. default:
  1020. ucontrol->value.integer.value[0] = 0;
  1021. break;
  1022. }
  1023. pr_debug("%s: sample rate = %d\n", __func__,
  1024. slim_rx_cfg[SLIM_RX_7].sample_rate);
  1025. return 0;
  1026. }
  1027. static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
  1028. struct snd_ctl_elem_value *ucontrol)
  1029. {
  1030. switch (ucontrol->value.integer.value[0]) {
  1031. case 1:
  1032. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1033. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1034. break;
  1035. case 2:
  1036. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1037. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1038. break;
  1039. case 3:
  1040. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1041. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1042. break;
  1043. case 4:
  1044. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1045. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1046. break;
  1047. case 5:
  1048. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1049. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1050. break;
  1051. case 0:
  1052. default:
  1053. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1054. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1055. break;
  1056. }
  1057. pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
  1058. __func__,
  1059. slim_rx_cfg[SLIM_RX_7].sample_rate,
  1060. slim_tx_cfg[SLIM_TX_7].sample_rate,
  1061. ucontrol->value.enumerated.item[0]);
  1062. return 0;
  1063. }
  1064. static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
  1065. {
  1066. int idx = 0;
  1067. if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
  1068. sizeof("WSA_CDC_DMA_RX_0")))
  1069. idx = WSA_CDC_DMA_RX_0;
  1070. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
  1071. sizeof("WSA_CDC_DMA_RX_0")))
  1072. idx = WSA_CDC_DMA_RX_1;
  1073. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
  1074. sizeof("RX_CDC_DMA_RX_0")))
  1075. idx = RX_CDC_DMA_RX_0;
  1076. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
  1077. sizeof("RX_CDC_DMA_RX_1")))
  1078. idx = RX_CDC_DMA_RX_1;
  1079. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
  1080. sizeof("RX_CDC_DMA_RX_2")))
  1081. idx = RX_CDC_DMA_RX_2;
  1082. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
  1083. sizeof("RX_CDC_DMA_RX_3")))
  1084. idx = RX_CDC_DMA_RX_3;
  1085. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
  1086. sizeof("RX_CDC_DMA_RX_5")))
  1087. idx = RX_CDC_DMA_RX_5;
  1088. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
  1089. sizeof("WSA_CDC_DMA_TX_0")))
  1090. idx = WSA_CDC_DMA_TX_0;
  1091. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
  1092. sizeof("WSA_CDC_DMA_TX_1")))
  1093. idx = WSA_CDC_DMA_TX_1;
  1094. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
  1095. sizeof("WSA_CDC_DMA_TX_2")))
  1096. idx = WSA_CDC_DMA_TX_2;
  1097. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
  1098. sizeof("TX_CDC_DMA_TX_0")))
  1099. idx = TX_CDC_DMA_TX_0;
  1100. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
  1101. sizeof("TX_CDC_DMA_TX_3")))
  1102. idx = TX_CDC_DMA_TX_3;
  1103. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
  1104. sizeof("TX_CDC_DMA_TX_4")))
  1105. idx = TX_CDC_DMA_TX_4;
  1106. else {
  1107. pr_err("%s: unsupported channel: %s\n",
  1108. __func__, kcontrol->id.name);
  1109. return -EINVAL;
  1110. }
  1111. return idx;
  1112. }
  1113. static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
  1114. struct snd_ctl_elem_value *ucontrol)
  1115. {
  1116. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1117. if (ch_num < 0)
  1118. return ch_num;
  1119. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1120. cdc_dma_rx_cfg[ch_num].channels - 1);
  1121. ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
  1122. return 0;
  1123. }
  1124. static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
  1125. struct snd_ctl_elem_value *ucontrol)
  1126. {
  1127. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1128. if (ch_num < 0)
  1129. return ch_num;
  1130. cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1131. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1132. cdc_dma_rx_cfg[ch_num].channels);
  1133. return 1;
  1134. }
  1135. static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
  1136. struct snd_ctl_elem_value *ucontrol)
  1137. {
  1138. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1139. switch (cdc_dma_rx_cfg[ch_num].bit_format) {
  1140. case SNDRV_PCM_FORMAT_S32_LE:
  1141. ucontrol->value.integer.value[0] = 3;
  1142. break;
  1143. case SNDRV_PCM_FORMAT_S24_3LE:
  1144. ucontrol->value.integer.value[0] = 2;
  1145. break;
  1146. case SNDRV_PCM_FORMAT_S24_LE:
  1147. ucontrol->value.integer.value[0] = 1;
  1148. break;
  1149. case SNDRV_PCM_FORMAT_S16_LE:
  1150. default:
  1151. ucontrol->value.integer.value[0] = 0;
  1152. break;
  1153. }
  1154. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1155. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1156. ucontrol->value.integer.value[0]);
  1157. return 0;
  1158. }
  1159. static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
  1160. struct snd_ctl_elem_value *ucontrol)
  1161. {
  1162. int rc = 0;
  1163. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1164. switch (ucontrol->value.integer.value[0]) {
  1165. case 3:
  1166. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1167. break;
  1168. case 2:
  1169. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1170. break;
  1171. case 1:
  1172. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1173. break;
  1174. case 0:
  1175. default:
  1176. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1177. break;
  1178. }
  1179. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1180. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1181. ucontrol->value.integer.value[0]);
  1182. return rc;
  1183. }
  1184. static int cdc_dma_get_sample_rate_val(int sample_rate)
  1185. {
  1186. int sample_rate_val = 0;
  1187. switch (sample_rate) {
  1188. case SAMPLING_RATE_8KHZ:
  1189. sample_rate_val = 0;
  1190. break;
  1191. case SAMPLING_RATE_11P025KHZ:
  1192. sample_rate_val = 1;
  1193. break;
  1194. case SAMPLING_RATE_16KHZ:
  1195. sample_rate_val = 2;
  1196. break;
  1197. case SAMPLING_RATE_22P05KHZ:
  1198. sample_rate_val = 3;
  1199. break;
  1200. case SAMPLING_RATE_32KHZ:
  1201. sample_rate_val = 4;
  1202. break;
  1203. case SAMPLING_RATE_44P1KHZ:
  1204. sample_rate_val = 5;
  1205. break;
  1206. case SAMPLING_RATE_48KHZ:
  1207. sample_rate_val = 6;
  1208. break;
  1209. case SAMPLING_RATE_88P2KHZ:
  1210. sample_rate_val = 7;
  1211. break;
  1212. case SAMPLING_RATE_96KHZ:
  1213. sample_rate_val = 8;
  1214. break;
  1215. case SAMPLING_RATE_176P4KHZ:
  1216. sample_rate_val = 9;
  1217. break;
  1218. case SAMPLING_RATE_192KHZ:
  1219. sample_rate_val = 10;
  1220. break;
  1221. case SAMPLING_RATE_352P8KHZ:
  1222. sample_rate_val = 11;
  1223. break;
  1224. case SAMPLING_RATE_384KHZ:
  1225. sample_rate_val = 12;
  1226. break;
  1227. default:
  1228. sample_rate_val = 6;
  1229. break;
  1230. }
  1231. return sample_rate_val;
  1232. }
  1233. static int cdc_dma_get_sample_rate(int value)
  1234. {
  1235. int sample_rate = 0;
  1236. switch (value) {
  1237. case 0:
  1238. sample_rate = SAMPLING_RATE_8KHZ;
  1239. break;
  1240. case 1:
  1241. sample_rate = SAMPLING_RATE_11P025KHZ;
  1242. break;
  1243. case 2:
  1244. sample_rate = SAMPLING_RATE_16KHZ;
  1245. break;
  1246. case 3:
  1247. sample_rate = SAMPLING_RATE_22P05KHZ;
  1248. break;
  1249. case 4:
  1250. sample_rate = SAMPLING_RATE_32KHZ;
  1251. break;
  1252. case 5:
  1253. sample_rate = SAMPLING_RATE_44P1KHZ;
  1254. break;
  1255. case 6:
  1256. sample_rate = SAMPLING_RATE_48KHZ;
  1257. break;
  1258. case 7:
  1259. sample_rate = SAMPLING_RATE_88P2KHZ;
  1260. break;
  1261. case 8:
  1262. sample_rate = SAMPLING_RATE_96KHZ;
  1263. break;
  1264. case 9:
  1265. sample_rate = SAMPLING_RATE_176P4KHZ;
  1266. break;
  1267. case 10:
  1268. sample_rate = SAMPLING_RATE_192KHZ;
  1269. break;
  1270. case 11:
  1271. sample_rate = SAMPLING_RATE_352P8KHZ;
  1272. break;
  1273. case 12:
  1274. sample_rate = SAMPLING_RATE_384KHZ;
  1275. break;
  1276. default:
  1277. sample_rate = SAMPLING_RATE_48KHZ;
  1278. break;
  1279. }
  1280. return sample_rate;
  1281. }
  1282. static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1283. struct snd_ctl_elem_value *ucontrol)
  1284. {
  1285. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1286. if (ch_num < 0)
  1287. return ch_num;
  1288. ucontrol->value.enumerated.item[0] =
  1289. cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
  1290. pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
  1291. cdc_dma_rx_cfg[ch_num].sample_rate);
  1292. return 0;
  1293. }
  1294. static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1295. struct snd_ctl_elem_value *ucontrol)
  1296. {
  1297. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1298. if (ch_num < 0)
  1299. return ch_num;
  1300. cdc_dma_rx_cfg[ch_num].sample_rate =
  1301. cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1302. pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
  1303. __func__, ucontrol->value.enumerated.item[0],
  1304. cdc_dma_rx_cfg[ch_num].sample_rate);
  1305. return 0;
  1306. }
  1307. static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
  1308. struct snd_ctl_elem_value *ucontrol)
  1309. {
  1310. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1311. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  1312. cdc_dma_tx_cfg[ch_num].channels);
  1313. ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
  1314. return 0;
  1315. }
  1316. static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
  1317. struct snd_ctl_elem_value *ucontrol)
  1318. {
  1319. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1320. cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1321. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  1322. cdc_dma_tx_cfg[ch_num].channels);
  1323. return 1;
  1324. }
  1325. static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1326. struct snd_ctl_elem_value *ucontrol)
  1327. {
  1328. int sample_rate_val;
  1329. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1330. switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
  1331. case SAMPLING_RATE_384KHZ:
  1332. sample_rate_val = 12;
  1333. break;
  1334. case SAMPLING_RATE_352P8KHZ:
  1335. sample_rate_val = 11;
  1336. break;
  1337. case SAMPLING_RATE_192KHZ:
  1338. sample_rate_val = 10;
  1339. break;
  1340. case SAMPLING_RATE_176P4KHZ:
  1341. sample_rate_val = 9;
  1342. break;
  1343. case SAMPLING_RATE_96KHZ:
  1344. sample_rate_val = 8;
  1345. break;
  1346. case SAMPLING_RATE_88P2KHZ:
  1347. sample_rate_val = 7;
  1348. break;
  1349. case SAMPLING_RATE_48KHZ:
  1350. sample_rate_val = 6;
  1351. break;
  1352. case SAMPLING_RATE_44P1KHZ:
  1353. sample_rate_val = 5;
  1354. break;
  1355. case SAMPLING_RATE_32KHZ:
  1356. sample_rate_val = 4;
  1357. break;
  1358. case SAMPLING_RATE_22P05KHZ:
  1359. sample_rate_val = 3;
  1360. break;
  1361. case SAMPLING_RATE_16KHZ:
  1362. sample_rate_val = 2;
  1363. break;
  1364. case SAMPLING_RATE_11P025KHZ:
  1365. sample_rate_val = 1;
  1366. break;
  1367. case SAMPLING_RATE_8KHZ:
  1368. sample_rate_val = 0;
  1369. break;
  1370. default:
  1371. sample_rate_val = 6;
  1372. break;
  1373. }
  1374. ucontrol->value.integer.value[0] = sample_rate_val;
  1375. pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
  1376. cdc_dma_tx_cfg[ch_num].sample_rate);
  1377. return 0;
  1378. }
  1379. static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1380. struct snd_ctl_elem_value *ucontrol)
  1381. {
  1382. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1383. switch (ucontrol->value.integer.value[0]) {
  1384. case 12:
  1385. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
  1386. break;
  1387. case 11:
  1388. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
  1389. break;
  1390. case 10:
  1391. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
  1392. break;
  1393. case 9:
  1394. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
  1395. break;
  1396. case 8:
  1397. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
  1398. break;
  1399. case 7:
  1400. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
  1401. break;
  1402. case 6:
  1403. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  1404. break;
  1405. case 5:
  1406. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
  1407. break;
  1408. case 4:
  1409. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
  1410. break;
  1411. case 3:
  1412. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
  1413. break;
  1414. case 2:
  1415. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
  1416. break;
  1417. case 1:
  1418. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
  1419. break;
  1420. case 0:
  1421. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
  1422. break;
  1423. default:
  1424. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  1425. break;
  1426. }
  1427. pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
  1428. __func__, ucontrol->value.integer.value[0],
  1429. cdc_dma_tx_cfg[ch_num].sample_rate);
  1430. return 0;
  1431. }
  1432. static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
  1433. struct snd_ctl_elem_value *ucontrol)
  1434. {
  1435. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1436. switch (cdc_dma_tx_cfg[ch_num].bit_format) {
  1437. case SNDRV_PCM_FORMAT_S32_LE:
  1438. ucontrol->value.integer.value[0] = 3;
  1439. break;
  1440. case SNDRV_PCM_FORMAT_S24_3LE:
  1441. ucontrol->value.integer.value[0] = 2;
  1442. break;
  1443. case SNDRV_PCM_FORMAT_S24_LE:
  1444. ucontrol->value.integer.value[0] = 1;
  1445. break;
  1446. case SNDRV_PCM_FORMAT_S16_LE:
  1447. default:
  1448. ucontrol->value.integer.value[0] = 0;
  1449. break;
  1450. }
  1451. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  1452. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  1453. ucontrol->value.integer.value[0]);
  1454. return 0;
  1455. }
  1456. static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
  1457. struct snd_ctl_elem_value *ucontrol)
  1458. {
  1459. int rc = 0;
  1460. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1461. switch (ucontrol->value.integer.value[0]) {
  1462. case 3:
  1463. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1464. break;
  1465. case 2:
  1466. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1467. break;
  1468. case 1:
  1469. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1470. break;
  1471. case 0:
  1472. default:
  1473. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1474. break;
  1475. }
  1476. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  1477. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  1478. ucontrol->value.integer.value[0]);
  1479. return rc;
  1480. }
  1481. static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
  1482. struct snd_ctl_elem_value *ucontrol)
  1483. {
  1484. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
  1485. usb_rx_cfg.channels);
  1486. ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
  1487. return 0;
  1488. }
  1489. static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
  1490. struct snd_ctl_elem_value *ucontrol)
  1491. {
  1492. usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  1493. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
  1494. return 1;
  1495. }
  1496. static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1497. struct snd_ctl_elem_value *ucontrol)
  1498. {
  1499. int sample_rate_val;
  1500. switch (usb_rx_cfg.sample_rate) {
  1501. case SAMPLING_RATE_384KHZ:
  1502. sample_rate_val = 12;
  1503. break;
  1504. case SAMPLING_RATE_352P8KHZ:
  1505. sample_rate_val = 11;
  1506. break;
  1507. case SAMPLING_RATE_192KHZ:
  1508. sample_rate_val = 10;
  1509. break;
  1510. case SAMPLING_RATE_176P4KHZ:
  1511. sample_rate_val = 9;
  1512. break;
  1513. case SAMPLING_RATE_96KHZ:
  1514. sample_rate_val = 8;
  1515. break;
  1516. case SAMPLING_RATE_88P2KHZ:
  1517. sample_rate_val = 7;
  1518. break;
  1519. case SAMPLING_RATE_48KHZ:
  1520. sample_rate_val = 6;
  1521. break;
  1522. case SAMPLING_RATE_44P1KHZ:
  1523. sample_rate_val = 5;
  1524. break;
  1525. case SAMPLING_RATE_32KHZ:
  1526. sample_rate_val = 4;
  1527. break;
  1528. case SAMPLING_RATE_22P05KHZ:
  1529. sample_rate_val = 3;
  1530. break;
  1531. case SAMPLING_RATE_16KHZ:
  1532. sample_rate_val = 2;
  1533. break;
  1534. case SAMPLING_RATE_11P025KHZ:
  1535. sample_rate_val = 1;
  1536. break;
  1537. case SAMPLING_RATE_8KHZ:
  1538. default:
  1539. sample_rate_val = 0;
  1540. break;
  1541. }
  1542. ucontrol->value.integer.value[0] = sample_rate_val;
  1543. pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
  1544. usb_rx_cfg.sample_rate);
  1545. return 0;
  1546. }
  1547. static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1548. struct snd_ctl_elem_value *ucontrol)
  1549. {
  1550. switch (ucontrol->value.integer.value[0]) {
  1551. case 12:
  1552. usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  1553. break;
  1554. case 11:
  1555. usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  1556. break;
  1557. case 10:
  1558. usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  1559. break;
  1560. case 9:
  1561. usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  1562. break;
  1563. case 8:
  1564. usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  1565. break;
  1566. case 7:
  1567. usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  1568. break;
  1569. case 6:
  1570. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1571. break;
  1572. case 5:
  1573. usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  1574. break;
  1575. case 4:
  1576. usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  1577. break;
  1578. case 3:
  1579. usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  1580. break;
  1581. case 2:
  1582. usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  1583. break;
  1584. case 1:
  1585. usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  1586. break;
  1587. case 0:
  1588. usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  1589. break;
  1590. default:
  1591. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1592. break;
  1593. }
  1594. pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
  1595. __func__, ucontrol->value.integer.value[0],
  1596. usb_rx_cfg.sample_rate);
  1597. return 0;
  1598. }
  1599. static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
  1600. struct snd_ctl_elem_value *ucontrol)
  1601. {
  1602. switch (usb_rx_cfg.bit_format) {
  1603. case SNDRV_PCM_FORMAT_S32_LE:
  1604. ucontrol->value.integer.value[0] = 3;
  1605. break;
  1606. case SNDRV_PCM_FORMAT_S24_3LE:
  1607. ucontrol->value.integer.value[0] = 2;
  1608. break;
  1609. case SNDRV_PCM_FORMAT_S24_LE:
  1610. ucontrol->value.integer.value[0] = 1;
  1611. break;
  1612. case SNDRV_PCM_FORMAT_S16_LE:
  1613. default:
  1614. ucontrol->value.integer.value[0] = 0;
  1615. break;
  1616. }
  1617. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  1618. __func__, usb_rx_cfg.bit_format,
  1619. ucontrol->value.integer.value[0]);
  1620. return 0;
  1621. }
  1622. static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
  1623. struct snd_ctl_elem_value *ucontrol)
  1624. {
  1625. int rc = 0;
  1626. switch (ucontrol->value.integer.value[0]) {
  1627. case 3:
  1628. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1629. break;
  1630. case 2:
  1631. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1632. break;
  1633. case 1:
  1634. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1635. break;
  1636. case 0:
  1637. default:
  1638. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1639. break;
  1640. }
  1641. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  1642. __func__, usb_rx_cfg.bit_format,
  1643. ucontrol->value.integer.value[0]);
  1644. return rc;
  1645. }
  1646. static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
  1647. struct snd_ctl_elem_value *ucontrol)
  1648. {
  1649. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
  1650. usb_tx_cfg.channels);
  1651. ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
  1652. return 0;
  1653. }
  1654. static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
  1655. struct snd_ctl_elem_value *ucontrol)
  1656. {
  1657. usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  1658. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
  1659. return 1;
  1660. }
  1661. static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1662. struct snd_ctl_elem_value *ucontrol)
  1663. {
  1664. int sample_rate_val;
  1665. switch (usb_tx_cfg.sample_rate) {
  1666. case SAMPLING_RATE_384KHZ:
  1667. sample_rate_val = 12;
  1668. break;
  1669. case SAMPLING_RATE_352P8KHZ:
  1670. sample_rate_val = 11;
  1671. break;
  1672. case SAMPLING_RATE_192KHZ:
  1673. sample_rate_val = 10;
  1674. break;
  1675. case SAMPLING_RATE_176P4KHZ:
  1676. sample_rate_val = 9;
  1677. break;
  1678. case SAMPLING_RATE_96KHZ:
  1679. sample_rate_val = 8;
  1680. break;
  1681. case SAMPLING_RATE_88P2KHZ:
  1682. sample_rate_val = 7;
  1683. break;
  1684. case SAMPLING_RATE_48KHZ:
  1685. sample_rate_val = 6;
  1686. break;
  1687. case SAMPLING_RATE_44P1KHZ:
  1688. sample_rate_val = 5;
  1689. break;
  1690. case SAMPLING_RATE_32KHZ:
  1691. sample_rate_val = 4;
  1692. break;
  1693. case SAMPLING_RATE_22P05KHZ:
  1694. sample_rate_val = 3;
  1695. break;
  1696. case SAMPLING_RATE_16KHZ:
  1697. sample_rate_val = 2;
  1698. break;
  1699. case SAMPLING_RATE_11P025KHZ:
  1700. sample_rate_val = 1;
  1701. break;
  1702. case SAMPLING_RATE_8KHZ:
  1703. sample_rate_val = 0;
  1704. break;
  1705. default:
  1706. sample_rate_val = 6;
  1707. break;
  1708. }
  1709. ucontrol->value.integer.value[0] = sample_rate_val;
  1710. pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
  1711. usb_tx_cfg.sample_rate);
  1712. return 0;
  1713. }
  1714. static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1715. struct snd_ctl_elem_value *ucontrol)
  1716. {
  1717. switch (ucontrol->value.integer.value[0]) {
  1718. case 12:
  1719. usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  1720. break;
  1721. case 11:
  1722. usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  1723. break;
  1724. case 10:
  1725. usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  1726. break;
  1727. case 9:
  1728. usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  1729. break;
  1730. case 8:
  1731. usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  1732. break;
  1733. case 7:
  1734. usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  1735. break;
  1736. case 6:
  1737. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1738. break;
  1739. case 5:
  1740. usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  1741. break;
  1742. case 4:
  1743. usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  1744. break;
  1745. case 3:
  1746. usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  1747. break;
  1748. case 2:
  1749. usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  1750. break;
  1751. case 1:
  1752. usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  1753. break;
  1754. case 0:
  1755. usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  1756. break;
  1757. default:
  1758. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1759. break;
  1760. }
  1761. pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
  1762. __func__, ucontrol->value.integer.value[0],
  1763. usb_tx_cfg.sample_rate);
  1764. return 0;
  1765. }
  1766. static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
  1767. struct snd_ctl_elem_value *ucontrol)
  1768. {
  1769. switch (usb_tx_cfg.bit_format) {
  1770. case SNDRV_PCM_FORMAT_S32_LE:
  1771. ucontrol->value.integer.value[0] = 3;
  1772. break;
  1773. case SNDRV_PCM_FORMAT_S24_3LE:
  1774. ucontrol->value.integer.value[0] = 2;
  1775. break;
  1776. case SNDRV_PCM_FORMAT_S24_LE:
  1777. ucontrol->value.integer.value[0] = 1;
  1778. break;
  1779. case SNDRV_PCM_FORMAT_S16_LE:
  1780. default:
  1781. ucontrol->value.integer.value[0] = 0;
  1782. break;
  1783. }
  1784. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  1785. __func__, usb_tx_cfg.bit_format,
  1786. ucontrol->value.integer.value[0]);
  1787. return 0;
  1788. }
  1789. static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
  1790. struct snd_ctl_elem_value *ucontrol)
  1791. {
  1792. int rc = 0;
  1793. switch (ucontrol->value.integer.value[0]) {
  1794. case 3:
  1795. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1796. break;
  1797. case 2:
  1798. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1799. break;
  1800. case 1:
  1801. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1802. break;
  1803. case 0:
  1804. default:
  1805. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1806. break;
  1807. }
  1808. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  1809. __func__, usb_tx_cfg.bit_format,
  1810. ucontrol->value.integer.value[0]);
  1811. return rc;
  1812. }
  1813. static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
  1814. {
  1815. int idx;
  1816. if (strnstr(kcontrol->id.name, "Display Port RX",
  1817. sizeof("Display Port RX"))) {
  1818. idx = DP_RX_IDX;
  1819. } else {
  1820. pr_err("%s: unsupported BE: %s\n",
  1821. __func__, kcontrol->id.name);
  1822. idx = -EINVAL;
  1823. }
  1824. return idx;
  1825. }
  1826. static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
  1827. struct snd_ctl_elem_value *ucontrol)
  1828. {
  1829. int idx = ext_disp_get_port_idx(kcontrol);
  1830. if (idx < 0)
  1831. return idx;
  1832. switch (ext_disp_rx_cfg[idx].bit_format) {
  1833. case SNDRV_PCM_FORMAT_S24_3LE:
  1834. ucontrol->value.integer.value[0] = 2;
  1835. break;
  1836. case SNDRV_PCM_FORMAT_S24_LE:
  1837. ucontrol->value.integer.value[0] = 1;
  1838. break;
  1839. case SNDRV_PCM_FORMAT_S16_LE:
  1840. default:
  1841. ucontrol->value.integer.value[0] = 0;
  1842. break;
  1843. }
  1844. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  1845. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  1846. ucontrol->value.integer.value[0]);
  1847. return 0;
  1848. }
  1849. static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
  1850. struct snd_ctl_elem_value *ucontrol)
  1851. {
  1852. int idx = ext_disp_get_port_idx(kcontrol);
  1853. if (idx < 0)
  1854. return idx;
  1855. switch (ucontrol->value.integer.value[0]) {
  1856. case 2:
  1857. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1858. break;
  1859. case 1:
  1860. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1861. break;
  1862. case 0:
  1863. default:
  1864. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1865. break;
  1866. }
  1867. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  1868. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  1869. ucontrol->value.integer.value[0]);
  1870. return 0;
  1871. }
  1872. static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
  1873. struct snd_ctl_elem_value *ucontrol)
  1874. {
  1875. int idx = ext_disp_get_port_idx(kcontrol);
  1876. if (idx < 0)
  1877. return idx;
  1878. ucontrol->value.integer.value[0] =
  1879. ext_disp_rx_cfg[idx].channels - 2;
  1880. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  1881. idx, ext_disp_rx_cfg[idx].channels);
  1882. return 0;
  1883. }
  1884. static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
  1885. struct snd_ctl_elem_value *ucontrol)
  1886. {
  1887. int idx = ext_disp_get_port_idx(kcontrol);
  1888. if (idx < 0)
  1889. return idx;
  1890. ext_disp_rx_cfg[idx].channels =
  1891. ucontrol->value.integer.value[0] + 2;
  1892. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  1893. idx, ext_disp_rx_cfg[idx].channels);
  1894. return 1;
  1895. }
  1896. static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1897. struct snd_ctl_elem_value *ucontrol)
  1898. {
  1899. int sample_rate_val;
  1900. int idx = ext_disp_get_port_idx(kcontrol);
  1901. if (idx < 0)
  1902. return idx;
  1903. switch (ext_disp_rx_cfg[idx].sample_rate) {
  1904. case SAMPLING_RATE_176P4KHZ:
  1905. sample_rate_val = 6;
  1906. break;
  1907. case SAMPLING_RATE_88P2KHZ:
  1908. sample_rate_val = 5;
  1909. break;
  1910. case SAMPLING_RATE_44P1KHZ:
  1911. sample_rate_val = 4;
  1912. break;
  1913. case SAMPLING_RATE_32KHZ:
  1914. sample_rate_val = 3;
  1915. break;
  1916. case SAMPLING_RATE_192KHZ:
  1917. sample_rate_val = 2;
  1918. break;
  1919. case SAMPLING_RATE_96KHZ:
  1920. sample_rate_val = 1;
  1921. break;
  1922. case SAMPLING_RATE_48KHZ:
  1923. default:
  1924. sample_rate_val = 0;
  1925. break;
  1926. }
  1927. ucontrol->value.integer.value[0] = sample_rate_val;
  1928. pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
  1929. idx, ext_disp_rx_cfg[idx].sample_rate);
  1930. return 0;
  1931. }
  1932. static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1933. struct snd_ctl_elem_value *ucontrol)
  1934. {
  1935. int idx = ext_disp_get_port_idx(kcontrol);
  1936. if (idx < 0)
  1937. return idx;
  1938. switch (ucontrol->value.integer.value[0]) {
  1939. case 6:
  1940. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
  1941. break;
  1942. case 5:
  1943. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
  1944. break;
  1945. case 4:
  1946. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
  1947. break;
  1948. case 3:
  1949. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
  1950. break;
  1951. case 2:
  1952. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
  1953. break;
  1954. case 1:
  1955. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
  1956. break;
  1957. case 0:
  1958. default:
  1959. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
  1960. break;
  1961. }
  1962. pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
  1963. __func__, ucontrol->value.integer.value[0], idx,
  1964. ext_disp_rx_cfg[idx].sample_rate);
  1965. return 0;
  1966. }
  1967. static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
  1968. struct snd_ctl_elem_value *ucontrol)
  1969. {
  1970. pr_debug("%s: proxy_rx channels = %d\n",
  1971. __func__, proxy_rx_cfg.channels);
  1972. ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
  1973. return 0;
  1974. }
  1975. static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
  1976. struct snd_ctl_elem_value *ucontrol)
  1977. {
  1978. proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
  1979. pr_debug("%s: proxy_rx channels = %d\n",
  1980. __func__, proxy_rx_cfg.channels);
  1981. return 1;
  1982. }
  1983. static int tdm_get_sample_rate(int value)
  1984. {
  1985. int sample_rate = 0;
  1986. switch (value) {
  1987. case 0:
  1988. sample_rate = SAMPLING_RATE_8KHZ;
  1989. break;
  1990. case 1:
  1991. sample_rate = SAMPLING_RATE_16KHZ;
  1992. break;
  1993. case 2:
  1994. sample_rate = SAMPLING_RATE_32KHZ;
  1995. break;
  1996. case 3:
  1997. sample_rate = SAMPLING_RATE_48KHZ;
  1998. break;
  1999. case 4:
  2000. sample_rate = SAMPLING_RATE_176P4KHZ;
  2001. break;
  2002. case 5:
  2003. sample_rate = SAMPLING_RATE_352P8KHZ;
  2004. break;
  2005. default:
  2006. sample_rate = SAMPLING_RATE_48KHZ;
  2007. break;
  2008. }
  2009. return sample_rate;
  2010. }
  2011. static int aux_pcm_get_sample_rate(int value)
  2012. {
  2013. int sample_rate;
  2014. switch (value) {
  2015. case 1:
  2016. sample_rate = SAMPLING_RATE_16KHZ;
  2017. break;
  2018. case 0:
  2019. default:
  2020. sample_rate = SAMPLING_RATE_8KHZ;
  2021. break;
  2022. }
  2023. return sample_rate;
  2024. }
  2025. static int tdm_get_sample_rate_val(int sample_rate)
  2026. {
  2027. int sample_rate_val = 0;
  2028. switch (sample_rate) {
  2029. case SAMPLING_RATE_8KHZ:
  2030. sample_rate_val = 0;
  2031. break;
  2032. case SAMPLING_RATE_16KHZ:
  2033. sample_rate_val = 1;
  2034. break;
  2035. case SAMPLING_RATE_32KHZ:
  2036. sample_rate_val = 2;
  2037. break;
  2038. case SAMPLING_RATE_48KHZ:
  2039. sample_rate_val = 3;
  2040. break;
  2041. case SAMPLING_RATE_176P4KHZ:
  2042. sample_rate_val = 4;
  2043. break;
  2044. case SAMPLING_RATE_352P8KHZ:
  2045. sample_rate_val = 5;
  2046. break;
  2047. default:
  2048. sample_rate_val = 3;
  2049. break;
  2050. }
  2051. return sample_rate_val;
  2052. }
  2053. static int aux_pcm_get_sample_rate_val(int sample_rate)
  2054. {
  2055. int sample_rate_val;
  2056. switch (sample_rate) {
  2057. case SAMPLING_RATE_16KHZ:
  2058. sample_rate_val = 1;
  2059. break;
  2060. case SAMPLING_RATE_8KHZ:
  2061. default:
  2062. sample_rate_val = 0;
  2063. break;
  2064. }
  2065. return sample_rate_val;
  2066. }
  2067. static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
  2068. struct tdm_port *port)
  2069. {
  2070. if (port) {
  2071. if (strnstr(kcontrol->id.name, "PRI",
  2072. sizeof(kcontrol->id.name))) {
  2073. port->mode = TDM_PRI;
  2074. } else if (strnstr(kcontrol->id.name, "SEC",
  2075. sizeof(kcontrol->id.name))) {
  2076. port->mode = TDM_SEC;
  2077. } else if (strnstr(kcontrol->id.name, "TERT",
  2078. sizeof(kcontrol->id.name))) {
  2079. port->mode = TDM_TERT;
  2080. } else if (strnstr(kcontrol->id.name, "QUAT",
  2081. sizeof(kcontrol->id.name))) {
  2082. port->mode = TDM_QUAT;
  2083. } else if (strnstr(kcontrol->id.name, "QUIN",
  2084. sizeof(kcontrol->id.name))) {
  2085. port->mode = TDM_QUIN;
  2086. } else {
  2087. pr_err("%s: unsupported mode in: %s\n",
  2088. __func__, kcontrol->id.name);
  2089. return -EINVAL;
  2090. }
  2091. if (strnstr(kcontrol->id.name, "RX_0",
  2092. sizeof(kcontrol->id.name)) ||
  2093. strnstr(kcontrol->id.name, "TX_0",
  2094. sizeof(kcontrol->id.name))) {
  2095. port->channel = TDM_0;
  2096. } else if (strnstr(kcontrol->id.name, "RX_1",
  2097. sizeof(kcontrol->id.name)) ||
  2098. strnstr(kcontrol->id.name, "TX_1",
  2099. sizeof(kcontrol->id.name))) {
  2100. port->channel = TDM_1;
  2101. } else if (strnstr(kcontrol->id.name, "RX_2",
  2102. sizeof(kcontrol->id.name)) ||
  2103. strnstr(kcontrol->id.name, "TX_2",
  2104. sizeof(kcontrol->id.name))) {
  2105. port->channel = TDM_2;
  2106. } else if (strnstr(kcontrol->id.name, "RX_3",
  2107. sizeof(kcontrol->id.name)) ||
  2108. strnstr(kcontrol->id.name, "TX_3",
  2109. sizeof(kcontrol->id.name))) {
  2110. port->channel = TDM_3;
  2111. } else if (strnstr(kcontrol->id.name, "RX_4",
  2112. sizeof(kcontrol->id.name)) ||
  2113. strnstr(kcontrol->id.name, "TX_4",
  2114. sizeof(kcontrol->id.name))) {
  2115. port->channel = TDM_4;
  2116. } else if (strnstr(kcontrol->id.name, "RX_5",
  2117. sizeof(kcontrol->id.name)) ||
  2118. strnstr(kcontrol->id.name, "TX_5",
  2119. sizeof(kcontrol->id.name))) {
  2120. port->channel = TDM_5;
  2121. } else if (strnstr(kcontrol->id.name, "RX_6",
  2122. sizeof(kcontrol->id.name)) ||
  2123. strnstr(kcontrol->id.name, "TX_6",
  2124. sizeof(kcontrol->id.name))) {
  2125. port->channel = TDM_6;
  2126. } else if (strnstr(kcontrol->id.name, "RX_7",
  2127. sizeof(kcontrol->id.name)) ||
  2128. strnstr(kcontrol->id.name, "TX_7",
  2129. sizeof(kcontrol->id.name))) {
  2130. port->channel = TDM_7;
  2131. } else {
  2132. pr_err("%s: unsupported channel in: %s\n",
  2133. __func__, kcontrol->id.name);
  2134. return -EINVAL;
  2135. }
  2136. } else {
  2137. return -EINVAL;
  2138. }
  2139. return 0;
  2140. }
  2141. static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2142. struct snd_ctl_elem_value *ucontrol)
  2143. {
  2144. struct tdm_port port;
  2145. int ret = tdm_get_port_idx(kcontrol, &port);
  2146. if (ret) {
  2147. pr_err("%s: unsupported control: %s\n",
  2148. __func__, kcontrol->id.name);
  2149. } else {
  2150. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  2151. tdm_rx_cfg[port.mode][port.channel].sample_rate);
  2152. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  2153. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  2154. ucontrol->value.enumerated.item[0]);
  2155. }
  2156. return ret;
  2157. }
  2158. static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2159. struct snd_ctl_elem_value *ucontrol)
  2160. {
  2161. struct tdm_port port;
  2162. int ret = tdm_get_port_idx(kcontrol, &port);
  2163. if (ret) {
  2164. pr_err("%s: unsupported control: %s\n",
  2165. __func__, kcontrol->id.name);
  2166. } else {
  2167. tdm_rx_cfg[port.mode][port.channel].sample_rate =
  2168. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2169. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  2170. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  2171. ucontrol->value.enumerated.item[0]);
  2172. }
  2173. return ret;
  2174. }
  2175. static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2176. struct snd_ctl_elem_value *ucontrol)
  2177. {
  2178. struct tdm_port port;
  2179. int ret = tdm_get_port_idx(kcontrol, &port);
  2180. if (ret) {
  2181. pr_err("%s: unsupported control: %s\n",
  2182. __func__, kcontrol->id.name);
  2183. } else {
  2184. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  2185. tdm_tx_cfg[port.mode][port.channel].sample_rate);
  2186. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  2187. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  2188. ucontrol->value.enumerated.item[0]);
  2189. }
  2190. return ret;
  2191. }
  2192. static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2193. struct snd_ctl_elem_value *ucontrol)
  2194. {
  2195. struct tdm_port port;
  2196. int ret = tdm_get_port_idx(kcontrol, &port);
  2197. if (ret) {
  2198. pr_err("%s: unsupported control: %s\n",
  2199. __func__, kcontrol->id.name);
  2200. } else {
  2201. tdm_tx_cfg[port.mode][port.channel].sample_rate =
  2202. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2203. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  2204. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  2205. ucontrol->value.enumerated.item[0]);
  2206. }
  2207. return ret;
  2208. }
  2209. static int tdm_get_format(int value)
  2210. {
  2211. int format = 0;
  2212. switch (value) {
  2213. case 0:
  2214. format = SNDRV_PCM_FORMAT_S16_LE;
  2215. break;
  2216. case 1:
  2217. format = SNDRV_PCM_FORMAT_S24_LE;
  2218. break;
  2219. case 2:
  2220. format = SNDRV_PCM_FORMAT_S32_LE;
  2221. break;
  2222. default:
  2223. format = SNDRV_PCM_FORMAT_S16_LE;
  2224. break;
  2225. }
  2226. return format;
  2227. }
  2228. static int tdm_get_format_val(int format)
  2229. {
  2230. int value = 0;
  2231. switch (format) {
  2232. case SNDRV_PCM_FORMAT_S16_LE:
  2233. value = 0;
  2234. break;
  2235. case SNDRV_PCM_FORMAT_S24_LE:
  2236. value = 1;
  2237. break;
  2238. case SNDRV_PCM_FORMAT_S32_LE:
  2239. value = 2;
  2240. break;
  2241. default:
  2242. value = 0;
  2243. break;
  2244. }
  2245. return value;
  2246. }
  2247. static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
  2248. struct snd_ctl_elem_value *ucontrol)
  2249. {
  2250. struct tdm_port port;
  2251. int ret = tdm_get_port_idx(kcontrol, &port);
  2252. if (ret) {
  2253. pr_err("%s: unsupported control: %s\n",
  2254. __func__, kcontrol->id.name);
  2255. } else {
  2256. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  2257. tdm_rx_cfg[port.mode][port.channel].bit_format);
  2258. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  2259. tdm_rx_cfg[port.mode][port.channel].bit_format,
  2260. ucontrol->value.enumerated.item[0]);
  2261. }
  2262. return ret;
  2263. }
  2264. static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
  2265. struct snd_ctl_elem_value *ucontrol)
  2266. {
  2267. struct tdm_port port;
  2268. int ret = tdm_get_port_idx(kcontrol, &port);
  2269. if (ret) {
  2270. pr_err("%s: unsupported control: %s\n",
  2271. __func__, kcontrol->id.name);
  2272. } else {
  2273. tdm_rx_cfg[port.mode][port.channel].bit_format =
  2274. tdm_get_format(ucontrol->value.enumerated.item[0]);
  2275. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  2276. tdm_rx_cfg[port.mode][port.channel].bit_format,
  2277. ucontrol->value.enumerated.item[0]);
  2278. }
  2279. return ret;
  2280. }
  2281. static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
  2282. struct snd_ctl_elem_value *ucontrol)
  2283. {
  2284. struct tdm_port port;
  2285. int ret = tdm_get_port_idx(kcontrol, &port);
  2286. if (ret) {
  2287. pr_err("%s: unsupported control: %s\n",
  2288. __func__, kcontrol->id.name);
  2289. } else {
  2290. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  2291. tdm_tx_cfg[port.mode][port.channel].bit_format);
  2292. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  2293. tdm_tx_cfg[port.mode][port.channel].bit_format,
  2294. ucontrol->value.enumerated.item[0]);
  2295. }
  2296. return ret;
  2297. }
  2298. static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
  2299. struct snd_ctl_elem_value *ucontrol)
  2300. {
  2301. struct tdm_port port;
  2302. int ret = tdm_get_port_idx(kcontrol, &port);
  2303. if (ret) {
  2304. pr_err("%s: unsupported control: %s\n",
  2305. __func__, kcontrol->id.name);
  2306. } else {
  2307. tdm_tx_cfg[port.mode][port.channel].bit_format =
  2308. tdm_get_format(ucontrol->value.enumerated.item[0]);
  2309. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  2310. tdm_tx_cfg[port.mode][port.channel].bit_format,
  2311. ucontrol->value.enumerated.item[0]);
  2312. }
  2313. return ret;
  2314. }
  2315. static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
  2316. struct snd_ctl_elem_value *ucontrol)
  2317. {
  2318. struct tdm_port port;
  2319. int ret = tdm_get_port_idx(kcontrol, &port);
  2320. if (ret) {
  2321. pr_err("%s: unsupported control: %s\n",
  2322. __func__, kcontrol->id.name);
  2323. } else {
  2324. ucontrol->value.enumerated.item[0] =
  2325. tdm_rx_cfg[port.mode][port.channel].channels - 1;
  2326. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  2327. tdm_rx_cfg[port.mode][port.channel].channels - 1,
  2328. ucontrol->value.enumerated.item[0]);
  2329. }
  2330. return ret;
  2331. }
  2332. static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
  2333. struct snd_ctl_elem_value *ucontrol)
  2334. {
  2335. struct tdm_port port;
  2336. int ret = tdm_get_port_idx(kcontrol, &port);
  2337. if (ret) {
  2338. pr_err("%s: unsupported control: %s\n",
  2339. __func__, kcontrol->id.name);
  2340. } else {
  2341. tdm_rx_cfg[port.mode][port.channel].channels =
  2342. ucontrol->value.enumerated.item[0] + 1;
  2343. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  2344. tdm_rx_cfg[port.mode][port.channel].channels,
  2345. ucontrol->value.enumerated.item[0] + 1);
  2346. }
  2347. return ret;
  2348. }
  2349. static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
  2350. struct snd_ctl_elem_value *ucontrol)
  2351. {
  2352. struct tdm_port port;
  2353. int ret = tdm_get_port_idx(kcontrol, &port);
  2354. if (ret) {
  2355. pr_err("%s: unsupported control: %s\n",
  2356. __func__, kcontrol->id.name);
  2357. } else {
  2358. ucontrol->value.enumerated.item[0] =
  2359. tdm_tx_cfg[port.mode][port.channel].channels - 1;
  2360. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  2361. tdm_tx_cfg[port.mode][port.channel].channels - 1,
  2362. ucontrol->value.enumerated.item[0]);
  2363. }
  2364. return ret;
  2365. }
  2366. static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
  2367. struct snd_ctl_elem_value *ucontrol)
  2368. {
  2369. struct tdm_port port;
  2370. int ret = tdm_get_port_idx(kcontrol, &port);
  2371. if (ret) {
  2372. pr_err("%s: unsupported control: %s\n",
  2373. __func__, kcontrol->id.name);
  2374. } else {
  2375. tdm_tx_cfg[port.mode][port.channel].channels =
  2376. ucontrol->value.enumerated.item[0] + 1;
  2377. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  2378. tdm_tx_cfg[port.mode][port.channel].channels,
  2379. ucontrol->value.enumerated.item[0] + 1);
  2380. }
  2381. return ret;
  2382. }
  2383. static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
  2384. {
  2385. int idx;
  2386. if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
  2387. sizeof("PRIM_AUX_PCM"))) {
  2388. idx = PRIM_AUX_PCM;
  2389. } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
  2390. sizeof("SEC_AUX_PCM"))) {
  2391. idx = SEC_AUX_PCM;
  2392. } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
  2393. sizeof("TERT_AUX_PCM"))) {
  2394. idx = TERT_AUX_PCM;
  2395. } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
  2396. sizeof("QUAT_AUX_PCM"))) {
  2397. idx = QUAT_AUX_PCM;
  2398. } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
  2399. sizeof("QUIN_AUX_PCM"))) {
  2400. idx = QUIN_AUX_PCM;
  2401. } else {
  2402. pr_err("%s: unsupported port: %s\n",
  2403. __func__, kcontrol->id.name);
  2404. idx = -EINVAL;
  2405. }
  2406. return idx;
  2407. }
  2408. static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2409. struct snd_ctl_elem_value *ucontrol)
  2410. {
  2411. int idx = aux_pcm_get_port_idx(kcontrol);
  2412. if (idx < 0)
  2413. return idx;
  2414. aux_pcm_rx_cfg[idx].sample_rate =
  2415. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2416. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2417. idx, aux_pcm_rx_cfg[idx].sample_rate,
  2418. ucontrol->value.enumerated.item[0]);
  2419. return 0;
  2420. }
  2421. static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2422. struct snd_ctl_elem_value *ucontrol)
  2423. {
  2424. int idx = aux_pcm_get_port_idx(kcontrol);
  2425. if (idx < 0)
  2426. return idx;
  2427. ucontrol->value.enumerated.item[0] =
  2428. aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
  2429. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2430. idx, aux_pcm_rx_cfg[idx].sample_rate,
  2431. ucontrol->value.enumerated.item[0]);
  2432. return 0;
  2433. }
  2434. static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2435. struct snd_ctl_elem_value *ucontrol)
  2436. {
  2437. int idx = aux_pcm_get_port_idx(kcontrol);
  2438. if (idx < 0)
  2439. return idx;
  2440. aux_pcm_tx_cfg[idx].sample_rate =
  2441. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2442. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2443. idx, aux_pcm_tx_cfg[idx].sample_rate,
  2444. ucontrol->value.enumerated.item[0]);
  2445. return 0;
  2446. }
  2447. static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2448. struct snd_ctl_elem_value *ucontrol)
  2449. {
  2450. int idx = aux_pcm_get_port_idx(kcontrol);
  2451. if (idx < 0)
  2452. return idx;
  2453. ucontrol->value.enumerated.item[0] =
  2454. aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
  2455. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2456. idx, aux_pcm_tx_cfg[idx].sample_rate,
  2457. ucontrol->value.enumerated.item[0]);
  2458. return 0;
  2459. }
  2460. static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
  2461. {
  2462. int idx;
  2463. if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
  2464. sizeof("PRIM_MI2S_RX"))) {
  2465. idx = PRIM_MI2S;
  2466. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
  2467. sizeof("SEC_MI2S_RX"))) {
  2468. idx = SEC_MI2S;
  2469. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
  2470. sizeof("TERT_MI2S_RX"))) {
  2471. idx = TERT_MI2S;
  2472. } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
  2473. sizeof("QUAT_MI2S_RX"))) {
  2474. idx = QUAT_MI2S;
  2475. } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
  2476. sizeof("QUIN_MI2S_RX"))) {
  2477. idx = QUIN_MI2S;
  2478. } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
  2479. sizeof("PRIM_MI2S_TX"))) {
  2480. idx = PRIM_MI2S;
  2481. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
  2482. sizeof("SEC_MI2S_TX"))) {
  2483. idx = SEC_MI2S;
  2484. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
  2485. sizeof("TERT_MI2S_TX"))) {
  2486. idx = TERT_MI2S;
  2487. } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
  2488. sizeof("QUAT_MI2S_TX"))) {
  2489. idx = QUAT_MI2S;
  2490. } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
  2491. sizeof("QUIN_MI2S_TX"))) {
  2492. idx = QUIN_MI2S;
  2493. } else {
  2494. pr_err("%s: unsupported channel: %s\n",
  2495. __func__, kcontrol->id.name);
  2496. idx = -EINVAL;
  2497. }
  2498. return idx;
  2499. }
  2500. static int mi2s_get_sample_rate_val(int sample_rate)
  2501. {
  2502. int sample_rate_val;
  2503. switch (sample_rate) {
  2504. case SAMPLING_RATE_8KHZ:
  2505. sample_rate_val = 0;
  2506. break;
  2507. case SAMPLING_RATE_11P025KHZ:
  2508. sample_rate_val = 1;
  2509. break;
  2510. case SAMPLING_RATE_16KHZ:
  2511. sample_rate_val = 2;
  2512. break;
  2513. case SAMPLING_RATE_22P05KHZ:
  2514. sample_rate_val = 3;
  2515. break;
  2516. case SAMPLING_RATE_32KHZ:
  2517. sample_rate_val = 4;
  2518. break;
  2519. case SAMPLING_RATE_44P1KHZ:
  2520. sample_rate_val = 5;
  2521. break;
  2522. case SAMPLING_RATE_48KHZ:
  2523. sample_rate_val = 6;
  2524. break;
  2525. case SAMPLING_RATE_96KHZ:
  2526. sample_rate_val = 7;
  2527. break;
  2528. case SAMPLING_RATE_192KHZ:
  2529. sample_rate_val = 8;
  2530. break;
  2531. default:
  2532. sample_rate_val = 6;
  2533. break;
  2534. }
  2535. return sample_rate_val;
  2536. }
  2537. static int mi2s_get_sample_rate(int value)
  2538. {
  2539. int sample_rate;
  2540. switch (value) {
  2541. case 0:
  2542. sample_rate = SAMPLING_RATE_8KHZ;
  2543. break;
  2544. case 1:
  2545. sample_rate = SAMPLING_RATE_11P025KHZ;
  2546. break;
  2547. case 2:
  2548. sample_rate = SAMPLING_RATE_16KHZ;
  2549. break;
  2550. case 3:
  2551. sample_rate = SAMPLING_RATE_22P05KHZ;
  2552. break;
  2553. case 4:
  2554. sample_rate = SAMPLING_RATE_32KHZ;
  2555. break;
  2556. case 5:
  2557. sample_rate = SAMPLING_RATE_44P1KHZ;
  2558. break;
  2559. case 6:
  2560. sample_rate = SAMPLING_RATE_48KHZ;
  2561. break;
  2562. case 7:
  2563. sample_rate = SAMPLING_RATE_96KHZ;
  2564. break;
  2565. case 8:
  2566. sample_rate = SAMPLING_RATE_192KHZ;
  2567. break;
  2568. default:
  2569. sample_rate = SAMPLING_RATE_48KHZ;
  2570. break;
  2571. }
  2572. return sample_rate;
  2573. }
  2574. static int mi2s_auxpcm_get_format(int value)
  2575. {
  2576. int format;
  2577. switch (value) {
  2578. case 0:
  2579. format = SNDRV_PCM_FORMAT_S16_LE;
  2580. break;
  2581. case 1:
  2582. format = SNDRV_PCM_FORMAT_S24_LE;
  2583. break;
  2584. case 2:
  2585. format = SNDRV_PCM_FORMAT_S24_3LE;
  2586. break;
  2587. case 3:
  2588. format = SNDRV_PCM_FORMAT_S32_LE;
  2589. break;
  2590. default:
  2591. format = SNDRV_PCM_FORMAT_S16_LE;
  2592. break;
  2593. }
  2594. return format;
  2595. }
  2596. static int mi2s_auxpcm_get_format_value(int format)
  2597. {
  2598. int value;
  2599. switch (format) {
  2600. case SNDRV_PCM_FORMAT_S16_LE:
  2601. value = 0;
  2602. break;
  2603. case SNDRV_PCM_FORMAT_S24_LE:
  2604. value = 1;
  2605. break;
  2606. case SNDRV_PCM_FORMAT_S24_3LE:
  2607. value = 2;
  2608. break;
  2609. case SNDRV_PCM_FORMAT_S32_LE:
  2610. value = 3;
  2611. break;
  2612. default:
  2613. value = 0;
  2614. break;
  2615. }
  2616. return value;
  2617. }
  2618. static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2619. struct snd_ctl_elem_value *ucontrol)
  2620. {
  2621. int idx = mi2s_get_port_idx(kcontrol);
  2622. if (idx < 0)
  2623. return idx;
  2624. mi2s_rx_cfg[idx].sample_rate =
  2625. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2626. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2627. idx, mi2s_rx_cfg[idx].sample_rate,
  2628. ucontrol->value.enumerated.item[0]);
  2629. return 0;
  2630. }
  2631. static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2632. struct snd_ctl_elem_value *ucontrol)
  2633. {
  2634. int idx = mi2s_get_port_idx(kcontrol);
  2635. if (idx < 0)
  2636. return idx;
  2637. ucontrol->value.enumerated.item[0] =
  2638. mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
  2639. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2640. idx, mi2s_rx_cfg[idx].sample_rate,
  2641. ucontrol->value.enumerated.item[0]);
  2642. return 0;
  2643. }
  2644. static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2645. struct snd_ctl_elem_value *ucontrol)
  2646. {
  2647. int idx = mi2s_get_port_idx(kcontrol);
  2648. if (idx < 0)
  2649. return idx;
  2650. mi2s_tx_cfg[idx].sample_rate =
  2651. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2652. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2653. idx, mi2s_tx_cfg[idx].sample_rate,
  2654. ucontrol->value.enumerated.item[0]);
  2655. return 0;
  2656. }
  2657. static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2658. struct snd_ctl_elem_value *ucontrol)
  2659. {
  2660. int idx = mi2s_get_port_idx(kcontrol);
  2661. if (idx < 0)
  2662. return idx;
  2663. ucontrol->value.enumerated.item[0] =
  2664. mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
  2665. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2666. idx, mi2s_tx_cfg[idx].sample_rate,
  2667. ucontrol->value.enumerated.item[0]);
  2668. return 0;
  2669. }
  2670. static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
  2671. struct snd_ctl_elem_value *ucontrol)
  2672. {
  2673. int idx = mi2s_get_port_idx(kcontrol);
  2674. if (idx < 0)
  2675. return idx;
  2676. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  2677. idx, mi2s_rx_cfg[idx].channels);
  2678. ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
  2679. return 0;
  2680. }
  2681. static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
  2682. struct snd_ctl_elem_value *ucontrol)
  2683. {
  2684. int idx = mi2s_get_port_idx(kcontrol);
  2685. if (idx < 0)
  2686. return idx;
  2687. mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  2688. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  2689. idx, mi2s_rx_cfg[idx].channels);
  2690. return 1;
  2691. }
  2692. static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
  2693. struct snd_ctl_elem_value *ucontrol)
  2694. {
  2695. int idx = mi2s_get_port_idx(kcontrol);
  2696. if (idx < 0)
  2697. return idx;
  2698. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  2699. idx, mi2s_tx_cfg[idx].channels);
  2700. ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
  2701. return 0;
  2702. }
  2703. static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
  2704. struct snd_ctl_elem_value *ucontrol)
  2705. {
  2706. int idx = mi2s_get_port_idx(kcontrol);
  2707. if (idx < 0)
  2708. return idx;
  2709. mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  2710. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  2711. idx, mi2s_tx_cfg[idx].channels);
  2712. return 1;
  2713. }
  2714. static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
  2715. struct snd_ctl_elem_value *ucontrol)
  2716. {
  2717. int idx = mi2s_get_port_idx(kcontrol);
  2718. if (idx < 0)
  2719. return idx;
  2720. ucontrol->value.enumerated.item[0] =
  2721. mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
  2722. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2723. idx, mi2s_rx_cfg[idx].bit_format,
  2724. ucontrol->value.enumerated.item[0]);
  2725. return 0;
  2726. }
  2727. static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
  2728. struct snd_ctl_elem_value *ucontrol)
  2729. {
  2730. int idx = mi2s_get_port_idx(kcontrol);
  2731. if (idx < 0)
  2732. return idx;
  2733. mi2s_rx_cfg[idx].bit_format =
  2734. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2735. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2736. idx, mi2s_rx_cfg[idx].bit_format,
  2737. ucontrol->value.enumerated.item[0]);
  2738. return 0;
  2739. }
  2740. static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
  2741. struct snd_ctl_elem_value *ucontrol)
  2742. {
  2743. int idx = mi2s_get_port_idx(kcontrol);
  2744. if (idx < 0)
  2745. return idx;
  2746. ucontrol->value.enumerated.item[0] =
  2747. mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
  2748. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2749. idx, mi2s_tx_cfg[idx].bit_format,
  2750. ucontrol->value.enumerated.item[0]);
  2751. return 0;
  2752. }
  2753. static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
  2754. struct snd_ctl_elem_value *ucontrol)
  2755. {
  2756. int idx = mi2s_get_port_idx(kcontrol);
  2757. if (idx < 0)
  2758. return idx;
  2759. mi2s_tx_cfg[idx].bit_format =
  2760. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2761. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2762. idx, mi2s_tx_cfg[idx].bit_format,
  2763. ucontrol->value.enumerated.item[0]);
  2764. return 0;
  2765. }
  2766. static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
  2767. struct snd_ctl_elem_value *ucontrol)
  2768. {
  2769. int idx = aux_pcm_get_port_idx(kcontrol);
  2770. if (idx < 0)
  2771. return idx;
  2772. ucontrol->value.enumerated.item[0] =
  2773. mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
  2774. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2775. idx, aux_pcm_rx_cfg[idx].bit_format,
  2776. ucontrol->value.enumerated.item[0]);
  2777. return 0;
  2778. }
  2779. static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
  2780. struct snd_ctl_elem_value *ucontrol)
  2781. {
  2782. int idx = aux_pcm_get_port_idx(kcontrol);
  2783. if (idx < 0)
  2784. return idx;
  2785. aux_pcm_rx_cfg[idx].bit_format =
  2786. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2787. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2788. idx, aux_pcm_rx_cfg[idx].bit_format,
  2789. ucontrol->value.enumerated.item[0]);
  2790. return 0;
  2791. }
  2792. static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
  2793. struct snd_ctl_elem_value *ucontrol)
  2794. {
  2795. int idx = aux_pcm_get_port_idx(kcontrol);
  2796. if (idx < 0)
  2797. return idx;
  2798. ucontrol->value.enumerated.item[0] =
  2799. mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
  2800. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2801. idx, aux_pcm_tx_cfg[idx].bit_format,
  2802. ucontrol->value.enumerated.item[0]);
  2803. return 0;
  2804. }
  2805. static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
  2806. struct snd_ctl_elem_value *ucontrol)
  2807. {
  2808. int idx = aux_pcm_get_port_idx(kcontrol);
  2809. if (idx < 0)
  2810. return idx;
  2811. aux_pcm_tx_cfg[idx].bit_format =
  2812. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2813. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2814. idx, aux_pcm_tx_cfg[idx].bit_format,
  2815. ucontrol->value.enumerated.item[0]);
  2816. return 0;
  2817. }
  2818. static int msm_hifi_ctrl(struct snd_soc_codec *codec)
  2819. {
  2820. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  2821. struct snd_soc_card *card = codec->component.card;
  2822. struct msm_asoc_mach_data *pdata =
  2823. snd_soc_card_get_drvdata(card);
  2824. dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n", __func__,
  2825. msm_hifi_control);
  2826. if (!pdata || !pdata->hph_en1_gpio_p) {
  2827. dev_err(codec->dev, "%s: hph_en1_gpio is invalid\n", __func__);
  2828. return -EINVAL;
  2829. }
  2830. if (msm_hifi_control == MSM_HIFI_ON) {
  2831. msm_cdc_pinctrl_select_active_state(pdata->hph_en1_gpio_p);
  2832. /* 5msec delay needed as per HW requirement */
  2833. usleep_range(5000, 5010);
  2834. } else {
  2835. msm_cdc_pinctrl_select_sleep_state(pdata->hph_en1_gpio_p);
  2836. }
  2837. snd_soc_dapm_sync(dapm);
  2838. return 0;
  2839. }
  2840. static int msm_hifi_get(struct snd_kcontrol *kcontrol,
  2841. struct snd_ctl_elem_value *ucontrol)
  2842. {
  2843. pr_debug("%s: msm_hifi_control = %d\n",
  2844. __func__, msm_hifi_control);
  2845. ucontrol->value.integer.value[0] = msm_hifi_control;
  2846. return 0;
  2847. }
  2848. static int msm_hifi_put(struct snd_kcontrol *kcontrol,
  2849. struct snd_ctl_elem_value *ucontrol)
  2850. {
  2851. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  2852. dev_dbg(codec->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
  2853. __func__, ucontrol->value.integer.value[0]);
  2854. msm_hifi_control = ucontrol->value.integer.value[0];
  2855. msm_hifi_ctrl(codec);
  2856. return 0;
  2857. }
  2858. static const struct snd_kcontrol_new msm_int_snd_controls[] = {
  2859. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
  2860. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2861. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
  2862. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2863. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
  2864. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2865. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
  2866. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2867. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
  2868. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2869. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
  2870. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2871. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
  2872. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2873. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
  2874. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2875. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
  2876. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2877. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
  2878. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2879. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
  2880. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2881. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
  2882. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2883. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
  2884. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2885. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
  2886. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2887. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
  2888. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2889. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
  2890. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2891. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
  2892. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2893. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
  2894. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2895. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
  2896. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2897. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
  2898. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2899. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
  2900. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2901. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
  2902. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2903. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
  2904. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2905. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
  2906. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2907. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
  2908. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2909. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
  2910. wsa_cdc_dma_rx_0_sample_rate,
  2911. cdc_dma_rx_sample_rate_get,
  2912. cdc_dma_rx_sample_rate_put),
  2913. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
  2914. wsa_cdc_dma_rx_1_sample_rate,
  2915. cdc_dma_rx_sample_rate_get,
  2916. cdc_dma_rx_sample_rate_put),
  2917. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
  2918. rx_cdc_dma_rx_0_sample_rate,
  2919. cdc_dma_rx_sample_rate_get,
  2920. cdc_dma_rx_sample_rate_put),
  2921. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
  2922. rx_cdc_dma_rx_1_sample_rate,
  2923. cdc_dma_rx_sample_rate_get,
  2924. cdc_dma_rx_sample_rate_put),
  2925. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
  2926. rx_cdc_dma_rx_2_sample_rate,
  2927. cdc_dma_rx_sample_rate_get,
  2928. cdc_dma_rx_sample_rate_put),
  2929. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
  2930. rx_cdc_dma_rx_3_sample_rate,
  2931. cdc_dma_rx_sample_rate_get,
  2932. cdc_dma_rx_sample_rate_put),
  2933. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
  2934. rx_cdc_dma_rx_5_sample_rate,
  2935. cdc_dma_rx_sample_rate_get,
  2936. cdc_dma_rx_sample_rate_put),
  2937. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
  2938. wsa_cdc_dma_tx_0_sample_rate,
  2939. cdc_dma_tx_sample_rate_get,
  2940. cdc_dma_tx_sample_rate_put),
  2941. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
  2942. wsa_cdc_dma_tx_1_sample_rate,
  2943. cdc_dma_tx_sample_rate_get,
  2944. cdc_dma_tx_sample_rate_put),
  2945. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
  2946. wsa_cdc_dma_tx_2_sample_rate,
  2947. cdc_dma_tx_sample_rate_get,
  2948. cdc_dma_tx_sample_rate_put),
  2949. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
  2950. tx_cdc_dma_tx_0_sample_rate,
  2951. cdc_dma_tx_sample_rate_get,
  2952. cdc_dma_tx_sample_rate_put),
  2953. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
  2954. tx_cdc_dma_tx_3_sample_rate,
  2955. cdc_dma_tx_sample_rate_get,
  2956. cdc_dma_tx_sample_rate_put),
  2957. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
  2958. tx_cdc_dma_tx_4_sample_rate,
  2959. cdc_dma_tx_sample_rate_get,
  2960. cdc_dma_tx_sample_rate_put),
  2961. };
  2962. static const struct snd_kcontrol_new msm_tavil_snd_controls[] = {
  2963. SOC_ENUM_EXT("SLIM_0_RX Channels", slim_0_rx_chs,
  2964. slim_rx_ch_get, slim_rx_ch_put),
  2965. SOC_ENUM_EXT("SLIM_2_RX Channels", slim_2_rx_chs,
  2966. slim_rx_ch_get, slim_rx_ch_put),
  2967. SOC_ENUM_EXT("SLIM_0_TX Channels", slim_0_tx_chs,
  2968. slim_tx_ch_get, slim_tx_ch_put),
  2969. SOC_ENUM_EXT("SLIM_1_TX Channels", slim_1_tx_chs,
  2970. slim_tx_ch_get, slim_tx_ch_put),
  2971. SOC_ENUM_EXT("SLIM_5_RX Channels", slim_5_rx_chs,
  2972. slim_rx_ch_get, slim_rx_ch_put),
  2973. SOC_ENUM_EXT("SLIM_6_RX Channels", slim_6_rx_chs,
  2974. slim_rx_ch_get, slim_rx_ch_put),
  2975. SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
  2976. msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
  2977. SOC_ENUM_EXT("SLIM_0_RX Format", slim_0_rx_format,
  2978. slim_rx_bit_format_get, slim_rx_bit_format_put),
  2979. SOC_ENUM_EXT("SLIM_5_RX Format", slim_5_rx_format,
  2980. slim_rx_bit_format_get, slim_rx_bit_format_put),
  2981. SOC_ENUM_EXT("SLIM_6_RX Format", slim_6_rx_format,
  2982. slim_rx_bit_format_get, slim_rx_bit_format_put),
  2983. SOC_ENUM_EXT("SLIM_0_TX Format", slim_0_tx_format,
  2984. slim_tx_bit_format_get, slim_tx_bit_format_put),
  2985. SOC_ENUM_EXT("SLIM_0_RX SampleRate", slim_0_rx_sample_rate,
  2986. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  2987. SOC_ENUM_EXT("SLIM_2_RX SampleRate", slim_2_rx_sample_rate,
  2988. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  2989. SOC_ENUM_EXT("SLIM_0_TX SampleRate", slim_0_tx_sample_rate,
  2990. slim_tx_sample_rate_get, slim_tx_sample_rate_put),
  2991. SOC_ENUM_EXT("SLIM_5_RX SampleRate", slim_5_rx_sample_rate,
  2992. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  2993. SOC_ENUM_EXT("SLIM_6_RX SampleRate", slim_6_rx_sample_rate,
  2994. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  2995. };
  2996. static const struct snd_kcontrol_new msm_common_snd_controls[] = {
  2997. SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
  2998. usb_audio_rx_ch_get, usb_audio_rx_ch_put),
  2999. SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
  3000. usb_audio_tx_ch_get, usb_audio_tx_ch_put),
  3001. SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
  3002. ext_disp_rx_ch_get, ext_disp_rx_ch_put),
  3003. SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
  3004. proxy_rx_ch_get, proxy_rx_ch_put),
  3005. SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
  3006. usb_audio_rx_format_get, usb_audio_rx_format_put),
  3007. SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
  3008. usb_audio_tx_format_get, usb_audio_tx_format_put),
  3009. SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
  3010. ext_disp_rx_format_get, ext_disp_rx_format_put),
  3011. SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
  3012. usb_audio_rx_sample_rate_get,
  3013. usb_audio_rx_sample_rate_put),
  3014. SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
  3015. usb_audio_tx_sample_rate_get,
  3016. usb_audio_tx_sample_rate_put),
  3017. SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
  3018. ext_disp_rx_sample_rate_get,
  3019. ext_disp_rx_sample_rate_put),
  3020. SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3021. tdm_rx_sample_rate_get,
  3022. tdm_rx_sample_rate_put),
  3023. SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3024. tdm_tx_sample_rate_get,
  3025. tdm_tx_sample_rate_put),
  3026. SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
  3027. tdm_rx_format_get,
  3028. tdm_rx_format_put),
  3029. SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
  3030. tdm_tx_format_get,
  3031. tdm_tx_format_put),
  3032. SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
  3033. tdm_rx_ch_get,
  3034. tdm_rx_ch_put),
  3035. SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
  3036. tdm_tx_ch_get,
  3037. tdm_tx_ch_put),
  3038. SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3039. tdm_rx_sample_rate_get,
  3040. tdm_rx_sample_rate_put),
  3041. SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3042. tdm_tx_sample_rate_get,
  3043. tdm_tx_sample_rate_put),
  3044. SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
  3045. tdm_rx_format_get,
  3046. tdm_rx_format_put),
  3047. SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
  3048. tdm_tx_format_get,
  3049. tdm_tx_format_put),
  3050. SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
  3051. tdm_rx_ch_get,
  3052. tdm_rx_ch_put),
  3053. SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
  3054. tdm_tx_ch_get,
  3055. tdm_tx_ch_put),
  3056. SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3057. tdm_rx_sample_rate_get,
  3058. tdm_rx_sample_rate_put),
  3059. SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3060. tdm_tx_sample_rate_get,
  3061. tdm_tx_sample_rate_put),
  3062. SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
  3063. tdm_rx_format_get,
  3064. tdm_rx_format_put),
  3065. SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
  3066. tdm_tx_format_get,
  3067. tdm_tx_format_put),
  3068. SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
  3069. tdm_rx_ch_get,
  3070. tdm_rx_ch_put),
  3071. SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
  3072. tdm_tx_ch_get,
  3073. tdm_tx_ch_put),
  3074. SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3075. tdm_rx_sample_rate_get,
  3076. tdm_rx_sample_rate_put),
  3077. SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3078. tdm_tx_sample_rate_get,
  3079. tdm_tx_sample_rate_put),
  3080. SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
  3081. tdm_rx_format_get,
  3082. tdm_rx_format_put),
  3083. SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
  3084. tdm_tx_format_get,
  3085. tdm_tx_format_put),
  3086. SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
  3087. tdm_rx_ch_get,
  3088. tdm_rx_ch_put),
  3089. SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
  3090. tdm_tx_ch_get,
  3091. tdm_tx_ch_put),
  3092. SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3093. tdm_rx_sample_rate_get,
  3094. tdm_rx_sample_rate_put),
  3095. SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3096. tdm_tx_sample_rate_get,
  3097. tdm_tx_sample_rate_put),
  3098. SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
  3099. tdm_rx_format_get,
  3100. tdm_rx_format_put),
  3101. SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
  3102. tdm_tx_format_get,
  3103. tdm_tx_format_put),
  3104. SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
  3105. tdm_rx_ch_get,
  3106. tdm_rx_ch_put),
  3107. SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
  3108. tdm_tx_ch_get,
  3109. tdm_tx_ch_put),
  3110. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  3111. aux_pcm_rx_sample_rate_get,
  3112. aux_pcm_rx_sample_rate_put),
  3113. SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
  3114. aux_pcm_rx_sample_rate_get,
  3115. aux_pcm_rx_sample_rate_put),
  3116. SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
  3117. aux_pcm_rx_sample_rate_get,
  3118. aux_pcm_rx_sample_rate_put),
  3119. SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
  3120. aux_pcm_rx_sample_rate_get,
  3121. aux_pcm_rx_sample_rate_put),
  3122. SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
  3123. aux_pcm_rx_sample_rate_get,
  3124. aux_pcm_rx_sample_rate_put),
  3125. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  3126. aux_pcm_tx_sample_rate_get,
  3127. aux_pcm_tx_sample_rate_put),
  3128. SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
  3129. aux_pcm_tx_sample_rate_get,
  3130. aux_pcm_tx_sample_rate_put),
  3131. SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
  3132. aux_pcm_tx_sample_rate_get,
  3133. aux_pcm_tx_sample_rate_put),
  3134. SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
  3135. aux_pcm_tx_sample_rate_get,
  3136. aux_pcm_tx_sample_rate_put),
  3137. SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
  3138. aux_pcm_tx_sample_rate_get,
  3139. aux_pcm_tx_sample_rate_put),
  3140. SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
  3141. mi2s_rx_sample_rate_get,
  3142. mi2s_rx_sample_rate_put),
  3143. SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
  3144. mi2s_rx_sample_rate_get,
  3145. mi2s_rx_sample_rate_put),
  3146. SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
  3147. mi2s_rx_sample_rate_get,
  3148. mi2s_rx_sample_rate_put),
  3149. SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
  3150. mi2s_rx_sample_rate_get,
  3151. mi2s_rx_sample_rate_put),
  3152. SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
  3153. mi2s_rx_sample_rate_get,
  3154. mi2s_rx_sample_rate_put),
  3155. SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
  3156. mi2s_tx_sample_rate_get,
  3157. mi2s_tx_sample_rate_put),
  3158. SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
  3159. mi2s_tx_sample_rate_get,
  3160. mi2s_tx_sample_rate_put),
  3161. SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
  3162. mi2s_tx_sample_rate_get,
  3163. mi2s_tx_sample_rate_put),
  3164. SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
  3165. mi2s_tx_sample_rate_get,
  3166. mi2s_tx_sample_rate_put),
  3167. SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
  3168. mi2s_tx_sample_rate_get,
  3169. mi2s_tx_sample_rate_put),
  3170. SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
  3171. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3172. SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
  3173. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3174. SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
  3175. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3176. SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
  3177. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3178. SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
  3179. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3180. SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
  3181. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3182. SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
  3183. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3184. SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
  3185. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3186. SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
  3187. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3188. SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
  3189. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3190. SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
  3191. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3192. SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
  3193. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3194. SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
  3195. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3196. SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
  3197. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3198. SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
  3199. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3200. SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
  3201. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3202. SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
  3203. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3204. SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
  3205. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3206. SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
  3207. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3208. SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
  3209. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3210. SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
  3211. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3212. SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
  3213. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3214. SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
  3215. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3216. SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
  3217. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3218. SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
  3219. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3220. SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
  3221. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3222. SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
  3223. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3224. SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
  3225. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3226. SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
  3227. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3228. SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
  3229. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3230. SOC_ENUM_EXT("HiFi Function", hifi_function, msm_hifi_get,
  3231. msm_hifi_put),
  3232. SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
  3233. msm_bt_sample_rate_get,
  3234. msm_bt_sample_rate_put),
  3235. };
  3236. static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
  3237. int enable, bool dapm)
  3238. {
  3239. int ret = 0;
  3240. if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
  3241. ret = tavil_cdc_mclk_enable(codec, enable);
  3242. } else {
  3243. dev_err(codec->dev, "%s: unknown codec to enable ext clk\n",
  3244. __func__);
  3245. ret = -EINVAL;
  3246. }
  3247. return ret;
  3248. }
  3249. static int msm_snd_enable_codec_ext_tx_clk(struct snd_soc_codec *codec,
  3250. int enable, bool dapm)
  3251. {
  3252. int ret = 0;
  3253. if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
  3254. ret = tavil_cdc_mclk_tx_enable(codec, enable);
  3255. } else {
  3256. dev_err(codec->dev, "%s: unknown codec to enable TX ext clk\n",
  3257. __func__);
  3258. ret = -EINVAL;
  3259. }
  3260. return ret;
  3261. }
  3262. static int msm_mclk_tx_event(struct snd_soc_dapm_widget *w,
  3263. struct snd_kcontrol *kcontrol, int event)
  3264. {
  3265. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3266. pr_debug("%s: event = %d\n", __func__, event);
  3267. switch (event) {
  3268. case SND_SOC_DAPM_PRE_PMU:
  3269. return msm_snd_enable_codec_ext_tx_clk(codec, 1, true);
  3270. case SND_SOC_DAPM_POST_PMD:
  3271. return msm_snd_enable_codec_ext_tx_clk(codec, 0, true);
  3272. }
  3273. return 0;
  3274. }
  3275. static int msm_mclk_event(struct snd_soc_dapm_widget *w,
  3276. struct snd_kcontrol *kcontrol, int event)
  3277. {
  3278. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3279. pr_debug("%s: event = %d\n", __func__, event);
  3280. switch (event) {
  3281. case SND_SOC_DAPM_PRE_PMU:
  3282. return msm_snd_enable_codec_ext_clk(codec, 1, true);
  3283. case SND_SOC_DAPM_POST_PMD:
  3284. return msm_snd_enable_codec_ext_clk(codec, 0, true);
  3285. }
  3286. return 0;
  3287. }
  3288. static int msm_hifi_ctrl_event(struct snd_soc_dapm_widget *w,
  3289. struct snd_kcontrol *k, int event)
  3290. {
  3291. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3292. struct snd_soc_card *card = codec->component.card;
  3293. struct msm_asoc_mach_data *pdata =
  3294. snd_soc_card_get_drvdata(card);
  3295. dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n",
  3296. __func__, msm_hifi_control);
  3297. if (!pdata || !pdata->hph_en0_gpio_p) {
  3298. dev_err(codec->dev, "%s: hph_en0_gpio is invalid\n", __func__);
  3299. return -EINVAL;
  3300. }
  3301. if (msm_hifi_control != MSM_HIFI_ON) {
  3302. dev_dbg(codec->dev, "%s: HiFi mixer control is not set\n",
  3303. __func__);
  3304. return 0;
  3305. }
  3306. switch (event) {
  3307. case SND_SOC_DAPM_POST_PMU:
  3308. msm_cdc_pinctrl_select_active_state(pdata->hph_en0_gpio_p);
  3309. break;
  3310. case SND_SOC_DAPM_PRE_PMD:
  3311. msm_cdc_pinctrl_select_sleep_state(pdata->hph_en0_gpio_p);
  3312. break;
  3313. }
  3314. return 0;
  3315. }
  3316. static const struct snd_soc_dapm_widget msm_dapm_widgets_tavil[] = {
  3317. SND_SOC_DAPM_SUPPLY("MCLK", SND_SOC_NOPM, 0, 0,
  3318. msm_mclk_event,
  3319. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  3320. SND_SOC_DAPM_SUPPLY("MCLK TX", SND_SOC_NOPM, 0, 0,
  3321. msm_mclk_tx_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  3322. SND_SOC_DAPM_SPK("Lineout_1 amp", NULL),
  3323. SND_SOC_DAPM_SPK("Lineout_2 amp", NULL),
  3324. SND_SOC_DAPM_SPK("hifi amp", msm_hifi_ctrl_event),
  3325. SND_SOC_DAPM_MIC("Handset Mic", NULL),
  3326. SND_SOC_DAPM_MIC("Headset Mic", NULL),
  3327. SND_SOC_DAPM_MIC("ANCRight Headset Mic", NULL),
  3328. SND_SOC_DAPM_MIC("ANCLeft Headset Mic", NULL),
  3329. SND_SOC_DAPM_MIC("Analog Mic5", NULL),
  3330. SND_SOC_DAPM_MIC("Digital Mic0", NULL),
  3331. SND_SOC_DAPM_MIC("Digital Mic1", NULL),
  3332. SND_SOC_DAPM_MIC("Digital Mic2", NULL),
  3333. SND_SOC_DAPM_MIC("Digital Mic3", NULL),
  3334. SND_SOC_DAPM_MIC("Digital Mic4", NULL),
  3335. SND_SOC_DAPM_MIC("Digital Mic5", NULL),
  3336. };
  3337. static int msm_dmic_event(struct snd_soc_dapm_widget *w,
  3338. struct snd_kcontrol *kcontrol, int event)
  3339. {
  3340. struct msm_asoc_mach_data *pdata = NULL;
  3341. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3342. int ret = 0;
  3343. u32 dmic_idx;
  3344. int *dmic_gpio_cnt;
  3345. struct device_node *dmic_gpio;
  3346. char *wname;
  3347. wname = strpbrk(w->name, "0123");
  3348. if (!wname) {
  3349. dev_err(codec->dev, "%s: widget not found\n", __func__);
  3350. return -EINVAL;
  3351. }
  3352. ret = kstrtouint(wname, 10, &dmic_idx);
  3353. if (ret < 0) {
  3354. dev_err(codec->dev, "%s: Invalid DMIC line on the codec\n",
  3355. __func__);
  3356. return -EINVAL;
  3357. }
  3358. pdata = snd_soc_card_get_drvdata(codec->component.card);
  3359. switch (dmic_idx) {
  3360. case 0:
  3361. case 1:
  3362. dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
  3363. dmic_gpio = pdata->dmic01_gpio_p;
  3364. break;
  3365. case 2:
  3366. case 3:
  3367. dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
  3368. dmic_gpio = pdata->dmic23_gpio_p;
  3369. break;
  3370. default:
  3371. dev_err(codec->dev, "%s: Invalid DMIC Selection\n",
  3372. __func__);
  3373. return -EINVAL;
  3374. }
  3375. dev_dbg(codec->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
  3376. __func__, event, dmic_idx, *dmic_gpio_cnt);
  3377. switch (event) {
  3378. case SND_SOC_DAPM_PRE_PMU:
  3379. (*dmic_gpio_cnt)++;
  3380. if (*dmic_gpio_cnt == 1) {
  3381. ret = msm_cdc_pinctrl_select_active_state(
  3382. dmic_gpio);
  3383. if (ret < 0) {
  3384. pr_err("%s: gpio set cannot be activated %sd",
  3385. __func__, "dmic_gpio");
  3386. return ret;
  3387. }
  3388. }
  3389. break;
  3390. case SND_SOC_DAPM_POST_PMD:
  3391. (*dmic_gpio_cnt)--;
  3392. if (*dmic_gpio_cnt == 0) {
  3393. ret = msm_cdc_pinctrl_select_sleep_state(
  3394. dmic_gpio);
  3395. if (ret < 0) {
  3396. pr_err("%s: gpio set cannot be de-activated %sd",
  3397. __func__, "dmic_gpio");
  3398. return ret;
  3399. }
  3400. }
  3401. break;
  3402. default:
  3403. pr_err("%s: invalid DAPM event %d\n", __func__, event);
  3404. return -EINVAL;
  3405. }
  3406. return 0;
  3407. }
  3408. static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
  3409. SND_SOC_DAPM_MIC("Analog Mic1", NULL),
  3410. SND_SOC_DAPM_MIC("Analog Mic2", NULL),
  3411. SND_SOC_DAPM_MIC("Analog Mic3", NULL),
  3412. SND_SOC_DAPM_MIC("Analog Mic4", NULL),
  3413. SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
  3414. SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
  3415. SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
  3416. SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
  3417. };
  3418. static inline int param_is_mask(int p)
  3419. {
  3420. return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
  3421. (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
  3422. }
  3423. static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
  3424. int n)
  3425. {
  3426. return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
  3427. }
  3428. static void param_set_mask(struct snd_pcm_hw_params *p, int n,
  3429. unsigned int bit)
  3430. {
  3431. if (bit >= SNDRV_MASK_MAX)
  3432. return;
  3433. if (param_is_mask(n)) {
  3434. struct snd_mask *m = param_to_mask(p, n);
  3435. m->bits[0] = 0;
  3436. m->bits[1] = 0;
  3437. m->bits[bit >> 5] |= (1 << (bit & 31));
  3438. }
  3439. }
  3440. static int msm_slim_get_ch_from_beid(int32_t be_id)
  3441. {
  3442. int ch_id = 0;
  3443. switch (be_id) {
  3444. case MSM_BACKEND_DAI_SLIMBUS_0_RX:
  3445. ch_id = SLIM_RX_0;
  3446. break;
  3447. case MSM_BACKEND_DAI_SLIMBUS_1_RX:
  3448. ch_id = SLIM_RX_1;
  3449. break;
  3450. case MSM_BACKEND_DAI_SLIMBUS_2_RX:
  3451. ch_id = SLIM_RX_2;
  3452. break;
  3453. case MSM_BACKEND_DAI_SLIMBUS_3_RX:
  3454. ch_id = SLIM_RX_3;
  3455. break;
  3456. case MSM_BACKEND_DAI_SLIMBUS_4_RX:
  3457. ch_id = SLIM_RX_4;
  3458. break;
  3459. case MSM_BACKEND_DAI_SLIMBUS_6_RX:
  3460. ch_id = SLIM_RX_6;
  3461. break;
  3462. case MSM_BACKEND_DAI_SLIMBUS_0_TX:
  3463. ch_id = SLIM_TX_0;
  3464. break;
  3465. case MSM_BACKEND_DAI_SLIMBUS_3_TX:
  3466. ch_id = SLIM_TX_3;
  3467. break;
  3468. default:
  3469. ch_id = SLIM_RX_0;
  3470. break;
  3471. }
  3472. return ch_id;
  3473. }
  3474. static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
  3475. {
  3476. int idx = 0;
  3477. switch (be_id) {
  3478. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  3479. idx = WSA_CDC_DMA_RX_0;
  3480. break;
  3481. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  3482. idx = WSA_CDC_DMA_TX_0;
  3483. break;
  3484. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  3485. idx = WSA_CDC_DMA_RX_1;
  3486. break;
  3487. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  3488. idx = WSA_CDC_DMA_TX_1;
  3489. break;
  3490. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  3491. idx = WSA_CDC_DMA_TX_2;
  3492. break;
  3493. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  3494. idx = RX_CDC_DMA_RX_0;
  3495. break;
  3496. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  3497. idx = RX_CDC_DMA_RX_1;
  3498. break;
  3499. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  3500. idx = RX_CDC_DMA_RX_2;
  3501. break;
  3502. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  3503. idx = RX_CDC_DMA_RX_3;
  3504. break;
  3505. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  3506. idx = RX_CDC_DMA_RX_5;
  3507. break;
  3508. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  3509. idx = TX_CDC_DMA_TX_0;
  3510. break;
  3511. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  3512. idx = TX_CDC_DMA_TX_3;
  3513. break;
  3514. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  3515. idx = TX_CDC_DMA_TX_4;
  3516. break;
  3517. default:
  3518. idx = RX_CDC_DMA_RX_0;
  3519. break;
  3520. }
  3521. return idx;
  3522. }
  3523. static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
  3524. {
  3525. int idx = -EINVAL;
  3526. switch (be_id) {
  3527. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  3528. idx = DP_RX_IDX;
  3529. break;
  3530. default:
  3531. pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
  3532. idx = -EINVAL;
  3533. break;
  3534. }
  3535. return idx;
  3536. }
  3537. static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  3538. struct snd_pcm_hw_params *params)
  3539. {
  3540. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3541. struct snd_interval *rate = hw_param_interval(params,
  3542. SNDRV_PCM_HW_PARAM_RATE);
  3543. struct snd_interval *channels = hw_param_interval(params,
  3544. SNDRV_PCM_HW_PARAM_CHANNELS);
  3545. int rc = 0;
  3546. int idx;
  3547. void *config = NULL;
  3548. struct snd_soc_codec *codec = NULL;
  3549. pr_debug("%s: format = %d, rate = %d\n",
  3550. __func__, params_format(params), params_rate(params));
  3551. switch (dai_link->id) {
  3552. case MSM_BACKEND_DAI_SLIMBUS_0_RX:
  3553. case MSM_BACKEND_DAI_SLIMBUS_1_RX:
  3554. case MSM_BACKEND_DAI_SLIMBUS_2_RX:
  3555. case MSM_BACKEND_DAI_SLIMBUS_3_RX:
  3556. case MSM_BACKEND_DAI_SLIMBUS_4_RX:
  3557. case MSM_BACKEND_DAI_SLIMBUS_6_RX:
  3558. idx = msm_slim_get_ch_from_beid(dai_link->id);
  3559. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3560. slim_rx_cfg[idx].bit_format);
  3561. rate->min = rate->max = slim_rx_cfg[idx].sample_rate;
  3562. channels->min = channels->max = slim_rx_cfg[idx].channels;
  3563. break;
  3564. case MSM_BACKEND_DAI_SLIMBUS_0_TX:
  3565. case MSM_BACKEND_DAI_SLIMBUS_3_TX:
  3566. idx = msm_slim_get_ch_from_beid(dai_link->id);
  3567. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3568. slim_tx_cfg[idx].bit_format);
  3569. rate->min = rate->max = slim_tx_cfg[idx].sample_rate;
  3570. channels->min = channels->max = slim_tx_cfg[idx].channels;
  3571. break;
  3572. case MSM_BACKEND_DAI_SLIMBUS_1_TX:
  3573. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3574. slim_tx_cfg[1].bit_format);
  3575. rate->min = rate->max = slim_tx_cfg[1].sample_rate;
  3576. channels->min = channels->max = slim_tx_cfg[1].channels;
  3577. break;
  3578. case MSM_BACKEND_DAI_SLIMBUS_4_TX:
  3579. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3580. SNDRV_PCM_FORMAT_S32_LE);
  3581. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  3582. channels->min = channels->max = msm_vi_feed_tx_ch;
  3583. break;
  3584. case MSM_BACKEND_DAI_SLIMBUS_5_RX:
  3585. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3586. slim_rx_cfg[5].bit_format);
  3587. rate->min = rate->max = slim_rx_cfg[5].sample_rate;
  3588. channels->min = channels->max = slim_rx_cfg[5].channels;
  3589. break;
  3590. case MSM_BACKEND_DAI_SLIMBUS_5_TX:
  3591. codec = rtd->codec;
  3592. rate->min = rate->max = SAMPLING_RATE_16KHZ;
  3593. channels->min = channels->max = 1;
  3594. config = msm_codec_fn.get_afe_config_fn(codec,
  3595. AFE_SLIMBUS_SLAVE_PORT_CONFIG);
  3596. if (config) {
  3597. rc = afe_set_config(AFE_SLIMBUS_SLAVE_PORT_CONFIG,
  3598. config, SLIMBUS_5_TX);
  3599. if (rc)
  3600. pr_err("%s: Failed to set slimbus slave port config %d\n",
  3601. __func__, rc);
  3602. }
  3603. break;
  3604. case MSM_BACKEND_DAI_SLIMBUS_7_RX:
  3605. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3606. slim_rx_cfg[SLIM_RX_7].bit_format);
  3607. rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
  3608. channels->min = channels->max =
  3609. slim_rx_cfg[SLIM_RX_7].channels;
  3610. break;
  3611. case MSM_BACKEND_DAI_SLIMBUS_7_TX:
  3612. rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
  3613. channels->min = channels->max =
  3614. slim_tx_cfg[SLIM_TX_7].channels;
  3615. break;
  3616. case MSM_BACKEND_DAI_SLIMBUS_8_TX:
  3617. rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
  3618. channels->min = channels->max =
  3619. slim_tx_cfg[SLIM_TX_8].channels;
  3620. break;
  3621. case MSM_BACKEND_DAI_USB_RX:
  3622. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3623. usb_rx_cfg.bit_format);
  3624. rate->min = rate->max = usb_rx_cfg.sample_rate;
  3625. channels->min = channels->max = usb_rx_cfg.channels;
  3626. break;
  3627. case MSM_BACKEND_DAI_USB_TX:
  3628. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3629. usb_tx_cfg.bit_format);
  3630. rate->min = rate->max = usb_tx_cfg.sample_rate;
  3631. channels->min = channels->max = usb_tx_cfg.channels;
  3632. break;
  3633. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  3634. idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
  3635. if (idx < 0) {
  3636. pr_err("%s: Incorrect ext disp idx %d\n",
  3637. __func__, idx);
  3638. rc = idx;
  3639. goto done;
  3640. }
  3641. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3642. ext_disp_rx_cfg[idx].bit_format);
  3643. rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
  3644. channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
  3645. break;
  3646. case MSM_BACKEND_DAI_AFE_PCM_RX:
  3647. channels->min = channels->max = proxy_rx_cfg.channels;
  3648. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  3649. break;
  3650. case MSM_BACKEND_DAI_PRI_TDM_RX_0:
  3651. channels->min = channels->max =
  3652. tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  3653. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3654. tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
  3655. rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
  3656. break;
  3657. case MSM_BACKEND_DAI_PRI_TDM_TX_0:
  3658. channels->min = channels->max =
  3659. tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  3660. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3661. tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
  3662. rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
  3663. break;
  3664. case MSM_BACKEND_DAI_SEC_TDM_RX_0:
  3665. channels->min = channels->max =
  3666. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  3667. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3668. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  3669. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  3670. break;
  3671. case MSM_BACKEND_DAI_SEC_TDM_TX_0:
  3672. channels->min = channels->max =
  3673. tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  3674. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3675. tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
  3676. rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
  3677. break;
  3678. case MSM_BACKEND_DAI_TERT_TDM_RX_0:
  3679. channels->min = channels->max =
  3680. tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  3681. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3682. tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
  3683. rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
  3684. break;
  3685. case MSM_BACKEND_DAI_TERT_TDM_TX_0:
  3686. channels->min = channels->max =
  3687. tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  3688. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3689. tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
  3690. rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
  3691. break;
  3692. case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
  3693. channels->min = channels->max =
  3694. tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  3695. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3696. tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
  3697. rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
  3698. break;
  3699. case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
  3700. channels->min = channels->max =
  3701. tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  3702. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3703. tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
  3704. rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
  3705. break;
  3706. case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
  3707. channels->min = channels->max =
  3708. tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  3709. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3710. tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
  3711. rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
  3712. break;
  3713. case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
  3714. channels->min = channels->max =
  3715. tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
  3716. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3717. tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
  3718. rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
  3719. break;
  3720. case MSM_BACKEND_DAI_AUXPCM_RX:
  3721. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3722. aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
  3723. rate->min = rate->max =
  3724. aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
  3725. channels->min = channels->max =
  3726. aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
  3727. break;
  3728. case MSM_BACKEND_DAI_AUXPCM_TX:
  3729. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3730. aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
  3731. rate->min = rate->max =
  3732. aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
  3733. channels->min = channels->max =
  3734. aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
  3735. break;
  3736. case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
  3737. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3738. aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
  3739. rate->min = rate->max =
  3740. aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
  3741. channels->min = channels->max =
  3742. aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
  3743. break;
  3744. case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
  3745. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3746. aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
  3747. rate->min = rate->max =
  3748. aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
  3749. channels->min = channels->max =
  3750. aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
  3751. break;
  3752. case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
  3753. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3754. aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
  3755. rate->min = rate->max =
  3756. aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
  3757. channels->min = channels->max =
  3758. aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
  3759. break;
  3760. case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
  3761. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3762. aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
  3763. rate->min = rate->max =
  3764. aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
  3765. channels->min = channels->max =
  3766. aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
  3767. break;
  3768. case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
  3769. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3770. aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
  3771. rate->min = rate->max =
  3772. aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
  3773. channels->min = channels->max =
  3774. aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
  3775. break;
  3776. case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
  3777. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3778. aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
  3779. rate->min = rate->max =
  3780. aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
  3781. channels->min = channels->max =
  3782. aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
  3783. break;
  3784. case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
  3785. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3786. aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
  3787. rate->min = rate->max =
  3788. aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
  3789. channels->min = channels->max =
  3790. aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
  3791. break;
  3792. case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
  3793. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3794. aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
  3795. rate->min = rate->max =
  3796. aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
  3797. channels->min = channels->max =
  3798. aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
  3799. break;
  3800. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  3801. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3802. mi2s_rx_cfg[PRIM_MI2S].bit_format);
  3803. rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
  3804. channels->min = channels->max =
  3805. mi2s_rx_cfg[PRIM_MI2S].channels;
  3806. break;
  3807. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  3808. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3809. mi2s_tx_cfg[PRIM_MI2S].bit_format);
  3810. rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
  3811. channels->min = channels->max =
  3812. mi2s_tx_cfg[PRIM_MI2S].channels;
  3813. break;
  3814. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  3815. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3816. mi2s_rx_cfg[SEC_MI2S].bit_format);
  3817. rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
  3818. channels->min = channels->max =
  3819. mi2s_rx_cfg[SEC_MI2S].channels;
  3820. break;
  3821. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  3822. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3823. mi2s_tx_cfg[SEC_MI2S].bit_format);
  3824. rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
  3825. channels->min = channels->max =
  3826. mi2s_tx_cfg[SEC_MI2S].channels;
  3827. break;
  3828. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  3829. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3830. mi2s_rx_cfg[TERT_MI2S].bit_format);
  3831. rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
  3832. channels->min = channels->max =
  3833. mi2s_rx_cfg[TERT_MI2S].channels;
  3834. break;
  3835. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  3836. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3837. mi2s_tx_cfg[TERT_MI2S].bit_format);
  3838. rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
  3839. channels->min = channels->max =
  3840. mi2s_tx_cfg[TERT_MI2S].channels;
  3841. break;
  3842. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  3843. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3844. mi2s_rx_cfg[QUAT_MI2S].bit_format);
  3845. rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
  3846. channels->min = channels->max =
  3847. mi2s_rx_cfg[QUAT_MI2S].channels;
  3848. break;
  3849. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  3850. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3851. mi2s_tx_cfg[QUAT_MI2S].bit_format);
  3852. rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
  3853. channels->min = channels->max =
  3854. mi2s_tx_cfg[QUAT_MI2S].channels;
  3855. break;
  3856. case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
  3857. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3858. mi2s_rx_cfg[QUIN_MI2S].bit_format);
  3859. rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
  3860. channels->min = channels->max =
  3861. mi2s_rx_cfg[QUIN_MI2S].channels;
  3862. break;
  3863. case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
  3864. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3865. mi2s_tx_cfg[QUIN_MI2S].bit_format);
  3866. rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
  3867. channels->min = channels->max =
  3868. mi2s_tx_cfg[QUIN_MI2S].channels;
  3869. break;
  3870. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  3871. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  3872. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  3873. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  3874. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  3875. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3876. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3877. cdc_dma_rx_cfg[idx].bit_format);
  3878. rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
  3879. channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
  3880. break;
  3881. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  3882. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  3883. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  3884. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  3885. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  3886. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3887. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3888. cdc_dma_tx_cfg[idx].bit_format);
  3889. rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
  3890. channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
  3891. break;
  3892. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  3893. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3894. SNDRV_PCM_FORMAT_S32_LE);
  3895. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  3896. channels->min = channels->max = msm_vi_feed_tx_ch;
  3897. break;
  3898. default:
  3899. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  3900. break;
  3901. }
  3902. done:
  3903. return rc;
  3904. }
  3905. static bool msm_usbc_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
  3906. {
  3907. int value = 0;
  3908. bool ret = 0;
  3909. struct snd_soc_card *card = codec->component.card;
  3910. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  3911. struct pinctrl_state *en2_pinctrl_active;
  3912. struct pinctrl_state *en2_pinctrl_sleep;
  3913. if (!pdata->usbc_en2_gpio_p) {
  3914. if (active) {
  3915. /* if active and usbc_en2_gpio undefined, get pin */
  3916. pdata->usbc_en2_gpio_p = devm_pinctrl_get(card->dev);
  3917. if (IS_ERR_OR_NULL(pdata->usbc_en2_gpio_p)) {
  3918. dev_err(card->dev,
  3919. "%s: Can't get EN2 gpio pinctrl:%ld\n",
  3920. __func__,
  3921. PTR_ERR(pdata->usbc_en2_gpio_p));
  3922. pdata->usbc_en2_gpio_p = NULL;
  3923. return false;
  3924. }
  3925. } else {
  3926. /* if not active and usbc_en2_gpio undefined, return */
  3927. return false;
  3928. }
  3929. }
  3930. pdata->usbc_en2_gpio = of_get_named_gpio(card->dev->of_node,
  3931. "qcom,usbc-analog-en2-gpio", 0);
  3932. if (!gpio_is_valid(pdata->usbc_en2_gpio)) {
  3933. dev_err(card->dev, "%s, property %s not in node %s",
  3934. __func__, "qcom,usbc-analog-en2-gpio",
  3935. card->dev->of_node->full_name);
  3936. return false;
  3937. }
  3938. en2_pinctrl_active = pinctrl_lookup_state(
  3939. pdata->usbc_en2_gpio_p, "aud_active");
  3940. if (IS_ERR_OR_NULL(en2_pinctrl_active)) {
  3941. dev_err(card->dev,
  3942. "%s: Cannot get aud_active pinctrl state:%ld\n",
  3943. __func__, PTR_ERR(en2_pinctrl_active));
  3944. ret = false;
  3945. goto err_lookup_state;
  3946. }
  3947. en2_pinctrl_sleep = pinctrl_lookup_state(
  3948. pdata->usbc_en2_gpio_p, "aud_sleep");
  3949. if (IS_ERR_OR_NULL(en2_pinctrl_sleep)) {
  3950. dev_err(card->dev,
  3951. "%s: Cannot get aud_sleep pinctrl state:%ld\n",
  3952. __func__, PTR_ERR(en2_pinctrl_sleep));
  3953. ret = false;
  3954. goto err_lookup_state;
  3955. }
  3956. /* if active and usbc_en2_gpio_p defined, swap using usbc_en2_gpio_p */
  3957. if (active) {
  3958. dev_dbg(codec->dev, "%s: enter\n", __func__);
  3959. if (pdata->usbc_en2_gpio_p) {
  3960. value = gpio_get_value_cansleep(pdata->usbc_en2_gpio);
  3961. if (value)
  3962. pinctrl_select_state(pdata->usbc_en2_gpio_p,
  3963. en2_pinctrl_sleep);
  3964. else
  3965. pinctrl_select_state(pdata->usbc_en2_gpio_p,
  3966. en2_pinctrl_active);
  3967. } else if (pdata->usbc_en2_gpio >= 0) {
  3968. value = gpio_get_value_cansleep(pdata->usbc_en2_gpio);
  3969. gpio_set_value_cansleep(pdata->usbc_en2_gpio, !value);
  3970. }
  3971. pr_debug("%s: swap select switch %d to %d\n", __func__,
  3972. value, !value);
  3973. ret = true;
  3974. } else {
  3975. /* if not active, release usbc_en2_gpio_p pin */
  3976. pinctrl_select_state(pdata->usbc_en2_gpio_p,
  3977. en2_pinctrl_sleep);
  3978. }
  3979. err_lookup_state:
  3980. devm_pinctrl_put(pdata->usbc_en2_gpio_p);
  3981. pdata->usbc_en2_gpio_p = NULL;
  3982. return ret;
  3983. }
  3984. static bool msm_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
  3985. {
  3986. int value = 0;
  3987. bool ret = false;
  3988. struct snd_soc_card *card;
  3989. struct msm_asoc_mach_data *pdata;
  3990. if (!codec) {
  3991. pr_err("%s codec is NULL\n", __func__);
  3992. return false;
  3993. }
  3994. card = codec->component.card;
  3995. pdata = snd_soc_card_get_drvdata(card);
  3996. if (!pdata)
  3997. return false;
  3998. if (wcd_mbhc_cfg.enable_usbc_analog)
  3999. return msm_usbc_swap_gnd_mic(codec, active);
  4000. /* if usbc is not defined, swap using us_euro_gpio_p */
  4001. if (pdata->us_euro_gpio_p) {
  4002. value = msm_cdc_pinctrl_get_state(
  4003. pdata->us_euro_gpio_p);
  4004. if (value)
  4005. msm_cdc_pinctrl_select_sleep_state(
  4006. pdata->us_euro_gpio_p);
  4007. else
  4008. msm_cdc_pinctrl_select_active_state(
  4009. pdata->us_euro_gpio_p);
  4010. dev_dbg(codec->dev, "%s: swap select switch %d to %d\n",
  4011. __func__, value, !value);
  4012. ret = true;
  4013. }
  4014. return ret;
  4015. }
  4016. static int msm_afe_set_config(struct snd_soc_codec *codec)
  4017. {
  4018. int ret = 0;
  4019. void *config_data = NULL;
  4020. if (!msm_codec_fn.get_afe_config_fn) {
  4021. dev_err(codec->dev, "%s: codec get afe config not init'ed\n",
  4022. __func__);
  4023. return -EINVAL;
  4024. }
  4025. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4026. AFE_CDC_REGISTERS_CONFIG);
  4027. if (config_data) {
  4028. ret = afe_set_config(AFE_CDC_REGISTERS_CONFIG, config_data, 0);
  4029. if (ret) {
  4030. dev_err(codec->dev,
  4031. "%s: Failed to set codec registers config %d\n",
  4032. __func__, ret);
  4033. return ret;
  4034. }
  4035. }
  4036. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4037. AFE_CDC_REGISTER_PAGE_CONFIG);
  4038. if (config_data) {
  4039. ret = afe_set_config(AFE_CDC_REGISTER_PAGE_CONFIG, config_data,
  4040. 0);
  4041. if (ret)
  4042. dev_err(codec->dev,
  4043. "%s: Failed to set cdc register page config\n",
  4044. __func__);
  4045. }
  4046. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4047. AFE_SLIMBUS_SLAVE_CONFIG);
  4048. if (config_data) {
  4049. ret = afe_set_config(AFE_SLIMBUS_SLAVE_CONFIG, config_data, 0);
  4050. if (ret) {
  4051. dev_err(codec->dev,
  4052. "%s: Failed to set slimbus slave config %d\n",
  4053. __func__, ret);
  4054. return ret;
  4055. }
  4056. }
  4057. return 0;
  4058. }
  4059. static void msm_afe_clear_config(void)
  4060. {
  4061. afe_clear_config(AFE_CDC_REGISTERS_CONFIG);
  4062. afe_clear_config(AFE_SLIMBUS_SLAVE_CONFIG);
  4063. }
  4064. static int msm_adsp_power_up_config(struct snd_soc_codec *codec,
  4065. struct snd_card *card)
  4066. {
  4067. int ret = 0;
  4068. unsigned long timeout;
  4069. int adsp_ready = 0;
  4070. bool snd_card_online = 0;
  4071. timeout = jiffies +
  4072. msecs_to_jiffies(ADSP_STATE_READY_TIMEOUT_MS);
  4073. do {
  4074. if (!snd_card_online) {
  4075. snd_card_online = snd_card_is_online_state(card);
  4076. pr_debug("%s: Sound card is %s\n", __func__,
  4077. snd_card_online ? "Online" : "Offline");
  4078. }
  4079. if (!adsp_ready) {
  4080. adsp_ready = q6core_is_adsp_ready();
  4081. pr_debug("%s: ADSP Audio is %s\n", __func__,
  4082. adsp_ready ? "ready" : "not ready");
  4083. }
  4084. if (snd_card_online && adsp_ready)
  4085. break;
  4086. /*
  4087. * Sound card/ADSP will be coming up after subsystem restart and
  4088. * it might not be fully up when the control reaches
  4089. * here. So, wait for 50msec before checking ADSP state
  4090. */
  4091. msleep(50);
  4092. } while (time_after(timeout, jiffies));
  4093. if (!snd_card_online || !adsp_ready) {
  4094. pr_err("%s: Timeout. Sound card is %s, ADSP Audio is %s\n",
  4095. __func__,
  4096. snd_card_online ? "Online" : "Offline",
  4097. adsp_ready ? "ready" : "not ready");
  4098. ret = -ETIMEDOUT;
  4099. goto err;
  4100. }
  4101. ret = msm_afe_set_config(codec);
  4102. if (ret)
  4103. pr_err("%s: Failed to set AFE config. err %d\n",
  4104. __func__, ret);
  4105. return 0;
  4106. err:
  4107. return ret;
  4108. }
  4109. static int sm6150_notifier_service_cb(struct notifier_block *this,
  4110. unsigned long opcode, void *ptr)
  4111. {
  4112. int ret;
  4113. struct snd_soc_card *card = NULL;
  4114. const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
  4115. struct snd_soc_pcm_runtime *rtd;
  4116. struct snd_soc_codec *codec;
  4117. pr_debug("%s: Service opcode 0x%lx\n", __func__, opcode);
  4118. switch (opcode) {
  4119. case AUDIO_NOTIFIER_SERVICE_DOWN:
  4120. /*
  4121. * Use flag to ignore initial boot notifications
  4122. * On initial boot msm_adsp_power_up_config is
  4123. * called on init. There is no need to clear
  4124. * and set the config again on initial boot.
  4125. */
  4126. if (is_initial_boot)
  4127. break;
  4128. msm_afe_clear_config();
  4129. break;
  4130. case AUDIO_NOTIFIER_SERVICE_UP:
  4131. if (is_initial_boot) {
  4132. is_initial_boot = false;
  4133. break;
  4134. }
  4135. if (!spdev)
  4136. return -EINVAL;
  4137. card = platform_get_drvdata(spdev);
  4138. rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
  4139. if (!rtd) {
  4140. dev_err(card->dev,
  4141. "%s: snd_soc_get_pcm_runtime for %s failed!\n",
  4142. __func__, be_dl_name);
  4143. ret = -EINVAL;
  4144. goto err;
  4145. }
  4146. codec = rtd->codec;
  4147. ret = msm_adsp_power_up_config(codec, card->snd_card);
  4148. if (ret < 0) {
  4149. dev_err(card->dev,
  4150. "%s: msm_adsp_power_up_config failed ret = %d!\n",
  4151. __func__, ret);
  4152. goto err;
  4153. }
  4154. break;
  4155. default:
  4156. break;
  4157. }
  4158. err:
  4159. return NOTIFY_OK;
  4160. }
  4161. static struct notifier_block service_nb = {
  4162. .notifier_call = sm6150_notifier_service_cb,
  4163. .priority = -INT_MAX,
  4164. };
  4165. static int msm_audrx_tavil_init(struct snd_soc_pcm_runtime *rtd)
  4166. {
  4167. int ret = 0;
  4168. void *config_data;
  4169. struct snd_soc_codec *codec = rtd->codec;
  4170. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  4171. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4172. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4173. struct snd_soc_component *aux_comp;
  4174. struct snd_card *card;
  4175. struct snd_info_entry *entry;
  4176. struct msm_asoc_mach_data *pdata =
  4177. snd_soc_card_get_drvdata(rtd->card);
  4178. /*
  4179. * Codec SLIMBUS configuration
  4180. * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8
  4181. * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13
  4182. * TX14, TX15, TX16
  4183. */
  4184. unsigned int rx_ch[WCD934X_RX_MAX] = {144, 145, 146, 147, 148, 149,
  4185. 150, 151};
  4186. unsigned int tx_ch[WCD934X_TX_MAX] = {128, 129, 130, 131, 132, 133,
  4187. 134, 135, 136, 137, 138, 139,
  4188. 140, 141, 142, 143};
  4189. pr_info("%s: dev_name:%s\n", __func__, dev_name(cpu_dai->dev));
  4190. rtd->pmdown_time = 0;
  4191. ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
  4192. ARRAY_SIZE(msm_tavil_snd_controls));
  4193. if (ret < 0) {
  4194. pr_err("%s: add_codec_controls failed, err %d\n",
  4195. __func__, ret);
  4196. return ret;
  4197. }
  4198. ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
  4199. ARRAY_SIZE(msm_common_snd_controls));
  4200. if (ret < 0) {
  4201. pr_err("%s: add_codec_controls failed, err %d\n",
  4202. __func__, ret);
  4203. return ret;
  4204. }
  4205. snd_soc_dapm_new_controls(dapm, msm_dapm_widgets_tavil,
  4206. ARRAY_SIZE(msm_dapm_widgets_tavil));
  4207. snd_soc_dapm_add_routes(dapm, wcd_audio_paths_tavil,
  4208. ARRAY_SIZE(wcd_audio_paths_tavil));
  4209. snd_soc_dapm_ignore_suspend(dapm, "Handset Mic");
  4210. snd_soc_dapm_ignore_suspend(dapm, "Headset Mic");
  4211. snd_soc_dapm_ignore_suspend(dapm, "ANCRight Headset Mic");
  4212. snd_soc_dapm_ignore_suspend(dapm, "ANCLeft Headset Mic");
  4213. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  4214. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  4215. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  4216. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  4217. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
  4218. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
  4219. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
  4220. snd_soc_dapm_ignore_suspend(dapm, "MADINPUT");
  4221. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_INPUT");
  4222. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT1");
  4223. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT2");
  4224. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  4225. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT1");
  4226. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT2");
  4227. snd_soc_dapm_ignore_suspend(dapm, "ANC EAR");
  4228. snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
  4229. snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
  4230. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  4231. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  4232. snd_soc_dapm_ignore_suspend(dapm, "AIF4 VI");
  4233. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT");
  4234. snd_soc_dapm_ignore_suspend(dapm, "ANC HPHL");
  4235. snd_soc_dapm_ignore_suspend(dapm, "ANC HPHR");
  4236. snd_soc_dapm_sync(dapm);
  4237. snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  4238. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  4239. msm_codec_fn.get_afe_config_fn = tavil_get_afe_config;
  4240. ret = msm_adsp_power_up_config(codec, rtd->card->snd_card);
  4241. if (ret) {
  4242. pr_err("%s: Failed to set AFE config %d\n", __func__, ret);
  4243. goto err;
  4244. }
  4245. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4246. AFE_AANC_VERSION);
  4247. if (config_data) {
  4248. ret = afe_set_config(AFE_AANC_VERSION, config_data, 0);
  4249. if (ret) {
  4250. pr_err("%s: Failed to set aanc version %d\n",
  4251. __func__, ret);
  4252. goto err;
  4253. }
  4254. }
  4255. /*
  4256. * Send speaker configuration only for WSA8810.
  4257. * Default configuration is for WSA8815.
  4258. */
  4259. pr_debug("%s: Number of aux devices: %d\n",
  4260. __func__, rtd->card->num_aux_devs);
  4261. if (rtd->card->num_aux_devs &&
  4262. !list_empty(&rtd->card->aux_comp_list)) {
  4263. aux_comp = list_first_entry(&rtd->card->aux_comp_list,
  4264. struct snd_soc_component, card_aux_list);
  4265. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  4266. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  4267. tavil_set_spkr_mode(rtd->codec, WCD934X_SPKR_MODE_1);
  4268. tavil_set_spkr_gain_offset(rtd->codec,
  4269. WCD934X_RX_GAIN_OFFSET_M1P5_DB);
  4270. }
  4271. }
  4272. card = rtd->card->snd_card;
  4273. entry = snd_info_create_subdir(card->module, "codecs",
  4274. card->proc_root);
  4275. if (!entry) {
  4276. pr_debug("%s: Cannot create codecs module entry\n",
  4277. __func__);
  4278. ret = 0;
  4279. goto err;
  4280. }
  4281. pdata->codec_root = entry;
  4282. tavil_codec_info_create_codec_entry(pdata->codec_root, codec);
  4283. codec_reg_done = true;
  4284. return 0;
  4285. err:
  4286. return ret;
  4287. }
  4288. static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
  4289. {
  4290. int ret = 0;
  4291. struct snd_soc_codec *codec = rtd->codec;
  4292. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  4293. struct snd_card *card;
  4294. struct snd_info_entry *entry;
  4295. struct snd_soc_component *aux_comp;
  4296. struct msm_asoc_mach_data *pdata =
  4297. snd_soc_card_get_drvdata(rtd->card);
  4298. ret = snd_soc_add_codec_controls(codec, msm_int_snd_controls,
  4299. ARRAY_SIZE(msm_int_snd_controls));
  4300. if (ret < 0) {
  4301. pr_err("%s: add_codec_controls failed: %d\n",
  4302. __func__, ret);
  4303. return ret;
  4304. }
  4305. ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
  4306. ARRAY_SIZE(msm_common_snd_controls));
  4307. if (ret < 0) {
  4308. pr_err("%s: add common snd controls failed: %d\n",
  4309. __func__, ret);
  4310. return ret;
  4311. }
  4312. snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
  4313. ARRAY_SIZE(msm_int_dapm_widgets));
  4314. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  4315. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  4316. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  4317. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  4318. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
  4319. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
  4320. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
  4321. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
  4322. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
  4323. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
  4324. snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
  4325. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
  4326. snd_soc_dapm_sync(dapm);
  4327. /*
  4328. * Send speaker configuration only for WSA8810.
  4329. * Default configuration is for WSA8815.
  4330. */
  4331. dev_dbg(codec->dev, "%s: Number of aux devices: %d\n",
  4332. __func__, rtd->card->num_aux_devs);
  4333. if (rtd->card->num_aux_devs &&
  4334. !list_empty(&rtd->card->component_dev_list)) {
  4335. aux_comp = list_first_entry(
  4336. &rtd->card->component_dev_list,
  4337. struct snd_soc_component,
  4338. card_aux_list);
  4339. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  4340. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  4341. wsa_macro_set_spkr_mode(rtd->codec,
  4342. WSA_MACRO_SPKR_MODE_1);
  4343. wsa_macro_set_spkr_gain_offset(rtd->codec,
  4344. WSA_MACRO_GAIN_OFFSET_M1P5_DB);
  4345. }
  4346. }
  4347. card = rtd->card->snd_card;
  4348. entry = snd_info_create_subdir(card->module, "codecs",
  4349. card->proc_root);
  4350. if (!entry) {
  4351. pr_debug("%s: Cannot create codecs module entry\n",
  4352. __func__);
  4353. ret = 0;
  4354. goto err;
  4355. }
  4356. pdata->codec_root = entry;
  4357. bolero_info_create_codec_entry(pdata->codec_root, codec);
  4358. codec_reg_done = true;
  4359. return 0;
  4360. err:
  4361. return ret;
  4362. }
  4363. static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
  4364. {
  4365. unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
  4366. unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
  4367. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4368. return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  4369. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  4370. }
  4371. static void *def_wcd_mbhc_cal(void)
  4372. {
  4373. void *wcd_mbhc_cal;
  4374. struct wcd_mbhc_btn_detect_cfg *btn_cfg;
  4375. u16 *btn_high;
  4376. wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
  4377. WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
  4378. if (!wcd_mbhc_cal)
  4379. return NULL;
  4380. #define S(X, Y) ((WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->X) = (Y))
  4381. S(v_hs_max, 1600);
  4382. #undef S
  4383. #define S(X, Y) ((WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->X) = (Y))
  4384. S(num_btn, WCD_MBHC_DEF_BUTTONS);
  4385. #undef S
  4386. btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
  4387. btn_high = ((void *)&btn_cfg->_v_btn_low) +
  4388. (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
  4389. btn_high[0] = 75;
  4390. btn_high[1] = 150;
  4391. btn_high[2] = 237;
  4392. btn_high[3] = 500;
  4393. btn_high[4] = 500;
  4394. btn_high[5] = 500;
  4395. btn_high[6] = 500;
  4396. btn_high[7] = 500;
  4397. return wcd_mbhc_cal;
  4398. }
  4399. static int msm_snd_hw_params(struct snd_pcm_substream *substream,
  4400. struct snd_pcm_hw_params *params)
  4401. {
  4402. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4403. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4404. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4405. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4406. int ret = 0;
  4407. u32 rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
  4408. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4409. u32 user_set_tx_ch = 0;
  4410. u32 rx_ch_count;
  4411. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4412. ret = snd_soc_dai_get_channel_map(codec_dai,
  4413. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4414. if (ret < 0) {
  4415. pr_err("%s: failed to get codec chan map, err:%d\n",
  4416. __func__, ret);
  4417. goto err;
  4418. }
  4419. if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_5_RX) {
  4420. pr_debug("%s: rx_5_ch=%d\n", __func__,
  4421. slim_rx_cfg[5].channels);
  4422. rx_ch_count = slim_rx_cfg[5].channels;
  4423. } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_2_RX) {
  4424. pr_debug("%s: rx_2_ch=%d\n", __func__,
  4425. slim_rx_cfg[2].channels);
  4426. rx_ch_count = slim_rx_cfg[2].channels;
  4427. } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_6_RX) {
  4428. pr_debug("%s: rx_6_ch=%d\n", __func__,
  4429. slim_rx_cfg[6].channels);
  4430. rx_ch_count = slim_rx_cfg[6].channels;
  4431. } else {
  4432. pr_debug("%s: rx_0_ch=%d\n", __func__,
  4433. slim_rx_cfg[0].channels);
  4434. rx_ch_count = slim_rx_cfg[0].channels;
  4435. }
  4436. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4437. rx_ch_count, rx_ch);
  4438. if (ret < 0) {
  4439. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4440. __func__, ret);
  4441. goto err;
  4442. }
  4443. } else {
  4444. pr_debug("%s: %s_tx_dai_id_%d_ch=%d\n", __func__,
  4445. codec_dai->name, codec_dai->id, user_set_tx_ch);
  4446. ret = snd_soc_dai_get_channel_map(codec_dai,
  4447. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4448. if (ret < 0) {
  4449. pr_err("%s: failed to get tx codec chan map, err:%d\n",
  4450. __func__, ret);
  4451. goto err;
  4452. }
  4453. /* For <codec>_tx1 case */
  4454. if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_0_TX)
  4455. user_set_tx_ch = slim_tx_cfg[0].channels;
  4456. /* For <codec>_tx3 case */
  4457. else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_1_TX)
  4458. user_set_tx_ch = slim_tx_cfg[1].channels;
  4459. else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_4_TX)
  4460. user_set_tx_ch = msm_vi_feed_tx_ch;
  4461. else
  4462. user_set_tx_ch = tx_ch_cnt;
  4463. pr_debug("%s: msm_slim_0_tx_ch(%d) user_set_tx_ch(%d) tx_ch_cnt(%d), BE id (%d)\n",
  4464. __func__, slim_tx_cfg[0].channels, user_set_tx_ch,
  4465. tx_ch_cnt, dai_link->id);
  4466. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4467. user_set_tx_ch, tx_ch, 0, 0);
  4468. if (ret < 0)
  4469. pr_err("%s: failed to set tx cpu chan map, err:%d\n",
  4470. __func__, ret);
  4471. }
  4472. err:
  4473. return ret;
  4474. }
  4475. static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
  4476. struct snd_pcm_hw_params *params)
  4477. {
  4478. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4479. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4480. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4481. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4482. int ret = 0;
  4483. u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
  4484. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4485. u32 user_set_tx_ch = 0;
  4486. u32 user_set_rx_ch = 0;
  4487. u32 ch_id;
  4488. ret = snd_soc_dai_get_channel_map(codec_dai,
  4489. &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
  4490. &rx_ch_cdc_dma);
  4491. if (ret < 0) {
  4492. pr_err("%s: failed to get codec chan map, err:%d\n",
  4493. __func__, ret);
  4494. goto err;
  4495. }
  4496. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4497. switch (dai_link->id) {
  4498. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  4499. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  4500. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  4501. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  4502. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  4503. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  4504. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
  4505. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  4506. {
  4507. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4508. pr_debug("%s: id %d rx_ch=%d\n", __func__,
  4509. ch_id, cdc_dma_rx_cfg[ch_id].channels);
  4510. user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
  4511. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4512. user_set_rx_ch, &rx_ch_cdc_dma);
  4513. if (ret < 0) {
  4514. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4515. __func__, ret);
  4516. goto err;
  4517. }
  4518. }
  4519. break;
  4520. }
  4521. } else {
  4522. switch (dai_link->id) {
  4523. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  4524. {
  4525. user_set_tx_ch = msm_vi_feed_tx_ch;
  4526. }
  4527. break;
  4528. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  4529. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  4530. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  4531. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  4532. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  4533. {
  4534. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4535. pr_debug("%s: id %d tx_ch=%d\n", __func__,
  4536. ch_id, cdc_dma_tx_cfg[ch_id].channels);
  4537. user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
  4538. }
  4539. break;
  4540. }
  4541. ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
  4542. &tx_ch_cdc_dma, 0, 0);
  4543. if (ret < 0) {
  4544. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4545. __func__, ret);
  4546. goto err;
  4547. }
  4548. }
  4549. err:
  4550. return ret;
  4551. }
  4552. static int msm_slimbus_2_hw_params(struct snd_pcm_substream *substream,
  4553. struct snd_pcm_hw_params *params)
  4554. {
  4555. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4556. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4557. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4558. unsigned int rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
  4559. unsigned int rx_ch_cnt = 0, tx_ch_cnt = 0;
  4560. unsigned int num_tx_ch = 0;
  4561. unsigned int num_rx_ch = 0;
  4562. int ret = 0;
  4563. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4564. num_rx_ch = params_channels(params);
  4565. pr_debug("%s: %s rx_dai_id = %d num_ch = %d\n", __func__,
  4566. codec_dai->name, codec_dai->id, num_rx_ch);
  4567. ret = snd_soc_dai_get_channel_map(codec_dai,
  4568. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4569. if (ret < 0) {
  4570. pr_err("%s: failed to get codec chan map, err:%d\n",
  4571. __func__, ret);
  4572. goto err;
  4573. }
  4574. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4575. num_rx_ch, rx_ch);
  4576. if (ret < 0) {
  4577. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4578. __func__, ret);
  4579. goto err;
  4580. }
  4581. } else {
  4582. num_tx_ch = params_channels(params);
  4583. pr_debug("%s: %s tx_dai_id = %d num_ch = %d\n", __func__,
  4584. codec_dai->name, codec_dai->id, num_tx_ch);
  4585. ret = snd_soc_dai_get_channel_map(codec_dai,
  4586. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4587. if (ret < 0) {
  4588. pr_err("%s: failed to get tx codec chan map, err:%d\n",
  4589. __func__, ret);
  4590. goto err;
  4591. }
  4592. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4593. num_tx_ch, tx_ch, 0, 0);
  4594. if (ret < 0) {
  4595. pr_err("%s: failed to set tx cpu chan map, err:%d\n",
  4596. __func__, ret);
  4597. goto err;
  4598. }
  4599. }
  4600. err:
  4601. return ret;
  4602. }
  4603. static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
  4604. struct snd_pcm_hw_params *params)
  4605. {
  4606. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4607. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4608. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4609. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4610. u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
  4611. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4612. int ret;
  4613. dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
  4614. codec_dai->name, codec_dai->id);
  4615. ret = snd_soc_dai_get_channel_map(codec_dai,
  4616. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4617. if (ret) {
  4618. dev_err(rtd->dev,
  4619. "%s: failed to get BTFM codec chan map\n, err:%d\n",
  4620. __func__, ret);
  4621. goto err;
  4622. }
  4623. dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
  4624. __func__, tx_ch_cnt, dai_link->id);
  4625. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4626. tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
  4627. if (ret)
  4628. dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
  4629. __func__, ret);
  4630. err:
  4631. return ret;
  4632. }
  4633. static int msm_get_port_id(int be_id)
  4634. {
  4635. int afe_port_id;
  4636. switch (be_id) {
  4637. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  4638. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
  4639. break;
  4640. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  4641. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
  4642. break;
  4643. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  4644. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
  4645. break;
  4646. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  4647. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
  4648. break;
  4649. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  4650. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
  4651. break;
  4652. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  4653. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
  4654. break;
  4655. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  4656. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
  4657. break;
  4658. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  4659. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
  4660. break;
  4661. case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
  4662. afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
  4663. break;
  4664. case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
  4665. afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
  4666. break;
  4667. default:
  4668. pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
  4669. afe_port_id = -EINVAL;
  4670. }
  4671. return afe_port_id;
  4672. }
  4673. static u32 get_mi2s_bits_per_sample(u32 bit_format)
  4674. {
  4675. u32 bit_per_sample;
  4676. switch (bit_format) {
  4677. case SNDRV_PCM_FORMAT_S32_LE:
  4678. case SNDRV_PCM_FORMAT_S24_3LE:
  4679. case SNDRV_PCM_FORMAT_S24_LE:
  4680. bit_per_sample = 32;
  4681. break;
  4682. case SNDRV_PCM_FORMAT_S16_LE:
  4683. default:
  4684. bit_per_sample = 16;
  4685. break;
  4686. }
  4687. return bit_per_sample;
  4688. }
  4689. static void update_mi2s_clk_val(int dai_id, int stream)
  4690. {
  4691. u32 bit_per_sample;
  4692. if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4693. bit_per_sample =
  4694. get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
  4695. mi2s_clk[dai_id].clk_freq_in_hz =
  4696. mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  4697. } else {
  4698. bit_per_sample =
  4699. get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
  4700. mi2s_clk[dai_id].clk_freq_in_hz =
  4701. mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  4702. }
  4703. }
  4704. static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
  4705. {
  4706. int ret = 0;
  4707. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4708. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4709. int port_id = 0;
  4710. int index = cpu_dai->id;
  4711. port_id = msm_get_port_id(rtd->dai_link->id);
  4712. if (port_id < 0) {
  4713. dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
  4714. ret = port_id;
  4715. goto err;
  4716. }
  4717. if (enable) {
  4718. update_mi2s_clk_val(index, substream->stream);
  4719. dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
  4720. mi2s_clk[index].clk_freq_in_hz);
  4721. }
  4722. mi2s_clk[index].enable = enable;
  4723. ret = afe_set_lpass_clock_v2(port_id,
  4724. &mi2s_clk[index]);
  4725. if (ret < 0) {
  4726. dev_err(rtd->card->dev,
  4727. "%s: afe lpass clock failed for port 0x%x , err:%d\n",
  4728. __func__, port_id, ret);
  4729. goto err;
  4730. }
  4731. err:
  4732. return ret;
  4733. }
  4734. static int msm_set_pinctrl(struct msm_pinctrl_info *pinctrl_info,
  4735. enum pinctrl_pin_state new_state)
  4736. {
  4737. int ret = 0;
  4738. int curr_state = 0;
  4739. if (pinctrl_info == NULL) {
  4740. pr_err("%s: pinctrl_info is NULL\n", __func__);
  4741. ret = -EINVAL;
  4742. goto err;
  4743. }
  4744. if (pinctrl_info->pinctrl == NULL) {
  4745. pr_err("%s: pinctrl_info->pinctrl is NULL\n", __func__);
  4746. ret = -EINVAL;
  4747. goto err;
  4748. }
  4749. curr_state = pinctrl_info->curr_state;
  4750. pinctrl_info->curr_state = new_state;
  4751. pr_debug("%s: curr_state = %s new_state = %s\n", __func__,
  4752. pin_states[curr_state], pin_states[pinctrl_info->curr_state]);
  4753. if (curr_state == pinctrl_info->curr_state) {
  4754. pr_debug("%s: Already in same state\n", __func__);
  4755. goto err;
  4756. }
  4757. if (curr_state != STATE_DISABLE &&
  4758. pinctrl_info->curr_state != STATE_DISABLE) {
  4759. pr_debug("%s: state already active cannot switch\n", __func__);
  4760. ret = -EIO;
  4761. goto err;
  4762. }
  4763. switch (pinctrl_info->curr_state) {
  4764. case STATE_MI2S_ACTIVE:
  4765. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4766. pinctrl_info->mi2s_active);
  4767. if (ret) {
  4768. pr_err("%s: MI2S state select failed with %d\n",
  4769. __func__, ret);
  4770. ret = -EIO;
  4771. goto err;
  4772. }
  4773. break;
  4774. case STATE_TDM_ACTIVE:
  4775. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4776. pinctrl_info->tdm_active);
  4777. if (ret) {
  4778. pr_err("%s: TDM state select failed with %d\n",
  4779. __func__, ret);
  4780. ret = -EIO;
  4781. goto err;
  4782. }
  4783. break;
  4784. case STATE_DISABLE:
  4785. if (curr_state == STATE_MI2S_ACTIVE) {
  4786. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4787. pinctrl_info->mi2s_disable);
  4788. } else {
  4789. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4790. pinctrl_info->tdm_disable);
  4791. }
  4792. if (ret) {
  4793. pr_err("%s: state disable failed with %d\n",
  4794. __func__, ret);
  4795. ret = -EIO;
  4796. goto err;
  4797. }
  4798. break;
  4799. default:
  4800. pr_err("%s: TLMM pin state is invalid\n", __func__);
  4801. return -EINVAL;
  4802. }
  4803. err:
  4804. return ret;
  4805. }
  4806. static int msm_get_pinctrl(struct platform_device *pdev)
  4807. {
  4808. struct snd_soc_card *card = platform_get_drvdata(pdev);
  4809. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  4810. struct msm_pinctrl_info *pinctrl_info = NULL;
  4811. struct pinctrl *pinctrl;
  4812. int ret = 0;
  4813. pinctrl_info = &pdata->pinctrl_info;
  4814. if (pinctrl_info == NULL) {
  4815. pr_err("%s: pinctrl_info is NULL\n", __func__);
  4816. return -EINVAL;
  4817. }
  4818. pinctrl = devm_pinctrl_get(&pdev->dev);
  4819. if (IS_ERR_OR_NULL(pinctrl)) {
  4820. pr_err("%s: Unable to get pinctrl handle\n", __func__);
  4821. return -EINVAL;
  4822. }
  4823. pinctrl_info->pinctrl = pinctrl;
  4824. /* get all the states handles from Device Tree */
  4825. pinctrl_info->mi2s_disable = pinctrl_lookup_state(pinctrl,
  4826. "quat-mi2s-sleep");
  4827. if (IS_ERR(pinctrl_info->mi2s_disable)) {
  4828. pr_err("%s: could not get mi2s_disable pinstate\n", __func__);
  4829. goto err;
  4830. }
  4831. pinctrl_info->mi2s_active = pinctrl_lookup_state(pinctrl,
  4832. "quat-mi2s-active");
  4833. if (IS_ERR(pinctrl_info->mi2s_active)) {
  4834. pr_err("%s: could not get mi2s_active pinstate\n", __func__);
  4835. goto err;
  4836. }
  4837. pinctrl_info->tdm_disable = pinctrl_lookup_state(pinctrl,
  4838. "quat-tdm-sleep");
  4839. if (IS_ERR(pinctrl_info->tdm_disable)) {
  4840. pr_err("%s: could not get tdm_disable pinstate\n", __func__);
  4841. goto err;
  4842. }
  4843. pinctrl_info->tdm_active = pinctrl_lookup_state(pinctrl,
  4844. "quat-tdm-active");
  4845. if (IS_ERR(pinctrl_info->tdm_active)) {
  4846. pr_err("%s: could not get tdm_active pinstate\n",
  4847. __func__);
  4848. goto err;
  4849. }
  4850. /* Reset the TLMM pins to a default state */
  4851. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4852. pinctrl_info->mi2s_disable);
  4853. if (ret != 0) {
  4854. pr_err("%s: Disable TLMM pins failed with %d\n",
  4855. __func__, ret);
  4856. ret = -EIO;
  4857. goto err;
  4858. }
  4859. pinctrl_info->curr_state = STATE_DISABLE;
  4860. return 0;
  4861. err:
  4862. devm_pinctrl_put(pinctrl);
  4863. pinctrl_info->pinctrl = NULL;
  4864. return -EINVAL;
  4865. }
  4866. static int msm_tdm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  4867. struct snd_pcm_hw_params *params)
  4868. {
  4869. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4870. struct snd_interval *rate = hw_param_interval(params,
  4871. SNDRV_PCM_HW_PARAM_RATE);
  4872. struct snd_interval *channels = hw_param_interval(params,
  4873. SNDRV_PCM_HW_PARAM_CHANNELS);
  4874. if (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) {
  4875. channels->min = channels->max =
  4876. tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  4877. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4878. tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
  4879. rate->min = rate->max =
  4880. tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
  4881. } else if (cpu_dai->id == AFE_PORT_ID_SECONDARY_TDM_RX) {
  4882. channels->min = channels->max =
  4883. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  4884. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4885. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  4886. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  4887. } else if (cpu_dai->id == AFE_PORT_ID_QUINARY_TDM_RX) {
  4888. channels->min = channels->max =
  4889. tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  4890. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4891. tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
  4892. rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
  4893. } else {
  4894. pr_err("%s: dai id 0x%x not supported\n",
  4895. __func__, cpu_dai->id);
  4896. return -EINVAL;
  4897. }
  4898. pr_debug("%s: dai id = 0x%x channels = %d rate = %d format = 0x%x\n",
  4899. __func__, cpu_dai->id, channels->max, rate->max,
  4900. params_format(params));
  4901. return 0;
  4902. }
  4903. static int sm6150_tdm_snd_hw_params(struct snd_pcm_substream *substream,
  4904. struct snd_pcm_hw_params *params)
  4905. {
  4906. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4907. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4908. int ret = 0;
  4909. int slot_width = 32;
  4910. int channels, slots;
  4911. unsigned int slot_mask, rate, clk_freq;
  4912. unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
  4913. pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
  4914. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  4915. switch (cpu_dai->id) {
  4916. case AFE_PORT_ID_PRIMARY_TDM_RX:
  4917. slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  4918. break;
  4919. case AFE_PORT_ID_SECONDARY_TDM_RX:
  4920. slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  4921. break;
  4922. case AFE_PORT_ID_TERTIARY_TDM_RX:
  4923. slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  4924. break;
  4925. case AFE_PORT_ID_QUATERNARY_TDM_RX:
  4926. slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  4927. break;
  4928. case AFE_PORT_ID_QUINARY_TDM_RX:
  4929. slots = tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  4930. break;
  4931. case AFE_PORT_ID_PRIMARY_TDM_TX:
  4932. slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  4933. break;
  4934. case AFE_PORT_ID_SECONDARY_TDM_TX:
  4935. slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  4936. break;
  4937. case AFE_PORT_ID_TERTIARY_TDM_TX:
  4938. slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  4939. break;
  4940. case AFE_PORT_ID_QUATERNARY_TDM_TX:
  4941. slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  4942. break;
  4943. case AFE_PORT_ID_QUINARY_TDM_TX:
  4944. slots = tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
  4945. break;
  4946. default:
  4947. pr_err("%s: dai id 0x%x not supported\n",
  4948. __func__, cpu_dai->id);
  4949. return -EINVAL;
  4950. }
  4951. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4952. /*2 slot config - bits 0 and 1 set for the first two slots */
  4953. slot_mask = 0x0000FFFF >> (16-slots);
  4954. channels = slots;
  4955. pr_debug("%s: tdm rx slot_width %d slots %d\n",
  4956. __func__, slot_width, slots);
  4957. ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
  4958. slots, slot_width);
  4959. if (ret < 0) {
  4960. pr_err("%s: failed to set tdm rx slot, err:%d\n",
  4961. __func__, ret);
  4962. goto end;
  4963. }
  4964. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4965. 0, NULL, channels, slot_offset);
  4966. if (ret < 0) {
  4967. pr_err("%s: failed to set tdm rx channel map, err:%d\n",
  4968. __func__, ret);
  4969. goto end;
  4970. }
  4971. } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
  4972. /*2 slot config - bits 0 and 1 set for the first two slots */
  4973. slot_mask = 0x0000FFFF >> (16-slots);
  4974. channels = slots;
  4975. pr_debug("%s: tdm tx slot_width %d slots %d\n",
  4976. __func__, slot_width, slots);
  4977. ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
  4978. slots, slot_width);
  4979. if (ret < 0) {
  4980. pr_err("%s: failed to set tdm tx slot, err:%d\n",
  4981. __func__, ret);
  4982. goto end;
  4983. }
  4984. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4985. channels, slot_offset, 0, NULL);
  4986. if (ret < 0) {
  4987. pr_err("%s: failed to set tdm tx channel map, err:%d\n",
  4988. __func__, ret);
  4989. goto end;
  4990. }
  4991. } else {
  4992. ret = -EINVAL;
  4993. pr_err("%s: invalid use case, err:%d\n",
  4994. __func__, ret);
  4995. goto end;
  4996. }
  4997. rate = params_rate(params);
  4998. clk_freq = rate * slot_width * slots;
  4999. ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
  5000. if (ret < 0)
  5001. pr_err("%s: failed to set tdm clk, err:%d\n",
  5002. __func__, ret);
  5003. end:
  5004. return ret;
  5005. }
  5006. static int sm6150_tdm_snd_startup(struct snd_pcm_substream *substream)
  5007. {
  5008. int ret = 0;
  5009. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5010. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5011. struct snd_soc_card *card = rtd->card;
  5012. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5013. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5014. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  5015. if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
  5016. (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
  5017. ret = msm_set_pinctrl(pinctrl_info, STATE_TDM_ACTIVE);
  5018. if (ret)
  5019. pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
  5020. __func__, ret);
  5021. }
  5022. return ret;
  5023. }
  5024. static void sm6150_tdm_snd_shutdown(struct snd_pcm_substream *substream)
  5025. {
  5026. int ret = 0;
  5027. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5028. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5029. struct snd_soc_card *card = rtd->card;
  5030. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5031. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5032. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  5033. if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
  5034. (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
  5035. ret = msm_set_pinctrl(pinctrl_info, STATE_DISABLE);
  5036. if (ret)
  5037. pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
  5038. __func__, ret);
  5039. }
  5040. }
  5041. static struct snd_soc_ops sm6150_tdm_be_ops = {
  5042. .hw_params = sm6150_tdm_snd_hw_params,
  5043. .startup = sm6150_tdm_snd_startup,
  5044. .shutdown = sm6150_tdm_snd_shutdown
  5045. };
  5046. static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
  5047. {
  5048. cpumask_t mask;
  5049. if (pm_qos_request_active(&substream->latency_pm_qos_req))
  5050. pm_qos_remove_request(&substream->latency_pm_qos_req);
  5051. cpumask_clear(&mask);
  5052. cpumask_set_cpu(1, &mask); /* affine to core 1 */
  5053. cpumask_set_cpu(2, &mask); /* affine to core 2 */
  5054. cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
  5055. substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
  5056. pm_qos_add_request(&substream->latency_pm_qos_req,
  5057. PM_QOS_CPU_DMA_LATENCY,
  5058. MSM_LL_QOS_VALUE);
  5059. return 0;
  5060. }
  5061. static struct snd_soc_ops msm_fe_qos_ops = {
  5062. .prepare = msm_fe_qos_prepare,
  5063. };
  5064. static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
  5065. {
  5066. int ret = 0;
  5067. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5068. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5069. int index = cpu_dai->id;
  5070. unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
  5071. struct snd_soc_card *card = rtd->card;
  5072. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5073. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5074. int ret_pinctrl = 0;
  5075. dev_dbg(rtd->card->dev,
  5076. "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
  5077. __func__, substream->name, substream->stream,
  5078. cpu_dai->name, cpu_dai->id);
  5079. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  5080. ret = -EINVAL;
  5081. dev_err(rtd->card->dev,
  5082. "%s: CPU DAI id (%d) out of range\n",
  5083. __func__, cpu_dai->id);
  5084. goto err;
  5085. }
  5086. /*
  5087. * Mutex protection in case the same MI2S
  5088. * interface using for both TX and RX so
  5089. * that the same clock won't be enable twice.
  5090. */
  5091. mutex_lock(&mi2s_intf_conf[index].lock);
  5092. if (++mi2s_intf_conf[index].ref_cnt == 1) {
  5093. /* Check if msm needs to provide the clock to the interface */
  5094. if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
  5095. mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
  5096. fmt = SND_SOC_DAIFMT_CBM_CFM;
  5097. }
  5098. ret = msm_mi2s_set_sclk(substream, true);
  5099. if (ret < 0) {
  5100. dev_err(rtd->card->dev,
  5101. "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
  5102. __func__, ret);
  5103. goto clean_up;
  5104. }
  5105. ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
  5106. if (ret < 0) {
  5107. pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
  5108. __func__, index, ret);
  5109. goto clk_off;
  5110. }
  5111. if (index == QUAT_MI2S) {
  5112. ret_pinctrl = msm_set_pinctrl(pinctrl_info,
  5113. STATE_MI2S_ACTIVE);
  5114. if (ret_pinctrl)
  5115. pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
  5116. __func__, ret_pinctrl);
  5117. }
  5118. }
  5119. clk_off:
  5120. if (ret < 0)
  5121. msm_mi2s_set_sclk(substream, false);
  5122. clean_up:
  5123. if (ret < 0)
  5124. mi2s_intf_conf[index].ref_cnt--;
  5125. mutex_unlock(&mi2s_intf_conf[index].lock);
  5126. err:
  5127. return ret;
  5128. }
  5129. static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
  5130. {
  5131. int ret;
  5132. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5133. int index = rtd->cpu_dai->id;
  5134. struct snd_soc_card *card = rtd->card;
  5135. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5136. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5137. int ret_pinctrl = 0;
  5138. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  5139. substream->name, substream->stream);
  5140. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  5141. pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
  5142. return;
  5143. }
  5144. mutex_lock(&mi2s_intf_conf[index].lock);
  5145. if (--mi2s_intf_conf[index].ref_cnt == 0) {
  5146. ret = msm_mi2s_set_sclk(substream, false);
  5147. if (ret < 0)
  5148. pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
  5149. __func__, index, ret);
  5150. if (index == QUAT_MI2S) {
  5151. ret_pinctrl = msm_set_pinctrl(pinctrl_info,
  5152. STATE_DISABLE);
  5153. if (ret_pinctrl)
  5154. pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
  5155. __func__, ret_pinctrl);
  5156. }
  5157. }
  5158. mutex_unlock(&mi2s_intf_conf[index].lock);
  5159. }
  5160. static struct snd_soc_ops msm_mi2s_be_ops = {
  5161. .startup = msm_mi2s_snd_startup,
  5162. .shutdown = msm_mi2s_snd_shutdown,
  5163. };
  5164. static struct snd_soc_ops msm_cdc_dma_be_ops = {
  5165. .hw_params = msm_snd_cdc_dma_hw_params,
  5166. };
  5167. static struct snd_soc_ops msm_be_ops = {
  5168. .hw_params = msm_snd_hw_params,
  5169. };
  5170. static struct snd_soc_ops msm_slimbus_2_be_ops = {
  5171. .hw_params = msm_slimbus_2_hw_params,
  5172. };
  5173. static struct snd_soc_ops msm_wcn_ops = {
  5174. .hw_params = msm_wcn_hw_params,
  5175. };
  5176. /* Digital audio interface glue - connects codec <---> CPU */
  5177. static struct snd_soc_dai_link msm_common_dai_links[] = {
  5178. /* FrontEnd DAI Links */
  5179. {/* hw:x,0 */
  5180. .name = MSM_DAILINK_NAME(Media1),
  5181. .stream_name = "MultiMedia1",
  5182. .cpu_dai_name = "MultiMedia1",
  5183. .platform_name = "msm-pcm-dsp.0",
  5184. .dynamic = 1,
  5185. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5186. .dpcm_playback = 1,
  5187. .dpcm_capture = 1,
  5188. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5189. SND_SOC_DPCM_TRIGGER_POST},
  5190. .codec_dai_name = "snd-soc-dummy-dai",
  5191. .codec_name = "snd-soc-dummy",
  5192. .ignore_suspend = 1,
  5193. /* this dainlink has playback support */
  5194. .ignore_pmdown_time = 1,
  5195. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  5196. },
  5197. {/* hw:x,1 */
  5198. .name = MSM_DAILINK_NAME(Media2),
  5199. .stream_name = "MultiMedia2",
  5200. .cpu_dai_name = "MultiMedia2",
  5201. .platform_name = "msm-pcm-dsp.0",
  5202. .dynamic = 1,
  5203. .dpcm_playback = 1,
  5204. .dpcm_capture = 1,
  5205. .codec_dai_name = "snd-soc-dummy-dai",
  5206. .codec_name = "snd-soc-dummy",
  5207. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5208. SND_SOC_DPCM_TRIGGER_POST},
  5209. .ignore_suspend = 1,
  5210. /* this dainlink has playback support */
  5211. .ignore_pmdown_time = 1,
  5212. .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
  5213. },
  5214. {/* hw:x,2 */
  5215. .name = "VoiceMMode1",
  5216. .stream_name = "VoiceMMode1",
  5217. .cpu_dai_name = "VoiceMMode1",
  5218. .platform_name = "msm-pcm-voice",
  5219. .dynamic = 1,
  5220. .dpcm_playback = 1,
  5221. .dpcm_capture = 1,
  5222. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5223. SND_SOC_DPCM_TRIGGER_POST},
  5224. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5225. .ignore_suspend = 1,
  5226. .ignore_pmdown_time = 1,
  5227. .codec_dai_name = "snd-soc-dummy-dai",
  5228. .codec_name = "snd-soc-dummy",
  5229. .id = MSM_FRONTEND_DAI_VOICEMMODE1,
  5230. },
  5231. {/* hw:x,3 */
  5232. .name = "MSM VoIP",
  5233. .stream_name = "VoIP",
  5234. .cpu_dai_name = "VoIP",
  5235. .platform_name = "msm-voip-dsp",
  5236. .dynamic = 1,
  5237. .dpcm_playback = 1,
  5238. .dpcm_capture = 1,
  5239. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5240. SND_SOC_DPCM_TRIGGER_POST},
  5241. .codec_dai_name = "snd-soc-dummy-dai",
  5242. .codec_name = "snd-soc-dummy",
  5243. .ignore_suspend = 1,
  5244. /* this dainlink has playback support */
  5245. .ignore_pmdown_time = 1,
  5246. .id = MSM_FRONTEND_DAI_VOIP,
  5247. },
  5248. {/* hw:x,4 */
  5249. .name = MSM_DAILINK_NAME(ULL),
  5250. .stream_name = "MultiMedia3",
  5251. .cpu_dai_name = "MultiMedia3",
  5252. .platform_name = "msm-pcm-dsp.2",
  5253. .dynamic = 1,
  5254. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5255. .dpcm_playback = 1,
  5256. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5257. SND_SOC_DPCM_TRIGGER_POST},
  5258. .codec_dai_name = "snd-soc-dummy-dai",
  5259. .codec_name = "snd-soc-dummy",
  5260. .ignore_suspend = 1,
  5261. /* this dainlink has playback support */
  5262. .ignore_pmdown_time = 1,
  5263. .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
  5264. },
  5265. /* Hostless PCM purpose */
  5266. {/* hw:x,5 */
  5267. .name = "SLIMBUS_0 Hostless",
  5268. .stream_name = "SLIMBUS_0 Hostless",
  5269. .cpu_dai_name = "SLIMBUS0_HOSTLESS",
  5270. .platform_name = "msm-pcm-hostless",
  5271. .dynamic = 1,
  5272. .dpcm_playback = 1,
  5273. .dpcm_capture = 1,
  5274. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5275. SND_SOC_DPCM_TRIGGER_POST},
  5276. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5277. .ignore_suspend = 1,
  5278. /* this dailink has playback support */
  5279. .ignore_pmdown_time = 1,
  5280. .codec_dai_name = "snd-soc-dummy-dai",
  5281. .codec_name = "snd-soc-dummy",
  5282. },
  5283. {/* hw:x,6 */
  5284. .name = "MSM AFE-PCM RX",
  5285. .stream_name = "AFE-PROXY RX",
  5286. .cpu_dai_name = "msm-dai-q6-dev.241",
  5287. .codec_name = "msm-stub-codec.1",
  5288. .codec_dai_name = "msm-stub-rx",
  5289. .platform_name = "msm-pcm-afe",
  5290. .dpcm_playback = 1,
  5291. .ignore_suspend = 1,
  5292. /* this dainlink has playback support */
  5293. .ignore_pmdown_time = 1,
  5294. },
  5295. {/* hw:x,7 */
  5296. .name = "MSM AFE-PCM TX",
  5297. .stream_name = "AFE-PROXY TX",
  5298. .cpu_dai_name = "msm-dai-q6-dev.240",
  5299. .codec_name = "msm-stub-codec.1",
  5300. .codec_dai_name = "msm-stub-tx",
  5301. .platform_name = "msm-pcm-afe",
  5302. .dpcm_capture = 1,
  5303. .ignore_suspend = 1,
  5304. },
  5305. {/* hw:x,8 */
  5306. .name = MSM_DAILINK_NAME(Compress1),
  5307. .stream_name = "Compress1",
  5308. .cpu_dai_name = "MultiMedia4",
  5309. .platform_name = "msm-compress-dsp",
  5310. .dynamic = 1,
  5311. .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
  5312. .dpcm_playback = 1,
  5313. .dpcm_capture = 1,
  5314. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5315. SND_SOC_DPCM_TRIGGER_POST},
  5316. .codec_dai_name = "snd-soc-dummy-dai",
  5317. .codec_name = "snd-soc-dummy",
  5318. .ignore_suspend = 1,
  5319. .ignore_pmdown_time = 1,
  5320. /* this dainlink has playback support */
  5321. .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
  5322. },
  5323. {/* hw:x,9 */
  5324. .name = "AUXPCM Hostless",
  5325. .stream_name = "AUXPCM Hostless",
  5326. .cpu_dai_name = "AUXPCM_HOSTLESS",
  5327. .platform_name = "msm-pcm-hostless",
  5328. .dynamic = 1,
  5329. .dpcm_playback = 1,
  5330. .dpcm_capture = 1,
  5331. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5332. SND_SOC_DPCM_TRIGGER_POST},
  5333. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5334. .ignore_suspend = 1,
  5335. /* this dainlink has playback support */
  5336. .ignore_pmdown_time = 1,
  5337. .codec_dai_name = "snd-soc-dummy-dai",
  5338. .codec_name = "snd-soc-dummy",
  5339. },
  5340. {/* hw:x,10 */
  5341. .name = "SLIMBUS_1 Hostless",
  5342. .stream_name = "SLIMBUS_1 Hostless",
  5343. .cpu_dai_name = "SLIMBUS1_HOSTLESS",
  5344. .platform_name = "msm-pcm-hostless",
  5345. .dynamic = 1,
  5346. .dpcm_playback = 1,
  5347. .dpcm_capture = 1,
  5348. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5349. SND_SOC_DPCM_TRIGGER_POST},
  5350. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5351. .ignore_suspend = 1,
  5352. /* this dailink has playback support */
  5353. .ignore_pmdown_time = 1,
  5354. .codec_dai_name = "snd-soc-dummy-dai",
  5355. .codec_name = "snd-soc-dummy",
  5356. },
  5357. {/* hw:x,11 */
  5358. .name = "SLIMBUS_3 Hostless",
  5359. .stream_name = "SLIMBUS_3 Hostless",
  5360. .cpu_dai_name = "SLIMBUS3_HOSTLESS",
  5361. .platform_name = "msm-pcm-hostless",
  5362. .dynamic = 1,
  5363. .dpcm_playback = 1,
  5364. .dpcm_capture = 1,
  5365. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5366. SND_SOC_DPCM_TRIGGER_POST},
  5367. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5368. .ignore_suspend = 1,
  5369. /* this dailink has playback support */
  5370. .ignore_pmdown_time = 1,
  5371. .codec_dai_name = "snd-soc-dummy-dai",
  5372. .codec_name = "snd-soc-dummy",
  5373. },
  5374. {/* hw:x,12 */
  5375. .name = "SLIMBUS_7 Hostless",
  5376. .stream_name = "SLIMBUS_7 Hostless",
  5377. .cpu_dai_name = "SLIMBUS7_HOSTLESS",
  5378. .platform_name = "msm-pcm-hostless",
  5379. .dynamic = 1,
  5380. .dpcm_playback = 1,
  5381. .dpcm_capture = 1,
  5382. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5383. SND_SOC_DPCM_TRIGGER_POST},
  5384. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5385. .ignore_suspend = 1,
  5386. /* this dailink has playback support */
  5387. .ignore_pmdown_time = 1,
  5388. .codec_dai_name = "snd-soc-dummy-dai",
  5389. .codec_name = "snd-soc-dummy",
  5390. },
  5391. {/* hw:x,13 */
  5392. .name = MSM_DAILINK_NAME(LowLatency),
  5393. .stream_name = "MultiMedia5",
  5394. .cpu_dai_name = "MultiMedia5",
  5395. .platform_name = "msm-pcm-dsp.1",
  5396. .dynamic = 1,
  5397. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5398. .dpcm_playback = 1,
  5399. .dpcm_capture = 1,
  5400. .codec_dai_name = "snd-soc-dummy-dai",
  5401. .codec_name = "snd-soc-dummy",
  5402. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5403. SND_SOC_DPCM_TRIGGER_POST},
  5404. .ignore_suspend = 1,
  5405. /* this dainlink has playback support */
  5406. .ignore_pmdown_time = 1,
  5407. .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
  5408. .ops = &msm_fe_qos_ops,
  5409. },
  5410. {/* hw:x,14 */
  5411. .name = "Listen 1 Audio Service",
  5412. .stream_name = "Listen 1 Audio Service",
  5413. .cpu_dai_name = "LSM1",
  5414. .platform_name = "msm-lsm-client",
  5415. .dynamic = 1,
  5416. .dpcm_capture = 1,
  5417. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5418. SND_SOC_DPCM_TRIGGER_POST },
  5419. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5420. .ignore_suspend = 1,
  5421. .codec_dai_name = "snd-soc-dummy-dai",
  5422. .codec_name = "snd-soc-dummy",
  5423. .id = MSM_FRONTEND_DAI_LSM1,
  5424. },
  5425. /* Multiple Tunnel instances */
  5426. {/* hw:x,15 */
  5427. .name = MSM_DAILINK_NAME(Compress2),
  5428. .stream_name = "Compress2",
  5429. .cpu_dai_name = "MultiMedia7",
  5430. .platform_name = "msm-compress-dsp",
  5431. .dynamic = 1,
  5432. .dpcm_playback = 1,
  5433. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5434. SND_SOC_DPCM_TRIGGER_POST},
  5435. .codec_dai_name = "snd-soc-dummy-dai",
  5436. .codec_name = "snd-soc-dummy",
  5437. .ignore_suspend = 1,
  5438. .ignore_pmdown_time = 1,
  5439. /* this dainlink has playback support */
  5440. .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
  5441. },
  5442. {/* hw:x,16 */
  5443. .name = MSM_DAILINK_NAME(MultiMedia10),
  5444. .stream_name = "MultiMedia10",
  5445. .cpu_dai_name = "MultiMedia10",
  5446. .platform_name = "msm-pcm-dsp.1",
  5447. .dynamic = 1,
  5448. .dpcm_playback = 1,
  5449. .dpcm_capture = 1,
  5450. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5451. SND_SOC_DPCM_TRIGGER_POST},
  5452. .codec_dai_name = "snd-soc-dummy-dai",
  5453. .codec_name = "snd-soc-dummy",
  5454. .ignore_suspend = 1,
  5455. .ignore_pmdown_time = 1,
  5456. /* this dainlink has playback support */
  5457. .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
  5458. },
  5459. {/* hw:x,17 */
  5460. .name = MSM_DAILINK_NAME(ULL_NOIRQ),
  5461. .stream_name = "MM_NOIRQ",
  5462. .cpu_dai_name = "MultiMedia8",
  5463. .platform_name = "msm-pcm-dsp-noirq",
  5464. .dynamic = 1,
  5465. .dpcm_playback = 1,
  5466. .dpcm_capture = 1,
  5467. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5468. SND_SOC_DPCM_TRIGGER_POST},
  5469. .codec_dai_name = "snd-soc-dummy-dai",
  5470. .codec_name = "snd-soc-dummy",
  5471. .ignore_suspend = 1,
  5472. .ignore_pmdown_time = 1,
  5473. /* this dainlink has playback support */
  5474. .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
  5475. .ops = &msm_fe_qos_ops,
  5476. },
  5477. /* HDMI Hostless */
  5478. {/* hw:x,18 */
  5479. .name = "HDMI_RX_HOSTLESS",
  5480. .stream_name = "HDMI_RX_HOSTLESS",
  5481. .cpu_dai_name = "HDMI_HOSTLESS",
  5482. .platform_name = "msm-pcm-hostless",
  5483. .dynamic = 1,
  5484. .dpcm_playback = 1,
  5485. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5486. SND_SOC_DPCM_TRIGGER_POST},
  5487. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5488. .ignore_suspend = 1,
  5489. .ignore_pmdown_time = 1,
  5490. .codec_dai_name = "snd-soc-dummy-dai",
  5491. .codec_name = "snd-soc-dummy",
  5492. },
  5493. {/* hw:x,19 */
  5494. .name = "VoiceMMode2",
  5495. .stream_name = "VoiceMMode2",
  5496. .cpu_dai_name = "VoiceMMode2",
  5497. .platform_name = "msm-pcm-voice",
  5498. .dynamic = 1,
  5499. .dpcm_playback = 1,
  5500. .dpcm_capture = 1,
  5501. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5502. SND_SOC_DPCM_TRIGGER_POST},
  5503. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5504. .ignore_suspend = 1,
  5505. .ignore_pmdown_time = 1,
  5506. .codec_dai_name = "snd-soc-dummy-dai",
  5507. .codec_name = "snd-soc-dummy",
  5508. .id = MSM_FRONTEND_DAI_VOICEMMODE2,
  5509. },
  5510. /* LSM FE */
  5511. {/* hw:x,20 */
  5512. .name = "Listen 2 Audio Service",
  5513. .stream_name = "Listen 2 Audio Service",
  5514. .cpu_dai_name = "LSM2",
  5515. .platform_name = "msm-lsm-client",
  5516. .dynamic = 1,
  5517. .dpcm_capture = 1,
  5518. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5519. SND_SOC_DPCM_TRIGGER_POST },
  5520. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5521. .ignore_suspend = 1,
  5522. .codec_dai_name = "snd-soc-dummy-dai",
  5523. .codec_name = "snd-soc-dummy",
  5524. .id = MSM_FRONTEND_DAI_LSM2,
  5525. },
  5526. {/* hw:x,21 */
  5527. .name = "Listen 3 Audio Service",
  5528. .stream_name = "Listen 3 Audio Service",
  5529. .cpu_dai_name = "LSM3",
  5530. .platform_name = "msm-lsm-client",
  5531. .dynamic = 1,
  5532. .dpcm_capture = 1,
  5533. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5534. SND_SOC_DPCM_TRIGGER_POST },
  5535. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5536. .ignore_suspend = 1,
  5537. .codec_dai_name = "snd-soc-dummy-dai",
  5538. .codec_name = "snd-soc-dummy",
  5539. .id = MSM_FRONTEND_DAI_LSM3,
  5540. },
  5541. {/* hw:x,22 */
  5542. .name = "Listen 4 Audio Service",
  5543. .stream_name = "Listen 4 Audio Service",
  5544. .cpu_dai_name = "LSM4",
  5545. .platform_name = "msm-lsm-client",
  5546. .dynamic = 1,
  5547. .dpcm_capture = 1,
  5548. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5549. SND_SOC_DPCM_TRIGGER_POST },
  5550. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5551. .ignore_suspend = 1,
  5552. .codec_dai_name = "snd-soc-dummy-dai",
  5553. .codec_name = "snd-soc-dummy",
  5554. .id = MSM_FRONTEND_DAI_LSM4,
  5555. },
  5556. {/* hw:x,23 */
  5557. .name = "Listen 5 Audio Service",
  5558. .stream_name = "Listen 5 Audio Service",
  5559. .cpu_dai_name = "LSM5",
  5560. .platform_name = "msm-lsm-client",
  5561. .dynamic = 1,
  5562. .dpcm_capture = 1,
  5563. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5564. SND_SOC_DPCM_TRIGGER_POST },
  5565. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5566. .ignore_suspend = 1,
  5567. .codec_dai_name = "snd-soc-dummy-dai",
  5568. .codec_name = "snd-soc-dummy",
  5569. .id = MSM_FRONTEND_DAI_LSM5,
  5570. },
  5571. {/* hw:x,24 */
  5572. .name = "Listen 6 Audio Service",
  5573. .stream_name = "Listen 6 Audio Service",
  5574. .cpu_dai_name = "LSM6",
  5575. .platform_name = "msm-lsm-client",
  5576. .dynamic = 1,
  5577. .dpcm_capture = 1,
  5578. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5579. SND_SOC_DPCM_TRIGGER_POST },
  5580. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5581. .ignore_suspend = 1,
  5582. .codec_dai_name = "snd-soc-dummy-dai",
  5583. .codec_name = "snd-soc-dummy",
  5584. .id = MSM_FRONTEND_DAI_LSM6,
  5585. },
  5586. {/* hw:x,25 */
  5587. .name = "Listen 7 Audio Service",
  5588. .stream_name = "Listen 7 Audio Service",
  5589. .cpu_dai_name = "LSM7",
  5590. .platform_name = "msm-lsm-client",
  5591. .dynamic = 1,
  5592. .dpcm_capture = 1,
  5593. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5594. SND_SOC_DPCM_TRIGGER_POST },
  5595. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5596. .ignore_suspend = 1,
  5597. .codec_dai_name = "snd-soc-dummy-dai",
  5598. .codec_name = "snd-soc-dummy",
  5599. .id = MSM_FRONTEND_DAI_LSM7,
  5600. },
  5601. {/* hw:x,26 */
  5602. .name = "Listen 8 Audio Service",
  5603. .stream_name = "Listen 8 Audio Service",
  5604. .cpu_dai_name = "LSM8",
  5605. .platform_name = "msm-lsm-client",
  5606. .dynamic = 1,
  5607. .dpcm_capture = 1,
  5608. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5609. SND_SOC_DPCM_TRIGGER_POST },
  5610. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5611. .ignore_suspend = 1,
  5612. .codec_dai_name = "snd-soc-dummy-dai",
  5613. .codec_name = "snd-soc-dummy",
  5614. .id = MSM_FRONTEND_DAI_LSM8,
  5615. },
  5616. {/* hw:x,27 */
  5617. .name = MSM_DAILINK_NAME(Media9),
  5618. .stream_name = "MultiMedia9",
  5619. .cpu_dai_name = "MultiMedia9",
  5620. .platform_name = "msm-pcm-dsp.0",
  5621. .dynamic = 1,
  5622. .dpcm_playback = 1,
  5623. .dpcm_capture = 1,
  5624. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5625. SND_SOC_DPCM_TRIGGER_POST},
  5626. .codec_dai_name = "snd-soc-dummy-dai",
  5627. .codec_name = "snd-soc-dummy",
  5628. .ignore_suspend = 1,
  5629. /* this dainlink has playback support */
  5630. .ignore_pmdown_time = 1,
  5631. .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
  5632. },
  5633. {/* hw:x,28 */
  5634. .name = MSM_DAILINK_NAME(Compress4),
  5635. .stream_name = "Compress4",
  5636. .cpu_dai_name = "MultiMedia11",
  5637. .platform_name = "msm-compress-dsp",
  5638. .dynamic = 1,
  5639. .dpcm_playback = 1,
  5640. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5641. SND_SOC_DPCM_TRIGGER_POST},
  5642. .codec_dai_name = "snd-soc-dummy-dai",
  5643. .codec_name = "snd-soc-dummy",
  5644. .ignore_suspend = 1,
  5645. .ignore_pmdown_time = 1,
  5646. /* this dainlink has playback support */
  5647. .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
  5648. },
  5649. {/* hw:x,29 */
  5650. .name = MSM_DAILINK_NAME(Compress5),
  5651. .stream_name = "Compress5",
  5652. .cpu_dai_name = "MultiMedia12",
  5653. .platform_name = "msm-compress-dsp",
  5654. .dynamic = 1,
  5655. .dpcm_playback = 1,
  5656. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5657. SND_SOC_DPCM_TRIGGER_POST},
  5658. .codec_dai_name = "snd-soc-dummy-dai",
  5659. .codec_name = "snd-soc-dummy",
  5660. .ignore_suspend = 1,
  5661. .ignore_pmdown_time = 1,
  5662. /* this dainlink has playback support */
  5663. .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
  5664. },
  5665. {/* hw:x,30 */
  5666. .name = MSM_DAILINK_NAME(Compress6),
  5667. .stream_name = "Compress6",
  5668. .cpu_dai_name = "MultiMedia13",
  5669. .platform_name = "msm-compress-dsp",
  5670. .dynamic = 1,
  5671. .dpcm_playback = 1,
  5672. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5673. SND_SOC_DPCM_TRIGGER_POST},
  5674. .codec_dai_name = "snd-soc-dummy-dai",
  5675. .codec_name = "snd-soc-dummy",
  5676. .ignore_suspend = 1,
  5677. .ignore_pmdown_time = 1,
  5678. /* this dainlink has playback support */
  5679. .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
  5680. },
  5681. {/* hw:x,31 */
  5682. .name = MSM_DAILINK_NAME(Compress7),
  5683. .stream_name = "Compress7",
  5684. .cpu_dai_name = "MultiMedia14",
  5685. .platform_name = "msm-compress-dsp",
  5686. .dynamic = 1,
  5687. .dpcm_playback = 1,
  5688. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5689. SND_SOC_DPCM_TRIGGER_POST},
  5690. .codec_dai_name = "snd-soc-dummy-dai",
  5691. .codec_name = "snd-soc-dummy",
  5692. .ignore_suspend = 1,
  5693. .ignore_pmdown_time = 1,
  5694. /* this dainlink has playback support */
  5695. .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
  5696. },
  5697. {/* hw:x,32 */
  5698. .name = MSM_DAILINK_NAME(Compress8),
  5699. .stream_name = "Compress8",
  5700. .cpu_dai_name = "MultiMedia15",
  5701. .platform_name = "msm-compress-dsp",
  5702. .dynamic = 1,
  5703. .dpcm_playback = 1,
  5704. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5705. SND_SOC_DPCM_TRIGGER_POST},
  5706. .codec_dai_name = "snd-soc-dummy-dai",
  5707. .codec_name = "snd-soc-dummy",
  5708. .ignore_suspend = 1,
  5709. .ignore_pmdown_time = 1,
  5710. /* this dainlink has playback support */
  5711. .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
  5712. },
  5713. {/* hw:x,33 */
  5714. .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
  5715. .stream_name = "MM_NOIRQ_2",
  5716. .cpu_dai_name = "MultiMedia16",
  5717. .platform_name = "msm-pcm-dsp-noirq",
  5718. .dynamic = 1,
  5719. .dpcm_playback = 1,
  5720. .dpcm_capture = 1,
  5721. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5722. SND_SOC_DPCM_TRIGGER_POST},
  5723. .codec_dai_name = "snd-soc-dummy-dai",
  5724. .codec_name = "snd-soc-dummy",
  5725. .ignore_suspend = 1,
  5726. .ignore_pmdown_time = 1,
  5727. /* this dainlink has playback support */
  5728. .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
  5729. },
  5730. {/* hw:x,34 */
  5731. .name = "SLIMBUS_8 Hostless",
  5732. .stream_name = "SLIMBUS8_HOSTLESS Capture",
  5733. .cpu_dai_name = "SLIMBUS8_HOSTLESS",
  5734. .platform_name = "msm-pcm-hostless",
  5735. .dynamic = 1,
  5736. .dpcm_capture = 1,
  5737. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5738. SND_SOC_DPCM_TRIGGER_POST},
  5739. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5740. .ignore_suspend = 1,
  5741. .codec_dai_name = "snd-soc-dummy-dai",
  5742. .codec_name = "snd-soc-dummy",
  5743. },
  5744. {/* hw:x,35 */
  5745. .name = "CDC_DMA Hostless",
  5746. .stream_name = "CDC_DMA Hostless",
  5747. .cpu_dai_name = "CDC_DMA_HOSTLESS",
  5748. .platform_name = "msm-pcm-hostless",
  5749. .dynamic = 1,
  5750. .dpcm_playback = 1,
  5751. .dpcm_capture = 1,
  5752. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5753. SND_SOC_DPCM_TRIGGER_POST},
  5754. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5755. .ignore_suspend = 1,
  5756. /* this dailink has playback support */
  5757. .ignore_pmdown_time = 1,
  5758. .codec_dai_name = "snd-soc-dummy-dai",
  5759. .codec_name = "snd-soc-dummy",
  5760. },
  5761. {/* hw:x,36 */
  5762. .name = "TX3_CDC_DMA Hostless",
  5763. .stream_name = "TX3_CDC_DMA Hostless",
  5764. .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
  5765. .platform_name = "msm-pcm-hostless",
  5766. .dynamic = 1,
  5767. .dpcm_capture = 1,
  5768. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5769. SND_SOC_DPCM_TRIGGER_POST},
  5770. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5771. .ignore_suspend = 1,
  5772. .codec_dai_name = "snd-soc-dummy-dai",
  5773. .codec_name = "snd-soc-dummy",
  5774. },
  5775. };
  5776. static struct snd_soc_dai_link msm_tavil_fe_dai_links[] = {
  5777. {/* hw:x,37 */
  5778. .name = LPASS_BE_SLIMBUS_4_TX,
  5779. .stream_name = "Slimbus4 Capture",
  5780. .cpu_dai_name = "msm-dai-q6-dev.16393",
  5781. .platform_name = "msm-pcm-hostless",
  5782. .codec_name = "tavil_codec",
  5783. .codec_dai_name = "tavil_vifeedback",
  5784. .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
  5785. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5786. .ops = &msm_be_ops,
  5787. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5788. .ignore_suspend = 1,
  5789. },
  5790. /* Ultrasound RX DAI Link */
  5791. {/* hw:x,38 */
  5792. .name = "SLIMBUS_2 Hostless Playback",
  5793. .stream_name = "SLIMBUS_2 Hostless Playback",
  5794. .cpu_dai_name = "msm-dai-q6-dev.16388",
  5795. .platform_name = "msm-pcm-hostless",
  5796. .codec_name = "tavil_codec",
  5797. .codec_dai_name = "tavil_rx2",
  5798. .ignore_suspend = 1,
  5799. .ignore_pmdown_time = 1,
  5800. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5801. .ops = &msm_slimbus_2_be_ops,
  5802. },
  5803. /* Ultrasound TX DAI Link */
  5804. {/* hw:x,39 */
  5805. .name = "SLIMBUS_2 Hostless Capture",
  5806. .stream_name = "SLIMBUS_2 Hostless Capture",
  5807. .cpu_dai_name = "msm-dai-q6-dev.16389",
  5808. .platform_name = "msm-pcm-hostless",
  5809. .codec_name = "tavil_codec",
  5810. .codec_dai_name = "tavil_tx2",
  5811. .ignore_suspend = 1,
  5812. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5813. .ops = &msm_slimbus_2_be_ops,
  5814. },
  5815. };
  5816. static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
  5817. {/* hw:x,37 */
  5818. .name = LPASS_BE_WSA_CDC_DMA_TX_0,
  5819. .stream_name = "WSA CDC DMA0 Capture",
  5820. .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
  5821. .platform_name = "msm-pcm-hostless",
  5822. .codec_name = "bolero_codec",
  5823. .codec_dai_name = "wsa_macro_vifeedback",
  5824. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
  5825. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5826. .ignore_suspend = 1,
  5827. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5828. .ops = &msm_cdc_dma_be_ops,
  5829. },
  5830. };
  5831. static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
  5832. {
  5833. .name = MSM_DAILINK_NAME(ASM Loopback),
  5834. .stream_name = "MultiMedia6",
  5835. .cpu_dai_name = "MultiMedia6",
  5836. .platform_name = "msm-pcm-loopback",
  5837. .dynamic = 1,
  5838. .dpcm_playback = 1,
  5839. .dpcm_capture = 1,
  5840. .codec_dai_name = "snd-soc-dummy-dai",
  5841. .codec_name = "snd-soc-dummy",
  5842. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5843. SND_SOC_DPCM_TRIGGER_POST},
  5844. .ignore_suspend = 1,
  5845. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5846. .ignore_pmdown_time = 1,
  5847. .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
  5848. },
  5849. {
  5850. .name = "USB Audio Hostless",
  5851. .stream_name = "USB Audio Hostless",
  5852. .cpu_dai_name = "USBAUDIO_HOSTLESS",
  5853. .platform_name = "msm-pcm-hostless",
  5854. .dynamic = 1,
  5855. .dpcm_playback = 1,
  5856. .dpcm_capture = 1,
  5857. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5858. SND_SOC_DPCM_TRIGGER_POST},
  5859. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5860. .ignore_suspend = 1,
  5861. .ignore_pmdown_time = 1,
  5862. .codec_dai_name = "snd-soc-dummy-dai",
  5863. .codec_name = "snd-soc-dummy",
  5864. },
  5865. };
  5866. static struct snd_soc_dai_link msm_common_be_dai_links[] = {
  5867. /* Backend AFE DAI Links */
  5868. {
  5869. .name = LPASS_BE_AFE_PCM_RX,
  5870. .stream_name = "AFE Playback",
  5871. .cpu_dai_name = "msm-dai-q6-dev.224",
  5872. .platform_name = "msm-pcm-routing",
  5873. .codec_name = "msm-stub-codec.1",
  5874. .codec_dai_name = "msm-stub-rx",
  5875. .no_pcm = 1,
  5876. .dpcm_playback = 1,
  5877. .id = MSM_BACKEND_DAI_AFE_PCM_RX,
  5878. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5879. /* this dainlink has playback support */
  5880. .ignore_pmdown_time = 1,
  5881. .ignore_suspend = 1,
  5882. },
  5883. {
  5884. .name = LPASS_BE_AFE_PCM_TX,
  5885. .stream_name = "AFE Capture",
  5886. .cpu_dai_name = "msm-dai-q6-dev.225",
  5887. .platform_name = "msm-pcm-routing",
  5888. .codec_name = "msm-stub-codec.1",
  5889. .codec_dai_name = "msm-stub-tx",
  5890. .no_pcm = 1,
  5891. .dpcm_capture = 1,
  5892. .id = MSM_BACKEND_DAI_AFE_PCM_TX,
  5893. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5894. .ignore_suspend = 1,
  5895. },
  5896. /* Incall Record Uplink BACK END DAI Link */
  5897. {
  5898. .name = LPASS_BE_INCALL_RECORD_TX,
  5899. .stream_name = "Voice Uplink Capture",
  5900. .cpu_dai_name = "msm-dai-q6-dev.32772",
  5901. .platform_name = "msm-pcm-routing",
  5902. .codec_name = "msm-stub-codec.1",
  5903. .codec_dai_name = "msm-stub-tx",
  5904. .no_pcm = 1,
  5905. .dpcm_capture = 1,
  5906. .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
  5907. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5908. .ignore_suspend = 1,
  5909. },
  5910. /* Incall Record Downlink BACK END DAI Link */
  5911. {
  5912. .name = LPASS_BE_INCALL_RECORD_RX,
  5913. .stream_name = "Voice Downlink Capture",
  5914. .cpu_dai_name = "msm-dai-q6-dev.32771",
  5915. .platform_name = "msm-pcm-routing",
  5916. .codec_name = "msm-stub-codec.1",
  5917. .codec_dai_name = "msm-stub-tx",
  5918. .no_pcm = 1,
  5919. .dpcm_capture = 1,
  5920. .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
  5921. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5922. .ignore_suspend = 1,
  5923. },
  5924. /* Incall Music BACK END DAI Link */
  5925. {
  5926. .name = LPASS_BE_VOICE_PLAYBACK_TX,
  5927. .stream_name = "Voice Farend Playback",
  5928. .cpu_dai_name = "msm-dai-q6-dev.32773",
  5929. .platform_name = "msm-pcm-routing",
  5930. .codec_name = "msm-stub-codec.1",
  5931. .codec_dai_name = "msm-stub-rx",
  5932. .no_pcm = 1,
  5933. .dpcm_playback = 1,
  5934. .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
  5935. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5936. .ignore_suspend = 1,
  5937. .ignore_pmdown_time = 1,
  5938. },
  5939. /* Incall Music 2 BACK END DAI Link */
  5940. {
  5941. .name = LPASS_BE_VOICE2_PLAYBACK_TX,
  5942. .stream_name = "Voice2 Farend Playback",
  5943. .cpu_dai_name = "msm-dai-q6-dev.32770",
  5944. .platform_name = "msm-pcm-routing",
  5945. .codec_name = "msm-stub-codec.1",
  5946. .codec_dai_name = "msm-stub-rx",
  5947. .no_pcm = 1,
  5948. .dpcm_playback = 1,
  5949. .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
  5950. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5951. .ignore_suspend = 1,
  5952. .ignore_pmdown_time = 1,
  5953. },
  5954. {
  5955. .name = LPASS_BE_USB_AUDIO_RX,
  5956. .stream_name = "USB Audio Playback",
  5957. .cpu_dai_name = "msm-dai-q6-dev.28672",
  5958. .platform_name = "msm-pcm-routing",
  5959. .codec_name = "msm-stub-codec.1",
  5960. .codec_dai_name = "msm-stub-rx",
  5961. .no_pcm = 1,
  5962. .dpcm_playback = 1,
  5963. .id = MSM_BACKEND_DAI_USB_RX,
  5964. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5965. .ignore_pmdown_time = 1,
  5966. .ignore_suspend = 1,
  5967. },
  5968. {
  5969. .name = LPASS_BE_USB_AUDIO_TX,
  5970. .stream_name = "USB Audio Capture",
  5971. .cpu_dai_name = "msm-dai-q6-dev.28673",
  5972. .platform_name = "msm-pcm-routing",
  5973. .codec_name = "msm-stub-codec.1",
  5974. .codec_dai_name = "msm-stub-tx",
  5975. .no_pcm = 1,
  5976. .dpcm_capture = 1,
  5977. .id = MSM_BACKEND_DAI_USB_TX,
  5978. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5979. .ignore_suspend = 1,
  5980. },
  5981. {
  5982. .name = LPASS_BE_PRI_TDM_RX_0,
  5983. .stream_name = "Primary TDM0 Playback",
  5984. .cpu_dai_name = "msm-dai-q6-tdm.36864",
  5985. .platform_name = "msm-pcm-routing",
  5986. .codec_name = "msm-stub-codec.1",
  5987. .codec_dai_name = "msm-stub-rx",
  5988. .no_pcm = 1,
  5989. .dpcm_playback = 1,
  5990. .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
  5991. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5992. .ops = &sm6150_tdm_be_ops,
  5993. .ignore_suspend = 1,
  5994. .ignore_pmdown_time = 1,
  5995. },
  5996. {
  5997. .name = LPASS_BE_PRI_TDM_TX_0,
  5998. .stream_name = "Primary TDM0 Capture",
  5999. .cpu_dai_name = "msm-dai-q6-tdm.36865",
  6000. .platform_name = "msm-pcm-routing",
  6001. .codec_name = "msm-stub-codec.1",
  6002. .codec_dai_name = "msm-stub-tx",
  6003. .no_pcm = 1,
  6004. .dpcm_capture = 1,
  6005. .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
  6006. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6007. .ops = &sm6150_tdm_be_ops,
  6008. .ignore_suspend = 1,
  6009. },
  6010. {
  6011. .name = LPASS_BE_SEC_TDM_RX_0,
  6012. .stream_name = "Secondary TDM0 Playback",
  6013. .cpu_dai_name = "msm-dai-q6-tdm.36880",
  6014. .platform_name = "msm-pcm-routing",
  6015. .codec_name = "msm-stub-codec.1",
  6016. .codec_dai_name = "msm-stub-rx",
  6017. .no_pcm = 1,
  6018. .dpcm_playback = 1,
  6019. .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
  6020. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6021. .ops = &sm6150_tdm_be_ops,
  6022. .ignore_suspend = 1,
  6023. .ignore_pmdown_time = 1,
  6024. },
  6025. {
  6026. .name = LPASS_BE_SEC_TDM_TX_0,
  6027. .stream_name = "Secondary TDM0 Capture",
  6028. .cpu_dai_name = "msm-dai-q6-tdm.36881",
  6029. .platform_name = "msm-pcm-routing",
  6030. .codec_name = "msm-stub-codec.1",
  6031. .codec_dai_name = "msm-stub-tx",
  6032. .no_pcm = 1,
  6033. .dpcm_capture = 1,
  6034. .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
  6035. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6036. .ops = &sm6150_tdm_be_ops,
  6037. .ignore_suspend = 1,
  6038. },
  6039. {
  6040. .name = LPASS_BE_TERT_TDM_RX_0,
  6041. .stream_name = "Tertiary TDM0 Playback",
  6042. .cpu_dai_name = "msm-dai-q6-tdm.36896",
  6043. .platform_name = "msm-pcm-routing",
  6044. .codec_name = "msm-stub-codec.1",
  6045. .codec_dai_name = "msm-stub-rx",
  6046. .no_pcm = 1,
  6047. .dpcm_playback = 1,
  6048. .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
  6049. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6050. .ops = &sm6150_tdm_be_ops,
  6051. .ignore_suspend = 1,
  6052. .ignore_pmdown_time = 1,
  6053. },
  6054. {
  6055. .name = LPASS_BE_TERT_TDM_TX_0,
  6056. .stream_name = "Tertiary TDM0 Capture",
  6057. .cpu_dai_name = "msm-dai-q6-tdm.36897",
  6058. .platform_name = "msm-pcm-routing",
  6059. .codec_name = "msm-stub-codec.1",
  6060. .codec_dai_name = "msm-stub-tx",
  6061. .no_pcm = 1,
  6062. .dpcm_capture = 1,
  6063. .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
  6064. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6065. .ops = &sm6150_tdm_be_ops,
  6066. .ignore_suspend = 1,
  6067. },
  6068. {
  6069. .name = LPASS_BE_QUAT_TDM_RX_0,
  6070. .stream_name = "Quaternary TDM0 Playback",
  6071. .cpu_dai_name = "msm-dai-q6-tdm.36912",
  6072. .platform_name = "msm-pcm-routing",
  6073. .codec_name = "msm-stub-codec.1",
  6074. .codec_dai_name = "msm-stub-rx",
  6075. .no_pcm = 1,
  6076. .dpcm_playback = 1,
  6077. .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
  6078. .be_hw_params_fixup = msm_tdm_be_hw_params_fixup,
  6079. .ops = &sm6150_tdm_be_ops,
  6080. .ignore_suspend = 1,
  6081. .ignore_pmdown_time = 1,
  6082. },
  6083. {
  6084. .name = LPASS_BE_QUAT_TDM_TX_0,
  6085. .stream_name = "Quaternary TDM0 Capture",
  6086. .cpu_dai_name = "msm-dai-q6-tdm.36913",
  6087. .platform_name = "msm-pcm-routing",
  6088. .codec_name = "msm-stub-codec.1",
  6089. .codec_dai_name = "msm-stub-tx",
  6090. .no_pcm = 1,
  6091. .dpcm_capture = 1,
  6092. .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
  6093. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6094. .ops = &sm6150_tdm_be_ops,
  6095. .ignore_suspend = 1,
  6096. },
  6097. };
  6098. static struct snd_soc_dai_link msm_tavil_be_dai_links[] = {
  6099. {
  6100. .name = LPASS_BE_SLIMBUS_0_RX,
  6101. .stream_name = "Slimbus Playback",
  6102. .cpu_dai_name = "msm-dai-q6-dev.16384",
  6103. .platform_name = "msm-pcm-routing",
  6104. .codec_name = "tavil_codec",
  6105. .codec_dai_name = "tavil_rx1",
  6106. .no_pcm = 1,
  6107. .dpcm_playback = 1,
  6108. .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
  6109. .init = &msm_audrx_tavil_init,
  6110. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6111. /* this dainlink has playback support */
  6112. .ignore_pmdown_time = 1,
  6113. .ignore_suspend = 1,
  6114. .ops = &msm_be_ops,
  6115. },
  6116. {
  6117. .name = LPASS_BE_SLIMBUS_0_TX,
  6118. .stream_name = "Slimbus Capture",
  6119. .cpu_dai_name = "msm-dai-q6-dev.16385",
  6120. .platform_name = "msm-pcm-routing",
  6121. .codec_name = "tavil_codec",
  6122. .codec_dai_name = "tavil_tx1",
  6123. .no_pcm = 1,
  6124. .dpcm_capture = 1,
  6125. .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
  6126. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6127. .ignore_suspend = 1,
  6128. .ops = &msm_be_ops,
  6129. },
  6130. {
  6131. .name = LPASS_BE_SLIMBUS_1_RX,
  6132. .stream_name = "Slimbus1 Playback",
  6133. .cpu_dai_name = "msm-dai-q6-dev.16386",
  6134. .platform_name = "msm-pcm-routing",
  6135. .codec_name = "tavil_codec",
  6136. .codec_dai_name = "tavil_rx1",
  6137. .no_pcm = 1,
  6138. .dpcm_playback = 1,
  6139. .id = MSM_BACKEND_DAI_SLIMBUS_1_RX,
  6140. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6141. .ops = &msm_be_ops,
  6142. /* dai link has playback support */
  6143. .ignore_pmdown_time = 1,
  6144. .ignore_suspend = 1,
  6145. },
  6146. {
  6147. .name = LPASS_BE_SLIMBUS_1_TX,
  6148. .stream_name = "Slimbus1 Capture",
  6149. .cpu_dai_name = "msm-dai-q6-dev.16387",
  6150. .platform_name = "msm-pcm-routing",
  6151. .codec_name = "tavil_codec",
  6152. .codec_dai_name = "tavil_tx3",
  6153. .no_pcm = 1,
  6154. .dpcm_capture = 1,
  6155. .id = MSM_BACKEND_DAI_SLIMBUS_1_TX,
  6156. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6157. .ops = &msm_be_ops,
  6158. .ignore_suspend = 1,
  6159. },
  6160. {
  6161. .name = LPASS_BE_SLIMBUS_2_RX,
  6162. .stream_name = "Slimbus2 Playback",
  6163. .cpu_dai_name = "msm-dai-q6-dev.16388",
  6164. .platform_name = "msm-pcm-routing",
  6165. .codec_name = "tavil_codec",
  6166. .codec_dai_name = "tavil_rx2",
  6167. .no_pcm = 1,
  6168. .dpcm_playback = 1,
  6169. .id = MSM_BACKEND_DAI_SLIMBUS_2_RX,
  6170. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6171. .ops = &msm_be_ops,
  6172. .ignore_pmdown_time = 1,
  6173. .ignore_suspend = 1,
  6174. },
  6175. {
  6176. .name = LPASS_BE_SLIMBUS_3_RX,
  6177. .stream_name = "Slimbus3 Playback",
  6178. .cpu_dai_name = "msm-dai-q6-dev.16390",
  6179. .platform_name = "msm-pcm-routing",
  6180. .codec_name = "tavil_codec",
  6181. .codec_dai_name = "tavil_rx1",
  6182. .no_pcm = 1,
  6183. .dpcm_playback = 1,
  6184. .id = MSM_BACKEND_DAI_SLIMBUS_3_RX,
  6185. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6186. .ops = &msm_be_ops,
  6187. /* dai link has playback support */
  6188. .ignore_pmdown_time = 1,
  6189. .ignore_suspend = 1,
  6190. },
  6191. {
  6192. .name = LPASS_BE_SLIMBUS_3_TX,
  6193. .stream_name = "Slimbus3 Capture",
  6194. .cpu_dai_name = "msm-dai-q6-dev.16391",
  6195. .platform_name = "msm-pcm-routing",
  6196. .codec_name = "tavil_codec",
  6197. .codec_dai_name = "tavil_tx1",
  6198. .no_pcm = 1,
  6199. .dpcm_capture = 1,
  6200. .id = MSM_BACKEND_DAI_SLIMBUS_3_TX,
  6201. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6202. .ops = &msm_be_ops,
  6203. .ignore_suspend = 1,
  6204. },
  6205. {
  6206. .name = LPASS_BE_SLIMBUS_4_RX,
  6207. .stream_name = "Slimbus4 Playback",
  6208. .cpu_dai_name = "msm-dai-q6-dev.16392",
  6209. .platform_name = "msm-pcm-routing",
  6210. .codec_name = "tavil_codec",
  6211. .codec_dai_name = "tavil_rx1",
  6212. .no_pcm = 1,
  6213. .dpcm_playback = 1,
  6214. .id = MSM_BACKEND_DAI_SLIMBUS_4_RX,
  6215. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6216. .ops = &msm_be_ops,
  6217. /* dai link has playback support */
  6218. .ignore_pmdown_time = 1,
  6219. .ignore_suspend = 1,
  6220. },
  6221. {
  6222. .name = LPASS_BE_SLIMBUS_5_RX,
  6223. .stream_name = "Slimbus5 Playback",
  6224. .cpu_dai_name = "msm-dai-q6-dev.16394",
  6225. .platform_name = "msm-pcm-routing",
  6226. .codec_name = "tavil_codec",
  6227. .codec_dai_name = "tavil_rx3",
  6228. .no_pcm = 1,
  6229. .dpcm_playback = 1,
  6230. .id = MSM_BACKEND_DAI_SLIMBUS_5_RX,
  6231. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6232. .ops = &msm_be_ops,
  6233. /* dai link has playback support */
  6234. .ignore_pmdown_time = 1,
  6235. .ignore_suspend = 1,
  6236. },
  6237. /* MAD BE */
  6238. {
  6239. .name = LPASS_BE_SLIMBUS_5_TX,
  6240. .stream_name = "Slimbus5 Capture",
  6241. .cpu_dai_name = "msm-dai-q6-dev.16395",
  6242. .platform_name = "msm-pcm-routing",
  6243. .codec_name = "tavil_codec",
  6244. .codec_dai_name = "tavil_mad1",
  6245. .no_pcm = 1,
  6246. .dpcm_capture = 1,
  6247. .id = MSM_BACKEND_DAI_SLIMBUS_5_TX,
  6248. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6249. .ops = &msm_be_ops,
  6250. .ignore_suspend = 1,
  6251. },
  6252. {
  6253. .name = LPASS_BE_SLIMBUS_6_RX,
  6254. .stream_name = "Slimbus6 Playback",
  6255. .cpu_dai_name = "msm-dai-q6-dev.16396",
  6256. .platform_name = "msm-pcm-routing",
  6257. .codec_name = "tavil_codec",
  6258. .codec_dai_name = "tavil_rx4",
  6259. .no_pcm = 1,
  6260. .dpcm_playback = 1,
  6261. .id = MSM_BACKEND_DAI_SLIMBUS_6_RX,
  6262. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6263. .ops = &msm_be_ops,
  6264. /* dai link has playback support */
  6265. .ignore_pmdown_time = 1,
  6266. .ignore_suspend = 1,
  6267. },
  6268. /* Slimbus VI Recording */
  6269. {
  6270. .name = LPASS_BE_SLIMBUS_TX_VI,
  6271. .stream_name = "Slimbus4 Capture",
  6272. .cpu_dai_name = "msm-dai-q6-dev.16393",
  6273. .platform_name = "msm-pcm-routing",
  6274. .codec_name = "tavil_codec",
  6275. .codec_dai_name = "tavil_vifeedback",
  6276. .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
  6277. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6278. .ops = &msm_be_ops,
  6279. .ignore_suspend = 1,
  6280. .no_pcm = 1,
  6281. .dpcm_capture = 1,
  6282. },
  6283. };
  6284. static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
  6285. {
  6286. .name = LPASS_BE_SLIMBUS_7_RX,
  6287. .stream_name = "Slimbus7 Playback",
  6288. .cpu_dai_name = "msm-dai-q6-dev.16398",
  6289. .platform_name = "msm-pcm-routing",
  6290. .codec_name = "btfmslim_slave",
  6291. /* BT codec driver determines capabilities based on
  6292. * dai name, bt codecdai name should always contains
  6293. * supported usecase information
  6294. */
  6295. .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
  6296. .no_pcm = 1,
  6297. .dpcm_playback = 1,
  6298. .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
  6299. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6300. .ops = &msm_wcn_ops,
  6301. /* dai link has playback support */
  6302. .ignore_pmdown_time = 1,
  6303. .ignore_suspend = 1,
  6304. },
  6305. {
  6306. .name = LPASS_BE_SLIMBUS_7_TX,
  6307. .stream_name = "Slimbus7 Capture",
  6308. .cpu_dai_name = "msm-dai-q6-dev.16399",
  6309. .platform_name = "msm-pcm-routing",
  6310. .codec_name = "btfmslim_slave",
  6311. .codec_dai_name = "btfm_bt_sco_slim_tx",
  6312. .no_pcm = 1,
  6313. .dpcm_capture = 1,
  6314. .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
  6315. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6316. .ops = &msm_wcn_ops,
  6317. .ignore_suspend = 1,
  6318. },
  6319. {
  6320. .name = LPASS_BE_SLIMBUS_8_TX,
  6321. .stream_name = "Slimbus8 Capture",
  6322. .cpu_dai_name = "msm-dai-q6-dev.16401",
  6323. .platform_name = "msm-pcm-routing",
  6324. .codec_name = "btfmslim_slave",
  6325. .codec_dai_name = "btfm_fm_slim_tx",
  6326. .no_pcm = 1,
  6327. .dpcm_capture = 1,
  6328. .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
  6329. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6330. .init = &msm_wcn_init,
  6331. .ops = &msm_wcn_ops,
  6332. .ignore_suspend = 1,
  6333. },
  6334. };
  6335. static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
  6336. /* DISP PORT BACK END DAI Link */
  6337. {
  6338. .name = LPASS_BE_DISPLAY_PORT,
  6339. .stream_name = "Display Port Playback",
  6340. .cpu_dai_name = "msm-dai-q6-dp.24608",
  6341. .platform_name = "msm-pcm-routing",
  6342. .codec_name = "msm-ext-disp-audio-codec-rx",
  6343. .codec_dai_name = "msm_dp_audio_codec_rx_dai",
  6344. .no_pcm = 1,
  6345. .dpcm_playback = 1,
  6346. .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
  6347. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6348. .ignore_pmdown_time = 1,
  6349. .ignore_suspend = 1,
  6350. },
  6351. };
  6352. static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
  6353. {
  6354. .name = LPASS_BE_PRI_MI2S_RX,
  6355. .stream_name = "Primary MI2S Playback",
  6356. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  6357. .platform_name = "msm-pcm-routing",
  6358. .codec_name = "msm-stub-codec.1",
  6359. .codec_dai_name = "msm-stub-rx",
  6360. .no_pcm = 1,
  6361. .dpcm_playback = 1,
  6362. .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
  6363. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6364. .ops = &msm_mi2s_be_ops,
  6365. .ignore_suspend = 1,
  6366. .ignore_pmdown_time = 1,
  6367. },
  6368. {
  6369. .name = LPASS_BE_PRI_MI2S_TX,
  6370. .stream_name = "Primary MI2S Capture",
  6371. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  6372. .platform_name = "msm-pcm-routing",
  6373. .codec_name = "msm-stub-codec.1",
  6374. .codec_dai_name = "msm-stub-tx",
  6375. .no_pcm = 1,
  6376. .dpcm_capture = 1,
  6377. .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
  6378. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6379. .ops = &msm_mi2s_be_ops,
  6380. .ignore_suspend = 1,
  6381. },
  6382. {
  6383. .name = LPASS_BE_SEC_MI2S_RX,
  6384. .stream_name = "Secondary MI2S Playback",
  6385. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  6386. .platform_name = "msm-pcm-routing",
  6387. .codec_name = "msm-stub-codec.1",
  6388. .codec_dai_name = "msm-stub-rx",
  6389. .no_pcm = 1,
  6390. .dpcm_playback = 1,
  6391. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
  6392. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6393. .ops = &msm_mi2s_be_ops,
  6394. .ignore_suspend = 1,
  6395. .ignore_pmdown_time = 1,
  6396. },
  6397. {
  6398. .name = LPASS_BE_SEC_MI2S_TX,
  6399. .stream_name = "Secondary MI2S Capture",
  6400. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  6401. .platform_name = "msm-pcm-routing",
  6402. .codec_name = "msm-stub-codec.1",
  6403. .codec_dai_name = "msm-stub-tx",
  6404. .no_pcm = 1,
  6405. .dpcm_capture = 1,
  6406. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
  6407. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6408. .ops = &msm_mi2s_be_ops,
  6409. .ignore_suspend = 1,
  6410. },
  6411. {
  6412. .name = LPASS_BE_TERT_MI2S_RX,
  6413. .stream_name = "Tertiary MI2S Playback",
  6414. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  6415. .platform_name = "msm-pcm-routing",
  6416. .codec_name = "msm-stub-codec.1",
  6417. .codec_dai_name = "msm-stub-rx",
  6418. .no_pcm = 1,
  6419. .dpcm_playback = 1,
  6420. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
  6421. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6422. .ops = &msm_mi2s_be_ops,
  6423. .ignore_suspend = 1,
  6424. .ignore_pmdown_time = 1,
  6425. },
  6426. {
  6427. .name = LPASS_BE_TERT_MI2S_TX,
  6428. .stream_name = "Tertiary MI2S Capture",
  6429. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  6430. .platform_name = "msm-pcm-routing",
  6431. .codec_name = "msm-stub-codec.1",
  6432. .codec_dai_name = "msm-stub-tx",
  6433. .no_pcm = 1,
  6434. .dpcm_capture = 1,
  6435. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
  6436. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6437. .ops = &msm_mi2s_be_ops,
  6438. .ignore_suspend = 1,
  6439. },
  6440. {
  6441. .name = LPASS_BE_QUAT_MI2S_RX,
  6442. .stream_name = "Quaternary MI2S Playback",
  6443. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  6444. .platform_name = "msm-pcm-routing",
  6445. .codec_name = "msm-stub-codec.1",
  6446. .codec_dai_name = "msm-stub-rx",
  6447. .no_pcm = 1,
  6448. .dpcm_playback = 1,
  6449. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
  6450. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6451. .ops = &msm_mi2s_be_ops,
  6452. .ignore_suspend = 1,
  6453. .ignore_pmdown_time = 1,
  6454. },
  6455. {
  6456. .name = LPASS_BE_QUAT_MI2S_TX,
  6457. .stream_name = "Quaternary MI2S Capture",
  6458. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  6459. .platform_name = "msm-pcm-routing",
  6460. .codec_name = "msm-stub-codec.1",
  6461. .codec_dai_name = "msm-stub-tx",
  6462. .no_pcm = 1,
  6463. .dpcm_capture = 1,
  6464. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
  6465. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6466. .ops = &msm_mi2s_be_ops,
  6467. .ignore_suspend = 1,
  6468. },
  6469. {
  6470. .name = LPASS_BE_QUIN_MI2S_RX,
  6471. .stream_name = "Quinary MI2S Playback",
  6472. .cpu_dai_name = "msm-dai-q6-mi2s.4",
  6473. .platform_name = "msm-pcm-routing",
  6474. .codec_name = "msm-stub-codec.1",
  6475. .codec_dai_name = "msm-stub-rx",
  6476. .no_pcm = 1,
  6477. .dpcm_playback = 1,
  6478. .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
  6479. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6480. .ops = &msm_mi2s_be_ops,
  6481. .ignore_suspend = 1,
  6482. .ignore_pmdown_time = 1,
  6483. },
  6484. {
  6485. .name = LPASS_BE_QUIN_MI2S_TX,
  6486. .stream_name = "Quinary MI2S Capture",
  6487. .cpu_dai_name = "msm-dai-q6-mi2s.4",
  6488. .platform_name = "msm-pcm-routing",
  6489. .codec_name = "msm-stub-codec.1",
  6490. .codec_dai_name = "msm-stub-tx",
  6491. .no_pcm = 1,
  6492. .dpcm_capture = 1,
  6493. .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
  6494. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6495. .ops = &msm_mi2s_be_ops,
  6496. .ignore_suspend = 1,
  6497. },
  6498. };
  6499. static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
  6500. /* Primary AUX PCM Backend DAI Links */
  6501. {
  6502. .name = LPASS_BE_AUXPCM_RX,
  6503. .stream_name = "AUX PCM Playback",
  6504. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  6505. .platform_name = "msm-pcm-routing",
  6506. .codec_name = "msm-stub-codec.1",
  6507. .codec_dai_name = "msm-stub-rx",
  6508. .no_pcm = 1,
  6509. .dpcm_playback = 1,
  6510. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  6511. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6512. .ignore_pmdown_time = 1,
  6513. .ignore_suspend = 1,
  6514. },
  6515. {
  6516. .name = LPASS_BE_AUXPCM_TX,
  6517. .stream_name = "AUX PCM Capture",
  6518. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  6519. .platform_name = "msm-pcm-routing",
  6520. .codec_name = "msm-stub-codec.1",
  6521. .codec_dai_name = "msm-stub-tx",
  6522. .no_pcm = 1,
  6523. .dpcm_capture = 1,
  6524. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  6525. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6526. .ignore_suspend = 1,
  6527. },
  6528. /* Secondary AUX PCM Backend DAI Links */
  6529. {
  6530. .name = LPASS_BE_SEC_AUXPCM_RX,
  6531. .stream_name = "Sec AUX PCM Playback",
  6532. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  6533. .platform_name = "msm-pcm-routing",
  6534. .codec_name = "msm-stub-codec.1",
  6535. .codec_dai_name = "msm-stub-rx",
  6536. .no_pcm = 1,
  6537. .dpcm_playback = 1,
  6538. .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
  6539. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6540. .ignore_pmdown_time = 1,
  6541. .ignore_suspend = 1,
  6542. },
  6543. {
  6544. .name = LPASS_BE_SEC_AUXPCM_TX,
  6545. .stream_name = "Sec AUX PCM Capture",
  6546. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  6547. .platform_name = "msm-pcm-routing",
  6548. .codec_name = "msm-stub-codec.1",
  6549. .codec_dai_name = "msm-stub-tx",
  6550. .no_pcm = 1,
  6551. .dpcm_capture = 1,
  6552. .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
  6553. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6554. .ignore_suspend = 1,
  6555. },
  6556. /* Tertiary AUX PCM Backend DAI Links */
  6557. {
  6558. .name = LPASS_BE_TERT_AUXPCM_RX,
  6559. .stream_name = "Tert AUX PCM Playback",
  6560. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  6561. .platform_name = "msm-pcm-routing",
  6562. .codec_name = "msm-stub-codec.1",
  6563. .codec_dai_name = "msm-stub-rx",
  6564. .no_pcm = 1,
  6565. .dpcm_playback = 1,
  6566. .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
  6567. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6568. .ignore_suspend = 1,
  6569. },
  6570. {
  6571. .name = LPASS_BE_TERT_AUXPCM_TX,
  6572. .stream_name = "Tert AUX PCM Capture",
  6573. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  6574. .platform_name = "msm-pcm-routing",
  6575. .codec_name = "msm-stub-codec.1",
  6576. .codec_dai_name = "msm-stub-tx",
  6577. .no_pcm = 1,
  6578. .dpcm_capture = 1,
  6579. .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
  6580. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6581. .ignore_suspend = 1,
  6582. },
  6583. /* Quaternary AUX PCM Backend DAI Links */
  6584. {
  6585. .name = LPASS_BE_QUAT_AUXPCM_RX,
  6586. .stream_name = "Quat AUX PCM Playback",
  6587. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  6588. .platform_name = "msm-pcm-routing",
  6589. .codec_name = "msm-stub-codec.1",
  6590. .codec_dai_name = "msm-stub-rx",
  6591. .no_pcm = 1,
  6592. .dpcm_playback = 1,
  6593. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
  6594. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6595. .ignore_pmdown_time = 1,
  6596. .ignore_suspend = 1,
  6597. },
  6598. {
  6599. .name = LPASS_BE_QUAT_AUXPCM_TX,
  6600. .stream_name = "Quat AUX PCM Capture",
  6601. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  6602. .platform_name = "msm-pcm-routing",
  6603. .codec_name = "msm-stub-codec.1",
  6604. .codec_dai_name = "msm-stub-tx",
  6605. .no_pcm = 1,
  6606. .dpcm_capture = 1,
  6607. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
  6608. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6609. .ignore_suspend = 1,
  6610. },
  6611. /* Quinary AUX PCM Backend DAI Links */
  6612. {
  6613. .name = LPASS_BE_QUIN_AUXPCM_RX,
  6614. .stream_name = "Quin AUX PCM Playback",
  6615. .cpu_dai_name = "msm-dai-q6-auxpcm.5",
  6616. .platform_name = "msm-pcm-routing",
  6617. .codec_name = "msm-stub-codec.1",
  6618. .codec_dai_name = "msm-stub-rx",
  6619. .no_pcm = 1,
  6620. .dpcm_playback = 1,
  6621. .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
  6622. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6623. .ignore_pmdown_time = 1,
  6624. .ignore_suspend = 1,
  6625. },
  6626. {
  6627. .name = LPASS_BE_QUIN_AUXPCM_TX,
  6628. .stream_name = "Quin AUX PCM Capture",
  6629. .cpu_dai_name = "msm-dai-q6-auxpcm.5",
  6630. .platform_name = "msm-pcm-routing",
  6631. .codec_name = "msm-stub-codec.1",
  6632. .codec_dai_name = "msm-stub-tx",
  6633. .no_pcm = 1,
  6634. .dpcm_capture = 1,
  6635. .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
  6636. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6637. .ignore_suspend = 1,
  6638. },
  6639. };
  6640. static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
  6641. /* WSA CDC DMA Backend DAI Links */
  6642. {
  6643. .name = LPASS_BE_WSA_CDC_DMA_RX_0,
  6644. .stream_name = "WSA CDC DMA0 Playback",
  6645. .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
  6646. .platform_name = "msm-pcm-routing",
  6647. .codec_name = "bolero_codec",
  6648. .codec_dai_name = "wsa_macro_rx1",
  6649. .no_pcm = 1,
  6650. .dpcm_playback = 1,
  6651. .init = &msm_int_audrx_init,
  6652. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
  6653. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6654. .ignore_pmdown_time = 1,
  6655. .ignore_suspend = 1,
  6656. .ops = &msm_cdc_dma_be_ops,
  6657. },
  6658. {
  6659. .name = LPASS_BE_WSA_CDC_DMA_RX_1,
  6660. .stream_name = "WSA CDC DMA1 Playback",
  6661. .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
  6662. .platform_name = "msm-pcm-routing",
  6663. .codec_name = "bolero_codec",
  6664. .codec_dai_name = "wsa_macro_rx_mix",
  6665. .no_pcm = 1,
  6666. .dpcm_playback = 1,
  6667. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
  6668. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6669. .ignore_pmdown_time = 1,
  6670. .ignore_suspend = 1,
  6671. .ops = &msm_cdc_dma_be_ops,
  6672. },
  6673. {
  6674. .name = LPASS_BE_WSA_CDC_DMA_TX_1,
  6675. .stream_name = "WSA CDC DMA1 Capture",
  6676. .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
  6677. .platform_name = "msm-pcm-routing",
  6678. .codec_name = "bolero_codec",
  6679. .codec_dai_name = "wsa_macro_echo",
  6680. .no_pcm = 1,
  6681. .dpcm_capture = 1,
  6682. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
  6683. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6684. .ignore_suspend = 1,
  6685. .ops = &msm_cdc_dma_be_ops,
  6686. },
  6687. };
  6688. static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
  6689. /* RX CDC DMA Backend DAI Links */
  6690. {
  6691. .name = LPASS_BE_RX_CDC_DMA_RX_0,
  6692. .stream_name = "RX CDC DMA0 Playback",
  6693. .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
  6694. .platform_name = "msm-pcm-routing",
  6695. .codec_name = "bolero_codec",
  6696. .codec_dai_name = "rx_macro_rx1",
  6697. .no_pcm = 1,
  6698. .dpcm_playback = 1,
  6699. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
  6700. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6701. .ignore_pmdown_time = 1,
  6702. .ignore_suspend = 1,
  6703. .ops = &msm_cdc_dma_be_ops,
  6704. },
  6705. {
  6706. .name = LPASS_BE_RX_CDC_DMA_RX_1,
  6707. .stream_name = "RX CDC DMA1 Playback",
  6708. .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
  6709. .platform_name = "msm-pcm-routing",
  6710. .codec_name = "bolero_codec",
  6711. .codec_dai_name = "rx_macro_rx2",
  6712. .no_pcm = 1,
  6713. .dpcm_playback = 1,
  6714. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
  6715. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6716. .ignore_pmdown_time = 1,
  6717. .ignore_suspend = 1,
  6718. .ops = &msm_cdc_dma_be_ops,
  6719. },
  6720. {
  6721. .name = LPASS_BE_RX_CDC_DMA_RX_2,
  6722. .stream_name = "RX CDC DMA2 Playback",
  6723. .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
  6724. .platform_name = "msm-pcm-routing",
  6725. .codec_name = "bolero_codec",
  6726. .codec_dai_name = "rx_macro_rx3",
  6727. .no_pcm = 1,
  6728. .dpcm_playback = 1,
  6729. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
  6730. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6731. .ignore_pmdown_time = 1,
  6732. .ignore_suspend = 1,
  6733. .ops = &msm_cdc_dma_be_ops,
  6734. },
  6735. {
  6736. .name = LPASS_BE_RX_CDC_DMA_RX_3,
  6737. .stream_name = "RX CDC DMA3 Playback",
  6738. .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
  6739. .platform_name = "msm-pcm-routing",
  6740. .codec_name = "bolero_codec",
  6741. .codec_dai_name = "rx_macro_rx4",
  6742. .no_pcm = 1,
  6743. .dpcm_playback = 1,
  6744. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
  6745. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6746. .ignore_pmdown_time = 1,
  6747. .ignore_suspend = 1,
  6748. .ops = &msm_cdc_dma_be_ops,
  6749. },
  6750. /* TX CDC DMA Backend DAI Links */
  6751. {
  6752. .name = LPASS_BE_TX_CDC_DMA_TX_3,
  6753. .stream_name = "TX CDC DMA3 Capture",
  6754. .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
  6755. .platform_name = "msm-pcm-routing",
  6756. .codec_name = "bolero_codec",
  6757. .codec_dai_name = "tx_macro_tx1",
  6758. .no_pcm = 1,
  6759. .dpcm_capture = 1,
  6760. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
  6761. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6762. .ignore_suspend = 1,
  6763. .ops = &msm_cdc_dma_be_ops,
  6764. },
  6765. {
  6766. .name = LPASS_BE_TX_CDC_DMA_TX_4,
  6767. .stream_name = "TX CDC DMA4 Capture",
  6768. .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
  6769. .platform_name = "msm-pcm-routing",
  6770. .codec_name = "bolero_codec",
  6771. .codec_dai_name = "tx_macro_tx2",
  6772. .no_pcm = 1,
  6773. .dpcm_capture = 1,
  6774. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
  6775. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6776. .ignore_suspend = 1,
  6777. .ops = &msm_cdc_dma_be_ops,
  6778. },
  6779. };
  6780. static struct snd_soc_dai_link msm_sm6150_dai_links[
  6781. ARRAY_SIZE(msm_common_dai_links) +
  6782. ARRAY_SIZE(msm_tavil_fe_dai_links) +
  6783. ARRAY_SIZE(msm_bolero_fe_dai_links) +
  6784. ARRAY_SIZE(msm_common_misc_fe_dai_links) +
  6785. ARRAY_SIZE(msm_common_be_dai_links) +
  6786. ARRAY_SIZE(msm_tavil_be_dai_links) +
  6787. ARRAY_SIZE(msm_wcn_be_dai_links) +
  6788. ARRAY_SIZE(ext_disp_be_dai_link) +
  6789. ARRAY_SIZE(msm_mi2s_be_dai_links) +
  6790. ARRAY_SIZE(msm_auxpcm_be_dai_links) +
  6791. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
  6792. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links)];
  6793. static int msm_snd_card_tavil_late_probe(struct snd_soc_card *card)
  6794. {
  6795. const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
  6796. struct snd_soc_pcm_runtime *rtd;
  6797. int ret = 0;
  6798. void *mbhc_calibration;
  6799. rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
  6800. if (!rtd) {
  6801. dev_err(card->dev,
  6802. "%s: snd_soc_get_pcm_runtime for %s failed!\n",
  6803. __func__, be_dl_name);
  6804. ret = -EINVAL;
  6805. goto err_pcm_runtime;
  6806. }
  6807. mbhc_calibration = def_wcd_mbhc_cal();
  6808. if (!mbhc_calibration) {
  6809. ret = -ENOMEM;
  6810. goto err_mbhc_cal;
  6811. }
  6812. wcd_mbhc_cfg.calibration = mbhc_calibration;
  6813. ret = tavil_mbhc_hs_detect(rtd->codec, &wcd_mbhc_cfg);
  6814. if (ret) {
  6815. dev_err(card->dev, "%s: mbhc hs detect failed, err:%d\n",
  6816. __func__, ret);
  6817. goto err_hs_detect;
  6818. }
  6819. return 0;
  6820. err_hs_detect:
  6821. kfree(mbhc_calibration);
  6822. err_mbhc_cal:
  6823. err_pcm_runtime:
  6824. return ret;
  6825. }
  6826. static int msm_populate_dai_link_component_of_node(
  6827. struct snd_soc_card *card)
  6828. {
  6829. int i, index, ret = 0;
  6830. struct device *cdev = card->dev;
  6831. struct snd_soc_dai_link *dai_link = card->dai_link;
  6832. struct device_node *np;
  6833. if (!cdev) {
  6834. pr_err("%s: Sound card device memory NULL\n", __func__);
  6835. return -ENODEV;
  6836. }
  6837. for (i = 0; i < card->num_links; i++) {
  6838. if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
  6839. continue;
  6840. /* populate platform_of_node for snd card dai links */
  6841. if (dai_link[i].platform_name &&
  6842. !dai_link[i].platform_of_node) {
  6843. index = of_property_match_string(cdev->of_node,
  6844. "asoc-platform-names",
  6845. dai_link[i].platform_name);
  6846. if (index < 0) {
  6847. pr_err("%s: No match found for platform name: %s\n",
  6848. __func__, dai_link[i].platform_name);
  6849. ret = index;
  6850. goto err;
  6851. }
  6852. np = of_parse_phandle(cdev->of_node, "asoc-platform",
  6853. index);
  6854. if (!np) {
  6855. pr_err("%s: retrieving phandle for platform %s, index %d failed\n",
  6856. __func__, dai_link[i].platform_name,
  6857. index);
  6858. ret = -ENODEV;
  6859. goto err;
  6860. }
  6861. dai_link[i].platform_of_node = np;
  6862. dai_link[i].platform_name = NULL;
  6863. }
  6864. /* populate cpu_of_node for snd card dai links */
  6865. if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
  6866. index = of_property_match_string(cdev->of_node,
  6867. "asoc-cpu-names",
  6868. dai_link[i].cpu_dai_name);
  6869. if (index >= 0) {
  6870. np = of_parse_phandle(cdev->of_node, "asoc-cpu",
  6871. index);
  6872. if (!np) {
  6873. pr_err("%s: retrieving phandle for cpu dai %s failed\n",
  6874. __func__,
  6875. dai_link[i].cpu_dai_name);
  6876. ret = -ENODEV;
  6877. goto err;
  6878. }
  6879. dai_link[i].cpu_of_node = np;
  6880. dai_link[i].cpu_dai_name = NULL;
  6881. }
  6882. }
  6883. /* populate codec_of_node for snd card dai links */
  6884. if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
  6885. index = of_property_match_string(cdev->of_node,
  6886. "asoc-codec-names",
  6887. dai_link[i].codec_name);
  6888. if (index < 0)
  6889. continue;
  6890. np = of_parse_phandle(cdev->of_node, "asoc-codec",
  6891. index);
  6892. if (!np) {
  6893. pr_err("%s: retrieving phandle for codec %s failed\n",
  6894. __func__, dai_link[i].codec_name);
  6895. ret = -ENODEV;
  6896. goto err;
  6897. }
  6898. dai_link[i].codec_of_node = np;
  6899. dai_link[i].codec_name = NULL;
  6900. }
  6901. }
  6902. err:
  6903. return ret;
  6904. }
  6905. static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
  6906. {
  6907. int ret = 0;
  6908. struct snd_soc_codec *codec = rtd->codec;
  6909. ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
  6910. ARRAY_SIZE(msm_tavil_snd_controls));
  6911. if (ret < 0) {
  6912. dev_err(codec->dev,
  6913. "%s: add_codec_controls failed, err = %d\n",
  6914. __func__, ret);
  6915. return ret;
  6916. }
  6917. return 0;
  6918. }
  6919. static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
  6920. struct snd_pcm_hw_params *params)
  6921. {
  6922. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  6923. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  6924. int ret = 0;
  6925. unsigned int rx_ch[] = {144, 145, 146, 147, 148, 149, 150,
  6926. 151};
  6927. unsigned int tx_ch[] = {128, 129, 130, 131, 132, 133,
  6928. 134, 135, 136, 137, 138, 139,
  6929. 140, 141, 142, 143};
  6930. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  6931. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  6932. slim_rx_cfg[SLIM_RX_0].channels,
  6933. rx_ch);
  6934. if (ret < 0)
  6935. pr_err("%s: RX failed to set cpu chan map error %d\n",
  6936. __func__, ret);
  6937. } else {
  6938. ret = snd_soc_dai_set_channel_map(cpu_dai,
  6939. slim_tx_cfg[SLIM_TX_0].channels,
  6940. tx_ch, 0, 0);
  6941. if (ret < 0)
  6942. pr_err("%s: TX failed to set cpu chan map error %d\n",
  6943. __func__, ret);
  6944. }
  6945. return ret;
  6946. }
  6947. static struct snd_soc_ops msm_stub_be_ops = {
  6948. .hw_params = msm_snd_stub_hw_params,
  6949. };
  6950. static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
  6951. /* FrontEnd DAI Links */
  6952. {
  6953. .name = "MSMSTUB Media1",
  6954. .stream_name = "MultiMedia1",
  6955. .cpu_dai_name = "MultiMedia1",
  6956. .platform_name = "msm-pcm-dsp.0",
  6957. .dynamic = 1,
  6958. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  6959. .dpcm_playback = 1,
  6960. .dpcm_capture = 1,
  6961. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  6962. SND_SOC_DPCM_TRIGGER_POST},
  6963. .codec_dai_name = "snd-soc-dummy-dai",
  6964. .codec_name = "snd-soc-dummy",
  6965. .ignore_suspend = 1,
  6966. /* this dainlink has playback support */
  6967. .ignore_pmdown_time = 1,
  6968. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  6969. },
  6970. };
  6971. static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
  6972. /* Backend DAI Links */
  6973. {
  6974. .name = LPASS_BE_SLIMBUS_0_RX,
  6975. .stream_name = "Slimbus Playback",
  6976. .cpu_dai_name = "msm-dai-q6-dev.16384",
  6977. .platform_name = "msm-pcm-routing",
  6978. .codec_name = "msm-stub-codec.1",
  6979. .codec_dai_name = "msm-stub-rx",
  6980. .no_pcm = 1,
  6981. .dpcm_playback = 1,
  6982. .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
  6983. .init = &msm_audrx_stub_init,
  6984. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6985. .ignore_pmdown_time = 1, /* dai link has playback support */
  6986. .ignore_suspend = 1,
  6987. .ops = &msm_stub_be_ops,
  6988. },
  6989. {
  6990. .name = LPASS_BE_SLIMBUS_0_TX,
  6991. .stream_name = "Slimbus Capture",
  6992. .cpu_dai_name = "msm-dai-q6-dev.16385",
  6993. .platform_name = "msm-pcm-routing",
  6994. .codec_name = "msm-stub-codec.1",
  6995. .codec_dai_name = "msm-stub-tx",
  6996. .no_pcm = 1,
  6997. .dpcm_capture = 1,
  6998. .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
  6999. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7000. .ignore_suspend = 1,
  7001. .ops = &msm_stub_be_ops,
  7002. },
  7003. };
  7004. static struct snd_soc_dai_link msm_stub_dai_links[
  7005. ARRAY_SIZE(msm_stub_fe_dai_links) +
  7006. ARRAY_SIZE(msm_stub_be_dai_links)];
  7007. struct snd_soc_card snd_soc_card_stub_msm = {
  7008. .name = "sm6150-stub-snd-card",
  7009. };
  7010. static const struct of_device_id sm6150_asoc_machine_of_match[] = {
  7011. { .compatible = "qcom,sm6150-asoc-snd",
  7012. .data = "codec"},
  7013. { .compatible = "qcom,sm6150-asoc-snd-stub",
  7014. .data = "stub_codec"},
  7015. {},
  7016. };
  7017. static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
  7018. {
  7019. struct snd_soc_card *card = NULL;
  7020. struct snd_soc_dai_link *dailink;
  7021. int total_links = 0, rc = 0;
  7022. u32 tavil_codec = 0, auxpcm_audio_intf = 0;
  7023. u32 mi2s_audio_intf = 0, ext_disp_audio_intf = 0;
  7024. u32 wcn_btfm_intf = 0;
  7025. const struct of_device_id *match;
  7026. match = of_match_node(sm6150_asoc_machine_of_match, dev->of_node);
  7027. if (!match) {
  7028. dev_err(dev, "%s: No DT match found for sound card\n",
  7029. __func__);
  7030. return NULL;
  7031. }
  7032. if (!strcmp(match->data, "codec")) {
  7033. card = &snd_soc_card_sm6150_msm;
  7034. memcpy(msm_sm6150_dai_links + total_links,
  7035. msm_common_dai_links,
  7036. sizeof(msm_common_dai_links));
  7037. total_links += ARRAY_SIZE(msm_common_dai_links);
  7038. memcpy(msm_sm6150_dai_links + total_links,
  7039. msm_common_misc_fe_dai_links,
  7040. sizeof(msm_common_misc_fe_dai_links));
  7041. total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
  7042. rc = of_property_read_u32(dev->of_node, "qcom,tavil_codec",
  7043. &tavil_codec);
  7044. if (rc) {
  7045. dev_dbg(dev, "%s: No DT match for tavil codec\n",
  7046. __func__);
  7047. } else {
  7048. if (tavil_codec) {
  7049. card->late_probe =
  7050. msm_snd_card_tavil_late_probe;
  7051. memcpy(msm_sm6150_dai_links + total_links,
  7052. msm_tavil_fe_dai_links,
  7053. sizeof(msm_tavil_fe_dai_links));
  7054. total_links +=
  7055. ARRAY_SIZE(msm_tavil_fe_dai_links);
  7056. }
  7057. }
  7058. if (!tavil_codec) {
  7059. memcpy(msm_sm6150_dai_links + total_links,
  7060. msm_bolero_fe_dai_links,
  7061. sizeof(msm_bolero_fe_dai_links));
  7062. total_links +=
  7063. ARRAY_SIZE(msm_bolero_fe_dai_links);
  7064. }
  7065. memcpy(msm_sm6150_dai_links + total_links,
  7066. msm_common_be_dai_links,
  7067. sizeof(msm_common_be_dai_links));
  7068. total_links += ARRAY_SIZE(msm_common_be_dai_links);
  7069. if (tavil_codec) {
  7070. memcpy(msm_sm6150_dai_links + total_links,
  7071. msm_tavil_be_dai_links,
  7072. sizeof(msm_tavil_be_dai_links));
  7073. total_links += ARRAY_SIZE(msm_tavil_be_dai_links);
  7074. } else {
  7075. memcpy(msm_sm6150_dai_links + total_links,
  7076. msm_wsa_cdc_dma_be_dai_links,
  7077. sizeof(msm_wsa_cdc_dma_be_dai_links));
  7078. total_links +=
  7079. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
  7080. memcpy(msm_sm6150_dai_links + total_links,
  7081. msm_rx_tx_cdc_dma_be_dai_links,
  7082. sizeof(msm_rx_tx_cdc_dma_be_dai_links));
  7083. total_links +=
  7084. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
  7085. }
  7086. rc = of_property_read_u32(dev->of_node,
  7087. "qcom,ext-disp-audio-rx",
  7088. &ext_disp_audio_intf);
  7089. if (rc) {
  7090. dev_dbg(dev, "%s: No DT match Ext Disp interface\n",
  7091. __func__);
  7092. } else {
  7093. if (auxpcm_audio_intf) {
  7094. memcpy(msm_sm6150_dai_links + total_links,
  7095. ext_disp_be_dai_link,
  7096. sizeof(ext_disp_be_dai_link));
  7097. total_links +=
  7098. ARRAY_SIZE(ext_disp_be_dai_link);
  7099. }
  7100. }
  7101. rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
  7102. &mi2s_audio_intf);
  7103. if (rc) {
  7104. dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
  7105. __func__);
  7106. } else {
  7107. if (mi2s_audio_intf) {
  7108. memcpy(msm_sm6150_dai_links + total_links,
  7109. msm_mi2s_be_dai_links,
  7110. sizeof(msm_mi2s_be_dai_links));
  7111. total_links +=
  7112. ARRAY_SIZE(msm_mi2s_be_dai_links);
  7113. }
  7114. }
  7115. rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
  7116. &wcn_btfm_intf);
  7117. if (rc) {
  7118. dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
  7119. __func__);
  7120. } else {
  7121. if (wcn_btfm_intf) {
  7122. memcpy(msm_sm6150_dai_links + total_links,
  7123. msm_wcn_be_dai_links,
  7124. sizeof(msm_wcn_be_dai_links));
  7125. total_links +=
  7126. ARRAY_SIZE(msm_wcn_be_dai_links);
  7127. }
  7128. }
  7129. rc = of_property_read_u32(dev->of_node,
  7130. "qcom,auxpcm-audio-intf",
  7131. &auxpcm_audio_intf);
  7132. if (rc) {
  7133. dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
  7134. __func__);
  7135. } else {
  7136. if (auxpcm_audio_intf) {
  7137. memcpy(msm_sm6150_dai_links + total_links,
  7138. msm_auxpcm_be_dai_links,
  7139. sizeof(msm_auxpcm_be_dai_links));
  7140. total_links +=
  7141. ARRAY_SIZE(msm_auxpcm_be_dai_links);
  7142. }
  7143. }
  7144. dailink = msm_sm6150_dai_links;
  7145. } else if (!strcmp(match->data, "stub_codec")) {
  7146. card = &snd_soc_card_stub_msm;
  7147. memcpy(msm_stub_dai_links + total_links,
  7148. msm_stub_fe_dai_links,
  7149. sizeof(msm_stub_fe_dai_links));
  7150. total_links += ARRAY_SIZE(msm_stub_fe_dai_links);
  7151. memcpy(msm_stub_dai_links + total_links,
  7152. msm_stub_be_dai_links,
  7153. sizeof(msm_stub_be_dai_links));
  7154. total_links += ARRAY_SIZE(msm_stub_be_dai_links);
  7155. dailink = msm_stub_dai_links;
  7156. }
  7157. if (card) {
  7158. card->dai_link = dailink;
  7159. card->num_links = total_links;
  7160. }
  7161. return card;
  7162. }
  7163. static int msm_wsa881x_init(struct snd_soc_component *component)
  7164. {
  7165. u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  7166. u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  7167. u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
  7168. SPKR_L_BOOST, SPKR_L_VI};
  7169. u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
  7170. SPKR_R_BOOST, SPKR_R_VI};
  7171. unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
  7172. unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
  7173. struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
  7174. struct msm_asoc_mach_data *pdata;
  7175. struct snd_soc_dapm_context *dapm;
  7176. int ret = 0;
  7177. if (!codec) {
  7178. pr_err("%s codec is NULL\n", __func__);
  7179. return -EINVAL;
  7180. }
  7181. dapm = snd_soc_codec_get_dapm(codec);
  7182. if (!strcmp(component->name_prefix, "SpkrLeft")) {
  7183. dev_dbg(codec->dev, "%s: setting left ch map to codec %s\n",
  7184. __func__, codec->component.name);
  7185. wsa881x_set_channel_map(codec, &spkleft_ports[0],
  7186. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  7187. &ch_rate[0], &spkleft_port_types[0]);
  7188. if (dapm->component) {
  7189. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
  7190. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
  7191. }
  7192. } else if (!strcmp(component->name_prefix, "SpkrRight")) {
  7193. dev_dbg(codec->dev, "%s: setting right ch map to codec %s\n",
  7194. __func__, codec->component.name);
  7195. wsa881x_set_channel_map(codec, &spkright_ports[0],
  7196. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  7197. &ch_rate[0], &spkright_port_types[0]);
  7198. if (dapm->component) {
  7199. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
  7200. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
  7201. }
  7202. } else {
  7203. dev_err(codec->dev, "%s: wrong codec name %s\n", __func__,
  7204. codec->component.name);
  7205. ret = -EINVAL;
  7206. goto err;
  7207. }
  7208. pdata = snd_soc_card_get_drvdata(component->card);
  7209. if (pdata && pdata->codec_root)
  7210. wsa881x_codec_info_create_codec_entry(pdata->codec_root,
  7211. codec);
  7212. err:
  7213. return ret;
  7214. }
  7215. static int msm_aux_codec_init(struct snd_soc_component *component)
  7216. {
  7217. struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
  7218. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  7219. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  7220. snd_soc_dapm_ignore_suspend(dapm, "AUX");
  7221. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  7222. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  7223. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  7224. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  7225. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  7226. snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
  7227. snd_soc_dapm_sync(dapm);
  7228. return 0;
  7229. }
  7230. static int msm_init_aux_dev(struct platform_device *pdev,
  7231. struct snd_soc_card *card)
  7232. {
  7233. struct device_node *wsa_of_node;
  7234. struct device_node *aux_codec_of_node;
  7235. u32 wsa_max_devs;
  7236. u32 wsa_dev_cnt;
  7237. u32 codec_aux_dev_cnt = 0;
  7238. int i;
  7239. struct msm_wsa881x_dev_info *wsa881x_dev_info;
  7240. struct aux_codec_dev_info *aux_cdc_dev_info;
  7241. const char *auxdev_name_prefix[1];
  7242. char *dev_name_str = NULL;
  7243. int found = 0;
  7244. int codecs_found = 0;
  7245. int ret = 0;
  7246. /* Get maximum WSA device count for this platform */
  7247. ret = of_property_read_u32(pdev->dev.of_node,
  7248. "qcom,wsa-max-devs", &wsa_max_devs);
  7249. if (ret) {
  7250. dev_info(&pdev->dev,
  7251. "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
  7252. __func__, pdev->dev.of_node->full_name, ret);
  7253. wsa_max_devs = 0;
  7254. goto codec_aux_dev;
  7255. }
  7256. if (wsa_max_devs == 0) {
  7257. dev_warn(&pdev->dev,
  7258. "%s: Max WSA devices is 0 for this target?\n",
  7259. __func__);
  7260. goto codec_aux_dev;
  7261. }
  7262. /* Get count of WSA device phandles for this platform */
  7263. wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
  7264. "qcom,wsa-devs", NULL);
  7265. if (wsa_dev_cnt == -ENOENT) {
  7266. dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
  7267. __func__);
  7268. goto err;
  7269. } else if (wsa_dev_cnt <= 0) {
  7270. dev_err(&pdev->dev,
  7271. "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
  7272. __func__, wsa_dev_cnt);
  7273. ret = -EINVAL;
  7274. goto err;
  7275. }
  7276. /*
  7277. * Expect total phandles count to be NOT less than maximum possible
  7278. * WSA count. However, if it is less, then assign same value to
  7279. * max count as well.
  7280. */
  7281. if (wsa_dev_cnt < wsa_max_devs) {
  7282. dev_dbg(&pdev->dev,
  7283. "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
  7284. __func__, wsa_max_devs, wsa_dev_cnt);
  7285. wsa_max_devs = wsa_dev_cnt;
  7286. }
  7287. /* Make sure prefix string passed for each WSA device */
  7288. ret = of_property_count_strings(pdev->dev.of_node,
  7289. "qcom,wsa-aux-dev-prefix");
  7290. if (ret != wsa_dev_cnt) {
  7291. dev_err(&pdev->dev,
  7292. "%s: expecting %d wsa prefix. Defined only %d in DT\n",
  7293. __func__, wsa_dev_cnt, ret);
  7294. ret = -EINVAL;
  7295. goto err;
  7296. }
  7297. /*
  7298. * Alloc mem to store phandle and index info of WSA device, if already
  7299. * registered with ALSA core
  7300. */
  7301. wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
  7302. sizeof(struct msm_wsa881x_dev_info),
  7303. GFP_KERNEL);
  7304. if (!wsa881x_dev_info) {
  7305. ret = -ENOMEM;
  7306. goto err;
  7307. }
  7308. /*
  7309. * search and check whether all WSA devices are already
  7310. * registered with ALSA core or not. If found a node, store
  7311. * the node and the index in a local array of struct for later
  7312. * use.
  7313. */
  7314. for (i = 0; i < wsa_dev_cnt; i++) {
  7315. wsa_of_node = of_parse_phandle(pdev->dev.of_node,
  7316. "qcom,wsa-devs", i);
  7317. if (unlikely(!wsa_of_node)) {
  7318. /* we should not be here */
  7319. dev_err(&pdev->dev,
  7320. "%s: wsa dev node is not present\n",
  7321. __func__);
  7322. ret = -EINVAL;
  7323. goto err;
  7324. }
  7325. if (soc_find_component(wsa_of_node, NULL)) {
  7326. /* WSA device registered with ALSA core */
  7327. wsa881x_dev_info[found].of_node = wsa_of_node;
  7328. wsa881x_dev_info[found].index = i;
  7329. found++;
  7330. if (found == wsa_max_devs)
  7331. break;
  7332. }
  7333. }
  7334. if (found < wsa_max_devs) {
  7335. dev_dbg(&pdev->dev,
  7336. "%s: failed to find %d components. Found only %d\n",
  7337. __func__, wsa_max_devs, found);
  7338. return -EPROBE_DEFER;
  7339. }
  7340. dev_info(&pdev->dev,
  7341. "%s: found %d wsa881x devices registered with ALSA core\n",
  7342. __func__, found);
  7343. codec_aux_dev:
  7344. if (strcmp(card->name, "sm6150-tavil-snd-card")) {
  7345. /* Get count of aux codec device phandles for this platform */
  7346. codec_aux_dev_cnt = of_count_phandle_with_args(
  7347. pdev->dev.of_node,
  7348. "qcom,codec-aux-devs", NULL);
  7349. if (codec_aux_dev_cnt == -ENOENT) {
  7350. dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
  7351. __func__);
  7352. goto err;
  7353. } else if (codec_aux_dev_cnt <= 0) {
  7354. dev_err(&pdev->dev,
  7355. "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
  7356. __func__, codec_aux_dev_cnt);
  7357. ret = -EINVAL;
  7358. goto err;
  7359. }
  7360. /*
  7361. * Alloc mem to store phandle and index info of aux codec
  7362. * if already registered with ALSA core
  7363. */
  7364. aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
  7365. sizeof(struct aux_codec_dev_info),
  7366. GFP_KERNEL);
  7367. if (!aux_cdc_dev_info) {
  7368. ret = -ENOMEM;
  7369. goto err;
  7370. }
  7371. /*
  7372. * search and check whether all aux codecs are already
  7373. * registered with ALSA core or not. If found a node, store
  7374. * the node and the index in a local array of struct for later
  7375. * use.
  7376. */
  7377. for (i = 0; i < codec_aux_dev_cnt; i++) {
  7378. aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
  7379. "qcom,codec-aux-devs", i);
  7380. if (unlikely(!aux_codec_of_node)) {
  7381. /* we should not be here */
  7382. dev_err(&pdev->dev,
  7383. "%s: aux codec dev node is not present\n",
  7384. __func__);
  7385. ret = -EINVAL;
  7386. goto err;
  7387. }
  7388. if (soc_find_component(aux_codec_of_node, NULL)) {
  7389. /* AUX codec registered with ALSA core */
  7390. aux_cdc_dev_info[codecs_found].of_node =
  7391. aux_codec_of_node;
  7392. aux_cdc_dev_info[codecs_found].index = i;
  7393. codecs_found++;
  7394. }
  7395. }
  7396. if (codecs_found < codec_aux_dev_cnt) {
  7397. dev_dbg(&pdev->dev,
  7398. "%s: failed to find %d components. Found only %d\n",
  7399. __func__, codec_aux_dev_cnt, codecs_found);
  7400. return -EPROBE_DEFER;
  7401. }
  7402. dev_info(&pdev->dev,
  7403. "%s: found %d AUX codecs registered with ALSA core\n",
  7404. __func__, codecs_found);
  7405. }
  7406. card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
  7407. card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
  7408. /* Alloc array of AUX devs struct */
  7409. msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
  7410. sizeof(struct snd_soc_aux_dev),
  7411. GFP_KERNEL);
  7412. if (!msm_aux_dev) {
  7413. ret = -ENOMEM;
  7414. goto err;
  7415. }
  7416. /* Alloc array of codec conf struct */
  7417. msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
  7418. sizeof(struct snd_soc_codec_conf),
  7419. GFP_KERNEL);
  7420. if (!msm_codec_conf) {
  7421. ret = -ENOMEM;
  7422. goto err;
  7423. }
  7424. for (i = 0; i < wsa_max_devs; i++) {
  7425. dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
  7426. GFP_KERNEL);
  7427. if (!dev_name_str) {
  7428. ret = -ENOMEM;
  7429. goto err;
  7430. }
  7431. ret = of_property_read_string_index(pdev->dev.of_node,
  7432. "qcom,wsa-aux-dev-prefix",
  7433. wsa881x_dev_info[i].index,
  7434. auxdev_name_prefix);
  7435. if (ret) {
  7436. dev_err(&pdev->dev,
  7437. "%s: failed to read wsa aux dev prefix, ret = %d\n",
  7438. __func__, ret);
  7439. ret = -EINVAL;
  7440. goto err;
  7441. }
  7442. snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
  7443. msm_aux_dev[i].name = dev_name_str;
  7444. msm_aux_dev[i].codec_name = NULL;
  7445. msm_aux_dev[i].codec_of_node =
  7446. wsa881x_dev_info[i].of_node;
  7447. msm_aux_dev[i].init = msm_wsa881x_init;
  7448. msm_codec_conf[i].dev_name = NULL;
  7449. msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
  7450. msm_codec_conf[i].of_node =
  7451. wsa881x_dev_info[i].of_node;
  7452. }
  7453. for (i = 0; i < codec_aux_dev_cnt; i++) {
  7454. msm_aux_dev[wsa_max_devs + i].name = NULL;
  7455. msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
  7456. msm_aux_dev[wsa_max_devs + i].codec_of_node =
  7457. aux_cdc_dev_info[i].of_node;
  7458. msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
  7459. msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
  7460. msm_codec_conf[wsa_max_devs + i].name_prefix =
  7461. NULL;
  7462. msm_codec_conf[wsa_max_devs + i].of_node =
  7463. aux_cdc_dev_info[i].of_node;
  7464. }
  7465. card->codec_conf = msm_codec_conf;
  7466. card->aux_dev = msm_aux_dev;
  7467. err:
  7468. return ret;
  7469. }
  7470. static void msm_i2s_auxpcm_init(struct platform_device *pdev)
  7471. {
  7472. int count;
  7473. u32 mi2s_master_slave[MI2S_MAX];
  7474. int ret;
  7475. for (count = 0; count < MI2S_MAX; count++) {
  7476. mutex_init(&mi2s_intf_conf[count].lock);
  7477. mi2s_intf_conf[count].ref_cnt = 0;
  7478. }
  7479. ret = of_property_read_u32_array(pdev->dev.of_node,
  7480. "qcom,msm-mi2s-master",
  7481. mi2s_master_slave, MI2S_MAX);
  7482. if (ret) {
  7483. dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
  7484. __func__);
  7485. } else {
  7486. for (count = 0; count < MI2S_MAX; count++) {
  7487. mi2s_intf_conf[count].msm_is_mi2s_master =
  7488. mi2s_master_slave[count];
  7489. }
  7490. }
  7491. }
  7492. static void msm_i2s_auxpcm_deinit(void)
  7493. {
  7494. int count;
  7495. for (count = 0; count < MI2S_MAX; count++) {
  7496. mutex_destroy(&mi2s_intf_conf[count].lock);
  7497. mi2s_intf_conf[count].ref_cnt = 0;
  7498. mi2s_intf_conf[count].msm_is_mi2s_master = 0;
  7499. }
  7500. }
  7501. static int msm_asoc_machine_probe(struct platform_device *pdev)
  7502. {
  7503. struct snd_soc_card *card;
  7504. struct msm_asoc_mach_data *pdata;
  7505. const char *mbhc_audio_jack_type = NULL;
  7506. int ret;
  7507. if (!pdev->dev.of_node) {
  7508. dev_err(&pdev->dev, "No platform supplied from device tree\n");
  7509. return -EINVAL;
  7510. }
  7511. pdata = devm_kzalloc(&pdev->dev,
  7512. sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
  7513. if (!pdata)
  7514. return -ENOMEM;
  7515. card = populate_snd_card_dailinks(&pdev->dev);
  7516. if (!card) {
  7517. dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
  7518. ret = -EINVAL;
  7519. goto err;
  7520. }
  7521. card->dev = &pdev->dev;
  7522. platform_set_drvdata(pdev, card);
  7523. snd_soc_card_set_drvdata(card, pdata);
  7524. ret = snd_soc_of_parse_card_name(card, "qcom,model");
  7525. if (ret) {
  7526. dev_err(&pdev->dev, "parse card name failed, err:%d\n",
  7527. ret);
  7528. goto err;
  7529. }
  7530. ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
  7531. if (ret) {
  7532. dev_err(&pdev->dev, "parse audio routing failed, err:%d\n",
  7533. ret);
  7534. goto err;
  7535. }
  7536. ret = msm_populate_dai_link_component_of_node(card);
  7537. if (ret) {
  7538. ret = -EPROBE_DEFER;
  7539. goto err;
  7540. }
  7541. ret = msm_init_aux_dev(pdev, card);
  7542. if (ret)
  7543. goto err;
  7544. ret = devm_snd_soc_register_card(&pdev->dev, card);
  7545. if (ret == -EPROBE_DEFER) {
  7546. if (codec_reg_done)
  7547. ret = -EINVAL;
  7548. goto err;
  7549. } else if (ret) {
  7550. dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
  7551. ret);
  7552. goto err;
  7553. }
  7554. dev_info(&pdev->dev, "Sound card %s registered\n", card->name);
  7555. spdev = pdev;
  7556. pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7557. "qcom,hph-en1-gpio", 0);
  7558. if (!pdata->hph_en1_gpio_p) {
  7559. dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
  7560. "qcom,hph-en1-gpio",
  7561. pdev->dev.of_node->full_name);
  7562. }
  7563. pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7564. "qcom,hph-en0-gpio", 0);
  7565. if (!pdata->hph_en0_gpio_p) {
  7566. dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
  7567. "qcom,hph-en0-gpio",
  7568. pdev->dev.of_node->full_name);
  7569. }
  7570. ret = of_property_read_string(pdev->dev.of_node,
  7571. "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
  7572. if (ret) {
  7573. dev_dbg(&pdev->dev, "Looking up %s property in node %s failed\n",
  7574. "qcom,mbhc-audio-jack-type",
  7575. pdev->dev.of_node->full_name);
  7576. dev_dbg(&pdev->dev, "Jack type properties set to default\n");
  7577. } else {
  7578. if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
  7579. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  7580. dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
  7581. } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
  7582. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  7583. dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
  7584. } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
  7585. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  7586. dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
  7587. } else {
  7588. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  7589. dev_dbg(&pdev->dev, "Unknown value, set to default\n");
  7590. }
  7591. }
  7592. /*
  7593. * Parse US-Euro gpio info from DT. Report no error if us-euro
  7594. * entry is not found in DT file as some targets do not support
  7595. * US-Euro detection
  7596. */
  7597. pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7598. "qcom,us-euro-gpios", 0);
  7599. if (!pdata->us_euro_gpio_p) {
  7600. dev_dbg(&pdev->dev, "property %s not detected in node %s",
  7601. "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
  7602. } else {
  7603. dev_dbg(&pdev->dev, "%s detected\n",
  7604. "qcom,us-euro-gpios");
  7605. wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
  7606. }
  7607. /* Parse pinctrl info from devicetree */
  7608. ret = msm_get_pinctrl(pdev);
  7609. if (!ret) {
  7610. pr_debug("%s: pinctrl parsing successful\n", __func__);
  7611. } else {
  7612. dev_dbg(&pdev->dev,
  7613. "%s: Parsing pinctrl failed with %d. Cannot use Ports\n",
  7614. __func__, ret);
  7615. ret = 0;
  7616. }
  7617. msm_i2s_auxpcm_init(pdev);
  7618. if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
  7619. is_initial_boot = true;
  7620. ret = audio_notifier_register("sm6150",
  7621. AUDIO_NOTIFIER_ADSP_DOMAIN,
  7622. &service_nb);
  7623. if (ret < 0)
  7624. pr_err("%s: Audio notifier register failed ret = %d\n",
  7625. __func__, ret);
  7626. } else {
  7627. pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7628. "qcom,cdc-dmic01-gpios",
  7629. 0);
  7630. pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7631. "qcom,cdc-dmic23-gpios",
  7632. 0);
  7633. }
  7634. err:
  7635. return ret;
  7636. }
  7637. static int msm_asoc_machine_remove(struct platform_device *pdev)
  7638. {
  7639. audio_notifier_deregister("sm6150");
  7640. msm_i2s_auxpcm_deinit();
  7641. return 0;
  7642. }
  7643. static struct platform_driver sm6150_asoc_machine_driver = {
  7644. .driver = {
  7645. .name = DRV_NAME,
  7646. .owner = THIS_MODULE,
  7647. .pm = &snd_soc_pm_ops,
  7648. .of_match_table = sm6150_asoc_machine_of_match,
  7649. },
  7650. .probe = msm_asoc_machine_probe,
  7651. .remove = msm_asoc_machine_remove,
  7652. };
  7653. module_platform_driver(sm6150_asoc_machine_driver);
  7654. MODULE_DESCRIPTION("ALSA SoC SM6150 Machine driver");
  7655. MODULE_LICENSE("GPL v2");
  7656. MODULE_ALIAS("platform:" DRV_NAME);
  7657. MODULE_DEVICE_TABLE(of, sm6150_asoc_machine_of_match);