dsi_panel.c 117 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/delay.h>
  6. #include <linux/slab.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/pwm.h>
  10. #include <video/mipi_display.h>
  11. #include "dsi_panel.h"
  12. #include "dsi_ctrl_hw.h"
  13. #include "dsi_parser.h"
  14. #include "sde_dbg.h"
  15. #include "sde_dsc_helper.h"
  16. #include "sde_vdc_helper.h"
  17. /**
  18. * topology is currently defined by a set of following 3 values:
  19. * 1. num of layer mixers
  20. * 2. num of compression encoders
  21. * 3. num of interfaces
  22. */
  23. #define TOPOLOGY_SET_LEN 3
  24. #define MAX_TOPOLOGY 5
  25. #define DSI_PANEL_DEFAULT_LABEL "Default dsi panel"
  26. #define DEFAULT_PANEL_JITTER_NUMERATOR 2
  27. #define DEFAULT_PANEL_JITTER_DENOMINATOR 1
  28. #define DEFAULT_PANEL_JITTER_ARRAY_SIZE 2
  29. #define MAX_PANEL_JITTER 10
  30. #define DEFAULT_PANEL_PREFILL_LINES 25
  31. #define HIGH_REFRESH_RATE_THRESHOLD_TIME_US 500
  32. #define MIN_PREFILL_LINES 40
  33. static void dsi_dce_prepare_pps_header(char *buf, u32 pps_delay_ms)
  34. {
  35. char *bp;
  36. bp = buf;
  37. /* First 7 bytes are cmd header */
  38. *bp++ = 0x0A;
  39. *bp++ = 1;
  40. *bp++ = 0;
  41. *bp++ = 0;
  42. *bp++ = pps_delay_ms;
  43. *bp++ = 0;
  44. *bp++ = 128;
  45. }
  46. static int dsi_dsc_create_pps_buf_cmd(struct msm_display_dsc_info *dsc,
  47. char *buf, int pps_id, u32 size)
  48. {
  49. dsi_dce_prepare_pps_header(buf, dsc->pps_delay_ms);
  50. buf += DSI_CMD_PPS_HDR_SIZE;
  51. return sde_dsc_create_pps_buf_cmd(dsc, buf, pps_id,
  52. size);
  53. }
  54. static int dsi_vdc_create_pps_buf_cmd(struct msm_display_vdc_info *vdc,
  55. char *buf, int pps_id, u32 size)
  56. {
  57. dsi_dce_prepare_pps_header(buf, vdc->pps_delay_ms);
  58. buf += DSI_CMD_PPS_HDR_SIZE;
  59. return sde_vdc_create_pps_buf_cmd(vdc, buf, pps_id,
  60. size);
  61. }
  62. static int dsi_panel_vreg_get(struct dsi_panel *panel)
  63. {
  64. int rc = 0;
  65. int i;
  66. struct regulator *vreg = NULL;
  67. for (i = 0; i < panel->power_info.count; i++) {
  68. vreg = devm_regulator_get(panel->parent,
  69. panel->power_info.vregs[i].vreg_name);
  70. rc = PTR_ERR_OR_ZERO(vreg);
  71. if (rc) {
  72. DSI_ERR("failed to get %s regulator\n",
  73. panel->power_info.vregs[i].vreg_name);
  74. goto error_put;
  75. }
  76. panel->power_info.vregs[i].vreg = vreg;
  77. }
  78. return rc;
  79. error_put:
  80. for (i = i - 1; i >= 0; i--) {
  81. devm_regulator_put(panel->power_info.vregs[i].vreg);
  82. panel->power_info.vregs[i].vreg = NULL;
  83. }
  84. return rc;
  85. }
  86. static int dsi_panel_vreg_put(struct dsi_panel *panel)
  87. {
  88. int rc = 0;
  89. int i;
  90. for (i = panel->power_info.count - 1; i >= 0; i--)
  91. devm_regulator_put(panel->power_info.vregs[i].vreg);
  92. return rc;
  93. }
  94. static int dsi_panel_gpio_request(struct dsi_panel *panel)
  95. {
  96. int rc = 0;
  97. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  98. if (gpio_is_valid(r_config->reset_gpio)) {
  99. rc = gpio_request(r_config->reset_gpio, "reset_gpio");
  100. if (rc) {
  101. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  102. goto error;
  103. }
  104. }
  105. if (gpio_is_valid(r_config->disp_en_gpio)) {
  106. rc = gpio_request(r_config->disp_en_gpio, "disp_en_gpio");
  107. if (rc) {
  108. DSI_ERR("request for disp_en_gpio failed, rc=%d\n", rc);
  109. goto error_release_reset;
  110. }
  111. }
  112. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  113. rc = gpio_request(panel->bl_config.en_gpio, "bklt_en_gpio");
  114. if (rc) {
  115. DSI_ERR("request for bklt_en_gpio failed, rc=%d\n", rc);
  116. goto error_release_disp_en;
  117. }
  118. }
  119. if (gpio_is_valid(r_config->lcd_mode_sel_gpio)) {
  120. rc = gpio_request(r_config->lcd_mode_sel_gpio, "mode_gpio");
  121. if (rc) {
  122. DSI_ERR("request for mode_gpio failed, rc=%d\n", rc);
  123. goto error_release_mode_sel;
  124. }
  125. }
  126. if (gpio_is_valid(panel->panel_test_gpio)) {
  127. rc = gpio_request(panel->panel_test_gpio, "panel_test_gpio");
  128. if (rc) {
  129. DSI_WARN("request for panel_test_gpio failed, rc=%d\n",
  130. rc);
  131. panel->panel_test_gpio = -1;
  132. rc = 0;
  133. }
  134. }
  135. goto error;
  136. error_release_mode_sel:
  137. if (gpio_is_valid(panel->bl_config.en_gpio))
  138. gpio_free(panel->bl_config.en_gpio);
  139. error_release_disp_en:
  140. if (gpio_is_valid(r_config->disp_en_gpio))
  141. gpio_free(r_config->disp_en_gpio);
  142. error_release_reset:
  143. if (gpio_is_valid(r_config->reset_gpio))
  144. gpio_free(r_config->reset_gpio);
  145. error:
  146. return rc;
  147. }
  148. static int dsi_panel_gpio_release(struct dsi_panel *panel)
  149. {
  150. int rc = 0;
  151. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  152. if (gpio_is_valid(r_config->reset_gpio))
  153. gpio_free(r_config->reset_gpio);
  154. if (gpio_is_valid(r_config->disp_en_gpio))
  155. gpio_free(r_config->disp_en_gpio);
  156. if (gpio_is_valid(panel->bl_config.en_gpio))
  157. gpio_free(panel->bl_config.en_gpio);
  158. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  159. gpio_free(panel->reset_config.lcd_mode_sel_gpio);
  160. if (gpio_is_valid(panel->panel_test_gpio))
  161. gpio_free(panel->panel_test_gpio);
  162. return rc;
  163. }
  164. int dsi_panel_trigger_esd_attack(struct dsi_panel *panel, bool trusted_vm_env)
  165. {
  166. if (!panel) {
  167. DSI_ERR("Invalid panel param\n");
  168. return -EINVAL;
  169. }
  170. /* toggle reset-gpio by writing directly to register in trusted-vm */
  171. if (trusted_vm_env) {
  172. struct dsi_tlmm_gpio *gpio = NULL;
  173. void __iomem *io;
  174. u32 offset = 0x4;
  175. int i;
  176. for (i = 0; i < panel->tlmm_gpio_count; i++)
  177. if (!strcmp(panel->tlmm_gpio[i].name, "reset-gpio"))
  178. gpio = &panel->tlmm_gpio[i];
  179. if (!gpio) {
  180. DSI_ERR("reset gpio not found\n");
  181. return -EINVAL;
  182. }
  183. io = ioremap(gpio->addr, gpio->size);
  184. writel_relaxed(0, io + offset);
  185. iounmap(io);
  186. } else {
  187. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  188. if (!r_config) {
  189. DSI_ERR("Invalid panel reset configuration\n");
  190. return -EINVAL;
  191. }
  192. if (!gpio_is_valid(r_config->reset_gpio)) {
  193. DSI_ERR("failed to pull down gpio\n");
  194. return -EINVAL;
  195. }
  196. gpio_set_value(r_config->reset_gpio, 0);
  197. }
  198. SDE_EVT32(SDE_EVTLOG_FUNC_CASE1);
  199. DSI_INFO("GPIO pulled low to simulate ESD\n");
  200. return 0;
  201. }
  202. static int dsi_panel_reset(struct dsi_panel *panel)
  203. {
  204. int rc = 0;
  205. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  206. int i;
  207. if (gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  208. rc = gpio_direction_output(panel->reset_config.disp_en_gpio, 1);
  209. if (rc) {
  210. DSI_ERR("unable to set dir for disp gpio rc=%d\n", rc);
  211. goto exit;
  212. }
  213. }
  214. if (r_config->count) {
  215. rc = gpio_direction_output(r_config->reset_gpio,
  216. r_config->sequence[0].level);
  217. if (rc) {
  218. DSI_ERR("unable to set dir for rst gpio rc=%d\n", rc);
  219. goto exit;
  220. }
  221. }
  222. for (i = 0; i < r_config->count; i++) {
  223. gpio_set_value(r_config->reset_gpio,
  224. r_config->sequence[i].level);
  225. if (r_config->sequence[i].sleep_ms)
  226. usleep_range(r_config->sequence[i].sleep_ms * 1000,
  227. (r_config->sequence[i].sleep_ms * 1000) + 100);
  228. }
  229. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  230. rc = gpio_direction_output(panel->bl_config.en_gpio, 1);
  231. if (rc)
  232. DSI_ERR("unable to set dir for bklt gpio rc=%d\n", rc);
  233. }
  234. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio)) {
  235. bool out = true;
  236. if ((panel->reset_config.mode_sel_state == MODE_SEL_DUAL_PORT)
  237. || (panel->reset_config.mode_sel_state
  238. == MODE_GPIO_LOW))
  239. out = false;
  240. else if ((panel->reset_config.mode_sel_state
  241. == MODE_SEL_SINGLE_PORT) ||
  242. (panel->reset_config.mode_sel_state
  243. == MODE_GPIO_HIGH))
  244. out = true;
  245. rc = gpio_direction_output(
  246. panel->reset_config.lcd_mode_sel_gpio, out);
  247. if (rc)
  248. DSI_ERR("unable to set dir for mode gpio rc=%d\n", rc);
  249. }
  250. if (gpio_is_valid(panel->panel_test_gpio)) {
  251. rc = gpio_direction_input(panel->panel_test_gpio);
  252. if (rc)
  253. DSI_WARN("unable to set dir for panel test gpio rc=%d\n",
  254. rc);
  255. }
  256. exit:
  257. return rc;
  258. }
  259. static int dsi_panel_set_pinctrl_state(struct dsi_panel *panel, bool enable)
  260. {
  261. int rc = 0;
  262. struct pinctrl_state *state;
  263. if (panel->host_config.ext_bridge_mode)
  264. return 0;
  265. if (!panel->pinctrl.pinctrl)
  266. return 0;
  267. if (enable)
  268. state = panel->pinctrl.active;
  269. else
  270. state = panel->pinctrl.suspend;
  271. rc = pinctrl_select_state(panel->pinctrl.pinctrl, state);
  272. if (rc)
  273. DSI_ERR("[%s] failed to set pin state, rc=%d\n",
  274. panel->name, rc);
  275. return rc;
  276. }
  277. static int dsi_panel_power_on(struct dsi_panel *panel)
  278. {
  279. int rc = 0;
  280. rc = dsi_pwr_enable_regulator(&panel->power_info, true);
  281. if (rc) {
  282. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  283. panel->name, rc);
  284. goto exit;
  285. }
  286. rc = dsi_panel_set_pinctrl_state(panel, true);
  287. if (rc) {
  288. DSI_ERR("[%s] failed to set pinctrl, rc=%d\n", panel->name, rc);
  289. goto error_disable_vregs;
  290. }
  291. rc = dsi_panel_reset(panel);
  292. if (rc) {
  293. DSI_ERR("[%s] failed to reset panel, rc=%d\n", panel->name, rc);
  294. goto error_disable_gpio;
  295. }
  296. goto exit;
  297. error_disable_gpio:
  298. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  299. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  300. if (gpio_is_valid(panel->bl_config.en_gpio))
  301. gpio_set_value(panel->bl_config.en_gpio, 0);
  302. (void)dsi_panel_set_pinctrl_state(panel, false);
  303. error_disable_vregs:
  304. (void)dsi_pwr_enable_regulator(&panel->power_info, false);
  305. exit:
  306. return rc;
  307. }
  308. static int dsi_panel_power_off(struct dsi_panel *panel)
  309. {
  310. int rc = 0;
  311. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  312. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  313. if (gpio_is_valid(panel->reset_config.reset_gpio) &&
  314. !panel->reset_gpio_always_on)
  315. gpio_set_value(panel->reset_config.reset_gpio, 0);
  316. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  317. gpio_set_value(panel->reset_config.lcd_mode_sel_gpio, 0);
  318. if (gpio_is_valid(panel->panel_test_gpio)) {
  319. rc = gpio_direction_input(panel->panel_test_gpio);
  320. if (rc)
  321. DSI_WARN("set dir for panel test gpio failed rc=%d\n",
  322. rc);
  323. }
  324. rc = dsi_panel_set_pinctrl_state(panel, false);
  325. if (rc) {
  326. DSI_ERR("[%s] failed set pinctrl state, rc=%d\n", panel->name,
  327. rc);
  328. }
  329. rc = dsi_pwr_enable_regulator(&panel->power_info, false);
  330. if (rc)
  331. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  332. panel->name, rc);
  333. return rc;
  334. }
  335. static int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  336. enum dsi_cmd_set_type type)
  337. {
  338. int rc = 0, i = 0;
  339. ssize_t len;
  340. struct dsi_cmd_desc *cmds;
  341. u32 count;
  342. enum dsi_cmd_set_state state;
  343. struct dsi_display_mode *mode;
  344. if (!panel || !panel->cur_mode)
  345. return -EINVAL;
  346. mode = panel->cur_mode;
  347. cmds = mode->priv_info->cmd_sets[type].cmds;
  348. count = mode->priv_info->cmd_sets[type].count;
  349. state = mode->priv_info->cmd_sets[type].state;
  350. SDE_EVT32(type, state, count);
  351. if (count == 0) {
  352. DSI_DEBUG("[%s] No commands to be sent for state(%d)\n",
  353. panel->name, type);
  354. goto error;
  355. }
  356. for (i = 0; i < count; i++) {
  357. if (state == DSI_CMD_SET_STATE_LP)
  358. cmds->msg.flags |= MIPI_DSI_MSG_USE_LPM;
  359. if (type == DSI_CMD_SET_VID_SWITCH_OUT)
  360. cmds->msg.flags |= MIPI_DSI_MSG_ASYNC_OVERRIDE;
  361. len = dsi_host_transfer_sub(panel->host, cmds);
  362. if (len < 0) {
  363. rc = len;
  364. DSI_ERR("failed to set cmds(%d), rc=%d\n", type, rc);
  365. goto error;
  366. }
  367. if (cmds->post_wait_ms)
  368. usleep_range(cmds->post_wait_ms*1000,
  369. ((cmds->post_wait_ms*1000)+10));
  370. cmds++;
  371. }
  372. error:
  373. return rc;
  374. }
  375. static int dsi_panel_pinctrl_deinit(struct dsi_panel *panel)
  376. {
  377. int rc = 0;
  378. if (panel->host_config.ext_bridge_mode)
  379. return 0;
  380. devm_pinctrl_put(panel->pinctrl.pinctrl);
  381. return rc;
  382. }
  383. static int dsi_panel_pinctrl_init(struct dsi_panel *panel)
  384. {
  385. int rc = 0;
  386. if (panel->host_config.ext_bridge_mode)
  387. return 0;
  388. /* TODO: pinctrl is defined in dsi dt node */
  389. panel->pinctrl.pinctrl = devm_pinctrl_get(panel->parent);
  390. if (IS_ERR_OR_NULL(panel->pinctrl.pinctrl)) {
  391. rc = PTR_ERR(panel->pinctrl.pinctrl);
  392. DSI_ERR("failed to get pinctrl, rc=%d\n", rc);
  393. goto error;
  394. }
  395. panel->pinctrl.active = pinctrl_lookup_state(panel->pinctrl.pinctrl,
  396. "panel_active");
  397. if (IS_ERR_OR_NULL(panel->pinctrl.active)) {
  398. rc = PTR_ERR(panel->pinctrl.active);
  399. DSI_ERR("failed to get pinctrl active state, rc=%d\n", rc);
  400. goto error;
  401. }
  402. panel->pinctrl.suspend =
  403. pinctrl_lookup_state(panel->pinctrl.pinctrl, "panel_suspend");
  404. if (IS_ERR_OR_NULL(panel->pinctrl.suspend)) {
  405. rc = PTR_ERR(panel->pinctrl.suspend);
  406. DSI_ERR("failed to get pinctrl suspend state, rc=%d\n", rc);
  407. goto error;
  408. }
  409. panel->pinctrl.pwm_pin =
  410. pinctrl_lookup_state(panel->pinctrl.pinctrl, "pwm_pin");
  411. if (IS_ERR_OR_NULL(panel->pinctrl.pwm_pin)) {
  412. panel->pinctrl.pwm_pin = NULL;
  413. DSI_DEBUG("failed to get pinctrl pwm_pin");
  414. }
  415. error:
  416. return rc;
  417. }
  418. static int dsi_panel_wled_register(struct dsi_panel *panel,
  419. struct dsi_backlight_config *bl)
  420. {
  421. struct backlight_device *bd;
  422. bd = backlight_device_get_by_type(BACKLIGHT_RAW);
  423. if (!bd) {
  424. DSI_ERR("[%s] fail raw backlight register rc=%d\n",
  425. panel->name, -EPROBE_DEFER);
  426. return -EPROBE_DEFER;
  427. }
  428. bl->raw_bd = bd;
  429. return 0;
  430. }
  431. static int dsi_panel_update_backlight(struct dsi_panel *panel,
  432. u32 bl_lvl)
  433. {
  434. int rc = 0;
  435. unsigned long mode_flags = 0;
  436. struct mipi_dsi_device *dsi = NULL;
  437. if (!panel || (bl_lvl > 0xffff)) {
  438. DSI_ERR("invalid params\n");
  439. return -EINVAL;
  440. }
  441. dsi = &panel->mipi_device;
  442. if (unlikely(panel->bl_config.lp_mode)) {
  443. mode_flags = dsi->mode_flags;
  444. dsi->mode_flags |= MIPI_DSI_MODE_LPM;
  445. }
  446. if (panel->bl_config.bl_inverted_dbv)
  447. bl_lvl = (((bl_lvl & 0xff) << 8) | (bl_lvl >> 8));
  448. rc = mipi_dsi_dcs_set_display_brightness(dsi, bl_lvl);
  449. if (rc < 0)
  450. DSI_ERR("failed to update dcs backlight:%d\n", bl_lvl);
  451. if (unlikely(panel->bl_config.lp_mode))
  452. dsi->mode_flags = mode_flags;
  453. return rc;
  454. }
  455. static int dsi_panel_update_pwm_backlight(struct dsi_panel *panel,
  456. u32 bl_lvl)
  457. {
  458. int rc = 0;
  459. u32 duty = 0;
  460. u32 period_ns = 0;
  461. struct dsi_backlight_config *bl;
  462. if (!panel) {
  463. DSI_ERR("Invalid Params\n");
  464. return -EINVAL;
  465. }
  466. bl = &panel->bl_config;
  467. if (!bl->pwm_bl) {
  468. DSI_ERR("pwm device not found\n");
  469. return -EINVAL;
  470. }
  471. period_ns = bl->pwm_period_usecs * NSEC_PER_USEC;
  472. duty = bl_lvl * period_ns;
  473. duty /= bl->bl_max_level;
  474. rc = pwm_config(bl->pwm_bl, duty, period_ns);
  475. if (rc) {
  476. DSI_ERR("[%s] failed to change pwm config, rc=%d\n", panel->name,
  477. rc);
  478. goto error;
  479. }
  480. if (bl_lvl == 0 && bl->pwm_enabled) {
  481. pwm_disable(bl->pwm_bl);
  482. bl->pwm_enabled = false;
  483. return 0;
  484. }
  485. if (bl_lvl != 0 && !bl->pwm_enabled) {
  486. rc = pwm_enable(bl->pwm_bl);
  487. if (rc) {
  488. DSI_ERR("[%s] failed to enable pwm, rc=%d\n", panel->name,
  489. rc);
  490. goto error;
  491. }
  492. bl->pwm_enabled = true;
  493. }
  494. error:
  495. return rc;
  496. }
  497. int dsi_panel_set_backlight(struct dsi_panel *panel, u32 bl_lvl)
  498. {
  499. int rc = 0;
  500. struct dsi_backlight_config *bl = &panel->bl_config;
  501. if (panel->host_config.ext_bridge_mode)
  502. return 0;
  503. DSI_DEBUG("backlight type:%d lvl:%d\n", bl->type, bl_lvl);
  504. switch (bl->type) {
  505. case DSI_BACKLIGHT_WLED:
  506. rc = backlight_device_set_brightness(bl->raw_bd, bl_lvl);
  507. break;
  508. case DSI_BACKLIGHT_DCS:
  509. rc = dsi_panel_update_backlight(panel, bl_lvl);
  510. break;
  511. case DSI_BACKLIGHT_EXTERNAL:
  512. break;
  513. case DSI_BACKLIGHT_PWM:
  514. rc = dsi_panel_update_pwm_backlight(panel, bl_lvl);
  515. break;
  516. default:
  517. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  518. rc = -ENOTSUPP;
  519. }
  520. return rc;
  521. }
  522. static u32 dsi_panel_get_brightness(struct dsi_backlight_config *bl)
  523. {
  524. u32 cur_bl_level;
  525. struct backlight_device *bd = bl->raw_bd;
  526. /* default the brightness level to 50% */
  527. cur_bl_level = bl->bl_max_level >> 1;
  528. switch (bl->type) {
  529. case DSI_BACKLIGHT_WLED:
  530. /* Try to query the backlight level from the backlight device */
  531. if (bd->ops && bd->ops->get_brightness)
  532. cur_bl_level = bd->ops->get_brightness(bd);
  533. break;
  534. case DSI_BACKLIGHT_DCS:
  535. case DSI_BACKLIGHT_EXTERNAL:
  536. case DSI_BACKLIGHT_PWM:
  537. default:
  538. /*
  539. * Ideally, we should read the backlight level from the
  540. * panel. For now, just set it default value.
  541. */
  542. break;
  543. }
  544. DSI_DEBUG("cur_bl_level=%d\n", cur_bl_level);
  545. return cur_bl_level;
  546. }
  547. void dsi_panel_bl_handoff(struct dsi_panel *panel)
  548. {
  549. struct dsi_backlight_config *bl = &panel->bl_config;
  550. bl->bl_level = dsi_panel_get_brightness(bl);
  551. }
  552. static int dsi_panel_pwm_register(struct dsi_panel *panel)
  553. {
  554. int rc = 0;
  555. struct dsi_backlight_config *bl = &panel->bl_config;
  556. bl->pwm_bl = devm_of_pwm_get(panel->parent, panel->panel_of_node, NULL);
  557. if (IS_ERR_OR_NULL(bl->pwm_bl)) {
  558. rc = PTR_ERR(bl->pwm_bl);
  559. DSI_ERR("[%s] failed to request pwm, rc=%d\n", panel->name,
  560. rc);
  561. return rc;
  562. }
  563. if (panel->pinctrl.pwm_pin) {
  564. rc = pinctrl_select_state(panel->pinctrl.pinctrl,
  565. panel->pinctrl.pwm_pin);
  566. if (rc)
  567. DSI_ERR("[%s] failed to set pwm pinctrl, rc=%d\n",
  568. panel->name, rc);
  569. }
  570. return 0;
  571. }
  572. static int dsi_panel_bl_register(struct dsi_panel *panel)
  573. {
  574. int rc = 0;
  575. struct dsi_backlight_config *bl = &panel->bl_config;
  576. if (panel->host_config.ext_bridge_mode)
  577. return 0;
  578. switch (bl->type) {
  579. case DSI_BACKLIGHT_WLED:
  580. rc = dsi_panel_wled_register(panel, bl);
  581. break;
  582. case DSI_BACKLIGHT_DCS:
  583. break;
  584. case DSI_BACKLIGHT_EXTERNAL:
  585. break;
  586. case DSI_BACKLIGHT_PWM:
  587. rc = dsi_panel_pwm_register(panel);
  588. break;
  589. default:
  590. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  591. rc = -ENOTSUPP;
  592. goto error;
  593. }
  594. error:
  595. return rc;
  596. }
  597. static void dsi_panel_pwm_unregister(struct dsi_panel *panel)
  598. {
  599. struct dsi_backlight_config *bl = &panel->bl_config;
  600. devm_pwm_put(panel->parent, bl->pwm_bl);
  601. }
  602. static int dsi_panel_bl_unregister(struct dsi_panel *panel)
  603. {
  604. int rc = 0;
  605. struct dsi_backlight_config *bl = &panel->bl_config;
  606. if (panel->host_config.ext_bridge_mode)
  607. return 0;
  608. switch (bl->type) {
  609. case DSI_BACKLIGHT_WLED:
  610. break;
  611. case DSI_BACKLIGHT_DCS:
  612. break;
  613. case DSI_BACKLIGHT_EXTERNAL:
  614. break;
  615. case DSI_BACKLIGHT_PWM:
  616. dsi_panel_pwm_unregister(panel);
  617. break;
  618. default:
  619. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  620. rc = -ENOTSUPP;
  621. goto error;
  622. }
  623. error:
  624. return rc;
  625. }
  626. static int dsi_panel_parse_timing(struct dsi_mode_info *mode,
  627. struct dsi_parser_utils *utils)
  628. {
  629. int rc = 0;
  630. u64 tmp64 = 0;
  631. struct dsi_display_mode *display_mode;
  632. struct dsi_display_mode_priv_info *priv_info;
  633. display_mode = container_of(mode, struct dsi_display_mode, timing);
  634. priv_info = display_mode->priv_info;
  635. rc = utils->read_u64(utils->data,
  636. "qcom,mdss-dsi-panel-clockrate", &tmp64);
  637. if (rc == -EOVERFLOW) {
  638. tmp64 = 0;
  639. rc = utils->read_u32(utils->data,
  640. "qcom,mdss-dsi-panel-clockrate", (u32 *)&tmp64);
  641. }
  642. mode->clk_rate_hz = !rc ? tmp64 : 0;
  643. display_mode->priv_info->clk_rate_hz = mode->clk_rate_hz;
  644. mode->pclk_scale.numer = 1;
  645. mode->pclk_scale.denom = 1;
  646. display_mode->priv_info->pclk_scale = mode->pclk_scale;
  647. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us",
  648. &mode->mdp_transfer_time_us);
  649. if (!rc)
  650. display_mode->priv_info->mdp_transfer_time_us =
  651. mode->mdp_transfer_time_us;
  652. else
  653. display_mode->priv_info->mdp_transfer_time_us = 0;
  654. rc = utils->read_u32(utils->data,
  655. "qcom,mdss-dsi-panel-framerate",
  656. &mode->refresh_rate);
  657. if (rc) {
  658. DSI_ERR("failed to read qcom,mdss-dsi-panel-framerate, rc=%d\n",
  659. rc);
  660. goto error;
  661. }
  662. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-width",
  663. &mode->h_active);
  664. if (rc) {
  665. DSI_ERR("failed to read qcom,mdss-dsi-panel-width, rc=%d\n",
  666. rc);
  667. goto error;
  668. }
  669. rc = utils->read_u32(utils->data,
  670. "qcom,mdss-dsi-h-front-porch",
  671. &mode->h_front_porch);
  672. if (rc) {
  673. DSI_ERR("failed to read qcom,mdss-dsi-h-front-porch, rc=%d\n",
  674. rc);
  675. goto error;
  676. }
  677. rc = utils->read_u32(utils->data,
  678. "qcom,mdss-dsi-h-back-porch",
  679. &mode->h_back_porch);
  680. if (rc) {
  681. DSI_ERR("failed to read qcom,mdss-dsi-h-back-porch, rc=%d\n",
  682. rc);
  683. goto error;
  684. }
  685. rc = utils->read_u32(utils->data,
  686. "qcom,mdss-dsi-h-pulse-width",
  687. &mode->h_sync_width);
  688. if (rc) {
  689. DSI_ERR("failed to read qcom,mdss-dsi-h-pulse-width, rc=%d\n",
  690. rc);
  691. goto error;
  692. }
  693. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-skew",
  694. &mode->h_skew);
  695. if (rc)
  696. DSI_DEBUG("qcom,mdss-dsi-h-sync-skew is not defined, rc=%d\n",
  697. rc);
  698. DSI_DEBUG("panel horz active:%d front_portch:%d back_porch:%d sync_skew:%d\n",
  699. mode->h_active, mode->h_front_porch, mode->h_back_porch,
  700. mode->h_sync_width);
  701. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-height",
  702. &mode->v_active);
  703. if (rc) {
  704. DSI_ERR("failed to read qcom,mdss-dsi-panel-height, rc=%d\n",
  705. rc);
  706. goto error;
  707. }
  708. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-back-porch",
  709. &mode->v_back_porch);
  710. if (rc) {
  711. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  712. rc);
  713. goto error;
  714. }
  715. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-front-porch",
  716. &mode->v_front_porch);
  717. if (rc) {
  718. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  719. rc);
  720. goto error;
  721. }
  722. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-pulse-width",
  723. &mode->v_sync_width);
  724. if (rc) {
  725. DSI_ERR("failed to read qcom,mdss-dsi-v-pulse-width, rc=%d\n",
  726. rc);
  727. goto error;
  728. }
  729. DSI_DEBUG("panel vert active:%d front_portch:%d back_porch:%d pulse_width:%d\n",
  730. mode->v_active, mode->v_front_porch, mode->v_back_porch,
  731. mode->v_sync_width);
  732. error:
  733. return rc;
  734. }
  735. static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host,
  736. struct dsi_parser_utils *utils,
  737. const char *name)
  738. {
  739. int rc = 0;
  740. u32 bpp = 0;
  741. enum dsi_pixel_format fmt;
  742. const char *packing;
  743. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bpp", &bpp);
  744. if (rc) {
  745. DSI_ERR("[%s] failed to read qcom,mdss-dsi-bpp, rc=%d\n",
  746. name, rc);
  747. return rc;
  748. }
  749. host->bpp = bpp;
  750. switch (bpp) {
  751. case 3:
  752. fmt = DSI_PIXEL_FORMAT_RGB111;
  753. break;
  754. case 8:
  755. fmt = DSI_PIXEL_FORMAT_RGB332;
  756. break;
  757. case 12:
  758. fmt = DSI_PIXEL_FORMAT_RGB444;
  759. break;
  760. case 16:
  761. fmt = DSI_PIXEL_FORMAT_RGB565;
  762. break;
  763. case 18:
  764. fmt = DSI_PIXEL_FORMAT_RGB666;
  765. break;
  766. case 24:
  767. default:
  768. fmt = DSI_PIXEL_FORMAT_RGB888;
  769. break;
  770. }
  771. if (fmt == DSI_PIXEL_FORMAT_RGB666) {
  772. packing = utils->get_property(utils->data,
  773. "qcom,mdss-dsi-pixel-packing",
  774. NULL);
  775. if (packing && !strcmp(packing, "loose"))
  776. fmt = DSI_PIXEL_FORMAT_RGB666_LOOSE;
  777. }
  778. host->dst_format = fmt;
  779. return rc;
  780. }
  781. static int dsi_panel_parse_lane_states(struct dsi_host_common_cfg *host,
  782. struct dsi_parser_utils *utils,
  783. const char *name)
  784. {
  785. int rc = 0;
  786. bool lane_enabled;
  787. u32 num_of_lanes = 0;
  788. lane_enabled = utils->read_bool(utils->data,
  789. "qcom,mdss-dsi-lane-0-state");
  790. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_0 : 0);
  791. lane_enabled = utils->read_bool(utils->data,
  792. "qcom,mdss-dsi-lane-1-state");
  793. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_1 : 0);
  794. lane_enabled = utils->read_bool(utils->data,
  795. "qcom,mdss-dsi-lane-2-state");
  796. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_2 : 0);
  797. lane_enabled = utils->read_bool(utils->data,
  798. "qcom,mdss-dsi-lane-3-state");
  799. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_3 : 0);
  800. if (host->data_lanes & DSI_DATA_LANE_0)
  801. num_of_lanes++;
  802. if (host->data_lanes & DSI_DATA_LANE_1)
  803. num_of_lanes++;
  804. if (host->data_lanes & DSI_DATA_LANE_2)
  805. num_of_lanes++;
  806. if (host->data_lanes & DSI_DATA_LANE_3)
  807. num_of_lanes++;
  808. host->num_data_lanes = num_of_lanes;
  809. if (host->data_lanes == 0) {
  810. DSI_ERR("[%s] No data lanes are enabled, rc=%d\n", name, rc);
  811. rc = -EINVAL;
  812. }
  813. return rc;
  814. }
  815. static int dsi_panel_parse_color_swap(struct dsi_host_common_cfg *host,
  816. struct dsi_parser_utils *utils,
  817. const char *name)
  818. {
  819. int rc = 0;
  820. const char *swap_mode;
  821. swap_mode = utils->get_property(utils->data,
  822. "qcom,mdss-dsi-color-order", NULL);
  823. if (swap_mode) {
  824. if (!strcmp(swap_mode, "rgb_swap_rgb")) {
  825. host->swap_mode = DSI_COLOR_SWAP_RGB;
  826. } else if (!strcmp(swap_mode, "rgb_swap_rbg")) {
  827. host->swap_mode = DSI_COLOR_SWAP_RBG;
  828. } else if (!strcmp(swap_mode, "rgb_swap_brg")) {
  829. host->swap_mode = DSI_COLOR_SWAP_BRG;
  830. } else if (!strcmp(swap_mode, "rgb_swap_grb")) {
  831. host->swap_mode = DSI_COLOR_SWAP_GRB;
  832. } else if (!strcmp(swap_mode, "rgb_swap_gbr")) {
  833. host->swap_mode = DSI_COLOR_SWAP_GBR;
  834. } else {
  835. DSI_ERR("[%s] Unrecognized color order-%s\n",
  836. name, swap_mode);
  837. rc = -EINVAL;
  838. }
  839. } else {
  840. DSI_DEBUG("[%s] Falling back to default color order\n", name);
  841. host->swap_mode = DSI_COLOR_SWAP_RGB;
  842. }
  843. /* bit swap on color channel is not defined in dt */
  844. host->bit_swap_red = false;
  845. host->bit_swap_green = false;
  846. host->bit_swap_blue = false;
  847. return rc;
  848. }
  849. static int dsi_panel_parse_triggers(struct dsi_host_common_cfg *host,
  850. struct dsi_parser_utils *utils,
  851. const char *name)
  852. {
  853. const char *trig;
  854. int rc = 0;
  855. trig = utils->get_property(utils->data,
  856. "qcom,mdss-dsi-mdp-trigger", NULL);
  857. if (trig) {
  858. if (!strcmp(trig, "none")) {
  859. host->mdp_cmd_trigger = DSI_TRIGGER_NONE;
  860. } else if (!strcmp(trig, "trigger_te")) {
  861. host->mdp_cmd_trigger = DSI_TRIGGER_TE;
  862. } else if (!strcmp(trig, "trigger_sw")) {
  863. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  864. } else if (!strcmp(trig, "trigger_sw_te")) {
  865. host->mdp_cmd_trigger = DSI_TRIGGER_SW_TE;
  866. } else {
  867. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  868. name, trig);
  869. rc = -EINVAL;
  870. }
  871. } else {
  872. DSI_DEBUG("[%s] Falling back to default MDP trigger\n",
  873. name);
  874. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  875. }
  876. trig = utils->get_property(utils->data,
  877. "qcom,mdss-dsi-dma-trigger", NULL);
  878. if (trig) {
  879. if (!strcmp(trig, "none")) {
  880. host->dma_cmd_trigger = DSI_TRIGGER_NONE;
  881. } else if (!strcmp(trig, "trigger_te")) {
  882. host->dma_cmd_trigger = DSI_TRIGGER_TE;
  883. } else if (!strcmp(trig, "trigger_sw")) {
  884. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  885. } else if (!strcmp(trig, "trigger_sw_seof")) {
  886. host->dma_cmd_trigger = DSI_TRIGGER_SW_SEOF;
  887. } else if (!strcmp(trig, "trigger_sw_te")) {
  888. host->dma_cmd_trigger = DSI_TRIGGER_SW_TE;
  889. } else {
  890. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  891. name, trig);
  892. rc = -EINVAL;
  893. }
  894. } else {
  895. DSI_DEBUG("[%s] Falling back to default MDP trigger\n", name);
  896. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  897. }
  898. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-pin-select",
  899. &host->te_mode);
  900. if (rc) {
  901. DSI_WARN("[%s] fallback to default te-pin-select\n", name);
  902. host->te_mode = 1;
  903. rc = 0;
  904. }
  905. return rc;
  906. }
  907. static int dsi_panel_parse_misc_host_config(struct dsi_host_common_cfg *host,
  908. struct dsi_parser_utils *utils,
  909. const char *name)
  910. {
  911. u32 val = 0, line_no = 0, window = 0;
  912. int rc = 0;
  913. bool panel_cphy_mode = false;
  914. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-post", &val);
  915. if (!rc) {
  916. host->t_clk_post = val;
  917. DSI_DEBUG("[%s] t_clk_post = %d\n", name, val);
  918. }
  919. val = 0;
  920. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-pre", &val);
  921. if (!rc) {
  922. host->t_clk_pre = val;
  923. DSI_DEBUG("[%s] t_clk_pre = %d\n", name, val);
  924. }
  925. host->ignore_rx_eot = utils->read_bool(utils->data,
  926. "qcom,mdss-dsi-rx-eot-ignore");
  927. host->append_tx_eot = utils->read_bool(utils->data,
  928. "qcom,mdss-dsi-tx-eot-append");
  929. host->ext_bridge_mode = utils->read_bool(utils->data,
  930. "qcom,mdss-dsi-ext-bridge-mode");
  931. host->force_hs_clk_lane = utils->read_bool(utils->data,
  932. "qcom,mdss-dsi-force-clock-lane-hs");
  933. panel_cphy_mode = utils->read_bool(utils->data,
  934. "qcom,panel-cphy-mode");
  935. host->phy_type = panel_cphy_mode ? DSI_PHY_TYPE_CPHY
  936. : DSI_PHY_TYPE_DPHY;
  937. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-line",
  938. &line_no);
  939. if (rc)
  940. host->dma_sched_line = 0;
  941. else
  942. host->dma_sched_line = line_no;
  943. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-window",
  944. &window);
  945. if (rc)
  946. host->dma_sched_window = 0;
  947. else
  948. host->dma_sched_window = window;
  949. DSI_DEBUG("[%s] DMA scheduling parameters Line: %d Window: %d\n", name,
  950. host->dma_sched_line, host->dma_sched_window);
  951. return 0;
  952. }
  953. static void dsi_panel_parse_split_link_config(struct dsi_host_common_cfg *host,
  954. struct dsi_parser_utils *utils,
  955. const char *name)
  956. {
  957. int rc = 0;
  958. u32 val = 0;
  959. bool supported = false;
  960. struct dsi_split_link_config *split_link = &host->split_link;
  961. supported = utils->read_bool(utils->data, "qcom,split-link-enabled");
  962. if (!supported) {
  963. DSI_DEBUG("[%s] Split link is not supported\n", name);
  964. split_link->split_link_enabled = false;
  965. return;
  966. }
  967. rc = utils->read_u32(utils->data, "qcom,sublinks-count", &val);
  968. if (rc || val < 1) {
  969. DSI_DEBUG("[%s] Using default sublinks count\n", name);
  970. split_link->num_sublinks = 2;
  971. } else {
  972. split_link->num_sublinks = val;
  973. }
  974. rc = utils->read_u32(utils->data, "qcom,lanes-per-sublink", &val);
  975. if (rc || val < 1) {
  976. DSI_DEBUG("[%s] Using default lanes per sublink\n", name);
  977. split_link->lanes_per_sublink = 2;
  978. } else {
  979. split_link->lanes_per_sublink = val;
  980. }
  981. DSI_DEBUG("[%s] Split link is supported %d-%d\n", name,
  982. split_link->num_sublinks, split_link->lanes_per_sublink);
  983. split_link->split_link_enabled = true;
  984. }
  985. static int dsi_panel_parse_host_config(struct dsi_panel *panel)
  986. {
  987. int rc = 0;
  988. struct dsi_parser_utils *utils = &panel->utils;
  989. rc = dsi_panel_parse_pixel_format(&panel->host_config, utils,
  990. panel->name);
  991. if (rc) {
  992. DSI_ERR("[%s] failed to get pixel format, rc=%d\n",
  993. panel->name, rc);
  994. goto error;
  995. }
  996. rc = dsi_panel_parse_lane_states(&panel->host_config, utils,
  997. panel->name);
  998. if (rc) {
  999. DSI_ERR("[%s] failed to parse lane states, rc=%d\n",
  1000. panel->name, rc);
  1001. goto error;
  1002. }
  1003. rc = dsi_panel_parse_color_swap(&panel->host_config, utils,
  1004. panel->name);
  1005. if (rc) {
  1006. DSI_ERR("[%s] failed to parse color swap config, rc=%d\n",
  1007. panel->name, rc);
  1008. goto error;
  1009. }
  1010. rc = dsi_panel_parse_triggers(&panel->host_config, utils,
  1011. panel->name);
  1012. if (rc) {
  1013. DSI_ERR("[%s] failed to parse triggers, rc=%d\n",
  1014. panel->name, rc);
  1015. goto error;
  1016. }
  1017. rc = dsi_panel_parse_misc_host_config(&panel->host_config, utils,
  1018. panel->name);
  1019. if (rc) {
  1020. DSI_ERR("[%s] failed to parse misc host config, rc=%d\n",
  1021. panel->name, rc);
  1022. goto error;
  1023. }
  1024. dsi_panel_parse_split_link_config(&panel->host_config, utils,
  1025. panel->name);
  1026. error:
  1027. return rc;
  1028. }
  1029. static int dsi_panel_parse_qsync_caps(struct dsi_panel *panel,
  1030. struct device_node *of_node)
  1031. {
  1032. int rc = 0;
  1033. u32 val = 0, i;
  1034. struct dsi_qsync_capabilities *qsync_caps = &panel->qsync_caps;
  1035. struct dsi_parser_utils *utils = &panel->utils;
  1036. const char *name = panel->name;
  1037. /**
  1038. * "mdss-dsi-qsync-min-refresh-rate" is defined in cmd mode and
  1039. * video mode when there is only one qsync min fps present.
  1040. */
  1041. rc = of_property_read_u32(of_node,
  1042. "qcom,mdss-dsi-qsync-min-refresh-rate",
  1043. &val);
  1044. if (rc)
  1045. DSI_DEBUG("[%s] qsync min fps not defined rc:%d\n",
  1046. panel->name, rc);
  1047. qsync_caps->qsync_min_fps = val;
  1048. /**
  1049. * "dsi-supported-qsync-min-fps-list" may be defined in video
  1050. * mode, only in dfps case when "qcom,dsi-supported-dfps-list"
  1051. * is defined.
  1052. */
  1053. qsync_caps->qsync_min_fps_list_len = utils->count_u32_elems(utils->data,
  1054. "qcom,dsi-supported-qsync-min-fps-list");
  1055. if (qsync_caps->qsync_min_fps_list_len < 1)
  1056. goto qsync_support;
  1057. /**
  1058. * qcom,dsi-supported-qsync-min-fps-list cannot be defined
  1059. * along with qcom,mdss-dsi-qsync-min-refresh-rate.
  1060. */
  1061. if (qsync_caps->qsync_min_fps_list_len >= 1 &&
  1062. qsync_caps->qsync_min_fps) {
  1063. DSI_ERR("[%s] Both qsync nodes are defined\n",
  1064. name);
  1065. rc = -EINVAL;
  1066. goto error;
  1067. }
  1068. if (panel->dfps_caps.dfps_list_len !=
  1069. qsync_caps->qsync_min_fps_list_len) {
  1070. DSI_ERR("[%s] Qsync min fps list mismatch with dfps\n", name);
  1071. rc = -EINVAL;
  1072. goto error;
  1073. }
  1074. qsync_caps->qsync_min_fps_list =
  1075. kcalloc(qsync_caps->qsync_min_fps_list_len, sizeof(u32),
  1076. GFP_KERNEL);
  1077. if (!qsync_caps->qsync_min_fps_list) {
  1078. rc = -ENOMEM;
  1079. goto error;
  1080. }
  1081. rc = utils->read_u32_array(utils->data,
  1082. "qcom,dsi-supported-qsync-min-fps-list",
  1083. qsync_caps->qsync_min_fps_list,
  1084. qsync_caps->qsync_min_fps_list_len);
  1085. if (rc) {
  1086. DSI_ERR("[%s] Qsync min fps list parse failed\n", name);
  1087. rc = -EINVAL;
  1088. goto error;
  1089. }
  1090. qsync_caps->qsync_min_fps = qsync_caps->qsync_min_fps_list[0];
  1091. for (i = 1; i < qsync_caps->qsync_min_fps_list_len; i++) {
  1092. if (qsync_caps->qsync_min_fps_list[i] <
  1093. qsync_caps->qsync_min_fps)
  1094. qsync_caps->qsync_min_fps =
  1095. qsync_caps->qsync_min_fps_list[i];
  1096. }
  1097. qsync_support:
  1098. /* allow qsync support only if DFPS is with VFP approach */
  1099. if ((panel->dfps_caps.dfps_support) &&
  1100. !(panel->dfps_caps.type == DSI_DFPS_IMMEDIATE_VFP))
  1101. panel->qsync_caps.qsync_min_fps = 0;
  1102. error:
  1103. if (rc < 0) {
  1104. qsync_caps->qsync_min_fps = 0;
  1105. qsync_caps->qsync_min_fps_list_len = 0;
  1106. }
  1107. return rc;
  1108. }
  1109. static int dsi_panel_parse_dyn_clk_list(struct dsi_display_mode *mode,
  1110. struct dsi_parser_utils *utils)
  1111. {
  1112. int i, rc = 0;
  1113. struct dyn_clk_list *bit_clk_list;
  1114. if (!mode || !mode->priv_info) {
  1115. DSI_ERR("invalid arguments\n");
  1116. return -EINVAL;
  1117. }
  1118. bit_clk_list = &mode->priv_info->bit_clk_list;
  1119. bit_clk_list->count = utils->count_u32_elems(utils->data, "qcom,dsi-dyn-clk-list");
  1120. if (bit_clk_list->count < 1)
  1121. return 0;
  1122. bit_clk_list->rates = kcalloc(bit_clk_list->count, sizeof(u32), GFP_KERNEL);
  1123. if (!bit_clk_list->rates) {
  1124. DSI_ERR("failed to allocate space for bit clock list\n");
  1125. return -ENOMEM;
  1126. }
  1127. rc = utils->read_u32_array(utils->data, "qcom,dsi-dyn-clk-list",
  1128. bit_clk_list->rates, bit_clk_list->count);
  1129. if (rc) {
  1130. DSI_ERR("failed to parse supported bit clk list, rc=%d\n", rc);
  1131. return -EINVAL;
  1132. }
  1133. for (i = 0; i < bit_clk_list->count; i++)
  1134. DSI_DEBUG("bit clk rate[%d]:%d\n", i, bit_clk_list->rates[i]);
  1135. return 0;
  1136. }
  1137. static int dsi_panel_parse_dyn_clk_caps(struct dsi_panel *panel)
  1138. {
  1139. int rc = 0;
  1140. bool supported = false;
  1141. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  1142. struct dsi_parser_utils *utils = &panel->utils;
  1143. const char *type;
  1144. supported = utils->read_bool(utils->data, "qcom,dsi-dyn-clk-enable");
  1145. if (!supported) {
  1146. dyn_clk_caps->dyn_clk_support = false;
  1147. return rc;
  1148. }
  1149. dyn_clk_caps->dyn_clk_support = true;
  1150. type = utils->get_property(utils->data,
  1151. "qcom,dsi-dyn-clk-type", NULL);
  1152. if (!type) {
  1153. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1154. dyn_clk_caps->maintain_const_fps = false;
  1155. return 0;
  1156. }
  1157. if (!strcmp(type, "constant-fps-adjust-hfp")) {
  1158. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_HFP;
  1159. dyn_clk_caps->maintain_const_fps = true;
  1160. } else if (!strcmp(type, "constant-fps-adjust-vfp")) {
  1161. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_VFP;
  1162. dyn_clk_caps->maintain_const_fps = true;
  1163. } else {
  1164. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1165. dyn_clk_caps->maintain_const_fps = false;
  1166. }
  1167. DSI_DEBUG("Dynamic clock type is [%s]\n", type);
  1168. return 0;
  1169. }
  1170. static int dsi_panel_parse_dfps_caps(struct dsi_panel *panel)
  1171. {
  1172. int rc = 0;
  1173. bool supported = false;
  1174. struct dsi_dfps_capabilities *dfps_caps = &panel->dfps_caps;
  1175. struct dsi_parser_utils *utils = &panel->utils;
  1176. const char *name = panel->name;
  1177. const char *type;
  1178. u32 i;
  1179. supported = utils->read_bool(utils->data,
  1180. "qcom,mdss-dsi-pan-enable-dynamic-fps");
  1181. if (!supported) {
  1182. DSI_DEBUG("[%s] DFPS is not supported\n", name);
  1183. dfps_caps->dfps_support = false;
  1184. return rc;
  1185. }
  1186. type = utils->get_property(utils->data,
  1187. "qcom,mdss-dsi-pan-fps-update", NULL);
  1188. if (!type) {
  1189. DSI_ERR("[%s] dfps type not defined\n", name);
  1190. rc = -EINVAL;
  1191. goto error;
  1192. } else if (!strcmp(type, "dfps_suspend_resume_mode")) {
  1193. dfps_caps->type = DSI_DFPS_SUSPEND_RESUME;
  1194. } else if (!strcmp(type, "dfps_immediate_clk_mode")) {
  1195. dfps_caps->type = DSI_DFPS_IMMEDIATE_CLK;
  1196. } else if (!strcmp(type, "dfps_immediate_porch_mode_hfp")) {
  1197. dfps_caps->type = DSI_DFPS_IMMEDIATE_HFP;
  1198. } else if (!strcmp(type, "dfps_immediate_porch_mode_vfp")) {
  1199. dfps_caps->type = DSI_DFPS_IMMEDIATE_VFP;
  1200. } else {
  1201. DSI_ERR("[%s] dfps type is not recognized\n", name);
  1202. rc = -EINVAL;
  1203. goto error;
  1204. }
  1205. dfps_caps->dfps_list_len = utils->count_u32_elems(utils->data,
  1206. "qcom,dsi-supported-dfps-list");
  1207. if (dfps_caps->dfps_list_len < 1) {
  1208. DSI_ERR("[%s] dfps refresh list not present\n", name);
  1209. rc = -EINVAL;
  1210. goto error;
  1211. }
  1212. dfps_caps->dfps_list = kcalloc(dfps_caps->dfps_list_len, sizeof(u32),
  1213. GFP_KERNEL);
  1214. if (!dfps_caps->dfps_list) {
  1215. rc = -ENOMEM;
  1216. goto error;
  1217. }
  1218. rc = utils->read_u32_array(utils->data,
  1219. "qcom,dsi-supported-dfps-list",
  1220. dfps_caps->dfps_list,
  1221. dfps_caps->dfps_list_len);
  1222. if (rc) {
  1223. DSI_ERR("[%s] dfps refresh rate list parse failed\n", name);
  1224. rc = -EINVAL;
  1225. goto error;
  1226. }
  1227. dfps_caps->dfps_support = true;
  1228. /* calculate max and min fps */
  1229. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[0];
  1230. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[0];
  1231. for (i = 1; i < dfps_caps->dfps_list_len; i++) {
  1232. if (dfps_caps->dfps_list[i] < dfps_caps->min_refresh_rate)
  1233. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[i];
  1234. else if (dfps_caps->dfps_list[i] > dfps_caps->max_refresh_rate)
  1235. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[i];
  1236. }
  1237. error:
  1238. return rc;
  1239. }
  1240. static int dsi_panel_parse_video_host_config(struct dsi_video_engine_cfg *cfg,
  1241. struct dsi_parser_utils *utils,
  1242. const char *name)
  1243. {
  1244. int rc = 0;
  1245. const char *traffic_mode;
  1246. u32 vc_id = 0;
  1247. u32 val = 0;
  1248. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-pulse", &val);
  1249. if (rc) {
  1250. DSI_DEBUG("[%s] fallback to default h-sync-pulse\n", name);
  1251. cfg->pulse_mode_hsa_he = false;
  1252. } else if (val == 1) {
  1253. cfg->pulse_mode_hsa_he = true;
  1254. } else if (val == 0) {
  1255. cfg->pulse_mode_hsa_he = false;
  1256. } else {
  1257. DSI_ERR("[%s] Unrecognized value for mdss-dsi-h-sync-pulse\n",
  1258. name);
  1259. rc = -EINVAL;
  1260. goto error;
  1261. }
  1262. cfg->hfp_lp11_en = utils->read_bool(utils->data,
  1263. "qcom,mdss-dsi-hfp-power-mode");
  1264. cfg->hbp_lp11_en = utils->read_bool(utils->data,
  1265. "qcom,mdss-dsi-hbp-power-mode");
  1266. cfg->hsa_lp11_en = utils->read_bool(utils->data,
  1267. "qcom,mdss-dsi-hsa-power-mode");
  1268. cfg->last_line_interleave_en = utils->read_bool(utils->data,
  1269. "qcom,mdss-dsi-last-line-interleave");
  1270. cfg->eof_bllp_lp11_en = utils->read_bool(utils->data,
  1271. "qcom,mdss-dsi-bllp-eof-power-mode");
  1272. cfg->bllp_lp11_en = utils->read_bool(utils->data,
  1273. "qcom,mdss-dsi-bllp-power-mode");
  1274. traffic_mode = utils->get_property(utils->data,
  1275. "qcom,mdss-dsi-traffic-mode",
  1276. NULL);
  1277. if (!traffic_mode) {
  1278. DSI_DEBUG("[%s] Falling back to default traffic mode\n", name);
  1279. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1280. } else if (!strcmp(traffic_mode, "non_burst_sync_pulse")) {
  1281. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1282. } else if (!strcmp(traffic_mode, "non_burst_sync_event")) {
  1283. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_START_EVENTS;
  1284. } else if (!strcmp(traffic_mode, "burst_mode")) {
  1285. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_BURST_MODE;
  1286. } else {
  1287. DSI_ERR("[%s] Unrecognized traffic mode-%s\n", name,
  1288. traffic_mode);
  1289. rc = -EINVAL;
  1290. goto error;
  1291. }
  1292. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-virtual-channel-id",
  1293. &vc_id);
  1294. if (rc) {
  1295. DSI_DEBUG("[%s] Fallback to default vc id\n", name);
  1296. cfg->vc_id = 0;
  1297. } else {
  1298. cfg->vc_id = vc_id;
  1299. }
  1300. error:
  1301. return rc;
  1302. }
  1303. static int dsi_panel_parse_cmd_host_config(struct dsi_cmd_engine_cfg *cfg,
  1304. struct dsi_parser_utils *utils,
  1305. const char *name)
  1306. {
  1307. u32 val = 0;
  1308. int rc = 0;
  1309. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-start", &val);
  1310. if (rc) {
  1311. DSI_DEBUG("[%s] Fallback to default wr-mem-start\n", name);
  1312. cfg->wr_mem_start = 0x2C;
  1313. } else {
  1314. cfg->wr_mem_start = val;
  1315. }
  1316. val = 0;
  1317. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-continue",
  1318. &val);
  1319. if (rc) {
  1320. DSI_DEBUG("[%s] Fallback to default wr-mem-continue\n", name);
  1321. cfg->wr_mem_continue = 0x3C;
  1322. } else {
  1323. cfg->wr_mem_continue = val;
  1324. }
  1325. /* TODO: fix following */
  1326. cfg->max_cmd_packets_interleave = 0;
  1327. val = 0;
  1328. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-dcs-command",
  1329. &val);
  1330. if (rc) {
  1331. DSI_DEBUG("[%s] fallback to default te-dcs-cmd\n", name);
  1332. cfg->insert_dcs_command = true;
  1333. } else if (val == 1) {
  1334. cfg->insert_dcs_command = true;
  1335. } else if (val == 0) {
  1336. cfg->insert_dcs_command = false;
  1337. } else {
  1338. DSI_ERR("[%s] Unrecognized value for mdss-dsi-te-dcs-command\n",
  1339. name);
  1340. rc = -EINVAL;
  1341. goto error;
  1342. }
  1343. error:
  1344. return rc;
  1345. }
  1346. static int dsi_panel_parse_panel_mode(struct dsi_panel *panel)
  1347. {
  1348. int rc = 0;
  1349. struct dsi_parser_utils *utils = &panel->utils;
  1350. bool panel_mode_switch_enabled;
  1351. enum dsi_op_mode panel_mode;
  1352. const char *mode;
  1353. mode = utils->get_property(utils->data,
  1354. "qcom,mdss-dsi-panel-type", NULL);
  1355. if (!mode) {
  1356. DSI_DEBUG("[%s] Fallback to default panel mode\n", panel->name);
  1357. panel_mode = DSI_OP_VIDEO_MODE;
  1358. } else if (!strcmp(mode, "dsi_video_mode")) {
  1359. panel_mode = DSI_OP_VIDEO_MODE;
  1360. } else if (!strcmp(mode, "dsi_cmd_mode")) {
  1361. panel_mode = DSI_OP_CMD_MODE;
  1362. } else {
  1363. DSI_ERR("[%s] Unrecognized panel type-%s\n", panel->name, mode);
  1364. rc = -EINVAL;
  1365. goto error;
  1366. }
  1367. panel_mode_switch_enabled = utils->read_bool(utils->data,
  1368. "qcom,mdss-dsi-panel-mode-switch");
  1369. DSI_DEBUG("%s: panel operating mode switch feature %s\n", __func__,
  1370. (panel_mode_switch_enabled ? "enabled" : "disabled"));
  1371. if (panel_mode == DSI_OP_VIDEO_MODE || panel_mode_switch_enabled) {
  1372. rc = dsi_panel_parse_video_host_config(&panel->video_config,
  1373. utils,
  1374. panel->name);
  1375. if (rc) {
  1376. DSI_ERR("[%s] Failed to parse video host cfg, rc=%d\n",
  1377. panel->name, rc);
  1378. goto error;
  1379. }
  1380. }
  1381. if (panel_mode == DSI_OP_CMD_MODE || panel_mode_switch_enabled) {
  1382. rc = dsi_panel_parse_cmd_host_config(&panel->cmd_config,
  1383. utils,
  1384. panel->name);
  1385. if (rc) {
  1386. DSI_ERR("[%s] Failed to parse cmd host config, rc=%d\n",
  1387. panel->name, rc);
  1388. goto error;
  1389. }
  1390. }
  1391. panel->poms_align_vsync = utils->read_bool(utils->data,
  1392. "qcom,poms-align-panel-vsync");
  1393. panel->panel_mode = panel_mode;
  1394. panel->panel_mode_switch_enabled = panel_mode_switch_enabled;
  1395. error:
  1396. return rc;
  1397. }
  1398. static int dsi_panel_parse_phy_props(struct dsi_panel *panel)
  1399. {
  1400. int rc = 0;
  1401. u32 val = 0;
  1402. const char *str;
  1403. struct dsi_panel_phy_props *props = &panel->phy_props;
  1404. struct dsi_parser_utils *utils = &panel->utils;
  1405. const char *name = panel->name;
  1406. rc = utils->read_u32(utils->data,
  1407. "qcom,mdss-pan-physical-width-dimension", &val);
  1408. if (rc) {
  1409. DSI_DEBUG("[%s] Physical panel width is not defined\n", name);
  1410. props->panel_width_mm = 0;
  1411. rc = 0;
  1412. } else {
  1413. props->panel_width_mm = val;
  1414. }
  1415. rc = utils->read_u32(utils->data,
  1416. "qcom,mdss-pan-physical-height-dimension",
  1417. &val);
  1418. if (rc) {
  1419. DSI_DEBUG("[%s] Physical panel height is not defined\n", name);
  1420. props->panel_height_mm = 0;
  1421. rc = 0;
  1422. } else {
  1423. props->panel_height_mm = val;
  1424. }
  1425. str = utils->get_property(utils->data,
  1426. "qcom,mdss-dsi-panel-orientation", NULL);
  1427. if (!str) {
  1428. props->rotation = DSI_PANEL_ROTATE_NONE;
  1429. } else if (!strcmp(str, "180")) {
  1430. props->rotation = DSI_PANEL_ROTATE_HV_FLIP;
  1431. } else if (!strcmp(str, "hflip")) {
  1432. props->rotation = DSI_PANEL_ROTATE_H_FLIP;
  1433. } else if (!strcmp(str, "vflip")) {
  1434. props->rotation = DSI_PANEL_ROTATE_V_FLIP;
  1435. } else {
  1436. DSI_ERR("[%s] Unrecognized panel rotation-%s\n", name, str);
  1437. rc = -EINVAL;
  1438. goto error;
  1439. }
  1440. error:
  1441. return rc;
  1442. }
  1443. const char *cmd_set_prop_map[DSI_CMD_SET_MAX] = {
  1444. "qcom,mdss-dsi-pre-on-command",
  1445. "qcom,mdss-dsi-on-command",
  1446. "qcom,vid-on-commands",
  1447. "qcom,cmd-on-commands",
  1448. "qcom,mdss-dsi-post-panel-on-command",
  1449. "qcom,mdss-dsi-pre-off-command",
  1450. "qcom,mdss-dsi-off-command",
  1451. "qcom,mdss-dsi-post-off-command",
  1452. "qcom,mdss-dsi-pre-res-switch",
  1453. "qcom,mdss-dsi-res-switch",
  1454. "qcom,mdss-dsi-post-res-switch",
  1455. "qcom,video-mode-switch-in-commands",
  1456. "qcom,video-mode-switch-out-commands",
  1457. "qcom,cmd-mode-switch-in-commands",
  1458. "qcom,cmd-mode-switch-out-commands",
  1459. "qcom,mdss-dsi-panel-status-command",
  1460. "qcom,mdss-dsi-lp1-command",
  1461. "qcom,mdss-dsi-lp2-command",
  1462. "qcom,mdss-dsi-nolp-command",
  1463. "PPS not parsed from DTSI, generated dynamically",
  1464. "ROI not parsed from DTSI, generated dynamically",
  1465. "qcom,mdss-dsi-timing-switch-command",
  1466. "qcom,mdss-dsi-post-mode-switch-on-command",
  1467. "qcom,mdss-dsi-qsync-on-commands",
  1468. "qcom,mdss-dsi-qsync-off-commands",
  1469. };
  1470. const char *cmd_set_state_map[DSI_CMD_SET_MAX] = {
  1471. "qcom,mdss-dsi-pre-on-command-state",
  1472. "qcom,mdss-dsi-on-command-state",
  1473. "qcom,vid-on-commands-state",
  1474. "qcom,cmd-on-commands-state",
  1475. "qcom,mdss-dsi-post-on-command-state",
  1476. "qcom,mdss-dsi-pre-off-command-state",
  1477. "qcom,mdss-dsi-off-command-state",
  1478. "qcom,mdss-dsi-post-off-command-state",
  1479. "qcom,mdss-dsi-pre-res-switch-state",
  1480. "qcom,mdss-dsi-res-switch-state",
  1481. "qcom,mdss-dsi-post-res-switch-state",
  1482. "qcom,video-mode-switch-in-commands-state",
  1483. "qcom,video-mode-switch-out-commands-state",
  1484. "qcom,cmd-mode-switch-in-commands-state",
  1485. "qcom,cmd-mode-switch-out-commands-state",
  1486. "qcom,mdss-dsi-panel-status-command-state",
  1487. "qcom,mdss-dsi-lp1-command-state",
  1488. "qcom,mdss-dsi-lp2-command-state",
  1489. "qcom,mdss-dsi-nolp-command-state",
  1490. "PPS not parsed from DTSI, generated dynamically",
  1491. "ROI not parsed from DTSI, generated dynamically",
  1492. "qcom,mdss-dsi-timing-switch-command-state",
  1493. "qcom,mdss-dsi-post-mode-switch-on-command-state",
  1494. "qcom,mdss-dsi-qsync-on-commands-state",
  1495. "qcom,mdss-dsi-qsync-off-commands-state",
  1496. };
  1497. int dsi_panel_get_cmd_pkt_count(const char *data, u32 length, u32 *cnt)
  1498. {
  1499. const u32 cmd_set_min_size = 7;
  1500. u32 count = 0;
  1501. u32 packet_length;
  1502. u32 tmp;
  1503. while (length >= cmd_set_min_size) {
  1504. packet_length = cmd_set_min_size;
  1505. tmp = ((data[5] << 8) | (data[6]));
  1506. packet_length += tmp;
  1507. if (packet_length > length) {
  1508. DSI_ERR("format error\n");
  1509. return -EINVAL;
  1510. }
  1511. length -= packet_length;
  1512. data += packet_length;
  1513. count++;
  1514. }
  1515. *cnt = count;
  1516. return 0;
  1517. }
  1518. int dsi_panel_create_cmd_packets(const char *data,
  1519. u32 length,
  1520. u32 count,
  1521. struct dsi_cmd_desc *cmd)
  1522. {
  1523. int rc = 0;
  1524. int i, j;
  1525. u8 *payload;
  1526. for (i = 0; i < count; i++) {
  1527. u32 size;
  1528. cmd[i].msg.type = data[0];
  1529. cmd[i].msg.channel = data[2];
  1530. cmd[i].msg.flags |= data[3];
  1531. cmd[i].ctrl = 0;
  1532. cmd[i].post_wait_ms = data[4];
  1533. cmd[i].msg.tx_len = ((data[5] << 8) | (data[6]));
  1534. if (cmd[i].msg.flags & MIPI_DSI_MSG_BATCH_COMMAND)
  1535. cmd[i].last_command = false;
  1536. else
  1537. cmd[i].last_command = true;
  1538. size = cmd[i].msg.tx_len * sizeof(u8);
  1539. payload = kzalloc(size, GFP_KERNEL);
  1540. if (!payload) {
  1541. rc = -ENOMEM;
  1542. goto error_free_payloads;
  1543. }
  1544. for (j = 0; j < cmd[i].msg.tx_len; j++)
  1545. payload[j] = data[7 + j];
  1546. cmd[i].msg.tx_buf = payload;
  1547. data += (7 + cmd[i].msg.tx_len);
  1548. }
  1549. return rc;
  1550. error_free_payloads:
  1551. for (i = i - 1; i >= 0; i--) {
  1552. cmd--;
  1553. kfree(cmd->msg.tx_buf);
  1554. }
  1555. return rc;
  1556. }
  1557. void dsi_panel_destroy_cmd_packets(struct dsi_panel_cmd_set *set)
  1558. {
  1559. u32 i = 0;
  1560. struct dsi_cmd_desc *cmd;
  1561. for (i = 0; i < set->count; i++) {
  1562. cmd = &set->cmds[i];
  1563. kfree(cmd->msg.tx_buf);
  1564. }
  1565. }
  1566. void dsi_panel_dealloc_cmd_packets(struct dsi_panel_cmd_set *set)
  1567. {
  1568. kfree(set->cmds);
  1569. }
  1570. int dsi_panel_alloc_cmd_packets(struct dsi_panel_cmd_set *cmd,
  1571. u32 packet_count)
  1572. {
  1573. u32 size;
  1574. size = packet_count * sizeof(*cmd->cmds);
  1575. cmd->cmds = kzalloc(size, GFP_KERNEL);
  1576. if (!cmd->cmds)
  1577. return -ENOMEM;
  1578. cmd->count = packet_count;
  1579. return 0;
  1580. }
  1581. static int dsi_panel_parse_cmd_sets_sub(struct dsi_panel_cmd_set *cmd,
  1582. enum dsi_cmd_set_type type,
  1583. struct dsi_parser_utils *utils)
  1584. {
  1585. int rc = 0;
  1586. u32 length = 0;
  1587. const char *data;
  1588. const char *state;
  1589. u32 packet_count = 0;
  1590. data = utils->get_property(utils->data, cmd_set_prop_map[type],
  1591. &length);
  1592. if (!data) {
  1593. DSI_DEBUG("%s commands not defined\n", cmd_set_prop_map[type]);
  1594. rc = -ENOTSUPP;
  1595. goto error;
  1596. }
  1597. DSI_DEBUG("type=%d, name=%s, length=%d\n", type, cmd_set_prop_map[type], length);
  1598. print_hex_dump_debug("", DUMP_PREFIX_NONE, 8, 1, data, length, false);
  1599. rc = dsi_panel_get_cmd_pkt_count(data, length, &packet_count);
  1600. if (rc) {
  1601. DSI_ERR("commands failed, rc=%d\n", rc);
  1602. goto error;
  1603. }
  1604. DSI_DEBUG("[%s] packet-count=%d, %d\n", cmd_set_prop_map[type],
  1605. packet_count, length);
  1606. rc = dsi_panel_alloc_cmd_packets(cmd, packet_count);
  1607. if (rc) {
  1608. DSI_ERR("failed to allocate cmd packets, rc=%d\n", rc);
  1609. goto error;
  1610. }
  1611. rc = dsi_panel_create_cmd_packets(data, length, packet_count,
  1612. cmd->cmds);
  1613. if (rc) {
  1614. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  1615. goto error_free_mem;
  1616. }
  1617. state = utils->get_property(utils->data, cmd_set_state_map[type], NULL);
  1618. if (!state || !strcmp(state, "dsi_lp_mode")) {
  1619. cmd->state = DSI_CMD_SET_STATE_LP;
  1620. } else if (!strcmp(state, "dsi_hs_mode")) {
  1621. cmd->state = DSI_CMD_SET_STATE_HS;
  1622. } else {
  1623. DSI_ERR("[%s] command state unrecognized-%s\n",
  1624. cmd_set_state_map[type], state);
  1625. goto error_free_mem;
  1626. }
  1627. return rc;
  1628. error_free_mem:
  1629. kfree(cmd->cmds);
  1630. cmd->cmds = NULL;
  1631. error:
  1632. return rc;
  1633. }
  1634. static int dsi_panel_parse_cmd_sets(
  1635. struct dsi_display_mode_priv_info *priv_info,
  1636. struct dsi_parser_utils *utils)
  1637. {
  1638. int rc = 0;
  1639. struct dsi_panel_cmd_set *set;
  1640. u32 i;
  1641. if (!priv_info) {
  1642. DSI_ERR("invalid mode priv info\n");
  1643. return -EINVAL;
  1644. }
  1645. for (i = DSI_CMD_SET_PRE_ON; i < DSI_CMD_SET_MAX; i++) {
  1646. set = &priv_info->cmd_sets[i];
  1647. set->type = i;
  1648. set->count = 0;
  1649. if (i == DSI_CMD_SET_PPS) {
  1650. rc = dsi_panel_alloc_cmd_packets(set, 1);
  1651. if (rc)
  1652. DSI_ERR("failed to allocate cmd set %d, rc = %d\n",
  1653. i, rc);
  1654. set->state = DSI_CMD_SET_STATE_LP;
  1655. } else {
  1656. rc = dsi_panel_parse_cmd_sets_sub(set, i, utils);
  1657. if (rc)
  1658. DSI_DEBUG("failed to parse set %d\n", i);
  1659. }
  1660. }
  1661. rc = 0;
  1662. return rc;
  1663. }
  1664. static int dsi_panel_parse_reset_sequence(struct dsi_panel *panel)
  1665. {
  1666. int rc = 0;
  1667. int i;
  1668. u32 length = 0;
  1669. u32 count = 0;
  1670. u32 size = 0;
  1671. u32 *arr_32 = NULL;
  1672. const u32 *arr;
  1673. struct dsi_parser_utils *utils = &panel->utils;
  1674. struct dsi_reset_seq *seq;
  1675. if (panel->host_config.ext_bridge_mode)
  1676. return 0;
  1677. arr = utils->get_property(utils->data,
  1678. "qcom,mdss-dsi-reset-sequence", &length);
  1679. if (!arr) {
  1680. DSI_ERR("[%s] dsi-reset-sequence not found\n", panel->name);
  1681. rc = -EINVAL;
  1682. goto error;
  1683. }
  1684. if (length & 0x1) {
  1685. DSI_ERR("[%s] syntax error for dsi-reset-sequence\n",
  1686. panel->name);
  1687. rc = -EINVAL;
  1688. goto error;
  1689. }
  1690. DSI_DEBUG("RESET SEQ LENGTH = %d\n", length);
  1691. length = length / sizeof(u32);
  1692. size = length * sizeof(u32);
  1693. arr_32 = kzalloc(size, GFP_KERNEL);
  1694. if (!arr_32) {
  1695. rc = -ENOMEM;
  1696. goto error;
  1697. }
  1698. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-reset-sequence",
  1699. arr_32, length);
  1700. if (rc) {
  1701. DSI_ERR("[%s] cannot read dso-reset-seqience\n", panel->name);
  1702. goto error_free_arr_32;
  1703. }
  1704. count = length / 2;
  1705. size = count * sizeof(*seq);
  1706. seq = kzalloc(size, GFP_KERNEL);
  1707. if (!seq) {
  1708. rc = -ENOMEM;
  1709. goto error_free_arr_32;
  1710. }
  1711. panel->reset_config.sequence = seq;
  1712. panel->reset_config.count = count;
  1713. for (i = 0; i < length; i += 2) {
  1714. seq->level = arr_32[i];
  1715. seq->sleep_ms = arr_32[i + 1];
  1716. seq++;
  1717. }
  1718. error_free_arr_32:
  1719. kfree(arr_32);
  1720. error:
  1721. return rc;
  1722. }
  1723. static int dsi_panel_parse_misc_features(struct dsi_panel *panel)
  1724. {
  1725. struct dsi_parser_utils *utils = &panel->utils;
  1726. const char *string;
  1727. int i, rc = 0;
  1728. panel->ulps_feature_enabled =
  1729. utils->read_bool(utils->data, "qcom,ulps-enabled");
  1730. DSI_DEBUG("%s: ulps feature %s\n", __func__,
  1731. (panel->ulps_feature_enabled ? "enabled" : "disabled"));
  1732. panel->ulps_suspend_enabled =
  1733. utils->read_bool(utils->data, "qcom,suspend-ulps-enabled");
  1734. DSI_DEBUG("%s: ulps during suspend feature %s\n", __func__,
  1735. (panel->ulps_suspend_enabled ? "enabled" : "disabled"));
  1736. panel->te_using_watchdog_timer = utils->read_bool(utils->data,
  1737. "qcom,mdss-dsi-te-using-wd");
  1738. panel->sync_broadcast_en = utils->read_bool(utils->data,
  1739. "qcom,cmd-sync-wait-broadcast");
  1740. panel->lp11_init = utils->read_bool(utils->data,
  1741. "qcom,mdss-dsi-lp11-init");
  1742. panel->reset_gpio_always_on = utils->read_bool(utils->data,
  1743. "qcom,platform-reset-gpio-always-on");
  1744. panel->spr_info.enable = false;
  1745. panel->spr_info.pack_type = MSM_DISPLAY_SPR_TYPE_MAX;
  1746. rc = utils->read_string(utils->data, "qcom,spr-pack-type", &string);
  1747. if (!rc) {
  1748. // find match for pack-type string
  1749. for (i = 0; i < MSM_DISPLAY_SPR_TYPE_MAX; i++) {
  1750. if (msm_spr_pack_type_str[i] &&
  1751. (!strcmp(string, msm_spr_pack_type_str[i]))) {
  1752. panel->spr_info.enable = true;
  1753. panel->spr_info.pack_type = i;
  1754. break;
  1755. }
  1756. }
  1757. }
  1758. pr_debug("%s source side spr packing, pack-type %s\n",
  1759. panel->spr_info.enable ? "enable" : "disable",
  1760. panel->spr_info.enable ?
  1761. msm_spr_pack_type_str[panel->spr_info.pack_type] : "none");
  1762. return 0;
  1763. }
  1764. static int dsi_panel_parse_jitter_config(
  1765. struct dsi_display_mode *mode,
  1766. struct dsi_parser_utils *utils)
  1767. {
  1768. int rc;
  1769. struct dsi_display_mode_priv_info *priv_info;
  1770. u32 jitter[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 0};
  1771. u64 jitter_val = 0;
  1772. priv_info = mode->priv_info;
  1773. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-panel-jitter",
  1774. jitter, DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1775. if (rc) {
  1776. DSI_DEBUG("panel jitter not defined rc=%d\n", rc);
  1777. } else {
  1778. jitter_val = jitter[0];
  1779. jitter_val = div_u64(jitter_val, jitter[1]);
  1780. }
  1781. if (rc || !jitter_val || (jitter_val > MAX_PANEL_JITTER)) {
  1782. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1783. priv_info->panel_jitter_denom =
  1784. DEFAULT_PANEL_JITTER_DENOMINATOR;
  1785. } else {
  1786. priv_info->panel_jitter_numer = jitter[0];
  1787. priv_info->panel_jitter_denom = jitter[1];
  1788. }
  1789. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-prefill-lines",
  1790. &priv_info->panel_prefill_lines);
  1791. if (rc) {
  1792. DSI_DEBUG("panel prefill lines are not defined rc=%d\n", rc);
  1793. priv_info->panel_prefill_lines = mode->timing.v_back_porch +
  1794. mode->timing.v_sync_width + mode->timing.v_front_porch;
  1795. } else if (priv_info->panel_prefill_lines >=
  1796. DSI_V_TOTAL(&mode->timing)) {
  1797. DSI_DEBUG("invalid prefill lines config=%d setting to:%d\n",
  1798. priv_info->panel_prefill_lines, DEFAULT_PANEL_PREFILL_LINES);
  1799. priv_info->panel_prefill_lines = DEFAULT_PANEL_PREFILL_LINES;
  1800. }
  1801. return 0;
  1802. }
  1803. static int dsi_panel_parse_power_cfg(struct dsi_panel *panel)
  1804. {
  1805. int rc = 0;
  1806. char *supply_name;
  1807. if (panel->host_config.ext_bridge_mode)
  1808. return 0;
  1809. if (!strcmp(panel->type, "primary"))
  1810. supply_name = "qcom,panel-supply-entries";
  1811. else
  1812. supply_name = "qcom,panel-sec-supply-entries";
  1813. rc = dsi_pwr_of_get_vreg_data(&panel->utils,
  1814. &panel->power_info, supply_name);
  1815. if (rc) {
  1816. DSI_ERR("[%s] failed to parse vregs\n", panel->name);
  1817. goto error;
  1818. }
  1819. error:
  1820. return rc;
  1821. }
  1822. int dsi_panel_get_io_resources(struct dsi_panel *panel,
  1823. struct msm_io_res *io_res)
  1824. {
  1825. struct list_head temp_head;
  1826. struct msm_io_mem_entry *io_mem, *pos, *tmp;
  1827. struct list_head *mem_list = &io_res->mem;
  1828. int i, rc = 0;
  1829. INIT_LIST_HEAD(&temp_head);
  1830. for (i = 0; i < panel->tlmm_gpio_count; i++) {
  1831. io_mem = kzalloc(sizeof(*io_mem), GFP_KERNEL);
  1832. if (!io_mem) {
  1833. rc = -ENOMEM;
  1834. goto parse_fail;
  1835. }
  1836. io_mem->base = panel->tlmm_gpio[i].addr;
  1837. io_mem->size = panel->tlmm_gpio[i].size;
  1838. list_add(&io_mem->list, &temp_head);
  1839. }
  1840. list_splice(&temp_head, mem_list);
  1841. goto end;
  1842. parse_fail:
  1843. list_for_each_entry_safe(pos, tmp, &temp_head, list) {
  1844. list_del(&pos->list);
  1845. kfree(pos);
  1846. }
  1847. end:
  1848. return rc;
  1849. }
  1850. static int dsi_panel_parse_gpios(struct dsi_panel *panel)
  1851. {
  1852. int rc = 0;
  1853. const char *data;
  1854. struct dsi_parser_utils *utils = &panel->utils;
  1855. char *reset_gpio_name, *mode_set_gpio_name;
  1856. if (!strcmp(panel->type, "primary")) {
  1857. reset_gpio_name = "qcom,platform-reset-gpio";
  1858. mode_set_gpio_name = "qcom,panel-mode-gpio";
  1859. } else {
  1860. reset_gpio_name = "qcom,platform-sec-reset-gpio";
  1861. mode_set_gpio_name = "qcom,panel-sec-mode-gpio";
  1862. }
  1863. panel->reset_config.reset_gpio = utils->get_named_gpio(utils->data,
  1864. reset_gpio_name, 0);
  1865. if (!gpio_is_valid(panel->reset_config.reset_gpio) &&
  1866. !panel->host_config.ext_bridge_mode) {
  1867. rc = panel->reset_config.reset_gpio;
  1868. DSI_ERR("[%s] failed get reset gpio, rc=%d\n", panel->name, rc);
  1869. goto error;
  1870. }
  1871. panel->reset_config.disp_en_gpio = utils->get_named_gpio(utils->data,
  1872. "qcom,5v-boost-gpio",
  1873. 0);
  1874. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1875. DSI_DEBUG("[%s] 5v-boot-gpio is not set, rc=%d\n",
  1876. panel->name, rc);
  1877. panel->reset_config.disp_en_gpio =
  1878. utils->get_named_gpio(utils->data,
  1879. "qcom,platform-en-gpio", 0);
  1880. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1881. DSI_DEBUG("[%s] platform-en-gpio is not set, rc=%d\n",
  1882. panel->name, rc);
  1883. }
  1884. }
  1885. panel->reset_config.lcd_mode_sel_gpio = utils->get_named_gpio(
  1886. utils->data, mode_set_gpio_name, 0);
  1887. if (!gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  1888. DSI_DEBUG("mode gpio not specified\n");
  1889. DSI_DEBUG("mode gpio=%d\n", panel->reset_config.lcd_mode_sel_gpio);
  1890. data = utils->get_property(utils->data,
  1891. "qcom,mdss-dsi-mode-sel-gpio-state", NULL);
  1892. if (data) {
  1893. if (!strcmp(data, "single_port"))
  1894. panel->reset_config.mode_sel_state =
  1895. MODE_SEL_SINGLE_PORT;
  1896. else if (!strcmp(data, "dual_port"))
  1897. panel->reset_config.mode_sel_state =
  1898. MODE_SEL_DUAL_PORT;
  1899. else if (!strcmp(data, "high"))
  1900. panel->reset_config.mode_sel_state =
  1901. MODE_GPIO_HIGH;
  1902. else if (!strcmp(data, "low"))
  1903. panel->reset_config.mode_sel_state =
  1904. MODE_GPIO_LOW;
  1905. } else {
  1906. /* Set default mode as SPLIT mode */
  1907. panel->reset_config.mode_sel_state = MODE_SEL_DUAL_PORT;
  1908. }
  1909. /* TODO: release memory */
  1910. rc = dsi_panel_parse_reset_sequence(panel);
  1911. if (rc) {
  1912. DSI_ERR("[%s] failed to parse reset sequence, rc=%d\n",
  1913. panel->name, rc);
  1914. goto error;
  1915. }
  1916. panel->panel_test_gpio = utils->get_named_gpio(utils->data,
  1917. "qcom,mdss-dsi-panel-test-pin",
  1918. 0);
  1919. if (!gpio_is_valid(panel->panel_test_gpio))
  1920. DSI_DEBUG("%s:%d panel test gpio not specified\n", __func__,
  1921. __LINE__);
  1922. error:
  1923. return rc;
  1924. }
  1925. static int dsi_panel_parse_tlmm_gpio(struct dsi_panel *panel)
  1926. {
  1927. struct dsi_parser_utils *utils = &panel->utils;
  1928. u32 base, size, pin;
  1929. int pin_count, address_count, name_count, i;
  1930. address_count = of_property_count_u32_elems(utils->data,
  1931. "qcom,dsi-panel-gpio-address");
  1932. if (address_count != 2) {
  1933. DSI_DEBUG("panel gpio address not defined\n");
  1934. return 0;
  1935. }
  1936. of_property_read_u32_index(utils->data,
  1937. "qcom,dsi-panel-gpio-address", 0, &base);
  1938. of_property_read_u32_index(utils->data,
  1939. "qcom,dsi-panel-gpio-address", 1, &size);
  1940. pin_count = of_property_count_u32_elems(utils->data,
  1941. "qcom,dsi-panel-gpio-pins");
  1942. name_count = of_property_count_strings(utils->data,
  1943. "qcom,dsi-panel-gpio-names");
  1944. if ((pin_count < 0) || (name_count < 0) || (pin_count != name_count)) {
  1945. DSI_ERR("invalid gpio pins/names\n");
  1946. return -EINVAL;
  1947. }
  1948. panel->tlmm_gpio = kcalloc(pin_count,
  1949. sizeof(struct dsi_tlmm_gpio), GFP_KERNEL);
  1950. if (!panel->tlmm_gpio)
  1951. return -ENOMEM;
  1952. panel->tlmm_gpio_count = pin_count;
  1953. for (i = 0; i < pin_count; i++) {
  1954. of_property_read_u32_index(utils->data,
  1955. "qcom,dsi-panel-gpio-pins", i, &pin);
  1956. panel->tlmm_gpio[i].num = pin;
  1957. panel->tlmm_gpio[i].addr = base + (pin * size);
  1958. panel->tlmm_gpio[i].size = size;
  1959. of_property_read_string_index(utils->data,
  1960. "qcom,dsi-panel-gpio-names", i,
  1961. &(panel->tlmm_gpio[i].name));
  1962. }
  1963. return 0;
  1964. }
  1965. static int dsi_panel_parse_bl_pwm_config(struct dsi_panel *panel)
  1966. {
  1967. int rc = 0;
  1968. u32 val;
  1969. struct dsi_backlight_config *config = &panel->bl_config;
  1970. struct dsi_parser_utils *utils = &panel->utils;
  1971. rc = utils->read_u32(utils->data, "qcom,bl-pmic-pwm-period-usecs",
  1972. &val);
  1973. if (rc) {
  1974. DSI_ERR("bl-pmic-pwm-period-usecs is not defined, rc=%d\n", rc);
  1975. goto error;
  1976. }
  1977. config->pwm_period_usecs = val;
  1978. error:
  1979. return rc;
  1980. }
  1981. static int dsi_panel_parse_bl_config(struct dsi_panel *panel)
  1982. {
  1983. int rc = 0;
  1984. u32 val = 0;
  1985. const char *bl_type = NULL;
  1986. const char *data = NULL;
  1987. const char *state = NULL;
  1988. struct dsi_parser_utils *utils = &panel->utils;
  1989. char *bl_name = NULL;
  1990. if (!strcmp(panel->type, "primary"))
  1991. bl_name = "qcom,mdss-dsi-bl-pmic-control-type";
  1992. else
  1993. bl_name = "qcom,mdss-dsi-sec-bl-pmic-control-type";
  1994. bl_type = utils->get_property(utils->data, bl_name, NULL);
  1995. if (!bl_type) {
  1996. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1997. } else if (!strcmp(bl_type, "bl_ctrl_pwm")) {
  1998. panel->bl_config.type = DSI_BACKLIGHT_PWM;
  1999. } else if (!strcmp(bl_type, "bl_ctrl_wled")) {
  2000. panel->bl_config.type = DSI_BACKLIGHT_WLED;
  2001. } else if (!strcmp(bl_type, "bl_ctrl_dcs")) {
  2002. panel->bl_config.type = DSI_BACKLIGHT_DCS;
  2003. } else if (!strcmp(bl_type, "bl_ctrl_external")) {
  2004. panel->bl_config.type = DSI_BACKLIGHT_EXTERNAL;
  2005. } else {
  2006. DSI_DEBUG("[%s] bl-pmic-control-type unknown-%s\n",
  2007. panel->name, bl_type);
  2008. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  2009. }
  2010. data = utils->get_property(utils->data, "qcom,bl-update-flag", NULL);
  2011. if (!data) {
  2012. panel->bl_config.bl_update = BL_UPDATE_NONE;
  2013. } else if (!strcmp(data, "delay_until_first_frame")) {
  2014. panel->bl_config.bl_update = BL_UPDATE_DELAY_UNTIL_FIRST_FRAME;
  2015. } else {
  2016. DSI_DEBUG("[%s] No valid bl-update-flag: %s\n",
  2017. panel->name, data);
  2018. panel->bl_config.bl_update = BL_UPDATE_NONE;
  2019. }
  2020. panel->bl_config.bl_scale = MAX_BL_SCALE_LEVEL;
  2021. panel->bl_config.bl_scale_sv = MAX_SV_BL_SCALE_LEVEL;
  2022. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-min-level", &val);
  2023. if (rc) {
  2024. DSI_DEBUG("[%s] bl-min-level unspecified, defaulting to zero\n",
  2025. panel->name);
  2026. panel->bl_config.bl_min_level = 0;
  2027. } else {
  2028. panel->bl_config.bl_min_level = val;
  2029. }
  2030. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-max-level", &val);
  2031. if (rc) {
  2032. DSI_DEBUG("[%s] bl-max-level unspecified, defaulting to max level\n",
  2033. panel->name);
  2034. panel->bl_config.bl_max_level = MAX_BL_LEVEL;
  2035. } else {
  2036. panel->bl_config.bl_max_level = val;
  2037. }
  2038. rc = utils->read_u32(utils->data, "qcom,mdss-brightness-max-level",
  2039. &val);
  2040. if (rc) {
  2041. DSI_DEBUG("[%s] brigheness-max-level unspecified, defaulting to 255\n",
  2042. panel->name);
  2043. panel->bl_config.brightness_max_level = 255;
  2044. rc = 0;
  2045. } else {
  2046. panel->bl_config.brightness_max_level = val;
  2047. }
  2048. panel->bl_config.bl_inverted_dbv = utils->read_bool(utils->data,
  2049. "qcom,mdss-dsi-bl-inverted-dbv");
  2050. state = utils->get_property(utils->data, "qcom,bl-dsc-cmd-state", NULL);
  2051. if (!state || !strcmp(state, "dsi_hs_mode"))
  2052. panel->bl_config.lp_mode = false;
  2053. else if (!strcmp(state, "dsi_lp_mode"))
  2054. panel->bl_config.lp_mode = true;
  2055. else
  2056. DSI_ERR("bl-dsc-cmd-state command state unrecognized-%s\n",
  2057. state);
  2058. if (panel->bl_config.type == DSI_BACKLIGHT_PWM) {
  2059. rc = dsi_panel_parse_bl_pwm_config(panel);
  2060. if (rc) {
  2061. DSI_ERR("[%s] failed to parse pwm config, rc=%d\n",
  2062. panel->name, rc);
  2063. goto error;
  2064. }
  2065. }
  2066. panel->bl_config.en_gpio = utils->get_named_gpio(utils->data,
  2067. "qcom,platform-bklight-en-gpio",
  2068. 0);
  2069. if (!gpio_is_valid(panel->bl_config.en_gpio)) {
  2070. if (panel->bl_config.en_gpio == -EPROBE_DEFER) {
  2071. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  2072. panel->name, rc);
  2073. rc = -EPROBE_DEFER;
  2074. goto error;
  2075. } else {
  2076. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  2077. panel->name, rc);
  2078. rc = 0;
  2079. goto error;
  2080. }
  2081. }
  2082. error:
  2083. return rc;
  2084. }
  2085. static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode,
  2086. struct dsi_parser_utils *utils)
  2087. {
  2088. const char *data;
  2089. u32 len, i;
  2090. int rc = 0;
  2091. struct dsi_display_mode_priv_info *priv_info;
  2092. u64 pixel_clk_khz;
  2093. if (!mode || !mode->priv_info)
  2094. return -EINVAL;
  2095. priv_info = mode->priv_info;
  2096. data = utils->get_property(utils->data,
  2097. "qcom,mdss-dsi-panel-phy-timings", &len);
  2098. if (!data) {
  2099. DSI_DEBUG("Unable to read Phy timing settings\n");
  2100. } else {
  2101. priv_info->phy_timing_val =
  2102. kzalloc((sizeof(u32) * len), GFP_KERNEL);
  2103. if (!priv_info->phy_timing_val)
  2104. return -EINVAL;
  2105. for (i = 0; i < len; i++)
  2106. priv_info->phy_timing_val[i] = data[i];
  2107. priv_info->phy_timing_len = len;
  2108. }
  2109. if (mode->panel_mode_caps & DSI_OP_VIDEO_MODE) {
  2110. /*
  2111. * For command mode we update the pclk as part of
  2112. * function dsi_panel_calc_dsi_transfer_time( )
  2113. * as we set it based on dsi clock or mdp transfer time.
  2114. */
  2115. pixel_clk_khz = (dsi_h_total_dce(&mode->timing) *
  2116. DSI_V_TOTAL(&mode->timing) *
  2117. mode->timing.refresh_rate);
  2118. do_div(pixel_clk_khz, 1000);
  2119. mode->pixel_clk_khz = pixel_clk_khz;
  2120. }
  2121. return rc;
  2122. }
  2123. static int dsi_panel_parse_dsc_params(struct dsi_display_mode *mode,
  2124. struct dsi_parser_utils *utils)
  2125. {
  2126. u32 data;
  2127. int rc = -EINVAL;
  2128. int intf_width;
  2129. const char *compression;
  2130. struct dsi_display_mode_priv_info *priv_info;
  2131. if (!mode || !mode->priv_info)
  2132. return -EINVAL;
  2133. priv_info = mode->priv_info;
  2134. priv_info->dsc_enabled = false;
  2135. compression = utils->get_property(utils->data,
  2136. "qcom,compression-mode", NULL);
  2137. if (compression && !strcmp(compression, "dsc"))
  2138. priv_info->dsc_enabled = true;
  2139. if (!priv_info->dsc_enabled) {
  2140. DSI_DEBUG("dsc compression is not enabled for the mode\n");
  2141. return 0;
  2142. }
  2143. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-version", &data);
  2144. if (rc) {
  2145. priv_info->dsc.config.dsc_version_major = 0x1;
  2146. priv_info->dsc.config.dsc_version_minor = 0x1;
  2147. rc = 0;
  2148. } else {
  2149. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2150. * major version information
  2151. */
  2152. priv_info->dsc.config.dsc_version_major = (data >> 4) & 0x0F;
  2153. priv_info->dsc.config.dsc_version_minor = data & 0x0F;
  2154. if ((priv_info->dsc.config.dsc_version_major != 0x1) ||
  2155. ((priv_info->dsc.config.dsc_version_minor
  2156. != 0x1) &&
  2157. (priv_info->dsc.config.dsc_version_minor
  2158. != 0x2))) {
  2159. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2160. __func__,
  2161. priv_info->dsc.config.dsc_version_major,
  2162. priv_info->dsc.config.dsc_version_minor
  2163. );
  2164. rc = -EINVAL;
  2165. goto error;
  2166. }
  2167. }
  2168. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-scr-version", &data);
  2169. if (rc) {
  2170. priv_info->dsc.scr_rev = 0x0;
  2171. rc = 0;
  2172. } else {
  2173. priv_info->dsc.scr_rev = data & 0xff;
  2174. /* only one scr rev supported */
  2175. if (priv_info->dsc.scr_rev > 0x1) {
  2176. DSI_ERR("%s: DSC scr version:%d not supported\n",
  2177. __func__, priv_info->dsc.scr_rev);
  2178. rc = -EINVAL;
  2179. goto error;
  2180. }
  2181. }
  2182. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-height", &data);
  2183. if (rc) {
  2184. DSI_ERR("failed to parse qcom,mdss-dsc-slice-height\n");
  2185. goto error;
  2186. }
  2187. priv_info->dsc.config.slice_height = data;
  2188. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-width", &data);
  2189. if (rc) {
  2190. DSI_ERR("failed to parse qcom,mdss-dsc-slice-width\n");
  2191. goto error;
  2192. }
  2193. priv_info->dsc.config.slice_width = data;
  2194. intf_width = mode->timing.h_active;
  2195. if (intf_width % priv_info->dsc.config.slice_width) {
  2196. DSI_ERR("invalid slice width for the intf width:%d slice width:%d\n",
  2197. intf_width, priv_info->dsc.config.slice_width);
  2198. rc = -EINVAL;
  2199. goto error;
  2200. }
  2201. priv_info->dsc.config.pic_width = mode->timing.h_active;
  2202. priv_info->dsc.config.pic_height = mode->timing.v_active;
  2203. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-per-pkt", &data);
  2204. if (rc) {
  2205. DSI_ERR("failed to parse qcom,mdss-dsc-slice-per-pkt\n");
  2206. goto error;
  2207. } else if (!data || (data > 2)) {
  2208. DSI_ERR("invalid dsc slice-per-pkt:%d\n", data);
  2209. goto error;
  2210. }
  2211. priv_info->dsc.slice_per_pkt = data;
  2212. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-component",
  2213. &data);
  2214. if (rc) {
  2215. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-component\n");
  2216. goto error;
  2217. }
  2218. priv_info->dsc.config.bits_per_component = data;
  2219. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2220. if (rc) {
  2221. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2222. data = 0;
  2223. }
  2224. priv_info->dsc.pps_delay_ms = data;
  2225. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-pixel",
  2226. &data);
  2227. if (rc) {
  2228. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-pixel\n");
  2229. goto error;
  2230. }
  2231. priv_info->dsc.config.bits_per_pixel = data << 4;
  2232. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2233. &data);
  2234. if (rc) {
  2235. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2236. rc = 0;
  2237. data = MSM_CHROMA_444;
  2238. }
  2239. priv_info->dsc.chroma_format = data;
  2240. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2241. &data);
  2242. if (rc) {
  2243. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2244. rc = 0;
  2245. data = MSM_RGB;
  2246. }
  2247. priv_info->dsc.source_color_space = data;
  2248. priv_info->dsc.config.block_pred_enable = utils->read_bool(utils->data,
  2249. "qcom,mdss-dsc-block-prediction-enable");
  2250. priv_info->dsc.config.slice_count = DIV_ROUND_UP(intf_width,
  2251. priv_info->dsc.config.slice_width);
  2252. rc = sde_dsc_populate_dsc_config(&priv_info->dsc.config,
  2253. priv_info->dsc.scr_rev);
  2254. if (rc) {
  2255. DSI_DEBUG("failed populating dsc params\n");
  2256. rc = -EINVAL;
  2257. goto error;
  2258. }
  2259. rc = sde_dsc_populate_dsc_private_params(&priv_info->dsc, intf_width);
  2260. if (rc) {
  2261. DSI_DEBUG("failed populating other dsc params\n");
  2262. rc = -EINVAL;
  2263. goto error;
  2264. }
  2265. priv_info->pclk_scale.numer =
  2266. priv_info->dsc.config.bits_per_pixel >> 4;
  2267. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2268. priv_info->dsc.chroma_format,
  2269. priv_info->dsc.config.bits_per_component);
  2270. mode->timing.dsc_enabled = true;
  2271. mode->timing.dsc = &priv_info->dsc;
  2272. mode->timing.pclk_scale = priv_info->pclk_scale;
  2273. error:
  2274. return rc;
  2275. }
  2276. static int dsi_panel_parse_vdc_params(struct dsi_display_mode *mode,
  2277. struct dsi_parser_utils *utils, int traffic_mode)
  2278. {
  2279. u32 data;
  2280. int rc = -EINVAL;
  2281. const char *compression;
  2282. struct dsi_display_mode_priv_info *priv_info;
  2283. int intf_width;
  2284. if (!mode || !mode->priv_info)
  2285. return -EINVAL;
  2286. priv_info = mode->priv_info;
  2287. priv_info->vdc_enabled = false;
  2288. compression = utils->get_property(utils->data,
  2289. "qcom,compression-mode", NULL);
  2290. if (compression && !strcmp(compression, "vdc"))
  2291. priv_info->vdc_enabled = true;
  2292. if (!priv_info->vdc_enabled) {
  2293. DSI_DEBUG("vdc compression is not enabled for the mode\n");
  2294. return 0;
  2295. }
  2296. priv_info->vdc.traffic_mode = traffic_mode;
  2297. rc = utils->read_u32(utils->data, "qcom,vdc-version", &data);
  2298. if (rc) {
  2299. priv_info->vdc.version_major = 0x1;
  2300. priv_info->vdc.version_minor = 0x2;
  2301. priv_info->vdc.version_release = 0x0;
  2302. rc = 0;
  2303. } else {
  2304. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2305. * major version information
  2306. */
  2307. priv_info->vdc.version_major = (data >> 4) & 0x0F;
  2308. priv_info->vdc.version_minor = data & 0x0F;
  2309. if ((priv_info->vdc.version_major != 0x1) &&
  2310. ((priv_info->vdc.version_minor
  2311. != 0x2))) {
  2312. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2313. __func__,
  2314. priv_info->vdc.version_major,
  2315. priv_info->vdc.version_minor
  2316. );
  2317. rc = -EINVAL;
  2318. goto error;
  2319. }
  2320. }
  2321. rc = utils->read_u32(utils->data, "qcom,vdc-version-release", &data);
  2322. if (rc) {
  2323. priv_info->vdc.version_release = 0x0;
  2324. rc = 0;
  2325. } else {
  2326. priv_info->vdc.version_release = data & 0xff;
  2327. /* only one release version is supported */
  2328. if (priv_info->vdc.version_release != 0x0) {
  2329. DSI_ERR("unsupported vdc release version %d\n",
  2330. priv_info->vdc.version_release);
  2331. rc = -EINVAL;
  2332. goto error;
  2333. }
  2334. }
  2335. DSI_INFO("vdc major: 0x%x minor : 0x%x release : 0x%x\n",
  2336. priv_info->vdc.version_major,
  2337. priv_info->vdc.version_minor,
  2338. priv_info->vdc.version_release);
  2339. rc = utils->read_u32(utils->data, "qcom,vdc-slice-height", &data);
  2340. if (rc) {
  2341. DSI_ERR("failed to parse qcom,vdc-slice-height\n");
  2342. goto error;
  2343. }
  2344. priv_info->vdc.slice_height = data;
  2345. /* slice height should be atleast 16 lines */
  2346. if (priv_info->vdc.slice_height < 16) {
  2347. DSI_ERR("invalid slice height %d\n",
  2348. priv_info->vdc.slice_height);
  2349. rc = -EINVAL;
  2350. goto error;
  2351. }
  2352. rc = utils->read_u32(utils->data, "qcom,vdc-slice-width", &data);
  2353. if (rc) {
  2354. DSI_ERR("failed to parse qcom,vdc-slice-width\n");
  2355. goto error;
  2356. }
  2357. priv_info->vdc.slice_width = data;
  2358. /*
  2359. * slide-width should be multiple of 8
  2360. * slice-width should be atlease 64 pixels
  2361. */
  2362. if ((priv_info->vdc.slice_width & 7) ||
  2363. (priv_info->vdc.slice_width < 64)) {
  2364. DSI_ERR("invalid slice width:%d\n", priv_info->vdc.slice_width);
  2365. rc = -EINVAL;
  2366. goto error;
  2367. }
  2368. rc = utils->read_u32(utils->data, "qcom,vdc-slice-per-pkt", &data);
  2369. if (rc) {
  2370. DSI_ERR("failed to parse qcom,vdc-slice-per-pkt\n");
  2371. goto error;
  2372. } else if (!data || (data > 2)) {
  2373. DSI_ERR("invalid vdc slice-per-pkt:%d\n", data);
  2374. rc = -EINVAL;
  2375. goto error;
  2376. }
  2377. intf_width = mode->timing.h_active;
  2378. priv_info->vdc.slice_per_pkt = data;
  2379. priv_info->vdc.frame_width = mode->timing.h_active;
  2380. priv_info->vdc.frame_height = mode->timing.v_active;
  2381. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-component",
  2382. &data);
  2383. if (rc) {
  2384. DSI_ERR("failed to parse qcom,vdc-bit-per-component\n");
  2385. goto error;
  2386. }
  2387. priv_info->vdc.bits_per_component = data;
  2388. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2389. if (rc) {
  2390. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2391. data = 0;
  2392. }
  2393. priv_info->vdc.pps_delay_ms = data;
  2394. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-pixel",
  2395. &data);
  2396. if (rc) {
  2397. DSI_ERR("failed to parse qcom,vdc-bit-per-pixel\n");
  2398. goto error;
  2399. }
  2400. priv_info->vdc.bits_per_pixel = data << 4;
  2401. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2402. &data);
  2403. if (rc) {
  2404. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2405. rc = 0;
  2406. data = MSM_CHROMA_444;
  2407. }
  2408. priv_info->vdc.chroma_format = data;
  2409. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2410. &data);
  2411. if (rc) {
  2412. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2413. rc = 0;
  2414. data = MSM_RGB;
  2415. }
  2416. priv_info->vdc.source_color_space = data;
  2417. rc = sde_vdc_populate_config(&priv_info->vdc,
  2418. intf_width, traffic_mode);
  2419. if (rc) {
  2420. DSI_DEBUG("failed populating vdc config\n");
  2421. rc = -EINVAL;
  2422. goto error;
  2423. }
  2424. priv_info->pclk_scale.numer =
  2425. priv_info->vdc.bits_per_pixel >> 4;
  2426. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2427. priv_info->vdc.chroma_format,
  2428. priv_info->vdc.bits_per_component);
  2429. mode->timing.vdc_enabled = true;
  2430. mode->timing.vdc = &priv_info->vdc;
  2431. mode->timing.pclk_scale = priv_info->pclk_scale;
  2432. error:
  2433. return rc;
  2434. }
  2435. static int dsi_panel_parse_hdr_config(struct dsi_panel *panel)
  2436. {
  2437. int rc = 0;
  2438. struct drm_panel_hdr_properties *hdr_prop;
  2439. struct dsi_parser_utils *utils = &panel->utils;
  2440. hdr_prop = &panel->hdr_props;
  2441. hdr_prop->hdr_enabled = utils->read_bool(utils->data,
  2442. "qcom,mdss-dsi-panel-hdr-enabled");
  2443. if (hdr_prop->hdr_enabled) {
  2444. rc = utils->read_u32_array(utils->data,
  2445. "qcom,mdss-dsi-panel-hdr-color-primaries",
  2446. hdr_prop->display_primaries,
  2447. DISPLAY_PRIMARIES_MAX);
  2448. if (rc) {
  2449. DSI_ERR("%s:%d, Unable to read color primaries,rc:%u\n",
  2450. __func__, __LINE__, rc);
  2451. hdr_prop->hdr_enabled = false;
  2452. return rc;
  2453. }
  2454. rc = utils->read_u32(utils->data,
  2455. "qcom,mdss-dsi-panel-peak-brightness",
  2456. &(hdr_prop->peak_brightness));
  2457. if (rc) {
  2458. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2459. __func__, __LINE__, rc);
  2460. hdr_prop->hdr_enabled = false;
  2461. return rc;
  2462. }
  2463. rc = utils->read_u32(utils->data,
  2464. "qcom,mdss-dsi-panel-blackness-level",
  2465. &(hdr_prop->blackness_level));
  2466. if (rc) {
  2467. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2468. __func__, __LINE__, rc);
  2469. hdr_prop->hdr_enabled = false;
  2470. return rc;
  2471. }
  2472. }
  2473. return 0;
  2474. }
  2475. static int dsi_panel_parse_topology(
  2476. struct dsi_display_mode_priv_info *priv_info,
  2477. struct dsi_parser_utils *utils,
  2478. int topology_override)
  2479. {
  2480. struct msm_display_topology *topology;
  2481. u32 top_count, top_sel, *array = NULL;
  2482. int i, len = 0;
  2483. int rc = -EINVAL;
  2484. len = utils->count_u32_elems(utils->data, "qcom,display-topology");
  2485. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  2486. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY)) {
  2487. DSI_ERR("invalid topology list for the panel, rc = %d\n", rc);
  2488. return rc;
  2489. }
  2490. top_count = len / TOPOLOGY_SET_LEN;
  2491. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  2492. if (!array)
  2493. return -ENOMEM;
  2494. rc = utils->read_u32_array(utils->data,
  2495. "qcom,display-topology", array, len);
  2496. if (rc) {
  2497. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  2498. goto read_fail;
  2499. }
  2500. topology = kcalloc(top_count, sizeof(*topology), GFP_KERNEL);
  2501. if (!topology) {
  2502. rc = -ENOMEM;
  2503. goto read_fail;
  2504. }
  2505. for (i = 0; i < top_count; i++) {
  2506. struct msm_display_topology *top = &topology[i];
  2507. top->num_lm = array[i * TOPOLOGY_SET_LEN];
  2508. top->num_enc = array[i * TOPOLOGY_SET_LEN + 1];
  2509. top->num_intf = array[i * TOPOLOGY_SET_LEN + 2];
  2510. }
  2511. if (topology_override >= 0 && topology_override < top_count) {
  2512. DSI_INFO("override topology: cfg:%d lm:%d comp_enc:%d intf:%d\n",
  2513. topology_override,
  2514. topology[topology_override].num_lm,
  2515. topology[topology_override].num_enc,
  2516. topology[topology_override].num_intf);
  2517. top_sel = topology_override;
  2518. goto parse_done;
  2519. }
  2520. rc = utils->read_u32(utils->data,
  2521. "qcom,default-topology-index", &top_sel);
  2522. if (rc) {
  2523. DSI_ERR("no default topology selected, rc = %d\n", rc);
  2524. goto parse_fail;
  2525. }
  2526. if (top_sel >= top_count) {
  2527. rc = -EINVAL;
  2528. DSI_ERR("default topology is specified is not valid, rc = %d\n",
  2529. rc);
  2530. goto parse_fail;
  2531. }
  2532. DSI_INFO("default topology: lm: %d comp_enc:%d intf: %d\n",
  2533. topology[top_sel].num_lm,
  2534. topology[top_sel].num_enc,
  2535. topology[top_sel].num_intf);
  2536. parse_done:
  2537. memcpy(&priv_info->topology, &topology[top_sel],
  2538. sizeof(struct msm_display_topology));
  2539. parse_fail:
  2540. kfree(topology);
  2541. read_fail:
  2542. kfree(array);
  2543. return rc;
  2544. }
  2545. static int dsi_panel_parse_roi_alignment(struct dsi_parser_utils *utils,
  2546. struct msm_roi_alignment *align)
  2547. {
  2548. int len = 0, rc = 0;
  2549. u32 value[6];
  2550. struct property *data;
  2551. if (!align)
  2552. return -EINVAL;
  2553. memset(align, 0, sizeof(*align));
  2554. data = utils->find_property(utils->data,
  2555. "qcom,panel-roi-alignment", &len);
  2556. len /= sizeof(u32);
  2557. if (!data) {
  2558. DSI_ERR("panel roi alignment not found\n");
  2559. rc = -EINVAL;
  2560. } else if (len != 6) {
  2561. DSI_ERR("incorrect roi alignment len %d\n", len);
  2562. rc = -EINVAL;
  2563. } else {
  2564. rc = utils->read_u32_array(utils->data,
  2565. "qcom,panel-roi-alignment", value, len);
  2566. if (rc)
  2567. DSI_DEBUG("error reading panel roi alignment values\n");
  2568. else {
  2569. align->xstart_pix_align = value[0];
  2570. align->ystart_pix_align = value[1];
  2571. align->width_pix_align = value[2];
  2572. align->height_pix_align = value[3];
  2573. align->min_width = value[4];
  2574. align->min_height = value[5];
  2575. }
  2576. DSI_INFO("roi alignment: [%d, %d, %d, %d, %d, %d]\n",
  2577. align->xstart_pix_align,
  2578. align->width_pix_align,
  2579. align->ystart_pix_align,
  2580. align->height_pix_align,
  2581. align->min_width,
  2582. align->min_height);
  2583. }
  2584. return rc;
  2585. }
  2586. static int dsi_panel_parse_partial_update_caps(struct dsi_display_mode *mode,
  2587. struct dsi_parser_utils *utils)
  2588. {
  2589. struct msm_roi_caps *roi_caps = NULL;
  2590. const char *data;
  2591. int rc = 0;
  2592. if (!mode || !mode->priv_info) {
  2593. DSI_ERR("invalid arguments\n");
  2594. return -EINVAL;
  2595. }
  2596. roi_caps = &mode->priv_info->roi_caps;
  2597. memset(roi_caps, 0, sizeof(*roi_caps));
  2598. data = utils->get_property(utils->data,
  2599. "qcom,partial-update-enabled", NULL);
  2600. if (data) {
  2601. if (!strcmp(data, "dual_roi"))
  2602. roi_caps->num_roi = 2;
  2603. else if (!strcmp(data, "single_roi"))
  2604. roi_caps->num_roi = 1;
  2605. else {
  2606. DSI_INFO(
  2607. "invalid value for qcom,partial-update-enabled: %s\n",
  2608. data);
  2609. return 0;
  2610. }
  2611. } else {
  2612. DSI_DEBUG("partial update disabled as the property is not set\n");
  2613. return 0;
  2614. }
  2615. roi_caps->merge_rois = utils->read_bool(utils->data,
  2616. "qcom,partial-update-roi-merge");
  2617. roi_caps->enabled = roi_caps->num_roi > 0;
  2618. DSI_DEBUG("partial update num_rois=%d enabled=%d\n", roi_caps->num_roi,
  2619. roi_caps->enabled);
  2620. if (roi_caps->enabled)
  2621. rc = dsi_panel_parse_roi_alignment(utils,
  2622. &roi_caps->align);
  2623. if (rc)
  2624. memset(roi_caps, 0, sizeof(*roi_caps));
  2625. return rc;
  2626. }
  2627. static bool dsi_panel_parse_panel_mode_caps(struct dsi_display_mode *mode,
  2628. struct dsi_parser_utils *utils)
  2629. {
  2630. if (!mode || !mode->priv_info) {
  2631. DSI_ERR("invalid arguments\n");
  2632. return false;
  2633. }
  2634. if (utils->read_bool(utils->data, "qcom,mdss-dsi-video-mode"))
  2635. mode->panel_mode_caps |= DSI_OP_VIDEO_MODE;
  2636. if (utils->read_bool(utils->data, "qcom,mdss-dsi-cmd-mode"))
  2637. mode->panel_mode_caps |= DSI_OP_CMD_MODE;
  2638. if (!mode->panel_mode_caps)
  2639. return false;
  2640. return true;
  2641. };
  2642. static int dsi_panel_parse_dms_info(struct dsi_panel *panel)
  2643. {
  2644. int dms_enabled;
  2645. const char *data;
  2646. struct dsi_parser_utils *utils = &panel->utils;
  2647. panel->dms_mode = DSI_DMS_MODE_DISABLED;
  2648. dms_enabled = utils->read_bool(utils->data,
  2649. "qcom,dynamic-mode-switch-enabled");
  2650. if (!dms_enabled)
  2651. return 0;
  2652. data = utils->get_property(utils->data,
  2653. "qcom,dynamic-mode-switch-type", NULL);
  2654. if (data && !strcmp(data, "dynamic-resolution-switch-immediate")) {
  2655. panel->dms_mode = DSI_DMS_MODE_RES_SWITCH_IMMEDIATE;
  2656. } else {
  2657. DSI_ERR("[%s] unsupported dynamic switch mode: %s\n",
  2658. panel->name, data);
  2659. return -EINVAL;
  2660. }
  2661. return 0;
  2662. };
  2663. /*
  2664. * The length of all the valid values to be checked should not be greater
  2665. * than the length of returned data from read command.
  2666. */
  2667. static bool
  2668. dsi_panel_parse_esd_check_valid_params(struct dsi_panel *panel, u32 count)
  2669. {
  2670. int i;
  2671. struct drm_panel_esd_config *config = &panel->esd_config;
  2672. for (i = 0; i < count; ++i) {
  2673. if (config->status_valid_params[i] >
  2674. config->status_cmds_rlen[i]) {
  2675. DSI_DEBUG("ignore valid params\n");
  2676. return false;
  2677. }
  2678. }
  2679. return true;
  2680. }
  2681. static bool dsi_panel_parse_esd_status_len(struct dsi_parser_utils *utils,
  2682. char *prop_key, u32 **target, u32 cmd_cnt)
  2683. {
  2684. int tmp;
  2685. if (!utils->find_property(utils->data, prop_key, &tmp))
  2686. return false;
  2687. tmp /= sizeof(u32);
  2688. if (tmp != cmd_cnt) {
  2689. DSI_ERR("request property(%d) do not match cmd count(%d)\n",
  2690. tmp, cmd_cnt);
  2691. return false;
  2692. }
  2693. *target = kcalloc(tmp, sizeof(u32), GFP_KERNEL);
  2694. if (IS_ERR_OR_NULL(*target)) {
  2695. DSI_ERR("Error allocating memory for property\n");
  2696. return false;
  2697. }
  2698. if (utils->read_u32_array(utils->data, prop_key, *target, tmp)) {
  2699. DSI_ERR("cannot get values from dts\n");
  2700. kfree(*target);
  2701. *target = NULL;
  2702. return false;
  2703. }
  2704. return true;
  2705. }
  2706. static void dsi_panel_esd_config_deinit(struct drm_panel_esd_config *esd_config)
  2707. {
  2708. kfree(esd_config->status_buf);
  2709. kfree(esd_config->return_buf);
  2710. kfree(esd_config->status_value);
  2711. kfree(esd_config->status_valid_params);
  2712. kfree(esd_config->status_cmds_rlen);
  2713. kfree(esd_config->status_cmd.cmds);
  2714. }
  2715. int dsi_panel_parse_esd_reg_read_configs(struct dsi_panel *panel)
  2716. {
  2717. struct drm_panel_esd_config *esd_config;
  2718. int rc = 0;
  2719. u32 tmp;
  2720. u32 i, status_len, *lenp;
  2721. struct property *data;
  2722. struct dsi_parser_utils *utils = &panel->utils;
  2723. if (!panel) {
  2724. DSI_ERR("Invalid Params\n");
  2725. return -EINVAL;
  2726. }
  2727. esd_config = &panel->esd_config;
  2728. if (!esd_config)
  2729. return -EINVAL;
  2730. dsi_panel_parse_cmd_sets_sub(&esd_config->status_cmd,
  2731. DSI_CMD_SET_PANEL_STATUS, utils);
  2732. if (!esd_config->status_cmd.count) {
  2733. DSI_ERR("panel status command parsing failed\n");
  2734. rc = -EINVAL;
  2735. goto error;
  2736. }
  2737. if (!dsi_panel_parse_esd_status_len(utils,
  2738. "qcom,mdss-dsi-panel-status-read-length",
  2739. &panel->esd_config.status_cmds_rlen,
  2740. esd_config->status_cmd.count)) {
  2741. DSI_ERR("Invalid status read length\n");
  2742. rc = -EINVAL;
  2743. goto error1;
  2744. }
  2745. if (dsi_panel_parse_esd_status_len(utils,
  2746. "qcom,mdss-dsi-panel-status-valid-params",
  2747. &panel->esd_config.status_valid_params,
  2748. esd_config->status_cmd.count)) {
  2749. if (!dsi_panel_parse_esd_check_valid_params(panel,
  2750. esd_config->status_cmd.count)) {
  2751. rc = -EINVAL;
  2752. goto error2;
  2753. }
  2754. }
  2755. status_len = 0;
  2756. lenp = esd_config->status_valid_params ?: esd_config->status_cmds_rlen;
  2757. for (i = 0; i < esd_config->status_cmd.count; ++i)
  2758. status_len += lenp[i];
  2759. if (!status_len) {
  2760. rc = -EINVAL;
  2761. goto error2;
  2762. }
  2763. /*
  2764. * Some panel may need multiple read commands to properly
  2765. * check panel status. Do a sanity check for proper status
  2766. * value which will be compared with the value read by dsi
  2767. * controller during ESD check. Also check if multiple read
  2768. * commands are there then, there should be corresponding
  2769. * status check values for each read command.
  2770. */
  2771. data = utils->find_property(utils->data,
  2772. "qcom,mdss-dsi-panel-status-value", &tmp);
  2773. tmp /= sizeof(u32);
  2774. if (!IS_ERR_OR_NULL(data) && tmp != 0 && (tmp % status_len) == 0) {
  2775. esd_config->groups = tmp / status_len;
  2776. } else {
  2777. DSI_ERR("error parse panel-status-value\n");
  2778. rc = -EINVAL;
  2779. goto error2;
  2780. }
  2781. esd_config->status_value =
  2782. kzalloc(sizeof(u32) * status_len * esd_config->groups,
  2783. GFP_KERNEL);
  2784. if (!esd_config->status_value) {
  2785. rc = -ENOMEM;
  2786. goto error2;
  2787. }
  2788. esd_config->return_buf = kcalloc(status_len * esd_config->groups,
  2789. sizeof(unsigned char), GFP_KERNEL);
  2790. if (!esd_config->return_buf) {
  2791. rc = -ENOMEM;
  2792. goto error3;
  2793. }
  2794. esd_config->status_buf = kzalloc(SZ_4K, GFP_KERNEL);
  2795. if (!esd_config->status_buf) {
  2796. rc = -ENOMEM;
  2797. goto error4;
  2798. }
  2799. rc = utils->read_u32_array(utils->data,
  2800. "qcom,mdss-dsi-panel-status-value",
  2801. esd_config->status_value, esd_config->groups * status_len);
  2802. if (rc) {
  2803. DSI_DEBUG("error reading panel status values\n");
  2804. memset(esd_config->status_value, 0,
  2805. esd_config->groups * status_len);
  2806. }
  2807. return 0;
  2808. error4:
  2809. kfree(esd_config->return_buf);
  2810. error3:
  2811. kfree(esd_config->status_value);
  2812. error2:
  2813. kfree(esd_config->status_valid_params);
  2814. kfree(esd_config->status_cmds_rlen);
  2815. error1:
  2816. kfree(esd_config->status_cmd.cmds);
  2817. error:
  2818. return rc;
  2819. }
  2820. static int dsi_panel_parse_esd_config(struct dsi_panel *panel)
  2821. {
  2822. int rc = 0;
  2823. const char *string;
  2824. struct drm_panel_esd_config *esd_config;
  2825. struct dsi_parser_utils *utils = &panel->utils;
  2826. u8 *esd_mode = NULL;
  2827. esd_config = &panel->esd_config;
  2828. esd_config->status_mode = ESD_MODE_MAX;
  2829. esd_config->esd_enabled = utils->read_bool(utils->data,
  2830. "qcom,esd-check-enabled");
  2831. if (!esd_config->esd_enabled)
  2832. return 0;
  2833. rc = utils->read_string(utils->data,
  2834. "qcom,mdss-dsi-panel-status-check-mode", &string);
  2835. if (!rc) {
  2836. if (!strcmp(string, "bta_check")) {
  2837. esd_config->status_mode = ESD_MODE_SW_BTA;
  2838. } else if (!strcmp(string, "reg_read")) {
  2839. esd_config->status_mode = ESD_MODE_REG_READ;
  2840. } else if (!strcmp(string, "te_signal_check")) {
  2841. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  2842. esd_config->status_mode = ESD_MODE_PANEL_TE;
  2843. } else {
  2844. DSI_ERR("TE-ESD not valid for video mode\n");
  2845. rc = -EINVAL;
  2846. goto error;
  2847. }
  2848. } else {
  2849. DSI_ERR("No valid panel-status-check-mode string\n");
  2850. rc = -EINVAL;
  2851. goto error;
  2852. }
  2853. } else {
  2854. DSI_DEBUG("status check method not defined!\n");
  2855. rc = -EINVAL;
  2856. goto error;
  2857. }
  2858. if (panel->esd_config.status_mode == ESD_MODE_REG_READ) {
  2859. rc = dsi_panel_parse_esd_reg_read_configs(panel);
  2860. if (rc) {
  2861. DSI_ERR("failed to parse esd reg read mode params, rc=%d\n",
  2862. rc);
  2863. goto error;
  2864. }
  2865. esd_mode = "register_read";
  2866. } else if (panel->esd_config.status_mode == ESD_MODE_SW_BTA) {
  2867. esd_mode = "bta_trigger";
  2868. } else if (panel->esd_config.status_mode == ESD_MODE_PANEL_TE) {
  2869. esd_mode = "te_check";
  2870. }
  2871. DSI_DEBUG("ESD enabled with mode: %s\n", esd_mode);
  2872. return 0;
  2873. error:
  2874. panel->esd_config.esd_enabled = false;
  2875. return rc;
  2876. }
  2877. static void dsi_panel_update_util(struct dsi_panel *panel,
  2878. struct device_node *parser_node)
  2879. {
  2880. struct dsi_parser_utils *utils = &panel->utils;
  2881. if (parser_node) {
  2882. *utils = *dsi_parser_get_parser_utils();
  2883. utils->data = parser_node;
  2884. DSI_DEBUG("switching to parser APIs\n");
  2885. goto end;
  2886. }
  2887. *utils = *dsi_parser_get_of_utils();
  2888. utils->data = panel->panel_of_node;
  2889. end:
  2890. utils->node = panel->panel_of_node;
  2891. }
  2892. static int dsi_panel_vm_stub(struct dsi_panel *panel)
  2893. {
  2894. return 0;
  2895. }
  2896. static void dsi_panel_setup_vm_ops(struct dsi_panel *panel, bool trusted_vm_env)
  2897. {
  2898. if (trusted_vm_env) {
  2899. panel->panel_ops.pinctrl_init = dsi_panel_vm_stub;
  2900. panel->panel_ops.gpio_request = dsi_panel_vm_stub;
  2901. panel->panel_ops.pinctrl_deinit = dsi_panel_vm_stub;
  2902. panel->panel_ops.gpio_release = dsi_panel_vm_stub;
  2903. panel->panel_ops.bl_register = dsi_panel_vm_stub;
  2904. panel->panel_ops.bl_unregister = dsi_panel_vm_stub;
  2905. panel->panel_ops.parse_gpios = dsi_panel_vm_stub;
  2906. } else {
  2907. panel->panel_ops.pinctrl_init = dsi_panel_pinctrl_init;
  2908. panel->panel_ops.gpio_request = dsi_panel_gpio_request;
  2909. panel->panel_ops.pinctrl_deinit = dsi_panel_pinctrl_deinit;
  2910. panel->panel_ops.gpio_release = dsi_panel_gpio_release;
  2911. panel->panel_ops.bl_register = dsi_panel_bl_register;
  2912. panel->panel_ops.bl_unregister = dsi_panel_bl_unregister;
  2913. panel->panel_ops.parse_gpios = dsi_panel_parse_gpios;
  2914. }
  2915. }
  2916. struct dsi_panel *dsi_panel_get(struct device *parent,
  2917. struct device_node *of_node,
  2918. struct device_node *parser_node,
  2919. const char *type,
  2920. int topology_override,
  2921. bool trusted_vm_env)
  2922. {
  2923. struct dsi_panel *panel;
  2924. struct dsi_parser_utils *utils;
  2925. const char *panel_physical_type;
  2926. int rc = 0;
  2927. panel = kzalloc(sizeof(*panel), GFP_KERNEL);
  2928. if (!panel)
  2929. return ERR_PTR(-ENOMEM);
  2930. dsi_panel_setup_vm_ops(panel, trusted_vm_env);
  2931. panel->panel_of_node = of_node;
  2932. panel->parent = parent;
  2933. panel->type = type;
  2934. dsi_panel_update_util(panel, parser_node);
  2935. utils = &panel->utils;
  2936. panel->name = utils->get_property(utils->data,
  2937. "qcom,mdss-dsi-panel-name", NULL);
  2938. if (!panel->name)
  2939. panel->name = DSI_PANEL_DEFAULT_LABEL;
  2940. /*
  2941. * Set panel type to LCD as default.
  2942. */
  2943. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_LCD;
  2944. panel_physical_type = utils->get_property(utils->data,
  2945. "qcom,mdss-dsi-panel-physical-type", NULL);
  2946. if (panel_physical_type && !strcmp(panel_physical_type, "oled"))
  2947. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_OLED;
  2948. rc = dsi_panel_parse_host_config(panel);
  2949. if (rc) {
  2950. DSI_ERR("failed to parse host configuration, rc=%d\n",
  2951. rc);
  2952. goto error;
  2953. }
  2954. rc = dsi_panel_parse_panel_mode(panel);
  2955. if (rc) {
  2956. DSI_ERR("failed to parse panel mode configuration, rc=%d\n",
  2957. rc);
  2958. goto error;
  2959. }
  2960. rc = dsi_panel_parse_dfps_caps(panel);
  2961. if (rc)
  2962. DSI_ERR("failed to parse dfps configuration, rc=%d\n", rc);
  2963. rc = dsi_panel_parse_qsync_caps(panel, of_node);
  2964. if (rc)
  2965. DSI_DEBUG("failed to parse qsync features, rc=%d\n", rc);
  2966. rc = dsi_panel_parse_dyn_clk_caps(panel);
  2967. if (rc)
  2968. DSI_ERR("failed to parse dynamic clk config, rc=%d\n", rc);
  2969. rc = dsi_panel_parse_phy_props(panel);
  2970. if (rc) {
  2971. DSI_ERR("failed to parse panel physical dimension, rc=%d\n",
  2972. rc);
  2973. goto error;
  2974. }
  2975. rc = panel->panel_ops.parse_gpios(panel);
  2976. if (rc) {
  2977. DSI_ERR("failed to parse panel gpios, rc=%d\n", rc);
  2978. goto error;
  2979. }
  2980. rc = dsi_panel_parse_tlmm_gpio(panel);
  2981. if (rc) {
  2982. DSI_ERR("failed to parse panel tlmm gpios, rc=%d\n", rc);
  2983. goto error;
  2984. }
  2985. rc = dsi_panel_parse_power_cfg(panel);
  2986. if (rc)
  2987. DSI_ERR("failed to parse power config, rc=%d\n", rc);
  2988. rc = dsi_panel_parse_bl_config(panel);
  2989. if (rc) {
  2990. DSI_ERR("failed to parse backlight config, rc=%d\n", rc);
  2991. if (rc == -EPROBE_DEFER)
  2992. goto error;
  2993. }
  2994. rc = dsi_panel_parse_misc_features(panel);
  2995. if (rc)
  2996. DSI_ERR("failed to parse misc features, rc=%d\n", rc);
  2997. rc = dsi_panel_parse_hdr_config(panel);
  2998. if (rc)
  2999. DSI_ERR("failed to parse hdr config, rc=%d\n", rc);
  3000. rc = dsi_panel_get_mode_count(panel);
  3001. if (rc) {
  3002. DSI_ERR("failed to get mode count, rc=%d\n", rc);
  3003. goto error;
  3004. }
  3005. rc = dsi_panel_parse_dms_info(panel);
  3006. if (rc)
  3007. DSI_DEBUG("failed to get dms info, rc=%d\n", rc);
  3008. rc = dsi_panel_parse_esd_config(panel);
  3009. if (rc)
  3010. DSI_DEBUG("failed to parse esd config, rc=%d\n", rc);
  3011. rc = dsi_panel_vreg_get(panel);
  3012. if (rc) {
  3013. DSI_ERR("[%s] failed to get panel regulators, rc=%d\n",
  3014. panel->name, rc);
  3015. goto error;
  3016. }
  3017. panel->power_mode = SDE_MODE_DPMS_OFF;
  3018. drm_panel_init(&panel->drm_panel, &panel->mipi_device.dev,
  3019. NULL, DRM_MODE_CONNECTOR_DSI);
  3020. panel->mipi_device.dev.of_node = of_node;
  3021. drm_panel_add(&panel->drm_panel);
  3022. mutex_init(&panel->panel_lock);
  3023. return panel;
  3024. error:
  3025. kfree(panel);
  3026. return ERR_PTR(rc);
  3027. }
  3028. void dsi_panel_put(struct dsi_panel *panel)
  3029. {
  3030. drm_panel_remove(&panel->drm_panel);
  3031. /* free resources allocated for ESD check */
  3032. dsi_panel_esd_config_deinit(&panel->esd_config);
  3033. kfree(panel);
  3034. }
  3035. int dsi_panel_drv_init(struct dsi_panel *panel,
  3036. struct mipi_dsi_host *host)
  3037. {
  3038. int rc = 0;
  3039. struct mipi_dsi_device *dev;
  3040. if (!panel || !host) {
  3041. DSI_ERR("invalid params\n");
  3042. return -EINVAL;
  3043. }
  3044. mutex_lock(&panel->panel_lock);
  3045. dev = &panel->mipi_device;
  3046. dev->host = host;
  3047. /*
  3048. * We dont have device structure since panel is not a device node.
  3049. * When using drm panel framework, the device is probed when the host is
  3050. * create.
  3051. */
  3052. dev->channel = 0;
  3053. dev->lanes = 4;
  3054. panel->host = host;
  3055. rc = panel->panel_ops.pinctrl_init(panel);
  3056. if (rc) {
  3057. DSI_ERR("[%s] failed to init pinctrl, rc=%d\n",
  3058. panel->name, rc);
  3059. goto exit;
  3060. }
  3061. rc = panel->panel_ops.gpio_request(panel);
  3062. if (rc) {
  3063. DSI_ERR("[%s] failed to request gpios, rc=%d\n", panel->name,
  3064. rc);
  3065. goto error_pinctrl_deinit;
  3066. }
  3067. rc = panel->panel_ops.bl_register(panel);
  3068. if (rc) {
  3069. if (rc != -EPROBE_DEFER)
  3070. DSI_ERR("[%s] failed to register backlight, rc=%d\n",
  3071. panel->name, rc);
  3072. goto error_gpio_release;
  3073. }
  3074. goto exit;
  3075. error_gpio_release:
  3076. (void)dsi_panel_gpio_release(panel);
  3077. error_pinctrl_deinit:
  3078. (void)dsi_panel_pinctrl_deinit(panel);
  3079. exit:
  3080. mutex_unlock(&panel->panel_lock);
  3081. return rc;
  3082. }
  3083. int dsi_panel_drv_deinit(struct dsi_panel *panel)
  3084. {
  3085. int rc = 0;
  3086. if (!panel) {
  3087. DSI_ERR("invalid params\n");
  3088. return -EINVAL;
  3089. }
  3090. mutex_lock(&panel->panel_lock);
  3091. rc = panel->panel_ops.bl_unregister(panel);
  3092. if (rc)
  3093. DSI_ERR("[%s] failed to unregister backlight, rc=%d\n",
  3094. panel->name, rc);
  3095. rc = panel->panel_ops.gpio_release(panel);
  3096. if (rc)
  3097. DSI_ERR("[%s] failed to release gpios, rc=%d\n", panel->name,
  3098. rc);
  3099. rc = panel->panel_ops.pinctrl_deinit(panel);
  3100. if (rc)
  3101. DSI_ERR("[%s] failed to deinit gpios, rc=%d\n", panel->name,
  3102. rc);
  3103. rc = dsi_panel_vreg_put(panel);
  3104. if (rc)
  3105. DSI_ERR("[%s] failed to put regs, rc=%d\n", panel->name, rc);
  3106. kfree(panel->tlmm_gpio);
  3107. panel->host = NULL;
  3108. memset(&panel->mipi_device, 0x0, sizeof(panel->mipi_device));
  3109. mutex_unlock(&panel->panel_lock);
  3110. return rc;
  3111. }
  3112. int dsi_panel_validate_mode(struct dsi_panel *panel,
  3113. struct dsi_display_mode *mode)
  3114. {
  3115. return 0;
  3116. }
  3117. static int dsi_panel_get_max_res_count(struct dsi_parser_utils *utils,
  3118. struct device_node *node, u32 *dsc_count, u32 *lm_count)
  3119. {
  3120. const char *compression;
  3121. u32 *array = NULL, top_count, len, i;
  3122. int rc = -EINVAL;
  3123. bool dsc_enable = false;
  3124. *dsc_count = 0;
  3125. *lm_count = 0;
  3126. compression = utils->get_property(node, "qcom,compression-mode", NULL);
  3127. if (compression && !strcmp(compression, "dsc"))
  3128. dsc_enable = true;
  3129. len = utils->count_u32_elems(node, "qcom,display-topology");
  3130. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  3131. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY))
  3132. return rc;
  3133. top_count = len / TOPOLOGY_SET_LEN;
  3134. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  3135. if (!array)
  3136. return -ENOMEM;
  3137. rc = utils->read_u32_array(node, "qcom,display-topology", array, len);
  3138. if (rc) {
  3139. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  3140. goto read_fail;
  3141. }
  3142. for (i = 0; i < top_count; i++) {
  3143. *lm_count = max(*lm_count, array[i * TOPOLOGY_SET_LEN]);
  3144. if (dsc_enable)
  3145. *dsc_count = max(*dsc_count,
  3146. array[i * TOPOLOGY_SET_LEN + 1]);
  3147. }
  3148. read_fail:
  3149. kfree(array);
  3150. return 0;
  3151. }
  3152. int dsi_panel_get_mode_count(struct dsi_panel *panel)
  3153. {
  3154. const u32 SINGLE_MODE_SUPPORT = 1;
  3155. struct dsi_parser_utils *utils;
  3156. struct device_node *timings_np, *child_np;
  3157. int num_dfps_rates, num_bit_clks;
  3158. int num_video_modes = 0, num_cmd_modes = 0;
  3159. int count, rc = 0;
  3160. u32 dsc_count = 0, lm_count = 0;
  3161. if (!panel) {
  3162. DSI_ERR("invalid params\n");
  3163. return -EINVAL;
  3164. }
  3165. utils = &panel->utils;
  3166. panel->num_timing_nodes = 0;
  3167. timings_np = utils->get_child_by_name(utils->data,
  3168. "qcom,mdss-dsi-display-timings");
  3169. if (!timings_np && !panel->host_config.ext_bridge_mode) {
  3170. DSI_ERR("no display timing nodes defined\n");
  3171. rc = -EINVAL;
  3172. goto error;
  3173. }
  3174. count = utils->get_child_count(timings_np);
  3175. if ((!count && !panel->host_config.ext_bridge_mode) ||
  3176. count > DSI_MODE_MAX) {
  3177. DSI_ERR("invalid count of timing nodes: %d\n", count);
  3178. rc = -EINVAL;
  3179. goto error;
  3180. }
  3181. /* No multiresolution support is available for video mode panels.
  3182. * Multi-mode is supported for video mode during POMS is enabled.
  3183. */
  3184. if (panel->panel_mode != DSI_OP_CMD_MODE &&
  3185. !panel->host_config.ext_bridge_mode &&
  3186. !panel->panel_mode_switch_enabled)
  3187. count = SINGLE_MODE_SUPPORT;
  3188. panel->num_timing_nodes = count;
  3189. dsi_for_each_child_node(timings_np, child_np) {
  3190. if (utils->read_bool(child_np, "qcom,mdss-dsi-video-mode"))
  3191. num_video_modes++;
  3192. else if (utils->read_bool(child_np,
  3193. "qcom,mdss-dsi-cmd-mode"))
  3194. num_cmd_modes++;
  3195. else if (panel->panel_mode == DSI_OP_VIDEO_MODE)
  3196. num_video_modes++;
  3197. else if (panel->panel_mode == DSI_OP_CMD_MODE)
  3198. num_cmd_modes++;
  3199. dsi_panel_get_max_res_count(utils, child_np,
  3200. &dsc_count, &lm_count);
  3201. panel->dsc_count = max(dsc_count, panel->dsc_count);
  3202. panel->lm_count = max(lm_count, panel->lm_count);
  3203. }
  3204. num_dfps_rates = !panel->dfps_caps.dfps_support ? 1 :
  3205. panel->dfps_caps.dfps_list_len;
  3206. num_bit_clks = !panel->dyn_clk_caps.dyn_clk_support ? 1 :
  3207. panel->dyn_clk_caps.bit_clk_list_len;
  3208. /*
  3209. * Inflate num_of_modes by fps and bit clks in dfps.
  3210. * Single command mode for video mode panels supporting
  3211. * panel operating mode switch.
  3212. */
  3213. num_video_modes = num_video_modes * num_bit_clks * num_dfps_rates;
  3214. if ((panel->panel_mode == DSI_OP_VIDEO_MODE) &&
  3215. (panel->panel_mode_switch_enabled))
  3216. num_cmd_modes = 1;
  3217. else
  3218. num_cmd_modes = num_cmd_modes * num_bit_clks;
  3219. panel->num_display_modes = num_video_modes + num_cmd_modes;
  3220. error:
  3221. return rc;
  3222. }
  3223. int dsi_panel_get_phy_props(struct dsi_panel *panel,
  3224. struct dsi_panel_phy_props *phy_props)
  3225. {
  3226. int rc = 0;
  3227. if (!panel || !phy_props) {
  3228. DSI_ERR("invalid params\n");
  3229. return -EINVAL;
  3230. }
  3231. memcpy(phy_props, &panel->phy_props, sizeof(*phy_props));
  3232. return rc;
  3233. }
  3234. int dsi_panel_get_dfps_caps(struct dsi_panel *panel,
  3235. struct dsi_dfps_capabilities *dfps_caps)
  3236. {
  3237. int rc = 0;
  3238. if (!panel || !dfps_caps) {
  3239. DSI_ERR("invalid params\n");
  3240. return -EINVAL;
  3241. }
  3242. memcpy(dfps_caps, &panel->dfps_caps, sizeof(*dfps_caps));
  3243. return rc;
  3244. }
  3245. void dsi_panel_put_mode(struct dsi_display_mode *mode)
  3246. {
  3247. int i;
  3248. if (!mode->priv_info)
  3249. return;
  3250. for (i = 0; i < DSI_CMD_SET_MAX; i++) {
  3251. dsi_panel_destroy_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3252. dsi_panel_dealloc_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3253. }
  3254. kfree(mode->priv_info);
  3255. }
  3256. void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config,
  3257. struct dsi_display_mode *mode, u32 frame_threshold_us)
  3258. {
  3259. u32 frame_time_us, nslices;
  3260. u64 min_bitclk_hz, total_active_pixels, bits_per_line, pclk_rate_hz,
  3261. dsi_transfer_time_us, pixel_clk_khz;
  3262. struct msm_display_dsc_info *dsc = mode->timing.dsc;
  3263. struct dsi_mode_info *timing = &mode->timing;
  3264. struct dsi_display_mode *display_mode;
  3265. u32 jitter_numer, jitter_denom, prefill_lines;
  3266. u32 min_threshold_us, prefill_time_us, max_transfer_us;
  3267. u16 bpp;
  3268. /* Packet overlead in bits,2 bytes header + 2 bytes checksum
  3269. * + 1 byte dcs data command.
  3270. */
  3271. const u32 packet_overhead = 56;
  3272. display_mode = container_of(timing, struct dsi_display_mode, timing);
  3273. jitter_numer = display_mode->priv_info->panel_jitter_numer;
  3274. jitter_denom = display_mode->priv_info->panel_jitter_denom;
  3275. frame_time_us = mult_frac(1000, 1000, (timing->refresh_rate));
  3276. if (timing->refresh_rate >= 120)
  3277. frame_threshold_us = HIGH_REFRESH_RATE_THRESHOLD_TIME_US;
  3278. if (timing->dsc_enabled) {
  3279. nslices = (timing->h_active)/(dsc->config.slice_width);
  3280. /* (slice width x bit-per-pixel + packet overhead) x
  3281. * number of slices x height x fps / lane
  3282. */
  3283. bpp = DSC_BPP(dsc->config);
  3284. bits_per_line = ((dsc->config.slice_width * bpp) +
  3285. packet_overhead) * nslices;
  3286. bits_per_line = bits_per_line / (config->num_data_lanes);
  3287. min_bitclk_hz = (bits_per_line * timing->v_active *
  3288. timing->refresh_rate);
  3289. } else {
  3290. total_active_pixels = ((dsi_h_active_dce(timing)
  3291. * timing->v_active));
  3292. /* calculate the actual bitclk needed to transfer the frame */
  3293. min_bitclk_hz = (total_active_pixels * (timing->refresh_rate) *
  3294. (config->bpp));
  3295. do_div(min_bitclk_hz, config->num_data_lanes);
  3296. }
  3297. timing->min_dsi_clk_hz = min_bitclk_hz;
  3298. min_threshold_us = mult_frac(frame_time_us,
  3299. jitter_numer, (jitter_denom * 100));
  3300. /*
  3301. * Increase the prefill_lines proportionately as recommended
  3302. * 35lines for 60fps, 52 for 90fps, 70lines for 120fps.
  3303. */
  3304. prefill_lines = mult_frac(MIN_PREFILL_LINES,
  3305. timing->refresh_rate, 60);
  3306. prefill_time_us = mult_frac(frame_time_us, prefill_lines,
  3307. (timing->v_active));
  3308. /*
  3309. * Threshold is sum of panel jitter time, prefill line time
  3310. * plus 64usec buffer time.
  3311. */
  3312. min_threshold_us = min_threshold_us + 64 + prefill_time_us;
  3313. DSI_DEBUG("min threshold time=%d\n", min_threshold_us);
  3314. if (timing->clk_rate_hz) {
  3315. /* adjust the transfer time proportionately for bit clk*/
  3316. dsi_transfer_time_us = frame_time_us * min_bitclk_hz;
  3317. do_div(dsi_transfer_time_us, timing->clk_rate_hz);
  3318. timing->dsi_transfer_time_us = dsi_transfer_time_us;
  3319. } else if (mode->priv_info->mdp_transfer_time_us) {
  3320. max_transfer_us = frame_time_us - min_threshold_us;
  3321. mode->priv_info->mdp_transfer_time_us = min(
  3322. mode->priv_info->mdp_transfer_time_us,
  3323. max_transfer_us);
  3324. timing->dsi_transfer_time_us =
  3325. mode->priv_info->mdp_transfer_time_us;
  3326. } else {
  3327. if (min_threshold_us > frame_threshold_us)
  3328. frame_threshold_us = min_threshold_us;
  3329. timing->dsi_transfer_time_us = frame_time_us -
  3330. frame_threshold_us;
  3331. }
  3332. timing->mdp_transfer_time_us = timing->dsi_transfer_time_us;
  3333. /* Force update mdp xfer time to hal,if clk and mdp xfer time is set */
  3334. if (mode->priv_info->mdp_transfer_time_us && timing->clk_rate_hz) {
  3335. timing->mdp_transfer_time_us =
  3336. mode->priv_info->mdp_transfer_time_us;
  3337. }
  3338. /* Calculate pclk_khz to update modeinfo */
  3339. pclk_rate_hz = min_bitclk_hz * frame_time_us;
  3340. do_div(pclk_rate_hz, timing->dsi_transfer_time_us);
  3341. pixel_clk_khz = pclk_rate_hz * config->num_data_lanes;
  3342. do_div(pixel_clk_khz, config->bpp);
  3343. display_mode->pixel_clk_khz = pixel_clk_khz;
  3344. display_mode->pixel_clk_khz = display_mode->pixel_clk_khz / 1000;
  3345. }
  3346. int dsi_panel_get_mode(struct dsi_panel *panel,
  3347. u32 index, struct dsi_display_mode *mode,
  3348. int topology_override)
  3349. {
  3350. struct device_node *timings_np, *child_np;
  3351. struct dsi_parser_utils *utils;
  3352. struct dsi_display_mode_priv_info *prv_info;
  3353. u32 child_idx = 0;
  3354. int rc = 0, num_timings;
  3355. int traffic_mode;
  3356. void *utils_data = NULL;
  3357. if (!panel || !mode) {
  3358. DSI_ERR("invalid params\n");
  3359. return -EINVAL;
  3360. }
  3361. mutex_lock(&panel->panel_lock);
  3362. utils = &panel->utils;
  3363. mode->priv_info = kzalloc(sizeof(*mode->priv_info), GFP_KERNEL);
  3364. if (!mode->priv_info) {
  3365. rc = -ENOMEM;
  3366. goto done;
  3367. }
  3368. prv_info = mode->priv_info;
  3369. timings_np = utils->get_child_by_name(utils->data,
  3370. "qcom,mdss-dsi-display-timings");
  3371. if (!timings_np) {
  3372. DSI_ERR("no display timing nodes defined\n");
  3373. rc = -EINVAL;
  3374. goto parse_fail;
  3375. }
  3376. num_timings = utils->get_child_count(timings_np);
  3377. if (!num_timings || num_timings > DSI_MODE_MAX) {
  3378. DSI_ERR("invalid count of timing nodes: %d\n", num_timings);
  3379. rc = -EINVAL;
  3380. goto parse_fail;
  3381. }
  3382. utils_data = utils->data;
  3383. traffic_mode = panel->video_config.traffic_mode;
  3384. dsi_for_each_child_node(timings_np, child_np) {
  3385. if (index != child_idx++)
  3386. continue;
  3387. utils->data = child_np;
  3388. if (panel->panel_mode_switch_enabled) {
  3389. if (!dsi_panel_parse_panel_mode_caps(mode, utils)) {
  3390. mode->panel_mode_caps = panel->panel_mode;
  3391. DSI_INFO("panel mode isn't specified in timing[%d]\n",
  3392. child_idx);
  3393. }
  3394. } else {
  3395. mode->panel_mode_caps = panel->panel_mode;
  3396. }
  3397. rc = dsi_panel_parse_timing(&mode->timing, utils);
  3398. if (rc) {
  3399. DSI_ERR("failed to parse panel timing, rc=%d\n", rc);
  3400. goto parse_fail;
  3401. }
  3402. if (panel->dyn_clk_caps.dyn_clk_support) {
  3403. rc = dsi_panel_parse_dyn_clk_list(mode, utils);
  3404. if (rc)
  3405. DSI_ERR("failed to parse dynamic clk rates, rc=%d\n", rc);
  3406. }
  3407. rc = dsi_panel_parse_dsc_params(mode, utils);
  3408. if (rc) {
  3409. DSI_ERR("failed to parse dsc params, rc=%d\n", rc);
  3410. goto parse_fail;
  3411. }
  3412. rc = dsi_panel_parse_vdc_params(mode, utils, traffic_mode);
  3413. if (rc) {
  3414. DSI_ERR("failed to parse vdc params, rc=%d\n", rc);
  3415. goto parse_fail;
  3416. }
  3417. rc = dsi_panel_parse_topology(prv_info, utils,
  3418. topology_override);
  3419. if (rc) {
  3420. DSI_ERR("failed to parse panel topology, rc=%d\n", rc);
  3421. goto parse_fail;
  3422. }
  3423. rc = dsi_panel_parse_cmd_sets(prv_info, utils);
  3424. if (rc) {
  3425. DSI_ERR("failed to parse command sets, rc=%d\n", rc);
  3426. goto parse_fail;
  3427. }
  3428. rc = dsi_panel_parse_jitter_config(mode, utils);
  3429. if (rc)
  3430. DSI_ERR(
  3431. "failed to parse panel jitter config, rc=%d\n", rc);
  3432. rc = dsi_panel_parse_phy_timing(mode, utils);
  3433. if (rc) {
  3434. DSI_ERR(
  3435. "failed to parse panel phy timings, rc=%d\n", rc);
  3436. goto parse_fail;
  3437. }
  3438. rc = dsi_panel_parse_partial_update_caps(mode, utils);
  3439. if (rc)
  3440. DSI_ERR("failed to partial update caps, rc=%d\n", rc);
  3441. }
  3442. goto done;
  3443. parse_fail:
  3444. kfree(mode->priv_info);
  3445. mode->priv_info = NULL;
  3446. done:
  3447. utils->data = utils_data;
  3448. mutex_unlock(&panel->panel_lock);
  3449. return rc;
  3450. }
  3451. int dsi_panel_get_host_cfg_for_mode(struct dsi_panel *panel,
  3452. struct dsi_display_mode *mode,
  3453. struct dsi_host_config *config)
  3454. {
  3455. int rc = 0;
  3456. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  3457. if (!panel || !mode || !config) {
  3458. DSI_ERR("invalid params\n");
  3459. return -EINVAL;
  3460. }
  3461. mutex_lock(&panel->panel_lock);
  3462. config->panel_mode = panel->panel_mode;
  3463. memcpy(&config->common_config, &panel->host_config,
  3464. sizeof(config->common_config));
  3465. if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3466. memcpy(&config->u.video_engine, &panel->video_config,
  3467. sizeof(config->u.video_engine));
  3468. } else {
  3469. memcpy(&config->u.cmd_engine, &panel->cmd_config,
  3470. sizeof(config->u.cmd_engine));
  3471. }
  3472. memcpy(&config->video_timing, &mode->timing,
  3473. sizeof(config->video_timing));
  3474. config->video_timing.mdp_transfer_time_us =
  3475. mode->priv_info->mdp_transfer_time_us;
  3476. config->video_timing.dsc_enabled = mode->priv_info->dsc_enabled;
  3477. config->video_timing.dsc = &mode->priv_info->dsc;
  3478. config->video_timing.vdc_enabled = mode->priv_info->vdc_enabled;
  3479. config->video_timing.vdc = &mode->priv_info->vdc;
  3480. if (dyn_clk_caps->dyn_clk_support)
  3481. config->bit_clk_rate_hz_override = mode->timing.clk_rate_hz;
  3482. else
  3483. config->bit_clk_rate_hz_override = mode->priv_info->clk_rate_hz;
  3484. config->esc_clk_rate_hz = 19200000;
  3485. mutex_unlock(&panel->panel_lock);
  3486. return rc;
  3487. }
  3488. int dsi_panel_pre_prepare(struct dsi_panel *panel)
  3489. {
  3490. int rc = 0;
  3491. if (!panel) {
  3492. DSI_ERR("invalid params\n");
  3493. return -EINVAL;
  3494. }
  3495. mutex_lock(&panel->panel_lock);
  3496. /* If LP11_INIT is set, panel will be powered up during prepare() */
  3497. if (panel->lp11_init)
  3498. goto error;
  3499. rc = dsi_panel_power_on(panel);
  3500. if (rc) {
  3501. DSI_ERR("[%s] panel power on failed, rc=%d\n", panel->name, rc);
  3502. goto error;
  3503. }
  3504. error:
  3505. mutex_unlock(&panel->panel_lock);
  3506. return rc;
  3507. }
  3508. int dsi_panel_update_pps(struct dsi_panel *panel)
  3509. {
  3510. int rc = 0;
  3511. struct dsi_panel_cmd_set *set = NULL;
  3512. struct dsi_display_mode_priv_info *priv_info = NULL;
  3513. if (!panel || !panel->cur_mode) {
  3514. DSI_ERR("invalid params\n");
  3515. return -EINVAL;
  3516. }
  3517. mutex_lock(&panel->panel_lock);
  3518. priv_info = panel->cur_mode->priv_info;
  3519. set = &priv_info->cmd_sets[DSI_CMD_SET_PPS];
  3520. if (priv_info->dsc_enabled)
  3521. dsi_dsc_create_pps_buf_cmd(&priv_info->dsc,
  3522. panel->dce_pps_cmd, 0,
  3523. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3524. else if (priv_info->vdc_enabled)
  3525. dsi_vdc_create_pps_buf_cmd(&priv_info->vdc,
  3526. panel->dce_pps_cmd, 0,
  3527. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3528. if (priv_info->dsc_enabled || priv_info->vdc_enabled) {
  3529. rc = dsi_panel_create_cmd_packets(panel->dce_pps_cmd,
  3530. DSI_CMD_PPS_SIZE, 1, set->cmds);
  3531. if (rc) {
  3532. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  3533. goto error;
  3534. }
  3535. }
  3536. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PPS);
  3537. if (rc) {
  3538. DSI_ERR("[%s] failed to send DSI_CMD_SET_PPS cmds, rc=%d\n",
  3539. panel->name, rc);
  3540. }
  3541. dsi_panel_destroy_cmd_packets(set);
  3542. error:
  3543. mutex_unlock(&panel->panel_lock);
  3544. return rc;
  3545. }
  3546. int dsi_panel_set_lp1(struct dsi_panel *panel)
  3547. {
  3548. int rc = 0;
  3549. if (!panel) {
  3550. DSI_ERR("invalid params\n");
  3551. return -EINVAL;
  3552. }
  3553. mutex_lock(&panel->panel_lock);
  3554. if (!panel->panel_initialized)
  3555. goto exit;
  3556. /*
  3557. * Consider LP1->LP2->LP1.
  3558. * If the panel is already in LP mode, do not need to
  3559. * set the regulator.
  3560. * IBB and AB power mode would be set at the same time
  3561. * in PMIC driver, so we only call ibb setting that is enough.
  3562. */
  3563. if (dsi_panel_is_type_oled(panel) &&
  3564. panel->power_mode != SDE_MODE_DPMS_LP2)
  3565. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3566. "ibb", REGULATOR_MODE_IDLE);
  3567. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP1);
  3568. if (rc)
  3569. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP1 cmd, rc=%d\n",
  3570. panel->name, rc);
  3571. exit:
  3572. mutex_unlock(&panel->panel_lock);
  3573. return rc;
  3574. }
  3575. int dsi_panel_set_lp2(struct dsi_panel *panel)
  3576. {
  3577. int rc = 0;
  3578. if (!panel) {
  3579. DSI_ERR("invalid params\n");
  3580. return -EINVAL;
  3581. }
  3582. mutex_lock(&panel->panel_lock);
  3583. if (!panel->panel_initialized)
  3584. goto exit;
  3585. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP2);
  3586. if (rc)
  3587. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP2 cmd, rc=%d\n",
  3588. panel->name, rc);
  3589. exit:
  3590. mutex_unlock(&panel->panel_lock);
  3591. return rc;
  3592. }
  3593. int dsi_panel_set_nolp(struct dsi_panel *panel)
  3594. {
  3595. int rc = 0;
  3596. if (!panel) {
  3597. DSI_ERR("invalid params\n");
  3598. return -EINVAL;
  3599. }
  3600. mutex_lock(&panel->panel_lock);
  3601. if (!panel->panel_initialized)
  3602. goto exit;
  3603. /*
  3604. * Consider about LP1->LP2->NOLP.
  3605. */
  3606. if (dsi_panel_is_type_oled(panel) &&
  3607. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3608. panel->power_mode == SDE_MODE_DPMS_LP2))
  3609. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3610. "ibb", REGULATOR_MODE_NORMAL);
  3611. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_NOLP);
  3612. if (rc)
  3613. DSI_ERR("[%s] failed to send DSI_CMD_SET_NOLP cmd, rc=%d\n",
  3614. panel->name, rc);
  3615. exit:
  3616. mutex_unlock(&panel->panel_lock);
  3617. return rc;
  3618. }
  3619. int dsi_panel_prepare(struct dsi_panel *panel)
  3620. {
  3621. int rc = 0;
  3622. if (!panel) {
  3623. DSI_ERR("invalid params\n");
  3624. return -EINVAL;
  3625. }
  3626. mutex_lock(&panel->panel_lock);
  3627. if (panel->lp11_init) {
  3628. rc = dsi_panel_power_on(panel);
  3629. if (rc) {
  3630. DSI_ERR("[%s] panel power on failed, rc=%d\n",
  3631. panel->name, rc);
  3632. goto error;
  3633. }
  3634. }
  3635. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_ON);
  3636. if (rc) {
  3637. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_ON cmds, rc=%d\n",
  3638. panel->name, rc);
  3639. goto error;
  3640. }
  3641. error:
  3642. mutex_unlock(&panel->panel_lock);
  3643. return rc;
  3644. }
  3645. static int dsi_panel_roi_prepare_dcs_cmds(struct dsi_panel_cmd_set *set,
  3646. struct dsi_rect *roi, int ctrl_idx, int unicast)
  3647. {
  3648. static const int ROI_CMD_LEN = 5;
  3649. int rc = 0;
  3650. /* DTYPE_DCS_LWRITE */
  3651. char *caset, *paset;
  3652. set->cmds = NULL;
  3653. caset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3654. if (!caset) {
  3655. rc = -ENOMEM;
  3656. goto exit;
  3657. }
  3658. caset[0] = 0x2a;
  3659. caset[1] = (roi->x & 0xFF00) >> 8;
  3660. caset[2] = roi->x & 0xFF;
  3661. caset[3] = ((roi->x - 1 + roi->w) & 0xFF00) >> 8;
  3662. caset[4] = (roi->x - 1 + roi->w) & 0xFF;
  3663. paset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3664. if (!paset) {
  3665. rc = -ENOMEM;
  3666. goto error_free_mem;
  3667. }
  3668. paset[0] = 0x2b;
  3669. paset[1] = (roi->y & 0xFF00) >> 8;
  3670. paset[2] = roi->y & 0xFF;
  3671. paset[3] = ((roi->y - 1 + roi->h) & 0xFF00) >> 8;
  3672. paset[4] = (roi->y - 1 + roi->h) & 0xFF;
  3673. set->type = DSI_CMD_SET_ROI;
  3674. set->state = DSI_CMD_SET_STATE_LP;
  3675. set->count = 2; /* send caset + paset together */
  3676. set->cmds = kcalloc(set->count, sizeof(*set->cmds), GFP_KERNEL);
  3677. if (!set->cmds) {
  3678. rc = -ENOMEM;
  3679. goto error_free_mem;
  3680. }
  3681. set->cmds[0].msg.channel = 0;
  3682. set->cmds[0].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3683. set->cmds[0].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST_COMMAND : 0;
  3684. set->cmds[0].msg.tx_len = ROI_CMD_LEN;
  3685. set->cmds[0].msg.tx_buf = caset;
  3686. set->cmds[0].msg.rx_len = 0;
  3687. set->cmds[0].msg.rx_buf = 0;
  3688. set->cmds[0].last_command = 0;
  3689. set->cmds[0].post_wait_ms = 0;
  3690. set->cmds[0].ctrl = unicast ? ctrl_idx : 0;
  3691. set->cmds[1].msg.channel = 0;
  3692. set->cmds[1].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3693. set->cmds[1].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST_COMMAND : 0;
  3694. set->cmds[1].msg.tx_len = ROI_CMD_LEN;
  3695. set->cmds[1].msg.tx_buf = paset;
  3696. set->cmds[1].msg.rx_len = 0;
  3697. set->cmds[1].msg.rx_buf = 0;
  3698. set->cmds[1].last_command = 1;
  3699. set->cmds[1].post_wait_ms = 0;
  3700. set->cmds[1].ctrl = unicast ? ctrl_idx : 0;
  3701. goto exit;
  3702. error_free_mem:
  3703. kfree(caset);
  3704. kfree(paset);
  3705. kfree(set->cmds);
  3706. exit:
  3707. return rc;
  3708. }
  3709. int dsi_panel_send_qsync_on_dcs(struct dsi_panel *panel,
  3710. int ctrl_idx)
  3711. {
  3712. int rc = 0;
  3713. if (!panel) {
  3714. DSI_ERR("invalid params\n");
  3715. return -EINVAL;
  3716. }
  3717. mutex_lock(&panel->panel_lock);
  3718. DSI_DEBUG("ctrl:%d qsync on\n", ctrl_idx);
  3719. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_ON);
  3720. if (rc)
  3721. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_ON cmds rc=%d\n",
  3722. panel->name, rc);
  3723. mutex_unlock(&panel->panel_lock);
  3724. return rc;
  3725. }
  3726. int dsi_panel_send_qsync_off_dcs(struct dsi_panel *panel,
  3727. int ctrl_idx)
  3728. {
  3729. int rc = 0;
  3730. if (!panel) {
  3731. DSI_ERR("invalid params\n");
  3732. return -EINVAL;
  3733. }
  3734. mutex_lock(&panel->panel_lock);
  3735. DSI_DEBUG("ctrl:%d qsync off\n", ctrl_idx);
  3736. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_OFF);
  3737. if (rc)
  3738. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_OFF cmds rc=%d\n",
  3739. panel->name, rc);
  3740. mutex_unlock(&panel->panel_lock);
  3741. return rc;
  3742. }
  3743. int dsi_panel_send_roi_dcs(struct dsi_panel *panel, int ctrl_idx,
  3744. struct dsi_rect *roi)
  3745. {
  3746. int rc = 0;
  3747. struct dsi_panel_cmd_set *set;
  3748. struct dsi_display_mode_priv_info *priv_info;
  3749. if (!panel || !panel->cur_mode) {
  3750. DSI_ERR("Invalid params\n");
  3751. return -EINVAL;
  3752. }
  3753. priv_info = panel->cur_mode->priv_info;
  3754. set = &priv_info->cmd_sets[DSI_CMD_SET_ROI];
  3755. rc = dsi_panel_roi_prepare_dcs_cmds(set, roi, ctrl_idx, true);
  3756. if (rc) {
  3757. DSI_ERR("[%s] failed to prepare DSI_CMD_SET_ROI cmds, rc=%d\n",
  3758. panel->name, rc);
  3759. return rc;
  3760. }
  3761. DSI_DEBUG("[%s] send roi x %d y %d w %d h %d\n", panel->name,
  3762. roi->x, roi->y, roi->w, roi->h);
  3763. SDE_EVT32(roi->x, roi->y, roi->w, roi->h);
  3764. mutex_lock(&panel->panel_lock);
  3765. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ROI);
  3766. if (rc)
  3767. DSI_ERR("[%s] failed to send DSI_CMD_SET_ROI cmds, rc=%d\n",
  3768. panel->name, rc);
  3769. mutex_unlock(&panel->panel_lock);
  3770. dsi_panel_destroy_cmd_packets(set);
  3771. dsi_panel_dealloc_cmd_packets(set);
  3772. return rc;
  3773. }
  3774. int dsi_panel_switch_cmd_mode_out(struct dsi_panel *panel)
  3775. {
  3776. int rc = 0;
  3777. if (!panel) {
  3778. DSI_ERR("Invalid params\n");
  3779. return -EINVAL;
  3780. }
  3781. mutex_lock(&panel->panel_lock);
  3782. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_SWITCH_OUT);
  3783. if (rc)
  3784. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_SWITCH_OUT cmds, rc=%d\n",
  3785. panel->name, rc);
  3786. mutex_unlock(&panel->panel_lock);
  3787. return rc;
  3788. }
  3789. int dsi_panel_switch_video_mode_out(struct dsi_panel *panel)
  3790. {
  3791. int rc = 0;
  3792. if (!panel) {
  3793. DSI_ERR("Invalid params\n");
  3794. return -EINVAL;
  3795. }
  3796. mutex_lock(&panel->panel_lock);
  3797. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_SWITCH_OUT);
  3798. if (rc)
  3799. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_SWITCH_OUT cmds, rc=%d\n",
  3800. panel->name, rc);
  3801. mutex_unlock(&panel->panel_lock);
  3802. return rc;
  3803. }
  3804. int dsi_panel_switch_video_mode_in(struct dsi_panel *panel)
  3805. {
  3806. int rc = 0;
  3807. if (!panel) {
  3808. DSI_ERR("Invalid params\n");
  3809. return -EINVAL;
  3810. }
  3811. mutex_lock(&panel->panel_lock);
  3812. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_SWITCH_IN);
  3813. if (rc)
  3814. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_SWITCH_IN cmds, rc=%d\n",
  3815. panel->name, rc);
  3816. mutex_unlock(&panel->panel_lock);
  3817. return rc;
  3818. }
  3819. int dsi_panel_switch_cmd_mode_in(struct dsi_panel *panel)
  3820. {
  3821. int rc = 0;
  3822. if (!panel) {
  3823. DSI_ERR("Invalid params\n");
  3824. return -EINVAL;
  3825. }
  3826. mutex_lock(&panel->panel_lock);
  3827. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_SWITCH_IN);
  3828. if (rc)
  3829. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_SWITCH_IN cmds, rc=%d\n",
  3830. panel->name, rc);
  3831. mutex_unlock(&panel->panel_lock);
  3832. return rc;
  3833. }
  3834. int dsi_panel_switch(struct dsi_panel *panel)
  3835. {
  3836. int rc = 0;
  3837. if (!panel) {
  3838. DSI_ERR("Invalid params\n");
  3839. return -EINVAL;
  3840. }
  3841. mutex_lock(&panel->panel_lock);
  3842. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_TIMING_SWITCH);
  3843. if (rc)
  3844. DSI_ERR("[%s] failed to send DSI_CMD_SET_TIMING_SWITCH cmds, rc=%d\n",
  3845. panel->name, rc);
  3846. mutex_unlock(&panel->panel_lock);
  3847. return rc;
  3848. }
  3849. int dsi_panel_post_switch(struct dsi_panel *panel)
  3850. {
  3851. int rc = 0;
  3852. if (!panel) {
  3853. DSI_ERR("Invalid params\n");
  3854. return -EINVAL;
  3855. }
  3856. mutex_lock(&panel->panel_lock);
  3857. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_TIMING_SWITCH);
  3858. if (rc)
  3859. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_TIMING_SWITCH cmds, rc=%d\n",
  3860. panel->name, rc);
  3861. mutex_unlock(&panel->panel_lock);
  3862. return rc;
  3863. }
  3864. int dsi_panel_enable(struct dsi_panel *panel)
  3865. {
  3866. int rc = 0;
  3867. if (!panel) {
  3868. DSI_ERR("Invalid params\n");
  3869. return -EINVAL;
  3870. }
  3871. mutex_lock(&panel->panel_lock);
  3872. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ON);
  3873. if (rc) {
  3874. DSI_ERR("[%s] failed to send DSI_CMD_SET_ON cmds, rc=%d\n",
  3875. panel->name, rc);
  3876. goto error;
  3877. }
  3878. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  3879. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_ON);
  3880. if (rc) {
  3881. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_ON cmds, rc=%d\n",
  3882. panel->name, rc);
  3883. goto error;
  3884. }
  3885. } else if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3886. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_ON);
  3887. if (rc) {
  3888. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_ON cmds, rc=%d\n",
  3889. panel->name, rc);
  3890. goto error;
  3891. }
  3892. }
  3893. panel->panel_initialized = true;
  3894. error:
  3895. mutex_unlock(&panel->panel_lock);
  3896. return rc;
  3897. }
  3898. int dsi_panel_post_enable(struct dsi_panel *panel)
  3899. {
  3900. int rc = 0;
  3901. if (!panel) {
  3902. DSI_ERR("invalid params\n");
  3903. return -EINVAL;
  3904. }
  3905. mutex_lock(&panel->panel_lock);
  3906. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_ON);
  3907. if (rc) {
  3908. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_ON cmds, rc=%d\n",
  3909. panel->name, rc);
  3910. goto error;
  3911. }
  3912. error:
  3913. mutex_unlock(&panel->panel_lock);
  3914. return rc;
  3915. }
  3916. int dsi_panel_pre_disable(struct dsi_panel *panel)
  3917. {
  3918. int rc = 0;
  3919. if (!panel) {
  3920. DSI_ERR("invalid params\n");
  3921. return -EINVAL;
  3922. }
  3923. mutex_lock(&panel->panel_lock);
  3924. if (gpio_is_valid(panel->bl_config.en_gpio))
  3925. gpio_set_value(panel->bl_config.en_gpio, 0);
  3926. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_OFF);
  3927. if (rc) {
  3928. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_OFF cmds, rc=%d\n",
  3929. panel->name, rc);
  3930. goto error;
  3931. }
  3932. error:
  3933. mutex_unlock(&panel->panel_lock);
  3934. return rc;
  3935. }
  3936. int dsi_panel_disable(struct dsi_panel *panel)
  3937. {
  3938. int rc = 0;
  3939. if (!panel) {
  3940. DSI_ERR("invalid params\n");
  3941. return -EINVAL;
  3942. }
  3943. mutex_lock(&panel->panel_lock);
  3944. /* Avoid sending panel off commands when ESD recovery is underway */
  3945. if (!atomic_read(&panel->esd_recovery_pending)) {
  3946. /*
  3947. * Need to set IBB/AB regulator mode to STANDBY,
  3948. * if panel is going off from AOD mode.
  3949. */
  3950. if (dsi_panel_is_type_oled(panel) &&
  3951. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3952. panel->power_mode == SDE_MODE_DPMS_LP2))
  3953. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3954. "ibb", REGULATOR_MODE_STANDBY);
  3955. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_OFF);
  3956. if (rc) {
  3957. /*
  3958. * Sending panel off commands may fail when DSI
  3959. * controller is in a bad state. These failures can be
  3960. * ignored since controller will go for full reset on
  3961. * subsequent display enable anyway.
  3962. */
  3963. pr_warn_ratelimited("[%s] failed to send DSI_CMD_SET_OFF cmds, rc=%d\n",
  3964. panel->name, rc);
  3965. rc = 0;
  3966. }
  3967. }
  3968. panel->panel_initialized = false;
  3969. panel->power_mode = SDE_MODE_DPMS_OFF;
  3970. mutex_unlock(&panel->panel_lock);
  3971. return rc;
  3972. }
  3973. int dsi_panel_unprepare(struct dsi_panel *panel)
  3974. {
  3975. int rc = 0;
  3976. if (!panel) {
  3977. DSI_ERR("invalid params\n");
  3978. return -EINVAL;
  3979. }
  3980. mutex_lock(&panel->panel_lock);
  3981. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_OFF);
  3982. if (rc) {
  3983. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_OFF cmds, rc=%d\n",
  3984. panel->name, rc);
  3985. goto error;
  3986. }
  3987. error:
  3988. mutex_unlock(&panel->panel_lock);
  3989. return rc;
  3990. }
  3991. int dsi_panel_post_unprepare(struct dsi_panel *panel)
  3992. {
  3993. int rc = 0;
  3994. if (!panel) {
  3995. DSI_ERR("invalid params\n");
  3996. return -EINVAL;
  3997. }
  3998. mutex_lock(&panel->panel_lock);
  3999. rc = dsi_panel_power_off(panel);
  4000. if (rc) {
  4001. DSI_ERR("[%s] panel power_Off failed, rc=%d\n",
  4002. panel->name, rc);
  4003. goto error;
  4004. }
  4005. error:
  4006. mutex_unlock(&panel->panel_lock);
  4007. return rc;
  4008. }