main.c 125 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2020, 2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #define pr_fmt(fmt) "icnss2: " fmt
  7. #include <linux/of_address.h>
  8. #include <linux/clk.h>
  9. #include <linux/iommu.h>
  10. #include <linux/export.h>
  11. #include <linux/err.h>
  12. #include <linux/of.h>
  13. #include <linux/of_device.h>
  14. #include <linux/init.h>
  15. #include <linux/io.h>
  16. #include <linux/module.h>
  17. #include <linux/kernel.h>
  18. #include <linux/debugfs.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/slab.h>
  21. #include <linux/regulator/consumer.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/sched.h>
  24. #include <linux/delay.h>
  25. #include <linux/dma-mapping.h>
  26. #include <linux/thread_info.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/etherdevice.h>
  29. #include <linux/of.h>
  30. #include <linux/of_irq.h>
  31. #include <linux/pm_runtime.h>
  32. #include <linux/soc/qcom/qmi.h>
  33. #include <linux/sysfs.h>
  34. #include <linux/thermal.h>
  35. #include <soc/qcom/memory_dump.h>
  36. #include <soc/qcom/secure_buffer.h>
  37. #include <soc/qcom/socinfo.h>
  38. #include <soc/qcom/qcom_ramdump.h>
  39. #include <linux/soc/qcom/smem.h>
  40. #include <linux/soc/qcom/smem_state.h>
  41. #include <linux/remoteproc.h>
  42. #include <linux/remoteproc/qcom_rproc.h>
  43. #include <linux/soc/qcom/pdr.h>
  44. #include <linux/remoteproc.h>
  45. #include <trace/hooks/remoteproc.h>
  46. #ifdef SLATE_MODULE_ENABLED
  47. #include <linux/soc/qcom/slatecom_interface.h>
  48. #include <linux/soc/qcom/slate_events_bridge_intf.h>
  49. #include <uapi/linux/slatecom_interface.h>
  50. #endif
  51. #include "main.h"
  52. #include "qmi.h"
  53. #include "debug.h"
  54. #include "power.h"
  55. #include "genl.h"
  56. #define MAX_PROP_SIZE 32
  57. #define NUM_LOG_PAGES 10
  58. #define NUM_LOG_LONG_PAGES 4
  59. #define ICNSS_MAGIC 0x5abc5abc
  60. #define ICNSS_WLAN_SERVICE_NAME "wlan/fw"
  61. #define ICNSS_WLANPD_NAME "msm/modem/wlan_pd"
  62. #define ICNSS_DEFAULT_FEATURE_MASK 0x01
  63. #define ICNSS_M3_SEGMENT(segment) "wcnss_"segment
  64. #define ICNSS_M3_SEGMENT_PHYAREG "phyareg"
  65. #define ICNSS_M3_SEGMENT_PHYA "phydbg"
  66. #define ICNSS_M3_SEGMENT_WMACREG "wmac0reg"
  67. #define ICNSS_M3_SEGMENT_WCSSDBG "WCSSDBG"
  68. #define ICNSS_M3_SEGMENT_PHYAM3 "PHYAPDMEM"
  69. #define ICNSS_QUIRKS_DEFAULT BIT(FW_REJUVENATE_ENABLE)
  70. #define ICNSS_MAX_PROBE_CNT 2
  71. #define ICNSS_BDF_TYPE_DEFAULT ICNSS_BDF_ELF
  72. #define PROBE_TIMEOUT 15000
  73. #define SMP2P_SOC_WAKE_TIMEOUT 500
  74. #ifdef CONFIG_ICNSS2_DEBUG
  75. static unsigned long qmi_timeout = 3000;
  76. module_param(qmi_timeout, ulong, 0600);
  77. #define WLFW_TIMEOUT msecs_to_jiffies(qmi_timeout)
  78. #else
  79. #define WLFW_TIMEOUT msecs_to_jiffies(3000)
  80. #endif
  81. #define ICNSS_RECOVERY_TIMEOUT 60000
  82. #define ICNSS_WPSS_SSR_TIMEOUT 5000
  83. #define ICNSS_CAL_TIMEOUT 40000
  84. static struct icnss_priv *penv;
  85. static struct work_struct wpss_loader;
  86. static struct work_struct wpss_ssr_work;
  87. uint64_t dynamic_feature_mask = ICNSS_DEFAULT_FEATURE_MASK;
  88. #define ICNSS_EVENT_PENDING 2989
  89. #define ICNSS_EVENT_SYNC BIT(0)
  90. #define ICNSS_EVENT_UNINTERRUPTIBLE BIT(1)
  91. #define ICNSS_EVENT_SYNC_UNINTERRUPTIBLE (ICNSS_EVENT_UNINTERRUPTIBLE | \
  92. ICNSS_EVENT_SYNC)
  93. #define ICNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  94. #define ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  95. #define SMP2P_GET_MAX_RETRY 4
  96. #define SMP2P_GET_RETRY_DELAY_MS 500
  97. #define RAMDUMP_NUM_DEVICES 256
  98. #define ICNSS_RAMDUMP_NAME "icnss_ramdump"
  99. #define WLAN_EN_TEMP_THRESHOLD 5000
  100. #define WLAN_EN_DELAY 500
  101. #define ICNSS_RPROC_LEN 10
  102. static DEFINE_IDA(rd_minor_id);
  103. enum icnss_pdr_cause_index {
  104. ICNSS_FW_CRASH,
  105. ICNSS_ROOT_PD_CRASH,
  106. ICNSS_ROOT_PD_SHUTDOWN,
  107. ICNSS_HOST_ERROR,
  108. };
  109. static const char * const icnss_pdr_cause[] = {
  110. [ICNSS_FW_CRASH] = "FW crash",
  111. [ICNSS_ROOT_PD_CRASH] = "Root PD crashed",
  112. [ICNSS_ROOT_PD_SHUTDOWN] = "Root PD shutdown",
  113. [ICNSS_HOST_ERROR] = "Host error",
  114. };
  115. static void icnss_set_plat_priv(struct icnss_priv *priv)
  116. {
  117. penv = priv;
  118. }
  119. static struct icnss_priv *icnss_get_plat_priv(void)
  120. {
  121. return penv;
  122. }
  123. static inline void icnss_wpss_unload(struct icnss_priv *priv)
  124. {
  125. if (priv && priv->rproc) {
  126. rproc_shutdown(priv->rproc);
  127. rproc_put(priv->rproc);
  128. priv->rproc = NULL;
  129. }
  130. }
  131. static ssize_t icnss_sysfs_store(struct kobject *kobj,
  132. struct kobj_attribute *attr,
  133. const char *buf, size_t count)
  134. {
  135. struct icnss_priv *priv = icnss_get_plat_priv();
  136. if (!priv)
  137. return count;
  138. icnss_pr_dbg("Received shutdown indication");
  139. atomic_set(&priv->is_shutdown, true);
  140. if (priv->wpss_supported && priv->device_id == ADRASTEA_DEVICE_ID)
  141. icnss_wpss_unload(priv);
  142. return count;
  143. }
  144. static struct kobj_attribute icnss_sysfs_attribute =
  145. __ATTR(shutdown, 0660, NULL, icnss_sysfs_store);
  146. static void icnss_pm_stay_awake(struct icnss_priv *priv)
  147. {
  148. if (atomic_inc_return(&priv->pm_count) != 1)
  149. return;
  150. icnss_pr_vdbg("PM stay awake, state: 0x%lx, count: %d\n", priv->state,
  151. atomic_read(&priv->pm_count));
  152. pm_stay_awake(&priv->pdev->dev);
  153. priv->stats.pm_stay_awake++;
  154. }
  155. static void icnss_pm_relax(struct icnss_priv *priv)
  156. {
  157. int r = atomic_dec_return(&priv->pm_count);
  158. WARN_ON(r < 0);
  159. if (r != 0)
  160. return;
  161. icnss_pr_vdbg("PM relax, state: 0x%lx, count: %d\n", priv->state,
  162. atomic_read(&priv->pm_count));
  163. pm_relax(&priv->pdev->dev);
  164. priv->stats.pm_relax++;
  165. }
  166. char *icnss_driver_event_to_str(enum icnss_driver_event_type type)
  167. {
  168. switch (type) {
  169. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  170. return "SERVER_ARRIVE";
  171. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  172. return "SERVER_EXIT";
  173. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  174. return "FW_READY";
  175. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  176. return "REGISTER_DRIVER";
  177. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  178. return "UNREGISTER_DRIVER";
  179. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  180. return "PD_SERVICE_DOWN";
  181. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  182. return "FW_EARLY_CRASH_IND";
  183. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  184. return "IDLE_SHUTDOWN";
  185. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  186. return "IDLE_RESTART";
  187. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  188. return "FW_INIT_DONE";
  189. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  190. return "QDSS_TRACE_REQ_MEM";
  191. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  192. return "QDSS_TRACE_SAVE";
  193. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  194. return "QDSS_TRACE_FREE";
  195. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  196. return "M3_DUMP_UPLOAD";
  197. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  198. return "QDSS_TRACE_REQ_DATA";
  199. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  200. return "SUBSYS_RESTART_LEVEL";
  201. case ICNSS_DRIVER_EVENT_MAX:
  202. return "EVENT_MAX";
  203. }
  204. return "UNKNOWN";
  205. };
  206. char *icnss_soc_wake_event_to_str(enum icnss_soc_wake_event_type type)
  207. {
  208. switch (type) {
  209. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  210. return "SOC_WAKE_REQUEST";
  211. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  212. return "SOC_WAKE_RELEASE";
  213. case ICNSS_SOC_WAKE_EVENT_MAX:
  214. return "SOC_EVENT_MAX";
  215. }
  216. return "UNKNOWN";
  217. };
  218. int icnss_driver_event_post(struct icnss_priv *priv,
  219. enum icnss_driver_event_type type,
  220. u32 flags, void *data)
  221. {
  222. struct icnss_driver_event *event;
  223. unsigned long irq_flags;
  224. int gfp = GFP_KERNEL;
  225. int ret = 0;
  226. if (!priv)
  227. return -ENODEV;
  228. icnss_pr_dbg("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  229. icnss_driver_event_to_str(type), type, current->comm,
  230. flags, priv->state);
  231. if (type >= ICNSS_DRIVER_EVENT_MAX) {
  232. icnss_pr_err("Invalid Event type: %d, can't post", type);
  233. return -EINVAL;
  234. }
  235. if (in_interrupt() || irqs_disabled())
  236. gfp = GFP_ATOMIC;
  237. event = kzalloc(sizeof(*event), gfp);
  238. if (event == NULL)
  239. return -ENOMEM;
  240. icnss_pm_stay_awake(priv);
  241. event->type = type;
  242. event->data = data;
  243. init_completion(&event->complete);
  244. event->ret = ICNSS_EVENT_PENDING;
  245. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  246. spin_lock_irqsave(&priv->event_lock, irq_flags);
  247. list_add_tail(&event->list, &priv->event_list);
  248. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  249. priv->stats.events[type].posted++;
  250. queue_work(priv->event_wq, &priv->event_work);
  251. if (!(flags & ICNSS_EVENT_SYNC))
  252. goto out;
  253. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  254. wait_for_completion(&event->complete);
  255. else
  256. ret = wait_for_completion_interruptible(&event->complete);
  257. icnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  258. icnss_driver_event_to_str(type), type, priv->state, ret,
  259. event->ret);
  260. spin_lock_irqsave(&priv->event_lock, irq_flags);
  261. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  262. event->sync = false;
  263. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  264. ret = -EINTR;
  265. goto out;
  266. }
  267. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  268. ret = event->ret;
  269. kfree(event);
  270. out:
  271. icnss_pm_relax(priv);
  272. return ret;
  273. }
  274. int icnss_soc_wake_event_post(struct icnss_priv *priv,
  275. enum icnss_soc_wake_event_type type,
  276. u32 flags, void *data)
  277. {
  278. struct icnss_soc_wake_event *event;
  279. unsigned long irq_flags;
  280. int gfp = GFP_KERNEL;
  281. int ret = 0;
  282. if (!priv)
  283. return -ENODEV;
  284. icnss_pr_soc_wake("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  285. icnss_soc_wake_event_to_str(type),
  286. type, current->comm, flags, priv->state);
  287. if (type >= ICNSS_SOC_WAKE_EVENT_MAX) {
  288. icnss_pr_err("Invalid Event type: %d, can't post", type);
  289. return -EINVAL;
  290. }
  291. if (in_interrupt() || irqs_disabled())
  292. gfp = GFP_ATOMIC;
  293. event = kzalloc(sizeof(*event), gfp);
  294. if (!event)
  295. return -ENOMEM;
  296. icnss_pm_stay_awake(priv);
  297. event->type = type;
  298. event->data = data;
  299. init_completion(&event->complete);
  300. event->ret = ICNSS_EVENT_PENDING;
  301. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  302. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  303. list_add_tail(&event->list, &priv->soc_wake_msg_list);
  304. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  305. priv->stats.soc_wake_events[type].posted++;
  306. queue_work(priv->soc_wake_wq, &priv->soc_wake_msg_work);
  307. if (!(flags & ICNSS_EVENT_SYNC))
  308. goto out;
  309. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  310. wait_for_completion(&event->complete);
  311. else
  312. ret = wait_for_completion_interruptible(&event->complete);
  313. icnss_pr_soc_wake("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  314. icnss_soc_wake_event_to_str(type),
  315. type, priv->state, ret, event->ret);
  316. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  317. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  318. event->sync = false;
  319. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  320. ret = -EINTR;
  321. goto out;
  322. }
  323. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  324. ret = event->ret;
  325. kfree(event);
  326. out:
  327. icnss_pm_relax(priv);
  328. return ret;
  329. }
  330. bool icnss_is_fw_ready(void)
  331. {
  332. if (!penv)
  333. return false;
  334. else
  335. return test_bit(ICNSS_FW_READY, &penv->state);
  336. }
  337. EXPORT_SYMBOL(icnss_is_fw_ready);
  338. void icnss_block_shutdown(bool status)
  339. {
  340. if (!penv)
  341. return;
  342. if (status) {
  343. set_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  344. reinit_completion(&penv->unblock_shutdown);
  345. } else {
  346. clear_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  347. complete(&penv->unblock_shutdown);
  348. }
  349. }
  350. EXPORT_SYMBOL(icnss_block_shutdown);
  351. bool icnss_is_fw_down(void)
  352. {
  353. struct icnss_priv *priv = icnss_get_plat_priv();
  354. if (!priv)
  355. return false;
  356. return test_bit(ICNSS_FW_DOWN, &priv->state) ||
  357. test_bit(ICNSS_PD_RESTART, &priv->state) ||
  358. test_bit(ICNSS_REJUVENATE, &priv->state);
  359. }
  360. EXPORT_SYMBOL(icnss_is_fw_down);
  361. unsigned long icnss_get_device_config(void)
  362. {
  363. struct icnss_priv *priv = icnss_get_plat_priv();
  364. if (!priv)
  365. return 0;
  366. return priv->device_config;
  367. }
  368. EXPORT_SYMBOL(icnss_get_device_config);
  369. bool icnss_is_rejuvenate(void)
  370. {
  371. if (!penv)
  372. return false;
  373. else
  374. return test_bit(ICNSS_REJUVENATE, &penv->state);
  375. }
  376. EXPORT_SYMBOL(icnss_is_rejuvenate);
  377. bool icnss_is_pdr(void)
  378. {
  379. if (!penv)
  380. return false;
  381. else
  382. return test_bit(ICNSS_PDR, &penv->state);
  383. }
  384. EXPORT_SYMBOL(icnss_is_pdr);
  385. static int icnss_send_smp2p(struct icnss_priv *priv,
  386. enum icnss_smp2p_msg_id msg_id,
  387. enum smp2p_out_entry smp2p_entry)
  388. {
  389. unsigned int value = 0;
  390. int ret;
  391. if (!priv || IS_ERR(priv->smp2p_info[smp2p_entry].smem_state))
  392. return -EINVAL;
  393. /* No Need to check FW_DOWN for ICNSS_RESET_MSG */
  394. if (msg_id == ICNSS_RESET_MSG) {
  395. priv->smp2p_info[smp2p_entry].seq = 0;
  396. ret = qcom_smem_state_update_bits(
  397. priv->smp2p_info[smp2p_entry].smem_state,
  398. ICNSS_SMEM_VALUE_MASK,
  399. 0);
  400. if (ret)
  401. icnss_pr_err("Error in SMP2P sent. ret: %d, %s\n",
  402. ret, icnss_smp2p_str[smp2p_entry]);
  403. return ret;
  404. }
  405. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  406. !test_bit(ICNSS_FW_READY, &priv->state)) {
  407. icnss_pr_smp2p("FW down, ignoring sending SMP2P state: 0x%lx\n",
  408. priv->state);
  409. return -EINVAL;
  410. }
  411. value |= priv->smp2p_info[smp2p_entry].seq++;
  412. value <<= ICNSS_SMEM_SEQ_NO_POS;
  413. value |= msg_id;
  414. icnss_pr_smp2p("Sending SMP2P value: 0x%X\n", value);
  415. if (msg_id == ICNSS_SOC_WAKE_REQ || msg_id == ICNSS_SOC_WAKE_REL)
  416. reinit_completion(&penv->smp2p_soc_wake_wait);
  417. ret = qcom_smem_state_update_bits(
  418. priv->smp2p_info[smp2p_entry].smem_state,
  419. ICNSS_SMEM_VALUE_MASK,
  420. value);
  421. if (ret) {
  422. icnss_pr_smp2p("Error in SMP2P send ret: %d, %s\n", ret,
  423. icnss_smp2p_str[smp2p_entry]);
  424. } else {
  425. if (msg_id == ICNSS_SOC_WAKE_REQ ||
  426. msg_id == ICNSS_SOC_WAKE_REL) {
  427. if (!wait_for_completion_timeout(
  428. &priv->smp2p_soc_wake_wait,
  429. msecs_to_jiffies(SMP2P_SOC_WAKE_TIMEOUT))) {
  430. icnss_pr_err("SMP2P Soc Wake timeout msg %d, %s\n", msg_id,
  431. icnss_smp2p_str[smp2p_entry]);
  432. if (!test_bit(ICNSS_FW_DOWN, &priv->state))
  433. ICNSS_ASSERT(0);
  434. }
  435. }
  436. }
  437. return ret;
  438. }
  439. bool icnss_is_low_power(void)
  440. {
  441. if (!penv)
  442. return false;
  443. else
  444. return test_bit(ICNSS_LOW_POWER, &penv->state);
  445. }
  446. EXPORT_SYMBOL(icnss_is_low_power);
  447. static irqreturn_t fw_error_fatal_handler(int irq, void *ctx)
  448. {
  449. struct icnss_priv *priv = ctx;
  450. if (priv)
  451. priv->force_err_fatal = true;
  452. icnss_pr_err("Received force error fatal request from FW\n");
  453. return IRQ_HANDLED;
  454. }
  455. static irqreturn_t fw_crash_indication_handler(int irq, void *ctx)
  456. {
  457. struct icnss_priv *priv = ctx;
  458. struct icnss_uevent_fw_down_data fw_down_data = {0};
  459. icnss_pr_err("Received early crash indication from FW\n");
  460. if (priv) {
  461. if (priv->wpss_self_recovery_enabled)
  462. mod_timer(&priv->wpss_ssr_timer,
  463. jiffies + msecs_to_jiffies(ICNSS_WPSS_SSR_TIMEOUT));
  464. set_bit(ICNSS_FW_DOWN, &priv->state);
  465. icnss_ignore_fw_timeout(true);
  466. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  467. clear_bit(ICNSS_FW_READY, &priv->state);
  468. fw_down_data.crashed = true;
  469. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  470. &fw_down_data);
  471. }
  472. }
  473. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND,
  474. 0, NULL);
  475. return IRQ_HANDLED;
  476. }
  477. static void register_fw_error_notifications(struct device *dev)
  478. {
  479. struct icnss_priv *priv = dev_get_drvdata(dev);
  480. struct device_node *dev_node;
  481. int irq = 0, ret = 0;
  482. if (!priv)
  483. return;
  484. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  485. if (!dev_node) {
  486. icnss_pr_err("Failed to get smp2p node for force-fatal-error\n");
  487. return;
  488. }
  489. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  490. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  491. ret = irq = of_irq_get_byname(dev_node,
  492. "qcom,smp2p-force-fatal-error");
  493. if (ret < 0) {
  494. icnss_pr_err("Unable to get force-fatal-error irq %d\n",
  495. irq);
  496. return;
  497. }
  498. }
  499. ret = devm_request_threaded_irq(dev, irq, NULL, fw_error_fatal_handler,
  500. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  501. "wlanfw-err", priv);
  502. if (ret < 0) {
  503. icnss_pr_err("Unable to register for error fatal IRQ handler %d ret = %d",
  504. irq, ret);
  505. return;
  506. }
  507. icnss_pr_dbg("FW force error fatal handler registered irq = %d\n", irq);
  508. priv->fw_error_fatal_irq = irq;
  509. }
  510. static void register_early_crash_notifications(struct device *dev)
  511. {
  512. struct icnss_priv *priv = dev_get_drvdata(dev);
  513. struct device_node *dev_node;
  514. int irq = 0, ret = 0;
  515. if (!priv)
  516. return;
  517. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  518. if (!dev_node) {
  519. icnss_pr_err("Failed to get smp2p node for early-crash-ind\n");
  520. return;
  521. }
  522. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  523. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  524. ret = irq = of_irq_get_byname(dev_node,
  525. "qcom,smp2p-early-crash-ind");
  526. if (ret < 0) {
  527. icnss_pr_err("Unable to get early-crash-ind irq %d\n",
  528. irq);
  529. return;
  530. }
  531. }
  532. ret = devm_request_threaded_irq(dev, irq, NULL,
  533. fw_crash_indication_handler,
  534. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  535. "wlanfw-early-crash-ind", priv);
  536. if (ret < 0) {
  537. icnss_pr_err("Unable to register for early crash indication IRQ handler %d ret = %d",
  538. irq, ret);
  539. return;
  540. }
  541. icnss_pr_dbg("FW crash indication handler registered irq = %d\n", irq);
  542. priv->fw_early_crash_irq = irq;
  543. }
  544. static int icnss_get_temperature(struct icnss_priv *priv, int *temp)
  545. {
  546. struct thermal_zone_device *thermal_dev;
  547. const char *tsens;
  548. int ret;
  549. ret = of_property_read_string(priv->pdev->dev.of_node,
  550. "tsens",
  551. &tsens);
  552. if (ret)
  553. return ret;
  554. icnss_pr_dbg("Thermal Sensor is %s\n", tsens);
  555. thermal_dev = thermal_zone_get_zone_by_name(tsens);
  556. if (IS_ERR(thermal_dev)) {
  557. icnss_pr_err("Fail to get thermal zone. ret: %d",
  558. PTR_ERR(thermal_dev));
  559. return PTR_ERR(thermal_dev);
  560. }
  561. ret = thermal_zone_get_temp(thermal_dev, temp);
  562. if (ret)
  563. icnss_pr_err("Fail to get temperature. ret: %d", ret);
  564. return ret;
  565. }
  566. static irqreturn_t fw_soc_wake_ack_handler(int irq, void *ctx)
  567. {
  568. struct icnss_priv *priv = ctx;
  569. if (priv)
  570. complete(&priv->smp2p_soc_wake_wait);
  571. return IRQ_HANDLED;
  572. }
  573. static void register_soc_wake_notif(struct device *dev)
  574. {
  575. struct icnss_priv *priv = dev_get_drvdata(dev);
  576. struct device_node *dev_node;
  577. int irq = 0, ret = 0;
  578. if (!priv)
  579. return;
  580. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_2_in");
  581. if (!dev_node) {
  582. icnss_pr_err("Failed to get smp2p node for soc-wake-ack\n");
  583. return;
  584. }
  585. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  586. if (strcmp("qcom,smp2p_map_wlan_2_in", dev_node->name) == 0) {
  587. ret = irq = of_irq_get_byname(dev_node,
  588. "qcom,smp2p-soc-wake-ack");
  589. if (ret < 0) {
  590. icnss_pr_err("Unable to get soc wake ack irq %d\n",
  591. irq);
  592. return;
  593. }
  594. }
  595. ret = devm_request_threaded_irq(dev, irq, NULL,
  596. fw_soc_wake_ack_handler,
  597. IRQF_ONESHOT | IRQF_TRIGGER_RISING |
  598. IRQF_TRIGGER_FALLING,
  599. "wlanfw-soc-wake-ack", priv);
  600. if (ret < 0) {
  601. icnss_pr_err("Unable to register for SOC Wake ACK IRQ handler %d ret = %d",
  602. irq, ret);
  603. return;
  604. }
  605. icnss_pr_dbg("FW SOC Wake ACK handler registered irq = %d\n", irq);
  606. priv->fw_soc_wake_ack_irq = irq;
  607. }
  608. int icnss_call_driver_uevent(struct icnss_priv *priv,
  609. enum icnss_uevent uevent, void *data)
  610. {
  611. struct icnss_uevent_data uevent_data;
  612. if (!priv->ops || !priv->ops->uevent)
  613. return 0;
  614. icnss_pr_dbg("Calling driver uevent state: 0x%lx, uevent: %d\n",
  615. priv->state, uevent);
  616. uevent_data.uevent = uevent;
  617. uevent_data.data = data;
  618. return priv->ops->uevent(&priv->pdev->dev, &uevent_data);
  619. }
  620. static int icnss_setup_dms_mac(struct icnss_priv *priv)
  621. {
  622. int i;
  623. int ret = 0;
  624. ret = icnss_qmi_get_dms_mac(priv);
  625. if (ret == 0 && priv->dms.mac_valid)
  626. goto qmi_send;
  627. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  628. * Thus assert on failure to get MAC from DMS even after retries
  629. */
  630. if (priv->use_nv_mac) {
  631. for (i = 0; i < ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  632. if (priv->dms.mac_valid)
  633. break;
  634. ret = icnss_qmi_get_dms_mac(priv);
  635. if (ret != -EAGAIN)
  636. break;
  637. msleep(ICNSS_DMS_QMI_CONNECTION_WAIT_MS);
  638. }
  639. if (!priv->dms.nv_mac_not_prov && !priv->dms.mac_valid) {
  640. icnss_pr_err("Unable to get MAC from DMS after retries\n");
  641. ICNSS_ASSERT(0);
  642. return -EINVAL;
  643. }
  644. }
  645. qmi_send:
  646. if (priv->dms.mac_valid)
  647. ret =
  648. icnss_wlfw_wlan_mac_req_send_sync(priv, priv->dms.mac,
  649. ARRAY_SIZE(priv->dms.mac));
  650. return ret;
  651. }
  652. static void icnss_get_smp2p_info(struct icnss_priv *priv,
  653. enum smp2p_out_entry smp2p_entry)
  654. {
  655. int retry = 0;
  656. int error;
  657. if (priv->smp2p_info[smp2p_entry].smem_state)
  658. return;
  659. retry:
  660. priv->smp2p_info[smp2p_entry].smem_state =
  661. qcom_smem_state_get(&priv->pdev->dev,
  662. icnss_smp2p_str[smp2p_entry],
  663. &priv->smp2p_info[smp2p_entry].smem_bit);
  664. if (IS_ERR(priv->smp2p_info[smp2p_entry].smem_state)) {
  665. if (retry++ < SMP2P_GET_MAX_RETRY) {
  666. error = PTR_ERR(priv->smp2p_info[smp2p_entry].smem_state);
  667. icnss_pr_err("Failed to get smem state, ret: %d Entry: %s",
  668. error, icnss_smp2p_str[smp2p_entry]);
  669. msleep(SMP2P_GET_RETRY_DELAY_MS);
  670. goto retry;
  671. }
  672. ICNSS_ASSERT(0);
  673. return;
  674. }
  675. icnss_pr_dbg("smem state, Entry: %s", icnss_smp2p_str[smp2p_entry]);
  676. }
  677. static inline
  678. void icnss_set_wlan_en_delay(struct icnss_priv *priv)
  679. {
  680. if (priv->wlan_en_delay_ms_user > WLAN_EN_DELAY) {
  681. priv->wlan_en_delay_ms = priv->wlan_en_delay_ms_user;
  682. } else {
  683. priv->wlan_en_delay_ms = WLAN_EN_DELAY;
  684. }
  685. }
  686. static enum wlfw_wlan_rf_subtype_v01 icnss_rf_subtype_value_to_type(u32 val)
  687. {
  688. switch (val) {
  689. case WLAN_RF_SLATE:
  690. return WLFW_WLAN_RF_SLATE_V01;
  691. case WLAN_RF_APACHE:
  692. return WLFW_WLAN_RF_APACHE_V01;
  693. default:
  694. return WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01;
  695. }
  696. }
  697. #ifdef SLATE_MODULE_ENABLED
  698. static void icnss_send_wlan_boot_init(void)
  699. {
  700. send_wlan_state(GMI_MGR_WLAN_BOOT_INIT);
  701. icnss_pr_info("sent wlan boot init command\n");
  702. }
  703. static void icnss_send_wlan_boot_complete(void)
  704. {
  705. send_wlan_state(GMI_MGR_WLAN_BOOT_COMPLETE);
  706. icnss_pr_info("sent wlan boot complete command\n");
  707. }
  708. static int icnss_wait_for_slate_complete(struct icnss_priv *priv)
  709. {
  710. if (!test_bit(ICNSS_SLATE_UP, &priv->state)) {
  711. reinit_completion(&priv->slate_boot_complete);
  712. icnss_pr_err("Waiting for slate boot up notification, 0x%lx\n",
  713. priv->state);
  714. wait_for_completion(&priv->slate_boot_complete);
  715. }
  716. if (!test_bit(ICNSS_SLATE_UP, &priv->state))
  717. return -EINVAL;
  718. icnss_send_wlan_boot_init();
  719. return 0;
  720. }
  721. #else
  722. static void icnss_send_wlan_boot_complete(void)
  723. {
  724. }
  725. static int icnss_wait_for_slate_complete(struct icnss_priv *priv)
  726. {
  727. return 0;
  728. }
  729. #endif
  730. static int icnss_driver_event_server_arrive(struct icnss_priv *priv,
  731. void *data)
  732. {
  733. int ret = 0;
  734. int temp = 0;
  735. bool ignore_assert = false;
  736. enum wlfw_wlan_rf_subtype_v01 rf_subtype;
  737. if (!priv)
  738. return -ENODEV;
  739. set_bit(ICNSS_WLFW_EXISTS, &priv->state);
  740. clear_bit(ICNSS_FW_DOWN, &priv->state);
  741. clear_bit(ICNSS_FW_READY, &priv->state);
  742. if (priv->is_slate_rfa) {
  743. ret = icnss_wait_for_slate_complete(priv);
  744. if (ret == -EINVAL) {
  745. icnss_pr_err("Slate complete failed\n");
  746. return ret;
  747. }
  748. }
  749. icnss_ignore_fw_timeout(false);
  750. if (test_bit(ICNSS_WLFW_CONNECTED, &priv->state)) {
  751. icnss_pr_err("QMI Server already in Connected State\n");
  752. ICNSS_ASSERT(0);
  753. }
  754. ret = icnss_connect_to_fw_server(priv, data);
  755. if (ret)
  756. goto fail;
  757. set_bit(ICNSS_WLFW_CONNECTED, &priv->state);
  758. ret = wlfw_ind_register_send_sync_msg(priv);
  759. if (ret < 0) {
  760. if (ret == -EALREADY) {
  761. ret = 0;
  762. goto qmi_registered;
  763. }
  764. ignore_assert = true;
  765. goto fail;
  766. }
  767. if (priv->is_rf_subtype_valid) {
  768. rf_subtype = icnss_rf_subtype_value_to_type(priv->rf_subtype);
  769. if (rf_subtype != WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01) {
  770. ret = wlfw_wlan_hw_init_cfg_msg(priv, rf_subtype);
  771. if (ret < 0)
  772. icnss_pr_dbg("Sending rf_subtype failed ret %d\n",
  773. ret);
  774. } else {
  775. icnss_pr_dbg("Invalid rf subtype %d in DT\n",
  776. priv->rf_subtype);
  777. }
  778. }
  779. if (priv->device_id == WCN6750_DEVICE_ID ||
  780. priv->device_id == WCN6450_DEVICE_ID) {
  781. if (!icnss_get_temperature(priv, &temp)) {
  782. icnss_pr_dbg("Temperature: %d\n", temp);
  783. if (temp < WLAN_EN_TEMP_THRESHOLD)
  784. icnss_set_wlan_en_delay(priv);
  785. }
  786. ret = wlfw_host_cap_send_sync(priv);
  787. if (ret < 0)
  788. goto fail;
  789. }
  790. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  791. if (!priv->msa_va) {
  792. icnss_pr_err("Invalid MSA address\n");
  793. ret = -EINVAL;
  794. goto fail;
  795. }
  796. ret = wlfw_msa_mem_info_send_sync_msg(priv);
  797. if (ret < 0) {
  798. ignore_assert = true;
  799. goto fail;
  800. }
  801. ret = wlfw_msa_ready_send_sync_msg(priv);
  802. if (ret < 0) {
  803. ignore_assert = true;
  804. goto fail;
  805. }
  806. }
  807. if (priv->device_id == WCN6450_DEVICE_ID)
  808. icnss_hw_power_off(priv);
  809. ret = wlfw_cap_send_sync_msg(priv);
  810. if (ret < 0) {
  811. ignore_assert = true;
  812. goto fail;
  813. }
  814. ret = icnss_hw_power_on(priv);
  815. if (ret)
  816. goto fail;
  817. if (priv->device_id == WCN6750_DEVICE_ID ||
  818. priv->device_id == WCN6450_DEVICE_ID) {
  819. ret = wlfw_device_info_send_msg(priv);
  820. if (ret < 0) {
  821. ignore_assert = true;
  822. goto device_info_failure;
  823. }
  824. priv->mem_base_va = devm_ioremap(&priv->pdev->dev,
  825. priv->mem_base_pa,
  826. priv->mem_base_size);
  827. if (!priv->mem_base_va) {
  828. icnss_pr_err("Ioremap failed for bar address\n");
  829. goto device_info_failure;
  830. }
  831. icnss_pr_dbg("Non-Secured Bar Address pa: %pa, va: 0x%pK\n",
  832. &priv->mem_base_pa,
  833. priv->mem_base_va);
  834. if (priv->mhi_state_info_pa)
  835. priv->mhi_state_info_va = devm_ioremap(&priv->pdev->dev,
  836. priv->mhi_state_info_pa,
  837. PAGE_SIZE);
  838. if (!priv->mhi_state_info_va)
  839. icnss_pr_err("Ioremap failed for MHI info address\n");
  840. icnss_pr_dbg("MHI state info Address pa: %pa, va: 0x%pK\n",
  841. &priv->mhi_state_info_pa,
  842. priv->mhi_state_info_va);
  843. }
  844. if (priv->bdf_download_support) {
  845. icnss_wlfw_bdf_dnld_send_sync(priv, ICNSS_BDF_REGDB);
  846. ret = icnss_wlfw_bdf_dnld_send_sync(priv,
  847. priv->ctrl_params.bdf_type);
  848. if (ret < 0)
  849. goto device_info_failure;
  850. }
  851. if (priv->device_id == WCN6450_DEVICE_ID) {
  852. ret = icnss_wlfw_qdss_dnld_send_sync(priv);
  853. if (ret < 0)
  854. icnss_pr_info("Failed to download qdss config file for WCN6450, ret = %d\n",
  855. ret);
  856. }
  857. if (priv->device_id == WCN6750_DEVICE_ID ||
  858. priv->device_id == WCN6450_DEVICE_ID) {
  859. if (!priv->fw_soc_wake_ack_irq)
  860. register_soc_wake_notif(&priv->pdev->dev);
  861. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_SOC_WAKE);
  862. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  863. }
  864. if (priv->wpss_supported)
  865. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_POWER_SAVE);
  866. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  867. if (priv->bdf_download_support) {
  868. ret = wlfw_cal_report_req(priv);
  869. if (ret < 0)
  870. goto device_info_failure;
  871. }
  872. wlfw_dynamic_feature_mask_send_sync_msg(priv,
  873. dynamic_feature_mask);
  874. }
  875. if (!priv->fw_error_fatal_irq)
  876. register_fw_error_notifications(&priv->pdev->dev);
  877. if (!priv->fw_early_crash_irq)
  878. register_early_crash_notifications(&priv->pdev->dev);
  879. if (priv->psf_supported)
  880. queue_work(priv->soc_update_wq, &priv->soc_update_work);
  881. return ret;
  882. device_info_failure:
  883. icnss_hw_power_off(priv);
  884. fail:
  885. ICNSS_ASSERT(ignore_assert);
  886. qmi_registered:
  887. return ret;
  888. }
  889. static int icnss_driver_event_server_exit(struct icnss_priv *priv)
  890. {
  891. if (!priv)
  892. return -ENODEV;
  893. icnss_pr_info("WLAN FW Service Disconnected: 0x%lx\n", priv->state);
  894. icnss_clear_server(priv);
  895. if (priv->psf_supported)
  896. priv->last_updated_voltage = 0;
  897. return 0;
  898. }
  899. static int icnss_call_driver_probe(struct icnss_priv *priv)
  900. {
  901. int ret = 0;
  902. int probe_cnt = 0;
  903. if (!priv->ops || !priv->ops->probe)
  904. return 0;
  905. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  906. return -EINVAL;
  907. icnss_pr_dbg("Calling driver probe state: 0x%lx\n", priv->state);
  908. icnss_hw_power_on(priv);
  909. icnss_block_shutdown(true);
  910. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  911. ret = priv->ops->probe(&priv->pdev->dev);
  912. probe_cnt++;
  913. if (ret != -EPROBE_DEFER)
  914. break;
  915. }
  916. if (ret < 0) {
  917. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  918. ret, priv->state, probe_cnt);
  919. icnss_block_shutdown(false);
  920. goto out;
  921. }
  922. icnss_block_shutdown(false);
  923. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  924. return 0;
  925. out:
  926. icnss_hw_power_off(priv);
  927. return ret;
  928. }
  929. static int icnss_call_driver_shutdown(struct icnss_priv *priv)
  930. {
  931. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  932. goto out;
  933. if (!priv->ops || !priv->ops->shutdown)
  934. goto out;
  935. if (test_bit(ICNSS_SHUTDOWN_DONE, &priv->state))
  936. goto out;
  937. icnss_pr_dbg("Calling driver shutdown state: 0x%lx\n", priv->state);
  938. priv->ops->shutdown(&priv->pdev->dev);
  939. set_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  940. out:
  941. return 0;
  942. }
  943. static int icnss_pd_restart_complete(struct icnss_priv *priv)
  944. {
  945. int ret = 0;
  946. icnss_pm_relax(priv);
  947. icnss_call_driver_shutdown(priv);
  948. clear_bit(ICNSS_PDR, &priv->state);
  949. clear_bit(ICNSS_REJUVENATE, &priv->state);
  950. clear_bit(ICNSS_PD_RESTART, &priv->state);
  951. clear_bit(ICNSS_LOW_POWER, &priv->state);
  952. priv->early_crash_ind = false;
  953. priv->is_ssr = false;
  954. if (!priv->ops || !priv->ops->reinit)
  955. goto out;
  956. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  957. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  958. priv->state);
  959. goto out;
  960. }
  961. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  962. goto call_probe;
  963. icnss_pr_dbg("Calling driver reinit state: 0x%lx\n", priv->state);
  964. icnss_hw_power_on(priv);
  965. icnss_block_shutdown(true);
  966. ret = priv->ops->reinit(&priv->pdev->dev);
  967. if (ret < 0) {
  968. icnss_fatal_err("Driver reinit failed: %d, state: 0x%lx\n",
  969. ret, priv->state);
  970. if (!priv->allow_recursive_recovery)
  971. ICNSS_ASSERT(false);
  972. icnss_block_shutdown(false);
  973. goto out_power_off;
  974. }
  975. icnss_block_shutdown(false);
  976. clear_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  977. return 0;
  978. call_probe:
  979. return icnss_call_driver_probe(priv);
  980. out_power_off:
  981. icnss_hw_power_off(priv);
  982. out:
  983. return ret;
  984. }
  985. static int icnss_driver_event_fw_ready_ind(struct icnss_priv *priv, void *data)
  986. {
  987. int ret = 0;
  988. if (!priv)
  989. return -ENODEV;
  990. del_timer(&priv->recovery_timer);
  991. set_bit(ICNSS_FW_READY, &priv->state);
  992. clear_bit(ICNSS_MODE_ON, &priv->state);
  993. atomic_set(&priv->soc_wake_ref_count, 0);
  994. if (priv->device_id == WCN6750_DEVICE_ID ||
  995. priv->device_id == WCN6450_DEVICE_ID)
  996. icnss_free_qdss_mem(priv);
  997. icnss_pr_info("WLAN FW is ready: 0x%lx\n", priv->state);
  998. icnss_hw_power_off(priv);
  999. if (!priv->pdev) {
  1000. icnss_pr_err("Device is not ready\n");
  1001. ret = -ENODEV;
  1002. goto out;
  1003. }
  1004. if (priv->is_slate_rfa && test_bit(ICNSS_SLATE_UP, &priv->state))
  1005. icnss_send_wlan_boot_complete();
  1006. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  1007. ret = icnss_pd_restart_complete(priv);
  1008. } else {
  1009. if (priv->wpss_supported)
  1010. icnss_setup_dms_mac(priv);
  1011. ret = icnss_call_driver_probe(priv);
  1012. }
  1013. icnss_vreg_unvote(priv);
  1014. out:
  1015. return ret;
  1016. }
  1017. static int icnss_driver_event_fw_init_done(struct icnss_priv *priv, void *data)
  1018. {
  1019. int ret = 0;
  1020. if (!priv)
  1021. return -ENODEV;
  1022. icnss_pr_info("WLAN FW Initialization done: 0x%lx\n", priv->state);
  1023. if (priv->device_id == WCN6750_DEVICE_ID) {
  1024. ret = icnss_wlfw_qdss_dnld_send_sync(priv);
  1025. if (ret < 0)
  1026. icnss_pr_info("Failed to download qdss config file for WCN6750, ret = %d\n",
  1027. ret);
  1028. }
  1029. if (test_bit(ICNSS_COLD_BOOT_CAL, &priv->state)) {
  1030. mod_timer(&priv->recovery_timer,
  1031. jiffies + msecs_to_jiffies(ICNSS_CAL_TIMEOUT));
  1032. ret = wlfw_wlan_mode_send_sync_msg(priv,
  1033. (enum wlfw_driver_mode_enum_v01)ICNSS_CALIBRATION);
  1034. } else {
  1035. icnss_driver_event_fw_ready_ind(priv, NULL);
  1036. }
  1037. return ret;
  1038. }
  1039. int icnss_alloc_qdss_mem(struct icnss_priv *priv)
  1040. {
  1041. struct platform_device *pdev = priv->pdev;
  1042. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1043. int i, j;
  1044. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1045. if (!qdss_mem[i].va && qdss_mem[i].size) {
  1046. qdss_mem[i].va =
  1047. dma_alloc_coherent(&pdev->dev,
  1048. qdss_mem[i].size,
  1049. &qdss_mem[i].pa,
  1050. GFP_KERNEL);
  1051. if (!qdss_mem[i].va) {
  1052. icnss_pr_err("Failed to allocate QDSS memory for FW, size: 0x%zx, type: %u, chuck-ID: %d\n",
  1053. qdss_mem[i].size,
  1054. qdss_mem[i].type, i);
  1055. break;
  1056. }
  1057. }
  1058. }
  1059. /* Best-effort allocation for QDSS trace */
  1060. if (i < priv->qdss_mem_seg_len) {
  1061. for (j = i; j < priv->qdss_mem_seg_len; j++) {
  1062. qdss_mem[j].type = 0;
  1063. qdss_mem[j].size = 0;
  1064. }
  1065. priv->qdss_mem_seg_len = i;
  1066. }
  1067. return 0;
  1068. }
  1069. void icnss_free_qdss_mem(struct icnss_priv *priv)
  1070. {
  1071. struct platform_device *pdev = priv->pdev;
  1072. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1073. int i;
  1074. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1075. if (qdss_mem[i].va && qdss_mem[i].size) {
  1076. icnss_pr_dbg("Freeing memory for QDSS: pa: %pa, size: 0x%zx, type: %u\n",
  1077. &qdss_mem[i].pa, qdss_mem[i].size,
  1078. qdss_mem[i].type);
  1079. dma_free_coherent(&pdev->dev,
  1080. qdss_mem[i].size, qdss_mem[i].va,
  1081. qdss_mem[i].pa);
  1082. qdss_mem[i].va = NULL;
  1083. qdss_mem[i].pa = 0;
  1084. qdss_mem[i].size = 0;
  1085. qdss_mem[i].type = 0;
  1086. }
  1087. }
  1088. priv->qdss_mem_seg_len = 0;
  1089. }
  1090. static int icnss_qdss_trace_req_mem_hdlr(struct icnss_priv *priv)
  1091. {
  1092. int ret = 0;
  1093. ret = icnss_alloc_qdss_mem(priv);
  1094. if (ret < 0)
  1095. return ret;
  1096. return wlfw_qdss_trace_mem_info_send_sync(priv);
  1097. }
  1098. static void *icnss_qdss_trace_pa_to_va(struct icnss_priv *priv,
  1099. u64 pa, u32 size, int *seg_id)
  1100. {
  1101. int i = 0;
  1102. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1103. u64 offset = 0;
  1104. void *va = NULL;
  1105. u64 local_pa;
  1106. u32 local_size;
  1107. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1108. local_pa = (u64)qdss_mem[i].pa;
  1109. local_size = (u32)qdss_mem[i].size;
  1110. if (pa == local_pa && size <= local_size) {
  1111. va = qdss_mem[i].va;
  1112. break;
  1113. }
  1114. if (pa > local_pa &&
  1115. pa < local_pa + local_size &&
  1116. pa + size <= local_pa + local_size) {
  1117. offset = pa - local_pa;
  1118. va = qdss_mem[i].va + offset;
  1119. break;
  1120. }
  1121. }
  1122. *seg_id = i;
  1123. return va;
  1124. }
  1125. static int icnss_qdss_trace_save_hdlr(struct icnss_priv *priv,
  1126. void *data)
  1127. {
  1128. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1129. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1130. int ret = 0;
  1131. int i;
  1132. void *va = NULL;
  1133. u64 pa;
  1134. u32 size;
  1135. int seg_id = 0;
  1136. if (!priv->qdss_mem_seg_len) {
  1137. icnss_pr_err("Memory for QDSS trace is not available\n");
  1138. return -ENOMEM;
  1139. }
  1140. if (event_data->mem_seg_len == 0) {
  1141. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1142. ret = icnss_genl_send_msg(qdss_mem[i].va,
  1143. ICNSS_GENL_MSG_TYPE_QDSS,
  1144. event_data->file_name,
  1145. qdss_mem[i].size);
  1146. if (ret < 0) {
  1147. icnss_pr_err("Fail to save QDSS data: %d\n",
  1148. ret);
  1149. break;
  1150. }
  1151. }
  1152. } else {
  1153. for (i = 0; i < event_data->mem_seg_len; i++) {
  1154. pa = event_data->mem_seg[i].addr;
  1155. size = event_data->mem_seg[i].size;
  1156. va = icnss_qdss_trace_pa_to_va(priv, pa,
  1157. size, &seg_id);
  1158. if (!va) {
  1159. icnss_pr_err("Fail to find matching va for pa %pa\n",
  1160. &pa);
  1161. ret = -EINVAL;
  1162. break;
  1163. }
  1164. ret = icnss_genl_send_msg(va, ICNSS_GENL_MSG_TYPE_QDSS,
  1165. event_data->file_name, size);
  1166. if (ret < 0) {
  1167. icnss_pr_err("Fail to save QDSS data: %d\n",
  1168. ret);
  1169. break;
  1170. }
  1171. }
  1172. }
  1173. kfree(data);
  1174. return ret;
  1175. }
  1176. static inline int icnss_atomic_dec_if_greater_one(atomic_t *v)
  1177. {
  1178. int dec, c = atomic_read(v);
  1179. do {
  1180. dec = c - 1;
  1181. if (unlikely(dec < 1))
  1182. break;
  1183. } while (!atomic_try_cmpxchg(v, &c, dec));
  1184. return dec;
  1185. }
  1186. static int icnss_qdss_trace_req_data_hdlr(struct icnss_priv *priv,
  1187. void *data)
  1188. {
  1189. int ret = 0;
  1190. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1191. if (!priv)
  1192. return -ENODEV;
  1193. if (!data)
  1194. return -EINVAL;
  1195. ret = icnss_wlfw_qdss_data_send_sync(priv, event_data->file_name,
  1196. event_data->total_size);
  1197. kfree(data);
  1198. return ret;
  1199. }
  1200. static int icnss_event_soc_wake_request(struct icnss_priv *priv, void *data)
  1201. {
  1202. int ret = 0;
  1203. if (!priv)
  1204. return -ENODEV;
  1205. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  1206. icnss_pr_soc_wake("SOC awake after posting work, Ref count: %d",
  1207. atomic_read(&priv->soc_wake_ref_count));
  1208. return 0;
  1209. }
  1210. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REQ,
  1211. ICNSS_SMP2P_OUT_SOC_WAKE);
  1212. if (!ret)
  1213. atomic_inc(&priv->soc_wake_ref_count);
  1214. return ret;
  1215. }
  1216. static int icnss_event_soc_wake_release(struct icnss_priv *priv, void *data)
  1217. {
  1218. int ret = 0;
  1219. if (!priv)
  1220. return -ENODEV;
  1221. if (atomic_dec_if_positive(&priv->soc_wake_ref_count)) {
  1222. icnss_pr_soc_wake("Wake release not called. Ref count: %d",
  1223. priv->soc_wake_ref_count);
  1224. return 0;
  1225. }
  1226. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REL,
  1227. ICNSS_SMP2P_OUT_SOC_WAKE);
  1228. return ret;
  1229. }
  1230. static int icnss_driver_event_register_driver(struct icnss_priv *priv,
  1231. void *data)
  1232. {
  1233. int ret = 0;
  1234. int probe_cnt = 0;
  1235. if (priv->ops)
  1236. return -EEXIST;
  1237. priv->ops = data;
  1238. if (test_bit(SKIP_QMI, &priv->ctrl_params.quirks))
  1239. set_bit(ICNSS_FW_READY, &priv->state);
  1240. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1241. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  1242. priv->state);
  1243. return -ENODEV;
  1244. }
  1245. if (!test_bit(ICNSS_FW_READY, &priv->state)) {
  1246. icnss_pr_dbg("FW is not ready yet, state: 0x%lx\n",
  1247. priv->state);
  1248. goto out;
  1249. }
  1250. ret = icnss_hw_power_on(priv);
  1251. if (ret)
  1252. goto out;
  1253. icnss_block_shutdown(true);
  1254. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  1255. ret = priv->ops->probe(&priv->pdev->dev);
  1256. probe_cnt++;
  1257. if (ret != -EPROBE_DEFER)
  1258. break;
  1259. }
  1260. if (ret) {
  1261. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  1262. ret, priv->state, probe_cnt);
  1263. icnss_block_shutdown(false);
  1264. goto power_off;
  1265. }
  1266. icnss_block_shutdown(false);
  1267. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1268. return 0;
  1269. power_off:
  1270. icnss_hw_power_off(priv);
  1271. out:
  1272. return ret;
  1273. }
  1274. static int icnss_driver_event_unregister_driver(struct icnss_priv *priv,
  1275. void *data)
  1276. {
  1277. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state)) {
  1278. priv->ops = NULL;
  1279. goto out;
  1280. }
  1281. set_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1282. icnss_block_shutdown(true);
  1283. if (priv->ops)
  1284. priv->ops->remove(&priv->pdev->dev);
  1285. icnss_block_shutdown(false);
  1286. clear_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1287. clear_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1288. priv->ops = NULL;
  1289. icnss_hw_power_off(priv);
  1290. out:
  1291. return 0;
  1292. }
  1293. static int icnss_fw_crashed(struct icnss_priv *priv,
  1294. struct icnss_event_pd_service_down_data *event_data)
  1295. {
  1296. icnss_pr_dbg("FW crashed, state: 0x%lx\n", priv->state);
  1297. set_bit(ICNSS_PD_RESTART, &priv->state);
  1298. clear_bit(ICNSS_FW_READY, &priv->state);
  1299. icnss_pm_stay_awake(priv);
  1300. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  1301. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_CRASHED, NULL);
  1302. if (event_data && event_data->fw_rejuvenate)
  1303. wlfw_rejuvenate_ack_send_sync_msg(priv);
  1304. return 0;
  1305. }
  1306. int icnss_update_hang_event_data(struct icnss_priv *priv,
  1307. struct icnss_uevent_hang_data *hang_data)
  1308. {
  1309. if (!priv->hang_event_data_va)
  1310. return -EINVAL;
  1311. priv->hang_event_data = kmemdup(priv->hang_event_data_va,
  1312. priv->hang_event_data_len,
  1313. GFP_ATOMIC);
  1314. if (!priv->hang_event_data)
  1315. return -ENOMEM;
  1316. // Update the hang event params
  1317. hang_data->hang_event_data = priv->hang_event_data;
  1318. hang_data->hang_event_data_len = priv->hang_event_data_len;
  1319. return 0;
  1320. }
  1321. int icnss_send_hang_event_data(struct icnss_priv *priv)
  1322. {
  1323. struct icnss_uevent_hang_data hang_data = {0};
  1324. int ret = 0xFF;
  1325. if (priv->early_crash_ind) {
  1326. ret = icnss_update_hang_event_data(priv, &hang_data);
  1327. if (ret)
  1328. icnss_pr_err("Unable to allocate memory for Hang event data\n");
  1329. }
  1330. icnss_call_driver_uevent(priv, ICNSS_UEVENT_HANG_DATA,
  1331. &hang_data);
  1332. if (!ret) {
  1333. kfree(priv->hang_event_data);
  1334. priv->hang_event_data = NULL;
  1335. }
  1336. return 0;
  1337. }
  1338. static int icnss_driver_event_pd_service_down(struct icnss_priv *priv,
  1339. void *data)
  1340. {
  1341. struct icnss_event_pd_service_down_data *event_data = data;
  1342. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1343. icnss_ignore_fw_timeout(false);
  1344. goto out;
  1345. }
  1346. if (priv->force_err_fatal)
  1347. ICNSS_ASSERT(0);
  1348. if (priv->device_id == WCN6750_DEVICE_ID ||
  1349. priv->device_id == WCN6450_DEVICE_ID) {
  1350. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1351. ICNSS_SMP2P_OUT_SOC_WAKE);
  1352. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1353. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  1354. }
  1355. if (priv->wpss_supported)
  1356. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1357. ICNSS_SMP2P_OUT_POWER_SAVE);
  1358. icnss_send_hang_event_data(priv);
  1359. if (priv->early_crash_ind) {
  1360. icnss_pr_dbg("PD Down ignored as early indication is processed: %d, state: 0x%lx\n",
  1361. event_data->crashed, priv->state);
  1362. goto out;
  1363. }
  1364. if (test_bit(ICNSS_PD_RESTART, &priv->state) && event_data->crashed) {
  1365. icnss_fatal_err("PD Down while recovery inprogress, crashed: %d, state: 0x%lx\n",
  1366. event_data->crashed, priv->state);
  1367. if (!priv->allow_recursive_recovery)
  1368. ICNSS_ASSERT(0);
  1369. goto out;
  1370. }
  1371. if (!test_bit(ICNSS_PD_RESTART, &priv->state))
  1372. icnss_fw_crashed(priv, event_data);
  1373. out:
  1374. kfree(data);
  1375. return 0;
  1376. }
  1377. static int icnss_driver_event_early_crash_ind(struct icnss_priv *priv,
  1378. void *data)
  1379. {
  1380. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1381. icnss_ignore_fw_timeout(false);
  1382. goto out;
  1383. }
  1384. priv->early_crash_ind = true;
  1385. icnss_fw_crashed(priv, NULL);
  1386. out:
  1387. kfree(data);
  1388. return 0;
  1389. }
  1390. static int icnss_driver_event_idle_shutdown(struct icnss_priv *priv,
  1391. void *data)
  1392. {
  1393. int ret = 0;
  1394. if (!priv->ops || !priv->ops->idle_shutdown)
  1395. return 0;
  1396. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1397. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1398. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown callback\n");
  1399. ret = -EBUSY;
  1400. } else {
  1401. icnss_pr_dbg("Calling driver idle shutdown, state: 0x%lx\n",
  1402. priv->state);
  1403. icnss_block_shutdown(true);
  1404. ret = priv->ops->idle_shutdown(&priv->pdev->dev);
  1405. icnss_block_shutdown(false);
  1406. }
  1407. return ret;
  1408. }
  1409. static int icnss_driver_event_idle_restart(struct icnss_priv *priv,
  1410. void *data)
  1411. {
  1412. int ret = 0;
  1413. if (!priv->ops || !priv->ops->idle_restart)
  1414. return 0;
  1415. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1416. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1417. icnss_pr_err("SSR/PDR is already in-progress during idle restart callback\n");
  1418. ret = -EBUSY;
  1419. } else {
  1420. icnss_pr_dbg("Calling driver idle restart, state: 0x%lx\n",
  1421. priv->state);
  1422. icnss_block_shutdown(true);
  1423. ret = priv->ops->idle_restart(&priv->pdev->dev);
  1424. icnss_block_shutdown(false);
  1425. }
  1426. return ret;
  1427. }
  1428. static int icnss_qdss_trace_free_hdlr(struct icnss_priv *priv)
  1429. {
  1430. icnss_free_qdss_mem(priv);
  1431. return 0;
  1432. }
  1433. static int icnss_m3_dump_upload_req_hdlr(struct icnss_priv *priv,
  1434. void *data)
  1435. {
  1436. struct icnss_m3_upload_segments_req_data *event_data = data;
  1437. struct qcom_dump_segment segment;
  1438. int i, status = 0, ret = 0;
  1439. struct list_head head;
  1440. if (!dump_enabled()) {
  1441. icnss_pr_info("Dump collection is not enabled\n");
  1442. return ret;
  1443. }
  1444. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  1445. IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  1446. IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  1447. IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  1448. IS_ERR_OR_NULL(priv->m3_dump_phyapdmem))
  1449. return ret;
  1450. INIT_LIST_HEAD(&head);
  1451. for (i = 0; i < event_data->no_of_valid_segments; i++) {
  1452. memset(&segment, 0, sizeof(segment));
  1453. segment.va = devm_ioremap(&priv->pdev->dev,
  1454. event_data->m3_segment[i].addr,
  1455. event_data->m3_segment[i].size);
  1456. if (!segment.va) {
  1457. icnss_pr_err("Failed to ioremap M3 Dump region");
  1458. ret = -ENOMEM;
  1459. goto send_resp;
  1460. }
  1461. segment.size = event_data->m3_segment[i].size;
  1462. list_add(&segment.node, &head);
  1463. icnss_pr_dbg("Started Dump colletcion for %s segment",
  1464. event_data->m3_segment[i].name);
  1465. switch (event_data->m3_segment[i].type) {
  1466. case QMI_M3_SEGMENT_PHYAREG_V01:
  1467. ret = qcom_dump(&head, priv->m3_dump_phyareg->dev);
  1468. break;
  1469. case QMI_M3_SEGMENT_PHYDBG_V01:
  1470. ret = qcom_dump(&head, priv->m3_dump_phydbg->dev);
  1471. break;
  1472. case QMI_M3_SEGMENT_WMAC0_REG_V01:
  1473. ret = qcom_dump(&head, priv->m3_dump_wmac0reg->dev);
  1474. break;
  1475. case QMI_M3_SEGMENT_WCSSDBG_V01:
  1476. ret = qcom_dump(&head, priv->m3_dump_wcssdbg->dev);
  1477. break;
  1478. case QMI_M3_SEGMENT_PHYAPDMEM_V01:
  1479. ret = qcom_dump(&head, priv->m3_dump_phyapdmem->dev);
  1480. break;
  1481. default:
  1482. icnss_pr_err("Invalid Segment type: %d",
  1483. event_data->m3_segment[i].type);
  1484. }
  1485. if (ret) {
  1486. status = ret;
  1487. icnss_pr_err("Failed to dump m3 %s segment, err = %d\n",
  1488. event_data->m3_segment[i].name, ret);
  1489. }
  1490. list_del(&segment.node);
  1491. }
  1492. send_resp:
  1493. icnss_wlfw_m3_dump_upload_done_send_sync(priv, event_data->pdev_id,
  1494. status);
  1495. return ret;
  1496. }
  1497. static int icnss_subsys_restart_level(struct icnss_priv *priv, void *data)
  1498. {
  1499. int ret = 0;
  1500. struct icnss_subsys_restart_level_data *event_data = data;
  1501. if (!priv)
  1502. return -ENODEV;
  1503. if (!data)
  1504. return -EINVAL;
  1505. ret = wlfw_subsys_restart_level_msg(priv, event_data->restart_level);
  1506. kfree(data);
  1507. return ret;
  1508. }
  1509. static void icnss_wpss_self_recovery(struct work_struct *wpss_load_work)
  1510. {
  1511. int ret;
  1512. struct icnss_priv *priv = icnss_get_plat_priv();
  1513. rproc_shutdown(priv->rproc);
  1514. ret = rproc_boot(priv->rproc);
  1515. if (ret) {
  1516. icnss_pr_err("Failed to self recover wpss rproc, ret: %d", ret);
  1517. rproc_put(priv->rproc);
  1518. }
  1519. }
  1520. static void icnss_driver_event_work(struct work_struct *work)
  1521. {
  1522. struct icnss_priv *priv =
  1523. container_of(work, struct icnss_priv, event_work);
  1524. struct icnss_driver_event *event;
  1525. unsigned long flags;
  1526. int ret;
  1527. icnss_pm_stay_awake(priv);
  1528. spin_lock_irqsave(&priv->event_lock, flags);
  1529. while (!list_empty(&priv->event_list)) {
  1530. event = list_first_entry(&priv->event_list,
  1531. struct icnss_driver_event, list);
  1532. list_del(&event->list);
  1533. spin_unlock_irqrestore(&priv->event_lock, flags);
  1534. icnss_pr_dbg("Processing event: %s%s(%d), state: 0x%lx\n",
  1535. icnss_driver_event_to_str(event->type),
  1536. event->sync ? "-sync" : "", event->type,
  1537. priv->state);
  1538. switch (event->type) {
  1539. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1540. ret = icnss_driver_event_server_arrive(priv,
  1541. event->data);
  1542. break;
  1543. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  1544. ret = icnss_driver_event_server_exit(priv);
  1545. break;
  1546. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  1547. ret = icnss_driver_event_fw_ready_ind(priv,
  1548. event->data);
  1549. break;
  1550. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1551. ret = icnss_driver_event_register_driver(priv,
  1552. event->data);
  1553. break;
  1554. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1555. ret = icnss_driver_event_unregister_driver(priv,
  1556. event->data);
  1557. break;
  1558. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  1559. ret = icnss_driver_event_pd_service_down(priv,
  1560. event->data);
  1561. break;
  1562. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  1563. ret = icnss_driver_event_early_crash_ind(priv,
  1564. event->data);
  1565. break;
  1566. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1567. ret = icnss_driver_event_idle_shutdown(priv,
  1568. event->data);
  1569. break;
  1570. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  1571. ret = icnss_driver_event_idle_restart(priv,
  1572. event->data);
  1573. break;
  1574. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  1575. ret = icnss_driver_event_fw_init_done(priv,
  1576. event->data);
  1577. break;
  1578. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1579. ret = icnss_qdss_trace_req_mem_hdlr(priv);
  1580. break;
  1581. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  1582. ret = icnss_qdss_trace_save_hdlr(priv,
  1583. event->data);
  1584. break;
  1585. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1586. ret = icnss_qdss_trace_free_hdlr(priv);
  1587. break;
  1588. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  1589. ret = icnss_m3_dump_upload_req_hdlr(priv, event->data);
  1590. break;
  1591. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1592. ret = icnss_qdss_trace_req_data_hdlr(priv,
  1593. event->data);
  1594. break;
  1595. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  1596. ret = icnss_subsys_restart_level(priv, event->data);
  1597. break;
  1598. default:
  1599. icnss_pr_err("Invalid Event type: %d", event->type);
  1600. kfree(event);
  1601. continue;
  1602. }
  1603. priv->stats.events[event->type].processed++;
  1604. icnss_pr_dbg("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1605. icnss_driver_event_to_str(event->type),
  1606. event->sync ? "-sync" : "", event->type, ret,
  1607. priv->state);
  1608. spin_lock_irqsave(&priv->event_lock, flags);
  1609. if (event->sync) {
  1610. event->ret = ret;
  1611. complete(&event->complete);
  1612. continue;
  1613. }
  1614. spin_unlock_irqrestore(&priv->event_lock, flags);
  1615. kfree(event);
  1616. spin_lock_irqsave(&priv->event_lock, flags);
  1617. }
  1618. spin_unlock_irqrestore(&priv->event_lock, flags);
  1619. icnss_pm_relax(priv);
  1620. }
  1621. static void icnss_soc_wake_msg_work(struct work_struct *work)
  1622. {
  1623. struct icnss_priv *priv =
  1624. container_of(work, struct icnss_priv, soc_wake_msg_work);
  1625. struct icnss_soc_wake_event *event;
  1626. unsigned long flags;
  1627. int ret;
  1628. icnss_pm_stay_awake(priv);
  1629. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1630. while (!list_empty(&priv->soc_wake_msg_list)) {
  1631. event = list_first_entry(&priv->soc_wake_msg_list,
  1632. struct icnss_soc_wake_event, list);
  1633. list_del(&event->list);
  1634. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1635. icnss_pr_soc_wake("Processing event: %s%s(%d), state: 0x%lx\n",
  1636. icnss_soc_wake_event_to_str(event->type),
  1637. event->sync ? "-sync" : "", event->type,
  1638. priv->state);
  1639. switch (event->type) {
  1640. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  1641. ret = icnss_event_soc_wake_request(priv,
  1642. event->data);
  1643. break;
  1644. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  1645. ret = icnss_event_soc_wake_release(priv,
  1646. event->data);
  1647. break;
  1648. default:
  1649. icnss_pr_err("Invalid Event type: %d", event->type);
  1650. kfree(event);
  1651. continue;
  1652. }
  1653. priv->stats.soc_wake_events[event->type].processed++;
  1654. icnss_pr_soc_wake("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1655. icnss_soc_wake_event_to_str(event->type),
  1656. event->sync ? "-sync" : "", event->type, ret,
  1657. priv->state);
  1658. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1659. if (event->sync) {
  1660. event->ret = ret;
  1661. complete(&event->complete);
  1662. continue;
  1663. }
  1664. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1665. kfree(event);
  1666. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1667. }
  1668. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1669. icnss_pm_relax(priv);
  1670. }
  1671. static int icnss_msa0_ramdump(struct icnss_priv *priv)
  1672. {
  1673. int ret = 0;
  1674. struct qcom_dump_segment segment;
  1675. struct icnss_ramdump_info *msa0_dump_dev = priv->msa0_dump_dev;
  1676. struct list_head head;
  1677. if (!dump_enabled()) {
  1678. icnss_pr_info("Dump collection is not enabled\n");
  1679. return ret;
  1680. }
  1681. if (IS_ERR_OR_NULL(msa0_dump_dev))
  1682. return ret;
  1683. INIT_LIST_HEAD(&head);
  1684. memset(&segment, 0, sizeof(segment));
  1685. segment.va = priv->msa_va;
  1686. segment.size = priv->msa_mem_size;
  1687. list_add(&segment.node, &head);
  1688. if (!msa0_dump_dev->dev) {
  1689. icnss_pr_err("Created Dump Device not found\n");
  1690. return 0;
  1691. }
  1692. ret = qcom_dump(&head, msa0_dump_dev->dev);
  1693. if (ret) {
  1694. icnss_pr_err("Failed to dump msa0, err = %d\n", ret);
  1695. return ret;
  1696. }
  1697. list_del(&segment.node);
  1698. return ret;
  1699. }
  1700. static void icnss_update_state_send_modem_shutdown(struct icnss_priv *priv,
  1701. void *data)
  1702. {
  1703. struct qcom_ssr_notify_data *notif = data;
  1704. int ret = 0;
  1705. if (!notif->crashed) {
  1706. if (atomic_read(&priv->is_shutdown)) {
  1707. atomic_set(&priv->is_shutdown, false);
  1708. if (!test_bit(ICNSS_PD_RESTART, &priv->state) &&
  1709. !test_bit(ICNSS_SHUTDOWN_DONE, &priv->state) &&
  1710. !test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1711. clear_bit(ICNSS_FW_READY, &priv->state);
  1712. icnss_driver_event_post(priv,
  1713. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  1714. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE,
  1715. NULL);
  1716. }
  1717. }
  1718. if (test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1719. if (!wait_for_completion_timeout(
  1720. &priv->unblock_shutdown,
  1721. msecs_to_jiffies(PROBE_TIMEOUT)))
  1722. icnss_pr_err("modem block shutdown timeout\n");
  1723. }
  1724. ret = wlfw_send_modem_shutdown_msg(priv);
  1725. if (ret < 0)
  1726. icnss_pr_err("Fail to send modem shutdown Indication %d\n",
  1727. ret);
  1728. }
  1729. }
  1730. static char *icnss_qcom_ssr_notify_state_to_str(enum qcom_ssr_notify_type code)
  1731. {
  1732. switch (code) {
  1733. case QCOM_SSR_BEFORE_POWERUP:
  1734. return "BEFORE_POWERUP";
  1735. case QCOM_SSR_AFTER_POWERUP:
  1736. return "AFTER_POWERUP";
  1737. case QCOM_SSR_BEFORE_SHUTDOWN:
  1738. return "BEFORE_SHUTDOWN";
  1739. case QCOM_SSR_AFTER_SHUTDOWN:
  1740. return "AFTER_SHUTDOWN";
  1741. default:
  1742. return "UNKNOWN";
  1743. }
  1744. };
  1745. static int icnss_wpss_early_notifier_nb(struct notifier_block *nb,
  1746. unsigned long code,
  1747. void *data)
  1748. {
  1749. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1750. wpss_early_ssr_nb);
  1751. icnss_pr_vdbg("WPSS-EARLY-Notify: event %s(%lu)\n",
  1752. icnss_qcom_ssr_notify_state_to_str(code), code);
  1753. if (code == QCOM_SSR_BEFORE_SHUTDOWN) {
  1754. set_bit(ICNSS_FW_DOWN, &priv->state);
  1755. icnss_ignore_fw_timeout(true);
  1756. }
  1757. return NOTIFY_DONE;
  1758. }
  1759. static int icnss_wpss_notifier_nb(struct notifier_block *nb,
  1760. unsigned long code,
  1761. void *data)
  1762. {
  1763. struct icnss_event_pd_service_down_data *event_data;
  1764. struct qcom_ssr_notify_data *notif = data;
  1765. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1766. wpss_ssr_nb);
  1767. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1768. icnss_pr_vdbg("WPSS-Notify: event %s(%lu)\n",
  1769. icnss_qcom_ssr_notify_state_to_str(code), code);
  1770. if (code == QCOM_SSR_AFTER_SHUTDOWN) {
  1771. icnss_pr_info("Collecting msa0 segment dump\n");
  1772. icnss_msa0_ramdump(priv);
  1773. goto out;
  1774. }
  1775. if (code != QCOM_SSR_BEFORE_SHUTDOWN)
  1776. goto out;
  1777. if (priv->wpss_self_recovery_enabled)
  1778. del_timer(&priv->wpss_ssr_timer);
  1779. priv->is_ssr = true;
  1780. icnss_pr_info("WPSS went down, state: 0x%lx, crashed: %d\n",
  1781. priv->state, notif->crashed);
  1782. if (priv->device_id == ADRASTEA_DEVICE_ID)
  1783. icnss_update_state_send_modem_shutdown(priv, data);
  1784. set_bit(ICNSS_FW_DOWN, &priv->state);
  1785. icnss_ignore_fw_timeout(true);
  1786. if (notif->crashed)
  1787. priv->stats.recovery.root_pd_crash++;
  1788. else
  1789. priv->stats.recovery.root_pd_shutdown++;
  1790. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1791. if (event_data == NULL)
  1792. return notifier_from_errno(-ENOMEM);
  1793. event_data->crashed = notif->crashed;
  1794. fw_down_data.crashed = !!notif->crashed;
  1795. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1796. clear_bit(ICNSS_FW_READY, &priv->state);
  1797. fw_down_data.crashed = !!notif->crashed;
  1798. icnss_call_driver_uevent(priv,
  1799. ICNSS_UEVENT_FW_DOWN,
  1800. &fw_down_data);
  1801. }
  1802. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1803. ICNSS_EVENT_SYNC, event_data);
  1804. if (notif->crashed)
  1805. mod_timer(&priv->recovery_timer,
  1806. jiffies + msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  1807. out:
  1808. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1809. return NOTIFY_OK;
  1810. }
  1811. static int icnss_modem_notifier_nb(struct notifier_block *nb,
  1812. unsigned long code,
  1813. void *data)
  1814. {
  1815. struct icnss_event_pd_service_down_data *event_data;
  1816. struct qcom_ssr_notify_data *notif = data;
  1817. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1818. modem_ssr_nb);
  1819. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1820. icnss_pr_vdbg("Modem-Notify: event %s(%lu)\n",
  1821. icnss_qcom_ssr_notify_state_to_str(code), code);
  1822. switch (code) {
  1823. case QCOM_SSR_BEFORE_SHUTDOWN:
  1824. if (priv->is_slate_rfa)
  1825. complete(&priv->slate_boot_complete);
  1826. if (!notif->crashed &&
  1827. priv->low_power_support) { /* Hibernate */
  1828. if (test_bit(ICNSS_MODE_ON, &priv->state))
  1829. icnss_driver_event_post(
  1830. priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  1831. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1832. set_bit(ICNSS_LOW_POWER, &priv->state);
  1833. }
  1834. break;
  1835. case QCOM_SSR_AFTER_SHUTDOWN:
  1836. /* Collect ramdump only when there was a crash. */
  1837. if (notif->crashed) {
  1838. icnss_pr_info("Collecting msa0 segment dump\n");
  1839. icnss_msa0_ramdump(priv);
  1840. }
  1841. goto out;
  1842. default:
  1843. goto out;
  1844. }
  1845. priv->is_ssr = true;
  1846. if (notif->crashed) {
  1847. priv->stats.recovery.root_pd_crash++;
  1848. priv->root_pd_shutdown = false;
  1849. } else {
  1850. priv->stats.recovery.root_pd_shutdown++;
  1851. priv->root_pd_shutdown = true;
  1852. }
  1853. icnss_update_state_send_modem_shutdown(priv, data);
  1854. if (test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  1855. set_bit(ICNSS_FW_DOWN, &priv->state);
  1856. icnss_ignore_fw_timeout(true);
  1857. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1858. clear_bit(ICNSS_FW_READY, &priv->state);
  1859. fw_down_data.crashed = !!notif->crashed;
  1860. icnss_call_driver_uevent(priv,
  1861. ICNSS_UEVENT_FW_DOWN,
  1862. &fw_down_data);
  1863. }
  1864. goto out;
  1865. }
  1866. icnss_pr_info("Modem went down, state: 0x%lx, crashed: %d\n",
  1867. priv->state, notif->crashed);
  1868. set_bit(ICNSS_FW_DOWN, &priv->state);
  1869. icnss_ignore_fw_timeout(true);
  1870. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1871. if (event_data == NULL)
  1872. return notifier_from_errno(-ENOMEM);
  1873. event_data->crashed = notif->crashed;
  1874. fw_down_data.crashed = !!notif->crashed;
  1875. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1876. clear_bit(ICNSS_FW_READY, &priv->state);
  1877. fw_down_data.crashed = !!notif->crashed;
  1878. icnss_call_driver_uevent(priv,
  1879. ICNSS_UEVENT_FW_DOWN,
  1880. &fw_down_data);
  1881. }
  1882. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1883. ICNSS_EVENT_SYNC, event_data);
  1884. if (notif->crashed)
  1885. mod_timer(&priv->recovery_timer,
  1886. jiffies + msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  1887. out:
  1888. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1889. return NOTIFY_OK;
  1890. }
  1891. static int icnss_wpss_early_ssr_register_notifier(struct icnss_priv *priv)
  1892. {
  1893. int ret = 0;
  1894. priv->wpss_early_ssr_nb.notifier_call = icnss_wpss_early_notifier_nb;
  1895. priv->wpss_early_notify_handler =
  1896. qcom_register_early_ssr_notifier("wpss",
  1897. &priv->wpss_early_ssr_nb);
  1898. if (IS_ERR(priv->wpss_early_notify_handler)) {
  1899. ret = PTR_ERR(priv->wpss_early_notify_handler);
  1900. icnss_pr_err("WPSS register early notifier failed: %d\n", ret);
  1901. }
  1902. return ret;
  1903. }
  1904. static int icnss_wpss_ssr_register_notifier(struct icnss_priv *priv)
  1905. {
  1906. int ret = 0;
  1907. priv->wpss_ssr_nb.notifier_call = icnss_wpss_notifier_nb;
  1908. /*
  1909. * Assign priority of icnss wpss notifier callback over IPA
  1910. * modem notifier callback which is 0
  1911. */
  1912. priv->wpss_ssr_nb.priority = 1;
  1913. priv->wpss_notify_handler =
  1914. qcom_register_ssr_notifier("wpss", &priv->wpss_ssr_nb);
  1915. if (IS_ERR(priv->wpss_notify_handler)) {
  1916. ret = PTR_ERR(priv->wpss_notify_handler);
  1917. icnss_pr_err("WPSS register notifier failed: %d\n", ret);
  1918. }
  1919. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1920. return ret;
  1921. }
  1922. #ifdef SLATE_MODULE_ENABLED
  1923. static int icnss_slate_event_notifier_nb(struct notifier_block *nb,
  1924. unsigned long event, void *data)
  1925. {
  1926. icnss_pr_info("Received slate event 0x%x\n", event);
  1927. if (event == SLATE_STATUS) {
  1928. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1929. seb_nb);
  1930. enum boot_status status = *(enum boot_status *)data;
  1931. if (status == SLATE_READY) {
  1932. icnss_pr_dbg("Slate ready received, state: 0x%lx\n",
  1933. priv->state);
  1934. set_bit(ICNSS_SLATE_READY, &priv->state);
  1935. set_bit(ICNSS_SLATE_UP, &priv->state);
  1936. complete(&priv->slate_boot_complete);
  1937. }
  1938. }
  1939. return NOTIFY_OK;
  1940. }
  1941. static int icnss_register_slate_event_notifier(struct icnss_priv *priv)
  1942. {
  1943. int ret = 0;
  1944. priv->seb_nb.notifier_call = icnss_slate_event_notifier_nb;
  1945. priv->seb_handle = seb_register_for_slate_event(SLATE_STATUS,
  1946. &priv->seb_nb);
  1947. if (IS_ERR_OR_NULL(priv->seb_handle)) {
  1948. ret = priv->seb_handle ? PTR_ERR(priv->seb_handle) : -EINVAL;
  1949. icnss_pr_err("SLATE event register notifier failed: %d\n",
  1950. ret);
  1951. }
  1952. return ret;
  1953. }
  1954. static int icnss_unregister_slate_event_notifier(struct icnss_priv *priv)
  1955. {
  1956. int ret = 0;
  1957. ret = seb_unregister_for_slate_event(priv->seb_handle, &priv->seb_nb);
  1958. if (ret < 0)
  1959. icnss_pr_err("Slate event unregister failed: %d\n", ret);
  1960. return ret;
  1961. }
  1962. static int icnss_slate_notifier_nb(struct notifier_block *nb,
  1963. unsigned long code,
  1964. void *data)
  1965. {
  1966. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1967. slate_ssr_nb);
  1968. int ret = 0;
  1969. icnss_pr_vdbg("Slate-subsys-notify: event %lu\n", code);
  1970. if (code == QCOM_SSR_AFTER_POWERUP &&
  1971. test_bit(ICNSS_SLATE_READY, &priv->state)) {
  1972. set_bit(ICNSS_SLATE_UP, &priv->state);
  1973. complete(&priv->slate_boot_complete);
  1974. icnss_pr_dbg("Slate boot complete, state: 0x%lx\n",
  1975. priv->state);
  1976. } else if (code == QCOM_SSR_BEFORE_SHUTDOWN &&
  1977. test_bit(ICNSS_SLATE_UP, &priv->state)) {
  1978. clear_bit(ICNSS_SLATE_UP, &priv->state);
  1979. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  1980. icnss_pr_err("PD_RESTART in progress 0x%lx\n",
  1981. priv->state);
  1982. goto skip_pdr;
  1983. }
  1984. icnss_pr_dbg("Initiating PDR 0x%lx\n", priv->state);
  1985. ret = icnss_trigger_recovery(&priv->pdev->dev);
  1986. if (ret < 0) {
  1987. icnss_fatal_err("Fail to trigger PDR: ret: %d, state: 0x%lx\n",
  1988. ret, priv->state);
  1989. goto skip_pdr;
  1990. }
  1991. }
  1992. skip_pdr:
  1993. return NOTIFY_OK;
  1994. }
  1995. static int icnss_slate_ssr_register_notifier(struct icnss_priv *priv)
  1996. {
  1997. int ret = 0;
  1998. priv->slate_ssr_nb.notifier_call = icnss_slate_notifier_nb;
  1999. priv->slate_notify_handler =
  2000. qcom_register_ssr_notifier("slatefw", &priv->slate_ssr_nb);
  2001. if (IS_ERR(priv->slate_notify_handler)) {
  2002. ret = PTR_ERR(priv->slate_notify_handler);
  2003. icnss_pr_err("SLATE register notifier failed: %d\n", ret);
  2004. }
  2005. set_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state);
  2006. return ret;
  2007. }
  2008. static int icnss_slate_ssr_unregister_notifier(struct icnss_priv *priv)
  2009. {
  2010. if (!test_and_clear_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state))
  2011. return 0;
  2012. qcom_unregister_ssr_notifier(priv->slate_notify_handler,
  2013. &priv->slate_ssr_nb);
  2014. priv->slate_notify_handler = NULL;
  2015. return 0;
  2016. }
  2017. #else
  2018. static int icnss_register_slate_event_notifier(struct icnss_priv *priv)
  2019. {
  2020. return 0;
  2021. }
  2022. static int icnss_unregister_slate_event_notifier(struct icnss_priv *priv)
  2023. {
  2024. return 0;
  2025. }
  2026. static int icnss_slate_ssr_register_notifier(struct icnss_priv *priv)
  2027. {
  2028. return 0;
  2029. }
  2030. static int icnss_slate_ssr_unregister_notifier(struct icnss_priv *priv)
  2031. {
  2032. return 0;
  2033. }
  2034. #endif
  2035. static int icnss_modem_ssr_register_notifier(struct icnss_priv *priv)
  2036. {
  2037. int ret = 0;
  2038. priv->modem_ssr_nb.notifier_call = icnss_modem_notifier_nb;
  2039. /*
  2040. * Assign priority of icnss modem notifier callback over IPA
  2041. * modem notifier callback which is 0
  2042. */
  2043. priv->modem_ssr_nb.priority = 1;
  2044. priv->modem_notify_handler =
  2045. qcom_register_ssr_notifier("mpss", &priv->modem_ssr_nb);
  2046. if (IS_ERR(priv->modem_notify_handler)) {
  2047. ret = PTR_ERR(priv->modem_notify_handler);
  2048. icnss_pr_err("Modem register notifier failed: %d\n", ret);
  2049. }
  2050. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  2051. return ret;
  2052. }
  2053. static void icnss_wpss_early_ssr_unregister_notifier(struct icnss_priv *priv)
  2054. {
  2055. if (IS_ERR(priv->wpss_early_notify_handler))
  2056. return;
  2057. qcom_unregister_early_ssr_notifier(priv->wpss_early_notify_handler,
  2058. &priv->wpss_early_ssr_nb);
  2059. priv->wpss_early_notify_handler = NULL;
  2060. }
  2061. static int icnss_wpss_ssr_unregister_notifier(struct icnss_priv *priv)
  2062. {
  2063. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  2064. return 0;
  2065. qcom_unregister_ssr_notifier(priv->wpss_notify_handler,
  2066. &priv->wpss_ssr_nb);
  2067. priv->wpss_notify_handler = NULL;
  2068. return 0;
  2069. }
  2070. static int icnss_modem_ssr_unregister_notifier(struct icnss_priv *priv)
  2071. {
  2072. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  2073. return 0;
  2074. qcom_unregister_ssr_notifier(priv->modem_notify_handler,
  2075. &priv->modem_ssr_nb);
  2076. priv->modem_notify_handler = NULL;
  2077. return 0;
  2078. }
  2079. static void icnss_pdr_notifier_cb(int state, char *service_path, void *priv_cb)
  2080. {
  2081. struct icnss_priv *priv = priv_cb;
  2082. struct icnss_event_pd_service_down_data *event_data;
  2083. struct icnss_uevent_fw_down_data fw_down_data = {0};
  2084. enum icnss_pdr_cause_index cause = ICNSS_ROOT_PD_CRASH;
  2085. if (!priv)
  2086. return;
  2087. icnss_pr_dbg("PD service notification: 0x%lx state: 0x%lx\n",
  2088. state, priv->state);
  2089. switch (state) {
  2090. case SERVREG_SERVICE_STATE_DOWN:
  2091. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2092. if (!event_data)
  2093. return;
  2094. event_data->crashed = true;
  2095. if (!priv->is_ssr) {
  2096. set_bit(ICNSS_PDR, &penv->state);
  2097. if (test_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state)) {
  2098. cause = ICNSS_HOST_ERROR;
  2099. priv->stats.recovery.pdr_host_error++;
  2100. } else {
  2101. cause = ICNSS_FW_CRASH;
  2102. priv->stats.recovery.pdr_fw_crash++;
  2103. }
  2104. } else if (priv->root_pd_shutdown) {
  2105. cause = ICNSS_ROOT_PD_SHUTDOWN;
  2106. event_data->crashed = false;
  2107. }
  2108. icnss_pr_info("PD service down, state: 0x%lx: cause: %s\n",
  2109. priv->state, icnss_pdr_cause[cause]);
  2110. if (!test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2111. set_bit(ICNSS_FW_DOWN, &priv->state);
  2112. icnss_ignore_fw_timeout(true);
  2113. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  2114. clear_bit(ICNSS_FW_READY, &priv->state);
  2115. fw_down_data.crashed = event_data->crashed;
  2116. icnss_call_driver_uevent(priv,
  2117. ICNSS_UEVENT_FW_DOWN,
  2118. &fw_down_data);
  2119. }
  2120. }
  2121. clear_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2122. if (event_data->crashed)
  2123. mod_timer(&priv->recovery_timer,
  2124. jiffies +
  2125. msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  2126. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  2127. ICNSS_EVENT_SYNC, event_data);
  2128. break;
  2129. case SERVREG_SERVICE_STATE_UP:
  2130. clear_bit(ICNSS_FW_DOWN, &priv->state);
  2131. break;
  2132. default:
  2133. break;
  2134. }
  2135. return;
  2136. }
  2137. static int icnss_pd_restart_enable(struct icnss_priv *priv)
  2138. {
  2139. struct pdr_handle *handle = NULL;
  2140. struct pdr_service *service = NULL;
  2141. int err = 0;
  2142. handle = pdr_handle_alloc(icnss_pdr_notifier_cb, priv);
  2143. if (IS_ERR_OR_NULL(handle)) {
  2144. err = PTR_ERR(handle);
  2145. icnss_pr_err("Failed to alloc pdr handle, err %d", err);
  2146. goto out;
  2147. }
  2148. service = pdr_add_lookup(handle, ICNSS_WLAN_SERVICE_NAME, ICNSS_WLANPD_NAME);
  2149. if (IS_ERR_OR_NULL(service)) {
  2150. err = PTR_ERR(service);
  2151. icnss_pr_err("Failed to add lookup, err %d", err);
  2152. goto out;
  2153. }
  2154. priv->pdr_handle = handle;
  2155. priv->pdr_service = service;
  2156. set_bit(ICNSS_PDR_REGISTERED, &priv->state);
  2157. icnss_pr_info("PDR registration happened");
  2158. out:
  2159. return err;
  2160. }
  2161. static void icnss_pdr_unregister_notifier(struct icnss_priv *priv)
  2162. {
  2163. if (!test_and_clear_bit(ICNSS_PDR_REGISTERED, &priv->state))
  2164. return;
  2165. pdr_handle_release(priv->pdr_handle);
  2166. }
  2167. static int icnss_ramdump_devnode_init(struct icnss_priv *priv)
  2168. {
  2169. int ret = 0;
  2170. priv->icnss_ramdump_class = class_create(THIS_MODULE, ICNSS_RAMDUMP_NAME);
  2171. if (IS_ERR_OR_NULL(priv->icnss_ramdump_class)) {
  2172. ret = PTR_ERR(priv->icnss_ramdump_class);
  2173. icnss_pr_err("%s:Class create failed for ramdump devices (%d)\n", __func__, ret);
  2174. return ret;
  2175. }
  2176. ret = alloc_chrdev_region(&priv->icnss_ramdump_dev, 0, RAMDUMP_NUM_DEVICES,
  2177. ICNSS_RAMDUMP_NAME);
  2178. if (ret < 0) {
  2179. icnss_pr_err("%s: Unable to allocate major\n", __func__);
  2180. goto fail_alloc_major;
  2181. }
  2182. return 0;
  2183. fail_alloc_major:
  2184. class_destroy(priv->icnss_ramdump_class);
  2185. return ret;
  2186. }
  2187. void *icnss_create_ramdump_device(struct icnss_priv *priv, const char *dev_name)
  2188. {
  2189. int ret = 0;
  2190. struct icnss_ramdump_info *ramdump_info;
  2191. ramdump_info = kzalloc(sizeof(*ramdump_info), GFP_KERNEL);
  2192. if (!ramdump_info)
  2193. return ERR_PTR(-ENOMEM);
  2194. if (!dev_name) {
  2195. icnss_pr_err("%s: Invalid device name.\n", __func__);
  2196. return NULL;
  2197. }
  2198. snprintf(ramdump_info->name, ARRAY_SIZE(ramdump_info->name), "icnss_%s", dev_name);
  2199. ramdump_info->minor = ida_simple_get(&rd_minor_id, 0, RAMDUMP_NUM_DEVICES, GFP_KERNEL);
  2200. if (ramdump_info->minor < 0) {
  2201. icnss_pr_err("%s: No more minor numbers left! rc:%d\n", __func__,
  2202. ramdump_info->minor);
  2203. ret = -ENODEV;
  2204. goto fail_out_of_minors;
  2205. }
  2206. ramdump_info->dev = device_create(priv->icnss_ramdump_class, NULL,
  2207. MKDEV(MAJOR(priv->icnss_ramdump_dev),
  2208. ramdump_info->minor),
  2209. ramdump_info, ramdump_info->name);
  2210. if (IS_ERR_OR_NULL(ramdump_info->dev)) {
  2211. ret = PTR_ERR(ramdump_info->dev);
  2212. icnss_pr_err("%s: Device create failed for %s (%d)\n", __func__,
  2213. ramdump_info->name, ret);
  2214. goto fail_device_create;
  2215. }
  2216. return (void *)ramdump_info;
  2217. fail_device_create:
  2218. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  2219. fail_out_of_minors:
  2220. kfree(ramdump_info);
  2221. return ERR_PTR(ret);
  2222. }
  2223. static int icnss_register_ramdump_devices(struct icnss_priv *priv)
  2224. {
  2225. int ret = 0;
  2226. if (!priv || !priv->pdev) {
  2227. icnss_pr_err("Platform priv or pdev is NULL\n");
  2228. return -EINVAL;
  2229. }
  2230. ret = icnss_ramdump_devnode_init(priv);
  2231. if (ret)
  2232. return ret;
  2233. priv->msa0_dump_dev = icnss_create_ramdump_device(priv, "wcss_msa0");
  2234. if (IS_ERR_OR_NULL(priv->msa0_dump_dev) || !priv->msa0_dump_dev->dev) {
  2235. icnss_pr_err("Failed to create msa0 dump device!");
  2236. return -ENOMEM;
  2237. }
  2238. if (priv->device_id == WCN6750_DEVICE_ID ||
  2239. priv->device_id == WCN6450_DEVICE_ID) {
  2240. priv->m3_dump_phyareg = icnss_create_ramdump_device(priv,
  2241. ICNSS_M3_SEGMENT(
  2242. ICNSS_M3_SEGMENT_PHYAREG));
  2243. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  2244. !priv->m3_dump_phyareg->dev) {
  2245. icnss_pr_err("Failed to create m3 dump for Phyareg segment device!");
  2246. return -ENOMEM;
  2247. }
  2248. priv->m3_dump_phydbg = icnss_create_ramdump_device(priv,
  2249. ICNSS_M3_SEGMENT(
  2250. ICNSS_M3_SEGMENT_PHYA));
  2251. if (IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  2252. !priv->m3_dump_phydbg->dev) {
  2253. icnss_pr_err("Failed to create m3 dump for Phydbg segment device!");
  2254. return -ENOMEM;
  2255. }
  2256. priv->m3_dump_wmac0reg = icnss_create_ramdump_device(priv,
  2257. ICNSS_M3_SEGMENT(
  2258. ICNSS_M3_SEGMENT_WMACREG));
  2259. if (IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  2260. !priv->m3_dump_wmac0reg->dev) {
  2261. icnss_pr_err("Failed to create m3 dump for Wmac0reg segment device!");
  2262. return -ENOMEM;
  2263. }
  2264. priv->m3_dump_wcssdbg = icnss_create_ramdump_device(priv,
  2265. ICNSS_M3_SEGMENT(
  2266. ICNSS_M3_SEGMENT_WCSSDBG));
  2267. if (IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  2268. !priv->m3_dump_wcssdbg->dev) {
  2269. icnss_pr_err("Failed to create m3 dump for Wcssdbg segment device!");
  2270. return -ENOMEM;
  2271. }
  2272. priv->m3_dump_phyapdmem = icnss_create_ramdump_device(priv,
  2273. ICNSS_M3_SEGMENT(
  2274. ICNSS_M3_SEGMENT_PHYAM3));
  2275. if (IS_ERR_OR_NULL(priv->m3_dump_phyapdmem) ||
  2276. !priv->m3_dump_phyapdmem->dev) {
  2277. icnss_pr_err("Failed to create m3 dump for Phyapdmem segment device!");
  2278. return -ENOMEM;
  2279. }
  2280. }
  2281. return 0;
  2282. }
  2283. static int icnss_enable_recovery(struct icnss_priv *priv)
  2284. {
  2285. int ret;
  2286. if (test_bit(RECOVERY_DISABLE, &priv->ctrl_params.quirks)) {
  2287. icnss_pr_dbg("Recovery disabled through module parameter\n");
  2288. return 0;
  2289. }
  2290. if (test_bit(PDR_ONLY, &priv->ctrl_params.quirks)) {
  2291. icnss_pr_dbg("SSR disabled through module parameter\n");
  2292. goto enable_pdr;
  2293. }
  2294. ret = icnss_register_ramdump_devices(priv);
  2295. if (ret)
  2296. return ret;
  2297. if (priv->wpss_supported) {
  2298. icnss_wpss_early_ssr_register_notifier(priv);
  2299. icnss_wpss_ssr_register_notifier(priv);
  2300. return 0;
  2301. }
  2302. icnss_modem_ssr_register_notifier(priv);
  2303. if (priv->is_slate_rfa) {
  2304. icnss_slate_ssr_register_notifier(priv);
  2305. icnss_register_slate_event_notifier(priv);
  2306. }
  2307. if (test_bit(SSR_ONLY, &priv->ctrl_params.quirks)) {
  2308. icnss_pr_dbg("PDR disabled through module parameter\n");
  2309. return 0;
  2310. }
  2311. enable_pdr:
  2312. ret = icnss_pd_restart_enable(priv);
  2313. if (ret)
  2314. return ret;
  2315. return 0;
  2316. }
  2317. static int icnss_dev_id_match(struct icnss_priv *priv,
  2318. struct device_info *dev_info)
  2319. {
  2320. while (dev_info->device_id) {
  2321. if (priv->device_id == dev_info->device_id)
  2322. return 1;
  2323. dev_info++;
  2324. }
  2325. return 0;
  2326. }
  2327. static int icnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  2328. unsigned long *thermal_state)
  2329. {
  2330. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2331. *thermal_state = icnss_tcdev->max_thermal_state;
  2332. return 0;
  2333. }
  2334. static int icnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  2335. unsigned long *thermal_state)
  2336. {
  2337. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2338. *thermal_state = icnss_tcdev->curr_thermal_state;
  2339. return 0;
  2340. }
  2341. static int icnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  2342. unsigned long thermal_state)
  2343. {
  2344. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2345. struct device *dev = &penv->pdev->dev;
  2346. int ret = 0;
  2347. if (!penv->ops || !penv->ops->set_therm_cdev_state)
  2348. return 0;
  2349. if (thermal_state > icnss_tcdev->max_thermal_state)
  2350. return -EINVAL;
  2351. icnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  2352. thermal_state, icnss_tcdev->tcdev_id);
  2353. mutex_lock(&penv->tcdev_lock);
  2354. ret = penv->ops->set_therm_cdev_state(dev, thermal_state,
  2355. icnss_tcdev->tcdev_id);
  2356. if (!ret)
  2357. icnss_tcdev->curr_thermal_state = thermal_state;
  2358. mutex_unlock(&penv->tcdev_lock);
  2359. if (ret) {
  2360. icnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  2361. ret, icnss_tcdev->tcdev_id);
  2362. return ret;
  2363. }
  2364. return 0;
  2365. }
  2366. static struct thermal_cooling_device_ops icnss_cooling_ops = {
  2367. .get_max_state = icnss_tcdev_get_max_state,
  2368. .get_cur_state = icnss_tcdev_get_cur_state,
  2369. .set_cur_state = icnss_tcdev_set_cur_state,
  2370. };
  2371. int icnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  2372. int tcdev_id)
  2373. {
  2374. struct icnss_priv *priv = dev_get_drvdata(dev);
  2375. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2376. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  2377. struct device_node *dev_node;
  2378. int ret = 0;
  2379. icnss_tcdev = kzalloc(sizeof(*icnss_tcdev), GFP_KERNEL);
  2380. if (!icnss_tcdev)
  2381. return -ENOMEM;
  2382. icnss_tcdev->tcdev_id = tcdev_id;
  2383. icnss_tcdev->max_thermal_state = max_state;
  2384. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  2385. "qcom,icnss_cdev%d", tcdev_id);
  2386. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  2387. if (!dev_node) {
  2388. icnss_pr_err("Failed to get cooling device node\n");
  2389. return -EINVAL;
  2390. }
  2391. icnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  2392. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  2393. icnss_tcdev->tcdev = thermal_of_cooling_device_register(
  2394. dev_node,
  2395. cdev_node_name, icnss_tcdev,
  2396. &icnss_cooling_ops);
  2397. if (IS_ERR_OR_NULL(icnss_tcdev->tcdev)) {
  2398. ret = PTR_ERR(icnss_tcdev->tcdev);
  2399. icnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  2400. ret, icnss_tcdev->tcdev_id);
  2401. } else {
  2402. icnss_pr_dbg("Cooling device registered for cdev id %d",
  2403. icnss_tcdev->tcdev_id);
  2404. list_add(&icnss_tcdev->tcdev_list,
  2405. &priv->icnss_tcdev_list);
  2406. }
  2407. } else {
  2408. icnss_pr_dbg("Cooling device registration not supported");
  2409. ret = -EOPNOTSUPP;
  2410. }
  2411. return ret;
  2412. }
  2413. EXPORT_SYMBOL(icnss_thermal_cdev_register);
  2414. void icnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  2415. {
  2416. struct icnss_priv *priv = dev_get_drvdata(dev);
  2417. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2418. while (!list_empty(&priv->icnss_tcdev_list)) {
  2419. icnss_tcdev = list_first_entry(&priv->icnss_tcdev_list,
  2420. struct icnss_thermal_cdev,
  2421. tcdev_list);
  2422. thermal_cooling_device_unregister(icnss_tcdev->tcdev);
  2423. list_del(&icnss_tcdev->tcdev_list);
  2424. kfree(icnss_tcdev);
  2425. }
  2426. }
  2427. EXPORT_SYMBOL(icnss_thermal_cdev_unregister);
  2428. int icnss_get_curr_therm_cdev_state(struct device *dev,
  2429. unsigned long *thermal_state,
  2430. int tcdev_id)
  2431. {
  2432. struct icnss_priv *priv = dev_get_drvdata(dev);
  2433. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2434. mutex_lock(&priv->tcdev_lock);
  2435. list_for_each_entry(icnss_tcdev, &priv->icnss_tcdev_list, tcdev_list) {
  2436. if (icnss_tcdev->tcdev_id != tcdev_id)
  2437. continue;
  2438. *thermal_state = icnss_tcdev->curr_thermal_state;
  2439. mutex_unlock(&priv->tcdev_lock);
  2440. icnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  2441. icnss_tcdev->curr_thermal_state, tcdev_id);
  2442. return 0;
  2443. }
  2444. mutex_unlock(&priv->tcdev_lock);
  2445. icnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  2446. return -EINVAL;
  2447. }
  2448. EXPORT_SYMBOL(icnss_get_curr_therm_cdev_state);
  2449. int icnss_qmi_send(struct device *dev, int type, void *cmd,
  2450. int cmd_len, void *cb_ctx,
  2451. int (*cb)(void *ctx, void *event, int event_len))
  2452. {
  2453. struct icnss_priv *priv = icnss_get_plat_priv();
  2454. int ret;
  2455. if (!priv)
  2456. return -ENODEV;
  2457. if (!test_bit(ICNSS_WLFW_CONNECTED, &priv->state))
  2458. return -EINVAL;
  2459. priv->get_info_cb = cb;
  2460. priv->get_info_cb_ctx = cb_ctx;
  2461. ret = icnss_wlfw_get_info_send_sync(priv, type, cmd, cmd_len);
  2462. if (ret) {
  2463. priv->get_info_cb = NULL;
  2464. priv->get_info_cb_ctx = NULL;
  2465. }
  2466. return ret;
  2467. }
  2468. EXPORT_SYMBOL(icnss_qmi_send);
  2469. int __icnss_register_driver(struct icnss_driver_ops *ops,
  2470. struct module *owner, const char *mod_name)
  2471. {
  2472. int ret = 0;
  2473. struct icnss_priv *priv = icnss_get_plat_priv();
  2474. if (!priv || !priv->pdev) {
  2475. ret = -ENODEV;
  2476. goto out;
  2477. }
  2478. icnss_pr_dbg("Registering driver, state: 0x%lx\n", priv->state);
  2479. if (priv->ops) {
  2480. icnss_pr_err("Driver already registered\n");
  2481. ret = -EEXIST;
  2482. goto out;
  2483. }
  2484. if (!ops->dev_info) {
  2485. icnss_pr_err("WLAN driver devinfo is null, Reject wlan driver loading");
  2486. return -EINVAL;
  2487. }
  2488. if (!icnss_dev_id_match(priv, ops->dev_info)) {
  2489. icnss_pr_err("WLAN driver dev name is %s, not supported by platform driver\n",
  2490. ops->dev_info->name);
  2491. return -ENODEV;
  2492. }
  2493. if (!ops->probe || !ops->remove) {
  2494. ret = -EINVAL;
  2495. goto out;
  2496. }
  2497. ret = icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_REGISTER_DRIVER,
  2498. 0, ops);
  2499. if (ret == -EINTR)
  2500. ret = 0;
  2501. out:
  2502. return ret;
  2503. }
  2504. EXPORT_SYMBOL(__icnss_register_driver);
  2505. int icnss_unregister_driver(struct icnss_driver_ops *ops)
  2506. {
  2507. int ret;
  2508. struct icnss_priv *priv = icnss_get_plat_priv();
  2509. if (!priv || !priv->pdev) {
  2510. ret = -ENODEV;
  2511. goto out;
  2512. }
  2513. icnss_pr_dbg("Unregistering driver, state: 0x%lx\n", priv->state);
  2514. if (!priv->ops) {
  2515. icnss_pr_err("Driver not registered\n");
  2516. ret = -ENOENT;
  2517. goto out;
  2518. }
  2519. ret = icnss_driver_event_post(priv,
  2520. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  2521. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2522. out:
  2523. return ret;
  2524. }
  2525. EXPORT_SYMBOL(icnss_unregister_driver);
  2526. static struct icnss_msi_config msi_config_wcn6750 = {
  2527. .total_vectors = 28,
  2528. .total_users = 2,
  2529. .users = (struct icnss_msi_user[]) {
  2530. { .name = "CE", .num_vectors = 10, .base_vector = 0 },
  2531. { .name = "DP", .num_vectors = 18, .base_vector = 10 },
  2532. },
  2533. };
  2534. static struct icnss_msi_config msi_config_wcn6450 = {
  2535. .total_vectors = 10,
  2536. .total_users = 1,
  2537. .users = (struct icnss_msi_user[]) {
  2538. { .name = "CE", .num_vectors = 10, .base_vector = 0 },
  2539. },
  2540. };
  2541. static int icnss_get_msi_assignment(struct icnss_priv *priv)
  2542. {
  2543. if (priv->device_id == WCN6750_DEVICE_ID)
  2544. priv->msi_config = &msi_config_wcn6750;
  2545. else
  2546. priv->msi_config = &msi_config_wcn6450;
  2547. return 0;
  2548. }
  2549. int icnss_get_user_msi_assignment(struct device *dev, char *user_name,
  2550. int *num_vectors, u32 *user_base_data,
  2551. u32 *base_vector)
  2552. {
  2553. struct icnss_priv *priv = dev_get_drvdata(dev);
  2554. struct icnss_msi_config *msi_config;
  2555. int idx;
  2556. if (!priv)
  2557. return -ENODEV;
  2558. msi_config = priv->msi_config;
  2559. if (!msi_config) {
  2560. icnss_pr_err("MSI is not supported.\n");
  2561. return -EINVAL;
  2562. }
  2563. for (idx = 0; idx < msi_config->total_users; idx++) {
  2564. if (strcmp(user_name, msi_config->users[idx].name) == 0) {
  2565. *num_vectors = msi_config->users[idx].num_vectors;
  2566. *user_base_data = msi_config->users[idx].base_vector
  2567. + priv->msi_base_data;
  2568. *base_vector = msi_config->users[idx].base_vector;
  2569. icnss_pr_dbg("Assign MSI to user: %s, num_vectors: %d, user_base_data: %u, base_vector: %u\n",
  2570. user_name, *num_vectors, *user_base_data,
  2571. *base_vector);
  2572. return 0;
  2573. }
  2574. }
  2575. icnss_pr_err("Failed to find MSI assignment for %s!\n", user_name);
  2576. return -EINVAL;
  2577. }
  2578. EXPORT_SYMBOL(icnss_get_user_msi_assignment);
  2579. int icnss_get_msi_irq(struct device *dev, unsigned int vector)
  2580. {
  2581. struct icnss_priv *priv = dev_get_drvdata(dev);
  2582. int irq_num;
  2583. irq_num = priv->srng_irqs[vector];
  2584. icnss_pr_dbg("Get IRQ number %d for vector index %d\n",
  2585. irq_num, vector);
  2586. return irq_num;
  2587. }
  2588. EXPORT_SYMBOL(icnss_get_msi_irq);
  2589. void icnss_get_msi_address(struct device *dev, u32 *msi_addr_low,
  2590. u32 *msi_addr_high)
  2591. {
  2592. struct icnss_priv *priv = dev_get_drvdata(dev);
  2593. *msi_addr_low = lower_32_bits(priv->msi_addr_iova);
  2594. *msi_addr_high = upper_32_bits(priv->msi_addr_iova);
  2595. }
  2596. EXPORT_SYMBOL(icnss_get_msi_address);
  2597. int icnss_ce_request_irq(struct device *dev, unsigned int ce_id,
  2598. irqreturn_t (*handler)(int, void *),
  2599. unsigned long flags, const char *name, void *ctx)
  2600. {
  2601. int ret = 0;
  2602. unsigned int irq;
  2603. struct ce_irq_list *irq_entry;
  2604. struct icnss_priv *priv = dev_get_drvdata(dev);
  2605. if (!priv || !priv->pdev) {
  2606. ret = -ENODEV;
  2607. goto out;
  2608. }
  2609. icnss_pr_vdbg("CE request IRQ: %d, state: 0x%lx\n", ce_id, priv->state);
  2610. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2611. icnss_pr_err("Invalid CE ID, ce_id: %d\n", ce_id);
  2612. ret = -EINVAL;
  2613. goto out;
  2614. }
  2615. irq = priv->ce_irqs[ce_id];
  2616. irq_entry = &priv->ce_irq_list[ce_id];
  2617. if (irq_entry->handler || irq_entry->irq) {
  2618. icnss_pr_err("IRQ already requested: %d, ce_id: %d\n",
  2619. irq, ce_id);
  2620. ret = -EEXIST;
  2621. goto out;
  2622. }
  2623. ret = request_irq(irq, handler, flags, name, ctx);
  2624. if (ret) {
  2625. icnss_pr_err("IRQ request failed: %d, ce_id: %d, ret: %d\n",
  2626. irq, ce_id, ret);
  2627. goto out;
  2628. }
  2629. irq_entry->irq = irq;
  2630. irq_entry->handler = handler;
  2631. icnss_pr_vdbg("IRQ requested: %d, ce_id: %d\n", irq, ce_id);
  2632. penv->stats.ce_irqs[ce_id].request++;
  2633. out:
  2634. return ret;
  2635. }
  2636. EXPORT_SYMBOL(icnss_ce_request_irq);
  2637. int icnss_ce_free_irq(struct device *dev, unsigned int ce_id, void *ctx)
  2638. {
  2639. int ret = 0;
  2640. unsigned int irq;
  2641. struct ce_irq_list *irq_entry;
  2642. if (!penv || !penv->pdev || !dev) {
  2643. ret = -ENODEV;
  2644. goto out;
  2645. }
  2646. icnss_pr_vdbg("CE free IRQ: %d, state: 0x%lx\n", ce_id, penv->state);
  2647. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2648. icnss_pr_err("Invalid CE ID to free, ce_id: %d\n", ce_id);
  2649. ret = -EINVAL;
  2650. goto out;
  2651. }
  2652. irq = penv->ce_irqs[ce_id];
  2653. irq_entry = &penv->ce_irq_list[ce_id];
  2654. if (!irq_entry->handler || !irq_entry->irq) {
  2655. icnss_pr_err("IRQ not requested: %d, ce_id: %d\n", irq, ce_id);
  2656. ret = -EEXIST;
  2657. goto out;
  2658. }
  2659. free_irq(irq, ctx);
  2660. irq_entry->irq = 0;
  2661. irq_entry->handler = NULL;
  2662. penv->stats.ce_irqs[ce_id].free++;
  2663. out:
  2664. return ret;
  2665. }
  2666. EXPORT_SYMBOL(icnss_ce_free_irq);
  2667. void icnss_enable_irq(struct device *dev, unsigned int ce_id)
  2668. {
  2669. unsigned int irq;
  2670. if (!penv || !penv->pdev || !dev) {
  2671. icnss_pr_err("Platform driver not initialized\n");
  2672. return;
  2673. }
  2674. icnss_pr_vdbg("Enable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2675. penv->state);
  2676. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2677. icnss_pr_err("Invalid CE ID to enable IRQ, ce_id: %d\n", ce_id);
  2678. return;
  2679. }
  2680. penv->stats.ce_irqs[ce_id].enable++;
  2681. irq = penv->ce_irqs[ce_id];
  2682. enable_irq(irq);
  2683. }
  2684. EXPORT_SYMBOL(icnss_enable_irq);
  2685. void icnss_disable_irq(struct device *dev, unsigned int ce_id)
  2686. {
  2687. unsigned int irq;
  2688. if (!penv || !penv->pdev || !dev) {
  2689. icnss_pr_err("Platform driver not initialized\n");
  2690. return;
  2691. }
  2692. icnss_pr_vdbg("Disable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2693. penv->state);
  2694. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2695. icnss_pr_err("Invalid CE ID to disable IRQ, ce_id: %d\n",
  2696. ce_id);
  2697. return;
  2698. }
  2699. irq = penv->ce_irqs[ce_id];
  2700. disable_irq(irq);
  2701. penv->stats.ce_irqs[ce_id].disable++;
  2702. }
  2703. EXPORT_SYMBOL(icnss_disable_irq);
  2704. int icnss_get_soc_info(struct device *dev, struct icnss_soc_info *info)
  2705. {
  2706. char *fw_build_timestamp = NULL;
  2707. struct icnss_priv *priv = dev_get_drvdata(dev);
  2708. if (!priv) {
  2709. icnss_pr_err("Platform driver not initialized\n");
  2710. return -EINVAL;
  2711. }
  2712. info->v_addr = priv->mem_base_va;
  2713. info->p_addr = priv->mem_base_pa;
  2714. info->chip_id = priv->chip_info.chip_id;
  2715. info->chip_family = priv->chip_info.chip_family;
  2716. info->board_id = priv->board_id;
  2717. info->soc_id = priv->soc_id;
  2718. info->fw_version = priv->fw_version_info.fw_version;
  2719. fw_build_timestamp = priv->fw_version_info.fw_build_timestamp;
  2720. fw_build_timestamp[WLFW_MAX_TIMESTAMP_LEN] = '\0';
  2721. strlcpy(info->fw_build_timestamp,
  2722. priv->fw_version_info.fw_build_timestamp,
  2723. WLFW_MAX_TIMESTAMP_LEN + 1);
  2724. strlcpy(info->fw_build_id, priv->fw_build_id,
  2725. ICNSS_WLFW_MAX_BUILD_ID_LEN + 1);
  2726. info->rd_card_chain_cap = priv->rd_card_chain_cap;
  2727. info->phy_he_channel_width_cap = priv->phy_he_channel_width_cap;
  2728. info->phy_qam_cap = priv->phy_qam_cap;
  2729. return 0;
  2730. }
  2731. EXPORT_SYMBOL(icnss_get_soc_info);
  2732. int icnss_get_mhi_state(struct device *dev)
  2733. {
  2734. struct icnss_priv *priv = dev_get_drvdata(dev);
  2735. if (!priv) {
  2736. icnss_pr_err("Platform driver not initialized\n");
  2737. return -EINVAL;
  2738. }
  2739. if (!priv->mhi_state_info_va)
  2740. return -ENOMEM;
  2741. return ioread32(priv->mhi_state_info_va);
  2742. }
  2743. EXPORT_SYMBOL(icnss_get_mhi_state);
  2744. int icnss_set_fw_log_mode(struct device *dev, uint8_t fw_log_mode)
  2745. {
  2746. int ret;
  2747. struct icnss_priv *priv;
  2748. if (!dev)
  2749. return -ENODEV;
  2750. priv = dev_get_drvdata(dev);
  2751. if (!priv) {
  2752. icnss_pr_err("Platform driver not initialized\n");
  2753. return -EINVAL;
  2754. }
  2755. if (test_bit(ICNSS_FW_DOWN, &penv->state) ||
  2756. !test_bit(ICNSS_FW_READY, &penv->state)) {
  2757. icnss_pr_err("FW down, ignoring fw_log_mode state: 0x%lx\n",
  2758. priv->state);
  2759. return -EINVAL;
  2760. }
  2761. icnss_pr_dbg("FW log mode: %u\n", fw_log_mode);
  2762. ret = wlfw_ini_send_sync_msg(priv, fw_log_mode);
  2763. if (ret)
  2764. icnss_pr_err("Fail to send ini, ret = %d, fw_log_mode: %u\n",
  2765. ret, fw_log_mode);
  2766. return ret;
  2767. }
  2768. EXPORT_SYMBOL(icnss_set_fw_log_mode);
  2769. int icnss_force_wake_request(struct device *dev)
  2770. {
  2771. struct icnss_priv *priv;
  2772. if (!dev)
  2773. return -ENODEV;
  2774. priv = dev_get_drvdata(dev);
  2775. if (!priv) {
  2776. icnss_pr_err("Platform driver not initialized\n");
  2777. return -EINVAL;
  2778. }
  2779. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2780. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2781. icnss_pr_soc_wake("FW down, ignoring SOC Wake request state: 0x%lx\n",
  2782. priv->state);
  2783. return -EINVAL;
  2784. }
  2785. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  2786. icnss_pr_soc_wake("SOC already awake, Ref count: %d",
  2787. atomic_read(&priv->soc_wake_ref_count));
  2788. return 0;
  2789. }
  2790. icnss_pr_soc_wake("Calling SOC Wake request");
  2791. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_REQUEST_EVENT,
  2792. 0, NULL);
  2793. return 0;
  2794. }
  2795. EXPORT_SYMBOL(icnss_force_wake_request);
  2796. int icnss_force_wake_release(struct device *dev)
  2797. {
  2798. struct icnss_priv *priv;
  2799. if (!dev)
  2800. return -ENODEV;
  2801. priv = dev_get_drvdata(dev);
  2802. if (!priv) {
  2803. icnss_pr_err("Platform driver not initialized\n");
  2804. return -EINVAL;
  2805. }
  2806. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2807. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2808. icnss_pr_soc_wake("FW down, ignoring SOC Wake release state: 0x%lx\n",
  2809. priv->state);
  2810. return -EINVAL;
  2811. }
  2812. icnss_pr_soc_wake("Calling SOC Wake response");
  2813. if (atomic_read(&priv->soc_wake_ref_count) &&
  2814. icnss_atomic_dec_if_greater_one(&priv->soc_wake_ref_count)) {
  2815. icnss_pr_soc_wake("SOC previous release pending, Ref count: %d",
  2816. atomic_read(&priv->soc_wake_ref_count));
  2817. return 0;
  2818. }
  2819. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_RELEASE_EVENT,
  2820. 0, NULL);
  2821. return 0;
  2822. }
  2823. EXPORT_SYMBOL(icnss_force_wake_release);
  2824. int icnss_is_device_awake(struct device *dev)
  2825. {
  2826. struct icnss_priv *priv = dev_get_drvdata(dev);
  2827. if (!priv) {
  2828. icnss_pr_err("Platform driver not initialized\n");
  2829. return -EINVAL;
  2830. }
  2831. return atomic_read(&priv->soc_wake_ref_count);
  2832. }
  2833. EXPORT_SYMBOL(icnss_is_device_awake);
  2834. int icnss_is_pci_ep_awake(struct device *dev)
  2835. {
  2836. struct icnss_priv *priv = dev_get_drvdata(dev);
  2837. if (!priv) {
  2838. icnss_pr_err("Platform driver not initialized\n");
  2839. return -EINVAL;
  2840. }
  2841. if (!priv->mhi_state_info_va)
  2842. return -ENOMEM;
  2843. return ioread32(priv->mhi_state_info_va + ICNSS_PCI_EP_WAKE_OFFSET);
  2844. }
  2845. EXPORT_SYMBOL(icnss_is_pci_ep_awake);
  2846. int icnss_athdiag_read(struct device *dev, uint32_t offset,
  2847. uint32_t mem_type, uint32_t data_len,
  2848. uint8_t *output)
  2849. {
  2850. int ret = 0;
  2851. struct icnss_priv *priv = dev_get_drvdata(dev);
  2852. if (priv->magic != ICNSS_MAGIC) {
  2853. icnss_pr_err("Invalid drvdata for diag read: dev %pK, data %pK, magic 0x%x\n",
  2854. dev, priv, priv->magic);
  2855. return -EINVAL;
  2856. }
  2857. if (!output || data_len == 0
  2858. || data_len > WLFW_MAX_DATA_SIZE) {
  2859. icnss_pr_err("Invalid parameters for diag read: output %pK, data_len %u\n",
  2860. output, data_len);
  2861. ret = -EINVAL;
  2862. goto out;
  2863. }
  2864. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2865. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2866. icnss_pr_err("Invalid state for diag read: 0x%lx\n",
  2867. priv->state);
  2868. ret = -EINVAL;
  2869. goto out;
  2870. }
  2871. ret = wlfw_athdiag_read_send_sync_msg(priv, offset, mem_type,
  2872. data_len, output);
  2873. out:
  2874. return ret;
  2875. }
  2876. EXPORT_SYMBOL(icnss_athdiag_read);
  2877. int icnss_athdiag_write(struct device *dev, uint32_t offset,
  2878. uint32_t mem_type, uint32_t data_len,
  2879. uint8_t *input)
  2880. {
  2881. int ret = 0;
  2882. struct icnss_priv *priv = dev_get_drvdata(dev);
  2883. if (priv->magic != ICNSS_MAGIC) {
  2884. icnss_pr_err("Invalid drvdata for diag write: dev %pK, data %pK, magic 0x%x\n",
  2885. dev, priv, priv->magic);
  2886. return -EINVAL;
  2887. }
  2888. if (!input || data_len == 0
  2889. || data_len > WLFW_MAX_DATA_SIZE) {
  2890. icnss_pr_err("Invalid parameters for diag write: input %pK, data_len %u\n",
  2891. input, data_len);
  2892. ret = -EINVAL;
  2893. goto out;
  2894. }
  2895. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2896. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2897. icnss_pr_err("Invalid state for diag write: 0x%lx\n",
  2898. priv->state);
  2899. ret = -EINVAL;
  2900. goto out;
  2901. }
  2902. ret = wlfw_athdiag_write_send_sync_msg(priv, offset, mem_type,
  2903. data_len, input);
  2904. out:
  2905. return ret;
  2906. }
  2907. EXPORT_SYMBOL(icnss_athdiag_write);
  2908. int icnss_wlan_enable(struct device *dev, struct icnss_wlan_enable_cfg *config,
  2909. enum icnss_driver_mode mode,
  2910. const char *host_version)
  2911. {
  2912. struct icnss_priv *priv = dev_get_drvdata(dev);
  2913. int temp = 0, ret = 0;
  2914. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2915. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2916. icnss_pr_err("FW down, ignoring wlan_enable state: 0x%lx\n",
  2917. priv->state);
  2918. return -EINVAL;
  2919. }
  2920. if (test_bit(ICNSS_MODE_ON, &priv->state)) {
  2921. icnss_pr_err("Already Mode on, ignoring wlan_enable state: 0x%lx\n",
  2922. priv->state);
  2923. return -EINVAL;
  2924. }
  2925. if (priv->wpss_supported &&
  2926. !priv->dms.nv_mac_not_prov && !priv->dms.mac_valid)
  2927. icnss_setup_dms_mac(priv);
  2928. if (priv->device_id == WCN6750_DEVICE_ID) {
  2929. if (!icnss_get_temperature(priv, &temp)) {
  2930. icnss_pr_dbg("Temperature: %d\n", temp);
  2931. if (temp < WLAN_EN_TEMP_THRESHOLD)
  2932. icnss_set_wlan_en_delay(priv);
  2933. }
  2934. }
  2935. if (priv->device_id == WCN6450_DEVICE_ID)
  2936. icnss_hw_power_off(priv);
  2937. ret = icnss_send_wlan_enable_to_fw(priv, config, mode, host_version);
  2938. if (priv->device_id == WCN6450_DEVICE_ID)
  2939. icnss_hw_power_on(priv);
  2940. return ret;
  2941. }
  2942. EXPORT_SYMBOL(icnss_wlan_enable);
  2943. int icnss_wlan_disable(struct device *dev, enum icnss_driver_mode mode)
  2944. {
  2945. struct icnss_priv *priv = dev_get_drvdata(dev);
  2946. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2947. icnss_pr_dbg("FW down, ignoring wlan_disable state: 0x%lx\n",
  2948. priv->state);
  2949. return 0;
  2950. }
  2951. return icnss_send_wlan_disable_to_fw(priv);
  2952. }
  2953. EXPORT_SYMBOL(icnss_wlan_disable);
  2954. bool icnss_is_qmi_disable(struct device *dev)
  2955. {
  2956. return test_bit(SKIP_QMI, &penv->ctrl_params.quirks) ? true : false;
  2957. }
  2958. EXPORT_SYMBOL(icnss_is_qmi_disable);
  2959. int icnss_get_ce_id(struct device *dev, int irq)
  2960. {
  2961. int i;
  2962. if (!penv || !penv->pdev || !dev)
  2963. return -ENODEV;
  2964. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  2965. if (penv->ce_irqs[i] == irq)
  2966. return i;
  2967. }
  2968. icnss_pr_err("No matching CE id for irq %d\n", irq);
  2969. return -EINVAL;
  2970. }
  2971. EXPORT_SYMBOL(icnss_get_ce_id);
  2972. int icnss_get_irq(struct device *dev, int ce_id)
  2973. {
  2974. int irq;
  2975. if (!penv || !penv->pdev || !dev)
  2976. return -ENODEV;
  2977. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS)
  2978. return -EINVAL;
  2979. irq = penv->ce_irqs[ce_id];
  2980. return irq;
  2981. }
  2982. EXPORT_SYMBOL(icnss_get_irq);
  2983. struct iommu_domain *icnss_smmu_get_domain(struct device *dev)
  2984. {
  2985. struct icnss_priv *priv = dev_get_drvdata(dev);
  2986. if (!priv) {
  2987. icnss_pr_err("Invalid drvdata: dev %pK\n", dev);
  2988. return NULL;
  2989. }
  2990. return priv->iommu_domain;
  2991. }
  2992. EXPORT_SYMBOL(icnss_smmu_get_domain);
  2993. int icnss_smmu_map(struct device *dev,
  2994. phys_addr_t paddr, uint32_t *iova_addr, size_t size)
  2995. {
  2996. struct icnss_priv *priv = dev_get_drvdata(dev);
  2997. int flag = IOMMU_READ | IOMMU_WRITE;
  2998. bool dma_coherent = false;
  2999. unsigned long iova;
  3000. int prop_len = 0;
  3001. size_t len;
  3002. int ret = 0;
  3003. if (!priv) {
  3004. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  3005. dev, priv);
  3006. return -EINVAL;
  3007. }
  3008. if (!iova_addr) {
  3009. icnss_pr_err("iova_addr is NULL, paddr %pa, size %zu\n",
  3010. &paddr, size);
  3011. return -EINVAL;
  3012. }
  3013. len = roundup(size + paddr - rounddown(paddr, PAGE_SIZE), PAGE_SIZE);
  3014. iova = roundup(priv->smmu_iova_ipa_current, PAGE_SIZE);
  3015. if (of_get_property(dev->of_node, "qcom,iommu-geometry", &prop_len) &&
  3016. iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  3017. icnss_pr_err("No IOVA space to map, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  3018. iova,
  3019. &priv->smmu_iova_ipa_start,
  3020. priv->smmu_iova_ipa_len);
  3021. return -ENOMEM;
  3022. }
  3023. dma_coherent = of_property_read_bool(dev->of_node, "dma-coherent");
  3024. icnss_pr_dbg("dma-coherent is %s\n",
  3025. dma_coherent ? "enabled" : "disabled");
  3026. if (dma_coherent)
  3027. flag |= IOMMU_CACHE;
  3028. icnss_pr_dbg("IOMMU Map: iova %lx, len %zu\n", iova, len);
  3029. ret = iommu_map(priv->iommu_domain, iova,
  3030. rounddown(paddr, PAGE_SIZE), len,
  3031. flag);
  3032. if (ret) {
  3033. icnss_pr_err("PA to IOVA mapping failed, ret %d\n", ret);
  3034. return ret;
  3035. }
  3036. priv->smmu_iova_ipa_current = iova + len;
  3037. *iova_addr = (uint32_t)(iova + paddr - rounddown(paddr, PAGE_SIZE));
  3038. icnss_pr_dbg("IOVA addr mapped to physical addr %lx\n", *iova_addr);
  3039. return 0;
  3040. }
  3041. EXPORT_SYMBOL(icnss_smmu_map);
  3042. int icnss_smmu_unmap(struct device *dev,
  3043. uint32_t iova_addr, size_t size)
  3044. {
  3045. struct icnss_priv *priv = dev_get_drvdata(dev);
  3046. unsigned long iova;
  3047. size_t len, unmapped_len;
  3048. if (!priv) {
  3049. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  3050. dev, priv);
  3051. return -EINVAL;
  3052. }
  3053. if (!iova_addr) {
  3054. icnss_pr_err("iova_addr is NULL, size %zu\n",
  3055. size);
  3056. return -EINVAL;
  3057. }
  3058. len = roundup(size + iova_addr - rounddown(iova_addr, PAGE_SIZE),
  3059. PAGE_SIZE);
  3060. iova = rounddown(iova_addr, PAGE_SIZE);
  3061. if (iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  3062. icnss_pr_err("Out of IOVA space during unmap, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  3063. iova,
  3064. &priv->smmu_iova_ipa_start,
  3065. priv->smmu_iova_ipa_len);
  3066. return -ENOMEM;
  3067. }
  3068. icnss_pr_dbg("IOMMU Unmap: iova %lx, len %zu\n",
  3069. iova, len);
  3070. unmapped_len = iommu_unmap(priv->iommu_domain, iova, len);
  3071. if (unmapped_len != len) {
  3072. icnss_pr_err("Failed to unmap, %zu\n", unmapped_len);
  3073. return -EINVAL;
  3074. }
  3075. priv->smmu_iova_ipa_current = iova;
  3076. return 0;
  3077. }
  3078. EXPORT_SYMBOL(icnss_smmu_unmap);
  3079. unsigned int icnss_socinfo_get_serial_number(struct device *dev)
  3080. {
  3081. return socinfo_get_serial_number();
  3082. }
  3083. EXPORT_SYMBOL(icnss_socinfo_get_serial_number);
  3084. int icnss_trigger_recovery(struct device *dev)
  3085. {
  3086. int ret = 0;
  3087. struct icnss_priv *priv = dev_get_drvdata(dev);
  3088. if (priv->magic != ICNSS_MAGIC) {
  3089. icnss_pr_err("Invalid drvdata: magic 0x%x\n", priv->magic);
  3090. ret = -EINVAL;
  3091. goto out;
  3092. }
  3093. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  3094. icnss_pr_err("PD recovery already in progress: state: 0x%lx\n",
  3095. priv->state);
  3096. ret = -EPERM;
  3097. goto out;
  3098. }
  3099. if (priv->wpss_supported) {
  3100. icnss_pr_vdbg("Initiate Root PD restart");
  3101. ret = icnss_send_smp2p(priv, ICNSS_TRIGGER_SSR,
  3102. ICNSS_SMP2P_OUT_POWER_SAVE);
  3103. if (!ret)
  3104. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  3105. return ret;
  3106. }
  3107. if (!test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  3108. icnss_pr_err("PD restart not enabled to trigger recovery: state: 0x%lx\n",
  3109. priv->state);
  3110. ret = -EOPNOTSUPP;
  3111. goto out;
  3112. }
  3113. icnss_pr_warn("Initiate PD restart at WLAN FW, state: 0x%lx\n",
  3114. priv->state);
  3115. ret = pdr_restart_pd(priv->pdr_handle, priv->pdr_service);
  3116. if (!ret)
  3117. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  3118. out:
  3119. return ret;
  3120. }
  3121. EXPORT_SYMBOL(icnss_trigger_recovery);
  3122. int icnss_idle_shutdown(struct device *dev)
  3123. {
  3124. struct icnss_priv *priv = dev_get_drvdata(dev);
  3125. if (!priv) {
  3126. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  3127. return -EINVAL;
  3128. }
  3129. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  3130. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  3131. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown\n");
  3132. return -EBUSY;
  3133. }
  3134. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  3135. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  3136. }
  3137. EXPORT_SYMBOL(icnss_idle_shutdown);
  3138. int icnss_idle_restart(struct device *dev)
  3139. {
  3140. struct icnss_priv *priv = dev_get_drvdata(dev);
  3141. if (!priv) {
  3142. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  3143. return -EINVAL;
  3144. }
  3145. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  3146. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  3147. icnss_pr_err("SSR/PDR is already in-progress during idle restart\n");
  3148. return -EBUSY;
  3149. }
  3150. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_RESTART,
  3151. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  3152. }
  3153. EXPORT_SYMBOL(icnss_idle_restart);
  3154. int icnss_exit_power_save(struct device *dev)
  3155. {
  3156. struct icnss_priv *priv = dev_get_drvdata(dev);
  3157. icnss_pr_vdbg("Calling Exit Power Save\n");
  3158. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3159. !test_bit(ICNSS_MODE_ON, &priv->state))
  3160. return 0;
  3161. return icnss_send_smp2p(priv, ICNSS_POWER_SAVE_EXIT,
  3162. ICNSS_SMP2P_OUT_POWER_SAVE);
  3163. }
  3164. EXPORT_SYMBOL(icnss_exit_power_save);
  3165. int icnss_prevent_l1(struct device *dev)
  3166. {
  3167. struct icnss_priv *priv = dev_get_drvdata(dev);
  3168. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3169. !test_bit(ICNSS_MODE_ON, &priv->state))
  3170. return 0;
  3171. return icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_EXIT,
  3172. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  3173. }
  3174. EXPORT_SYMBOL(icnss_prevent_l1);
  3175. void icnss_allow_l1(struct device *dev)
  3176. {
  3177. struct icnss_priv *priv = dev_get_drvdata(dev);
  3178. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3179. !test_bit(ICNSS_MODE_ON, &priv->state))
  3180. return;
  3181. icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_ENTER,
  3182. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  3183. }
  3184. EXPORT_SYMBOL(icnss_allow_l1);
  3185. void icnss_allow_recursive_recovery(struct device *dev)
  3186. {
  3187. struct icnss_priv *priv = dev_get_drvdata(dev);
  3188. priv->allow_recursive_recovery = true;
  3189. icnss_pr_info("Recursive recovery allowed for WLAN\n");
  3190. }
  3191. void icnss_disallow_recursive_recovery(struct device *dev)
  3192. {
  3193. struct icnss_priv *priv = dev_get_drvdata(dev);
  3194. priv->allow_recursive_recovery = false;
  3195. icnss_pr_info("Recursive recovery disallowed for WLAN\n");
  3196. }
  3197. static int icnss_create_shutdown_sysfs(struct icnss_priv *priv)
  3198. {
  3199. struct kobject *icnss_kobject;
  3200. int ret = 0;
  3201. atomic_set(&priv->is_shutdown, false);
  3202. icnss_kobject = kobject_create_and_add("shutdown_wlan", kernel_kobj);
  3203. if (!icnss_kobject) {
  3204. icnss_pr_err("Unable to create shutdown_wlan kernel object");
  3205. return -EINVAL;
  3206. }
  3207. priv->icnss_kobject = icnss_kobject;
  3208. ret = sysfs_create_file(icnss_kobject, &icnss_sysfs_attribute.attr);
  3209. if (ret) {
  3210. icnss_pr_err("Unable to create icnss sysfs file err:%d", ret);
  3211. return ret;
  3212. }
  3213. return ret;
  3214. }
  3215. static void icnss_destroy_shutdown_sysfs(struct icnss_priv *priv)
  3216. {
  3217. struct kobject *icnss_kobject;
  3218. icnss_kobject = priv->icnss_kobject;
  3219. if (icnss_kobject)
  3220. kobject_put(icnss_kobject);
  3221. }
  3222. static ssize_t qdss_tr_start_store(struct device *dev,
  3223. struct device_attribute *attr,
  3224. const char *buf, size_t count)
  3225. {
  3226. struct icnss_priv *priv = dev_get_drvdata(dev);
  3227. wlfw_qdss_trace_start(priv);
  3228. icnss_pr_dbg("Received QDSS start command\n");
  3229. return count;
  3230. }
  3231. static ssize_t qdss_tr_stop_store(struct device *dev,
  3232. struct device_attribute *attr,
  3233. const char *user_buf, size_t count)
  3234. {
  3235. struct icnss_priv *priv = dev_get_drvdata(dev);
  3236. u32 option = 0;
  3237. if (sscanf(user_buf, "%du", &option) != 1)
  3238. return -EINVAL;
  3239. wlfw_qdss_trace_stop(priv, option);
  3240. icnss_pr_dbg("Received QDSS stop command\n");
  3241. return count;
  3242. }
  3243. static ssize_t qdss_conf_download_store(struct device *dev,
  3244. struct device_attribute *attr,
  3245. const char *buf, size_t count)
  3246. {
  3247. struct icnss_priv *priv = dev_get_drvdata(dev);
  3248. icnss_wlfw_qdss_dnld_send_sync(priv);
  3249. icnss_pr_dbg("Received QDSS download config command\n");
  3250. return count;
  3251. }
  3252. static ssize_t hw_trc_override_store(struct device *dev,
  3253. struct device_attribute *attr,
  3254. const char *buf, size_t count)
  3255. {
  3256. struct icnss_priv *priv = dev_get_drvdata(dev);
  3257. int tmp = 0;
  3258. if (sscanf(buf, "%du", &tmp) != 1)
  3259. return -EINVAL;
  3260. priv->hw_trc_override = tmp;
  3261. icnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3262. return count;
  3263. }
  3264. static void icnss_wpss_load(struct work_struct *wpss_load_work)
  3265. {
  3266. struct icnss_priv *priv = icnss_get_plat_priv();
  3267. phandle rproc_phandle;
  3268. int ret;
  3269. if (of_property_read_u32(priv->pdev->dev.of_node, "qcom,rproc-handle",
  3270. &rproc_phandle)) {
  3271. icnss_pr_err("error reading rproc phandle\n");
  3272. return;
  3273. }
  3274. priv->rproc = rproc_get_by_phandle(rproc_phandle);
  3275. if (IS_ERR_OR_NULL(priv->rproc)) {
  3276. icnss_pr_err("rproc not found");
  3277. return;
  3278. }
  3279. ret = rproc_boot(priv->rproc);
  3280. if (ret) {
  3281. icnss_pr_err("Failed to boot wpss rproc, ret: %d", ret);
  3282. rproc_put(priv->rproc);
  3283. }
  3284. }
  3285. static ssize_t wpss_boot_store(struct device *dev,
  3286. struct device_attribute *attr,
  3287. const char *buf, size_t count)
  3288. {
  3289. struct icnss_priv *priv = dev_get_drvdata(dev);
  3290. int wpss_rproc = 0;
  3291. if (!priv->wpss_supported)
  3292. return count;
  3293. if (sscanf(buf, "%du", &wpss_rproc) != 1) {
  3294. icnss_pr_err("Failed to read wpss rproc info");
  3295. return -EINVAL;
  3296. }
  3297. icnss_pr_dbg("WPSS Remote Processor: %s", wpss_rproc ? "GET" : "PUT");
  3298. if (wpss_rproc == 1)
  3299. schedule_work(&wpss_loader);
  3300. else if (wpss_rproc == 0)
  3301. icnss_wpss_unload(priv);
  3302. return count;
  3303. }
  3304. static ssize_t wlan_en_delay_store(struct device *dev,
  3305. struct device_attribute *attr,
  3306. const char *buf, size_t count)
  3307. {
  3308. struct icnss_priv *priv = dev_get_drvdata(dev);
  3309. uint32_t wlan_en_delay = 0;
  3310. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3311. return count;
  3312. if (sscanf(buf, "%du", &wlan_en_delay) != 1) {
  3313. icnss_pr_err("Failed to read wlan_en_delay");
  3314. return -EINVAL;
  3315. }
  3316. icnss_pr_dbg("WLAN_EN delay: %dms", wlan_en_delay);
  3317. priv->wlan_en_delay_ms_user = wlan_en_delay;
  3318. return count;
  3319. }
  3320. static DEVICE_ATTR_WO(qdss_tr_start);
  3321. static DEVICE_ATTR_WO(qdss_tr_stop);
  3322. static DEVICE_ATTR_WO(qdss_conf_download);
  3323. static DEVICE_ATTR_WO(hw_trc_override);
  3324. static DEVICE_ATTR_WO(wpss_boot);
  3325. static DEVICE_ATTR_WO(wlan_en_delay);
  3326. static struct attribute *icnss_attrs[] = {
  3327. &dev_attr_qdss_tr_start.attr,
  3328. &dev_attr_qdss_tr_stop.attr,
  3329. &dev_attr_qdss_conf_download.attr,
  3330. &dev_attr_hw_trc_override.attr,
  3331. &dev_attr_wpss_boot.attr,
  3332. &dev_attr_wlan_en_delay.attr,
  3333. NULL,
  3334. };
  3335. static struct attribute_group icnss_attr_group = {
  3336. .attrs = icnss_attrs,
  3337. };
  3338. static int icnss_create_sysfs_link(struct icnss_priv *priv)
  3339. {
  3340. struct device *dev = &priv->pdev->dev;
  3341. int ret;
  3342. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "icnss");
  3343. if (ret) {
  3344. icnss_pr_err("Failed to create icnss link, err = %d\n",
  3345. ret);
  3346. goto out;
  3347. }
  3348. return 0;
  3349. out:
  3350. return ret;
  3351. }
  3352. static void icnss_remove_sysfs_link(struct icnss_priv *priv)
  3353. {
  3354. sysfs_remove_link(kernel_kobj, "icnss");
  3355. }
  3356. static int icnss_sysfs_create(struct icnss_priv *priv)
  3357. {
  3358. int ret = 0;
  3359. ret = devm_device_add_group(&priv->pdev->dev,
  3360. &icnss_attr_group);
  3361. if (ret) {
  3362. icnss_pr_err("Failed to create icnss device group, err = %d\n",
  3363. ret);
  3364. goto out;
  3365. }
  3366. icnss_create_sysfs_link(priv);
  3367. ret = icnss_create_shutdown_sysfs(priv);
  3368. if (ret)
  3369. goto remove_icnss_group;
  3370. return 0;
  3371. remove_icnss_group:
  3372. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3373. out:
  3374. return ret;
  3375. }
  3376. static void icnss_sysfs_destroy(struct icnss_priv *priv)
  3377. {
  3378. icnss_destroy_shutdown_sysfs(priv);
  3379. icnss_remove_sysfs_link(priv);
  3380. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3381. }
  3382. static int icnss_resource_parse(struct icnss_priv *priv)
  3383. {
  3384. int ret = 0, i = 0;
  3385. struct platform_device *pdev = priv->pdev;
  3386. struct device *dev = &pdev->dev;
  3387. struct resource *res;
  3388. u32 int_prop;
  3389. ret = icnss_get_vreg(priv);
  3390. if (ret) {
  3391. icnss_pr_err("Failed to get vreg, err = %d\n", ret);
  3392. goto out;
  3393. }
  3394. ret = icnss_get_clk(priv);
  3395. if (ret) {
  3396. icnss_pr_err("Failed to get clocks, err = %d\n", ret);
  3397. goto put_vreg;
  3398. }
  3399. if (of_property_read_bool(pdev->dev.of_node, "qcom,psf-supported")) {
  3400. ret = icnss_get_psf_info(priv);
  3401. if (ret < 0)
  3402. goto out;
  3403. priv->psf_supported = true;
  3404. }
  3405. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  3406. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3407. "membase");
  3408. if (!res) {
  3409. icnss_pr_err("Memory base not found in DT\n");
  3410. ret = -EINVAL;
  3411. goto put_clk;
  3412. }
  3413. priv->mem_base_pa = res->start;
  3414. priv->mem_base_va = devm_ioremap(dev, priv->mem_base_pa,
  3415. resource_size(res));
  3416. if (!priv->mem_base_va) {
  3417. icnss_pr_err("Memory base ioremap failed: phy addr: %pa\n",
  3418. &priv->mem_base_pa);
  3419. ret = -EINVAL;
  3420. goto put_clk;
  3421. }
  3422. icnss_pr_dbg("MEM_BASE pa: %pa, va: 0x%pK\n",
  3423. &priv->mem_base_pa,
  3424. priv->mem_base_va);
  3425. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  3426. res = platform_get_resource(priv->pdev,
  3427. IORESOURCE_IRQ, i);
  3428. if (!res) {
  3429. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3430. ret = -ENODEV;
  3431. goto put_clk;
  3432. } else {
  3433. priv->ce_irqs[i] = res->start;
  3434. }
  3435. }
  3436. if (of_property_read_bool(pdev->dev.of_node,
  3437. "qcom,is_low_power")) {
  3438. priv->low_power_support = true;
  3439. icnss_pr_dbg("Deep Sleep/Hibernate mode supported\n");
  3440. }
  3441. if (of_property_read_u32(pdev->dev.of_node, "qcom,rf_subtype",
  3442. &priv->rf_subtype) == 0) {
  3443. priv->is_rf_subtype_valid = true;
  3444. icnss_pr_dbg("RF subtype 0x%x\n", priv->rf_subtype);
  3445. }
  3446. if (of_property_read_bool(pdev->dev.of_node,
  3447. "qcom,is_slate_rfa")) {
  3448. priv->is_slate_rfa = true;
  3449. icnss_pr_err("SLATE rfa is enabled\n");
  3450. }
  3451. } else if (priv->device_id == WCN6750_DEVICE_ID ||
  3452. priv->device_id == WCN6450_DEVICE_ID) {
  3453. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3454. "msi_addr");
  3455. if (!res) {
  3456. icnss_pr_err("MSI address not found in DT\n");
  3457. ret = -EINVAL;
  3458. goto put_clk;
  3459. }
  3460. priv->msi_addr_pa = res->start;
  3461. priv->msi_addr_iova = dma_map_resource(dev, priv->msi_addr_pa,
  3462. PAGE_SIZE,
  3463. DMA_FROM_DEVICE, 0);
  3464. if (dma_mapping_error(dev, priv->msi_addr_iova)) {
  3465. icnss_pr_err("MSI: failed to map msi address\n");
  3466. priv->msi_addr_iova = 0;
  3467. ret = -ENOMEM;
  3468. goto put_clk;
  3469. }
  3470. icnss_pr_dbg("MSI Addr pa: %pa, iova: 0x%pK\n",
  3471. &priv->msi_addr_pa,
  3472. priv->msi_addr_iova);
  3473. ret = of_property_read_u32_index(dev->of_node,
  3474. "interrupts",
  3475. 1,
  3476. &int_prop);
  3477. if (ret) {
  3478. icnss_pr_dbg("Read interrupt prop failed");
  3479. goto put_clk;
  3480. }
  3481. priv->msi_base_data = int_prop + 32;
  3482. icnss_pr_dbg(" MSI Base Data: %d, IRQ Index: %d\n",
  3483. priv->msi_base_data, int_prop);
  3484. icnss_get_msi_assignment(priv);
  3485. for (i = 0; i < priv->msi_config->total_vectors; i++) {
  3486. res = platform_get_resource(priv->pdev,
  3487. IORESOURCE_IRQ, i);
  3488. if (!res) {
  3489. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3490. ret = -ENODEV;
  3491. goto put_clk;
  3492. } else {
  3493. priv->srng_irqs[i] = res->start;
  3494. }
  3495. }
  3496. }
  3497. return 0;
  3498. put_clk:
  3499. icnss_put_clk(priv);
  3500. put_vreg:
  3501. icnss_put_vreg(priv);
  3502. out:
  3503. return ret;
  3504. }
  3505. static int icnss_msa_dt_parse(struct icnss_priv *priv)
  3506. {
  3507. int ret = 0;
  3508. struct platform_device *pdev = priv->pdev;
  3509. struct device *dev = &pdev->dev;
  3510. struct device_node *np = NULL;
  3511. u64 prop_size = 0;
  3512. const __be32 *addrp = NULL;
  3513. np = of_parse_phandle(dev->of_node,
  3514. "qcom,wlan-msa-fixed-region", 0);
  3515. if (np) {
  3516. addrp = of_get_address(np, 0, &prop_size, NULL);
  3517. if (!addrp) {
  3518. icnss_pr_err("Failed to get assigned-addresses or property\n");
  3519. ret = -EINVAL;
  3520. of_node_put(np);
  3521. goto out;
  3522. }
  3523. priv->msa_pa = of_translate_address(np, addrp);
  3524. if (priv->msa_pa == OF_BAD_ADDR) {
  3525. icnss_pr_err("Failed to translate MSA PA from device-tree\n");
  3526. ret = -EINVAL;
  3527. of_node_put(np);
  3528. goto out;
  3529. }
  3530. of_node_put(np);
  3531. priv->msa_va = memremap(priv->msa_pa,
  3532. (unsigned long)prop_size, MEMREMAP_WT);
  3533. if (!priv->msa_va) {
  3534. icnss_pr_err("MSA PA ioremap failed: phy addr: %pa\n",
  3535. &priv->msa_pa);
  3536. ret = -EINVAL;
  3537. goto out;
  3538. }
  3539. priv->msa_mem_size = prop_size;
  3540. } else {
  3541. ret = of_property_read_u32(dev->of_node, "qcom,wlan-msa-memory",
  3542. &priv->msa_mem_size);
  3543. if (ret || priv->msa_mem_size == 0) {
  3544. icnss_pr_err("Fail to get MSA Memory Size: %u ret: %d\n",
  3545. priv->msa_mem_size, ret);
  3546. goto out;
  3547. }
  3548. priv->msa_va = dmam_alloc_coherent(&pdev->dev,
  3549. priv->msa_mem_size, &priv->msa_pa, GFP_KERNEL);
  3550. if (!priv->msa_va) {
  3551. icnss_pr_err("DMA alloc failed for MSA\n");
  3552. ret = -ENOMEM;
  3553. goto out;
  3554. }
  3555. }
  3556. icnss_pr_dbg("MSA pa: %pa, MSA va: 0x%pK MSA Memory Size: 0x%x\n",
  3557. &priv->msa_pa, (void *)priv->msa_va, priv->msa_mem_size);
  3558. priv->use_prefix_path = of_property_read_bool(priv->pdev->dev.of_node,
  3559. "qcom,fw-prefix");
  3560. return 0;
  3561. out:
  3562. return ret;
  3563. }
  3564. static int icnss_smmu_fault_handler(struct iommu_domain *domain,
  3565. struct device *dev, unsigned long iova,
  3566. int flags, void *handler_token)
  3567. {
  3568. struct icnss_priv *priv = handler_token;
  3569. struct icnss_uevent_fw_down_data fw_down_data = {0};
  3570. icnss_fatal_err("SMMU fault happened with IOVA 0x%lx\n", iova);
  3571. if (!priv) {
  3572. icnss_pr_err("priv is NULL\n");
  3573. return -ENODEV;
  3574. }
  3575. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  3576. fw_down_data.crashed = true;
  3577. icnss_call_driver_uevent(priv, ICNSS_UEVENT_SMMU_FAULT,
  3578. &fw_down_data);
  3579. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  3580. &fw_down_data);
  3581. }
  3582. icnss_trigger_recovery(&priv->pdev->dev);
  3583. /* IOMMU driver requires -ENOSYS return value to print debug info. */
  3584. return -ENOSYS;
  3585. }
  3586. static int icnss_smmu_dt_parse(struct icnss_priv *priv)
  3587. {
  3588. int ret = 0;
  3589. struct platform_device *pdev = priv->pdev;
  3590. struct device *dev = &pdev->dev;
  3591. const char *iommu_dma_type;
  3592. struct resource *res;
  3593. u32 addr_win[2];
  3594. ret = of_property_read_u32_array(dev->of_node,
  3595. "qcom,iommu-dma-addr-pool",
  3596. addr_win,
  3597. ARRAY_SIZE(addr_win));
  3598. if (ret) {
  3599. icnss_pr_err("SMMU IOVA base not found\n");
  3600. } else {
  3601. priv->smmu_iova_start = addr_win[0];
  3602. priv->smmu_iova_len = addr_win[1];
  3603. icnss_pr_dbg("SMMU IOVA start: %pa, len: %zx\n",
  3604. &priv->smmu_iova_start,
  3605. priv->smmu_iova_len);
  3606. priv->iommu_domain =
  3607. iommu_get_domain_for_dev(&pdev->dev);
  3608. ret = of_property_read_string(dev->of_node, "qcom,iommu-dma",
  3609. &iommu_dma_type);
  3610. if (!ret && !strcmp("fastmap", iommu_dma_type)) {
  3611. icnss_pr_dbg("SMMU S1 stage enabled\n");
  3612. priv->smmu_s1_enable = true;
  3613. if (priv->device_id == WCN6750_DEVICE_ID ||
  3614. priv->device_id == WCN6450_DEVICE_ID)
  3615. iommu_set_fault_handler(priv->iommu_domain,
  3616. icnss_smmu_fault_handler,
  3617. priv);
  3618. }
  3619. res = platform_get_resource_byname(pdev,
  3620. IORESOURCE_MEM,
  3621. "smmu_iova_ipa");
  3622. if (!res) {
  3623. icnss_pr_err("SMMU IOVA IPA not found\n");
  3624. } else {
  3625. priv->smmu_iova_ipa_start = res->start;
  3626. priv->smmu_iova_ipa_current = res->start;
  3627. priv->smmu_iova_ipa_len = resource_size(res);
  3628. icnss_pr_dbg("SMMU IOVA IPA start: %pa, len: %zx\n",
  3629. &priv->smmu_iova_ipa_start,
  3630. priv->smmu_iova_ipa_len);
  3631. }
  3632. }
  3633. return 0;
  3634. }
  3635. int icnss_get_iova(struct icnss_priv *priv, u64 *addr, u64 *size)
  3636. {
  3637. if (!priv)
  3638. return -ENODEV;
  3639. if (!priv->smmu_iova_len)
  3640. return -EINVAL;
  3641. *addr = priv->smmu_iova_start;
  3642. *size = priv->smmu_iova_len;
  3643. return 0;
  3644. }
  3645. int icnss_get_iova_ipa(struct icnss_priv *priv, u64 *addr, u64 *size)
  3646. {
  3647. if (!priv)
  3648. return -ENODEV;
  3649. if (!priv->smmu_iova_ipa_len)
  3650. return -EINVAL;
  3651. *addr = priv->smmu_iova_ipa_start;
  3652. *size = priv->smmu_iova_ipa_len;
  3653. return 0;
  3654. }
  3655. void icnss_add_fw_prefix_name(struct icnss_priv *priv, char *prefix_name,
  3656. char *name)
  3657. {
  3658. if (!priv)
  3659. return;
  3660. if (!priv->use_prefix_path) {
  3661. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME, "%s", name);
  3662. return;
  3663. }
  3664. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3665. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3666. ADRASTEA_PATH_PREFIX "%s", name);
  3667. else if (priv->device_id == WCN6750_DEVICE_ID)
  3668. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3669. QCA6750_PATH_PREFIX "%s", name);
  3670. else if (priv->device_id == WCN6450_DEVICE_ID)
  3671. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3672. WCN6450_PATH_PREFIX "%s", name);
  3673. icnss_pr_dbg("File added with prefix: %s\n", prefix_name);
  3674. }
  3675. static const struct platform_device_id icnss_platform_id_table[] = {
  3676. { .name = "wcn6750", .driver_data = WCN6750_DEVICE_ID, },
  3677. { .name = "adrastea", .driver_data = ADRASTEA_DEVICE_ID, },
  3678. { .name = "wcn6450", .driver_data = WCN6450_DEVICE_ID, },
  3679. { },
  3680. };
  3681. static const struct of_device_id icnss_dt_match[] = {
  3682. {
  3683. .compatible = "qcom,wcn6750",
  3684. .data = (void *)&icnss_platform_id_table[0]},
  3685. {
  3686. .compatible = "qcom,icnss",
  3687. .data = (void *)&icnss_platform_id_table[1]},
  3688. {
  3689. .compatible = "qcom,wcn6450",
  3690. .data = (void *)&icnss_platform_id_table[2]},
  3691. { },
  3692. };
  3693. MODULE_DEVICE_TABLE(of, icnss_dt_match);
  3694. static void icnss_init_control_params(struct icnss_priv *priv)
  3695. {
  3696. priv->ctrl_params.qmi_timeout = WLFW_TIMEOUT;
  3697. priv->ctrl_params.quirks = ICNSS_QUIRKS_DEFAULT;
  3698. priv->ctrl_params.bdf_type = ICNSS_BDF_TYPE_DEFAULT;
  3699. if (priv->device_id == WCN6750_DEVICE_ID ||
  3700. of_property_read_bool(priv->pdev->dev.of_node,
  3701. "wpss-support-enable"))
  3702. priv->wpss_supported = true;
  3703. if (of_property_read_bool(priv->pdev->dev.of_node,
  3704. "bdf-download-support"))
  3705. priv->bdf_download_support = true;
  3706. if (priv->bdf_download_support && priv->device_id == ADRASTEA_DEVICE_ID)
  3707. priv->ctrl_params.bdf_type = ICNSS_BDF_BIN;
  3708. }
  3709. static void icnss_read_device_configs(struct icnss_priv *priv)
  3710. {
  3711. if (of_property_read_bool(priv->pdev->dev.of_node,
  3712. "wlan-ipa-disabled")) {
  3713. set_bit(ICNSS_IPA_DISABLED, &priv->device_config);
  3714. }
  3715. if (of_property_read_bool(priv->pdev->dev.of_node,
  3716. "qcom,wpss-self-recovery"))
  3717. priv->wpss_self_recovery_enabled = true;
  3718. }
  3719. static inline void icnss_runtime_pm_init(struct icnss_priv *priv)
  3720. {
  3721. pm_runtime_get_sync(&priv->pdev->dev);
  3722. pm_runtime_forbid(&priv->pdev->dev);
  3723. pm_runtime_set_active(&priv->pdev->dev);
  3724. pm_runtime_enable(&priv->pdev->dev);
  3725. }
  3726. static inline void icnss_runtime_pm_deinit(struct icnss_priv *priv)
  3727. {
  3728. pm_runtime_disable(&priv->pdev->dev);
  3729. pm_runtime_allow(&priv->pdev->dev);
  3730. pm_runtime_put_sync(&priv->pdev->dev);
  3731. }
  3732. static inline bool icnss_use_nv_mac(struct icnss_priv *priv)
  3733. {
  3734. return of_property_read_bool(priv->pdev->dev.of_node,
  3735. "use-nv-mac");
  3736. }
  3737. static void rproc_restart_level_notifier(void *data, struct rproc *rproc)
  3738. {
  3739. struct icnss_subsys_restart_level_data *restart_level_data;
  3740. icnss_pr_info("rproc name: %s recovery disable: %d",
  3741. rproc->name, rproc->recovery_disabled);
  3742. restart_level_data = kzalloc(sizeof(*restart_level_data), GFP_ATOMIC);
  3743. if (!restart_level_data)
  3744. return;
  3745. if (strnstr(rproc->name, "wpss", ICNSS_RPROC_LEN)) {
  3746. if (rproc->recovery_disabled)
  3747. restart_level_data->restart_level = ICNSS_DISABLE_M3_SSR;
  3748. else
  3749. restart_level_data->restart_level = ICNSS_ENABLE_M3_SSR;
  3750. icnss_driver_event_post(penv, ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL,
  3751. 0, restart_level_data);
  3752. }
  3753. }
  3754. #ifdef CONFIG_WCNSS_MEM_PRE_ALLOC
  3755. static void icnss_initialize_mem_pool(unsigned long device_id)
  3756. {
  3757. cnss_initialize_prealloc_pool(device_id);
  3758. }
  3759. static void icnss_deinitialize_mem_pool(void)
  3760. {
  3761. cnss_deinitialize_prealloc_pool();
  3762. }
  3763. #else
  3764. static void icnss_initialize_mem_pool(unsigned long device_id)
  3765. {
  3766. }
  3767. static void icnss_deinitialize_mem_pool(void)
  3768. {
  3769. }
  3770. #endif
  3771. static int icnss_probe(struct platform_device *pdev)
  3772. {
  3773. int ret = 0;
  3774. struct device *dev = &pdev->dev;
  3775. struct icnss_priv *priv;
  3776. const struct of_device_id *of_id;
  3777. const struct platform_device_id *device_id;
  3778. if (dev_get_drvdata(dev)) {
  3779. icnss_pr_err("Driver is already initialized\n");
  3780. return -EEXIST;
  3781. }
  3782. of_id = of_match_device(icnss_dt_match, &pdev->dev);
  3783. if (!of_id || !of_id->data) {
  3784. icnss_pr_err("Failed to find of match device!\n");
  3785. ret = -ENODEV;
  3786. goto out_reset_drvdata;
  3787. }
  3788. device_id = of_id->data;
  3789. icnss_pr_dbg("Platform driver probe\n");
  3790. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  3791. if (!priv)
  3792. return -ENOMEM;
  3793. priv->magic = ICNSS_MAGIC;
  3794. dev_set_drvdata(dev, priv);
  3795. priv->pdev = pdev;
  3796. priv->device_id = device_id->driver_data;
  3797. priv->is_chain1_supported = true;
  3798. INIT_LIST_HEAD(&priv->vreg_list);
  3799. INIT_LIST_HEAD(&priv->clk_list);
  3800. icnss_allow_recursive_recovery(dev);
  3801. icnss_initialize_mem_pool(priv->device_id);
  3802. icnss_init_control_params(priv);
  3803. icnss_read_device_configs(priv);
  3804. ret = icnss_resource_parse(priv);
  3805. if (ret)
  3806. goto out_reset_drvdata;
  3807. ret = icnss_msa_dt_parse(priv);
  3808. if (ret)
  3809. goto out_free_resources;
  3810. ret = icnss_smmu_dt_parse(priv);
  3811. if (ret)
  3812. goto out_free_resources;
  3813. spin_lock_init(&priv->event_lock);
  3814. spin_lock_init(&priv->on_off_lock);
  3815. spin_lock_init(&priv->soc_wake_msg_lock);
  3816. mutex_init(&priv->dev_lock);
  3817. mutex_init(&priv->tcdev_lock);
  3818. priv->event_wq = alloc_workqueue("icnss_driver_event", WQ_UNBOUND, 1);
  3819. if (!priv->event_wq) {
  3820. icnss_pr_err("Workqueue creation failed\n");
  3821. ret = -EFAULT;
  3822. goto smmu_cleanup;
  3823. }
  3824. INIT_WORK(&priv->event_work, icnss_driver_event_work);
  3825. INIT_LIST_HEAD(&priv->event_list);
  3826. if (priv->is_slate_rfa)
  3827. init_completion(&priv->slate_boot_complete);
  3828. ret = icnss_register_fw_service(priv);
  3829. if (ret < 0) {
  3830. icnss_pr_err("fw service registration failed: %d\n", ret);
  3831. goto out_destroy_wq;
  3832. }
  3833. icnss_enable_recovery(priv);
  3834. icnss_debugfs_create(priv);
  3835. icnss_sysfs_create(priv);
  3836. ret = device_init_wakeup(&priv->pdev->dev, true);
  3837. if (ret)
  3838. icnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3839. ret);
  3840. icnss_set_plat_priv(priv);
  3841. init_completion(&priv->unblock_shutdown);
  3842. if (priv->device_id == WCN6750_DEVICE_ID ||
  3843. priv->device_id == WCN6450_DEVICE_ID) {
  3844. priv->soc_wake_wq = alloc_workqueue("icnss_soc_wake_event",
  3845. WQ_UNBOUND|WQ_HIGHPRI, 1);
  3846. if (!priv->soc_wake_wq) {
  3847. icnss_pr_err("Soc wake Workqueue creation failed\n");
  3848. ret = -EFAULT;
  3849. goto out_unregister_fw_service;
  3850. }
  3851. INIT_WORK(&priv->soc_wake_msg_work, icnss_soc_wake_msg_work);
  3852. INIT_LIST_HEAD(&priv->soc_wake_msg_list);
  3853. ret = icnss_genl_init();
  3854. if (ret < 0)
  3855. icnss_pr_err("ICNSS genl init failed %d\n", ret);
  3856. init_completion(&priv->smp2p_soc_wake_wait);
  3857. icnss_runtime_pm_init(priv);
  3858. icnss_aop_mbox_init(priv);
  3859. set_bit(ICNSS_COLD_BOOT_CAL, &priv->state);
  3860. priv->bdf_download_support = true;
  3861. register_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3862. }
  3863. if (priv->wpss_supported) {
  3864. ret = icnss_dms_init(priv);
  3865. if (ret)
  3866. icnss_pr_err("ICNSS DMS init failed %d\n", ret);
  3867. priv->use_nv_mac = icnss_use_nv_mac(priv);
  3868. icnss_pr_dbg("NV MAC feature is %s\n",
  3869. priv->use_nv_mac ? "Mandatory":"Not Mandatory");
  3870. INIT_WORK(&wpss_loader, icnss_wpss_load);
  3871. }
  3872. timer_setup(&priv->recovery_timer,
  3873. icnss_recovery_timeout_hdlr, 0);
  3874. if (priv->wpss_self_recovery_enabled) {
  3875. INIT_WORK(&wpss_ssr_work, icnss_wpss_self_recovery);
  3876. timer_setup(&priv->wpss_ssr_timer,
  3877. icnss_wpss_ssr_timeout_hdlr, 0);
  3878. }
  3879. INIT_LIST_HEAD(&priv->icnss_tcdev_list);
  3880. icnss_pr_info("Platform driver probed successfully\n");
  3881. return 0;
  3882. out_unregister_fw_service:
  3883. icnss_unregister_fw_service(priv);
  3884. out_destroy_wq:
  3885. destroy_workqueue(priv->event_wq);
  3886. smmu_cleanup:
  3887. priv->iommu_domain = NULL;
  3888. out_free_resources:
  3889. icnss_put_resources(priv);
  3890. out_reset_drvdata:
  3891. icnss_deinitialize_mem_pool();
  3892. dev_set_drvdata(dev, NULL);
  3893. return ret;
  3894. }
  3895. void icnss_destroy_ramdump_device(struct icnss_ramdump_info *ramdump_info)
  3896. {
  3897. if (IS_ERR_OR_NULL(ramdump_info))
  3898. return;
  3899. device_unregister(ramdump_info->dev);
  3900. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  3901. kfree(ramdump_info);
  3902. }
  3903. static void icnss_unregister_power_supply_notifier(struct icnss_priv *priv)
  3904. {
  3905. if (priv->batt_psy)
  3906. power_supply_put(penv->batt_psy);
  3907. if (priv->psf_supported) {
  3908. flush_workqueue(priv->soc_update_wq);
  3909. destroy_workqueue(priv->soc_update_wq);
  3910. power_supply_unreg_notifier(&priv->psf_nb);
  3911. }
  3912. }
  3913. static int icnss_remove(struct platform_device *pdev)
  3914. {
  3915. struct icnss_priv *priv = dev_get_drvdata(&pdev->dev);
  3916. icnss_pr_info("Removing driver: state: 0x%lx\n", priv->state);
  3917. del_timer(&priv->recovery_timer);
  3918. if (priv->wpss_self_recovery_enabled)
  3919. del_timer(&priv->wpss_ssr_timer);
  3920. device_init_wakeup(&priv->pdev->dev, false);
  3921. icnss_debugfs_destroy(priv);
  3922. icnss_unregister_power_supply_notifier(penv);
  3923. icnss_sysfs_destroy(priv);
  3924. complete_all(&priv->unblock_shutdown);
  3925. if (priv->is_slate_rfa) {
  3926. complete(&priv->slate_boot_complete);
  3927. icnss_slate_ssr_unregister_notifier(priv);
  3928. icnss_unregister_slate_event_notifier(priv);
  3929. }
  3930. icnss_destroy_ramdump_device(priv->msa0_dump_dev);
  3931. if (priv->wpss_supported) {
  3932. icnss_dms_deinit(priv);
  3933. icnss_wpss_early_ssr_unregister_notifier(priv);
  3934. icnss_wpss_ssr_unregister_notifier(priv);
  3935. } else {
  3936. icnss_modem_ssr_unregister_notifier(priv);
  3937. icnss_pdr_unregister_notifier(priv);
  3938. }
  3939. if (priv->device_id == WCN6750_DEVICE_ID ||
  3940. priv->device_id == WCN6450_DEVICE_ID) {
  3941. icnss_genl_exit();
  3942. icnss_runtime_pm_deinit(priv);
  3943. if (!IS_ERR_OR_NULL(priv->mbox_chan))
  3944. mbox_free_channel(priv->mbox_chan);
  3945. unregister_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3946. complete_all(&priv->smp2p_soc_wake_wait);
  3947. icnss_destroy_ramdump_device(priv->m3_dump_phyareg);
  3948. icnss_destroy_ramdump_device(priv->m3_dump_phydbg);
  3949. icnss_destroy_ramdump_device(priv->m3_dump_wmac0reg);
  3950. icnss_destroy_ramdump_device(priv->m3_dump_wcssdbg);
  3951. icnss_destroy_ramdump_device(priv->m3_dump_phyapdmem);
  3952. if (priv->soc_wake_wq)
  3953. destroy_workqueue(priv->soc_wake_wq);
  3954. }
  3955. class_destroy(priv->icnss_ramdump_class);
  3956. unregister_chrdev_region(priv->icnss_ramdump_dev, RAMDUMP_NUM_DEVICES);
  3957. icnss_unregister_fw_service(priv);
  3958. if (priv->event_wq)
  3959. destroy_workqueue(priv->event_wq);
  3960. priv->iommu_domain = NULL;
  3961. icnss_hw_power_off(priv);
  3962. icnss_put_resources(priv);
  3963. icnss_deinitialize_mem_pool();
  3964. dev_set_drvdata(&pdev->dev, NULL);
  3965. return 0;
  3966. }
  3967. void icnss_recovery_timeout_hdlr(struct timer_list *t)
  3968. {
  3969. struct icnss_priv *priv = from_timer(priv, t, recovery_timer);
  3970. /* This is to handle if slate is not up and modem SSR is triggered */
  3971. if (priv->is_slate_rfa && !test_bit(ICNSS_SLATE_UP, &priv->state))
  3972. return;
  3973. icnss_pr_err("Timeout waiting for FW Ready 0x%lx\n", priv->state);
  3974. ICNSS_ASSERT(0);
  3975. }
  3976. void icnss_wpss_ssr_timeout_hdlr(struct timer_list *t)
  3977. {
  3978. struct icnss_priv *priv = from_timer(priv, t, wpss_ssr_timer);
  3979. icnss_pr_err("Timeout waiting for WPSS SSR notification 0x%lx\n",
  3980. priv->state);
  3981. schedule_work(&wpss_ssr_work);
  3982. }
  3983. #ifdef CONFIG_PM_SLEEP
  3984. static int icnss_pm_suspend(struct device *dev)
  3985. {
  3986. struct icnss_priv *priv = dev_get_drvdata(dev);
  3987. int ret = 0;
  3988. if (priv->magic != ICNSS_MAGIC) {
  3989. icnss_pr_err("Invalid drvdata for pm suspend: dev %pK, data %pK, magic 0x%x\n",
  3990. dev, priv, priv->magic);
  3991. return -EINVAL;
  3992. }
  3993. icnss_pr_vdbg("PM Suspend, state: 0x%lx\n", priv->state);
  3994. if (!priv->ops || !priv->ops->pm_suspend ||
  3995. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3996. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3997. return 0;
  3998. ret = priv->ops->pm_suspend(dev);
  3999. if (ret == 0) {
  4000. if (priv->device_id == WCN6750_DEVICE_ID ||
  4001. priv->device_id == WCN6450_DEVICE_ID) {
  4002. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  4003. !test_bit(ICNSS_MODE_ON, &priv->state))
  4004. return 0;
  4005. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  4006. ICNSS_SMP2P_OUT_POWER_SAVE);
  4007. }
  4008. priv->stats.pm_suspend++;
  4009. set_bit(ICNSS_PM_SUSPEND, &priv->state);
  4010. } else {
  4011. priv->stats.pm_suspend_err++;
  4012. }
  4013. return ret;
  4014. }
  4015. static int icnss_pm_resume(struct device *dev)
  4016. {
  4017. struct icnss_priv *priv = dev_get_drvdata(dev);
  4018. int ret = 0;
  4019. if (priv->magic != ICNSS_MAGIC) {
  4020. icnss_pr_err("Invalid drvdata for pm resume: dev %pK, data %pK, magic 0x%x\n",
  4021. dev, priv, priv->magic);
  4022. return -EINVAL;
  4023. }
  4024. icnss_pr_vdbg("PM resume, state: 0x%lx\n", priv->state);
  4025. if (!priv->ops || !priv->ops->pm_resume ||
  4026. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  4027. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4028. goto out;
  4029. ret = priv->ops->pm_resume(dev);
  4030. out:
  4031. if (ret == 0) {
  4032. priv->stats.pm_resume++;
  4033. clear_bit(ICNSS_PM_SUSPEND, &priv->state);
  4034. } else {
  4035. priv->stats.pm_resume_err++;
  4036. }
  4037. return ret;
  4038. }
  4039. static int icnss_pm_suspend_noirq(struct device *dev)
  4040. {
  4041. struct icnss_priv *priv = dev_get_drvdata(dev);
  4042. int ret = 0;
  4043. if (priv->magic != ICNSS_MAGIC) {
  4044. icnss_pr_err("Invalid drvdata for pm suspend_noirq: dev %pK, data %pK, magic 0x%x\n",
  4045. dev, priv, priv->magic);
  4046. return -EINVAL;
  4047. }
  4048. icnss_pr_vdbg("PM suspend_noirq, state: 0x%lx\n", priv->state);
  4049. if (!priv->ops || !priv->ops->suspend_noirq ||
  4050. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4051. goto out;
  4052. ret = priv->ops->suspend_noirq(dev);
  4053. out:
  4054. if (ret == 0) {
  4055. priv->stats.pm_suspend_noirq++;
  4056. set_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  4057. } else {
  4058. priv->stats.pm_suspend_noirq_err++;
  4059. }
  4060. return ret;
  4061. }
  4062. static int icnss_pm_resume_noirq(struct device *dev)
  4063. {
  4064. struct icnss_priv *priv = dev_get_drvdata(dev);
  4065. int ret = 0;
  4066. if (priv->magic != ICNSS_MAGIC) {
  4067. icnss_pr_err("Invalid drvdata for pm resume_noirq: dev %pK, data %pK, magic 0x%x\n",
  4068. dev, priv, priv->magic);
  4069. return -EINVAL;
  4070. }
  4071. icnss_pr_vdbg("PM resume_noirq, state: 0x%lx\n", priv->state);
  4072. if (!priv->ops || !priv->ops->resume_noirq ||
  4073. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4074. goto out;
  4075. ret = priv->ops->resume_noirq(dev);
  4076. out:
  4077. if (ret == 0) {
  4078. priv->stats.pm_resume_noirq++;
  4079. clear_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  4080. } else {
  4081. priv->stats.pm_resume_noirq_err++;
  4082. }
  4083. return ret;
  4084. }
  4085. static int icnss_pm_runtime_suspend(struct device *dev)
  4086. {
  4087. struct icnss_priv *priv = dev_get_drvdata(dev);
  4088. int ret = 0;
  4089. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  4090. icnss_pr_err("Ignore runtime suspend:\n");
  4091. goto out;
  4092. }
  4093. if (priv->magic != ICNSS_MAGIC) {
  4094. icnss_pr_err("Invalid drvdata for runtime suspend: dev %pK, data %pK, magic 0x%x\n",
  4095. dev, priv, priv->magic);
  4096. return -EINVAL;
  4097. }
  4098. if (!priv->ops || !priv->ops->runtime_suspend ||
  4099. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  4100. goto out;
  4101. icnss_pr_vdbg("Runtime suspend\n");
  4102. ret = priv->ops->runtime_suspend(dev);
  4103. if (!ret) {
  4104. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  4105. !test_bit(ICNSS_MODE_ON, &priv->state))
  4106. return 0;
  4107. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  4108. ICNSS_SMP2P_OUT_POWER_SAVE);
  4109. }
  4110. out:
  4111. return ret;
  4112. }
  4113. static int icnss_pm_runtime_resume(struct device *dev)
  4114. {
  4115. struct icnss_priv *priv = dev_get_drvdata(dev);
  4116. int ret = 0;
  4117. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  4118. icnss_pr_err("Ignore runtime resume\n");
  4119. goto out;
  4120. }
  4121. if (priv->magic != ICNSS_MAGIC) {
  4122. icnss_pr_err("Invalid drvdata for runtime resume: dev %pK, data %pK, magic 0x%x\n",
  4123. dev, priv, priv->magic);
  4124. return -EINVAL;
  4125. }
  4126. if (!priv->ops || !priv->ops->runtime_resume ||
  4127. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  4128. goto out;
  4129. icnss_pr_vdbg("Runtime resume, state: 0x%lx\n", priv->state);
  4130. ret = priv->ops->runtime_resume(dev);
  4131. out:
  4132. return ret;
  4133. }
  4134. static int icnss_pm_runtime_idle(struct device *dev)
  4135. {
  4136. struct icnss_priv *priv = dev_get_drvdata(dev);
  4137. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  4138. icnss_pr_err("Ignore runtime idle\n");
  4139. goto out;
  4140. }
  4141. icnss_pr_vdbg("Runtime idle\n");
  4142. pm_request_autosuspend(dev);
  4143. out:
  4144. return -EBUSY;
  4145. }
  4146. #endif
  4147. static const struct dev_pm_ops icnss_pm_ops = {
  4148. SET_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend,
  4149. icnss_pm_resume)
  4150. SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend_noirq,
  4151. icnss_pm_resume_noirq)
  4152. SET_RUNTIME_PM_OPS(icnss_pm_runtime_suspend, icnss_pm_runtime_resume,
  4153. icnss_pm_runtime_idle)
  4154. };
  4155. static struct platform_driver icnss_driver = {
  4156. .probe = icnss_probe,
  4157. .remove = icnss_remove,
  4158. .driver = {
  4159. .name = "icnss2",
  4160. .pm = &icnss_pm_ops,
  4161. .of_match_table = icnss_dt_match,
  4162. },
  4163. };
  4164. static int __init icnss_initialize(void)
  4165. {
  4166. icnss_debug_init();
  4167. return platform_driver_register(&icnss_driver);
  4168. }
  4169. static void __exit icnss_exit(void)
  4170. {
  4171. platform_driver_unregister(&icnss_driver);
  4172. icnss_debug_deinit();
  4173. }
  4174. module_init(icnss_initialize);
  4175. module_exit(icnss_exit);
  4176. MODULE_LICENSE("GPL v2");
  4177. MODULE_DESCRIPTION("iWCN CORE platform driver");