lpass-cdc.c 39 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /* Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
  3. */
  4. #include <linux/of_platform.h>
  5. #include <linux/module.h>
  6. #include <linux/io.h>
  7. #include <linux/init.h>
  8. #include <linux/platform_device.h>
  9. #include <linux/printk.h>
  10. #include <linux/delay.h>
  11. #include <linux/kernel.h>
  12. #include <linux/clk.h>
  13. #include <soc/snd_event.h>
  14. #include <linux/pm_runtime.h>
  15. #include <soc/swr-common.h>
  16. #include <dsp/digital-cdc-rsc-mgr.h>
  17. #include "lpass-cdc.h"
  18. #include "internal.h"
  19. #include "lpass-cdc-clk-rsc.h"
  20. #include <linux/qti-regmap-debugfs.h>
  21. #define DRV_NAME "lpass-cdc"
  22. #define LPASS_CDC_VERSION_ENTRY_SIZE 32
  23. #define LPASS_CDC_STRING_LEN 80
  24. static const struct snd_soc_component_driver lpass_cdc;
  25. /* pm runtime auto suspend timer in msecs */
  26. #define LPASS_CDC_AUTO_SUSPEND_DELAY 100 /* delay in msec */
  27. /* MCLK_MUX table for all macros */
  28. static u16 lpass_cdc_mclk_mux_tbl[MAX_MACRO][MCLK_MUX_MAX] = {
  29. {TX_MACRO, VA_MACRO},
  30. {TX_MACRO, RX_MACRO},
  31. {TX_MACRO, WSA_MACRO},
  32. {TX_MACRO, VA_MACRO},
  33. };
  34. static bool lpass_cdc_is_valid_codec_dev(struct device *dev);
  35. int lpass_cdc_set_port_map(struct snd_soc_component *component,
  36. u32 size, void *data)
  37. {
  38. struct lpass_cdc_priv *priv = NULL;
  39. struct swr_mstr_port_map *map = NULL;
  40. u16 idx;
  41. if (!component || (size == 0) || !data)
  42. return -EINVAL;
  43. priv = snd_soc_component_get_drvdata(component);
  44. if (!priv)
  45. return -EINVAL;
  46. if (!lpass_cdc_is_valid_codec_dev(priv->dev)) {
  47. dev_err(priv->dev, "%s: invalid codec\n", __func__);
  48. return -EINVAL;
  49. }
  50. map = (struct swr_mstr_port_map *)data;
  51. for (idx = 0; idx < size; idx++) {
  52. if (priv->macro_params[map->id].set_port_map)
  53. priv->macro_params[map->id].set_port_map(component,
  54. map->uc,
  55. SWR_MSTR_PORT_LEN,
  56. map->swr_port_params);
  57. map += 1;
  58. }
  59. return 0;
  60. }
  61. EXPORT_SYMBOL(lpass_cdc_set_port_map);
  62. static void lpass_cdc_ahb_write_device(char __iomem *io_base,
  63. u16 reg, u8 value)
  64. {
  65. u32 temp = (u32)(value) & 0x000000FF;
  66. iowrite32(temp, io_base + reg);
  67. }
  68. static void lpass_cdc_ahb_read_device(char __iomem *io_base,
  69. u16 reg, u8 *value)
  70. {
  71. u32 temp;
  72. temp = ioread32(io_base + reg);
  73. *value = (u8)temp;
  74. }
  75. static int __lpass_cdc_reg_read(struct lpass_cdc_priv *priv,
  76. u16 macro_id, u16 reg, u8 *val)
  77. {
  78. int ret = 0;
  79. mutex_lock(&priv->clk_lock);
  80. if (!priv->dev_up) {
  81. dev_dbg_ratelimited(priv->dev,
  82. "%s: SSR in progress, exit\n", __func__);
  83. ret = -EINVAL;
  84. goto ssr_err;
  85. }
  86. if (priv->macro_params[VA_MACRO].dev) {
  87. pm_runtime_get_sync(priv->macro_params[VA_MACRO].dev);
  88. if (!lpass_cdc_check_core_votes(priv->macro_params[VA_MACRO].dev))
  89. goto ssr_err;
  90. }
  91. lpass_cdc_ahb_read_device(
  92. priv->macro_params[macro_id].io_base, reg, val);
  93. if (priv->macro_params[VA_MACRO].dev) {
  94. pm_runtime_mark_last_busy(priv->macro_params[VA_MACRO].dev);
  95. pm_runtime_put_autosuspend(priv->macro_params[VA_MACRO].dev);
  96. }
  97. ssr_err:
  98. mutex_unlock(&priv->clk_lock);
  99. return ret;
  100. }
  101. static int __lpass_cdc_reg_write(struct lpass_cdc_priv *priv,
  102. u16 macro_id, u16 reg, u8 val)
  103. {
  104. int ret = 0;
  105. mutex_lock(&priv->clk_lock);
  106. if (!priv->dev_up) {
  107. dev_dbg_ratelimited(priv->dev,
  108. "%s: SSR in progress, exit\n", __func__);
  109. ret = -EINVAL;
  110. goto ssr_err;
  111. }
  112. if (priv->macro_params[VA_MACRO].dev) {
  113. pm_runtime_get_sync(priv->macro_params[VA_MACRO].dev);
  114. if (!lpass_cdc_check_core_votes(priv->macro_params[VA_MACRO].dev))
  115. goto ssr_err;
  116. }
  117. lpass_cdc_ahb_write_device(
  118. priv->macro_params[macro_id].io_base, reg, val);
  119. if (priv->macro_params[VA_MACRO].dev) {
  120. pm_runtime_mark_last_busy(priv->macro_params[VA_MACRO].dev);
  121. pm_runtime_put_autosuspend(priv->macro_params[VA_MACRO].dev);
  122. }
  123. ssr_err:
  124. mutex_unlock(&priv->clk_lock);
  125. return ret;
  126. }
  127. static int lpass_cdc_update_wcd_event(void *handle, u16 event, u32 data)
  128. {
  129. struct lpass_cdc_priv *priv = (struct lpass_cdc_priv *)handle;
  130. if (!priv) {
  131. pr_err("%s:Invalid lpass_cdc priv handle\n", __func__);
  132. return -EINVAL;
  133. }
  134. switch (event) {
  135. case WCD_LPASS_CDC_EVT_RX_MUTE:
  136. if (priv->macro_params[RX_MACRO].event_handler)
  137. priv->macro_params[RX_MACRO].event_handler(
  138. priv->component,
  139. LPASS_CDC_MACRO_EVT_RX_MUTE, data);
  140. break;
  141. case WCD_LPASS_CDC_EVT_IMPED_TRUE:
  142. if (priv->macro_params[RX_MACRO].event_handler)
  143. priv->macro_params[RX_MACRO].event_handler(
  144. priv->component,
  145. LPASS_CDC_MACRO_EVT_IMPED_TRUE, data);
  146. break;
  147. case WCD_LPASS_CDC_EVT_IMPED_FALSE:
  148. if (priv->macro_params[RX_MACRO].event_handler)
  149. priv->macro_params[RX_MACRO].event_handler(
  150. priv->component,
  151. LPASS_CDC_MACRO_EVT_IMPED_FALSE, data);
  152. break;
  153. case WCD_LPASS_CDC_EVT_RX_COMPANDER_SOFT_RST:
  154. if (priv->macro_params[RX_MACRO].event_handler)
  155. priv->macro_params[RX_MACRO].event_handler(
  156. priv->component,
  157. LPASS_CDC_MACRO_EVT_RX_COMPANDER_SOFT_RST, data);
  158. break;
  159. case WCD_LPASS_CDC_EVT_BCS_CLK_OFF:
  160. if (priv->macro_params[TX_MACRO].event_handler)
  161. priv->macro_params[TX_MACRO].event_handler(
  162. priv->component,
  163. LPASS_CDC_MACRO_EVT_BCS_CLK_OFF, data);
  164. break;
  165. case WCD_LPASS_CDC_EVT_RX_PA_GAIN_UPDATE:
  166. /* Update PA Gain only for lpass_cdc version 2.1 */
  167. if (priv->version == LPASS_CDC_VERSION_2_1)
  168. if (priv->macro_params[RX_MACRO].event_handler)
  169. priv->macro_params[RX_MACRO].event_handler(
  170. priv->component,
  171. LPASS_CDC_MACRO_EVT_RX_PA_GAIN_UPDATE,
  172. data);
  173. break;
  174. case WCD_LPASS_CDC_EVT_HPHL_HD2_ENABLE:
  175. if (priv->macro_params[RX_MACRO].event_handler)
  176. priv->macro_params[RX_MACRO].event_handler(
  177. priv->component,
  178. LPASS_CDC_MACRO_EVT_HPHL_HD2_ENABLE, data);
  179. break;
  180. case WCD_LPASS_CDC_EVT_HPHR_HD2_ENABLE:
  181. if (priv->macro_params[RX_MACRO].event_handler)
  182. priv->macro_params[RX_MACRO].event_handler(
  183. priv->component,
  184. LPASS_CDC_MACRO_EVT_HPHR_HD2_ENABLE, data);
  185. break;
  186. default:
  187. dev_err(priv->dev, "%s: Invalid event %d trigger from wcd\n",
  188. __func__, event);
  189. return -EINVAL;
  190. }
  191. return 0;
  192. }
  193. static int lpass_cdc_register_notifier(void *handle,
  194. struct notifier_block *nblock,
  195. bool enable)
  196. {
  197. struct lpass_cdc_priv *priv = (struct lpass_cdc_priv *)handle;
  198. if (!priv) {
  199. pr_err("%s: lpass_cdc priv is null\n", __func__);
  200. return -EINVAL;
  201. }
  202. if (enable)
  203. return blocking_notifier_chain_register(&priv->notifier,
  204. nblock);
  205. return blocking_notifier_chain_unregister(&priv->notifier,
  206. nblock);
  207. }
  208. static void lpass_cdc_notifier_call(struct lpass_cdc_priv *priv,
  209. u32 data)
  210. {
  211. dev_dbg(priv->dev, "%s: notifier call, data:%d\n", __func__, data);
  212. blocking_notifier_call_chain(&priv->notifier,
  213. data, (void *)priv->wcd_dev);
  214. }
  215. static bool lpass_cdc_is_valid_child_dev(struct device *dev)
  216. {
  217. if (of_device_is_compatible(dev->parent->of_node, "qcom,lpass-cdc"))
  218. return true;
  219. return false;
  220. }
  221. static bool lpass_cdc_is_valid_codec_dev(struct device *dev)
  222. {
  223. if (of_device_is_compatible(dev->of_node, "qcom,lpass-cdc"))
  224. return true;
  225. return false;
  226. }
  227. /**
  228. * lpass_cdc_clear_amic_tx_hold - clears AMIC register on analog codec
  229. *
  230. * @dev: lpass_cdc device ptr.
  231. *
  232. */
  233. void lpass_cdc_clear_amic_tx_hold(struct device *dev, u16 adc_n)
  234. {
  235. struct lpass_cdc_priv *priv;
  236. u16 event;
  237. u16 amic = 0;
  238. if (!dev) {
  239. pr_err("%s: dev is null\n", __func__);
  240. return;
  241. }
  242. if (!lpass_cdc_is_valid_codec_dev(dev)) {
  243. pr_err("%s: invalid codec\n", __func__);
  244. return;
  245. }
  246. priv = dev_get_drvdata(dev);
  247. if (!priv) {
  248. dev_err(dev, "%s: priv is null\n", __func__);
  249. return;
  250. }
  251. event = LPASS_CDC_WCD_EVT_TX_CH_HOLD_CLEAR;
  252. if (adc_n == LPASS_CDC_ADC0)
  253. amic = 0x1;
  254. else if (adc_n == LPASS_CDC_ADC1)
  255. amic = 0x2;
  256. else if (adc_n == LPASS_CDC_ADC2)
  257. amic = 0x2;
  258. else if (adc_n == LPASS_CDC_ADC3)
  259. amic = 0x3;
  260. else
  261. return;
  262. lpass_cdc_notifier_call(priv, (amic << 0x10 | event));
  263. }
  264. EXPORT_SYMBOL(lpass_cdc_clear_amic_tx_hold);
  265. /**
  266. * lpass_cdc_get_device_ptr - Get child or macro device ptr
  267. *
  268. * @dev: lpass_cdc device ptr.
  269. * @macro_id: ID of macro calling this API.
  270. *
  271. * Returns dev ptr on success or NULL on error.
  272. */
  273. struct device *lpass_cdc_get_device_ptr(struct device *dev, u16 macro_id)
  274. {
  275. struct lpass_cdc_priv *priv;
  276. if (!dev) {
  277. pr_err("%s: dev is null\n", __func__);
  278. return NULL;
  279. }
  280. if (!lpass_cdc_is_valid_codec_dev(dev)) {
  281. pr_err("%s: invalid codec\n", __func__);
  282. return NULL;
  283. }
  284. priv = dev_get_drvdata(dev);
  285. if (!priv || (macro_id >= MAX_MACRO)) {
  286. dev_err(dev, "%s: priv is null or invalid macro\n", __func__);
  287. return NULL;
  288. }
  289. return priv->macro_params[macro_id].dev;
  290. }
  291. EXPORT_SYMBOL(lpass_cdc_get_device_ptr);
  292. /**
  293. * lpass_cdc_get_rsc_clk_device_ptr - Get rsc clk device ptr
  294. *
  295. * @dev: lpass_cdc device ptr.
  296. *
  297. * Returns dev ptr on success or NULL on error.
  298. */
  299. struct device *lpass_cdc_get_rsc_clk_device_ptr(struct device *dev)
  300. {
  301. struct lpass_cdc_priv *priv;
  302. if (!dev) {
  303. pr_err("%s: dev is null\n", __func__);
  304. return NULL;
  305. }
  306. if (!lpass_cdc_is_valid_codec_dev(dev)) {
  307. pr_err("%s: invalid codec\n", __func__);
  308. return NULL;
  309. }
  310. priv = dev_get_drvdata(dev);
  311. if (!priv) {
  312. dev_err(dev, "%s: priv is null\n", __func__);
  313. return NULL;
  314. }
  315. return priv->clk_dev;
  316. }
  317. EXPORT_SYMBOL(lpass_cdc_get_rsc_clk_device_ptr);
  318. static int lpass_cdc_copy_dais_from_macro(struct lpass_cdc_priv *priv)
  319. {
  320. struct snd_soc_dai_driver *dai_ptr;
  321. u16 macro_idx;
  322. /* memcpy into lpass_cdc_dais all macro dais */
  323. if (!priv->lpass_cdc_dais)
  324. priv->lpass_cdc_dais = devm_kzalloc(priv->dev,
  325. priv->num_dais *
  326. sizeof(
  327. struct snd_soc_dai_driver),
  328. GFP_KERNEL);
  329. if (!priv->lpass_cdc_dais)
  330. return -ENOMEM;
  331. dai_ptr = priv->lpass_cdc_dais;
  332. for (macro_idx = START_MACRO; macro_idx < MAX_MACRO; macro_idx++) {
  333. if (priv->macro_params[macro_idx].dai_ptr) {
  334. memcpy(dai_ptr,
  335. priv->macro_params[macro_idx].dai_ptr,
  336. priv->macro_params[macro_idx].num_dais *
  337. sizeof(struct snd_soc_dai_driver));
  338. dai_ptr += priv->macro_params[macro_idx].num_dais;
  339. }
  340. }
  341. return 0;
  342. }
  343. /**
  344. * lpass_cdc_register_res_clk - Registers rsc clk driver to lpass_cdc
  345. *
  346. * @dev: rsc clk device ptr.
  347. * @rsc_clk_cb: event handler callback for notifications like SSR
  348. *
  349. * Returns 0 on success or -EINVAL on error.
  350. */
  351. int lpass_cdc_register_res_clk(struct device *dev, rsc_clk_cb_t rsc_clk_cb)
  352. {
  353. struct lpass_cdc_priv *priv;
  354. if (!dev || !rsc_clk_cb) {
  355. pr_err("%s: dev or rsc_clk_cb is null\n", __func__);
  356. return -EINVAL;
  357. }
  358. if (!lpass_cdc_is_valid_child_dev(dev)) {
  359. dev_err(dev, "%s: child device :%pK not added yet\n",
  360. __func__, dev);
  361. return -EINVAL;
  362. }
  363. priv = dev_get_drvdata(dev->parent);
  364. if (!priv) {
  365. dev_err(dev, "%s: priv is null\n", __func__);
  366. return -EINVAL;
  367. }
  368. priv->clk_dev = dev;
  369. priv->rsc_clk_cb = rsc_clk_cb;
  370. return 0;
  371. }
  372. EXPORT_SYMBOL(lpass_cdc_register_res_clk);
  373. /**
  374. * lpass_cdc_unregister_res_clk - Unregisters rsc clk driver from lpass_cdc
  375. *
  376. * @dev: resource clk device ptr.
  377. */
  378. void lpass_cdc_unregister_res_clk(struct device *dev)
  379. {
  380. struct lpass_cdc_priv *priv;
  381. if (!dev) {
  382. pr_err("%s: dev is NULL\n", __func__);
  383. return;
  384. }
  385. if (!lpass_cdc_is_valid_child_dev(dev)) {
  386. dev_err(dev, "%s: child device :%pK not added\n",
  387. __func__, dev);
  388. return;
  389. }
  390. priv = dev_get_drvdata(dev->parent);
  391. if (!priv) {
  392. dev_err(dev, "%s: priv is null\n", __func__);
  393. return;
  394. }
  395. priv->clk_dev = NULL;
  396. priv->rsc_clk_cb = NULL;
  397. }
  398. EXPORT_SYMBOL(lpass_cdc_unregister_res_clk);
  399. static u8 lpass_cdc_dmic_clk_div_get(struct snd_soc_component *component,
  400. int mode)
  401. {
  402. struct lpass_cdc_priv* priv = snd_soc_component_get_drvdata(component);
  403. int macro = (mode ? VA_MACRO : TX_MACRO);
  404. int ret = 0;
  405. if (priv->macro_params[macro].clk_div_get) {
  406. ret = priv->macro_params[macro].clk_div_get(component);
  407. if (ret > 0)
  408. return ret;
  409. }
  410. return 1;
  411. }
  412. int lpass_cdc_dmic_clk_enable(struct snd_soc_component *component,
  413. u32 dmic, u32 tx_mode, bool enable)
  414. {
  415. struct lpass_cdc_priv* priv = snd_soc_component_get_drvdata(component);
  416. u8 dmic_clk_en = 0x01;
  417. u16 dmic_clk_reg = 0;
  418. s32 *dmic_clk_cnt = NULL;
  419. u8 *dmic_clk_div = NULL;
  420. u8 freq_change_mask = 0;
  421. u8 clk_div = 0;
  422. dev_dbg(component->dev, "%s: enable: %d, tx_mode:%d, dmic: %d\n",
  423. __func__, enable, tx_mode, dmic);
  424. switch (dmic) {
  425. case 0:
  426. case 1:
  427. dmic_clk_cnt = &(priv->dmic_0_1_clk_cnt);
  428. dmic_clk_div = &(priv->dmic_0_1_clk_div);
  429. dmic_clk_reg = LPASS_CDC_VA_TOP_CSR_DMIC0_CTL;
  430. freq_change_mask = 0x01;
  431. break;
  432. case 2:
  433. case 3:
  434. dmic_clk_cnt = &(priv->dmic_2_3_clk_cnt);
  435. dmic_clk_div = &(priv->dmic_2_3_clk_div);
  436. dmic_clk_reg = LPASS_CDC_VA_TOP_CSR_DMIC1_CTL;
  437. freq_change_mask = 0x02;
  438. break;
  439. case 4:
  440. case 5:
  441. dmic_clk_cnt = &(priv->dmic_4_5_clk_cnt);
  442. dmic_clk_div = &(priv->dmic_4_5_clk_div);
  443. dmic_clk_reg = LPASS_CDC_VA_TOP_CSR_DMIC2_CTL;
  444. freq_change_mask = 0x04;
  445. break;
  446. case 6:
  447. case 7:
  448. dmic_clk_cnt = &(priv->dmic_6_7_clk_cnt);
  449. dmic_clk_div = &(priv->dmic_6_7_clk_div);
  450. dmic_clk_reg = LPASS_CDC_VA_TOP_CSR_DMIC3_CTL;
  451. freq_change_mask = 0x08;
  452. break;
  453. default:
  454. dev_err(component->dev, "%s: Invalid DMIC Selection\n",
  455. __func__);
  456. return -EINVAL;
  457. }
  458. dev_dbg(component->dev, "%s: DMIC%d dmic_clk_cnt %d\n",
  459. __func__, dmic, *dmic_clk_cnt);
  460. if (enable) {
  461. clk_div = lpass_cdc_dmic_clk_div_get(component, tx_mode);
  462. (*dmic_clk_cnt)++;
  463. if (*dmic_clk_cnt == 1) {
  464. snd_soc_component_update_bits(component,
  465. LPASS_CDC_VA_TOP_CSR_DMIC_CFG,
  466. 0x80, 0x00);
  467. snd_soc_component_update_bits(component, dmic_clk_reg,
  468. 0x0E, clk_div << 0x1);
  469. snd_soc_component_update_bits(component, dmic_clk_reg,
  470. dmic_clk_en, dmic_clk_en);
  471. } else {
  472. if (*dmic_clk_div > clk_div) {
  473. snd_soc_component_update_bits(component,
  474. LPASS_CDC_VA_TOP_CSR_DMIC_CFG,
  475. freq_change_mask, freq_change_mask);
  476. snd_soc_component_update_bits(component, dmic_clk_reg,
  477. 0x0E, clk_div << 0x1);
  478. snd_soc_component_update_bits(component,
  479. LPASS_CDC_VA_TOP_CSR_DMIC_CFG,
  480. freq_change_mask, 0x00);
  481. } else {
  482. clk_div = *dmic_clk_div;
  483. }
  484. }
  485. *dmic_clk_div = clk_div;
  486. } else {
  487. (*dmic_clk_cnt)--;
  488. if (*dmic_clk_cnt == 0) {
  489. snd_soc_component_update_bits(component, dmic_clk_reg,
  490. dmic_clk_en, 0);
  491. clk_div = 0;
  492. snd_soc_component_update_bits(component, dmic_clk_reg,
  493. 0x0E, clk_div << 0x1);
  494. } else {
  495. clk_div = lpass_cdc_dmic_clk_div_get(component, tx_mode);
  496. if (*dmic_clk_div > clk_div) {
  497. clk_div = lpass_cdc_dmic_clk_div_get(component, !tx_mode);
  498. snd_soc_component_update_bits(component,
  499. LPASS_CDC_VA_TOP_CSR_DMIC_CFG,
  500. freq_change_mask, freq_change_mask);
  501. snd_soc_component_update_bits(component, dmic_clk_reg,
  502. 0x0E, clk_div << 0x1);
  503. snd_soc_component_update_bits(component,
  504. LPASS_CDC_VA_TOP_CSR_DMIC_CFG,
  505. freq_change_mask, 0x00);
  506. } else {
  507. clk_div = *dmic_clk_div;
  508. }
  509. }
  510. *dmic_clk_div = clk_div;
  511. }
  512. return 0;
  513. }
  514. EXPORT_SYMBOL(lpass_cdc_dmic_clk_enable);
  515. bool lpass_cdc_is_va_macro_registered(struct device *dev)
  516. {
  517. struct lpass_cdc_priv *priv;
  518. if (!dev) {
  519. pr_err("%s: dev is null\n", __func__);
  520. return false;
  521. }
  522. if (!lpass_cdc_is_valid_child_dev(dev)) {
  523. dev_err(dev, "%s: child device calling is not added yet\n",
  524. __func__);
  525. return false;
  526. }
  527. priv = dev_get_drvdata(dev->parent);
  528. if (!priv) {
  529. dev_err(dev, "%s: priv is null\n", __func__);
  530. return false;
  531. }
  532. return priv->macros_supported[VA_MACRO];
  533. }
  534. EXPORT_SYMBOL(lpass_cdc_is_va_macro_registered);
  535. /**
  536. * lpass_cdc_register_macro - Registers macro to lpass_cdc
  537. *
  538. * @dev: macro device ptr.
  539. * @macro_id: ID of macro calling this API.
  540. * @ops: macro params to register.
  541. *
  542. * Returns 0 on success or -EINVAL on error.
  543. */
  544. int lpass_cdc_register_macro(struct device *dev, u16 macro_id,
  545. struct macro_ops *ops)
  546. {
  547. struct lpass_cdc_priv *priv;
  548. int ret = -EINVAL;
  549. if (!dev || !ops) {
  550. pr_err("%s: dev or ops is null\n", __func__);
  551. return -EINVAL;
  552. }
  553. if (!lpass_cdc_is_valid_child_dev(dev)) {
  554. dev_err(dev, "%s: child device for macro:%d not added yet\n",
  555. __func__, macro_id);
  556. return -EINVAL;
  557. }
  558. priv = dev_get_drvdata(dev->parent);
  559. if (!priv || (macro_id >= MAX_MACRO)) {
  560. dev_err(dev, "%s: priv is null or invalid macro\n", __func__);
  561. return -EINVAL;
  562. }
  563. priv->macro_params[macro_id].clk_id_req = ops->clk_id_req;
  564. priv->macro_params[macro_id].default_clk_id = ops->default_clk_id;
  565. priv->macro_params[macro_id].init = ops->init;
  566. priv->macro_params[macro_id].exit = ops->exit;
  567. priv->macro_params[macro_id].io_base = ops->io_base;
  568. priv->macro_params[macro_id].num_dais = ops->num_dais;
  569. priv->macro_params[macro_id].dai_ptr = ops->dai_ptr;
  570. priv->macro_params[macro_id].event_handler = ops->event_handler;
  571. priv->macro_params[macro_id].set_port_map = ops->set_port_map;
  572. priv->macro_params[macro_id].dev = dev;
  573. priv->current_mclk_mux_macro[macro_id] =
  574. lpass_cdc_mclk_mux_tbl[macro_id][MCLK_MUX0];
  575. if (macro_id == TX_MACRO) {
  576. priv->macro_params[macro_id].reg_wake_irq = ops->reg_wake_irq;
  577. priv->macro_params[macro_id].reg_evt_listener =
  578. ops->reg_evt_listener;
  579. priv->macro_params[macro_id].clk_enable = ops->clk_enable;
  580. }
  581. if (macro_id == TX_MACRO || macro_id == VA_MACRO)
  582. priv->macro_params[macro_id].clk_div_get = ops->clk_div_get;
  583. if (macro_id == VA_MACRO)
  584. priv->macro_params[macro_id].reg_wake_irq =
  585. ops->reg_wake_irq;
  586. priv->num_dais += ops->num_dais;
  587. priv->num_macros_registered++;
  588. priv->macros_supported[macro_id] = true;
  589. dev_info(dev, "%s: register macro successful:%d\n", __func__, macro_id);
  590. if (priv->num_macros_registered == priv->num_macros) {
  591. ret = lpass_cdc_copy_dais_from_macro(priv);
  592. if (ret < 0) {
  593. dev_err(dev, "%s: copy_dais failed\n", __func__);
  594. return ret;
  595. }
  596. if (priv->macros_supported[TX_MACRO] == false) {
  597. lpass_cdc_mclk_mux_tbl[WSA_MACRO][MCLK_MUX0] = WSA_MACRO;
  598. priv->current_mclk_mux_macro[WSA_MACRO] = WSA_MACRO;
  599. lpass_cdc_mclk_mux_tbl[VA_MACRO][MCLK_MUX0] = VA_MACRO;
  600. priv->current_mclk_mux_macro[VA_MACRO] = VA_MACRO;
  601. }
  602. ret = snd_soc_register_component(dev->parent, &lpass_cdc,
  603. priv->lpass_cdc_dais, priv->num_dais);
  604. if (ret < 0) {
  605. dev_err(dev, "%s: register codec failed\n", __func__);
  606. return ret;
  607. }
  608. }
  609. return 0;
  610. }
  611. EXPORT_SYMBOL(lpass_cdc_register_macro);
  612. /**
  613. * lpass_cdc_unregister_macro - De-Register macro from lpass_cdc
  614. *
  615. * @dev: macro device ptr.
  616. * @macro_id: ID of macro calling this API.
  617. *
  618. */
  619. void lpass_cdc_unregister_macro(struct device *dev, u16 macro_id)
  620. {
  621. struct lpass_cdc_priv *priv;
  622. if (!dev) {
  623. pr_err("%s: dev is null\n", __func__);
  624. return;
  625. }
  626. if (!lpass_cdc_is_valid_child_dev(dev)) {
  627. dev_err(dev, "%s: macro:%d not in valid registered macro-list\n",
  628. __func__, macro_id);
  629. return;
  630. }
  631. priv = dev_get_drvdata(dev->parent);
  632. if (!priv || (macro_id >= MAX_MACRO)) {
  633. dev_err(dev, "%s: priv is null or invalid macro\n", __func__);
  634. return;
  635. }
  636. priv->macro_params[macro_id].init = NULL;
  637. priv->macro_params[macro_id].num_dais = 0;
  638. priv->macro_params[macro_id].dai_ptr = NULL;
  639. priv->macro_params[macro_id].event_handler = NULL;
  640. priv->macro_params[macro_id].dev = NULL;
  641. if (macro_id == TX_MACRO) {
  642. priv->macro_params[macro_id].reg_wake_irq = NULL;
  643. priv->macro_params[macro_id].reg_evt_listener = NULL;
  644. priv->macro_params[macro_id].clk_enable = NULL;
  645. }
  646. if (macro_id == TX_MACRO || macro_id == VA_MACRO)
  647. priv->macro_params[macro_id].clk_div_get = NULL;
  648. priv->num_dais -= priv->macro_params[macro_id].num_dais;
  649. priv->num_macros_registered--;
  650. /* UNREGISTER CODEC HERE */
  651. if (priv->num_macros - 1 == priv->num_macros_registered)
  652. snd_soc_unregister_component(dev->parent);
  653. }
  654. EXPORT_SYMBOL(lpass_cdc_unregister_macro);
  655. void lpass_cdc_wsa_pa_on(struct device *dev, bool adie_lb)
  656. {
  657. struct lpass_cdc_priv *priv;
  658. if (!dev) {
  659. pr_err("%s: dev is null\n", __func__);
  660. return;
  661. }
  662. if (!lpass_cdc_is_valid_child_dev(dev)) {
  663. dev_err(dev, "%s: not a valid child dev\n",
  664. __func__);
  665. return;
  666. }
  667. priv = dev_get_drvdata(dev->parent);
  668. if (!priv) {
  669. dev_err(dev, "%s: priv is null\n", __func__);
  670. return;
  671. }
  672. if (adie_lb)
  673. lpass_cdc_notifier_call(priv,
  674. LPASS_CDC_WCD_EVT_PA_ON_POST_FSCLK_ADIE_LB);
  675. else
  676. lpass_cdc_notifier_call(priv,
  677. LPASS_CDC_WCD_EVT_PA_ON_POST_FSCLK);
  678. }
  679. EXPORT_SYMBOL(lpass_cdc_wsa_pa_on);
  680. int lpass_cdc_get_version(struct device *dev)
  681. {
  682. struct lpass_cdc_priv *priv;
  683. if (!dev) {
  684. pr_err("%s: dev is null\n", __func__);
  685. return -EINVAL;
  686. }
  687. if (!lpass_cdc_is_valid_child_dev(dev)) {
  688. dev_err(dev, "%s: child device for macro not added yet\n",
  689. __func__);
  690. return -EINVAL;
  691. }
  692. priv = dev_get_drvdata(dev->parent);
  693. if (!priv) {
  694. dev_err(dev, "%s: priv is null\n", __func__);
  695. return -EINVAL;
  696. }
  697. return priv->version;
  698. }
  699. EXPORT_SYMBOL(lpass_cdc_get_version);
  700. static ssize_t lpass_cdc_version_read(struct snd_info_entry *entry,
  701. void *file_private_data,
  702. struct file *file,
  703. char __user *buf, size_t count,
  704. loff_t pos)
  705. {
  706. struct lpass_cdc_priv *priv;
  707. char buffer[LPASS_CDC_VERSION_ENTRY_SIZE];
  708. int len = 0;
  709. priv = (struct lpass_cdc_priv *) entry->private_data;
  710. if (!priv) {
  711. pr_err("%s: lpass_cdc priv is null\n", __func__);
  712. return -EINVAL;
  713. }
  714. switch (priv->version) {
  715. case LPASS_CDC_VERSION_1_0:
  716. len = snprintf(buffer, sizeof(buffer), "LPASS-CDC_1_0\n");
  717. break;
  718. case LPASS_CDC_VERSION_1_1:
  719. len = snprintf(buffer, sizeof(buffer), "LPASS-CDC_1_1\n");
  720. break;
  721. case LPASS_CDC_VERSION_1_2:
  722. len = snprintf(buffer, sizeof(buffer), "LPASS-CDC_1_2\n");
  723. break;
  724. case LPASS_CDC_VERSION_2_1:
  725. len = snprintf(buffer, sizeof(buffer), "LPASS-CDC_2_1\n");
  726. break;
  727. case LPASS_CDC_VERSION_2_5:
  728. len = snprintf(buffer, sizeof(buffer), "LPASS-CDC_2_5\n");
  729. break;
  730. default:
  731. len = snprintf(buffer, sizeof(buffer), "VER_UNDEFINED\n");
  732. }
  733. return simple_read_from_buffer(buf, count, &pos, buffer, len);
  734. }
  735. static int lpass_cdc_ssr_enable(struct device *dev, void *data)
  736. {
  737. struct lpass_cdc_priv *priv = data;
  738. int macro_idx;
  739. if (priv->initial_boot) {
  740. priv->initial_boot = false;
  741. return 0;
  742. }
  743. if (priv->rsc_clk_cb)
  744. priv->rsc_clk_cb(priv->clk_dev, LPASS_CDC_MACRO_EVT_SSR_UP);
  745. for (macro_idx = START_MACRO; macro_idx < MAX_MACRO; macro_idx++) {
  746. if (priv->macro_params[macro_idx].event_handler)
  747. priv->macro_params[macro_idx].event_handler(
  748. priv->component,
  749. LPASS_CDC_MACRO_EVT_CLK_RESET, 0x0);
  750. }
  751. trace_printk("%s: clk count reset\n", __func__);
  752. if (priv->rsc_clk_cb)
  753. priv->rsc_clk_cb(priv->clk_dev, LPASS_CDC_MACRO_EVT_SSR_GFMUX_UP);
  754. for (macro_idx = START_MACRO; macro_idx < MAX_MACRO; macro_idx++) {
  755. if (!priv->macro_params[macro_idx].event_handler)
  756. continue;
  757. priv->macro_params[macro_idx].event_handler(
  758. priv->component,
  759. LPASS_CDC_MACRO_EVT_PRE_SSR_UP, 0x0);
  760. }
  761. regcache_cache_only(priv->regmap, false);
  762. mutex_lock(&priv->clk_lock);
  763. priv->dev_up = true;
  764. mutex_unlock(&priv->clk_lock);
  765. regcache_mark_dirty(priv->regmap);
  766. lpass_cdc_clk_rsc_enable_all_clocks(priv->clk_dev, true);
  767. regcache_sync(priv->regmap);
  768. /* Add a 100usec sleep to ensure last register write is done */
  769. usleep_range(100,110);
  770. lpass_cdc_clk_rsc_enable_all_clocks(priv->clk_dev, false);
  771. trace_printk("%s: regcache_sync done\n", __func__);
  772. /* call ssr event for supported macros */
  773. for (macro_idx = START_MACRO; macro_idx < MAX_MACRO; macro_idx++) {
  774. if (!priv->macro_params[macro_idx].event_handler)
  775. continue;
  776. priv->macro_params[macro_idx].event_handler(
  777. priv->component,
  778. LPASS_CDC_MACRO_EVT_SSR_UP, 0x0);
  779. }
  780. trace_printk("%s: SSR up events processed by all macros\n", __func__);
  781. lpass_cdc_notifier_call(priv, LPASS_CDC_WCD_EVT_SSR_UP);
  782. return 0;
  783. }
  784. static void lpass_cdc_ssr_disable(struct device *dev, void *data)
  785. {
  786. struct lpass_cdc_priv *priv = data;
  787. int macro_idx;
  788. if (!priv->dev_up) {
  789. dev_err_ratelimited(priv->dev,
  790. "%s: already disabled\n", __func__);
  791. return;
  792. }
  793. lpass_cdc_notifier_call(priv, LPASS_CDC_WCD_EVT_PA_OFF_PRE_SSR);
  794. regcache_cache_only(priv->regmap, true);
  795. mutex_lock(&priv->clk_lock);
  796. priv->dev_up = false;
  797. mutex_unlock(&priv->clk_lock);
  798. if (priv->rsc_clk_cb)
  799. priv->rsc_clk_cb(priv->clk_dev, LPASS_CDC_MACRO_EVT_SSR_DOWN);
  800. /* call ssr event for supported macros */
  801. for (macro_idx = START_MACRO; macro_idx < MAX_MACRO; macro_idx++) {
  802. if (!priv->macro_params[macro_idx].event_handler)
  803. continue;
  804. priv->macro_params[macro_idx].event_handler(
  805. priv->component,
  806. LPASS_CDC_MACRO_EVT_SSR_DOWN, 0x0);
  807. }
  808. lpass_cdc_notifier_call(priv, LPASS_CDC_WCD_EVT_SSR_DOWN);
  809. }
  810. static struct snd_info_entry_ops lpass_cdc_info_ops = {
  811. .read = lpass_cdc_version_read,
  812. };
  813. static const struct snd_event_ops lpass_cdc_ssr_ops = {
  814. .enable = lpass_cdc_ssr_enable,
  815. .disable = lpass_cdc_ssr_disable,
  816. };
  817. /*
  818. * lpass_cdc_info_create_codec_entry - creates lpass_cdc module
  819. * @codec_root: The parent directory
  820. * @component: Codec component instance
  821. *
  822. * Creates lpass_cdc module and version entry under the given
  823. * parent directory.
  824. *
  825. * Return: 0 on success or negative error code on failure.
  826. */
  827. int lpass_cdc_info_create_codec_entry(struct snd_info_entry *codec_root,
  828. struct snd_soc_component *component)
  829. {
  830. struct snd_info_entry *version_entry;
  831. struct lpass_cdc_priv *priv;
  832. struct snd_soc_card *card;
  833. if (!codec_root || !component)
  834. return -EINVAL;
  835. priv = snd_soc_component_get_drvdata(component);
  836. if (priv->entry) {
  837. dev_dbg(priv->dev,
  838. "%s:lpass_cdc module already created\n", __func__);
  839. return 0;
  840. }
  841. card = component->card;
  842. priv->entry = snd_info_create_module_entry(codec_root->module,
  843. "lpass-cdc", codec_root);
  844. if (!priv->entry) {
  845. dev_dbg(component->dev, "%s: failed to create lpass_cdc entry\n",
  846. __func__);
  847. return -ENOMEM;
  848. }
  849. priv->entry->mode = S_IFDIR | 0555;
  850. if (snd_info_register(priv->entry) < 0) {
  851. snd_info_free_entry(priv->entry);
  852. return -ENOMEM;
  853. }
  854. version_entry = snd_info_create_card_entry(card->snd_card,
  855. "version",
  856. priv->entry);
  857. if (!version_entry) {
  858. dev_err(component->dev, "%s: failed to create lpass_cdc version entry\n",
  859. __func__);
  860. snd_info_free_entry(priv->entry);
  861. return -ENOMEM;
  862. }
  863. version_entry->private_data = priv;
  864. version_entry->size = LPASS_CDC_VERSION_ENTRY_SIZE;
  865. version_entry->content = SNDRV_INFO_CONTENT_DATA;
  866. version_entry->c.ops = &lpass_cdc_info_ops;
  867. if (snd_info_register(version_entry) < 0) {
  868. snd_info_free_entry(version_entry);
  869. snd_info_free_entry(priv->entry);
  870. return -ENOMEM;
  871. }
  872. priv->version_entry = version_entry;
  873. return 0;
  874. }
  875. EXPORT_SYMBOL(lpass_cdc_info_create_codec_entry);
  876. /**
  877. * lpass_cdc_register_wake_irq - Register wake irq of Tx macro
  878. *
  879. * @component: codec component ptr.
  880. * @ipc_wakeup: bool to identify ipc_wakeup to be used or HW interrupt line.
  881. *
  882. * Return: 0 on success or negative error code on failure.
  883. */
  884. int lpass_cdc_register_wake_irq(struct snd_soc_component *component,
  885. u32 ipc_wakeup)
  886. {
  887. struct lpass_cdc_priv *priv = NULL;
  888. if (!component)
  889. return -EINVAL;
  890. priv = snd_soc_component_get_drvdata(component);
  891. if (!priv)
  892. return -EINVAL;
  893. if (!lpass_cdc_is_valid_codec_dev(priv->dev)) {
  894. dev_err(component->dev, "%s: invalid codec\n", __func__);
  895. return -EINVAL;
  896. }
  897. if (priv->macro_params[VA_MACRO].reg_wake_irq)
  898. priv->macro_params[VA_MACRO].reg_wake_irq(
  899. component, ipc_wakeup);
  900. return 0;
  901. }
  902. EXPORT_SYMBOL(lpass_cdc_register_wake_irq);
  903. /**
  904. * lpass_cdc_tx_mclk_enable - Enable/Disable TX Macro mclk
  905. *
  906. * @component: pointer to codec component instance.
  907. * @enable: set true to enable, otherwise false.
  908. *
  909. * Returns 0 on success or -EINVAL on error.
  910. */
  911. int lpass_cdc_tx_mclk_enable(struct snd_soc_component *component,
  912. bool enable)
  913. {
  914. struct lpass_cdc_priv *priv = NULL;
  915. int ret = 0;
  916. if (!component)
  917. return -EINVAL;
  918. priv = snd_soc_component_get_drvdata(component);
  919. if (!priv)
  920. return -EINVAL;
  921. if (!lpass_cdc_is_valid_codec_dev(priv->dev)) {
  922. dev_err(component->dev, "%s: invalid codec\n", __func__);
  923. return -EINVAL;
  924. }
  925. if (priv->macro_params[TX_MACRO].clk_enable)
  926. ret = priv->macro_params[TX_MACRO].clk_enable(component,
  927. enable);
  928. return ret;
  929. }
  930. EXPORT_SYMBOL(lpass_cdc_tx_mclk_enable);
  931. /**
  932. * lpass_cdc_register_event_listener - Register/Deregister to event listener
  933. *
  934. * @component: pointer to codec component instance.
  935. * @enable: when set to 1 registers to event listener otherwise, derigisters
  936. * from the event listener
  937. *
  938. * Returns 0 on success or -EINVAL on error.
  939. */
  940. int lpass_cdc_register_event_listener(struct snd_soc_component *component,
  941. bool enable)
  942. {
  943. struct lpass_cdc_priv *priv = NULL;
  944. int ret = 0;
  945. if (!component)
  946. return -EINVAL;
  947. priv = snd_soc_component_get_drvdata(component);
  948. if (!priv)
  949. return -EINVAL;
  950. if (!lpass_cdc_is_valid_codec_dev(priv->dev)) {
  951. dev_err(component->dev, "%s: invalid codec\n", __func__);
  952. return -EINVAL;
  953. }
  954. if (priv->macro_params[TX_MACRO].reg_evt_listener)
  955. ret = priv->macro_params[TX_MACRO].reg_evt_listener(component,
  956. enable);
  957. return ret;
  958. }
  959. EXPORT_SYMBOL(lpass_cdc_register_event_listener);
  960. static int lpass_cdc_soc_codec_probe(struct snd_soc_component *component)
  961. {
  962. struct lpass_cdc_priv *priv = dev_get_drvdata(component->dev);
  963. int macro_idx, ret = 0;
  964. u8 core_id_0 = 0, core_id_1 = 0;
  965. snd_soc_component_init_regmap(component, priv->regmap);
  966. if (!priv->version) {
  967. /*
  968. * In order for the ADIE RTC to differentiate between targets
  969. * version info is used.
  970. * Assign 1.0 for target with only one macro
  971. * Assign 1.1 for target with two macros
  972. * Assign 1.2 for target with more than two macros
  973. */
  974. if (priv->num_macros_registered == 1)
  975. priv->version = LPASS_CDC_VERSION_1_0;
  976. else if (priv->num_macros_registered == 2)
  977. priv->version = LPASS_CDC_VERSION_1_1;
  978. else if (priv->num_macros_registered > 2)
  979. priv->version = LPASS_CDC_VERSION_1_2;
  980. }
  981. /* Assign lpass_cdc version */
  982. core_id_0 = snd_soc_component_read(component,
  983. LPASS_CDC_VA_TOP_CSR_CORE_ID_0);
  984. core_id_1 = snd_soc_component_read(component,
  985. LPASS_CDC_VA_TOP_CSR_CORE_ID_1);
  986. if ((core_id_0 == 0x01) && (core_id_1 == 0x0F))
  987. priv->version = LPASS_CDC_VERSION_2_0;
  988. if ((core_id_0 == 0x02) && (core_id_1 == 0x0E))
  989. priv->version = LPASS_CDC_VERSION_2_1;
  990. if ((core_id_0 == 0x02) && (core_id_1 == 0x0F))
  991. priv->version = LPASS_CDC_VERSION_2_5;
  992. /* call init for supported macros */
  993. for (macro_idx = START_MACRO; macro_idx < MAX_MACRO; macro_idx++) {
  994. if (priv->macro_params[macro_idx].init) {
  995. ret = priv->macro_params[macro_idx].init(component);
  996. if (ret < 0) {
  997. dev_err(component->dev,
  998. "%s: init for macro %d failed\n",
  999. __func__, macro_idx);
  1000. goto err;
  1001. }
  1002. }
  1003. }
  1004. priv->component = component;
  1005. ret = snd_event_client_register(priv->dev, &lpass_cdc_ssr_ops, priv);
  1006. if (!ret) {
  1007. snd_event_notify(priv->dev, SND_EVENT_UP);
  1008. } else {
  1009. dev_err(component->dev,
  1010. "%s: Registration with SND event FWK failed ret = %d\n",
  1011. __func__, ret);
  1012. goto err;
  1013. }
  1014. dev_dbg(component->dev, "%s: lpass_cdc soc codec probe success\n",
  1015. __func__);
  1016. err:
  1017. return ret;
  1018. }
  1019. static void lpass_cdc_soc_codec_remove(struct snd_soc_component *component)
  1020. {
  1021. struct lpass_cdc_priv *priv = dev_get_drvdata(component->dev);
  1022. int macro_idx;
  1023. snd_event_client_deregister(priv->dev);
  1024. /* call exit for supported macros */
  1025. for (macro_idx = START_MACRO; macro_idx < MAX_MACRO; macro_idx++)
  1026. if (priv->macro_params[macro_idx].exit)
  1027. priv->macro_params[macro_idx].exit(component);
  1028. return;
  1029. }
  1030. static const struct snd_soc_component_driver lpass_cdc = {
  1031. .name = DRV_NAME,
  1032. .probe = lpass_cdc_soc_codec_probe,
  1033. .remove = lpass_cdc_soc_codec_remove,
  1034. };
  1035. static void lpass_cdc_add_child_devices(struct work_struct *work)
  1036. {
  1037. struct lpass_cdc_priv *priv;
  1038. bool split_codec = false;
  1039. struct platform_device *pdev;
  1040. struct device_node *node;
  1041. int ret = 0, count = 0;
  1042. struct wcd_ctrl_platform_data *platdata = NULL;
  1043. char plat_dev_name[LPASS_CDC_STRING_LEN] = "";
  1044. priv = container_of(work, struct lpass_cdc_priv,
  1045. lpass_cdc_add_child_devices_work);
  1046. if (!priv) {
  1047. pr_err("%s: Memory for lpass_cdc priv does not exist\n",
  1048. __func__);
  1049. return;
  1050. }
  1051. if (!priv->dev || !priv->dev->of_node) {
  1052. dev_err(priv->dev, "%s: DT node for lpass_cdc does not exist\n",
  1053. __func__);
  1054. return;
  1055. }
  1056. platdata = &priv->plat_data;
  1057. priv->child_count = 0;
  1058. for_each_available_child_of_node(priv->dev->of_node, node) {
  1059. split_codec = false;
  1060. if (of_find_property(node, "qcom,split-codec", NULL)) {
  1061. split_codec = true;
  1062. dev_dbg(priv->dev, "%s: split codec slave exists\n",
  1063. __func__);
  1064. }
  1065. strlcpy(plat_dev_name, node->name,
  1066. (LPASS_CDC_STRING_LEN - 1));
  1067. pdev = platform_device_alloc(plat_dev_name, -1);
  1068. if (!pdev) {
  1069. dev_err(priv->dev, "%s: pdev memory alloc failed\n",
  1070. __func__);
  1071. ret = -ENOMEM;
  1072. goto err;
  1073. }
  1074. pdev->dev.parent = priv->dev;
  1075. pdev->dev.of_node = node;
  1076. priv->dev->platform_data = platdata;
  1077. if (split_codec)
  1078. priv->wcd_dev = &pdev->dev;
  1079. ret = platform_device_add(pdev);
  1080. if (ret) {
  1081. dev_err(&pdev->dev,
  1082. "%s: Cannot add platform device\n",
  1083. __func__);
  1084. platform_device_put(pdev);
  1085. goto fail_pdev_add;
  1086. }
  1087. if (priv->child_count < LPASS_CDC_CHILD_DEVICES_MAX)
  1088. priv->pdev_child_devices[priv->child_count++] = pdev;
  1089. else
  1090. goto err;
  1091. }
  1092. return;
  1093. fail_pdev_add:
  1094. for (count = 0; count < priv->child_count; count++)
  1095. platform_device_put(priv->pdev_child_devices[count]);
  1096. err:
  1097. return;
  1098. }
  1099. static int lpass_cdc_probe(struct platform_device *pdev)
  1100. {
  1101. struct lpass_cdc_priv *priv;
  1102. u32 num_macros = 0;
  1103. int ret;
  1104. struct clk *lpass_core_hw_vote = NULL;
  1105. struct clk *lpass_audio_hw_vote = NULL;
  1106. priv = devm_kzalloc(&pdev->dev, sizeof(struct lpass_cdc_priv),
  1107. GFP_KERNEL);
  1108. if (!priv)
  1109. return -ENOMEM;
  1110. ret = of_property_read_u32(pdev->dev.of_node, "qcom,num-macros",
  1111. &num_macros);
  1112. if (ret) {
  1113. dev_err(&pdev->dev,
  1114. "%s:num-macros property not found\n",
  1115. __func__);
  1116. return ret;
  1117. }
  1118. priv->num_macros = num_macros;
  1119. if (priv->num_macros > MAX_MACRO) {
  1120. dev_err(&pdev->dev,
  1121. "%s:num_macros(%d) > MAX_MACRO(%d) than supported\n",
  1122. __func__, priv->num_macros, MAX_MACRO);
  1123. return -EINVAL;
  1124. }
  1125. ret = of_property_read_u32(pdev->dev.of_node,
  1126. "qcom,lpass-cdc-version", &priv->version);
  1127. if (ret) {
  1128. dev_dbg(&pdev->dev, "%s:lpass_cdc version not specified\n",
  1129. __func__);
  1130. ret = 0;
  1131. }
  1132. BLOCKING_INIT_NOTIFIER_HEAD(&priv->notifier);
  1133. priv->dev = &pdev->dev;
  1134. priv->dev_up = true;
  1135. priv->initial_boot = true;
  1136. priv->regmap = lpass_cdc_regmap_init(priv->dev,
  1137. &lpass_cdc_regmap_config);
  1138. if (IS_ERR_OR_NULL((void *)(priv->regmap))) {
  1139. dev_err(&pdev->dev, "%s:regmap init failed\n", __func__);
  1140. return -EINVAL;
  1141. }
  1142. devm_regmap_qti_debugfs_register(priv->dev, priv->regmap);
  1143. priv->read_dev = __lpass_cdc_reg_read;
  1144. priv->write_dev = __lpass_cdc_reg_write;
  1145. priv->plat_data.handle = (void *) priv;
  1146. priv->plat_data.update_wcd_event = lpass_cdc_update_wcd_event;
  1147. priv->plat_data.register_notifier = lpass_cdc_register_notifier;
  1148. priv->core_hw_vote_count = 0;
  1149. priv->core_audio_vote_count = 0;
  1150. dev_set_drvdata(&pdev->dev, priv);
  1151. mutex_init(&priv->io_lock);
  1152. mutex_init(&priv->clk_lock);
  1153. mutex_init(&priv->vote_lock);
  1154. INIT_WORK(&priv->lpass_cdc_add_child_devices_work,
  1155. lpass_cdc_add_child_devices);
  1156. /* Register LPASS core hw vote */
  1157. lpass_core_hw_vote = devm_clk_get(&pdev->dev, "lpass_core_hw_vote");
  1158. if (IS_ERR(lpass_core_hw_vote)) {
  1159. ret = PTR_ERR(lpass_core_hw_vote);
  1160. dev_dbg(&pdev->dev, "%s: clk get %s failed %d\n",
  1161. __func__, "lpass_core_hw_vote", ret);
  1162. lpass_core_hw_vote = NULL;
  1163. ret = 0;
  1164. }
  1165. priv->lpass_core_hw_vote = lpass_core_hw_vote;
  1166. /* Register LPASS audio hw vote */
  1167. lpass_audio_hw_vote = devm_clk_get(&pdev->dev, "lpass_audio_hw_vote");
  1168. if (IS_ERR(lpass_audio_hw_vote)) {
  1169. ret = PTR_ERR(lpass_audio_hw_vote);
  1170. dev_dbg(&pdev->dev, "%s: clk get %s failed %d\n",
  1171. __func__, "lpass_audio_hw_vote", ret);
  1172. lpass_audio_hw_vote = NULL;
  1173. ret = 0;
  1174. }
  1175. priv->lpass_audio_hw_vote = lpass_audio_hw_vote;
  1176. schedule_work(&priv->lpass_cdc_add_child_devices_work);
  1177. return 0;
  1178. }
  1179. static int lpass_cdc_remove(struct platform_device *pdev)
  1180. {
  1181. struct lpass_cdc_priv *priv = dev_get_drvdata(&pdev->dev);
  1182. if (!priv)
  1183. return -EINVAL;
  1184. of_platform_depopulate(&pdev->dev);
  1185. mutex_destroy(&priv->io_lock);
  1186. mutex_destroy(&priv->clk_lock);
  1187. mutex_destroy(&priv->vote_lock);
  1188. return 0;
  1189. }
  1190. #ifdef CONFIG_PM
  1191. int lpass_cdc_runtime_resume(struct device *dev)
  1192. {
  1193. struct lpass_cdc_priv *priv = dev_get_drvdata(dev->parent);
  1194. int ret = 0;
  1195. mutex_lock(&priv->vote_lock);
  1196. if (priv->lpass_core_hw_vote == NULL) {
  1197. dev_dbg(dev, "%s: Invalid lpass core hw node\n", __func__);
  1198. goto audio_vote;
  1199. }
  1200. if (priv->core_hw_vote_count == 0) {
  1201. ret = digital_cdc_rsc_mgr_hw_vote_enable(priv->lpass_core_hw_vote);
  1202. if (ret < 0) {
  1203. dev_err(dev, "%s:lpass core hw enable failed\n",
  1204. __func__);
  1205. goto audio_vote;
  1206. }
  1207. }
  1208. priv->core_hw_vote_count++;
  1209. trace_printk("%s: hw vote count %d\n",
  1210. __func__, priv->core_hw_vote_count);
  1211. audio_vote:
  1212. if (priv->lpass_audio_hw_vote == NULL) {
  1213. dev_dbg(dev, "%s: Invalid lpass audio hw node\n", __func__);
  1214. goto done;
  1215. }
  1216. if (priv->core_audio_vote_count == 0) {
  1217. ret = digital_cdc_rsc_mgr_hw_vote_enable(priv->lpass_audio_hw_vote);
  1218. if (ret < 0) {
  1219. dev_err(dev, "%s:lpass audio hw enable failed\n",
  1220. __func__);
  1221. goto done;
  1222. }
  1223. }
  1224. priv->core_audio_vote_count++;
  1225. trace_printk("%s: audio vote count %d\n",
  1226. __func__, priv->core_audio_vote_count);
  1227. done:
  1228. mutex_unlock(&priv->vote_lock);
  1229. pm_runtime_set_autosuspend_delay(priv->dev, LPASS_CDC_AUTO_SUSPEND_DELAY);
  1230. return 0;
  1231. }
  1232. EXPORT_SYMBOL(lpass_cdc_runtime_resume);
  1233. int lpass_cdc_runtime_suspend(struct device *dev)
  1234. {
  1235. struct lpass_cdc_priv *priv = dev_get_drvdata(dev->parent);
  1236. mutex_lock(&priv->vote_lock);
  1237. if (priv->lpass_core_hw_vote != NULL) {
  1238. if (--priv->core_hw_vote_count == 0)
  1239. digital_cdc_rsc_mgr_hw_vote_disable(
  1240. priv->lpass_core_hw_vote);
  1241. if (priv->core_hw_vote_count < 0)
  1242. priv->core_hw_vote_count = 0;
  1243. } else {
  1244. dev_dbg(dev, "%s: Invalid lpass core hw node\n",
  1245. __func__);
  1246. }
  1247. trace_printk("%s: hw vote count %d\n",
  1248. __func__, priv->core_hw_vote_count);
  1249. if (priv->lpass_audio_hw_vote != NULL) {
  1250. if (--priv->core_audio_vote_count == 0)
  1251. digital_cdc_rsc_mgr_hw_vote_disable(
  1252. priv->lpass_audio_hw_vote);
  1253. if (priv->core_audio_vote_count < 0)
  1254. priv->core_audio_vote_count = 0;
  1255. } else {
  1256. dev_dbg(dev, "%s: Invalid lpass audio hw node\n",
  1257. __func__);
  1258. }
  1259. trace_printk("%s: audio vote count %d\n",
  1260. __func__, priv->core_audio_vote_count);
  1261. mutex_unlock(&priv->vote_lock);
  1262. return 0;
  1263. }
  1264. EXPORT_SYMBOL(lpass_cdc_runtime_suspend);
  1265. #endif /* CONFIG_PM */
  1266. bool lpass_cdc_check_core_votes(struct device *dev)
  1267. {
  1268. struct lpass_cdc_priv *priv = dev_get_drvdata(dev->parent);
  1269. bool ret = true;
  1270. mutex_lock(&priv->vote_lock);
  1271. if ((priv->lpass_core_hw_vote && !priv->core_hw_vote_count) ||
  1272. (priv->lpass_audio_hw_vote && !priv->core_audio_vote_count))
  1273. ret = false;
  1274. mutex_unlock(&priv->vote_lock);
  1275. return ret;
  1276. }
  1277. EXPORT_SYMBOL(lpass_cdc_check_core_votes);
  1278. static const struct of_device_id lpass_cdc_dt_match[] = {
  1279. {.compatible = "qcom,lpass-cdc"},
  1280. {}
  1281. };
  1282. MODULE_DEVICE_TABLE(of, lpass_cdc_dt_match);
  1283. static struct platform_driver lpass_cdc_drv = {
  1284. .driver = {
  1285. .name = "lpass-cdc",
  1286. .owner = THIS_MODULE,
  1287. .of_match_table = lpass_cdc_dt_match,
  1288. .suppress_bind_attrs = true,
  1289. },
  1290. .probe = lpass_cdc_probe,
  1291. .remove = lpass_cdc_remove,
  1292. };
  1293. static int lpass_cdc_drv_init(void)
  1294. {
  1295. return platform_driver_register(&lpass_cdc_drv);
  1296. }
  1297. static void lpass_cdc_drv_exit(void)
  1298. {
  1299. platform_driver_unregister(&lpass_cdc_drv);
  1300. }
  1301. static int __init lpass_cdc_init(void)
  1302. {
  1303. lpass_cdc_drv_init();
  1304. lpass_cdc_clk_rsc_mgr_init();
  1305. return 0;
  1306. }
  1307. module_init(lpass_cdc_init);
  1308. static void __exit lpass_cdc_exit(void)
  1309. {
  1310. lpass_cdc_clk_rsc_mgr_exit();
  1311. lpass_cdc_drv_exit();
  1312. }
  1313. module_exit(lpass_cdc_exit);
  1314. MODULE_DESCRIPTION("LPASS Codec driver");
  1315. MODULE_LICENSE("GPL v2");