dp_rx.h 57 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081
  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #ifndef _DP_RX_H
  20. #define _DP_RX_H
  21. #include "hal_rx.h"
  22. #include "dp_peer.h"
  23. #include "dp_internal.h"
  24. #ifdef RXDMA_OPTIMIZATION
  25. #ifndef RX_DATA_BUFFER_ALIGNMENT
  26. #define RX_DATA_BUFFER_ALIGNMENT 128
  27. #endif
  28. #ifndef RX_MONITOR_BUFFER_ALIGNMENT
  29. #define RX_MONITOR_BUFFER_ALIGNMENT 128
  30. #endif
  31. #else /* RXDMA_OPTIMIZATION */
  32. #define RX_DATA_BUFFER_ALIGNMENT 4
  33. #define RX_MONITOR_BUFFER_ALIGNMENT 4
  34. #endif /* RXDMA_OPTIMIZATION */
  35. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  36. #define DP_WBM2SW_RBM(sw0_bm_id) HAL_RX_BUF_RBM_SW1_BM(sw0_bm_id)
  37. /* RBM value used for re-injecting defragmented packets into REO */
  38. #define DP_DEFRAG_RBM(sw0_bm_id) HAL_RX_BUF_RBM_SW3_BM(sw0_bm_id)
  39. #endif
  40. #define RX_BUFFER_RESERVATION 0
  41. #ifdef QCA_WIFI_QCN9224
  42. #define RX_MON_MIN_HEAD_ROOM 64
  43. #endif
  44. #define DP_DEFAULT_NOISEFLOOR (-96)
  45. #define DP_RX_DESC_MAGIC 0xdec0de
  46. #define dp_rx_alert(params...) QDF_TRACE_FATAL(QDF_MODULE_ID_DP_RX, params)
  47. #define dp_rx_err(params...) QDF_TRACE_ERROR(QDF_MODULE_ID_DP_RX, params)
  48. #define dp_rx_warn(params...) QDF_TRACE_WARN(QDF_MODULE_ID_DP_RX, params)
  49. #define dp_rx_info(params...) \
  50. __QDF_TRACE_FL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_RX, ## params)
  51. #define dp_rx_info_rl(params...) \
  52. __QDF_TRACE_RL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_RX, ## params)
  53. #define dp_rx_debug(params...) QDF_TRACE_DEBUG(QDF_MODULE_ID_DP_RX, params)
  54. /**
  55. * enum dp_rx_desc_state
  56. *
  57. * @RX_DESC_REPLENISH: rx desc replenished
  58. * @RX_DESC_FREELIST: rx desc in freelist
  59. */
  60. enum dp_rx_desc_state {
  61. RX_DESC_REPLENISHED,
  62. RX_DESC_IN_FREELIST,
  63. };
  64. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  65. /**
  66. * struct dp_rx_desc_dbg_info
  67. *
  68. * @freelist_caller: name of the function that put the
  69. * the rx desc in freelist
  70. * @freelist_ts: timestamp when the rx desc is put in
  71. * a freelist
  72. * @replenish_caller: name of the function that last
  73. * replenished the rx desc
  74. * @replenish_ts: last replenish timestamp
  75. * @prev_nbuf: previous nbuf info
  76. * @prev_nbuf_data_addr: previous nbuf data address
  77. */
  78. struct dp_rx_desc_dbg_info {
  79. char freelist_caller[QDF_MEM_FUNC_NAME_SIZE];
  80. uint64_t freelist_ts;
  81. char replenish_caller[QDF_MEM_FUNC_NAME_SIZE];
  82. uint64_t replenish_ts;
  83. qdf_nbuf_t prev_nbuf;
  84. uint8_t *prev_nbuf_data_addr;
  85. };
  86. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  87. /**
  88. * struct dp_rx_desc
  89. *
  90. * @nbuf : VA of the "skb" posted
  91. * @rx_buf_start : VA of the original Rx buffer, before
  92. * movement of any skb->data pointer
  93. * @paddr_buf_start : PA of the original Rx buffer, before
  94. * movement of any frag pointer
  95. * @cookie : index into the sw array which holds
  96. * the sw Rx descriptors
  97. * Cookie space is 21 bits:
  98. * lower 18 bits -- index
  99. * upper 3 bits -- pool_id
  100. * @pool_id : pool Id for which this allocated.
  101. * Can only be used if there is no flow
  102. * steering
  103. * @in_use rx_desc is in use
  104. * @unmapped used to mark rx_desc an unmapped if the corresponding
  105. * nbuf is already unmapped
  106. * @in_err_state : Nbuf sanity failed for this descriptor.
  107. * @nbuf_data_addr : VA of nbuf data posted
  108. */
  109. struct dp_rx_desc {
  110. qdf_nbuf_t nbuf;
  111. uint8_t *rx_buf_start;
  112. qdf_dma_addr_t paddr_buf_start;
  113. uint32_t cookie;
  114. uint8_t pool_id;
  115. #ifdef RX_DESC_DEBUG_CHECK
  116. uint32_t magic;
  117. uint8_t *nbuf_data_addr;
  118. struct dp_rx_desc_dbg_info *dbg_info;
  119. #endif
  120. uint8_t in_use:1,
  121. unmapped:1,
  122. in_err_state:1;
  123. };
  124. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  125. #ifdef ATH_RX_PRI_SAVE
  126. #define DP_RX_TID_SAVE(_nbuf, _tid) \
  127. (qdf_nbuf_set_priority(_nbuf, _tid))
  128. #else
  129. #define DP_RX_TID_SAVE(_nbuf, _tid)
  130. #endif
  131. /* RX Descriptor Multi Page memory alloc related */
  132. #define DP_RX_DESC_OFFSET_NUM_BITS 8
  133. #define DP_RX_DESC_PAGE_ID_NUM_BITS 8
  134. #define DP_RX_DESC_POOL_ID_NUM_BITS 4
  135. #define DP_RX_DESC_PAGE_ID_SHIFT DP_RX_DESC_OFFSET_NUM_BITS
  136. #define DP_RX_DESC_POOL_ID_SHIFT \
  137. (DP_RX_DESC_OFFSET_NUM_BITS + DP_RX_DESC_PAGE_ID_NUM_BITS)
  138. #define RX_DESC_MULTI_PAGE_COOKIE_POOL_ID_MASK \
  139. (((1 << DP_RX_DESC_POOL_ID_NUM_BITS) - 1) << DP_RX_DESC_POOL_ID_SHIFT)
  140. #define RX_DESC_MULTI_PAGE_COOKIE_PAGE_ID_MASK \
  141. (((1 << DP_RX_DESC_PAGE_ID_NUM_BITS) - 1) << \
  142. DP_RX_DESC_PAGE_ID_SHIFT)
  143. #define RX_DESC_MULTI_PAGE_COOKIE_OFFSET_MASK \
  144. ((1 << DP_RX_DESC_OFFSET_NUM_BITS) - 1)
  145. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_POOL_ID(_cookie) \
  146. (((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_POOL_ID_MASK) >> \
  147. DP_RX_DESC_POOL_ID_SHIFT)
  148. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_PAGE_ID(_cookie) \
  149. (((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_PAGE_ID_MASK) >> \
  150. DP_RX_DESC_PAGE_ID_SHIFT)
  151. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_OFFSET(_cookie) \
  152. ((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_OFFSET_MASK)
  153. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  154. #define RX_DESC_COOKIE_INDEX_SHIFT 0
  155. #define RX_DESC_COOKIE_INDEX_MASK 0x3ffff /* 18 bits */
  156. #define RX_DESC_COOKIE_POOL_ID_SHIFT 18
  157. #define RX_DESC_COOKIE_POOL_ID_MASK 0x1c0000
  158. #define DP_RX_DESC_COOKIE_MAX \
  159. (RX_DESC_COOKIE_INDEX_MASK | RX_DESC_COOKIE_POOL_ID_MASK)
  160. #define DP_RX_DESC_COOKIE_POOL_ID_GET(_cookie) \
  161. (((_cookie) & RX_DESC_COOKIE_POOL_ID_MASK) >> \
  162. RX_DESC_COOKIE_POOL_ID_SHIFT)
  163. #define DP_RX_DESC_COOKIE_INDEX_GET(_cookie) \
  164. (((_cookie) & RX_DESC_COOKIE_INDEX_MASK) >> \
  165. RX_DESC_COOKIE_INDEX_SHIFT)
  166. #define dp_rx_add_to_free_desc_list(head, tail, new) \
  167. __dp_rx_add_to_free_desc_list(head, tail, new, __func__)
  168. #define dp_rx_buffers_replenish(soc, mac_id, rxdma_srng, rx_desc_pool, \
  169. num_buffers, desc_list, tail) \
  170. __dp_rx_buffers_replenish(soc, mac_id, rxdma_srng, rx_desc_pool, \
  171. num_buffers, desc_list, tail, __func__)
  172. #ifdef DP_RX_SPECIAL_FRAME_NEED
  173. /**
  174. * dp_rx_is_special_frame() - check is RX frame special needed
  175. *
  176. * @nbuf: RX skb pointer
  177. * @frame_mask: the mask for speical frame needed
  178. *
  179. * Check is RX frame wanted matched with mask
  180. *
  181. * Return: true - special frame needed, false - no
  182. */
  183. static inline
  184. bool dp_rx_is_special_frame(qdf_nbuf_t nbuf, uint32_t frame_mask)
  185. {
  186. if (((frame_mask & FRAME_MASK_IPV4_ARP) &&
  187. qdf_nbuf_is_ipv4_arp_pkt(nbuf)) ||
  188. ((frame_mask & FRAME_MASK_IPV4_DHCP) &&
  189. qdf_nbuf_is_ipv4_dhcp_pkt(nbuf)) ||
  190. ((frame_mask & FRAME_MASK_IPV4_EAPOL) &&
  191. qdf_nbuf_is_ipv4_eapol_pkt(nbuf)) ||
  192. ((frame_mask & FRAME_MASK_IPV6_DHCP) &&
  193. qdf_nbuf_is_ipv6_dhcp_pkt(nbuf)))
  194. return true;
  195. return false;
  196. }
  197. /**
  198. * dp_rx_deliver_special_frame() - Deliver the RX special frame to stack
  199. * if matches mask
  200. *
  201. * @soc: Datapath soc handler
  202. * @peer: pointer to DP peer
  203. * @nbuf: pointer to the skb of RX frame
  204. * @frame_mask: the mask for speical frame needed
  205. * @rx_tlv_hdr: start of rx tlv header
  206. *
  207. * note: Msdu_len must have been stored in QDF_NBUF_CB_RX_PKT_LEN(nbuf) and
  208. * single nbuf is expected.
  209. *
  210. * return: true - nbuf has been delivered to stack, false - not.
  211. */
  212. bool dp_rx_deliver_special_frame(struct dp_soc *soc, struct dp_peer *peer,
  213. qdf_nbuf_t nbuf, uint32_t frame_mask,
  214. uint8_t *rx_tlv_hdr);
  215. #else
  216. static inline
  217. bool dp_rx_is_special_frame(qdf_nbuf_t nbuf, uint32_t frame_mask)
  218. {
  219. return false;
  220. }
  221. static inline
  222. bool dp_rx_deliver_special_frame(struct dp_soc *soc, struct dp_peer *peer,
  223. qdf_nbuf_t nbuf, uint32_t frame_mask,
  224. uint8_t *rx_tlv_hdr)
  225. {
  226. return false;
  227. }
  228. #endif
  229. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  230. #ifdef DP_RX_DISABLE_NDI_MDNS_FORWARDING
  231. static inline
  232. bool dp_rx_check_ndi_mdns_fwding(struct dp_peer *ta_peer, qdf_nbuf_t nbuf)
  233. {
  234. if (ta_peer->vdev->opmode == wlan_op_mode_ndi &&
  235. qdf_nbuf_is_ipv6_mdns_pkt(nbuf)) {
  236. DP_STATS_INC(ta_peer, rx.intra_bss.mdns_no_fwd, 1);
  237. return false;
  238. }
  239. return true;
  240. }
  241. #else
  242. static inline
  243. bool dp_rx_check_ndi_mdns_fwding(struct dp_peer *ta_peer, qdf_nbuf_t nbuf)
  244. {
  245. return true;
  246. }
  247. #endif
  248. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  249. /* DOC: Offset to obtain LLC hdr
  250. *
  251. * In the case of Wifi parse error
  252. * to reach LLC header from beginning
  253. * of VLAN tag we need to skip 8 bytes.
  254. * Vlan_tag(4)+length(2)+length added
  255. * by HW(2) = 8 bytes.
  256. */
  257. #define DP_SKIP_VLAN 8
  258. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  259. /**
  260. * struct dp_rx_cached_buf - rx cached buffer
  261. * @list: linked list node
  262. * @buf: skb buffer
  263. */
  264. struct dp_rx_cached_buf {
  265. qdf_list_node_t node;
  266. qdf_nbuf_t buf;
  267. };
  268. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  269. /*
  270. *dp_rx_xor_block() - xor block of data
  271. *@b: destination data block
  272. *@a: source data block
  273. *@len: length of the data to process
  274. *
  275. *Returns: None
  276. */
  277. static inline void dp_rx_xor_block(uint8_t *b, const uint8_t *a, qdf_size_t len)
  278. {
  279. qdf_size_t i;
  280. for (i = 0; i < len; i++)
  281. b[i] ^= a[i];
  282. }
  283. /*
  284. *dp_rx_rotl() - rotate the bits left
  285. *@val: unsigned integer input value
  286. *@bits: number of bits
  287. *
  288. *Returns: Integer with left rotated by number of 'bits'
  289. */
  290. static inline uint32_t dp_rx_rotl(uint32_t val, int bits)
  291. {
  292. return (val << bits) | (val >> (32 - bits));
  293. }
  294. /*
  295. *dp_rx_rotr() - rotate the bits right
  296. *@val: unsigned integer input value
  297. *@bits: number of bits
  298. *
  299. *Returns: Integer with right rotated by number of 'bits'
  300. */
  301. static inline uint32_t dp_rx_rotr(uint32_t val, int bits)
  302. {
  303. return (val >> bits) | (val << (32 - bits));
  304. }
  305. /*
  306. * dp_set_rx_queue() - set queue_mapping in skb
  307. * @nbuf: skb
  308. * @queue_id: rx queue_id
  309. *
  310. * Return: void
  311. */
  312. #ifdef QCA_OL_RX_MULTIQ_SUPPORT
  313. static inline void dp_set_rx_queue(qdf_nbuf_t nbuf, uint8_t queue_id)
  314. {
  315. qdf_nbuf_record_rx_queue(nbuf, queue_id);
  316. return;
  317. }
  318. #else
  319. static inline void dp_set_rx_queue(qdf_nbuf_t nbuf, uint8_t queue_id)
  320. {
  321. }
  322. #endif
  323. /*
  324. *dp_rx_xswap() - swap the bits left
  325. *@val: unsigned integer input value
  326. *
  327. *Returns: Integer with bits swapped
  328. */
  329. static inline uint32_t dp_rx_xswap(uint32_t val)
  330. {
  331. return ((val & 0x00ff00ff) << 8) | ((val & 0xff00ff00) >> 8);
  332. }
  333. /*
  334. *dp_rx_get_le32_split() - get little endian 32 bits split
  335. *@b0: byte 0
  336. *@b1: byte 1
  337. *@b2: byte 2
  338. *@b3: byte 3
  339. *
  340. *Returns: Integer with split little endian 32 bits
  341. */
  342. static inline uint32_t dp_rx_get_le32_split(uint8_t b0, uint8_t b1, uint8_t b2,
  343. uint8_t b3)
  344. {
  345. return b0 | (b1 << 8) | (b2 << 16) | (b3 << 24);
  346. }
  347. /*
  348. *dp_rx_get_le32() - get little endian 32 bits
  349. *@b0: byte 0
  350. *@b1: byte 1
  351. *@b2: byte 2
  352. *@b3: byte 3
  353. *
  354. *Returns: Integer with little endian 32 bits
  355. */
  356. static inline uint32_t dp_rx_get_le32(const uint8_t *p)
  357. {
  358. return dp_rx_get_le32_split(p[0], p[1], p[2], p[3]);
  359. }
  360. /*
  361. * dp_rx_put_le32() - put little endian 32 bits
  362. * @p: destination char array
  363. * @v: source 32-bit integer
  364. *
  365. * Returns: None
  366. */
  367. static inline void dp_rx_put_le32(uint8_t *p, uint32_t v)
  368. {
  369. p[0] = (v) & 0xff;
  370. p[1] = (v >> 8) & 0xff;
  371. p[2] = (v >> 16) & 0xff;
  372. p[3] = (v >> 24) & 0xff;
  373. }
  374. /* Extract michal mic block of data */
  375. #define dp_rx_michael_block(l, r) \
  376. do { \
  377. r ^= dp_rx_rotl(l, 17); \
  378. l += r; \
  379. r ^= dp_rx_xswap(l); \
  380. l += r; \
  381. r ^= dp_rx_rotl(l, 3); \
  382. l += r; \
  383. r ^= dp_rx_rotr(l, 2); \
  384. l += r; \
  385. } while (0)
  386. /**
  387. * struct dp_rx_desc_list_elem_t
  388. *
  389. * @next : Next pointer to form free list
  390. * @rx_desc : DP Rx descriptor
  391. */
  392. union dp_rx_desc_list_elem_t {
  393. union dp_rx_desc_list_elem_t *next;
  394. struct dp_rx_desc rx_desc;
  395. };
  396. #ifdef RX_DESC_MULTI_PAGE_ALLOC
  397. /**
  398. * dp_rx_desc_find() - find dp rx descriptor from page ID and offset
  399. * @page_id: Page ID
  400. * @offset: Offset of the descriptor element
  401. *
  402. * Return: RX descriptor element
  403. */
  404. union dp_rx_desc_list_elem_t *dp_rx_desc_find(uint16_t page_id, uint16_t offset,
  405. struct rx_desc_pool *rx_pool);
  406. static inline
  407. struct dp_rx_desc *dp_get_rx_desc_from_cookie(struct dp_soc *soc,
  408. struct rx_desc_pool *pool,
  409. uint32_t cookie)
  410. {
  411. uint8_t pool_id = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_POOL_ID(cookie);
  412. uint16_t page_id = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_PAGE_ID(cookie);
  413. uint8_t offset = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_OFFSET(cookie);
  414. struct rx_desc_pool *rx_desc_pool;
  415. union dp_rx_desc_list_elem_t *rx_desc_elem;
  416. if (qdf_unlikely(pool_id >= MAX_RXDESC_POOLS))
  417. return NULL;
  418. rx_desc_pool = &pool[pool_id];
  419. rx_desc_elem = (union dp_rx_desc_list_elem_t *)
  420. (rx_desc_pool->desc_pages.cacheable_pages[page_id] +
  421. rx_desc_pool->elem_size * offset);
  422. return &rx_desc_elem->rx_desc;
  423. }
  424. /**
  425. * dp_rx_cookie_2_va_rxdma_buf() - Converts cookie to a virtual address of
  426. * the Rx descriptor on Rx DMA source ring buffer
  427. * @soc: core txrx main context
  428. * @cookie: cookie used to lookup virtual address
  429. *
  430. * Return: Pointer to the Rx descriptor
  431. */
  432. static inline
  433. struct dp_rx_desc *dp_rx_cookie_2_va_rxdma_buf(struct dp_soc *soc,
  434. uint32_t cookie)
  435. {
  436. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_buf[0], cookie);
  437. }
  438. /**
  439. * dp_rx_cookie_2_va_mon_buf() - Converts cookie to a virtual address of
  440. * the Rx descriptor on monitor ring buffer
  441. * @soc: core txrx main context
  442. * @cookie: cookie used to lookup virtual address
  443. *
  444. * Return: Pointer to the Rx descriptor
  445. */
  446. static inline
  447. struct dp_rx_desc *dp_rx_cookie_2_va_mon_buf(struct dp_soc *soc,
  448. uint32_t cookie)
  449. {
  450. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_mon[0], cookie);
  451. }
  452. /**
  453. * dp_rx_cookie_2_va_mon_status() - Converts cookie to a virtual address of
  454. * the Rx descriptor on monitor status ring buffer
  455. * @soc: core txrx main context
  456. * @cookie: cookie used to lookup virtual address
  457. *
  458. * Return: Pointer to the Rx descriptor
  459. */
  460. static inline
  461. struct dp_rx_desc *dp_rx_cookie_2_va_mon_status(struct dp_soc *soc,
  462. uint32_t cookie)
  463. {
  464. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_status[0], cookie);
  465. }
  466. #else
  467. void dp_rx_desc_pool_init(struct dp_soc *soc, uint32_t pool_id,
  468. uint32_t pool_size,
  469. struct rx_desc_pool *rx_desc_pool);
  470. /**
  471. * dp_rx_cookie_2_va_rxdma_buf() - Converts cookie to a virtual address of
  472. * the Rx descriptor on Rx DMA source ring buffer
  473. * @soc: core txrx main context
  474. * @cookie: cookie used to lookup virtual address
  475. *
  476. * Return: void *: Virtual Address of the Rx descriptor
  477. */
  478. static inline
  479. void *dp_rx_cookie_2_va_rxdma_buf(struct dp_soc *soc, uint32_t cookie)
  480. {
  481. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  482. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  483. struct rx_desc_pool *rx_desc_pool;
  484. if (qdf_unlikely(pool_id >= MAX_RXDESC_POOLS))
  485. return NULL;
  486. rx_desc_pool = &soc->rx_desc_buf[pool_id];
  487. if (qdf_unlikely(index >= rx_desc_pool->pool_size))
  488. return NULL;
  489. return &rx_desc_pool->array[index].rx_desc;
  490. }
  491. /**
  492. * dp_rx_cookie_2_va_mon_buf() - Converts cookie to a virtual address of
  493. * the Rx descriptor on monitor ring buffer
  494. * @soc: core txrx main context
  495. * @cookie: cookie used to lookup virtual address
  496. *
  497. * Return: void *: Virtual Address of the Rx descriptor
  498. */
  499. static inline
  500. void *dp_rx_cookie_2_va_mon_buf(struct dp_soc *soc, uint32_t cookie)
  501. {
  502. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  503. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  504. /* TODO */
  505. /* Add sanity for pool_id & index */
  506. return &(soc->rx_desc_mon[pool_id].array[index].rx_desc);
  507. }
  508. /**
  509. * dp_rx_cookie_2_va_mon_status() - Converts cookie to a virtual address of
  510. * the Rx descriptor on monitor status ring buffer
  511. * @soc: core txrx main context
  512. * @cookie: cookie used to lookup virtual address
  513. *
  514. * Return: void *: Virtual Address of the Rx descriptor
  515. */
  516. static inline
  517. void *dp_rx_cookie_2_va_mon_status(struct dp_soc *soc, uint32_t cookie)
  518. {
  519. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  520. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  521. /* TODO */
  522. /* Add sanity for pool_id & index */
  523. return &(soc->rx_desc_status[pool_id].array[index].rx_desc);
  524. }
  525. #endif /* RX_DESC_MULTI_PAGE_ALLOC */
  526. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  527. static inline bool dp_rx_check_ap_bridge(struct dp_vdev *vdev)
  528. {
  529. return vdev->ap_bridge_enabled;
  530. }
  531. #ifdef DP_RX_DESC_COOKIE_INVALIDATE
  532. static inline QDF_STATUS
  533. dp_rx_cookie_check_and_invalidate(hal_ring_desc_t ring_desc)
  534. {
  535. if (qdf_unlikely(HAL_RX_REO_BUF_COOKIE_INVALID_GET(ring_desc)))
  536. return QDF_STATUS_E_FAILURE;
  537. HAL_RX_REO_BUF_COOKIE_INVALID_SET(ring_desc);
  538. return QDF_STATUS_SUCCESS;
  539. }
  540. /**
  541. * dp_rx_cookie_reset_invalid_bit() - Reset the invalid bit of the cookie
  542. * field in ring descriptor
  543. * @ring_desc: ring descriptor
  544. *
  545. * Return: None
  546. */
  547. static inline void
  548. dp_rx_cookie_reset_invalid_bit(hal_ring_desc_t ring_desc)
  549. {
  550. HAL_RX_REO_BUF_COOKIE_INVALID_RESET(ring_desc);
  551. }
  552. #else
  553. static inline QDF_STATUS
  554. dp_rx_cookie_check_and_invalidate(hal_ring_desc_t ring_desc)
  555. {
  556. return QDF_STATUS_SUCCESS;
  557. }
  558. static inline void
  559. dp_rx_cookie_reset_invalid_bit(hal_ring_desc_t ring_desc)
  560. {
  561. }
  562. #endif
  563. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  564. QDF_STATUS dp_rx_desc_pool_is_allocated(struct rx_desc_pool *rx_desc_pool);
  565. QDF_STATUS dp_rx_desc_pool_alloc(struct dp_soc *soc,
  566. uint32_t pool_size,
  567. struct rx_desc_pool *rx_desc_pool);
  568. void dp_rx_desc_pool_init(struct dp_soc *soc, uint32_t pool_id,
  569. uint32_t pool_size,
  570. struct rx_desc_pool *rx_desc_pool);
  571. void dp_rx_add_desc_list_to_free_list(struct dp_soc *soc,
  572. union dp_rx_desc_list_elem_t **local_desc_list,
  573. union dp_rx_desc_list_elem_t **tail,
  574. uint16_t pool_id,
  575. struct rx_desc_pool *rx_desc_pool);
  576. uint16_t dp_rx_get_free_desc_list(struct dp_soc *soc, uint32_t pool_id,
  577. struct rx_desc_pool *rx_desc_pool,
  578. uint16_t num_descs,
  579. union dp_rx_desc_list_elem_t **desc_list,
  580. union dp_rx_desc_list_elem_t **tail);
  581. QDF_STATUS dp_rx_pdev_desc_pool_alloc(struct dp_pdev *pdev);
  582. void dp_rx_pdev_desc_pool_free(struct dp_pdev *pdev);
  583. QDF_STATUS dp_rx_pdev_desc_pool_init(struct dp_pdev *pdev);
  584. void dp_rx_pdev_desc_pool_deinit(struct dp_pdev *pdev);
  585. void dp_rx_desc_pool_deinit(struct dp_soc *soc,
  586. struct rx_desc_pool *rx_desc_pool,
  587. uint32_t pool_id);
  588. QDF_STATUS dp_rx_pdev_attach(struct dp_pdev *pdev);
  589. QDF_STATUS dp_rx_pdev_buffers_alloc(struct dp_pdev *pdev);
  590. void dp_rx_pdev_buffers_free(struct dp_pdev *pdev);
  591. void dp_rx_pdev_detach(struct dp_pdev *pdev);
  592. void dp_print_napi_stats(struct dp_soc *soc);
  593. /**
  594. * dp_rx_vdev_detach() - detach vdev from dp rx
  595. * @vdev: virtual device instance
  596. *
  597. * Return: QDF_STATUS_SUCCESS: success
  598. * QDF_STATUS_E_RESOURCES: Error return
  599. */
  600. QDF_STATUS dp_rx_vdev_detach(struct dp_vdev *vdev);
  601. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  602. uint32_t
  603. dp_rx_process(struct dp_intr *int_ctx, hal_ring_handle_t hal_ring_hdl,
  604. uint8_t reo_ring_num,
  605. uint32_t quota);
  606. /**
  607. * dp_rx_err_process() - Processes error frames routed to REO error ring
  608. * @int_ctx: pointer to DP interrupt context
  609. * @soc: core txrx main context
  610. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  611. * @quota: No. of units (packets) that can be serviced in one shot.
  612. *
  613. * This function implements error processing and top level demultiplexer
  614. * for all the frames routed to REO error ring.
  615. *
  616. * Return: uint32_t: No. of elements processed
  617. */
  618. uint32_t dp_rx_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  619. hal_ring_handle_t hal_ring_hdl, uint32_t quota);
  620. /**
  621. * dp_rx_wbm_err_process() - Processes error frames routed to WBM release ring
  622. * @int_ctx: pointer to DP interrupt context
  623. * @soc: core txrx main context
  624. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  625. * @quota: No. of units (packets) that can be serviced in one shot.
  626. *
  627. * This function implements error processing and top level demultiplexer
  628. * for all the frames routed to WBM2HOST sw release ring.
  629. *
  630. * Return: uint32_t: No. of elements processed
  631. */
  632. uint32_t
  633. dp_rx_wbm_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  634. hal_ring_handle_t hal_ring_hdl, uint32_t quota);
  635. /**
  636. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  637. * multiple nbufs.
  638. * @soc: core txrx main context
  639. * @nbuf: pointer to the first msdu of an amsdu.
  640. *
  641. * This function implements the creation of RX frag_list for cases
  642. * where an MSDU is spread across multiple nbufs.
  643. *
  644. * Return: returns the head nbuf which contains complete frag_list.
  645. */
  646. qdf_nbuf_t dp_rx_sg_create(struct dp_soc *soc, qdf_nbuf_t nbuf);
  647. /*
  648. * dp_rx_desc_nbuf_and_pool_free() - free the sw rx desc pool called during
  649. * de-initialization of wifi module.
  650. *
  651. * @soc: core txrx main context
  652. * @pool_id: pool_id which is one of 3 mac_ids
  653. * @rx_desc_pool: rx descriptor pool pointer
  654. *
  655. * Return: None
  656. */
  657. void dp_rx_desc_nbuf_and_pool_free(struct dp_soc *soc, uint32_t pool_id,
  658. struct rx_desc_pool *rx_desc_pool);
  659. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  660. /*
  661. * dp_rx_desc_nbuf_free() - free the sw rx desc nbufs called during
  662. * de-initialization of wifi module.
  663. *
  664. * @soc: core txrx main context
  665. * @pool_id: pool_id which is one of 3 mac_ids
  666. * @rx_desc_pool: rx descriptor pool pointer
  667. *
  668. * Return: None
  669. */
  670. void dp_rx_desc_nbuf_free(struct dp_soc *soc,
  671. struct rx_desc_pool *rx_desc_pool);
  672. #ifdef DP_RX_MON_MEM_FRAG
  673. /*
  674. * dp_rx_desc_frag_free() - free the sw rx desc frag called during
  675. * de-initialization of wifi module.
  676. *
  677. * @soc: core txrx main context
  678. * @rx_desc_pool: rx descriptor pool pointer
  679. *
  680. * Return: None
  681. */
  682. void dp_rx_desc_frag_free(struct dp_soc *soc,
  683. struct rx_desc_pool *rx_desc_pool);
  684. #else
  685. static inline
  686. void dp_rx_desc_frag_free(struct dp_soc *soc,
  687. struct rx_desc_pool *rx_desc_pool)
  688. {
  689. }
  690. #endif
  691. /*
  692. * dp_rx_desc_pool_free() - free the sw rx desc array called during
  693. * de-initialization of wifi module.
  694. *
  695. * @soc: core txrx main context
  696. * @rx_desc_pool: rx descriptor pool pointer
  697. *
  698. * Return: None
  699. */
  700. void dp_rx_desc_pool_free(struct dp_soc *soc,
  701. struct rx_desc_pool *rx_desc_pool);
  702. void dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  703. struct dp_peer *peer);
  704. #ifdef RX_DESC_LOGGING
  705. /*
  706. * dp_rx_desc_alloc_dbg_info() - Alloc memory for rx descriptor debug
  707. * structure
  708. * @rx_desc: rx descriptor pointer
  709. *
  710. * Return: None
  711. */
  712. static inline
  713. void dp_rx_desc_alloc_dbg_info(struct dp_rx_desc *rx_desc)
  714. {
  715. rx_desc->dbg_info = qdf_mem_malloc(sizeof(struct dp_rx_desc_dbg_info));
  716. }
  717. /*
  718. * dp_rx_desc_free_dbg_info() - Free rx descriptor debug
  719. * structure memory
  720. * @rx_desc: rx descriptor pointer
  721. *
  722. * Return: None
  723. */
  724. static inline
  725. void dp_rx_desc_free_dbg_info(struct dp_rx_desc *rx_desc)
  726. {
  727. qdf_mem_free(rx_desc->dbg_info);
  728. }
  729. /*
  730. * dp_rx_desc_update_dbg_info() - Update rx descriptor debug info
  731. * structure memory
  732. * @rx_desc: rx descriptor pointer
  733. *
  734. * Return: None
  735. */
  736. static
  737. void dp_rx_desc_update_dbg_info(struct dp_rx_desc *rx_desc,
  738. const char *func_name, uint8_t flag)
  739. {
  740. struct dp_rx_desc_dbg_info *info = rx_desc->dbg_info;
  741. if (!info)
  742. return;
  743. if (flag == RX_DESC_REPLENISHED) {
  744. qdf_str_lcopy(info->replenish_caller, func_name,
  745. QDF_MEM_FUNC_NAME_SIZE);
  746. info->replenish_ts = qdf_get_log_timestamp();
  747. } else {
  748. qdf_str_lcopy(info->freelist_caller, func_name,
  749. QDF_MEM_FUNC_NAME_SIZE);
  750. info->freelist_ts = qdf_get_log_timestamp();
  751. info->prev_nbuf = rx_desc->nbuf;
  752. info->prev_nbuf_data_addr = rx_desc->nbuf_data_addr;
  753. rx_desc->nbuf_data_addr = NULL;
  754. }
  755. }
  756. #else
  757. static inline
  758. void dp_rx_desc_alloc_dbg_info(struct dp_rx_desc *rx_desc)
  759. {
  760. }
  761. static inline
  762. void dp_rx_desc_free_dbg_info(struct dp_rx_desc *rx_desc)
  763. {
  764. }
  765. static inline
  766. void dp_rx_desc_update_dbg_info(struct dp_rx_desc *rx_desc,
  767. const char *func_name, uint8_t flag)
  768. {
  769. }
  770. #endif /* RX_DESC_LOGGING */
  771. /**
  772. * dp_rx_add_to_free_desc_list() - Adds to a local free descriptor list
  773. *
  774. * @head: pointer to the head of local free list
  775. * @tail: pointer to the tail of local free list
  776. * @new: new descriptor that is added to the free list
  777. * @func_name: caller func name
  778. *
  779. * Return: void:
  780. */
  781. static inline
  782. void __dp_rx_add_to_free_desc_list(union dp_rx_desc_list_elem_t **head,
  783. union dp_rx_desc_list_elem_t **tail,
  784. struct dp_rx_desc *new, const char *func_name)
  785. {
  786. qdf_assert(head && new);
  787. dp_rx_desc_update_dbg_info(new, func_name, RX_DESC_IN_FREELIST);
  788. new->nbuf = NULL;
  789. new->in_use = 0;
  790. ((union dp_rx_desc_list_elem_t *)new)->next = *head;
  791. *head = (union dp_rx_desc_list_elem_t *)new;
  792. /* reset tail if head->next is NULL */
  793. if (!*tail || !(*head)->next)
  794. *tail = *head;
  795. }
  796. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t nbuf,
  797. uint8_t mac_id);
  798. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  799. qdf_nbuf_t mpdu, bool mpdu_done, uint8_t mac_id);
  800. void dp_rx_process_mic_error(struct dp_soc *soc, qdf_nbuf_t nbuf,
  801. uint8_t *rx_tlv_hdr, struct dp_peer *peer);
  802. void dp_2k_jump_handle(struct dp_soc *soc, qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr,
  803. uint16_t peer_id, uint8_t tid);
  804. #define DP_RX_HEAD_APPEND(head, elem) \
  805. do { \
  806. qdf_nbuf_set_next((elem), (head)); \
  807. (head) = (elem); \
  808. } while (0)
  809. #define DP_RX_LIST_APPEND(head, tail, elem) \
  810. do { \
  811. if (!(head)) { \
  812. (head) = (elem); \
  813. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(head) = 1;\
  814. } else { \
  815. qdf_nbuf_set_next((tail), (elem)); \
  816. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(head)++; \
  817. } \
  818. (tail) = (elem); \
  819. qdf_nbuf_set_next((tail), NULL); \
  820. } while (0)
  821. #define DP_RX_MERGE_TWO_LIST(phead, ptail, chead, ctail) \
  822. do { \
  823. if (!(phead)) { \
  824. (phead) = (chead); \
  825. } else { \
  826. qdf_nbuf_set_next((ptail), (chead)); \
  827. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(phead) += \
  828. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(chead); \
  829. } \
  830. (ptail) = (ctail); \
  831. qdf_nbuf_set_next((ptail), NULL); \
  832. } while (0)
  833. #if defined(QCA_PADDR_CHECK_ON_3TH_PLATFORM)
  834. /*
  835. * on some third-party platform, the memory below 0x2000
  836. * is reserved for target use, so any memory allocated in this
  837. * region should not be used by host
  838. */
  839. #define MAX_RETRY 50
  840. #define DP_PHY_ADDR_RESERVED 0x2000
  841. #elif defined(BUILD_X86)
  842. /*
  843. * in M2M emulation platforms (x86) the memory below 0x50000000
  844. * is reserved for target use, so any memory allocated in this
  845. * region should not be used by host
  846. */
  847. #define MAX_RETRY 100
  848. #define DP_PHY_ADDR_RESERVED 0x50000000
  849. #endif
  850. #if defined(QCA_PADDR_CHECK_ON_3TH_PLATFORM) || defined(BUILD_X86)
  851. /**
  852. * dp_check_paddr() - check if current phy address is valid or not
  853. * @dp_soc: core txrx main context
  854. * @rx_netbuf: skb buffer
  855. * @paddr: physical address
  856. * @rx_desc_pool: struct of rx descriptor pool
  857. * check if the physical address of the nbuf->data is less
  858. * than DP_PHY_ADDR_RESERVED then free the nbuf and try
  859. * allocating new nbuf. We can try for 100 times.
  860. *
  861. * This is a temp WAR till we fix it properly.
  862. *
  863. * Return: success or failure.
  864. */
  865. static inline
  866. int dp_check_paddr(struct dp_soc *dp_soc,
  867. qdf_nbuf_t *rx_netbuf,
  868. qdf_dma_addr_t *paddr,
  869. struct rx_desc_pool *rx_desc_pool)
  870. {
  871. uint32_t nbuf_retry = 0;
  872. int32_t ret;
  873. if (qdf_likely(*paddr > DP_PHY_ADDR_RESERVED))
  874. return QDF_STATUS_SUCCESS;
  875. do {
  876. dp_debug("invalid phy addr 0x%llx, trying again",
  877. (uint64_t)(*paddr));
  878. nbuf_retry++;
  879. if ((*rx_netbuf)) {
  880. /* Not freeing buffer intentionally.
  881. * Observed that same buffer is getting
  882. * re-allocated resulting in longer load time
  883. * WMI init timeout.
  884. * This buffer is anyway not useful so skip it.
  885. *.Add such buffer to invalid list and free
  886. *.them when driver unload.
  887. **/
  888. qdf_nbuf_unmap_nbytes_single(dp_soc->osdev,
  889. *rx_netbuf,
  890. QDF_DMA_FROM_DEVICE,
  891. rx_desc_pool->buf_size);
  892. qdf_nbuf_queue_add(&dp_soc->invalid_buf_queue,
  893. *rx_netbuf);
  894. }
  895. *rx_netbuf = qdf_nbuf_alloc(dp_soc->osdev,
  896. rx_desc_pool->buf_size,
  897. RX_BUFFER_RESERVATION,
  898. rx_desc_pool->buf_alignment,
  899. FALSE);
  900. if (qdf_unlikely(!(*rx_netbuf)))
  901. return QDF_STATUS_E_FAILURE;
  902. ret = qdf_nbuf_map_nbytes_single(dp_soc->osdev,
  903. *rx_netbuf,
  904. QDF_DMA_FROM_DEVICE,
  905. rx_desc_pool->buf_size);
  906. if (qdf_unlikely(ret == QDF_STATUS_E_FAILURE)) {
  907. qdf_nbuf_free(*rx_netbuf);
  908. *rx_netbuf = NULL;
  909. continue;
  910. }
  911. *paddr = qdf_nbuf_get_frag_paddr(*rx_netbuf, 0);
  912. if (qdf_likely(*paddr > DP_PHY_ADDR_RESERVED))
  913. return QDF_STATUS_SUCCESS;
  914. } while (nbuf_retry < MAX_RETRY);
  915. if ((*rx_netbuf)) {
  916. qdf_nbuf_unmap_nbytes_single(dp_soc->osdev,
  917. *rx_netbuf,
  918. QDF_DMA_FROM_DEVICE,
  919. rx_desc_pool->buf_size);
  920. qdf_nbuf_queue_add(&dp_soc->invalid_buf_queue,
  921. *rx_netbuf);
  922. }
  923. return QDF_STATUS_E_FAILURE;
  924. }
  925. #else
  926. static inline
  927. int dp_check_paddr(struct dp_soc *dp_soc,
  928. qdf_nbuf_t *rx_netbuf,
  929. qdf_dma_addr_t *paddr,
  930. struct rx_desc_pool *rx_desc_pool)
  931. {
  932. return QDF_STATUS_SUCCESS;
  933. }
  934. #endif
  935. /**
  936. * dp_rx_cookie_2_link_desc_va() - Converts cookie to a virtual address of
  937. * the MSDU Link Descriptor
  938. * @soc: core txrx main context
  939. * @buf_info: buf_info includes cookie that is used to lookup
  940. * virtual address of link descriptor after deriving the page id
  941. * and the offset or index of the desc on the associatde page.
  942. *
  943. * This is the VA of the link descriptor, that HAL layer later uses to
  944. * retrieve the list of MSDU's for a given MPDU.
  945. *
  946. * Return: void *: Virtual Address of the Rx descriptor
  947. */
  948. static inline
  949. void *dp_rx_cookie_2_link_desc_va(struct dp_soc *soc,
  950. struct hal_buf_info *buf_info)
  951. {
  952. void *link_desc_va;
  953. struct qdf_mem_multi_page_t *pages;
  954. uint16_t page_id = LINK_DESC_COOKIE_PAGE_ID(buf_info->sw_cookie);
  955. pages = &soc->link_desc_pages;
  956. if (!pages)
  957. return NULL;
  958. if (qdf_unlikely(page_id >= pages->num_pages))
  959. return NULL;
  960. link_desc_va = pages->dma_pages[page_id].page_v_addr_start +
  961. (buf_info->paddr - pages->dma_pages[page_id].page_p_addr);
  962. return link_desc_va;
  963. }
  964. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  965. #ifdef DISABLE_EAPOL_INTRABSS_FWD
  966. #ifdef WLAN_FEATURE_11BE_MLO
  967. static inline bool dp_nbuf_dst_addr_is_mld_addr(struct dp_vdev *vdev,
  968. qdf_nbuf_t nbuf)
  969. {
  970. struct qdf_mac_addr *self_mld_mac_addr =
  971. (struct qdf_mac_addr *)vdev->mld_mac_addr.raw;
  972. return qdf_is_macaddr_equal(self_mld_mac_addr,
  973. (struct qdf_mac_addr *)qdf_nbuf_data(nbuf) +
  974. QDF_NBUF_DEST_MAC_OFFSET);
  975. }
  976. #else
  977. static inline bool dp_nbuf_dst_addr_is_mld_addr(struct dp_vdev *vdev,
  978. qdf_nbuf_t nbuf)
  979. {
  980. return false;
  981. }
  982. #endif
  983. static inline bool dp_nbuf_dst_addr_is_self_addr(struct dp_vdev *vdev,
  984. qdf_nbuf_t nbuf)
  985. {
  986. return qdf_is_macaddr_equal((struct qdf_mac_addr *)vdev->mac_addr.raw,
  987. (struct qdf_mac_addr *)qdf_nbuf_data(nbuf) +
  988. QDF_NBUF_DEST_MAC_OFFSET);
  989. }
  990. /*
  991. * dp_rx_intrabss_eapol_drop_check() - API For EAPOL
  992. * pkt with DA not equal to vdev mac addr, fwd is not allowed.
  993. * @soc: core txrx main context
  994. * @ta_peer: source peer entry
  995. * @rx_tlv_hdr: start address of rx tlvs
  996. * @nbuf: nbuf that has to be intrabss forwarded
  997. *
  998. * Return: true if it is forwarded else false
  999. */
  1000. static inline
  1001. bool dp_rx_intrabss_eapol_drop_check(struct dp_soc *soc,
  1002. struct dp_peer *ta_peer,
  1003. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf)
  1004. {
  1005. if (qdf_unlikely(qdf_nbuf_is_ipv4_eapol_pkt(nbuf) &&
  1006. !(dp_nbuf_dst_addr_is_self_addr(ta_peer->vdev, nbuf) ||
  1007. dp_nbuf_dst_addr_is_mld_addr(ta_peer->vdev, nbuf)))) {
  1008. qdf_nbuf_free(nbuf);
  1009. DP_STATS_INC(soc, rx.err.intrabss_eapol_drop, 1);
  1010. return true;
  1011. }
  1012. return false;
  1013. }
  1014. #else /* DISABLE_EAPOL_INTRABSS_FWD */
  1015. static inline
  1016. bool dp_rx_intrabss_eapol_drop_check(struct dp_soc *soc,
  1017. struct dp_peer *ta_peer,
  1018. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf)
  1019. {
  1020. return false;
  1021. }
  1022. #endif /* DISABLE_EAPOL_INTRABSS_FWD */
  1023. bool dp_rx_intrabss_mcbc_fwd(struct dp_soc *soc, struct dp_peer *ta_peer,
  1024. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  1025. struct cdp_tid_rx_stats *tid_stats);
  1026. bool dp_rx_intrabss_ucast_fwd(struct dp_soc *soc, struct dp_peer *ta_peer,
  1027. uint8_t tx_vdev_id,
  1028. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  1029. struct cdp_tid_rx_stats *tid_stats);
  1030. /**
  1031. * dp_rx_defrag_concat() - Concatenate the fragments
  1032. *
  1033. * @dst: destination pointer to the buffer
  1034. * @src: source pointer from where the fragment payload is to be copied
  1035. *
  1036. * Return: QDF_STATUS
  1037. */
  1038. static inline QDF_STATUS dp_rx_defrag_concat(qdf_nbuf_t dst, qdf_nbuf_t src)
  1039. {
  1040. /*
  1041. * Inside qdf_nbuf_cat, if it is necessary to reallocate dst
  1042. * to provide space for src, the headroom portion is copied from
  1043. * the original dst buffer to the larger new dst buffer.
  1044. * (This is needed, because the headroom of the dst buffer
  1045. * contains the rx desc.)
  1046. */
  1047. if (!qdf_nbuf_cat(dst, src)) {
  1048. /*
  1049. * qdf_nbuf_cat does not free the src memory.
  1050. * Free src nbuf before returning
  1051. * For failure case the caller takes of freeing the nbuf
  1052. */
  1053. qdf_nbuf_free(src);
  1054. return QDF_STATUS_SUCCESS;
  1055. }
  1056. return QDF_STATUS_E_DEFRAG_ERROR;
  1057. }
  1058. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1059. #ifndef FEATURE_WDS
  1060. void dp_rx_da_learn(struct dp_soc *soc, uint8_t *rx_tlv_hdr,
  1061. struct dp_peer *ta_peer, qdf_nbuf_t nbuf);
  1062. static inline QDF_STATUS dp_rx_ast_set_active(struct dp_soc *soc, uint16_t sa_idx, bool is_active)
  1063. {
  1064. return QDF_STATUS_SUCCESS;
  1065. }
  1066. static inline void
  1067. dp_rx_wds_srcport_learn(struct dp_soc *soc,
  1068. uint8_t *rx_tlv_hdr,
  1069. struct dp_peer *ta_peer,
  1070. qdf_nbuf_t nbuf,
  1071. struct hal_rx_msdu_metadata msdu_metadata)
  1072. {
  1073. }
  1074. #endif
  1075. /*
  1076. * dp_rx_desc_dump() - dump the sw rx descriptor
  1077. *
  1078. * @rx_desc: sw rx descriptor
  1079. */
  1080. static inline void dp_rx_desc_dump(struct dp_rx_desc *rx_desc)
  1081. {
  1082. dp_info("rx_desc->nbuf: %pK, rx_desc->cookie: %d, rx_desc->pool_id: %d, rx_desc->in_use: %d, rx_desc->unmapped: %d",
  1083. rx_desc->nbuf, rx_desc->cookie, rx_desc->pool_id,
  1084. rx_desc->in_use, rx_desc->unmapped);
  1085. }
  1086. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1087. /*
  1088. * check_qwrap_multicast_loopback() - Check if rx packet is a loopback packet.
  1089. * In qwrap mode, packets originated from
  1090. * any vdev should not loopback and
  1091. * should be dropped.
  1092. * @vdev: vdev on which rx packet is received
  1093. * @nbuf: rx pkt
  1094. *
  1095. */
  1096. #if ATH_SUPPORT_WRAP
  1097. static inline bool check_qwrap_multicast_loopback(struct dp_vdev *vdev,
  1098. qdf_nbuf_t nbuf)
  1099. {
  1100. struct dp_vdev *psta_vdev;
  1101. struct dp_pdev *pdev = vdev->pdev;
  1102. uint8_t *data = qdf_nbuf_data(nbuf);
  1103. if (qdf_unlikely(vdev->proxysta_vdev)) {
  1104. /* In qwrap isolation mode, allow loopback packets as all
  1105. * packets go to RootAP and Loopback on the mpsta.
  1106. */
  1107. if (vdev->isolation_vdev)
  1108. return false;
  1109. TAILQ_FOREACH(psta_vdev, &pdev->vdev_list, vdev_list_elem) {
  1110. if (qdf_unlikely(psta_vdev->proxysta_vdev &&
  1111. !qdf_mem_cmp(psta_vdev->mac_addr.raw,
  1112. &data[QDF_MAC_ADDR_SIZE],
  1113. QDF_MAC_ADDR_SIZE))) {
  1114. /* Drop packet if source address is equal to
  1115. * any of the vdev addresses.
  1116. */
  1117. return true;
  1118. }
  1119. }
  1120. }
  1121. return false;
  1122. }
  1123. #else
  1124. static inline bool check_qwrap_multicast_loopback(struct dp_vdev *vdev,
  1125. qdf_nbuf_t nbuf)
  1126. {
  1127. return false;
  1128. }
  1129. #endif
  1130. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1131. #if defined(WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG) ||\
  1132. defined(WLAN_SUPPORT_RX_TAG_STATISTICS) ||\
  1133. defined(WLAN_SUPPORT_RX_FLOW_TAG)
  1134. #include "dp_rx_tag.h"
  1135. #endif
  1136. #if !defined(WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG) &&\
  1137. !defined(WLAN_SUPPORT_RX_FLOW_TAG)
  1138. /**
  1139. * dp_rx_update_protocol_tag() - Reads CCE metadata from the RX MSDU end TLV
  1140. * and set the corresponding tag in QDF packet
  1141. * @soc: core txrx main context
  1142. * @vdev: vdev on which the packet is received
  1143. * @nbuf: QDF pkt buffer on which the protocol tag should be set
  1144. * @rx_tlv_hdr: rBbase address where the RX TLVs starts
  1145. * @ring_index: REO ring number, not used for error & monitor ring
  1146. * @is_reo_exception: flag to indicate if rx from REO ring or exception ring
  1147. * @is_update_stats: flag to indicate whether to update stats or not
  1148. * Return: void
  1149. */
  1150. static inline void
  1151. dp_rx_update_protocol_tag(struct dp_soc *soc, struct dp_vdev *vdev,
  1152. qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr,
  1153. uint16_t ring_index,
  1154. bool is_reo_exception, bool is_update_stats)
  1155. {
  1156. }
  1157. #endif
  1158. #ifndef WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG
  1159. /**
  1160. * dp_rx_err_cce_drop() - Reads CCE metadata from the RX MSDU end TLV
  1161. * and returns whether cce metadata matches
  1162. * @soc: core txrx main context
  1163. * @vdev: vdev on which the packet is received
  1164. * @nbuf: QDF pkt buffer on which the protocol tag should be set
  1165. * @rx_tlv_hdr: rBbase address where the RX TLVs starts
  1166. * Return: bool
  1167. */
  1168. static inline bool
  1169. dp_rx_err_cce_drop(struct dp_soc *soc, struct dp_vdev *vdev,
  1170. qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr)
  1171. {
  1172. return false;
  1173. }
  1174. #endif /* WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG */
  1175. #ifndef WLAN_SUPPORT_RX_FLOW_TAG
  1176. /**
  1177. * dp_rx_update_flow_tag() - Reads FSE metadata from the RX MSDU end TLV
  1178. * and set the corresponding tag in QDF packet
  1179. * @soc: core txrx main context
  1180. * @vdev: vdev on which the packet is received
  1181. * @nbuf: QDF pkt buffer on which the protocol tag should be set
  1182. * @rx_tlv_hdr: base address where the RX TLVs starts
  1183. * @is_update_stats: flag to indicate whether to update stats or not
  1184. *
  1185. * Return: void
  1186. */
  1187. static inline void
  1188. dp_rx_update_flow_tag(struct dp_soc *soc, struct dp_vdev *vdev,
  1189. qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr, bool update_stats)
  1190. {
  1191. }
  1192. #endif /* WLAN_SUPPORT_RX_FLOW_TAG */
  1193. /*
  1194. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  1195. * called during dp rx initialization
  1196. * and at the end of dp_rx_process.
  1197. *
  1198. * @soc: core txrx main context
  1199. * @mac_id: mac_id which is one of 3 mac_ids
  1200. * @dp_rxdma_srng: dp rxdma circular ring
  1201. * @rx_desc_pool: Pointer to free Rx descriptor pool
  1202. * @num_req_buffers: number of buffer to be replenished
  1203. * @desc_list: list of descs if called from dp_rx_process
  1204. * or NULL during dp rx initialization or out of buffer
  1205. * interrupt.
  1206. * @tail: tail of descs list
  1207. * @func_name: name of the caller function
  1208. * Return: return success or failure
  1209. */
  1210. QDF_STATUS __dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  1211. struct dp_srng *dp_rxdma_srng,
  1212. struct rx_desc_pool *rx_desc_pool,
  1213. uint32_t num_req_buffers,
  1214. union dp_rx_desc_list_elem_t **desc_list,
  1215. union dp_rx_desc_list_elem_t **tail,
  1216. const char *func_name);
  1217. /*
  1218. * dp_pdev_rx_buffers_attach() - replenish rxdma ring with rx nbufs
  1219. * called during dp rx initialization
  1220. *
  1221. * @soc: core txrx main context
  1222. * @mac_id: mac_id which is one of 3 mac_ids
  1223. * @dp_rxdma_srng: dp rxdma circular ring
  1224. * @rx_desc_pool: Pointer to free Rx descriptor pool
  1225. * @num_req_buffers: number of buffer to be replenished
  1226. *
  1227. * Return: return success or failure
  1228. */
  1229. QDF_STATUS
  1230. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  1231. struct dp_srng *dp_rxdma_srng,
  1232. struct rx_desc_pool *rx_desc_pool,
  1233. uint32_t num_req_buffers);
  1234. /**
  1235. * dp_rx_link_desc_return() - Return a MPDU link descriptor to HW
  1236. * (WBM), following error handling
  1237. *
  1238. * @soc: core DP main context
  1239. * @buf_addr_info: opaque pointer to the REO error ring descriptor
  1240. * @buf_addr_info: void pointer to the buffer_addr_info
  1241. * @bm_action: put to idle_list or release to msdu_list
  1242. *
  1243. * Return: QDF_STATUS_E_FAILURE for failure else QDF_STATUS_SUCCESS
  1244. */
  1245. QDF_STATUS
  1246. dp_rx_link_desc_return(struct dp_soc *soc, hal_ring_desc_t ring_desc,
  1247. uint8_t bm_action);
  1248. /**
  1249. * dp_rx_link_desc_return_by_addr - Return a MPDU link descriptor to
  1250. * (WBM) by address
  1251. *
  1252. * @soc: core DP main context
  1253. * @link_desc_addr: link descriptor addr
  1254. *
  1255. * Return: QDF_STATUS_E_FAILURE for failure else QDF_STATUS_SUCCESS
  1256. */
  1257. QDF_STATUS
  1258. dp_rx_link_desc_return_by_addr(struct dp_soc *soc,
  1259. hal_buff_addrinfo_t link_desc_addr,
  1260. uint8_t bm_action);
  1261. /**
  1262. * dp_rxdma_err_process() - RxDMA error processing functionality
  1263. * @soc: core txrx main contex
  1264. * @mac_id: mac id which is one of 3 mac_ids
  1265. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1266. * @quota: No. of units (packets) that can be serviced in one shot.
  1267. *
  1268. * Return: num of buffers processed
  1269. */
  1270. uint32_t
  1271. dp_rxdma_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  1272. uint32_t mac_id, uint32_t quota);
  1273. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1274. uint8_t *rx_tlv_hdr, struct dp_peer *peer);
  1275. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1276. uint8_t *rx_tlv_hdr);
  1277. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr, struct dp_vdev *vdev,
  1278. struct dp_peer *peer);
  1279. /*
  1280. * dp_rx_dump_info_and_assert() - dump RX Ring info and Rx Desc info
  1281. *
  1282. * @soc: core txrx main context
  1283. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1284. * @ring_desc: opaque pointer to the RX ring descriptor
  1285. * @rx_desc: host rx descriptor
  1286. *
  1287. * Return: void
  1288. */
  1289. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  1290. hal_ring_handle_t hal_ring_hdl,
  1291. hal_ring_desc_t ring_desc,
  1292. struct dp_rx_desc *rx_desc);
  1293. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf);
  1294. #ifdef QCA_PEER_EXT_STATS
  1295. void dp_rx_compute_tid_delay(struct cdp_delay_tid_stats *stats,
  1296. qdf_nbuf_t nbuf);
  1297. #endif /* QCA_PEER_EXT_STATS */
  1298. #ifdef RX_DESC_DEBUG_CHECK
  1299. /**
  1300. * dp_rx_desc_check_magic() - check the magic value in dp_rx_desc
  1301. * @rx_desc: rx descriptor pointer
  1302. *
  1303. * Return: true, if magic is correct, else false.
  1304. */
  1305. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  1306. {
  1307. if (qdf_unlikely(rx_desc->magic != DP_RX_DESC_MAGIC))
  1308. return false;
  1309. rx_desc->magic = 0;
  1310. return true;
  1311. }
  1312. /**
  1313. * dp_rx_desc_prep() - prepare rx desc
  1314. * @rx_desc: rx descriptor pointer to be prepared
  1315. * @nbuf_frag_info_t: struct dp_rx_nbuf_frag_info *
  1316. *
  1317. * Note: assumption is that we are associating a nbuf which is mapped
  1318. *
  1319. * Return: none
  1320. */
  1321. static inline
  1322. void dp_rx_desc_prep(struct dp_rx_desc *rx_desc,
  1323. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1324. {
  1325. rx_desc->magic = DP_RX_DESC_MAGIC;
  1326. rx_desc->nbuf = (nbuf_frag_info_t->virt_addr).nbuf;
  1327. rx_desc->unmapped = 0;
  1328. rx_desc->nbuf_data_addr = (uint8_t *)qdf_nbuf_data(rx_desc->nbuf);
  1329. }
  1330. /**
  1331. * dp_rx_desc_frag_prep() - prepare rx desc
  1332. * @rx_desc: rx descriptor pointer to be prepared
  1333. * @nbuf_frag_info_t: struct dp_rx_nbuf_frag_info *
  1334. *
  1335. * Note: assumption is that we frag address is mapped
  1336. *
  1337. * Return: none
  1338. */
  1339. #ifdef DP_RX_MON_MEM_FRAG
  1340. static inline
  1341. void dp_rx_desc_frag_prep(struct dp_rx_desc *rx_desc,
  1342. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1343. {
  1344. rx_desc->magic = DP_RX_DESC_MAGIC;
  1345. rx_desc->rx_buf_start =
  1346. (uint8_t *)((nbuf_frag_info_t->virt_addr).vaddr);
  1347. rx_desc->paddr_buf_start = nbuf_frag_info_t->paddr;
  1348. rx_desc->unmapped = 0;
  1349. }
  1350. #else
  1351. static inline
  1352. void dp_rx_desc_frag_prep(struct dp_rx_desc *rx_desc,
  1353. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1354. {
  1355. }
  1356. #endif /* DP_RX_MON_MEM_FRAG */
  1357. /**
  1358. * dp_rx_desc_paddr_sanity_check() - paddr sanity for ring desc vs rx_desc
  1359. * @rx_desc: rx descriptor
  1360. * @ring_paddr: paddr obatined from the ring
  1361. *
  1362. * Returns: QDF_STATUS
  1363. */
  1364. static inline
  1365. bool dp_rx_desc_paddr_sanity_check(struct dp_rx_desc *rx_desc,
  1366. uint64_t ring_paddr)
  1367. {
  1368. return (ring_paddr == qdf_nbuf_get_frag_paddr(rx_desc->nbuf, 0));
  1369. }
  1370. #else
  1371. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  1372. {
  1373. return true;
  1374. }
  1375. static inline
  1376. void dp_rx_desc_prep(struct dp_rx_desc *rx_desc,
  1377. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1378. {
  1379. rx_desc->nbuf = (nbuf_frag_info_t->virt_addr).nbuf;
  1380. rx_desc->unmapped = 0;
  1381. }
  1382. #ifdef DP_RX_MON_MEM_FRAG
  1383. static inline
  1384. void dp_rx_desc_frag_prep(struct dp_rx_desc *rx_desc,
  1385. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1386. {
  1387. rx_desc->rx_buf_start =
  1388. (uint8_t *)((nbuf_frag_info_t->virt_addr).vaddr);
  1389. rx_desc->paddr_buf_start = nbuf_frag_info_t->paddr;
  1390. rx_desc->unmapped = 0;
  1391. }
  1392. #else
  1393. static inline
  1394. void dp_rx_desc_frag_prep(struct dp_rx_desc *rx_desc,
  1395. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1396. {
  1397. }
  1398. #endif /* DP_RX_MON_MEM_FRAG */
  1399. static inline
  1400. bool dp_rx_desc_paddr_sanity_check(struct dp_rx_desc *rx_desc,
  1401. uint64_t ring_paddr)
  1402. {
  1403. return true;
  1404. }
  1405. #endif /* RX_DESC_DEBUG_CHECK */
  1406. void dp_rx_enable_mon_dest_frag(struct rx_desc_pool *rx_desc_pool,
  1407. bool is_mon_dest_desc);
  1408. void dp_rx_process_rxdma_err(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1409. uint8_t *rx_tlv_hdr, struct dp_peer *peer,
  1410. uint8_t err_code, uint8_t mac_id);
  1411. #ifndef QCA_MULTIPASS_SUPPORT
  1412. static inline
  1413. bool dp_rx_multipass_process(struct dp_peer *peer, qdf_nbuf_t nbuf, uint8_t tid)
  1414. {
  1415. return false;
  1416. }
  1417. #else
  1418. bool dp_rx_multipass_process(struct dp_peer *peer, qdf_nbuf_t nbuf,
  1419. uint8_t tid);
  1420. #endif
  1421. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1422. #ifndef WLAN_RX_PKT_CAPTURE_ENH
  1423. static inline
  1424. QDF_STATUS dp_peer_set_rx_capture_enabled(struct dp_pdev *pdev,
  1425. struct dp_peer *peer_handle,
  1426. bool value, uint8_t *mac_addr)
  1427. {
  1428. return QDF_STATUS_SUCCESS;
  1429. }
  1430. #endif
  1431. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1432. /**
  1433. * dp_rx_deliver_to_stack() - deliver pkts to network stack
  1434. * Caller to hold peer refcount and check for valid peer
  1435. * @soc: soc
  1436. * @vdev: vdev
  1437. * @peer: peer
  1438. * @nbuf_head: skb list head
  1439. * @nbuf_tail: skb list tail
  1440. *
  1441. * Return: QDF_STATUS
  1442. */
  1443. QDF_STATUS dp_rx_deliver_to_stack(struct dp_soc *soc,
  1444. struct dp_vdev *vdev,
  1445. struct dp_peer *peer,
  1446. qdf_nbuf_t nbuf_head,
  1447. qdf_nbuf_t nbuf_tail);
  1448. #ifdef QCA_SUPPORT_EAPOL_OVER_CONTROL_PORT
  1449. /**
  1450. * dp_rx_eapol_deliver_to_stack() - deliver pkts to network stack
  1451. * caller to hold peer refcount and check for valid peer
  1452. * @soc: soc
  1453. * @vdev: vdev
  1454. * @peer: peer
  1455. * @nbuf_head: skb list head
  1456. * @nbuf_tail: skb list tail
  1457. *
  1458. * return: QDF_STATUS
  1459. */
  1460. QDF_STATUS dp_rx_eapol_deliver_to_stack(struct dp_soc *soc,
  1461. struct dp_vdev *vdev,
  1462. struct dp_peer *peer,
  1463. qdf_nbuf_t nbuf_head,
  1464. qdf_nbuf_t nbuf_tail);
  1465. #endif
  1466. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1467. #ifdef QCA_OL_RX_LOCK_LESS_ACCESS
  1468. /*
  1469. * dp_rx_ring_access_start()- Wrapper function to log access start of a hal ring
  1470. * @int_ctx: pointer to DP interrupt context
  1471. * @dp_soc - DP soc structure pointer
  1472. * @hal_ring_hdl - HAL ring handle
  1473. *
  1474. * Return: 0 on success; error on failure
  1475. */
  1476. static inline int
  1477. dp_rx_srng_access_start(struct dp_intr *int_ctx, struct dp_soc *soc,
  1478. hal_ring_handle_t hal_ring_hdl)
  1479. {
  1480. return hal_srng_access_start_unlocked(soc->hal_soc, hal_ring_hdl);
  1481. }
  1482. /*
  1483. * dp_rx_ring_access_end()- Wrapper function to log access end of a hal ring
  1484. * @int_ctx: pointer to DP interrupt context
  1485. * @dp_soc - DP soc structure pointer
  1486. * @hal_ring_hdl - HAL ring handle
  1487. *
  1488. * Return - None
  1489. */
  1490. static inline void
  1491. dp_rx_srng_access_end(struct dp_intr *int_ctx, struct dp_soc *soc,
  1492. hal_ring_handle_t hal_ring_hdl)
  1493. {
  1494. hal_srng_access_end_unlocked(soc->hal_soc, hal_ring_hdl);
  1495. }
  1496. #else
  1497. static inline int
  1498. dp_rx_srng_access_start(struct dp_intr *int_ctx, struct dp_soc *soc,
  1499. hal_ring_handle_t hal_ring_hdl)
  1500. {
  1501. return dp_srng_access_start(int_ctx, soc, hal_ring_hdl);
  1502. }
  1503. static inline void
  1504. dp_rx_srng_access_end(struct dp_intr *int_ctx, struct dp_soc *soc,
  1505. hal_ring_handle_t hal_ring_hdl)
  1506. {
  1507. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  1508. }
  1509. #endif
  1510. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1511. /*
  1512. * dp_rx_wbm_sg_list_reset() - Initialize sg list
  1513. *
  1514. * This api should be called at soc init and afterevery sg processing.
  1515. *@soc: DP SOC handle
  1516. */
  1517. static inline void dp_rx_wbm_sg_list_reset(struct dp_soc *soc)
  1518. {
  1519. if (soc) {
  1520. soc->wbm_sg_param.wbm_is_first_msdu_in_sg = false;
  1521. soc->wbm_sg_param.wbm_sg_nbuf_head = NULL;
  1522. soc->wbm_sg_param.wbm_sg_nbuf_tail = NULL;
  1523. soc->wbm_sg_param.wbm_sg_desc_msdu_len = 0;
  1524. }
  1525. }
  1526. /*
  1527. * dp_rx_wbm_sg_list_deinit() - De-initialize sg list
  1528. *
  1529. * This api should be called in down path, to avoid any leak.
  1530. *@soc: DP SOC handle
  1531. */
  1532. static inline void dp_rx_wbm_sg_list_deinit(struct dp_soc *soc)
  1533. {
  1534. if (soc) {
  1535. if (soc->wbm_sg_param.wbm_sg_nbuf_head)
  1536. qdf_nbuf_list_free(soc->wbm_sg_param.wbm_sg_nbuf_head);
  1537. dp_rx_wbm_sg_list_reset(soc);
  1538. }
  1539. }
  1540. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1541. #ifdef WLAN_FEATURE_RX_PREALLOC_BUFFER_POOL
  1542. #define DP_RX_PROCESS_NBUF(soc, head, tail, ebuf_head, ebuf_tail, rx_desc) \
  1543. do { \
  1544. if (!soc->rx_buff_pool[rx_desc->pool_id].is_initialized) { \
  1545. DP_RX_LIST_APPEND(head, tail, rx_desc->nbuf); \
  1546. break; \
  1547. } \
  1548. DP_RX_LIST_APPEND(ebuf_head, ebuf_tail, rx_desc->nbuf); \
  1549. if (!qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf)) { \
  1550. if (!dp_rx_buffer_pool_refill(soc, ebuf_head, \
  1551. rx_desc->pool_id)) \
  1552. DP_RX_MERGE_TWO_LIST(head, tail, \
  1553. ebuf_head, ebuf_tail);\
  1554. ebuf_head = NULL; \
  1555. ebuf_tail = NULL; \
  1556. } \
  1557. } while (0)
  1558. #else
  1559. #define DP_RX_PROCESS_NBUF(soc, head, tail, ebuf_head, ebuf_tail, rx_desc) \
  1560. DP_RX_LIST_APPEND(head, tail, rx_desc->nbuf)
  1561. #endif /* WLAN_FEATURE_RX_PREALLOC_BUFFER_POOL */
  1562. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1563. /*
  1564. * dp_rx_link_desc_refill_duplicate_check() - check if link desc duplicate
  1565. to refill
  1566. * @soc: DP SOC handle
  1567. * @buf_info: the last link desc buf info
  1568. * @ring_buf_info: current buf address pointor including link desc
  1569. *
  1570. * return: none.
  1571. */
  1572. void dp_rx_link_desc_refill_duplicate_check(
  1573. struct dp_soc *soc,
  1574. struct hal_buf_info *buf_info,
  1575. hal_buff_addrinfo_t ring_buf_info);
  1576. #ifdef WLAN_FEATURE_PKT_CAPTURE_V2
  1577. /**
  1578. * dp_rx_deliver_to_pkt_capture() - deliver rx packet to packet capture
  1579. * @soc : dp_soc handle
  1580. * @pdev: dp_pdev handle
  1581. * @peer_id: peer_id of the peer for which completion came
  1582. * @ppdu_id: ppdu_id
  1583. * @netbuf: Buffer pointer
  1584. *
  1585. * This function is used to deliver rx packet to packet capture
  1586. */
  1587. void dp_rx_deliver_to_pkt_capture(struct dp_soc *soc, struct dp_pdev *pdev,
  1588. uint16_t peer_id, uint32_t is_offload,
  1589. qdf_nbuf_t netbuf);
  1590. void dp_rx_deliver_to_pkt_capture_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1591. uint32_t is_offload);
  1592. #else
  1593. static inline void
  1594. dp_rx_deliver_to_pkt_capture(struct dp_soc *soc, struct dp_pdev *pdev,
  1595. uint16_t peer_id, uint32_t is_offload,
  1596. qdf_nbuf_t netbuf)
  1597. {
  1598. }
  1599. static inline void
  1600. dp_rx_deliver_to_pkt_capture_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1601. uint32_t is_offload)
  1602. {
  1603. }
  1604. #endif
  1605. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1606. #ifdef FEATURE_MEC
  1607. /**
  1608. * dp_rx_mcast_echo_check() - check if the mcast pkt is a loop
  1609. * back on same vap or a different vap.
  1610. * @soc: core DP main context
  1611. * @peer: dp peer handler
  1612. * @rx_tlv_hdr: start of the rx TLV header
  1613. * @nbuf: pkt buffer
  1614. *
  1615. * Return: bool (true if it is a looped back pkt else false)
  1616. *
  1617. */
  1618. bool dp_rx_mcast_echo_check(struct dp_soc *soc,
  1619. struct dp_peer *peer,
  1620. uint8_t *rx_tlv_hdr,
  1621. qdf_nbuf_t nbuf);
  1622. #else
  1623. static inline bool dp_rx_mcast_echo_check(struct dp_soc *soc,
  1624. struct dp_peer *peer,
  1625. uint8_t *rx_tlv_hdr,
  1626. qdf_nbuf_t nbuf)
  1627. {
  1628. return false;
  1629. }
  1630. #endif /* FEATURE_MEC */
  1631. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1632. #ifdef RECEIVE_OFFLOAD
  1633. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  1634. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt);
  1635. #else
  1636. static inline
  1637. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  1638. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt)
  1639. {
  1640. }
  1641. #endif
  1642. void dp_rx_msdu_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1643. uint8_t *rx_tlv_hdr, struct dp_peer *peer,
  1644. uint8_t ring_id,
  1645. struct cdp_tid_rx_stats *tid_stats);
  1646. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf);
  1647. uint32_t dp_rx_srng_get_num_pending(hal_soc_handle_t hal_soc,
  1648. hal_ring_handle_t hal_ring_hdl,
  1649. uint32_t num_entries,
  1650. bool *near_full);
  1651. #ifdef WLAN_FEATURE_DP_RX_RING_HISTORY
  1652. void dp_rx_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  1653. hal_ring_desc_t ring_desc);
  1654. #else
  1655. static inline void
  1656. dp_rx_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  1657. hal_ring_desc_t ring_desc)
  1658. {
  1659. }
  1660. #endif
  1661. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1662. #ifdef RX_DESC_SANITY_WAR
  1663. QDF_STATUS dp_rx_desc_sanity(struct dp_soc *soc, hal_soc_handle_t hal_soc,
  1664. hal_ring_handle_t hal_ring_hdl,
  1665. hal_ring_desc_t ring_desc,
  1666. struct dp_rx_desc *rx_desc);
  1667. #else
  1668. static inline
  1669. QDF_STATUS dp_rx_desc_sanity(struct dp_soc *soc, hal_soc_handle_t hal_soc,
  1670. hal_ring_handle_t hal_ring_hdl,
  1671. hal_ring_desc_t ring_desc,
  1672. struct dp_rx_desc *rx_desc)
  1673. {
  1674. return QDF_STATUS_SUCCESS;
  1675. }
  1676. #endif
  1677. #ifdef DP_RX_DROP_RAW_FRM
  1678. bool dp_rx_is_raw_frame_dropped(qdf_nbuf_t nbuf);
  1679. #else
  1680. static inline
  1681. bool dp_rx_is_raw_frame_dropped(qdf_nbuf_t nbuf)
  1682. {
  1683. return false;
  1684. }
  1685. #endif
  1686. #ifdef RX_DESC_DEBUG_CHECK
  1687. QDF_STATUS dp_rx_desc_nbuf_sanity_check(struct dp_soc *soc,
  1688. hal_ring_desc_t ring_desc,
  1689. struct dp_rx_desc *rx_desc);
  1690. #else
  1691. static inline
  1692. QDF_STATUS dp_rx_desc_nbuf_sanity_check(struct dp_soc *soc,
  1693. hal_ring_desc_t ring_desc,
  1694. struct dp_rx_desc *rx_desc)
  1695. {
  1696. return QDF_STATUS_SUCCESS;
  1697. }
  1698. #endif
  1699. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  1700. void dp_rx_update_stats(struct dp_soc *soc, qdf_nbuf_t nbuf);
  1701. #else
  1702. static inline
  1703. void dp_rx_update_stats(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1704. {
  1705. }
  1706. #endif
  1707. /**
  1708. * dp_rx_cksum_offload() - set the nbuf checksum as defined by hardware.
  1709. * @nbuf: pointer to the first msdu of an amsdu.
  1710. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1711. *
  1712. * The ipsumed field of the skb is set based on whether HW validated the
  1713. * IP/TCP/UDP checksum.
  1714. *
  1715. * Return: void
  1716. */
  1717. static inline
  1718. void dp_rx_cksum_offload(struct dp_pdev *pdev,
  1719. qdf_nbuf_t nbuf,
  1720. uint8_t *rx_tlv_hdr)
  1721. {
  1722. qdf_nbuf_rx_cksum_t cksum = {0};
  1723. //TODO - Move this to ring desc api
  1724. //HAL_RX_MSDU_DESC_IP_CHKSUM_FAIL_GET
  1725. //HAL_RX_MSDU_DESC_TCP_UDP_CHKSUM_FAIL_GET
  1726. uint32_t ip_csum_err, tcp_udp_csum_er;
  1727. hal_rx_tlv_csum_err_get(pdev->soc->hal_soc, rx_tlv_hdr, &ip_csum_err,
  1728. &tcp_udp_csum_er);
  1729. if (qdf_likely(!ip_csum_err && !tcp_udp_csum_er)) {
  1730. cksum.l4_result = QDF_NBUF_RX_CKSUM_TCP_UDP_UNNECESSARY;
  1731. qdf_nbuf_set_rx_cksum(nbuf, &cksum);
  1732. } else {
  1733. DP_STATS_INCC(pdev, err.ip_csum_err, 1, ip_csum_err);
  1734. DP_STATS_INCC(pdev, err.tcp_udp_csum_err, 1, tcp_udp_csum_er);
  1735. }
  1736. }
  1737. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1738. #ifdef WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT
  1739. static inline
  1740. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped,
  1741. int max_reap_limit)
  1742. {
  1743. bool limit_hit = false;
  1744. limit_hit =
  1745. (num_reaped >= max_reap_limit) ? true : false;
  1746. if (limit_hit)
  1747. DP_STATS_INC(soc, rx.reap_loop_pkt_limit_hit, 1)
  1748. return limit_hit;
  1749. }
  1750. static inline
  1751. bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1752. {
  1753. return soc->wlan_cfg_ctx->rx_enable_eol_data_check;
  1754. }
  1755. static inline int dp_rx_get_loop_pkt_limit(struct dp_soc *soc)
  1756. {
  1757. struct wlan_cfg_dp_soc_ctxt *cfg = soc->wlan_cfg_ctx;
  1758. return cfg->rx_reap_loop_pkt_limit;
  1759. }
  1760. #else
  1761. static inline
  1762. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped,
  1763. int max_reap_limit)
  1764. {
  1765. return false;
  1766. }
  1767. static inline
  1768. bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1769. {
  1770. return false;
  1771. }
  1772. static inline int dp_rx_get_loop_pkt_limit(struct dp_soc *soc)
  1773. {
  1774. return 0;
  1775. }
  1776. #endif /* WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT */
  1777. void dp_rx_update_stats(struct dp_soc *soc, qdf_nbuf_t nbuf);
  1778. #ifdef QCA_SUPPORT_WDS_EXTENDED
  1779. /**
  1780. * dp_rx_is_list_ready() - Make different lists for 4-address
  1781. and 3-address frames
  1782. * @nbuf_head: skb list head
  1783. * @vdev: vdev
  1784. * @peer: peer
  1785. * @peer_id: peer id of new received frame
  1786. * @vdev_id: vdev_id of new received frame
  1787. *
  1788. * Return: true if peer_ids are different.
  1789. */
  1790. static inline bool
  1791. dp_rx_is_list_ready(qdf_nbuf_t nbuf_head,
  1792. struct dp_vdev *vdev,
  1793. struct dp_peer *peer,
  1794. uint16_t peer_id,
  1795. uint8_t vdev_id)
  1796. {
  1797. if (nbuf_head && peer && (peer->peer_id != peer_id))
  1798. return true;
  1799. return false;
  1800. }
  1801. #else
  1802. static inline bool
  1803. dp_rx_is_list_ready(qdf_nbuf_t nbuf_head,
  1804. struct dp_vdev *vdev,
  1805. struct dp_peer *peer,
  1806. uint16_t peer_id,
  1807. uint8_t vdev_id)
  1808. {
  1809. if (nbuf_head && vdev && (vdev->vdev_id != vdev_id))
  1810. return true;
  1811. return false;
  1812. }
  1813. #endif
  1814. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  1815. static inline uint8_t
  1816. dp_rx_get_defrag_bm_id(struct dp_soc *soc)
  1817. {
  1818. return DP_DEFRAG_RBM(soc->wbm_sw0_bm_id);
  1819. }
  1820. static inline uint8_t
  1821. dp_rx_get_rx_bm_id(struct dp_soc *soc)
  1822. {
  1823. return DP_WBM2SW_RBM(soc->wbm_sw0_bm_id);
  1824. }
  1825. #else
  1826. static inline uint8_t
  1827. dp_rx_get_rx_bm_id(struct dp_soc *soc)
  1828. {
  1829. struct wlan_cfg_dp_soc_ctxt *cfg_ctx = soc->wlan_cfg_ctx;
  1830. uint8_t wbm2_sw_rx_rel_ring_id;
  1831. wbm2_sw_rx_rel_ring_id = wlan_cfg_get_rx_rel_ring_id(cfg_ctx);
  1832. return HAL_RX_BUF_RBM_SW_BM(soc->wbm_sw0_bm_id,
  1833. wbm2_sw_rx_rel_ring_id);
  1834. }
  1835. static inline uint8_t
  1836. dp_rx_get_defrag_bm_id(struct dp_soc *soc)
  1837. {
  1838. return dp_rx_get_rx_bm_id(soc);
  1839. }
  1840. #endif
  1841. static inline uint16_t
  1842. dp_rx_peer_metadata_peer_id_get(struct dp_soc *soc, uint32_t peer_metadata)
  1843. {
  1844. return soc->arch_ops.dp_rx_peer_metadata_peer_id_get(soc,
  1845. peer_metadata);
  1846. }
  1847. /**
  1848. * dp_rx_desc_pool_init_generic() - Generic Rx descriptors initialization
  1849. * @soc: SOC handle
  1850. * @rx_desc_pool: pointer to RX descriptor pool
  1851. * @pool_id: pool ID
  1852. *
  1853. * Return: None
  1854. */
  1855. QDF_STATUS dp_rx_desc_pool_init_generic(struct dp_soc *soc,
  1856. struct rx_desc_pool *rx_desc_pool,
  1857. uint32_t pool_id);
  1858. void dp_rx_desc_pool_deinit_generic(struct dp_soc *soc,
  1859. struct rx_desc_pool *rx_desc_pool,
  1860. uint32_t pool_id);
  1861. #endif /* _DP_RX_H */