dp_rx.h 35 KB

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  1. /*
  2. * Copyright (c) 2016-2020 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #ifndef _DP_RX_H
  19. #define _DP_RX_H
  20. #include "hal_rx.h"
  21. #include "dp_tx.h"
  22. #include "dp_peer.h"
  23. #include "dp_internal.h"
  24. #ifdef RXDMA_OPTIMIZATION
  25. #ifndef RX_DATA_BUFFER_ALIGNMENT
  26. #define RX_DATA_BUFFER_ALIGNMENT 128
  27. #endif
  28. #ifndef RX_MONITOR_BUFFER_ALIGNMENT
  29. #define RX_MONITOR_BUFFER_ALIGNMENT 128
  30. #endif
  31. #else /* RXDMA_OPTIMIZATION */
  32. #define RX_DATA_BUFFER_ALIGNMENT 4
  33. #define RX_MONITOR_BUFFER_ALIGNMENT 4
  34. #endif /* RXDMA_OPTIMIZATION */
  35. #ifdef QCA_HOST2FW_RXBUF_RING
  36. #define DP_WBM2SW_RBM HAL_RX_BUF_RBM_SW1_BM
  37. /* RBM value used for re-injecting defragmented packets into REO */
  38. #define DP_DEFRAG_RBM HAL_RX_BUF_RBM_SW3_BM
  39. #else
  40. #define DP_WBM2SW_RBM HAL_RX_BUF_RBM_SW3_BM
  41. #define DP_DEFRAG_RBM DP_WBM2SW_RBM
  42. #endif /* QCA_HOST2FW_RXBUF_RING */
  43. #define RX_BUFFER_RESERVATION 0
  44. #define DP_PEER_METADATA_PEER_ID_MASK 0x0000ffff
  45. #define DP_PEER_METADATA_PEER_ID_SHIFT 0
  46. #define DP_PEER_METADATA_VDEV_ID_MASK 0x003f0000
  47. #define DP_PEER_METADATA_VDEV_ID_SHIFT 16
  48. #define DP_PEER_METADATA_PEER_ID_GET(_peer_metadata) \
  49. (((_peer_metadata) & DP_PEER_METADATA_PEER_ID_MASK) \
  50. >> DP_PEER_METADATA_PEER_ID_SHIFT)
  51. #define DP_PEER_METADATA_VDEV_ID_GET(_peer_metadata) \
  52. (((_peer_metadata) & DP_PEER_METADATA_VDEV_ID_MASK) \
  53. >> DP_PEER_METADATA_VDEV_ID_SHIFT)
  54. #define DP_RX_DESC_MAGIC 0xdec0de
  55. /**
  56. * struct dp_rx_desc
  57. *
  58. * @nbuf : VA of the "skb" posted
  59. * @rx_buf_start : VA of the original Rx buffer, before
  60. * movement of any skb->data pointer
  61. * @cookie : index into the sw array which holds
  62. * the sw Rx descriptors
  63. * Cookie space is 21 bits:
  64. * lower 18 bits -- index
  65. * upper 3 bits -- pool_id
  66. * @pool_id : pool Id for which this allocated.
  67. * Can only be used if there is no flow
  68. * steering
  69. * @in_use rx_desc is in use
  70. * @unmapped used to mark rx_desc an unmapped if the corresponding
  71. * nbuf is already unmapped
  72. */
  73. struct dp_rx_desc {
  74. qdf_nbuf_t nbuf;
  75. uint8_t *rx_buf_start;
  76. uint32_t cookie;
  77. uint8_t pool_id;
  78. #ifdef RX_DESC_DEBUG_CHECK
  79. uint32_t magic;
  80. #endif
  81. uint8_t in_use:1,
  82. unmapped:1;
  83. };
  84. /* RX Descriptor Multi Page memory alloc related */
  85. #define DP_RX_DESC_OFFSET_NUM_BITS 8
  86. #define DP_RX_DESC_PAGE_ID_NUM_BITS 8
  87. #define DP_RX_DESC_POOL_ID_NUM_BITS 4
  88. #define DP_RX_DESC_PAGE_ID_SHIFT DP_RX_DESC_OFFSET_NUM_BITS
  89. #define DP_RX_DESC_POOL_ID_SHIFT \
  90. (DP_RX_DESC_OFFSET_NUM_BITS + DP_RX_DESC_PAGE_ID_NUM_BITS)
  91. #define RX_DESC_MULTI_PAGE_COOKIE_POOL_ID_MASK \
  92. (((1 << DP_RX_DESC_POOL_ID_NUM_BITS) - 1) << DP_RX_DESC_POOL_ID_SHIFT)
  93. #define RX_DESC_MULTI_PAGE_COOKIE_PAGE_ID_MASK \
  94. (((1 << DP_RX_DESC_PAGE_ID_NUM_BITS) - 1) << \
  95. DP_RX_DESC_PAGE_ID_SHIFT)
  96. #define RX_DESC_MULTI_PAGE_COOKIE_OFFSET_MASK \
  97. ((1 << DP_RX_DESC_OFFSET_NUM_BITS) - 1)
  98. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_POOL_ID(_cookie) \
  99. (((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_POOL_ID_MASK) >> \
  100. DP_RX_DESC_POOL_ID_SHIFT)
  101. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_PAGE_ID(_cookie) \
  102. (((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_PAGE_ID_MASK) >> \
  103. DP_RX_DESC_PAGE_ID_SHIFT)
  104. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_OFFSET(_cookie) \
  105. ((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_OFFSET_MASK)
  106. #define RX_DESC_COOKIE_INDEX_SHIFT 0
  107. #define RX_DESC_COOKIE_INDEX_MASK 0x3ffff /* 18 bits */
  108. #define RX_DESC_COOKIE_POOL_ID_SHIFT 18
  109. #define RX_DESC_COOKIE_POOL_ID_MASK 0x1c0000
  110. #define DP_RX_DESC_COOKIE_MAX \
  111. (RX_DESC_COOKIE_INDEX_MASK | RX_DESC_COOKIE_POOL_ID_MASK)
  112. #define DP_RX_DESC_COOKIE_POOL_ID_GET(_cookie) \
  113. (((_cookie) & RX_DESC_COOKIE_POOL_ID_MASK) >> \
  114. RX_DESC_COOKIE_POOL_ID_SHIFT)
  115. #define DP_RX_DESC_COOKIE_INDEX_GET(_cookie) \
  116. (((_cookie) & RX_DESC_COOKIE_INDEX_MASK) >> \
  117. RX_DESC_COOKIE_INDEX_SHIFT)
  118. #define FRAME_MASK_IPV4_ARP 1
  119. #define FRAME_MASK_IPV4_DHCP 2
  120. #define FRAME_MASK_IPV4_EAPOL 4
  121. #define FRAME_MASK_IPV6_DHCP 8
  122. #ifdef DP_RX_SPECIAL_FRAME_NEED
  123. /**
  124. * dp_rx_is_special_frame() - check is RX frame special needed
  125. *
  126. * @nbuf: RX skb pointer
  127. * @frame_mask: the mask for speical frame needed
  128. *
  129. * Check is RX frame wanted matched with mask
  130. *
  131. * Return: true - special frame needed, false - no
  132. */
  133. static inline
  134. bool dp_rx_is_special_frame(qdf_nbuf_t nbuf, uint32_t frame_mask)
  135. {
  136. if (((frame_mask & FRAME_MASK_IPV4_ARP) &&
  137. qdf_nbuf_is_ipv4_arp_pkt(nbuf)) ||
  138. ((frame_mask & FRAME_MASK_IPV4_DHCP) &&
  139. qdf_nbuf_is_ipv4_dhcp_pkt(nbuf)) ||
  140. ((frame_mask & FRAME_MASK_IPV4_EAPOL) &&
  141. qdf_nbuf_is_ipv4_eapol_pkt(nbuf)) ||
  142. ((frame_mask & FRAME_MASK_IPV6_DHCP) &&
  143. qdf_nbuf_is_ipv6_dhcp_pkt(nbuf)))
  144. return true;
  145. return false;
  146. }
  147. /**
  148. * dp_rx_deliver_special_frame() - Deliver the RX special frame to stack
  149. * if matches mask
  150. *
  151. * @soc: Datapath soc handler
  152. * @peer: pointer to DP peer
  153. * @nbuf: pointer to the skb of RX frame
  154. * @frame_mask: the mask for speical frame needed
  155. *
  156. * note: Msdu_len must have been stored in QDF_NBUF_CB_RX_PKT_LEN(nbuf) and
  157. * single nbuf is expected.
  158. *
  159. * return: true - nbuf has been delivered to stack, false - not.
  160. */
  161. bool dp_rx_deliver_special_frame(struct dp_soc *soc, struct dp_peer *peer,
  162. qdf_nbuf_t nbuf, uint32_t frame_mask);
  163. #else
  164. static inline
  165. bool dp_rx_is_special_frame(qdf_nbuf_t nbuf, uint32_t frame_mask)
  166. {
  167. return false;
  168. }
  169. static inline
  170. bool dp_rx_deliver_special_frame(struct dp_soc *soc, struct dp_peer *peer,
  171. qdf_nbuf_t nbuf, uint32_t frame_mask)
  172. {
  173. return false;
  174. }
  175. #endif
  176. /* DOC: Offset to obtain LLC hdr
  177. *
  178. * In the case of Wifi parse error
  179. * to reach LLC header from beginning
  180. * of VLAN tag we need to skip 8 bytes.
  181. * Vlan_tag(4)+length(2)+length added
  182. * by HW(2) = 8 bytes.
  183. */
  184. #define DP_SKIP_VLAN 8
  185. /**
  186. * struct dp_rx_cached_buf - rx cached buffer
  187. * @list: linked list node
  188. * @buf: skb buffer
  189. */
  190. struct dp_rx_cached_buf {
  191. qdf_list_node_t node;
  192. qdf_nbuf_t buf;
  193. };
  194. /*
  195. *dp_rx_xor_block() - xor block of data
  196. *@b: destination data block
  197. *@a: source data block
  198. *@len: length of the data to process
  199. *
  200. *Returns: None
  201. */
  202. static inline void dp_rx_xor_block(uint8_t *b, const uint8_t *a, qdf_size_t len)
  203. {
  204. qdf_size_t i;
  205. for (i = 0; i < len; i++)
  206. b[i] ^= a[i];
  207. }
  208. /*
  209. *dp_rx_rotl() - rotate the bits left
  210. *@val: unsigned integer input value
  211. *@bits: number of bits
  212. *
  213. *Returns: Integer with left rotated by number of 'bits'
  214. */
  215. static inline uint32_t dp_rx_rotl(uint32_t val, int bits)
  216. {
  217. return (val << bits) | (val >> (32 - bits));
  218. }
  219. /*
  220. *dp_rx_rotr() - rotate the bits right
  221. *@val: unsigned integer input value
  222. *@bits: number of bits
  223. *
  224. *Returns: Integer with right rotated by number of 'bits'
  225. */
  226. static inline uint32_t dp_rx_rotr(uint32_t val, int bits)
  227. {
  228. return (val >> bits) | (val << (32 - bits));
  229. }
  230. /*
  231. * dp_set_rx_queue() - set queue_mapping in skb
  232. * @nbuf: skb
  233. * @queue_id: rx queue_id
  234. *
  235. * Return: void
  236. */
  237. #ifdef QCA_OL_RX_MULTIQ_SUPPORT
  238. static inline void dp_set_rx_queue(qdf_nbuf_t nbuf, uint8_t queue_id)
  239. {
  240. qdf_nbuf_record_rx_queue(nbuf, queue_id);
  241. return;
  242. }
  243. #else
  244. static inline void dp_set_rx_queue(qdf_nbuf_t nbuf, uint8_t queue_id)
  245. {
  246. }
  247. #endif
  248. /*
  249. *dp_rx_xswap() - swap the bits left
  250. *@val: unsigned integer input value
  251. *
  252. *Returns: Integer with bits swapped
  253. */
  254. static inline uint32_t dp_rx_xswap(uint32_t val)
  255. {
  256. return ((val & 0x00ff00ff) << 8) | ((val & 0xff00ff00) >> 8);
  257. }
  258. /*
  259. *dp_rx_get_le32_split() - get little endian 32 bits split
  260. *@b0: byte 0
  261. *@b1: byte 1
  262. *@b2: byte 2
  263. *@b3: byte 3
  264. *
  265. *Returns: Integer with split little endian 32 bits
  266. */
  267. static inline uint32_t dp_rx_get_le32_split(uint8_t b0, uint8_t b1, uint8_t b2,
  268. uint8_t b3)
  269. {
  270. return b0 | (b1 << 8) | (b2 << 16) | (b3 << 24);
  271. }
  272. /*
  273. *dp_rx_get_le32() - get little endian 32 bits
  274. *@b0: byte 0
  275. *@b1: byte 1
  276. *@b2: byte 2
  277. *@b3: byte 3
  278. *
  279. *Returns: Integer with little endian 32 bits
  280. */
  281. static inline uint32_t dp_rx_get_le32(const uint8_t *p)
  282. {
  283. return dp_rx_get_le32_split(p[0], p[1], p[2], p[3]);
  284. }
  285. /*
  286. * dp_rx_put_le32() - put little endian 32 bits
  287. * @p: destination char array
  288. * @v: source 32-bit integer
  289. *
  290. * Returns: None
  291. */
  292. static inline void dp_rx_put_le32(uint8_t *p, uint32_t v)
  293. {
  294. p[0] = (v) & 0xff;
  295. p[1] = (v >> 8) & 0xff;
  296. p[2] = (v >> 16) & 0xff;
  297. p[3] = (v >> 24) & 0xff;
  298. }
  299. /* Extract michal mic block of data */
  300. #define dp_rx_michael_block(l, r) \
  301. do { \
  302. r ^= dp_rx_rotl(l, 17); \
  303. l += r; \
  304. r ^= dp_rx_xswap(l); \
  305. l += r; \
  306. r ^= dp_rx_rotl(l, 3); \
  307. l += r; \
  308. r ^= dp_rx_rotr(l, 2); \
  309. l += r; \
  310. } while (0)
  311. /**
  312. * struct dp_rx_desc_list_elem_t
  313. *
  314. * @next : Next pointer to form free list
  315. * @rx_desc : DP Rx descriptor
  316. */
  317. union dp_rx_desc_list_elem_t {
  318. union dp_rx_desc_list_elem_t *next;
  319. struct dp_rx_desc rx_desc;
  320. };
  321. #ifdef RX_DESC_MULTI_PAGE_ALLOC
  322. /**
  323. * dp_rx_desc_find() - find dp rx descriptor from page ID and offset
  324. * @page_id: Page ID
  325. * @offset: Offset of the descriptor element
  326. *
  327. * Return: RX descriptor element
  328. */
  329. union dp_rx_desc_list_elem_t *dp_rx_desc_find(uint16_t page_id, uint16_t offset,
  330. struct rx_desc_pool *rx_pool);
  331. static inline
  332. struct dp_rx_desc *dp_get_rx_desc_from_cookie(struct dp_soc *soc,
  333. struct rx_desc_pool *pool,
  334. uint32_t cookie)
  335. {
  336. uint8_t pool_id = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_POOL_ID(cookie);
  337. uint16_t page_id = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_PAGE_ID(cookie);
  338. uint8_t offset = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_OFFSET(cookie);
  339. struct rx_desc_pool *rx_desc_pool;
  340. union dp_rx_desc_list_elem_t *rx_desc_elem;
  341. if (qdf_unlikely(pool_id >= MAX_RXDESC_POOLS))
  342. return NULL;
  343. rx_desc_pool = &pool[pool_id];
  344. rx_desc_elem = (union dp_rx_desc_list_elem_t *)
  345. (rx_desc_pool->desc_pages.cacheable_pages[page_id] +
  346. rx_desc_pool->elem_size * offset);
  347. return &rx_desc_elem->rx_desc;
  348. }
  349. /**
  350. * dp_rx_cookie_2_va_rxdma_buf() - Converts cookie to a virtual address of
  351. * the Rx descriptor on Rx DMA source ring buffer
  352. * @soc: core txrx main context
  353. * @cookie: cookie used to lookup virtual address
  354. *
  355. * Return: Pointer to the Rx descriptor
  356. */
  357. static inline
  358. struct dp_rx_desc *dp_rx_cookie_2_va_rxdma_buf(struct dp_soc *soc,
  359. uint32_t cookie)
  360. {
  361. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_buf[0], cookie);
  362. }
  363. /**
  364. * dp_rx_cookie_2_va_mon_buf() - Converts cookie to a virtual address of
  365. * the Rx descriptor on monitor ring buffer
  366. * @soc: core txrx main context
  367. * @cookie: cookie used to lookup virtual address
  368. *
  369. * Return: Pointer to the Rx descriptor
  370. */
  371. static inline
  372. struct dp_rx_desc *dp_rx_cookie_2_va_mon_buf(struct dp_soc *soc,
  373. uint32_t cookie)
  374. {
  375. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_mon[0], cookie);
  376. }
  377. /**
  378. * dp_rx_cookie_2_va_mon_status() - Converts cookie to a virtual address of
  379. * the Rx descriptor on monitor status ring buffer
  380. * @soc: core txrx main context
  381. * @cookie: cookie used to lookup virtual address
  382. *
  383. * Return: Pointer to the Rx descriptor
  384. */
  385. static inline
  386. struct dp_rx_desc *dp_rx_cookie_2_va_mon_status(struct dp_soc *soc,
  387. uint32_t cookie)
  388. {
  389. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_status[0], cookie);
  390. }
  391. #else
  392. /**
  393. * dp_rx_cookie_2_va_rxdma_buf() - Converts cookie to a virtual address of
  394. * the Rx descriptor on Rx DMA source ring buffer
  395. * @soc: core txrx main context
  396. * @cookie: cookie used to lookup virtual address
  397. *
  398. * Return: void *: Virtual Address of the Rx descriptor
  399. */
  400. static inline
  401. void *dp_rx_cookie_2_va_rxdma_buf(struct dp_soc *soc, uint32_t cookie)
  402. {
  403. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  404. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  405. struct rx_desc_pool *rx_desc_pool;
  406. if (qdf_unlikely(pool_id >= MAX_RXDESC_POOLS))
  407. return NULL;
  408. rx_desc_pool = &soc->rx_desc_buf[pool_id];
  409. if (qdf_unlikely(index >= rx_desc_pool->pool_size))
  410. return NULL;
  411. return &(soc->rx_desc_buf[pool_id].array[index].rx_desc);
  412. }
  413. /**
  414. * dp_rx_cookie_2_va_mon_buf() - Converts cookie to a virtual address of
  415. * the Rx descriptor on monitor ring buffer
  416. * @soc: core txrx main context
  417. * @cookie: cookie used to lookup virtual address
  418. *
  419. * Return: void *: Virtual Address of the Rx descriptor
  420. */
  421. static inline
  422. void *dp_rx_cookie_2_va_mon_buf(struct dp_soc *soc, uint32_t cookie)
  423. {
  424. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  425. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  426. /* TODO */
  427. /* Add sanity for pool_id & index */
  428. return &(soc->rx_desc_mon[pool_id].array[index].rx_desc);
  429. }
  430. /**
  431. * dp_rx_cookie_2_va_mon_status() - Converts cookie to a virtual address of
  432. * the Rx descriptor on monitor status ring buffer
  433. * @soc: core txrx main context
  434. * @cookie: cookie used to lookup virtual address
  435. *
  436. * Return: void *: Virtual Address of the Rx descriptor
  437. */
  438. static inline
  439. void *dp_rx_cookie_2_va_mon_status(struct dp_soc *soc, uint32_t cookie)
  440. {
  441. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  442. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  443. /* TODO */
  444. /* Add sanity for pool_id & index */
  445. return &(soc->rx_desc_status[pool_id].array[index].rx_desc);
  446. }
  447. #endif /* RX_DESC_MULTI_PAGE_ALLOC */
  448. void dp_rx_add_desc_list_to_free_list(struct dp_soc *soc,
  449. union dp_rx_desc_list_elem_t **local_desc_list,
  450. union dp_rx_desc_list_elem_t **tail,
  451. uint16_t pool_id,
  452. struct rx_desc_pool *rx_desc_pool);
  453. uint16_t dp_rx_get_free_desc_list(struct dp_soc *soc, uint32_t pool_id,
  454. struct rx_desc_pool *rx_desc_pool,
  455. uint16_t num_descs,
  456. union dp_rx_desc_list_elem_t **desc_list,
  457. union dp_rx_desc_list_elem_t **tail);
  458. QDF_STATUS dp_rx_pdev_attach(struct dp_pdev *pdev);
  459. void dp_rx_pdev_detach(struct dp_pdev *pdev);
  460. void dp_print_napi_stats(struct dp_soc *soc);
  461. /**
  462. * dp_rx_vdev_detach() - detach vdev from dp rx
  463. * @vdev: virtual device instance
  464. *
  465. * Return: QDF_STATUS_SUCCESS: success
  466. * QDF_STATUS_E_RESOURCES: Error return
  467. */
  468. QDF_STATUS dp_rx_vdev_detach(struct dp_vdev *vdev);
  469. uint32_t
  470. dp_rx_process(struct dp_intr *int_ctx, hal_ring_handle_t hal_ring_hdl,
  471. uint8_t reo_ring_num,
  472. uint32_t quota);
  473. /**
  474. * dp_rx_err_process() - Processes error frames routed to REO error ring
  475. * @int_ctx: pointer to DP interrupt context
  476. * @soc: core txrx main context
  477. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  478. * @quota: No. of units (packets) that can be serviced in one shot.
  479. *
  480. * This function implements error processing and top level demultiplexer
  481. * for all the frames routed to REO error ring.
  482. *
  483. * Return: uint32_t: No. of elements processed
  484. */
  485. uint32_t dp_rx_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  486. hal_ring_handle_t hal_ring_hdl, uint32_t quota);
  487. /**
  488. * dp_rx_wbm_err_process() - Processes error frames routed to WBM release ring
  489. * @int_ctx: pointer to DP interrupt context
  490. * @soc: core txrx main context
  491. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  492. * @quota: No. of units (packets) that can be serviced in one shot.
  493. *
  494. * This function implements error processing and top level demultiplexer
  495. * for all the frames routed to WBM2HOST sw release ring.
  496. *
  497. * Return: uint32_t: No. of elements processed
  498. */
  499. uint32_t
  500. dp_rx_wbm_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  501. hal_ring_handle_t hal_ring_hdl, uint32_t quota);
  502. /**
  503. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  504. * multiple nbufs.
  505. * @nbuf: pointer to the first msdu of an amsdu.
  506. *
  507. * This function implements the creation of RX frag_list for cases
  508. * where an MSDU is spread across multiple nbufs.
  509. *
  510. * Return: returns the head nbuf which contains complete frag_list.
  511. */
  512. qdf_nbuf_t dp_rx_sg_create(qdf_nbuf_t nbuf);
  513. /*
  514. * dp_rx_desc_pool_alloc() - create a pool of software rx_descs
  515. * at the time of dp rx initialization
  516. *
  517. * @soc: core txrx main context
  518. * @pool_id: pool_id which is one of 3 mac_ids
  519. * @pool_size: number of Rx descriptor in the pool
  520. * @rx_desc_pool: rx descriptor pool pointer
  521. *
  522. * Return: QDF status
  523. */
  524. QDF_STATUS dp_rx_desc_pool_alloc(struct dp_soc *soc, uint32_t pool_id,
  525. uint32_t pool_size, struct rx_desc_pool *pool);
  526. /*
  527. * dp_rx_desc_nbuf_and_pool_free() - free the sw rx desc pool called during
  528. * de-initialization of wifi module.
  529. *
  530. * @soc: core txrx main context
  531. * @pool_id: pool_id which is one of 3 mac_ids
  532. * @rx_desc_pool: rx descriptor pool pointer
  533. *
  534. * Return: None
  535. */
  536. void dp_rx_desc_nbuf_and_pool_free(struct dp_soc *soc, uint32_t pool_id,
  537. struct rx_desc_pool *rx_desc_pool);
  538. /*
  539. * dp_rx_desc_nbuf_free() - free the sw rx desc nbufs called during
  540. * de-initialization of wifi module.
  541. *
  542. * @soc: core txrx main context
  543. * @pool_id: pool_id which is one of 3 mac_ids
  544. * @rx_desc_pool: rx descriptor pool pointer
  545. *
  546. * Return: None
  547. */
  548. void dp_rx_desc_nbuf_free(struct dp_soc *soc,
  549. struct rx_desc_pool *rx_desc_pool);
  550. /*
  551. * dp_rx_desc_pool_free() - free the sw rx desc array called during
  552. * de-initialization of wifi module.
  553. *
  554. * @soc: core txrx main context
  555. * @rx_desc_pool: rx descriptor pool pointer
  556. *
  557. * Return: None
  558. */
  559. void dp_rx_desc_pool_free(struct dp_soc *soc,
  560. struct rx_desc_pool *rx_desc_pool);
  561. void dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  562. struct dp_peer *peer);
  563. /**
  564. * dp_rx_add_to_free_desc_list() - Adds to a local free descriptor list
  565. *
  566. * @head: pointer to the head of local free list
  567. * @tail: pointer to the tail of local free list
  568. * @new: new descriptor that is added to the free list
  569. *
  570. * Return: void:
  571. */
  572. static inline
  573. void dp_rx_add_to_free_desc_list(union dp_rx_desc_list_elem_t **head,
  574. union dp_rx_desc_list_elem_t **tail,
  575. struct dp_rx_desc *new)
  576. {
  577. qdf_assert(head && new);
  578. new->nbuf = NULL;
  579. new->in_use = 0;
  580. ((union dp_rx_desc_list_elem_t *)new)->next = *head;
  581. *head = (union dp_rx_desc_list_elem_t *)new;
  582. /* reset tail if head->next is NULL */
  583. if (!*tail || !(*head)->next)
  584. *tail = *head;
  585. }
  586. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t nbuf,
  587. uint8_t mac_id);
  588. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  589. qdf_nbuf_t mpdu, bool mpdu_done, uint8_t mac_id);
  590. void dp_rx_process_mic_error(struct dp_soc *soc, qdf_nbuf_t nbuf,
  591. uint8_t *rx_tlv_hdr, struct dp_peer *peer);
  592. void dp_2k_jump_handle(struct dp_soc *soc, qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr,
  593. uint16_t peer_id, uint8_t tid);
  594. #define DP_RX_LIST_APPEND(head, tail, elem) \
  595. do { \
  596. if (!(head)) { \
  597. (head) = (elem); \
  598. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(head) = 1;\
  599. } else { \
  600. qdf_nbuf_set_next((tail), (elem)); \
  601. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(head)++; \
  602. } \
  603. (tail) = (elem); \
  604. qdf_nbuf_set_next((tail), NULL); \
  605. } while (0)
  606. /*for qcn9000 emulation the pcie is complete phy and no address restrictions*/
  607. #if !defined(BUILD_X86) || defined(QCA_WIFI_QCN9000)
  608. static inline int check_x86_paddr(struct dp_soc *dp_soc, qdf_nbuf_t *rx_netbuf,
  609. qdf_dma_addr_t *paddr, struct rx_desc_pool *rx_desc_pool)
  610. {
  611. return QDF_STATUS_SUCCESS;
  612. }
  613. #else
  614. #define MAX_RETRY 100
  615. static inline int check_x86_paddr(struct dp_soc *dp_soc, qdf_nbuf_t *rx_netbuf,
  616. qdf_dma_addr_t *paddr, struct rx_desc_pool *rx_desc_pool)
  617. {
  618. uint32_t nbuf_retry = 0;
  619. int32_t ret;
  620. const uint32_t x86_phy_addr = 0x50000000;
  621. /*
  622. * in M2M emulation platforms (x86) the memory below 0x50000000
  623. * is reserved for target use, so any memory allocated in this
  624. * region should not be used by host
  625. */
  626. do {
  627. if (qdf_likely(*paddr > x86_phy_addr))
  628. return QDF_STATUS_SUCCESS;
  629. else {
  630. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  631. "phy addr %pK exceeded 0x50000000 trying again",
  632. paddr);
  633. nbuf_retry++;
  634. if ((*rx_netbuf)) {
  635. qdf_nbuf_unmap_single(dp_soc->osdev, *rx_netbuf,
  636. QDF_DMA_FROM_DEVICE);
  637. /* Not freeing buffer intentionally.
  638. * Observed that same buffer is getting
  639. * re-allocated resulting in longer load time
  640. * WMI init timeout.
  641. * This buffer is anyway not useful so skip it.
  642. **/
  643. }
  644. *rx_netbuf = qdf_nbuf_alloc(dp_soc->osdev,
  645. rx_desc_pool->buf_size,
  646. RX_BUFFER_RESERVATION,
  647. rx_desc_pool->buf_alignment,
  648. FALSE);
  649. if (qdf_unlikely(!(*rx_netbuf)))
  650. return QDF_STATUS_E_FAILURE;
  651. ret = qdf_nbuf_map_single(dp_soc->osdev, *rx_netbuf,
  652. QDF_DMA_FROM_DEVICE);
  653. if (qdf_unlikely(ret == QDF_STATUS_E_FAILURE)) {
  654. qdf_nbuf_free(*rx_netbuf);
  655. *rx_netbuf = NULL;
  656. continue;
  657. }
  658. *paddr = qdf_nbuf_get_frag_paddr(*rx_netbuf, 0);
  659. }
  660. } while (nbuf_retry < MAX_RETRY);
  661. if ((*rx_netbuf)) {
  662. qdf_nbuf_unmap_single(dp_soc->osdev, *rx_netbuf,
  663. QDF_DMA_FROM_DEVICE);
  664. qdf_nbuf_free(*rx_netbuf);
  665. }
  666. return QDF_STATUS_E_FAILURE;
  667. }
  668. #endif
  669. /**
  670. * dp_rx_cookie_2_link_desc_va() - Converts cookie to a virtual address of
  671. * the MSDU Link Descriptor
  672. * @soc: core txrx main context
  673. * @buf_info: buf_info includes cookie that is used to lookup
  674. * virtual address of link descriptor after deriving the page id
  675. * and the offset or index of the desc on the associatde page.
  676. *
  677. * This is the VA of the link descriptor, that HAL layer later uses to
  678. * retrieve the list of MSDU's for a given MPDU.
  679. *
  680. * Return: void *: Virtual Address of the Rx descriptor
  681. */
  682. static inline
  683. void *dp_rx_cookie_2_link_desc_va(struct dp_soc *soc,
  684. struct hal_buf_info *buf_info)
  685. {
  686. void *link_desc_va;
  687. struct qdf_mem_multi_page_t *pages;
  688. uint16_t page_id = LINK_DESC_COOKIE_PAGE_ID(buf_info->sw_cookie);
  689. pages = &soc->link_desc_pages;
  690. if (!pages)
  691. return NULL;
  692. if (qdf_unlikely(page_id >= pages->num_pages))
  693. return NULL;
  694. link_desc_va = pages->dma_pages[page_id].page_v_addr_start +
  695. (buf_info->paddr - pages->dma_pages[page_id].page_p_addr);
  696. return link_desc_va;
  697. }
  698. /**
  699. * dp_rx_cookie_2_mon_link_desc_va() - Converts cookie to a virtual address of
  700. * the MSDU Link Descriptor
  701. * @pdev: core txrx pdev context
  702. * @buf_info: buf_info includes cookie that used to lookup virtual address of
  703. * link descriptor. Normally this is just an index into a per pdev array.
  704. *
  705. * This is the VA of the link descriptor in monitor mode destination ring,
  706. * that HAL layer later uses to retrieve the list of MSDU's for a given MPDU.
  707. *
  708. * Return: void *: Virtual Address of the Rx descriptor
  709. */
  710. static inline
  711. void *dp_rx_cookie_2_mon_link_desc_va(struct dp_pdev *pdev,
  712. struct hal_buf_info *buf_info,
  713. int mac_id)
  714. {
  715. void *link_desc_va;
  716. /* TODO */
  717. /* Add sanity for cookie */
  718. link_desc_va =
  719. pdev->soc->mon_link_desc_banks[mac_id][buf_info->sw_cookie]
  720. .base_vaddr +
  721. (buf_info->paddr -
  722. pdev->soc->mon_link_desc_banks[mac_id][buf_info->sw_cookie]
  723. .base_paddr);
  724. return link_desc_va;
  725. }
  726. /**
  727. * dp_rx_defrag_concat() - Concatenate the fragments
  728. *
  729. * @dst: destination pointer to the buffer
  730. * @src: source pointer from where the fragment payload is to be copied
  731. *
  732. * Return: QDF_STATUS
  733. */
  734. static inline QDF_STATUS dp_rx_defrag_concat(qdf_nbuf_t dst, qdf_nbuf_t src)
  735. {
  736. /*
  737. * Inside qdf_nbuf_cat, if it is necessary to reallocate dst
  738. * to provide space for src, the headroom portion is copied from
  739. * the original dst buffer to the larger new dst buffer.
  740. * (This is needed, because the headroom of the dst buffer
  741. * contains the rx desc.)
  742. */
  743. if (!qdf_nbuf_cat(dst, src)) {
  744. /*
  745. * qdf_nbuf_cat does not free the src memory.
  746. * Free src nbuf before returning
  747. * For failure case the caller takes of freeing the nbuf
  748. */
  749. qdf_nbuf_free(src);
  750. return QDF_STATUS_SUCCESS;
  751. }
  752. return QDF_STATUS_E_DEFRAG_ERROR;
  753. }
  754. #ifndef FEATURE_WDS
  755. static inline QDF_STATUS dp_rx_ast_set_active(struct dp_soc *soc, uint16_t sa_idx, bool is_active)
  756. {
  757. return QDF_STATUS_SUCCESS;
  758. }
  759. static inline void
  760. dp_rx_wds_srcport_learn(struct dp_soc *soc,
  761. uint8_t *rx_tlv_hdr,
  762. struct dp_peer *ta_peer,
  763. qdf_nbuf_t nbuf,
  764. struct hal_rx_msdu_metadata msdu_metadata)
  765. {
  766. }
  767. #endif
  768. /*
  769. * dp_rx_desc_dump() - dump the sw rx descriptor
  770. *
  771. * @rx_desc: sw rx descriptor
  772. */
  773. static inline void dp_rx_desc_dump(struct dp_rx_desc *rx_desc)
  774. {
  775. dp_info("rx_desc->nbuf: %pK, rx_desc->cookie: %d, rx_desc->pool_id: %d, rx_desc->in_use: %d, rx_desc->unmapped: %d",
  776. rx_desc->nbuf, rx_desc->cookie, rx_desc->pool_id,
  777. rx_desc->in_use, rx_desc->unmapped);
  778. }
  779. /*
  780. * check_qwrap_multicast_loopback() - Check if rx packet is a loopback packet.
  781. * In qwrap mode, packets originated from
  782. * any vdev should not loopback and
  783. * should be dropped.
  784. * @vdev: vdev on which rx packet is received
  785. * @nbuf: rx pkt
  786. *
  787. */
  788. #if ATH_SUPPORT_WRAP
  789. static inline bool check_qwrap_multicast_loopback(struct dp_vdev *vdev,
  790. qdf_nbuf_t nbuf)
  791. {
  792. struct dp_vdev *psta_vdev;
  793. struct dp_pdev *pdev = vdev->pdev;
  794. uint8_t *data = qdf_nbuf_data(nbuf);
  795. if (qdf_unlikely(vdev->proxysta_vdev)) {
  796. /* In qwrap isolation mode, allow loopback packets as all
  797. * packets go to RootAP and Loopback on the mpsta.
  798. */
  799. if (vdev->isolation_vdev)
  800. return false;
  801. TAILQ_FOREACH(psta_vdev, &pdev->vdev_list, vdev_list_elem) {
  802. if (qdf_unlikely(psta_vdev->proxysta_vdev &&
  803. !qdf_mem_cmp(psta_vdev->mac_addr.raw,
  804. &data[QDF_MAC_ADDR_SIZE],
  805. QDF_MAC_ADDR_SIZE))) {
  806. /* Drop packet if source address is equal to
  807. * any of the vdev addresses.
  808. */
  809. return true;
  810. }
  811. }
  812. }
  813. return false;
  814. }
  815. #else
  816. static inline bool check_qwrap_multicast_loopback(struct dp_vdev *vdev,
  817. qdf_nbuf_t nbuf)
  818. {
  819. return false;
  820. }
  821. #endif
  822. #if defined(WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG) ||\
  823. defined(WLAN_SUPPORT_RX_TAG_STATISTICS) ||\
  824. defined(WLAN_SUPPORT_RX_FLOW_TAG)
  825. #include "dp_rx_tag.h"
  826. #endif
  827. #ifndef WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG
  828. /**
  829. * dp_rx_update_protocol_tag() - Reads CCE metadata from the RX MSDU end TLV
  830. * and set the corresponding tag in QDF packet
  831. * @soc: core txrx main context
  832. * @vdev: vdev on which the packet is received
  833. * @nbuf: QDF pkt buffer on which the protocol tag should be set
  834. * @rx_tlv_hdr: rBbase address where the RX TLVs starts
  835. * @ring_index: REO ring number, not used for error & monitor ring
  836. * @is_reo_exception: flag to indicate if rx from REO ring or exception ring
  837. * @is_update_stats: flag to indicate whether to update stats or not
  838. * Return: void
  839. */
  840. static inline void
  841. dp_rx_update_protocol_tag(struct dp_soc *soc, struct dp_vdev *vdev,
  842. qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr,
  843. uint16_t ring_index,
  844. bool is_reo_exception, bool is_update_stats)
  845. {
  846. }
  847. #endif /* WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG */
  848. #ifndef WLAN_SUPPORT_RX_FLOW_TAG
  849. /**
  850. * dp_rx_update_flow_tag() - Reads FSE metadata from the RX MSDU end TLV
  851. * and set the corresponding tag in QDF packet
  852. * @soc: core txrx main context
  853. * @vdev: vdev on which the packet is received
  854. * @nbuf: QDF pkt buffer on which the protocol tag should be set
  855. * @rx_tlv_hdr: base address where the RX TLVs starts
  856. * @is_update_stats: flag to indicate whether to update stats or not
  857. *
  858. * Return: void
  859. */
  860. static inline void
  861. dp_rx_update_flow_tag(struct dp_soc *soc, struct dp_vdev *vdev,
  862. qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr, bool update_stats)
  863. {
  864. }
  865. #endif /* WLAN_SUPPORT_RX_FLOW_TAG */
  866. #if !defined(WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG) &&\
  867. !defined(WLAN_SUPPORT_RX_FLOW_TAG)
  868. /**
  869. * dp_rx_mon_update_protocol_flow_tag() - Performs necessary checks for monitor
  870. * mode and then tags appropriate packets
  871. * @soc: core txrx main context
  872. * @vdev: pdev on which packet is received
  873. * @msdu: QDF packet buffer on which the protocol tag should be set
  874. * @rx_desc: base address where the RX TLVs start
  875. * Return: void
  876. */
  877. static inline
  878. void dp_rx_mon_update_protocol_flow_tag(struct dp_soc *soc,
  879. struct dp_pdev *dp_pdev,
  880. qdf_nbuf_t msdu, void *rx_desc)
  881. {
  882. }
  883. #endif /* WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG || WLAN_SUPPORT_RX_FLOW_TAG */
  884. /*
  885. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  886. * called during dp rx initialization
  887. * and at the end of dp_rx_process.
  888. *
  889. * @soc: core txrx main context
  890. * @mac_id: mac_id which is one of 3 mac_ids
  891. * @dp_rxdma_srng: dp rxdma circular ring
  892. * @rx_desc_pool: Pointer to free Rx descriptor pool
  893. * @num_req_buffers: number of buffer to be replenished
  894. * @desc_list: list of descs if called from dp_rx_process
  895. * or NULL during dp rx initialization or out of buffer
  896. * interrupt.
  897. * @tail: tail of descs list
  898. * Return: return success or failure
  899. */
  900. QDF_STATUS dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  901. struct dp_srng *dp_rxdma_srng,
  902. struct rx_desc_pool *rx_desc_pool,
  903. uint32_t num_req_buffers,
  904. union dp_rx_desc_list_elem_t **desc_list,
  905. union dp_rx_desc_list_elem_t **tail);
  906. /*
  907. * dp_pdev_rx_buffers_attach() - replenish rxdma ring with rx nbufs
  908. * called during dp rx initialization
  909. *
  910. * @soc: core txrx main context
  911. * @mac_id: mac_id which is one of 3 mac_ids
  912. * @dp_rxdma_srng: dp rxdma circular ring
  913. * @rx_desc_pool: Pointer to free Rx descriptor pool
  914. * @num_req_buffers: number of buffer to be replenished
  915. *
  916. * Return: return success or failure
  917. */
  918. QDF_STATUS
  919. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  920. struct dp_srng *dp_rxdma_srng,
  921. struct rx_desc_pool *rx_desc_pool,
  922. uint32_t num_req_buffers);
  923. /**
  924. * dp_rx_link_desc_return() - Return a MPDU link descriptor to HW
  925. * (WBM), following error handling
  926. *
  927. * @soc: core DP main context
  928. * @buf_addr_info: opaque pointer to the REO error ring descriptor
  929. * @buf_addr_info: void pointer to the buffer_addr_info
  930. * @bm_action: put to idle_list or release to msdu_list
  931. *
  932. * Return: QDF_STATUS_E_FAILURE for failure else QDF_STATUS_SUCCESS
  933. */
  934. QDF_STATUS
  935. dp_rx_link_desc_return(struct dp_soc *soc, hal_ring_desc_t ring_desc,
  936. uint8_t bm_action);
  937. /**
  938. * dp_rx_link_desc_return_by_addr - Return a MPDU link descriptor to
  939. * (WBM) by address
  940. *
  941. * @soc: core DP main context
  942. * @link_desc_addr: link descriptor addr
  943. *
  944. * Return: QDF_STATUS_E_FAILURE for failure else QDF_STATUS_SUCCESS
  945. */
  946. QDF_STATUS
  947. dp_rx_link_desc_return_by_addr(struct dp_soc *soc,
  948. hal_buff_addrinfo_t link_desc_addr,
  949. uint8_t bm_action);
  950. /**
  951. * dp_rxdma_err_process() - RxDMA error processing functionality
  952. * @soc: core txrx main contex
  953. * @mac_id: mac id which is one of 3 mac_ids
  954. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  955. * @quota: No. of units (packets) that can be serviced in one shot.
  956. *
  957. * Return: num of buffers processed
  958. */
  959. uint32_t
  960. dp_rxdma_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  961. uint32_t mac_id, uint32_t quota);
  962. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  963. uint8_t *rx_tlv_hdr, struct dp_peer *peer);
  964. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  965. uint8_t *rx_tlv_hdr);
  966. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr, struct dp_vdev *vdev,
  967. struct dp_peer *peer);
  968. qdf_nbuf_t
  969. dp_rx_nbuf_prepare(struct dp_soc *soc, struct dp_pdev *pdev);
  970. /*
  971. * dp_rx_dump_info_and_assert() - dump RX Ring info and Rx Desc info
  972. *
  973. * @soc: core txrx main context
  974. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  975. * @ring_desc: opaque pointer to the RX ring descriptor
  976. * @rx_desc: host rs descriptor
  977. *
  978. * Return: void
  979. */
  980. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  981. hal_ring_handle_t hal_ring_hdl,
  982. hal_ring_desc_t ring_desc,
  983. struct dp_rx_desc *rx_desc);
  984. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf);
  985. #ifdef RX_DESC_DEBUG_CHECK
  986. /**
  987. * dp_rx_desc_check_magic() - check the magic value in dp_rx_desc
  988. * @rx_desc: rx descriptor pointer
  989. *
  990. * Return: true, if magic is correct, else false.
  991. */
  992. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  993. {
  994. if (qdf_unlikely(rx_desc->magic != DP_RX_DESC_MAGIC))
  995. return false;
  996. rx_desc->magic = 0;
  997. return true;
  998. }
  999. /**
  1000. * dp_rx_desc_prep() - prepare rx desc
  1001. * @rx_desc: rx descriptor pointer to be prepared
  1002. * @nbuf: nbuf to be associated with rx_desc
  1003. *
  1004. * Note: assumption is that we are associating a nbuf which is mapped
  1005. *
  1006. * Return: none
  1007. */
  1008. static inline void dp_rx_desc_prep(struct dp_rx_desc *rx_desc, qdf_nbuf_t nbuf)
  1009. {
  1010. rx_desc->magic = DP_RX_DESC_MAGIC;
  1011. rx_desc->nbuf = nbuf;
  1012. rx_desc->unmapped = 0;
  1013. }
  1014. #else
  1015. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  1016. {
  1017. return true;
  1018. }
  1019. static inline void dp_rx_desc_prep(struct dp_rx_desc *rx_desc, qdf_nbuf_t nbuf)
  1020. {
  1021. rx_desc->nbuf = nbuf;
  1022. rx_desc->unmapped = 0;
  1023. }
  1024. #endif /* RX_DESC_DEBUG_CHECK */
  1025. void dp_rx_process_rxdma_err(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1026. uint8_t *rx_tlv_hdr, struct dp_peer *peer,
  1027. uint8_t err_code, uint8_t mac_id);
  1028. #ifdef PEER_CACHE_RX_PKTS
  1029. /**
  1030. * dp_rx_flush_rx_cached() - flush cached rx frames
  1031. * @peer: peer
  1032. * @drop: set flag to drop frames
  1033. *
  1034. * Return: None
  1035. */
  1036. void dp_rx_flush_rx_cached(struct dp_peer *peer, bool drop);
  1037. #else
  1038. static inline void dp_rx_flush_rx_cached(struct dp_peer *peer, bool drop)
  1039. {
  1040. }
  1041. #endif
  1042. #ifndef QCA_MULTIPASS_SUPPORT
  1043. static inline
  1044. bool dp_rx_multipass_process(struct dp_peer *peer, qdf_nbuf_t nbuf, uint8_t tid)
  1045. {
  1046. return false;
  1047. }
  1048. #else
  1049. bool dp_rx_multipass_process(struct dp_peer *peer, qdf_nbuf_t nbuf,
  1050. uint8_t tid);
  1051. #endif
  1052. #ifndef WLAN_RX_PKT_CAPTURE_ENH
  1053. static inline
  1054. QDF_STATUS dp_peer_set_rx_capture_enabled(struct dp_pdev *pdev,
  1055. struct dp_peer *peer_handle,
  1056. bool value, uint8_t *mac_addr)
  1057. {
  1058. return QDF_STATUS_SUCCESS;
  1059. }
  1060. #endif
  1061. /**
  1062. * dp_rx_deliver_to_stack() - deliver pkts to network stack
  1063. * Caller to hold peer refcount and check for valid peer
  1064. * @soc: soc
  1065. * @vdev: vdev
  1066. * @peer: peer
  1067. * @nbuf_head: skb list head
  1068. * @nbuf_tail: skb list tail
  1069. *
  1070. * Return: None
  1071. */
  1072. void dp_rx_deliver_to_stack(struct dp_soc *soc,
  1073. struct dp_vdev *vdev,
  1074. struct dp_peer *peer,
  1075. qdf_nbuf_t nbuf_head,
  1076. qdf_nbuf_t nbuf_tail);
  1077. #ifdef QCA_OL_RX_LOCK_LESS_ACCESS
  1078. /*
  1079. * dp_rx_ring_access_start()- Wrapper function to log access start of a hal ring
  1080. * @int_ctx: pointer to DP interrupt context
  1081. * @dp_soc - DP soc structure pointer
  1082. * @hal_ring_hdl - HAL ring handle
  1083. *
  1084. * Return: 0 on success; error on failure
  1085. */
  1086. static inline int
  1087. dp_rx_srng_access_start(struct dp_intr *int_ctx, struct dp_soc *soc,
  1088. hal_ring_handle_t hal_ring_hdl)
  1089. {
  1090. return hal_srng_access_start_unlocked(soc->hal_soc, hal_ring_hdl);
  1091. }
  1092. /*
  1093. * dp_rx_ring_access_end()- Wrapper function to log access end of a hal ring
  1094. * @int_ctx: pointer to DP interrupt context
  1095. * @dp_soc - DP soc structure pointer
  1096. * @hal_ring_hdl - HAL ring handle
  1097. *
  1098. * Return - None
  1099. */
  1100. static inline void
  1101. dp_rx_srng_access_end(struct dp_intr *int_ctx, struct dp_soc *soc,
  1102. hal_ring_handle_t hal_ring_hdl)
  1103. {
  1104. hal_srng_access_end_unlocked(soc->hal_soc, hal_ring_hdl);
  1105. }
  1106. #else
  1107. static inline int
  1108. dp_rx_srng_access_start(struct dp_intr *int_ctx, struct dp_soc *soc,
  1109. hal_ring_handle_t hal_ring_hdl)
  1110. {
  1111. return dp_srng_access_start(int_ctx, soc, hal_ring_hdl);
  1112. }
  1113. static inline void
  1114. dp_rx_srng_access_end(struct dp_intr *int_ctx, struct dp_soc *soc,
  1115. hal_ring_handle_t hal_ring_hdl)
  1116. {
  1117. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  1118. }
  1119. #endif
  1120. #endif /* _DP_RX_H */