dp_rx_err.c 20 KB

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  1. /*
  2. * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "dp_types.h"
  19. #include "dp_rx.h"
  20. #include "dp_peer.h"
  21. #include "dp_internal.h"
  22. #include "hal_api.h"
  23. #include "qdf_trace.h"
  24. #include "qdf_nbuf.h"
  25. #ifdef CONFIG_MCL
  26. #include <cds_ieee80211_common.h>
  27. #else
  28. #include <ieee80211.h>
  29. #endif
  30. /**
  31. * dp_rx_cookie_2_link_desc_va() - Converts cookie to a virtual address of
  32. * the MSDU Link Descriptor
  33. * @soc: core txrx main context
  34. * @cookie: cookie used to lookup virtual address of link descriptor
  35. * Normally this is just an index into a per SOC array.
  36. *
  37. * This is the VA of the link descriptor, that HAL layer later uses to
  38. * retrieve the list of MSDU's for a given .
  39. *
  40. * Return: void *: Virtual Address of the Rx descriptor
  41. */
  42. static inline
  43. void *dp_rx_cookie_2_link_desc_va(struct dp_soc *soc,
  44. struct hal_buf_info *buf_info)
  45. {
  46. void *link_desc_va;
  47. /* TODO */
  48. /* Add sanity for cookie */
  49. link_desc_va = soc->link_desc_banks[buf_info->sw_cookie].base_vaddr +
  50. (buf_info->paddr -
  51. soc->link_desc_banks[buf_info->sw_cookie].base_paddr);
  52. return link_desc_va;
  53. }
  54. /**
  55. * dp_rx_frag_handle() - Handles fragmented Rx frames
  56. *
  57. * @soc: core txrx main context
  58. * @ring_desc: opaque pointer to the REO error ring descriptor
  59. * @mpdu_desc_info: MPDU descriptor information from ring descriptor
  60. * @head: head of the local descriptor free-list
  61. * @tail: tail of the local descriptor free-list
  62. * @quota: No. of units (packets) that can be serviced in one shot.
  63. *
  64. * This function implements RX 802.11 fragmentation handling
  65. * The handling is mostly same as legacy fragmentation handling.
  66. * If required, this function can re-inject the frames back to
  67. * REO ring (with proper setting to by-pass fragmentation check
  68. * but use duplicate detection / re-ordering and routing these frames
  69. * to a different core.
  70. *
  71. * Return: uint32_t: No. of elements processed
  72. */
  73. static uint32_t
  74. dp_rx_frag_handle(struct dp_soc *soc, void *ring_desc,
  75. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  76. union dp_rx_desc_list_elem_t **head,
  77. union dp_rx_desc_list_elem_t **tail,
  78. uint32_t quota)
  79. {
  80. uint32_t rx_bufs_used = 0;
  81. return rx_bufs_used;
  82. }
  83. /**
  84. * dp_rx_msdus_drop() - Drops all MSDU's per MPDU
  85. *
  86. * @soc: core txrx main context
  87. * @ring_desc: opaque pointer to the REO error ring descriptor
  88. * @mpdu_desc_info: MPDU descriptor information from ring descriptor
  89. * @head: head of the local descriptor free-list
  90. * @tail: tail of the local descriptor free-list
  91. * @quota: No. of units (packets) that can be serviced in one shot.
  92. *
  93. * This function is used to drop all MSDU in an MPDU
  94. *
  95. * Return: uint32_t: No. of elements processed
  96. */
  97. static uint32_t
  98. dp_rx_msdus_drop(struct dp_soc *soc, void *ring_desc,
  99. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  100. union dp_rx_desc_list_elem_t **head,
  101. union dp_rx_desc_list_elem_t **tail,
  102. uint32_t quota)
  103. {
  104. uint8_t num_msdus;
  105. uint32_t rx_bufs_used = 0;
  106. void *link_desc_va;
  107. struct hal_buf_info buf_info;
  108. struct hal_rx_msdu_list msdu_list; /* MSDU's per MPDU */
  109. int i;
  110. hal_rx_reo_buf_paddr_get(ring_desc, &buf_info);
  111. link_desc_va = dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  112. qdf_assert(rx_msdu_link_desc);
  113. /* No UNMAP required -- this is "malloc_consistent" memory */
  114. hal_rx_msdu_list_get(link_desc_va, &msdu_list, &num_msdus);
  115. for (i = 0; (i < HAL_RX_NUM_MSDU_DESC) && quota--; i++) {
  116. struct dp_rx_desc *rx_desc =
  117. dp_rx_cookie_2_va(soc, msdu_list.sw_cookie[i]);
  118. qdf_assert(rx_desc);
  119. rx_bufs_used++;
  120. /* Just free the buffers */
  121. qdf_nbuf_free(rx_desc->nbuf);
  122. dp_rx_add_to_free_desc_list(head, tail, rx_desc);
  123. }
  124. return rx_bufs_used;
  125. }
  126. /**
  127. * dp_rx_pn_error_handle() - Handles PN check errors
  128. *
  129. * @soc: core txrx main context
  130. * @ring_desc: opaque pointer to the REO error ring descriptor
  131. * @mpdu_desc_info: MPDU descriptor information from ring descriptor
  132. * @head: head of the local descriptor free-list
  133. * @tail: tail of the local descriptor free-list
  134. * @quota: No. of units (packets) that can be serviced in one shot.
  135. *
  136. * This function implements PN error handling
  137. * If the peer is configured to ignore the PN check errors
  138. * or if DP feels, that this frame is still OK, the frame can be
  139. * re-injected back to REO to use some of the other features
  140. * of REO e.g. duplicate detection/routing to other cores
  141. *
  142. * Return: uint32_t: No. of elements processed
  143. */
  144. static uint32_t
  145. dp_rx_pn_error_handle(struct dp_soc *soc, void *ring_desc,
  146. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  147. union dp_rx_desc_list_elem_t **head,
  148. union dp_rx_desc_list_elem_t **tail,
  149. uint32_t quota)
  150. {
  151. uint16_t peer_id;
  152. uint32_t rx_bufs_used = 0;
  153. struct dp_peer *peer;
  154. bool peer_pn_policy = false;
  155. peer_id = DP_PEER_METADATA_PEER_ID_GET(
  156. mpdu_desc_info->peer_meta_data);
  157. peer = dp_peer_find_by_id(soc, peer_id);
  158. if (qdf_likely(peer)) {
  159. /*
  160. * TODO: Check for peer specific policies & set peer_pn_policy
  161. */
  162. }
  163. /* No peer PN policy -- definitely drop */
  164. if (!peer_pn_policy)
  165. rx_bufs_used = dp_rx_msdus_drop(soc, ring_desc,
  166. mpdu_desc_info,
  167. head, tail, quota);
  168. return rx_bufs_used;
  169. }
  170. /**
  171. * dp_rx_2k_jump_handle() - Handles Sequence Number Jump by 2K
  172. *
  173. * @soc: core txrx main context
  174. * @ring_desc: opaque pointer to the REO error ring descriptor
  175. * @mpdu_desc_info: MPDU descriptor information from ring descriptor
  176. * @head: head of the local descriptor free-list
  177. * @tail: tail of the local descriptor free-list
  178. * @quota: No. of units (packets) that can be serviced in one shot.
  179. *
  180. * This function implements the error handling when sequence number
  181. * of the MPDU jumps suddenly by 2K.Today there are 2 cases that
  182. * need to be handled:
  183. * A) CSN (Current Sequence Number) = Last Valid SN (LSN) + 2K
  184. * B) CSN = LSN + 2K, but falls within a "BA sized window" of the SSN
  185. * For case A) the protocol stack is invoked to generate DELBA/DEAUTH frame
  186. * For case B), the frame is normally dropped, no more action is taken
  187. *
  188. * Return: uint32_t: No. of elements processed
  189. */
  190. static uint32_t
  191. dp_rx_2k_jump_handle(struct dp_soc *soc, void *ring_desc,
  192. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  193. union dp_rx_desc_list_elem_t **head,
  194. union dp_rx_desc_list_elem_t **tail,
  195. uint32_t quota)
  196. {
  197. return dp_rx_msdus_drop(soc, ring_desc, mpdu_desc_info,
  198. head, tail, quota);
  199. }
  200. /**
  201. * dp_rx_null_q_desc_handle() - Function to handle NULL Queue
  202. * descriptor violation on either a
  203. * REO or WBM ring
  204. *
  205. * @soc: core DP main context
  206. * @ring_desc: opaque pointer to the REO error ring descriptor
  207. * @head: pointer to head of rx descriptors to be added to free list
  208. * @tail: pointer to tail of rx descriptors to be added to free list
  209. * quota: upper limit of descriptors that can be reaped
  210. *
  211. * This function handles NULL queue descriptor violations arising out
  212. * a missing REO queue for a given peer or a given TID. This typically
  213. * may happen if a packet is received on a QOS enabled TID before the
  214. * ADDBA negotiation for that TID, when the TID queue is setup. Or
  215. * it may also happen for MC/BC frames if they are not routed to the
  216. * non-QOS TID queue, in the absence of any other default TID queue.
  217. * This error can show up both in a REO destination or WBM release ring.
  218. *
  219. * Return: uint32_t: No. of Rx buffers reaped
  220. */
  221. static uint32_t
  222. dp_rx_null_q_desc_handle(struct dp_soc *soc, void *ring_desc,
  223. union dp_rx_desc_list_elem_t **head,
  224. union dp_rx_desc_list_elem_t **tail,
  225. uint32_t quota)
  226. {
  227. uint32_t rx_buf_cookie;
  228. struct dp_rx_desc *rx_desc;
  229. uint32_t rx_bufs_used = 0;
  230. uint32_t pkt_len, l2_hdr_offset;
  231. uint16_t msdu_len;
  232. qdf_nbuf_t nbuf;
  233. struct dp_pdev *pdev0;
  234. struct dp_vdev *vdev0;
  235. uint32_t tid = 0;
  236. uint16_t peer_id = 0xFFFF;
  237. struct dp_peer *peer = NULL;
  238. rx_buf_cookie = HAL_RX_WBM_BUF_COOKIE_GET(ring_desc);
  239. rx_desc = dp_rx_cookie_2_va(soc, rx_buf_cookie);
  240. qdf_assert(rx_desc);
  241. rx_bufs_used++;
  242. nbuf = rx_desc->nbuf;
  243. qdf_nbuf_unmap_single(soc->osdev, nbuf,
  244. QDF_DMA_BIDIRECTIONAL);
  245. rx_desc->rx_buf_start = qdf_nbuf_data(nbuf);
  246. l2_hdr_offset =
  247. hal_rx_msdu_end_l3_hdr_padding_get(rx_desc->rx_buf_start);
  248. msdu_len = hal_rx_msdu_start_msdu_len_get(rx_desc->rx_buf_start);
  249. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  250. /* Set length in nbuf */
  251. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  252. /*
  253. * Check if DMA completed -- msdu_done is the last bit
  254. * to be written
  255. */
  256. if (!hal_rx_attn_msdu_done_get(rx_desc->rx_buf_start)) {
  257. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  258. FL("nbuf->data 0x%p"), rx_desc->rx_buf_start);
  259. qdf_assert(0);
  260. }
  261. /*
  262. * Advance the packet start pointer by total size of
  263. * pre-header TLV's
  264. */
  265. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  266. if (l2_hdr_offset)
  267. qdf_nbuf_pull_head(nbuf, l2_hdr_offset);
  268. if (hal_rx_mpdu_start_mpdu_qos_control_valid_get(
  269. rx_desc->rx_buf_start)) {
  270. /* TODO: Assuming that qos_control_valid also indicates
  271. * unicast. Should we check this?
  272. */
  273. tid = hal_rx_mpdu_start_tid_get(rx_desc->rx_buf_start);
  274. peer_id = hal_rx_mpdu_start_sw_peer_id_get(
  275. rx_desc->rx_buf_start);
  276. peer = dp_peer_find_by_id(soc, peer_id);
  277. if (peer &&
  278. peer->rx_tid[tid].hw_qdesc_vaddr_unaligned == NULL) {
  279. /* IEEE80211_SEQ_MAX indicates invalid start_seq */
  280. dp_rx_tid_setup_wifi3(peer, tid, 1, IEEE80211_SEQ_MAX);
  281. }
  282. }
  283. #ifdef QCA_WIFI_NAPIER_EMULATION /* Debug code, remove later */
  284. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  285. "%s: p_id %d msdu_len %d hdr_off %d",
  286. __func__, peer_id, msdu_len, l2_hdr_offset);
  287. print_hex_dump(KERN_ERR,
  288. "\t Pkt Data:", DUMP_PREFIX_NONE, 32, 4,
  289. qdf_nbuf_data(nbuf), 128, false);
  290. #endif /* NAPIER_EMULATION */
  291. if (qdf_unlikely(peer->bss_peer)) {
  292. QDF_TRACE(QDF_MODULE_ID_DP,
  293. QDF_TRACE_LEVEL_INFO,
  294. FL("received pkt with same src MAC"));
  295. /* Drop & free packet */
  296. qdf_nbuf_free(nbuf);
  297. /* Statistics */
  298. goto fail;
  299. }
  300. pdev0 = soc->pdev_list[0];/* Hard code 0th elem */
  301. if (pdev0) {
  302. vdev0 = (struct dp_vdev *)TAILQ_FIRST(&pdev0->vdev_list);
  303. if (vdev0 && vdev0->osif_rx) {
  304. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  305. FL("pdev0 %p vdev0 %p osif_rx %p"), pdev0, vdev0,
  306. vdev0->osif_rx);
  307. qdf_nbuf_set_next(nbuf, NULL);
  308. vdev0->osif_rx(vdev0->osif_vdev, nbuf);
  309. } else {
  310. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  311. FL("INVALID vdev0 %p OR osif_rx"), vdev0);
  312. }
  313. } else {
  314. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  315. FL("INVALID pdev %p"), pdev0);
  316. }
  317. fail:
  318. dp_rx_add_to_free_desc_list(head, tail, rx_desc);
  319. return rx_bufs_used;
  320. }
  321. /**
  322. * dp_rx_link_desc_return() - Return a MPDU link descriptor to HW
  323. * (WBM), following error handling
  324. *
  325. * @soc: core DP main context
  326. * @ring_desc: opaque pointer to the REO error ring descriptor
  327. *
  328. * Return: QDF_STATUS
  329. */
  330. static QDF_STATUS
  331. dp_rx_link_desc_return(struct dp_soc *soc, void *ring_desc)
  332. {
  333. void *buf_addr_info = HAL_RX_REO_BUF_ADDR_INFO_GET(ring_desc);
  334. struct dp_srng *wbm_desc_rel_ring = &soc->wbm_desc_rel_ring;
  335. void *wbm_rel_srng = wbm_desc_rel_ring->hal_srng;
  336. void *hal_soc = soc->hal_soc;
  337. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  338. void *src_srng_desc;
  339. if (!wbm_rel_srng) {
  340. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  341. "WBM RELEASE RING not initialized");
  342. return status;
  343. }
  344. if (qdf_unlikely(hal_srng_access_start(hal_soc, wbm_rel_srng))) {
  345. /* TODO */
  346. /*
  347. * Need API to convert from hal_ring pointer to
  348. * Ring Type / Ring Id combo
  349. */
  350. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  351. FL("HAL RING Access For WBM Release SRNG Failed - %p"),
  352. wbm_rel_srng);
  353. goto done;
  354. }
  355. src_srng_desc = hal_srng_src_get_next(hal_soc, wbm_rel_srng);
  356. if (qdf_likely(src_srng_desc)) {
  357. /* Return link descriptor through WBM ring (SW2WBM)*/
  358. hal_rx_msdu_link_desc_set(hal_soc,
  359. src_srng_desc, buf_addr_info);
  360. status = QDF_STATUS_SUCCESS;
  361. } else {
  362. struct hal_srng *srng = (struct hal_srng *)wbm_rel_srng;
  363. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  364. FL("WBM Release Ring (Id %d) Full"), srng->ring_id);
  365. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  366. "HP 0x%x Reap HP 0x%x TP 0x%x Cached TP 0x%x",
  367. *srng->u.src_ring.hp_addr, srng->u.src_ring.reap_hp,
  368. *srng->u.src_ring.tp_addr, srng->u.src_ring.cached_tp);
  369. }
  370. done:
  371. hal_srng_access_end(hal_soc, wbm_rel_srng);
  372. return status;
  373. }
  374. /**
  375. * dp_rx_err_process() - Processes error frames routed to REO error ring
  376. *
  377. * @soc: core txrx main context
  378. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  379. * @quota: No. of units (packets) that can be serviced in one shot.
  380. *
  381. * This function implements error processing and top level demultiplexer
  382. * for all the frames routed to REO error ring.
  383. *
  384. * Return: uint32_t: No. of elements processed
  385. */
  386. uint32_t
  387. dp_rx_err_process(struct dp_soc *soc, void *hal_ring, uint32_t quota)
  388. {
  389. void *hal_soc;
  390. void *ring_desc;
  391. union dp_rx_desc_list_elem_t *head = NULL;
  392. union dp_rx_desc_list_elem_t *tail = NULL;
  393. uint32_t rx_bufs_used = 0;
  394. uint8_t buf_type;
  395. uint8_t error, rbm;
  396. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  397. struct hal_buf_info hbi;
  398. /* Debug -- Remove later */
  399. qdf_assert(soc && hal_ring);
  400. hal_soc = soc->hal_soc;
  401. /* Debug -- Remove later */
  402. qdf_assert(hal_soc);
  403. if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_ring))) {
  404. /* TODO */
  405. /*
  406. * Need API to convert from hal_ring pointer to
  407. * Ring Type / Ring Id combo
  408. */
  409. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  410. FL("HAL RING Access Failed -- %p"), hal_ring);
  411. goto done;
  412. }
  413. while (qdf_likely((ring_desc =
  414. hal_srng_dst_get_next(hal_soc, hal_ring))
  415. && quota--)) {
  416. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  417. qdf_assert(error == HAL_REO_ERROR_DETECTED);
  418. /*
  419. * Check if the buffer is to be processed on this processor
  420. */
  421. rbm = hal_rx_ret_buf_manager_get(ring_desc);
  422. if (qdf_unlikely(rbm != HAL_RX_BUF_RBM_SW3_BM)) {
  423. /* TODO */
  424. /* Call appropriate handler */
  425. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  426. FL("Invalid RBM %d"), rbm);
  427. continue;
  428. }
  429. buf_type = HAL_RX_REO_BUF_TYPE_GET(ring_desc);
  430. /*
  431. * For REO error ring, expect only MSDU LINK DESC
  432. */
  433. qdf_assert(buf_type == HAL_RX_REO_MSDU_LINK_DESC_TYPE);
  434. hal_rx_reo_buf_paddr_get(ring_desc, &hbi);
  435. /* Get the MPDU DESC info */
  436. hal_rx_mpdu_desc_info_get(ring_desc, &mpdu_desc_info);
  437. if (mpdu_desc_info.mpdu_flags & HAL_MPDU_F_FRAGMENT) {
  438. /* TODO */
  439. rx_bufs_used += dp_rx_frag_handle(soc,
  440. ring_desc, &mpdu_desc_info,
  441. &head, &tail, quota);
  442. continue;
  443. }
  444. if (hal_rx_reo_is_pn_error(ring_desc)) {
  445. /* TOD0 */
  446. rx_bufs_used += dp_rx_pn_error_handle(soc,
  447. ring_desc, &mpdu_desc_info,
  448. &head, &tail, quota);
  449. continue;
  450. }
  451. if (hal_rx_reo_is_2k_jump(ring_desc)) {
  452. /* TOD0 */
  453. rx_bufs_used += dp_rx_2k_jump_handle(soc,
  454. ring_desc, &mpdu_desc_info,
  455. &head, &tail, quota);
  456. continue;
  457. }
  458. /* Return link descriptor through WBM ring (SW2WBM)*/
  459. dp_rx_link_desc_return(soc, ring_desc);
  460. }
  461. done:
  462. hal_srng_access_end(hal_soc, hal_ring);
  463. /* Assume MAC id = 0, owner = 0 */
  464. if (rx_bufs_used)
  465. dp_rx_buffers_replenish(soc, 0, rx_bufs_used, &head, &tail,
  466. HAL_RX_BUF_RBM_SW3_BM);
  467. return rx_bufs_used; /* Assume no scale factor for now */
  468. }
  469. /**
  470. * dp_rx_wbm_err_process() - Processes error frames routed to WBM release ring
  471. *
  472. * @soc: core txrx main context
  473. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  474. * @quota: No. of units (packets) that can be serviced in one shot.
  475. *
  476. * This function implements error processing and top level demultiplexer
  477. * for all the frames routed to WBM2HOST sw release ring.
  478. *
  479. * Return: uint32_t: No. of elements processed
  480. */
  481. uint32_t
  482. dp_rx_wbm_err_process(struct dp_soc *soc, void *hal_ring, uint32_t quota)
  483. {
  484. void *hal_soc;
  485. void *ring_desc;
  486. struct dp_rx_desc *rx_desc;
  487. union dp_rx_desc_list_elem_t *head = NULL;
  488. union dp_rx_desc_list_elem_t *tail = NULL;
  489. uint32_t rx_bufs_used = 0;
  490. uint8_t buf_type, rbm;
  491. uint8_t wbm_err_src;
  492. uint32_t rx_buf_cookie;
  493. /* Debug -- Remove later */
  494. qdf_assert(soc && hal_ring);
  495. hal_soc = soc->hal_soc;
  496. /* Debug -- Remove later */
  497. qdf_assert(hal_soc);
  498. if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_ring))) {
  499. /* TODO */
  500. /*
  501. * Need API to convert from hal_ring pointer to
  502. * Ring Type / Ring Id combo
  503. */
  504. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  505. FL("HAL RING Access Failed -- %p"), hal_ring);
  506. goto done;
  507. }
  508. while (qdf_likely((ring_desc =
  509. hal_srng_dst_get_next(hal_soc, hal_ring))
  510. && quota--)) {
  511. /* XXX */
  512. wbm_err_src = HAL_RX_WBM_ERR_SRC_GET(ring_desc);
  513. qdf_assert((wbm_err_src == HAL_RX_WBM_ERR_SRC_RXDMA) ||
  514. (wbm_err_src == HAL_RX_WBM_ERR_SRC_REO));
  515. /*
  516. * Check if the buffer is to be processed on this processor
  517. */
  518. rbm = hal_rx_ret_buf_manager_get(ring_desc);
  519. if (qdf_unlikely(rbm != HAL_RX_BUF_RBM_SW3_BM)) {
  520. /* TODO */
  521. /* Call appropriate handler */
  522. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  523. FL("Invalid RBM %d"), rbm);
  524. continue;
  525. }
  526. /* XXX */
  527. buf_type = HAL_RX_WBM_BUF_TYPE_GET(ring_desc);
  528. /*
  529. * For WBM ring, expect only MSDU buffers
  530. */
  531. qdf_assert(buf_type == HAL_RX_WBM_BUF_TYPE_REL_BUF);
  532. if (wbm_err_src == HAL_RX_WBM_ERR_SRC_REO) {
  533. uint8_t push_reason =
  534. HAL_RX_WBM_REO_PUSH_REASON_GET(ring_desc);
  535. if (push_reason == HAL_RX_WBM_REO_PSH_RSN_ERROR) {
  536. uint8_t reo_error_code =
  537. HAL_RX_WBM_REO_ERROR_CODE_GET(ring_desc);
  538. switch (reo_error_code) {
  539. /*
  540. * Handling for packets which have NULL REO
  541. * queue descriptor
  542. */
  543. case HAL_REO_ERR_QUEUE_DESC_ADDR_0:
  544. QDF_TRACE(QDF_MODULE_ID_DP,
  545. QDF_TRACE_LEVEL_WARN,
  546. "Got pkt with REO ERROR: %d",
  547. reo_error_code);
  548. rx_bufs_used +=
  549. dp_rx_null_q_desc_handle(soc,
  550. ring_desc, &head, &tail, quota);
  551. continue;
  552. /* TODO */
  553. /* Add per error code accounting */
  554. default:
  555. QDF_TRACE(QDF_MODULE_ID_DP,
  556. QDF_TRACE_LEVEL_ERROR,
  557. "REO error %d detected",
  558. reo_error_code);
  559. }
  560. }
  561. } else if (wbm_err_src == HAL_RX_WBM_ERR_SRC_RXDMA) {
  562. uint8_t push_reason =
  563. HAL_RX_WBM_RXDMA_PUSH_REASON_GET(ring_desc);
  564. if (push_reason == HAL_RX_WBM_RXDMA_PSH_RSN_ERROR) {
  565. uint8_t rxdma_error_code =
  566. HAL_RX_WBM_RXDMA_ERROR_CODE_GET(ring_desc);
  567. switch (rxdma_error_code) {
  568. /* TODO */
  569. /* Add per error code accounting */
  570. default:
  571. QDF_TRACE(QDF_MODULE_ID_DP,
  572. QDF_TRACE_LEVEL_ERROR,
  573. "RXDMA error %d detected",
  574. rxdma_error_code);
  575. }
  576. }
  577. } else {
  578. /* Should not come here */
  579. qdf_assert(0);
  580. }
  581. rx_buf_cookie = HAL_RX_WBM_BUF_COOKIE_GET(ring_desc);
  582. rx_desc = dp_rx_cookie_2_va(soc, rx_buf_cookie);
  583. qdf_assert(rx_desc);
  584. rx_bufs_used++;
  585. qdf_nbuf_unmap_single(soc->osdev, rx_desc->nbuf,
  586. QDF_DMA_BIDIRECTIONAL);
  587. qdf_nbuf_free(rx_desc->nbuf);
  588. dp_rx_add_to_free_desc_list(&head, &tail, rx_desc);
  589. }
  590. done:
  591. hal_srng_access_end(hal_soc, hal_ring);
  592. /* Assume MAC id = 0, owner = 0 */
  593. if (rx_bufs_used)
  594. dp_rx_buffers_replenish(soc, 0, rx_bufs_used, &head, &tail,
  595. HAL_RX_BUF_RBM_SW3_BM);
  596. return rx_bufs_used; /* Assume no scale factor for now */
  597. }