dp_main.c 217 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963296429652966296729682969297029712972297329742975297629772978297929802981298229832984298529862987298829892990299129922993299429952996299729982999300030013002300330043005300630073008300930103011301230133014301530163017301830193020302130223023302430253026302730283029303030313032303330343035303630373038303930403041304230433044304530463047304830493050305130523053305430553056305730583059306030613062306330643065306630673068306930703071307230733074307530763077307830793080308130823083308430853086308730883089309030913092309330943095309630973098309931003101310231033104310531063107310831093110311131123113311431153116311731183119312031213122312331243125312631273128312931303131313231333134313531363137313831393140314131423143314431453146314731483149315031513152315331543155315631573158315931603161316231633164316531663167316831693170317131723173317431753176317731783179318031813182318331843185318631873188318931903191319231933194319531963197319831993200320132023203320432053206320732083209321032113212321332143215321632173218321932203221322232233224322532263227322832293230323132323233323432353236323732383239324032413242324332443245324632473248324932503251325232533254325532563257325832593260326132623263326432653266326732683269327032713272327332743275327632773278327932803281328232833284328532863287328832893290329132923293329432953296329732983299330033013302330333043305330633073308330933103311331233133314331533163317331833193320332133223323332433253326332733283329333033313332333333343335333633373338333933403341334233433344334533463347334833493350335133523353335433553356335733583359336033613362336333643365336633673368336933703371337233733374337533763377337833793380338133823383338433853386338733883389339033913392339333943395339633973398339934003401340234033404340534063407340834093410341134123413341434153416341734183419342034213422342334243425342634273428342934303431343234333434343534363437343834393440344134423443344434453446344734483449345034513452345334543455345634573458345934603461346234633464346534663467346834693470347134723473347434753476347734783479348034813482348334843485348634873488348934903491349234933494349534963497349834993500350135023503350435053506350735083509351035113512351335143515351635173518351935203521352235233524352535263527352835293530353135323533353435353536353735383539354035413542354335443545354635473548354935503551355235533554355535563557355835593560356135623563356435653566356735683569357035713572357335743575357635773578357935803581358235833584358535863587358835893590359135923593359435953596359735983599360036013602360336043605360636073608360936103611361236133614361536163617361836193620362136223623362436253626362736283629363036313632363336343635363636373638363936403641364236433644364536463647364836493650365136523653365436553656365736583659366036613662366336643665366636673668366936703671367236733674367536763677367836793680368136823683368436853686368736883689369036913692369336943695369636973698369937003701370237033704370537063707370837093710371137123713371437153716371737183719372037213722372337243725372637273728372937303731373237333734373537363737373837393740374137423743374437453746374737483749375037513752375337543755375637573758375937603761376237633764376537663767376837693770377137723773377437753776377737783779378037813782378337843785378637873788378937903791379237933794379537963797379837993800380138023803380438053806380738083809381038113812381338143815381638173818381938203821382238233824382538263827382838293830383138323833383438353836383738383839384038413842384338443845384638473848384938503851385238533854385538563857385838593860386138623863386438653866386738683869387038713872387338743875387638773878387938803881388238833884388538863887388838893890389138923893389438953896389738983899390039013902390339043905390639073908390939103911391239133914391539163917391839193920392139223923392439253926392739283929393039313932393339343935393639373938393939403941394239433944394539463947394839493950395139523953395439553956395739583959396039613962396339643965396639673968396939703971397239733974397539763977397839793980398139823983398439853986398739883989399039913992399339943995399639973998399940004001400240034004400540064007400840094010401140124013401440154016401740184019402040214022402340244025402640274028402940304031403240334034403540364037403840394040404140424043404440454046404740484049405040514052405340544055405640574058405940604061406240634064406540664067406840694070407140724073407440754076407740784079408040814082408340844085408640874088408940904091409240934094409540964097409840994100410141024103410441054106410741084109411041114112411341144115411641174118411941204121412241234124412541264127412841294130413141324133413441354136413741384139414041414142414341444145414641474148414941504151415241534154415541564157415841594160416141624163416441654166416741684169417041714172417341744175417641774178417941804181418241834184418541864187418841894190419141924193419441954196419741984199420042014202420342044205420642074208420942104211421242134214421542164217421842194220422142224223422442254226422742284229423042314232423342344235423642374238423942404241424242434244424542464247424842494250425142524253425442554256425742584259426042614262426342644265426642674268426942704271427242734274427542764277427842794280428142824283428442854286428742884289429042914292429342944295429642974298429943004301430243034304430543064307430843094310431143124313431443154316431743184319432043214322432343244325432643274328432943304331433243334334433543364337433843394340434143424343434443454346434743484349435043514352435343544355435643574358435943604361436243634364436543664367436843694370437143724373437443754376437743784379438043814382438343844385438643874388438943904391439243934394439543964397439843994400440144024403440444054406440744084409441044114412441344144415441644174418441944204421442244234424442544264427442844294430443144324433443444354436443744384439444044414442444344444445444644474448444944504451445244534454445544564457445844594460446144624463446444654466446744684469447044714472447344744475447644774478447944804481448244834484448544864487448844894490449144924493449444954496449744984499450045014502450345044505450645074508450945104511451245134514451545164517451845194520452145224523452445254526452745284529453045314532453345344535453645374538453945404541454245434544454545464547454845494550455145524553455445554556455745584559456045614562456345644565456645674568456945704571457245734574457545764577457845794580458145824583458445854586458745884589459045914592459345944595459645974598459946004601460246034604460546064607460846094610461146124613461446154616461746184619462046214622462346244625462646274628462946304631463246334634463546364637463846394640464146424643464446454646464746484649465046514652465346544655465646574658465946604661466246634664466546664667466846694670467146724673467446754676467746784679468046814682468346844685468646874688468946904691469246934694469546964697469846994700470147024703470447054706470747084709471047114712471347144715471647174718471947204721472247234724472547264727472847294730473147324733473447354736473747384739474047414742474347444745474647474748474947504751475247534754475547564757475847594760476147624763476447654766476747684769477047714772477347744775477647774778477947804781478247834784478547864787478847894790479147924793479447954796479747984799480048014802480348044805480648074808480948104811481248134814481548164817481848194820482148224823482448254826482748284829483048314832483348344835483648374838483948404841484248434844484548464847484848494850485148524853485448554856485748584859486048614862486348644865486648674868486948704871487248734874487548764877487848794880488148824883488448854886488748884889489048914892489348944895489648974898489949004901490249034904490549064907490849094910491149124913491449154916491749184919492049214922492349244925492649274928492949304931493249334934493549364937493849394940494149424943494449454946494749484949495049514952495349544955495649574958495949604961496249634964496549664967496849694970497149724973497449754976497749784979498049814982498349844985498649874988498949904991499249934994499549964997499849995000500150025003500450055006500750085009501050115012501350145015501650175018501950205021502250235024502550265027502850295030503150325033503450355036503750385039504050415042504350445045504650475048504950505051505250535054505550565057505850595060506150625063506450655066506750685069507050715072507350745075507650775078507950805081508250835084508550865087508850895090509150925093509450955096509750985099510051015102510351045105510651075108510951105111511251135114511551165117511851195120512151225123512451255126512751285129513051315132513351345135513651375138513951405141514251435144514551465147514851495150515151525153515451555156515751585159516051615162516351645165516651675168516951705171517251735174517551765177517851795180518151825183518451855186518751885189519051915192519351945195519651975198519952005201520252035204520552065207520852095210521152125213521452155216521752185219522052215222522352245225522652275228522952305231523252335234523552365237523852395240524152425243524452455246524752485249525052515252525352545255525652575258525952605261526252635264526552665267526852695270527152725273527452755276527752785279528052815282528352845285528652875288528952905291529252935294529552965297529852995300530153025303530453055306530753085309531053115312531353145315531653175318531953205321532253235324532553265327532853295330533153325333533453355336533753385339534053415342534353445345534653475348534953505351535253535354535553565357535853595360536153625363536453655366536753685369537053715372537353745375537653775378537953805381538253835384538553865387538853895390539153925393539453955396539753985399540054015402540354045405540654075408540954105411541254135414541554165417541854195420542154225423542454255426542754285429543054315432543354345435543654375438543954405441544254435444544554465447544854495450545154525453545454555456545754585459546054615462546354645465546654675468546954705471547254735474547554765477547854795480548154825483548454855486548754885489549054915492549354945495549654975498549955005501550255035504550555065507550855095510551155125513551455155516551755185519552055215522552355245525552655275528552955305531553255335534553555365537553855395540554155425543554455455546554755485549555055515552555355545555555655575558555955605561556255635564556555665567556855695570557155725573557455755576557755785579558055815582558355845585558655875588558955905591559255935594559555965597559855995600560156025603560456055606560756085609561056115612561356145615561656175618561956205621562256235624562556265627562856295630563156325633563456355636563756385639564056415642564356445645564656475648564956505651565256535654565556565657565856595660566156625663566456655666566756685669567056715672567356745675567656775678567956805681568256835684568556865687568856895690569156925693569456955696569756985699570057015702570357045705570657075708570957105711571257135714571557165717571857195720572157225723572457255726572757285729573057315732573357345735573657375738573957405741574257435744574557465747574857495750575157525753575457555756575757585759576057615762576357645765576657675768576957705771577257735774577557765777577857795780578157825783578457855786578757885789579057915792579357945795579657975798579958005801580258035804580558065807580858095810581158125813581458155816581758185819582058215822582358245825582658275828582958305831583258335834583558365837583858395840584158425843584458455846584758485849585058515852585358545855585658575858585958605861586258635864586558665867586858695870587158725873587458755876587758785879588058815882588358845885588658875888588958905891589258935894589558965897589858995900590159025903590459055906590759085909591059115912591359145915591659175918591959205921592259235924592559265927592859295930593159325933593459355936593759385939594059415942594359445945594659475948594959505951595259535954595559565957595859595960596159625963596459655966596759685969597059715972597359745975597659775978597959805981598259835984598559865987598859895990599159925993599459955996599759985999600060016002600360046005600660076008600960106011601260136014601560166017601860196020602160226023602460256026602760286029603060316032603360346035603660376038603960406041604260436044604560466047604860496050605160526053605460556056605760586059606060616062606360646065606660676068606960706071607260736074607560766077607860796080608160826083608460856086608760886089609060916092609360946095609660976098609961006101610261036104610561066107610861096110611161126113611461156116611761186119612061216122612361246125612661276128612961306131613261336134613561366137613861396140614161426143614461456146614761486149615061516152615361546155615661576158615961606161616261636164616561666167616861696170617161726173617461756176617761786179618061816182618361846185618661876188618961906191619261936194619561966197619861996200620162026203620462056206620762086209621062116212621362146215621662176218621962206221622262236224622562266227622862296230623162326233623462356236623762386239624062416242624362446245624662476248624962506251625262536254625562566257625862596260626162626263626462656266626762686269627062716272627362746275627662776278627962806281628262836284628562866287628862896290629162926293629462956296629762986299630063016302630363046305630663076308630963106311631263136314631563166317631863196320632163226323632463256326632763286329633063316332633363346335633663376338633963406341634263436344634563466347634863496350635163526353635463556356635763586359636063616362636363646365636663676368636963706371637263736374637563766377637863796380638163826383638463856386638763886389639063916392639363946395639663976398639964006401640264036404640564066407640864096410641164126413641464156416641764186419642064216422642364246425642664276428642964306431643264336434643564366437643864396440644164426443644464456446644764486449645064516452645364546455645664576458645964606461646264636464646564666467646864696470647164726473647464756476647764786479648064816482648364846485648664876488648964906491649264936494649564966497649864996500650165026503650465056506650765086509651065116512651365146515651665176518651965206521652265236524652565266527652865296530653165326533653465356536653765386539654065416542654365446545654665476548654965506551655265536554655565566557655865596560656165626563656465656566656765686569657065716572657365746575657665776578657965806581658265836584658565866587658865896590659165926593659465956596659765986599660066016602660366046605660666076608660966106611661266136614661566166617661866196620662166226623662466256626662766286629663066316632663366346635663666376638663966406641664266436644664566466647664866496650665166526653665466556656665766586659666066616662666366646665666666676668666966706671667266736674667566766677667866796680668166826683668466856686668766886689669066916692669366946695669666976698669967006701670267036704670567066707670867096710671167126713671467156716671767186719672067216722672367246725672667276728672967306731673267336734673567366737673867396740674167426743674467456746674767486749675067516752675367546755675667576758675967606761676267636764676567666767676867696770677167726773677467756776677767786779678067816782678367846785678667876788678967906791679267936794679567966797679867996800680168026803680468056806680768086809681068116812681368146815681668176818681968206821682268236824682568266827682868296830683168326833683468356836683768386839684068416842684368446845684668476848684968506851685268536854685568566857685868596860686168626863686468656866686768686869687068716872687368746875687668776878687968806881688268836884688568866887688868896890689168926893689468956896689768986899690069016902690369046905690669076908690969106911691269136914691569166917691869196920692169226923692469256926692769286929693069316932693369346935693669376938693969406941694269436944694569466947694869496950695169526953695469556956695769586959696069616962696369646965696669676968696969706971697269736974697569766977697869796980698169826983698469856986698769886989699069916992699369946995699669976998699970007001700270037004700570067007700870097010701170127013701470157016701770187019702070217022702370247025702670277028702970307031703270337034703570367037703870397040704170427043704470457046704770487049705070517052705370547055705670577058705970607061706270637064706570667067706870697070707170727073707470757076707770787079708070817082708370847085708670877088708970907091709270937094709570967097709870997100710171027103710471057106710771087109711071117112711371147115711671177118711971207121712271237124712571267127712871297130713171327133713471357136713771387139714071417142714371447145714671477148714971507151715271537154715571567157715871597160716171627163716471657166716771687169717071717172717371747175717671777178717971807181718271837184718571867187718871897190719171927193719471957196719771987199720072017202720372047205720672077208720972107211721272137214721572167217721872197220722172227223722472257226722772287229723072317232723372347235723672377238723972407241724272437244724572467247724872497250725172527253725472557256725772587259726072617262726372647265726672677268726972707271727272737274727572767277727872797280728172827283728472857286728772887289729072917292729372947295729672977298729973007301730273037304730573067307730873097310731173127313731473157316731773187319732073217322732373247325732673277328732973307331733273337334733573367337733873397340734173427343734473457346734773487349735073517352735373547355735673577358735973607361736273637364736573667367736873697370737173727373737473757376737773787379738073817382738373847385738673877388738973907391739273937394739573967397739873997400740174027403740474057406740774087409741074117412741374147415741674177418741974207421742274237424742574267427742874297430743174327433743474357436743774387439744074417442744374447445744674477448744974507451745274537454745574567457745874597460746174627463746474657466746774687469747074717472747374747475747674777478747974807481748274837484748574867487748874897490749174927493749474957496749774987499750075017502750375047505750675077508750975107511751275137514751575167517751875197520752175227523752475257526752775287529753075317532753375347535753675377538753975407541754275437544754575467547754875497550755175527553755475557556755775587559756075617562756375647565756675677568756975707571757275737574757575767577757875797580758175827583758475857586758775887589759075917592759375947595759675977598759976007601760276037604760576067607760876097610761176127613761476157616761776187619762076217622762376247625762676277628762976307631763276337634763576367637763876397640764176427643764476457646764776487649765076517652765376547655765676577658765976607661766276637664766576667667766876697670767176727673767476757676767776787679768076817682768376847685768676877688768976907691769276937694769576967697769876997700770177027703770477057706770777087709771077117712771377147715771677177718771977207721772277237724772577267727772877297730773177327733773477357736773777387739774077417742774377447745774677477748774977507751775277537754775577567757775877597760776177627763776477657766776777687769777077717772777377747775777677777778777977807781778277837784778577867787778877897790779177927793779477957796779777987799780078017802780378047805780678077808780978107811781278137814781578167817781878197820782178227823782478257826782778287829783078317832783378347835783678377838783978407841784278437844784578467847784878497850785178527853785478557856785778587859786078617862786378647865786678677868786978707871787278737874787578767877787878797880788178827883788478857886788778887889789078917892789378947895789678977898789979007901790279037904790579067907790879097910791179127913791479157916791779187919792079217922792379247925792679277928792979307931793279337934793579367937793879397940794179427943794479457946794779487949795079517952795379547955795679577958795979607961796279637964796579667967796879697970797179727973797479757976797779787979798079817982798379847985
  1. /*
  2. * Copyright (c) 2016-2018 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include <qdf_types.h>
  19. #include <qdf_lock.h>
  20. #include <qdf_net_types.h>
  21. #include <qdf_lro.h>
  22. #include <qdf_module.h>
  23. #include <hal_hw_headers.h>
  24. #include <hal_api.h>
  25. #include <hif.h>
  26. #include <htt.h>
  27. #include <wdi_event.h>
  28. #include <queue.h>
  29. #include "dp_htt.h"
  30. #include "dp_types.h"
  31. #include "dp_internal.h"
  32. #include "dp_tx.h"
  33. #include "dp_tx_desc.h"
  34. #include "dp_rx.h"
  35. #include <cdp_txrx_handle.h>
  36. #include <wlan_cfg.h>
  37. #include "cdp_txrx_cmn_struct.h"
  38. #include "cdp_txrx_stats_struct.h"
  39. #include <qdf_util.h>
  40. #include "dp_peer.h"
  41. #include "dp_rx_mon.h"
  42. #include "htt_stats.h"
  43. #include "qdf_mem.h" /* qdf_mem_malloc,free */
  44. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  45. #include "cdp_txrx_flow_ctrl_v2.h"
  46. #else
  47. static inline void
  48. cdp_dump_flow_pool_info(struct cdp_soc_t *soc)
  49. {
  50. return;
  51. }
  52. #endif
  53. #include "dp_ipa.h"
  54. #ifdef CONFIG_MCL
  55. #ifndef REMOVE_PKT_LOG
  56. #include <pktlog_ac_api.h>
  57. #include <pktlog_ac.h>
  58. #endif
  59. #endif
  60. static void dp_pktlogmod_exit(struct dp_pdev *handle);
  61. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  62. uint8_t *peer_mac_addr,
  63. struct cdp_ctrl_objmgr_peer *ctrl_peer);
  64. static void dp_peer_delete_wifi3(void *peer_handle, uint32_t bitmap);
  65. #define DP_INTR_POLL_TIMER_MS 10
  66. #define DP_WDS_AGING_TIMER_DEFAULT_MS 120000
  67. #define DP_MCS_LENGTH (6*MAX_MCS)
  68. #define DP_NSS_LENGTH (6*SS_COUNT)
  69. #define DP_RXDMA_ERR_LENGTH (6*HAL_RXDMA_ERR_MAX)
  70. #define DP_REO_ERR_LENGTH (6*HAL_REO_ERR_MAX)
  71. #define DP_MAX_MCS_STRING_LEN 30
  72. #define DP_CURR_FW_STATS_AVAIL 19
  73. #define DP_HTT_DBG_EXT_STATS_MAX 256
  74. #define DP_MAX_SLEEP_TIME 100
  75. #ifdef IPA_OFFLOAD
  76. /* Exclude IPA rings from the interrupt context */
  77. #define TX_RING_MASK_VAL 0xb
  78. #define RX_RING_MASK_VAL 0x7
  79. #else
  80. #define TX_RING_MASK_VAL 0xF
  81. #define RX_RING_MASK_VAL 0xF
  82. #endif
  83. bool rx_hash = 1;
  84. qdf_declare_param(rx_hash, bool);
  85. #define STR_MAXLEN 64
  86. #define DP_PPDU_STATS_CFG_ALL 0xFFFF
  87. /* PPDU stats mask sent to FW to enable enhanced stats */
  88. #define DP_PPDU_STATS_CFG_ENH_STATS 0xE67
  89. /* PPDU stats mask sent to FW to support debug sniffer feature */
  90. #define DP_PPDU_STATS_CFG_SNIFFER 0x2FFF
  91. /* PPDU stats mask sent to FW to support BPR feature*/
  92. #define DP_PPDU_STATS_CFG_BPR 0x2000
  93. /* PPDU stats mask sent to FW to support BPR and enhanced stats feature */
  94. #define DP_PPDU_STATS_CFG_BPR_ENH (DP_PPDU_STATS_CFG_BPR | \
  95. DP_PPDU_STATS_CFG_ENH_STATS)
  96. /* PPDU stats mask sent to FW to support BPR and pcktlog stats feature */
  97. #define DP_PPDU_STATS_CFG_BPR_PKTLOG (DP_PPDU_STATS_CFG_BPR | \
  98. DP_PPDU_TXLITE_STATS_BITMASK_CFG)
  99. /**
  100. * default_dscp_tid_map - Default DSCP-TID mapping
  101. *
  102. * DSCP TID
  103. * 000000 0
  104. * 001000 1
  105. * 010000 2
  106. * 011000 3
  107. * 100000 4
  108. * 101000 5
  109. * 110000 6
  110. * 111000 7
  111. */
  112. static uint8_t default_dscp_tid_map[DSCP_TID_MAP_MAX] = {
  113. 0, 0, 0, 0, 0, 0, 0, 0,
  114. 1, 1, 1, 1, 1, 1, 1, 1,
  115. 2, 2, 2, 2, 2, 2, 2, 2,
  116. 3, 3, 3, 3, 3, 3, 3, 3,
  117. 4, 4, 4, 4, 4, 4, 4, 4,
  118. 5, 5, 5, 5, 5, 5, 5, 5,
  119. 6, 6, 6, 6, 6, 6, 6, 6,
  120. 7, 7, 7, 7, 7, 7, 7, 7,
  121. };
  122. /*
  123. * struct dp_rate_debug
  124. *
  125. * @mcs_type: print string for a given mcs
  126. * @valid: valid mcs rate?
  127. */
  128. struct dp_rate_debug {
  129. char mcs_type[DP_MAX_MCS_STRING_LEN];
  130. uint8_t valid;
  131. };
  132. #define MCS_VALID 1
  133. #define MCS_INVALID 0
  134. static const struct dp_rate_debug dp_rate_string[DOT11_MAX][MAX_MCS] = {
  135. {
  136. {"OFDM 48 Mbps", MCS_VALID},
  137. {"OFDM 24 Mbps", MCS_VALID},
  138. {"OFDM 12 Mbps", MCS_VALID},
  139. {"OFDM 6 Mbps ", MCS_VALID},
  140. {"OFDM 54 Mbps", MCS_VALID},
  141. {"OFDM 36 Mbps", MCS_VALID},
  142. {"OFDM 18 Mbps", MCS_VALID},
  143. {"OFDM 9 Mbps ", MCS_VALID},
  144. {"INVALID ", MCS_INVALID},
  145. {"INVALID ", MCS_INVALID},
  146. {"INVALID ", MCS_INVALID},
  147. {"INVALID ", MCS_INVALID},
  148. {"INVALID ", MCS_VALID},
  149. },
  150. {
  151. {"CCK 11 Mbps Long ", MCS_VALID},
  152. {"CCK 5.5 Mbps Long ", MCS_VALID},
  153. {"CCK 2 Mbps Long ", MCS_VALID},
  154. {"CCK 1 Mbps Long ", MCS_VALID},
  155. {"CCK 11 Mbps Short ", MCS_VALID},
  156. {"CCK 5.5 Mbps Short", MCS_VALID},
  157. {"CCK 2 Mbps Short ", MCS_VALID},
  158. {"INVALID ", MCS_INVALID},
  159. {"INVALID ", MCS_INVALID},
  160. {"INVALID ", MCS_INVALID},
  161. {"INVALID ", MCS_INVALID},
  162. {"INVALID ", MCS_INVALID},
  163. {"INVALID ", MCS_VALID},
  164. },
  165. {
  166. {"HT MCS 0 (BPSK 1/2) ", MCS_VALID},
  167. {"HT MCS 1 (QPSK 1/2) ", MCS_VALID},
  168. {"HT MCS 2 (QPSK 3/4) ", MCS_VALID},
  169. {"HT MCS 3 (16-QAM 1/2)", MCS_VALID},
  170. {"HT MCS 4 (16-QAM 3/4)", MCS_VALID},
  171. {"HT MCS 5 (64-QAM 2/3)", MCS_VALID},
  172. {"HT MCS 6 (64-QAM 3/4)", MCS_VALID},
  173. {"HT MCS 7 (64-QAM 5/6)", MCS_VALID},
  174. {"INVALID ", MCS_INVALID},
  175. {"INVALID ", MCS_INVALID},
  176. {"INVALID ", MCS_INVALID},
  177. {"INVALID ", MCS_INVALID},
  178. {"INVALID ", MCS_VALID},
  179. },
  180. {
  181. {"VHT MCS 0 (BPSK 1/2) ", MCS_VALID},
  182. {"VHT MCS 1 (QPSK 1/2) ", MCS_VALID},
  183. {"VHT MCS 2 (QPSK 3/4) ", MCS_VALID},
  184. {"VHT MCS 3 (16-QAM 1/2) ", MCS_VALID},
  185. {"VHT MCS 4 (16-QAM 3/4) ", MCS_VALID},
  186. {"VHT MCS 5 (64-QAM 2/3) ", MCS_VALID},
  187. {"VHT MCS 6 (64-QAM 3/4) ", MCS_VALID},
  188. {"VHT MCS 7 (64-QAM 5/6) ", MCS_VALID},
  189. {"VHT MCS 8 (256-QAM 3/4) ", MCS_VALID},
  190. {"VHT MCS 9 (256-QAM 5/6) ", MCS_VALID},
  191. {"VHT MCS 10 (1024-QAM 3/4)", MCS_VALID},
  192. {"VHT MCS 11 (1024-QAM 5/6)", MCS_VALID},
  193. {"INVALID ", MCS_VALID},
  194. },
  195. {
  196. {"HE MCS 0 (BPSK 1/2) ", MCS_VALID},
  197. {"HE MCS 1 (QPSK 1/2) ", MCS_VALID},
  198. {"HE MCS 2 (QPSK 3/4) ", MCS_VALID},
  199. {"HE MCS 3 (16-QAM 1/2) ", MCS_VALID},
  200. {"HE MCS 4 (16-QAM 3/4) ", MCS_VALID},
  201. {"HE MCS 5 (64-QAM 2/3) ", MCS_VALID},
  202. {"HE MCS 6 (64-QAM 3/4) ", MCS_VALID},
  203. {"HE MCS 7 (64-QAM 5/6) ", MCS_VALID},
  204. {"HE MCS 8 (256-QAM 3/4) ", MCS_VALID},
  205. {"HE MCS 9 (256-QAM 5/6) ", MCS_VALID},
  206. {"HE MCS 10 (1024-QAM 3/4)", MCS_VALID},
  207. {"HE MCS 11 (1024-QAM 5/6)", MCS_VALID},
  208. {"INVALID ", MCS_VALID},
  209. }
  210. };
  211. /**
  212. * @brief Cpu ring map types
  213. */
  214. enum dp_cpu_ring_map_types {
  215. DP_DEFAULT_MAP,
  216. DP_NSS_FIRST_RADIO_OFFLOADED_MAP,
  217. DP_NSS_SECOND_RADIO_OFFLOADED_MAP,
  218. DP_NSS_ALL_RADIO_OFFLOADED_MAP,
  219. DP_CPU_RING_MAP_MAX
  220. };
  221. /**
  222. * @brief Cpu to tx ring map
  223. */
  224. static uint8_t dp_cpu_ring_map[DP_CPU_RING_MAP_MAX][WLAN_CFG_INT_NUM_CONTEXTS] = {
  225. {0x0, 0x1, 0x2, 0x0},
  226. {0x1, 0x2, 0x1, 0x2},
  227. {0x0, 0x2, 0x0, 0x2},
  228. {0x2, 0x2, 0x2, 0x2}
  229. };
  230. /**
  231. * @brief Select the type of statistics
  232. */
  233. enum dp_stats_type {
  234. STATS_FW = 0,
  235. STATS_HOST = 1,
  236. STATS_TYPE_MAX = 2,
  237. };
  238. /**
  239. * @brief General Firmware statistics options
  240. *
  241. */
  242. enum dp_fw_stats {
  243. TXRX_FW_STATS_INVALID = -1,
  244. };
  245. /**
  246. * dp_stats_mapping_table - Firmware and Host statistics
  247. * currently supported
  248. */
  249. const int dp_stats_mapping_table[][STATS_TYPE_MAX] = {
  250. {HTT_DBG_EXT_STATS_RESET, TXRX_HOST_STATS_INVALID},
  251. {HTT_DBG_EXT_STATS_PDEV_TX, TXRX_HOST_STATS_INVALID},
  252. {HTT_DBG_EXT_STATS_PDEV_RX, TXRX_HOST_STATS_INVALID},
  253. {HTT_DBG_EXT_STATS_PDEV_TX_HWQ, TXRX_HOST_STATS_INVALID},
  254. {HTT_DBG_EXT_STATS_PDEV_TX_SCHED, TXRX_HOST_STATS_INVALID},
  255. {HTT_DBG_EXT_STATS_PDEV_ERROR, TXRX_HOST_STATS_INVALID},
  256. {HTT_DBG_EXT_STATS_PDEV_TQM, TXRX_HOST_STATS_INVALID},
  257. {HTT_DBG_EXT_STATS_TQM_CMDQ, TXRX_HOST_STATS_INVALID},
  258. {HTT_DBG_EXT_STATS_TX_DE_INFO, TXRX_HOST_STATS_INVALID},
  259. {HTT_DBG_EXT_STATS_PDEV_TX_RATE, TXRX_HOST_STATS_INVALID},
  260. {HTT_DBG_EXT_STATS_PDEV_RX_RATE, TXRX_HOST_STATS_INVALID},
  261. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  262. {HTT_DBG_EXT_STATS_TX_SELFGEN_INFO, TXRX_HOST_STATS_INVALID},
  263. {HTT_DBG_EXT_STATS_TX_MU_HWQ, TXRX_HOST_STATS_INVALID},
  264. {HTT_DBG_EXT_STATS_RING_IF_INFO, TXRX_HOST_STATS_INVALID},
  265. {HTT_DBG_EXT_STATS_SRNG_INFO, TXRX_HOST_STATS_INVALID},
  266. {HTT_DBG_EXT_STATS_SFM_INFO, TXRX_HOST_STATS_INVALID},
  267. {HTT_DBG_EXT_STATS_PDEV_TX_MU, TXRX_HOST_STATS_INVALID},
  268. {HTT_DBG_EXT_STATS_ACTIVE_PEERS_LIST, TXRX_HOST_STATS_INVALID},
  269. /* Last ENUM for HTT FW STATS */
  270. {DP_HTT_DBG_EXT_STATS_MAX, TXRX_HOST_STATS_INVALID},
  271. {TXRX_FW_STATS_INVALID, TXRX_CLEAR_STATS},
  272. {TXRX_FW_STATS_INVALID, TXRX_RX_RATE_STATS},
  273. {TXRX_FW_STATS_INVALID, TXRX_TX_RATE_STATS},
  274. {TXRX_FW_STATS_INVALID, TXRX_TX_HOST_STATS},
  275. {TXRX_FW_STATS_INVALID, TXRX_RX_HOST_STATS},
  276. {TXRX_FW_STATS_INVALID, TXRX_AST_STATS},
  277. {TXRX_FW_STATS_INVALID, TXRX_SRNG_PTR_STATS},
  278. {TXRX_FW_STATS_INVALID, TXRX_RX_MON_STATS},
  279. };
  280. /* MCL specific functions */
  281. #ifdef CONFIG_MCL
  282. /**
  283. * dp_soc_get_mon_mask_for_interrupt_mode() - get mon mode mask for intr mode
  284. * @soc: pointer to dp_soc handle
  285. * @intr_ctx_num: interrupt context number for which mon mask is needed
  286. *
  287. * For MCL, monitor mode rings are being processed in timer contexts (polled).
  288. * This function is returning 0, since in interrupt mode(softirq based RX),
  289. * we donot want to process monitor mode rings in a softirq.
  290. *
  291. * So, in case packet log is enabled for SAP/STA/P2P modes,
  292. * regular interrupt processing will not process monitor mode rings. It would be
  293. * done in a separate timer context.
  294. *
  295. * Return: 0
  296. */
  297. static inline
  298. uint32_t dp_soc_get_mon_mask_for_interrupt_mode(struct dp_soc *soc, int intr_ctx_num)
  299. {
  300. return 0;
  301. }
  302. /*
  303. * dp_service_mon_rings()- timer to reap monitor rings
  304. * reqd as we are not getting ppdu end interrupts
  305. * @arg: SoC Handle
  306. *
  307. * Return:
  308. *
  309. */
  310. static void dp_service_mon_rings(void *arg)
  311. {
  312. struct dp_soc *soc = (struct dp_soc *)arg;
  313. int ring = 0, work_done, mac_id;
  314. struct dp_pdev *pdev = NULL;
  315. for (ring = 0 ; ring < MAX_PDEV_CNT; ring++) {
  316. pdev = soc->pdev_list[ring];
  317. if (!pdev)
  318. continue;
  319. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  320. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  321. pdev->pdev_id);
  322. work_done = dp_mon_process(soc, mac_for_pdev,
  323. QCA_NAPI_BUDGET);
  324. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  325. FL("Reaped %d descs from Monitor rings"),
  326. work_done);
  327. }
  328. }
  329. qdf_timer_mod(&soc->mon_reap_timer, DP_INTR_POLL_TIMER_MS);
  330. }
  331. #ifndef REMOVE_PKT_LOG
  332. /**
  333. * dp_pkt_log_init() - API to initialize packet log
  334. * @ppdev: physical device handle
  335. * @scn: HIF context
  336. *
  337. * Return: none
  338. */
  339. void dp_pkt_log_init(struct cdp_pdev *ppdev, void *scn)
  340. {
  341. struct dp_pdev *handle = (struct dp_pdev *)ppdev;
  342. if (handle->pkt_log_init) {
  343. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  344. "%s: Packet log not initialized", __func__);
  345. return;
  346. }
  347. pktlog_sethandle(&handle->pl_dev, scn);
  348. pktlog_set_callback_regtype(PKTLOG_LITE_CALLBACK_REGISTRATION);
  349. if (pktlogmod_init(scn)) {
  350. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  351. "%s: pktlogmod_init failed", __func__);
  352. handle->pkt_log_init = false;
  353. } else {
  354. handle->pkt_log_init = true;
  355. }
  356. }
  357. /**
  358. * dp_pkt_log_con_service() - connect packet log service
  359. * @ppdev: physical device handle
  360. * @scn: device context
  361. *
  362. * Return: none
  363. */
  364. static void dp_pkt_log_con_service(struct cdp_pdev *ppdev, void *scn)
  365. {
  366. struct dp_pdev *pdev = (struct dp_pdev *)ppdev;
  367. dp_pkt_log_init((struct cdp_pdev *)pdev, scn);
  368. pktlog_htc_attach();
  369. }
  370. /**
  371. * dp_pktlogmod_exit() - API to cleanup pktlog info
  372. * @handle: Pdev handle
  373. *
  374. * Return: none
  375. */
  376. static void dp_pktlogmod_exit(struct dp_pdev *handle)
  377. {
  378. void *scn = (void *)handle->soc->hif_handle;
  379. if (!scn) {
  380. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  381. "%s: Invalid hif(scn) handle", __func__);
  382. return;
  383. }
  384. pktlogmod_exit(scn);
  385. handle->pkt_log_init = false;
  386. }
  387. #endif
  388. #else
  389. static void dp_pktlogmod_exit(struct dp_pdev *handle) { }
  390. /**
  391. * dp_soc_get_mon_mask_for_interrupt_mode() - get mon mode mask for intr mode
  392. * @soc: pointer to dp_soc handle
  393. * @intr_ctx_num: interrupt context number for which mon mask is needed
  394. *
  395. * Return: mon mask value
  396. */
  397. static inline
  398. uint32_t dp_soc_get_mon_mask_for_interrupt_mode(struct dp_soc *soc, int intr_ctx_num)
  399. {
  400. return wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  401. }
  402. #endif
  403. static int dp_peer_add_ast_wifi3(struct cdp_soc_t *soc_hdl,
  404. struct cdp_peer *peer_hdl,
  405. uint8_t *mac_addr,
  406. enum cdp_txrx_ast_entry_type type,
  407. uint32_t flags)
  408. {
  409. return dp_peer_add_ast((struct dp_soc *)soc_hdl,
  410. (struct dp_peer *)peer_hdl,
  411. mac_addr,
  412. type,
  413. flags);
  414. }
  415. static void dp_peer_del_ast_wifi3(struct cdp_soc_t *soc_hdl,
  416. void *ast_entry_hdl)
  417. {
  418. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  419. qdf_spin_lock_bh(&soc->ast_lock);
  420. dp_peer_del_ast((struct dp_soc *)soc_hdl,
  421. (struct dp_ast_entry *)ast_entry_hdl);
  422. qdf_spin_unlock_bh(&soc->ast_lock);
  423. }
  424. static int dp_peer_update_ast_wifi3(struct cdp_soc_t *soc_hdl,
  425. struct cdp_peer *peer_hdl,
  426. uint8_t *wds_macaddr,
  427. uint32_t flags)
  428. {
  429. int status = -1;
  430. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  431. struct dp_ast_entry *ast_entry = NULL;
  432. qdf_spin_lock_bh(&soc->ast_lock);
  433. ast_entry = dp_peer_ast_hash_find(soc, wds_macaddr);
  434. if (ast_entry) {
  435. status = dp_peer_update_ast(soc,
  436. (struct dp_peer *)peer_hdl,
  437. ast_entry, flags);
  438. }
  439. qdf_spin_unlock_bh(&soc->ast_lock);
  440. return status;
  441. }
  442. /*
  443. * dp_wds_reset_ast_wifi3() - Reset the is_active param for ast entry
  444. * @soc_handle: Datapath SOC handle
  445. * @wds_macaddr: MAC address of the WDS entry to be added
  446. * @vdev_hdl: vdev handle
  447. * Return: None
  448. */
  449. static void dp_wds_reset_ast_wifi3(struct cdp_soc_t *soc_hdl,
  450. uint8_t *wds_macaddr, void *vdev_hdl)
  451. {
  452. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  453. struct dp_ast_entry *ast_entry = NULL;
  454. qdf_spin_lock_bh(&soc->ast_lock);
  455. ast_entry = dp_peer_ast_hash_find(soc, wds_macaddr);
  456. if (ast_entry) {
  457. if (ast_entry->type != CDP_TXRX_AST_TYPE_STATIC)
  458. ast_entry->is_active = TRUE;
  459. }
  460. qdf_spin_unlock_bh(&soc->ast_lock);
  461. }
  462. /*
  463. * dp_wds_reset_ast_table_wifi3() - Reset the is_active param for all ast entry
  464. * @soc: Datapath SOC handle
  465. * @vdev_hdl: vdev handle
  466. *
  467. * Return: None
  468. */
  469. static void dp_wds_reset_ast_table_wifi3(struct cdp_soc_t *soc_hdl,
  470. void *vdev_hdl)
  471. {
  472. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  473. struct dp_pdev *pdev;
  474. struct dp_vdev *vdev;
  475. struct dp_peer *peer;
  476. struct dp_ast_entry *ase, *temp_ase;
  477. int i;
  478. qdf_spin_lock_bh(&soc->ast_lock);
  479. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  480. pdev = soc->pdev_list[i];
  481. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  482. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  483. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  484. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  485. if (ase->type ==
  486. CDP_TXRX_AST_TYPE_STATIC)
  487. continue;
  488. ase->is_active = TRUE;
  489. }
  490. }
  491. }
  492. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  493. }
  494. qdf_spin_unlock_bh(&soc->ast_lock);
  495. }
  496. /*
  497. * dp_wds_flush_ast_table_wifi3() - Delete all wds and hmwds ast entry
  498. * @soc: Datapath SOC handle
  499. *
  500. * Return: None
  501. */
  502. static void dp_wds_flush_ast_table_wifi3(struct cdp_soc_t *soc_hdl)
  503. {
  504. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  505. struct dp_pdev *pdev;
  506. struct dp_vdev *vdev;
  507. struct dp_peer *peer;
  508. struct dp_ast_entry *ase, *temp_ase;
  509. int i;
  510. qdf_spin_lock_bh(&soc->ast_lock);
  511. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  512. pdev = soc->pdev_list[i];
  513. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  514. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  515. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  516. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  517. if (ase->type ==
  518. CDP_TXRX_AST_TYPE_STATIC)
  519. continue;
  520. dp_peer_del_ast(soc, ase);
  521. }
  522. }
  523. }
  524. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  525. }
  526. qdf_spin_unlock_bh(&soc->ast_lock);
  527. }
  528. static void *dp_peer_ast_hash_find_wifi3(struct cdp_soc_t *soc_hdl,
  529. uint8_t *ast_mac_addr)
  530. {
  531. struct dp_ast_entry *ast_entry;
  532. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  533. qdf_spin_lock_bh(&soc->ast_lock);
  534. ast_entry = dp_peer_ast_hash_find(soc, ast_mac_addr);
  535. qdf_spin_unlock_bh(&soc->ast_lock);
  536. return (void *)ast_entry;
  537. }
  538. static uint8_t dp_peer_ast_get_pdev_id_wifi3(struct cdp_soc_t *soc_hdl,
  539. void *ast_entry_hdl)
  540. {
  541. return dp_peer_ast_get_pdev_id((struct dp_soc *)soc_hdl,
  542. (struct dp_ast_entry *)ast_entry_hdl);
  543. }
  544. static uint8_t dp_peer_ast_get_next_hop_wifi3(struct cdp_soc_t *soc_hdl,
  545. void *ast_entry_hdl)
  546. {
  547. return dp_peer_ast_get_next_hop((struct dp_soc *)soc_hdl,
  548. (struct dp_ast_entry *)ast_entry_hdl);
  549. }
  550. static void dp_peer_ast_set_type_wifi3(
  551. struct cdp_soc_t *soc_hdl,
  552. void *ast_entry_hdl,
  553. enum cdp_txrx_ast_entry_type type)
  554. {
  555. dp_peer_ast_set_type((struct dp_soc *)soc_hdl,
  556. (struct dp_ast_entry *)ast_entry_hdl,
  557. type);
  558. }
  559. /**
  560. * dp_srng_find_ring_in_mask() - find which ext_group a ring belongs
  561. * @ring_num: ring num of the ring being queried
  562. * @grp_mask: the grp_mask array for the ring type in question.
  563. *
  564. * The grp_mask array is indexed by group number and the bit fields correspond
  565. * to ring numbers. We are finding which interrupt group a ring belongs to.
  566. *
  567. * Return: the index in the grp_mask array with the ring number.
  568. * -QDF_STATUS_E_NOENT if no entry is found
  569. */
  570. static int dp_srng_find_ring_in_mask(int ring_num, int *grp_mask)
  571. {
  572. int ext_group_num;
  573. int mask = 1 << ring_num;
  574. for (ext_group_num = 0; ext_group_num < WLAN_CFG_INT_NUM_CONTEXTS;
  575. ext_group_num++) {
  576. if (mask & grp_mask[ext_group_num])
  577. return ext_group_num;
  578. }
  579. return -QDF_STATUS_E_NOENT;
  580. }
  581. static int dp_srng_calculate_msi_group(struct dp_soc *soc,
  582. enum hal_ring_type ring_type,
  583. int ring_num)
  584. {
  585. int *grp_mask;
  586. switch (ring_type) {
  587. case WBM2SW_RELEASE:
  588. /* dp_tx_comp_handler - soc->tx_comp_ring */
  589. if (ring_num < 3)
  590. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  591. /* dp_rx_wbm_err_process - soc->rx_rel_ring */
  592. else if (ring_num == 3) {
  593. /* sw treats this as a separate ring type */
  594. grp_mask = &soc->wlan_cfg_ctx->
  595. int_rx_wbm_rel_ring_mask[0];
  596. ring_num = 0;
  597. } else {
  598. qdf_assert(0);
  599. return -QDF_STATUS_E_NOENT;
  600. }
  601. break;
  602. case REO_EXCEPTION:
  603. /* dp_rx_err_process - &soc->reo_exception_ring */
  604. grp_mask = &soc->wlan_cfg_ctx->int_rx_err_ring_mask[0];
  605. break;
  606. case REO_DST:
  607. /* dp_rx_process - soc->reo_dest_ring */
  608. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  609. break;
  610. case REO_STATUS:
  611. /* dp_reo_status_ring_handler - soc->reo_status_ring */
  612. grp_mask = &soc->wlan_cfg_ctx->int_reo_status_ring_mask[0];
  613. break;
  614. /* dp_rx_mon_status_srng_process - pdev->rxdma_mon_status_ring*/
  615. case RXDMA_MONITOR_STATUS:
  616. /* dp_rx_mon_dest_process - pdev->rxdma_mon_dst_ring */
  617. case RXDMA_MONITOR_DST:
  618. /* dp_mon_process */
  619. grp_mask = &soc->wlan_cfg_ctx->int_rx_mon_ring_mask[0];
  620. break;
  621. case RXDMA_DST:
  622. /* dp_rxdma_err_process */
  623. grp_mask = &soc->wlan_cfg_ctx->int_rxdma2host_ring_mask[0];
  624. break;
  625. case RXDMA_BUF:
  626. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  627. break;
  628. case RXDMA_MONITOR_BUF:
  629. /* TODO: support low_thresh interrupt */
  630. return -QDF_STATUS_E_NOENT;
  631. break;
  632. case TCL_DATA:
  633. case TCL_CMD:
  634. case REO_CMD:
  635. case SW2WBM_RELEASE:
  636. case WBM_IDLE_LINK:
  637. /* normally empty SW_TO_HW rings */
  638. return -QDF_STATUS_E_NOENT;
  639. break;
  640. case TCL_STATUS:
  641. case REO_REINJECT:
  642. /* misc unused rings */
  643. return -QDF_STATUS_E_NOENT;
  644. break;
  645. case CE_SRC:
  646. case CE_DST:
  647. case CE_DST_STATUS:
  648. /* CE_rings - currently handled by hif */
  649. default:
  650. return -QDF_STATUS_E_NOENT;
  651. break;
  652. }
  653. return dp_srng_find_ring_in_mask(ring_num, grp_mask);
  654. }
  655. static void dp_srng_msi_setup(struct dp_soc *soc, struct hal_srng_params
  656. *ring_params, int ring_type, int ring_num)
  657. {
  658. int msi_group_number;
  659. int msi_data_count;
  660. int ret;
  661. uint32_t msi_data_start, msi_irq_start, addr_low, addr_high;
  662. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  663. &msi_data_count, &msi_data_start,
  664. &msi_irq_start);
  665. if (ret)
  666. return;
  667. msi_group_number = dp_srng_calculate_msi_group(soc, ring_type,
  668. ring_num);
  669. if (msi_group_number < 0) {
  670. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  671. FL("ring not part of an ext_group; ring_type: %d,ring_num %d"),
  672. ring_type, ring_num);
  673. ring_params->msi_addr = 0;
  674. ring_params->msi_data = 0;
  675. return;
  676. }
  677. if (msi_group_number > msi_data_count) {
  678. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  679. FL("2 msi_groups will share an msi; msi_group_num %d"),
  680. msi_group_number);
  681. QDF_ASSERT(0);
  682. }
  683. pld_get_msi_address(soc->osdev->dev, &addr_low, &addr_high);
  684. ring_params->msi_addr = addr_low;
  685. ring_params->msi_addr |= (qdf_dma_addr_t)(((uint64_t)addr_high) << 32);
  686. ring_params->msi_data = (msi_group_number % msi_data_count)
  687. + msi_data_start;
  688. ring_params->flags |= HAL_SRNG_MSI_INTR;
  689. }
  690. /**
  691. * dp_print_ast_stats() - Dump AST table contents
  692. * @soc: Datapath soc handle
  693. *
  694. * return void
  695. */
  696. #ifdef FEATURE_AST
  697. static void dp_print_ast_stats(struct dp_soc *soc)
  698. {
  699. uint8_t i;
  700. uint8_t num_entries = 0;
  701. struct dp_vdev *vdev;
  702. struct dp_pdev *pdev;
  703. struct dp_peer *peer;
  704. struct dp_ast_entry *ase, *tmp_ase;
  705. char type[5][10] = {"NONE", "STATIC", "WDS", "MEC", "HMWDS"};
  706. DP_PRINT_STATS("AST Stats:");
  707. DP_PRINT_STATS(" Entries Added = %d", soc->stats.ast.added);
  708. DP_PRINT_STATS(" Entries Deleted = %d", soc->stats.ast.deleted);
  709. DP_PRINT_STATS(" Entries Agedout = %d", soc->stats.ast.aged_out);
  710. DP_PRINT_STATS("AST Table:");
  711. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  712. pdev = soc->pdev_list[i];
  713. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  714. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  715. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  716. DP_PEER_ITERATE_ASE_LIST(peer, ase, tmp_ase) {
  717. DP_PRINT_STATS("%6d mac_addr = %pM"
  718. " peer_mac_addr = %pM"
  719. " type = %s"
  720. " next_hop = %d"
  721. " is_active = %d"
  722. " is_bss = %d"
  723. " ast_idx = %d"
  724. " pdev_id = %d"
  725. " vdev_id = %d",
  726. ++num_entries,
  727. ase->mac_addr.raw,
  728. ase->peer->mac_addr.raw,
  729. type[ase->type],
  730. ase->next_hop,
  731. ase->is_active,
  732. ase->is_bss,
  733. ase->ast_idx,
  734. ase->pdev_id,
  735. ase->vdev_id);
  736. }
  737. }
  738. }
  739. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  740. }
  741. }
  742. #else
  743. static void dp_print_ast_stats(struct dp_soc *soc)
  744. {
  745. DP_PRINT_STATS("AST Stats not available.Enable FEATURE_AST");
  746. return;
  747. }
  748. #endif
  749. static void dp_print_peer_table(struct dp_vdev *vdev)
  750. {
  751. struct dp_peer *peer = NULL;
  752. DP_PRINT_STATS("Dumping Peer Table Stats:");
  753. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  754. if (!peer) {
  755. DP_PRINT_STATS("Invalid Peer");
  756. return;
  757. }
  758. DP_PRINT_STATS(" peer_mac_addr = %pM"
  759. " nawds_enabled = %d"
  760. " bss_peer = %d"
  761. " wapi = %d"
  762. " wds_enabled = %d"
  763. " delete in progress = %d",
  764. peer->mac_addr.raw,
  765. peer->nawds_enabled,
  766. peer->bss_peer,
  767. peer->wapi,
  768. peer->wds_enabled,
  769. peer->delete_in_progress);
  770. }
  771. }
  772. /*
  773. * dp_setup_srng - Internal function to setup SRNG rings used by data path
  774. */
  775. static int dp_srng_setup(struct dp_soc *soc, struct dp_srng *srng,
  776. int ring_type, int ring_num, int mac_id, uint32_t num_entries)
  777. {
  778. void *hal_soc = soc->hal_soc;
  779. uint32_t entry_size = hal_srng_get_entrysize(hal_soc, ring_type);
  780. /* TODO: See if we should get align size from hal */
  781. uint32_t ring_base_align = 8;
  782. struct hal_srng_params ring_params;
  783. uint32_t max_entries = hal_srng_max_entries(hal_soc, ring_type);
  784. /* TODO: Currently hal layer takes care of endianness related settings.
  785. * See if these settings need to passed from DP layer
  786. */
  787. ring_params.flags = 0;
  788. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  789. FL("Ring type: %d, num:%d"), ring_type, ring_num);
  790. num_entries = (num_entries > max_entries) ? max_entries : num_entries;
  791. srng->hal_srng = NULL;
  792. srng->alloc_size = (num_entries * entry_size) + ring_base_align - 1;
  793. srng->num_entries = num_entries;
  794. srng->base_vaddr_unaligned = qdf_mem_alloc_consistent(
  795. soc->osdev, soc->osdev->dev, srng->alloc_size,
  796. &(srng->base_paddr_unaligned));
  797. if (!srng->base_vaddr_unaligned) {
  798. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  799. FL("alloc failed - ring_type: %d, ring_num %d"),
  800. ring_type, ring_num);
  801. return QDF_STATUS_E_NOMEM;
  802. }
  803. ring_params.ring_base_vaddr = srng->base_vaddr_unaligned +
  804. ((unsigned long)srng->base_vaddr_unaligned % ring_base_align);
  805. ring_params.ring_base_paddr = srng->base_paddr_unaligned +
  806. ((unsigned long)(ring_params.ring_base_vaddr) -
  807. (unsigned long)srng->base_vaddr_unaligned);
  808. ring_params.num_entries = num_entries;
  809. if (soc->intr_mode == DP_INTR_MSI) {
  810. dp_srng_msi_setup(soc, &ring_params, ring_type, ring_num);
  811. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  812. FL("Using MSI for ring_type: %d, ring_num %d"),
  813. ring_type, ring_num);
  814. } else {
  815. ring_params.msi_data = 0;
  816. ring_params.msi_addr = 0;
  817. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  818. FL("Skipping MSI for ring_type: %d, ring_num %d"),
  819. ring_type, ring_num);
  820. }
  821. /*
  822. * Setup interrupt timer and batch counter thresholds for
  823. * interrupt mitigation based on ring type
  824. */
  825. if (ring_type == REO_DST) {
  826. ring_params.intr_timer_thres_us =
  827. wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
  828. ring_params.intr_batch_cntr_thres_entries =
  829. wlan_cfg_get_int_batch_threshold_rx(soc->wlan_cfg_ctx);
  830. } else if (ring_type == WBM2SW_RELEASE && (ring_num < 3)) {
  831. ring_params.intr_timer_thres_us =
  832. wlan_cfg_get_int_timer_threshold_tx(soc->wlan_cfg_ctx);
  833. ring_params.intr_batch_cntr_thres_entries =
  834. wlan_cfg_get_int_batch_threshold_tx(soc->wlan_cfg_ctx);
  835. } else {
  836. ring_params.intr_timer_thres_us =
  837. wlan_cfg_get_int_timer_threshold_other(soc->wlan_cfg_ctx);
  838. ring_params.intr_batch_cntr_thres_entries =
  839. wlan_cfg_get_int_batch_threshold_other(soc->wlan_cfg_ctx);
  840. }
  841. /* Enable low threshold interrupts for rx buffer rings (regular and
  842. * monitor buffer rings.
  843. * TODO: See if this is required for any other ring
  844. */
  845. if ((ring_type == RXDMA_BUF) || (ring_type == RXDMA_MONITOR_BUF) ||
  846. (ring_type == RXDMA_MONITOR_STATUS)) {
  847. /* TODO: Setting low threshold to 1/8th of ring size
  848. * see if this needs to be configurable
  849. */
  850. ring_params.low_threshold = num_entries >> 3;
  851. ring_params.flags |= HAL_SRNG_LOW_THRES_INTR_ENABLE;
  852. ring_params.intr_timer_thres_us =
  853. wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
  854. ring_params.intr_batch_cntr_thres_entries = 0;
  855. }
  856. srng->hal_srng = hal_srng_setup(hal_soc, ring_type, ring_num,
  857. mac_id, &ring_params);
  858. if (!srng->hal_srng) {
  859. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  860. srng->alloc_size,
  861. srng->base_vaddr_unaligned,
  862. srng->base_paddr_unaligned, 0);
  863. }
  864. return 0;
  865. }
  866. /**
  867. * dp_srng_cleanup - Internal function to cleanup SRNG rings used by data path
  868. * Any buffers allocated and attached to ring entries are expected to be freed
  869. * before calling this function.
  870. */
  871. static void dp_srng_cleanup(struct dp_soc *soc, struct dp_srng *srng,
  872. int ring_type, int ring_num)
  873. {
  874. if (!srng->hal_srng) {
  875. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  876. FL("Ring type: %d, num:%d not setup"),
  877. ring_type, ring_num);
  878. return;
  879. }
  880. hal_srng_cleanup(soc->hal_soc, srng->hal_srng);
  881. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  882. srng->alloc_size,
  883. srng->base_vaddr_unaligned,
  884. srng->base_paddr_unaligned, 0);
  885. srng->hal_srng = NULL;
  886. }
  887. /* TODO: Need this interface from HIF */
  888. void *hif_get_hal_handle(void *hif_handle);
  889. /*
  890. * dp_service_srngs() - Top level interrupt handler for DP Ring interrupts
  891. * @dp_ctx: DP SOC handle
  892. * @budget: Number of frames/descriptors that can be processed in one shot
  893. *
  894. * Return: remaining budget/quota for the soc device
  895. */
  896. static uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget)
  897. {
  898. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  899. struct dp_soc *soc = int_ctx->soc;
  900. int ring = 0;
  901. uint32_t work_done = 0;
  902. int budget = dp_budget;
  903. uint8_t tx_mask = int_ctx->tx_ring_mask;
  904. uint8_t rx_mask = int_ctx->rx_ring_mask;
  905. uint8_t rx_err_mask = int_ctx->rx_err_ring_mask;
  906. uint8_t rx_wbm_rel_mask = int_ctx->rx_wbm_rel_ring_mask;
  907. uint8_t reo_status_mask = int_ctx->reo_status_ring_mask;
  908. uint32_t remaining_quota = dp_budget;
  909. struct dp_pdev *pdev = NULL;
  910. int mac_id;
  911. /* Process Tx completion interrupts first to return back buffers */
  912. while (tx_mask) {
  913. if (tx_mask & 0x1) {
  914. work_done = dp_tx_comp_handler(soc,
  915. soc->tx_comp_ring[ring].hal_srng,
  916. remaining_quota);
  917. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  918. "tx mask 0x%x ring %d, budget %d, work_done %d",
  919. tx_mask, ring, budget, work_done);
  920. budget -= work_done;
  921. if (budget <= 0)
  922. goto budget_done;
  923. remaining_quota = budget;
  924. }
  925. tx_mask = tx_mask >> 1;
  926. ring++;
  927. }
  928. /* Process REO Exception ring interrupt */
  929. if (rx_err_mask) {
  930. work_done = dp_rx_err_process(soc,
  931. soc->reo_exception_ring.hal_srng,
  932. remaining_quota);
  933. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  934. "REO Exception Ring: work_done %d budget %d",
  935. work_done, budget);
  936. budget -= work_done;
  937. if (budget <= 0) {
  938. goto budget_done;
  939. }
  940. remaining_quota = budget;
  941. }
  942. /* Process Rx WBM release ring interrupt */
  943. if (rx_wbm_rel_mask) {
  944. work_done = dp_rx_wbm_err_process(soc,
  945. soc->rx_rel_ring.hal_srng, remaining_quota);
  946. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  947. "WBM Release Ring: work_done %d budget %d",
  948. work_done, budget);
  949. budget -= work_done;
  950. if (budget <= 0) {
  951. goto budget_done;
  952. }
  953. remaining_quota = budget;
  954. }
  955. /* Process Rx interrupts */
  956. if (rx_mask) {
  957. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  958. if (rx_mask & (1 << ring)) {
  959. work_done = dp_rx_process(int_ctx,
  960. soc->reo_dest_ring[ring].hal_srng,
  961. remaining_quota);
  962. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  963. "rx mask 0x%x ring %d, work_done %d budget %d",
  964. rx_mask, ring, work_done, budget);
  965. budget -= work_done;
  966. if (budget <= 0)
  967. goto budget_done;
  968. remaining_quota = budget;
  969. }
  970. }
  971. for (ring = 0; ring < MAX_RX_MAC_RINGS; ring++) {
  972. work_done = dp_rxdma_err_process(soc, ring,
  973. remaining_quota);
  974. budget -= work_done;
  975. }
  976. }
  977. if (reo_status_mask)
  978. dp_reo_status_ring_handler(soc);
  979. /* Process LMAC interrupts */
  980. for (ring = 0 ; ring < MAX_PDEV_CNT; ring++) {
  981. pdev = soc->pdev_list[ring];
  982. if (pdev == NULL)
  983. continue;
  984. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  985. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  986. pdev->pdev_id);
  987. if (int_ctx->rx_mon_ring_mask & (1 << mac_for_pdev)) {
  988. work_done = dp_mon_process(soc, mac_for_pdev,
  989. remaining_quota);
  990. budget -= work_done;
  991. if (budget <= 0)
  992. goto budget_done;
  993. remaining_quota = budget;
  994. }
  995. if (int_ctx->rxdma2host_ring_mask &
  996. (1 << mac_for_pdev)) {
  997. work_done = dp_rxdma_err_process(soc,
  998. mac_for_pdev,
  999. remaining_quota);
  1000. budget -= work_done;
  1001. if (budget <= 0)
  1002. goto budget_done;
  1003. remaining_quota = budget;
  1004. }
  1005. if (int_ctx->host2rxdma_ring_mask &
  1006. (1 << mac_for_pdev)) {
  1007. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1008. union dp_rx_desc_list_elem_t *tail = NULL;
  1009. struct dp_srng *rx_refill_buf_ring =
  1010. &pdev->rx_refill_buf_ring;
  1011. DP_STATS_INC(pdev, replenish.low_thresh_intrs,
  1012. 1);
  1013. dp_rx_buffers_replenish(soc, mac_for_pdev,
  1014. rx_refill_buf_ring,
  1015. &soc->rx_desc_buf[mac_for_pdev], 0,
  1016. &desc_list, &tail);
  1017. }
  1018. }
  1019. }
  1020. qdf_lro_flush(int_ctx->lro_ctx);
  1021. budget_done:
  1022. return dp_budget - budget;
  1023. }
  1024. #ifdef DP_INTR_POLL_BASED
  1025. /* dp_interrupt_timer()- timer poll for interrupts
  1026. *
  1027. * @arg: SoC Handle
  1028. *
  1029. * Return:
  1030. *
  1031. */
  1032. static void dp_interrupt_timer(void *arg)
  1033. {
  1034. struct dp_soc *soc = (struct dp_soc *) arg;
  1035. int i;
  1036. if (qdf_atomic_read(&soc->cmn_init_done)) {
  1037. for (i = 0;
  1038. i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  1039. dp_service_srngs(&soc->intr_ctx[i], 0xffff);
  1040. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  1041. }
  1042. }
  1043. /*
  1044. * dp_soc_interrupt_attach_poll() - Register handlers for DP interrupts
  1045. * @txrx_soc: DP SOC handle
  1046. *
  1047. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  1048. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  1049. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  1050. *
  1051. * Return: 0 for success. nonzero for failure.
  1052. */
  1053. static QDF_STATUS dp_soc_attach_poll(void *txrx_soc)
  1054. {
  1055. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1056. int i;
  1057. soc->intr_mode = DP_INTR_POLL;
  1058. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  1059. soc->intr_ctx[i].dp_intr_id = i;
  1060. soc->intr_ctx[i].tx_ring_mask =
  1061. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  1062. soc->intr_ctx[i].rx_ring_mask =
  1063. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  1064. soc->intr_ctx[i].rx_mon_ring_mask =
  1065. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  1066. soc->intr_ctx[i].rx_err_ring_mask =
  1067. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  1068. soc->intr_ctx[i].rx_wbm_rel_ring_mask =
  1069. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  1070. soc->intr_ctx[i].reo_status_ring_mask =
  1071. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  1072. soc->intr_ctx[i].rxdma2host_ring_mask =
  1073. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  1074. soc->intr_ctx[i].soc = soc;
  1075. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  1076. }
  1077. qdf_timer_init(soc->osdev, &soc->int_timer,
  1078. dp_interrupt_timer, (void *)soc,
  1079. QDF_TIMER_TYPE_WAKE_APPS);
  1080. return QDF_STATUS_SUCCESS;
  1081. }
  1082. #else
  1083. static QDF_STATUS dp_soc_attach_poll(void *txrx_soc)
  1084. {
  1085. return -QDF_STATUS_E_NOSUPPORT;
  1086. }
  1087. #endif
  1088. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc);
  1089. #if defined(CONFIG_MCL)
  1090. extern int con_mode_monitor;
  1091. /*
  1092. * dp_soc_interrupt_attach_wrapper() - Register handlers for DP interrupts
  1093. * @txrx_soc: DP SOC handle
  1094. *
  1095. * Call the appropriate attach function based on the mode of operation.
  1096. * This is a WAR for enabling monitor mode.
  1097. *
  1098. * Return: 0 for success. nonzero for failure.
  1099. */
  1100. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  1101. {
  1102. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1103. if (!(soc->wlan_cfg_ctx->napi_enabled) ||
  1104. con_mode_monitor == QDF_GLOBAL_MONITOR_MODE) {
  1105. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1106. "%s: Poll mode", __func__);
  1107. return dp_soc_attach_poll(txrx_soc);
  1108. } else {
  1109. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1110. "%s: Interrupt mode", __func__);
  1111. return dp_soc_interrupt_attach(txrx_soc);
  1112. }
  1113. }
  1114. #else
  1115. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  1116. {
  1117. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1118. if (hif_is_polled_mode_enabled(soc->hif_handle))
  1119. return dp_soc_attach_poll(txrx_soc);
  1120. else
  1121. return dp_soc_interrupt_attach(txrx_soc);
  1122. }
  1123. #endif
  1124. static void dp_soc_interrupt_map_calculate_integrated(struct dp_soc *soc,
  1125. int intr_ctx_num, int *irq_id_map, int *num_irq_r)
  1126. {
  1127. int j;
  1128. int num_irq = 0;
  1129. int tx_mask =
  1130. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  1131. int rx_mask =
  1132. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  1133. int rx_mon_mask =
  1134. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  1135. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  1136. soc->wlan_cfg_ctx, intr_ctx_num);
  1137. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  1138. soc->wlan_cfg_ctx, intr_ctx_num);
  1139. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  1140. soc->wlan_cfg_ctx, intr_ctx_num);
  1141. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  1142. soc->wlan_cfg_ctx, intr_ctx_num);
  1143. int host2rxdma_ring_mask = wlan_cfg_get_host2rxdma_ring_mask(
  1144. soc->wlan_cfg_ctx, intr_ctx_num);
  1145. for (j = 0; j < HIF_MAX_GRP_IRQ; j++) {
  1146. if (tx_mask & (1 << j)) {
  1147. irq_id_map[num_irq++] =
  1148. (wbm2host_tx_completions_ring1 - j);
  1149. }
  1150. if (rx_mask & (1 << j)) {
  1151. irq_id_map[num_irq++] =
  1152. (reo2host_destination_ring1 - j);
  1153. }
  1154. if (rxdma2host_ring_mask & (1 << j)) {
  1155. irq_id_map[num_irq++] =
  1156. rxdma2host_destination_ring_mac1 -
  1157. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1158. }
  1159. if (host2rxdma_ring_mask & (1 << j)) {
  1160. irq_id_map[num_irq++] =
  1161. host2rxdma_host_buf_ring_mac1 -
  1162. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1163. }
  1164. if (rx_mon_mask & (1 << j)) {
  1165. irq_id_map[num_irq++] =
  1166. ppdu_end_interrupts_mac1 -
  1167. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1168. irq_id_map[num_irq++] =
  1169. rxdma2host_monitor_status_ring_mac1 -
  1170. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1171. }
  1172. if (rx_wbm_rel_ring_mask & (1 << j))
  1173. irq_id_map[num_irq++] = wbm2host_rx_release;
  1174. if (rx_err_ring_mask & (1 << j))
  1175. irq_id_map[num_irq++] = reo2host_exception;
  1176. if (reo_status_ring_mask & (1 << j))
  1177. irq_id_map[num_irq++] = reo2host_status;
  1178. }
  1179. *num_irq_r = num_irq;
  1180. }
  1181. static void dp_soc_interrupt_map_calculate_msi(struct dp_soc *soc,
  1182. int intr_ctx_num, int *irq_id_map, int *num_irq_r,
  1183. int msi_vector_count, int msi_vector_start)
  1184. {
  1185. int tx_mask = wlan_cfg_get_tx_ring_mask(
  1186. soc->wlan_cfg_ctx, intr_ctx_num);
  1187. int rx_mask = wlan_cfg_get_rx_ring_mask(
  1188. soc->wlan_cfg_ctx, intr_ctx_num);
  1189. int rx_mon_mask = wlan_cfg_get_rx_mon_ring_mask(
  1190. soc->wlan_cfg_ctx, intr_ctx_num);
  1191. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  1192. soc->wlan_cfg_ctx, intr_ctx_num);
  1193. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  1194. soc->wlan_cfg_ctx, intr_ctx_num);
  1195. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  1196. soc->wlan_cfg_ctx, intr_ctx_num);
  1197. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  1198. soc->wlan_cfg_ctx, intr_ctx_num);
  1199. unsigned int vector =
  1200. (intr_ctx_num % msi_vector_count) + msi_vector_start;
  1201. int num_irq = 0;
  1202. soc->intr_mode = DP_INTR_MSI;
  1203. if (tx_mask | rx_mask | rx_mon_mask | rx_err_ring_mask |
  1204. rx_wbm_rel_ring_mask | reo_status_ring_mask | rxdma2host_ring_mask)
  1205. irq_id_map[num_irq++] =
  1206. pld_get_msi_irq(soc->osdev->dev, vector);
  1207. *num_irq_r = num_irq;
  1208. }
  1209. static void dp_soc_interrupt_map_calculate(struct dp_soc *soc, int intr_ctx_num,
  1210. int *irq_id_map, int *num_irq)
  1211. {
  1212. int msi_vector_count, ret;
  1213. uint32_t msi_base_data, msi_vector_start;
  1214. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  1215. &msi_vector_count,
  1216. &msi_base_data,
  1217. &msi_vector_start);
  1218. if (ret)
  1219. return dp_soc_interrupt_map_calculate_integrated(soc,
  1220. intr_ctx_num, irq_id_map, num_irq);
  1221. else
  1222. dp_soc_interrupt_map_calculate_msi(soc,
  1223. intr_ctx_num, irq_id_map, num_irq,
  1224. msi_vector_count, msi_vector_start);
  1225. }
  1226. /*
  1227. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  1228. * @txrx_soc: DP SOC handle
  1229. *
  1230. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  1231. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  1232. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  1233. *
  1234. * Return: 0 for success. nonzero for failure.
  1235. */
  1236. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  1237. {
  1238. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1239. int i = 0;
  1240. int num_irq = 0;
  1241. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  1242. int ret = 0;
  1243. /* Map of IRQ ids registered with one interrupt context */
  1244. int irq_id_map[HIF_MAX_GRP_IRQ];
  1245. int tx_mask =
  1246. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  1247. int rx_mask =
  1248. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  1249. int rx_mon_mask =
  1250. dp_soc_get_mon_mask_for_interrupt_mode(soc, i);
  1251. int rx_err_ring_mask =
  1252. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  1253. int rx_wbm_rel_ring_mask =
  1254. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  1255. int reo_status_ring_mask =
  1256. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  1257. int rxdma2host_ring_mask =
  1258. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  1259. int host2rxdma_ring_mask =
  1260. wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx, i);
  1261. soc->intr_ctx[i].dp_intr_id = i;
  1262. soc->intr_ctx[i].tx_ring_mask = tx_mask;
  1263. soc->intr_ctx[i].rx_ring_mask = rx_mask;
  1264. soc->intr_ctx[i].rx_mon_ring_mask = rx_mon_mask;
  1265. soc->intr_ctx[i].rx_err_ring_mask = rx_err_ring_mask;
  1266. soc->intr_ctx[i].rxdma2host_ring_mask = rxdma2host_ring_mask;
  1267. soc->intr_ctx[i].host2rxdma_ring_mask = host2rxdma_ring_mask;
  1268. soc->intr_ctx[i].rx_wbm_rel_ring_mask = rx_wbm_rel_ring_mask;
  1269. soc->intr_ctx[i].reo_status_ring_mask = reo_status_ring_mask;
  1270. soc->intr_ctx[i].soc = soc;
  1271. num_irq = 0;
  1272. dp_soc_interrupt_map_calculate(soc, i, &irq_id_map[0],
  1273. &num_irq);
  1274. ret = hif_register_ext_group(soc->hif_handle,
  1275. num_irq, irq_id_map, dp_service_srngs,
  1276. &soc->intr_ctx[i], "dp_intr",
  1277. HIF_EXEC_NAPI_TYPE, QCA_NAPI_DEF_SCALE_BIN_SHIFT);
  1278. if (ret) {
  1279. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1280. FL("failed, ret = %d"), ret);
  1281. return QDF_STATUS_E_FAILURE;
  1282. }
  1283. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  1284. }
  1285. hif_configure_ext_group_interrupts(soc->hif_handle);
  1286. return QDF_STATUS_SUCCESS;
  1287. }
  1288. /*
  1289. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  1290. * @txrx_soc: DP SOC handle
  1291. *
  1292. * Return: void
  1293. */
  1294. static void dp_soc_interrupt_detach(void *txrx_soc)
  1295. {
  1296. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1297. int i;
  1298. if (soc->intr_mode == DP_INTR_POLL) {
  1299. qdf_timer_stop(&soc->int_timer);
  1300. qdf_timer_free(&soc->int_timer);
  1301. } else {
  1302. hif_deregister_exec_group(soc->hif_handle, "dp_intr");
  1303. }
  1304. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  1305. soc->intr_ctx[i].tx_ring_mask = 0;
  1306. soc->intr_ctx[i].rx_ring_mask = 0;
  1307. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  1308. soc->intr_ctx[i].rx_err_ring_mask = 0;
  1309. soc->intr_ctx[i].rx_wbm_rel_ring_mask = 0;
  1310. soc->intr_ctx[i].reo_status_ring_mask = 0;
  1311. soc->intr_ctx[i].rxdma2host_ring_mask = 0;
  1312. soc->intr_ctx[i].host2rxdma_ring_mask = 0;
  1313. qdf_lro_deinit(soc->intr_ctx[i].lro_ctx);
  1314. }
  1315. }
  1316. #define AVG_MAX_MPDUS_PER_TID 128
  1317. #define AVG_TIDS_PER_CLIENT 2
  1318. #define AVG_FLOWS_PER_TID 2
  1319. #define AVG_MSDUS_PER_FLOW 128
  1320. #define AVG_MSDUS_PER_MPDU 4
  1321. /*
  1322. * Allocate and setup link descriptor pool that will be used by HW for
  1323. * various link and queue descriptors and managed by WBM
  1324. */
  1325. static int dp_hw_link_desc_pool_setup(struct dp_soc *soc)
  1326. {
  1327. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  1328. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  1329. uint32_t max_clients = wlan_cfg_get_max_clients(soc->wlan_cfg_ctx);
  1330. uint32_t num_mpdus_per_link_desc =
  1331. hal_num_mpdus_per_link_desc(soc->hal_soc);
  1332. uint32_t num_msdus_per_link_desc =
  1333. hal_num_msdus_per_link_desc(soc->hal_soc);
  1334. uint32_t num_mpdu_links_per_queue_desc =
  1335. hal_num_mpdu_links_per_queue_desc(soc->hal_soc);
  1336. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  1337. uint32_t total_link_descs, total_mem_size;
  1338. uint32_t num_mpdu_link_descs, num_mpdu_queue_descs;
  1339. uint32_t num_tx_msdu_link_descs, num_rx_msdu_link_descs;
  1340. uint32_t num_link_desc_banks;
  1341. uint32_t last_bank_size = 0;
  1342. uint32_t entry_size, num_entries;
  1343. int i;
  1344. uint32_t desc_id = 0;
  1345. /* Only Tx queue descriptors are allocated from common link descriptor
  1346. * pool Rx queue descriptors are not included in this because (REO queue
  1347. * extension descriptors) they are expected to be allocated contiguously
  1348. * with REO queue descriptors
  1349. */
  1350. num_mpdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1351. AVG_MAX_MPDUS_PER_TID) / num_mpdus_per_link_desc;
  1352. num_mpdu_queue_descs = num_mpdu_link_descs /
  1353. num_mpdu_links_per_queue_desc;
  1354. num_tx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1355. AVG_FLOWS_PER_TID * AVG_MSDUS_PER_FLOW) /
  1356. num_msdus_per_link_desc;
  1357. num_rx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1358. AVG_MAX_MPDUS_PER_TID * AVG_MSDUS_PER_MPDU) / 6;
  1359. num_entries = num_mpdu_link_descs + num_mpdu_queue_descs +
  1360. num_tx_msdu_link_descs + num_rx_msdu_link_descs;
  1361. /* Round up to power of 2 */
  1362. total_link_descs = 1;
  1363. while (total_link_descs < num_entries)
  1364. total_link_descs <<= 1;
  1365. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1366. FL("total_link_descs: %u, link_desc_size: %d"),
  1367. total_link_descs, link_desc_size);
  1368. total_mem_size = total_link_descs * link_desc_size;
  1369. total_mem_size += link_desc_align;
  1370. if (total_mem_size <= max_alloc_size) {
  1371. num_link_desc_banks = 0;
  1372. last_bank_size = total_mem_size;
  1373. } else {
  1374. num_link_desc_banks = (total_mem_size) /
  1375. (max_alloc_size - link_desc_align);
  1376. last_bank_size = total_mem_size %
  1377. (max_alloc_size - link_desc_align);
  1378. }
  1379. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1380. FL("total_mem_size: %d, num_link_desc_banks: %u"),
  1381. total_mem_size, num_link_desc_banks);
  1382. for (i = 0; i < num_link_desc_banks; i++) {
  1383. soc->link_desc_banks[i].base_vaddr_unaligned =
  1384. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  1385. max_alloc_size,
  1386. &(soc->link_desc_banks[i].base_paddr_unaligned));
  1387. soc->link_desc_banks[i].size = max_alloc_size;
  1388. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)(
  1389. soc->link_desc_banks[i].base_vaddr_unaligned) +
  1390. ((unsigned long)(
  1391. soc->link_desc_banks[i].base_vaddr_unaligned) %
  1392. link_desc_align));
  1393. soc->link_desc_banks[i].base_paddr = (unsigned long)(
  1394. soc->link_desc_banks[i].base_paddr_unaligned) +
  1395. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  1396. (unsigned long)(
  1397. soc->link_desc_banks[i].base_vaddr_unaligned));
  1398. if (!soc->link_desc_banks[i].base_vaddr_unaligned) {
  1399. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1400. FL("Link descriptor memory alloc failed"));
  1401. goto fail;
  1402. }
  1403. }
  1404. if (last_bank_size) {
  1405. /* Allocate last bank in case total memory required is not exact
  1406. * multiple of max_alloc_size
  1407. */
  1408. soc->link_desc_banks[i].base_vaddr_unaligned =
  1409. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  1410. last_bank_size,
  1411. &(soc->link_desc_banks[i].base_paddr_unaligned));
  1412. soc->link_desc_banks[i].size = last_bank_size;
  1413. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)
  1414. (soc->link_desc_banks[i].base_vaddr_unaligned) +
  1415. ((unsigned long)(
  1416. soc->link_desc_banks[i].base_vaddr_unaligned) %
  1417. link_desc_align));
  1418. soc->link_desc_banks[i].base_paddr =
  1419. (unsigned long)(
  1420. soc->link_desc_banks[i].base_paddr_unaligned) +
  1421. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  1422. (unsigned long)(
  1423. soc->link_desc_banks[i].base_vaddr_unaligned));
  1424. }
  1425. /* Allocate and setup link descriptor idle list for HW internal use */
  1426. entry_size = hal_srng_get_entrysize(soc->hal_soc, WBM_IDLE_LINK);
  1427. total_mem_size = entry_size * total_link_descs;
  1428. if (total_mem_size <= max_alloc_size) {
  1429. void *desc;
  1430. if (dp_srng_setup(soc, &soc->wbm_idle_link_ring,
  1431. WBM_IDLE_LINK, 0, 0, total_link_descs)) {
  1432. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1433. FL("Link desc idle ring setup failed"));
  1434. goto fail;
  1435. }
  1436. hal_srng_access_start_unlocked(soc->hal_soc,
  1437. soc->wbm_idle_link_ring.hal_srng);
  1438. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  1439. soc->link_desc_banks[i].base_paddr; i++) {
  1440. uint32_t num_entries = (soc->link_desc_banks[i].size -
  1441. ((unsigned long)(
  1442. soc->link_desc_banks[i].base_vaddr) -
  1443. (unsigned long)(
  1444. soc->link_desc_banks[i].base_vaddr_unaligned)))
  1445. / link_desc_size;
  1446. unsigned long paddr = (unsigned long)(
  1447. soc->link_desc_banks[i].base_paddr);
  1448. while (num_entries && (desc = hal_srng_src_get_next(
  1449. soc->hal_soc,
  1450. soc->wbm_idle_link_ring.hal_srng))) {
  1451. hal_set_link_desc_addr(desc,
  1452. LINK_DESC_COOKIE(desc_id, i), paddr);
  1453. num_entries--;
  1454. desc_id++;
  1455. paddr += link_desc_size;
  1456. }
  1457. }
  1458. hal_srng_access_end_unlocked(soc->hal_soc,
  1459. soc->wbm_idle_link_ring.hal_srng);
  1460. } else {
  1461. uint32_t num_scatter_bufs;
  1462. uint32_t num_entries_per_buf;
  1463. uint32_t rem_entries;
  1464. uint8_t *scatter_buf_ptr;
  1465. uint16_t scatter_buf_num;
  1466. soc->wbm_idle_scatter_buf_size =
  1467. hal_idle_list_scatter_buf_size(soc->hal_soc);
  1468. num_entries_per_buf = hal_idle_scatter_buf_num_entries(
  1469. soc->hal_soc, soc->wbm_idle_scatter_buf_size);
  1470. num_scatter_bufs = hal_idle_list_num_scatter_bufs(
  1471. soc->hal_soc, total_mem_size,
  1472. soc->wbm_idle_scatter_buf_size);
  1473. if (num_scatter_bufs > MAX_IDLE_SCATTER_BUFS) {
  1474. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1475. FL("scatter bufs size out of bounds"));
  1476. goto fail;
  1477. }
  1478. for (i = 0; i < num_scatter_bufs; i++) {
  1479. soc->wbm_idle_scatter_buf_base_vaddr[i] =
  1480. qdf_mem_alloc_consistent(soc->osdev,
  1481. soc->osdev->dev,
  1482. soc->wbm_idle_scatter_buf_size,
  1483. &(soc->wbm_idle_scatter_buf_base_paddr[i]));
  1484. if (soc->wbm_idle_scatter_buf_base_vaddr[i] == NULL) {
  1485. QDF_TRACE(QDF_MODULE_ID_DP,
  1486. QDF_TRACE_LEVEL_ERROR,
  1487. FL("Scatter list memory alloc failed"));
  1488. goto fail;
  1489. }
  1490. }
  1491. /* Populate idle list scatter buffers with link descriptor
  1492. * pointers
  1493. */
  1494. scatter_buf_num = 0;
  1495. scatter_buf_ptr = (uint8_t *)(
  1496. soc->wbm_idle_scatter_buf_base_vaddr[scatter_buf_num]);
  1497. rem_entries = num_entries_per_buf;
  1498. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  1499. soc->link_desc_banks[i].base_paddr; i++) {
  1500. uint32_t num_link_descs =
  1501. (soc->link_desc_banks[i].size -
  1502. ((unsigned long)(
  1503. soc->link_desc_banks[i].base_vaddr) -
  1504. (unsigned long)(
  1505. soc->link_desc_banks[i].base_vaddr_unaligned)))
  1506. / link_desc_size;
  1507. unsigned long paddr = (unsigned long)(
  1508. soc->link_desc_banks[i].base_paddr);
  1509. while (num_link_descs) {
  1510. hal_set_link_desc_addr((void *)scatter_buf_ptr,
  1511. LINK_DESC_COOKIE(desc_id, i), paddr);
  1512. num_link_descs--;
  1513. desc_id++;
  1514. paddr += link_desc_size;
  1515. rem_entries--;
  1516. if (rem_entries) {
  1517. scatter_buf_ptr += entry_size;
  1518. } else {
  1519. rem_entries = num_entries_per_buf;
  1520. scatter_buf_num++;
  1521. if (scatter_buf_num >= num_scatter_bufs)
  1522. break;
  1523. scatter_buf_ptr = (uint8_t *)(
  1524. soc->wbm_idle_scatter_buf_base_vaddr[
  1525. scatter_buf_num]);
  1526. }
  1527. }
  1528. }
  1529. /* Setup link descriptor idle list in HW */
  1530. hal_setup_link_idle_list(soc->hal_soc,
  1531. soc->wbm_idle_scatter_buf_base_paddr,
  1532. soc->wbm_idle_scatter_buf_base_vaddr,
  1533. num_scatter_bufs, soc->wbm_idle_scatter_buf_size,
  1534. (uint32_t)(scatter_buf_ptr -
  1535. (uint8_t *)(soc->wbm_idle_scatter_buf_base_vaddr[
  1536. scatter_buf_num-1])), total_link_descs);
  1537. }
  1538. return 0;
  1539. fail:
  1540. if (soc->wbm_idle_link_ring.hal_srng) {
  1541. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  1542. WBM_IDLE_LINK, 0);
  1543. }
  1544. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1545. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1546. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1547. soc->wbm_idle_scatter_buf_size,
  1548. soc->wbm_idle_scatter_buf_base_vaddr[i],
  1549. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  1550. soc->wbm_idle_scatter_buf_base_vaddr[i] = NULL;
  1551. }
  1552. }
  1553. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  1554. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  1555. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1556. soc->link_desc_banks[i].size,
  1557. soc->link_desc_banks[i].base_vaddr_unaligned,
  1558. soc->link_desc_banks[i].base_paddr_unaligned,
  1559. 0);
  1560. soc->link_desc_banks[i].base_vaddr_unaligned = NULL;
  1561. }
  1562. }
  1563. return QDF_STATUS_E_FAILURE;
  1564. }
  1565. /*
  1566. * Free link descriptor pool that was setup HW
  1567. */
  1568. static void dp_hw_link_desc_pool_cleanup(struct dp_soc *soc)
  1569. {
  1570. int i;
  1571. if (soc->wbm_idle_link_ring.hal_srng) {
  1572. dp_srng_cleanup(soc, &soc->wbm_idle_link_ring,
  1573. WBM_IDLE_LINK, 0);
  1574. }
  1575. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1576. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1577. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1578. soc->wbm_idle_scatter_buf_size,
  1579. soc->wbm_idle_scatter_buf_base_vaddr[i],
  1580. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  1581. soc->wbm_idle_scatter_buf_base_vaddr[i] = NULL;
  1582. }
  1583. }
  1584. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  1585. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  1586. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1587. soc->link_desc_banks[i].size,
  1588. soc->link_desc_banks[i].base_vaddr_unaligned,
  1589. soc->link_desc_banks[i].base_paddr_unaligned,
  1590. 0);
  1591. soc->link_desc_banks[i].base_vaddr_unaligned = NULL;
  1592. }
  1593. }
  1594. }
  1595. /* TODO: Following should be configurable */
  1596. #define WBM_RELEASE_RING_SIZE 64
  1597. #define TCL_CMD_RING_SIZE 32
  1598. #define TCL_STATUS_RING_SIZE 32
  1599. #define REO_DST_RING_SIZE_QCA6290 1024
  1600. #define REO_DST_RING_SIZE_QCA8074 2048
  1601. #define REO_REINJECT_RING_SIZE 32
  1602. #define RX_RELEASE_RING_SIZE 1024
  1603. #define REO_EXCEPTION_RING_SIZE 128
  1604. #define REO_CMD_RING_SIZE 64
  1605. #define REO_STATUS_RING_SIZE 128
  1606. #define RXDMA_BUF_RING_SIZE 1024
  1607. #define RXDMA_REFILL_RING_SIZE 4096
  1608. #define RXDMA_MONITOR_BUF_RING_SIZE 4096
  1609. #define RXDMA_MONITOR_DST_RING_SIZE 2048
  1610. #define RXDMA_MONITOR_STATUS_RING_SIZE 1024
  1611. #define RXDMA_MONITOR_DESC_RING_SIZE 4096
  1612. #define RXDMA_ERR_DST_RING_SIZE 1024
  1613. /*
  1614. * dp_wds_aging_timer_fn() - Timer callback function for WDS aging
  1615. * @soc: Datapath SOC handle
  1616. *
  1617. * This is a timer function used to age out stale AST nodes from
  1618. * AST table
  1619. */
  1620. #ifdef FEATURE_WDS
  1621. static void dp_wds_aging_timer_fn(void *soc_hdl)
  1622. {
  1623. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  1624. struct dp_pdev *pdev;
  1625. struct dp_vdev *vdev;
  1626. struct dp_peer *peer;
  1627. struct dp_ast_entry *ase, *temp_ase;
  1628. int i;
  1629. qdf_spin_lock_bh(&soc->ast_lock);
  1630. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  1631. pdev = soc->pdev_list[i];
  1632. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  1633. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  1634. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  1635. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  1636. /*
  1637. * Do not expire static ast entries
  1638. * and HM WDS entries
  1639. */
  1640. if (ase->type != CDP_TXRX_AST_TYPE_WDS)
  1641. continue;
  1642. if (ase->is_active) {
  1643. ase->is_active = FALSE;
  1644. continue;
  1645. }
  1646. DP_STATS_INC(soc, ast.aged_out, 1);
  1647. dp_peer_del_ast(soc, ase);
  1648. }
  1649. }
  1650. }
  1651. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  1652. }
  1653. qdf_spin_unlock_bh(&soc->ast_lock);
  1654. if (qdf_atomic_read(&soc->cmn_init_done))
  1655. qdf_timer_mod(&soc->wds_aging_timer, DP_WDS_AGING_TIMER_DEFAULT_MS);
  1656. }
  1657. /*
  1658. * dp_soc_wds_attach() - Setup WDS timer and AST table
  1659. * @soc: Datapath SOC handle
  1660. *
  1661. * Return: None
  1662. */
  1663. static void dp_soc_wds_attach(struct dp_soc *soc)
  1664. {
  1665. qdf_timer_init(soc->osdev, &soc->wds_aging_timer,
  1666. dp_wds_aging_timer_fn, (void *)soc,
  1667. QDF_TIMER_TYPE_WAKE_APPS);
  1668. qdf_timer_mod(&soc->wds_aging_timer, DP_WDS_AGING_TIMER_DEFAULT_MS);
  1669. }
  1670. /*
  1671. * dp_soc_wds_detach() - Detach WDS data structures and timers
  1672. * @txrx_soc: DP SOC handle
  1673. *
  1674. * Return: None
  1675. */
  1676. static void dp_soc_wds_detach(struct dp_soc *soc)
  1677. {
  1678. qdf_timer_stop(&soc->wds_aging_timer);
  1679. qdf_timer_free(&soc->wds_aging_timer);
  1680. }
  1681. #else
  1682. static void dp_soc_wds_attach(struct dp_soc *soc)
  1683. {
  1684. }
  1685. static void dp_soc_wds_detach(struct dp_soc *soc)
  1686. {
  1687. }
  1688. #endif
  1689. /*
  1690. * dp_soc_reset_ring_map() - Reset cpu ring map
  1691. * @soc: Datapath soc handler
  1692. *
  1693. * This api resets the default cpu ring map
  1694. */
  1695. static void dp_soc_reset_cpu_ring_map(struct dp_soc *soc)
  1696. {
  1697. uint8_t i;
  1698. int nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1699. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  1700. if (nss_config == 1) {
  1701. /*
  1702. * Setting Tx ring map for one nss offloaded radio
  1703. */
  1704. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_FIRST_RADIO_OFFLOADED_MAP][i];
  1705. } else if (nss_config == 2) {
  1706. /*
  1707. * Setting Tx ring for two nss offloaded radios
  1708. */
  1709. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_SECOND_RADIO_OFFLOADED_MAP][i];
  1710. } else {
  1711. /*
  1712. * Setting Tx ring map for all nss offloaded radios
  1713. */
  1714. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_ALL_RADIO_OFFLOADED_MAP][i];
  1715. }
  1716. }
  1717. }
  1718. /*
  1719. * dp_soc_ring_if_nss_offloaded() - find if ring is offloaded to NSS
  1720. * @dp_soc - DP soc handle
  1721. * @ring_type - ring type
  1722. * @ring_num - ring_num
  1723. *
  1724. * return 0 or 1
  1725. */
  1726. static uint8_t dp_soc_ring_if_nss_offloaded(struct dp_soc *soc, enum hal_ring_type ring_type, int ring_num)
  1727. {
  1728. uint8_t nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1729. uint8_t status = 0;
  1730. switch (ring_type) {
  1731. case WBM2SW_RELEASE:
  1732. case REO_DST:
  1733. case RXDMA_BUF:
  1734. status = ((nss_config) & (1 << ring_num));
  1735. break;
  1736. default:
  1737. break;
  1738. }
  1739. return status;
  1740. }
  1741. /*
  1742. * dp_soc_reset_intr_mask() - reset interrupt mask
  1743. * @dp_soc - DP Soc handle
  1744. *
  1745. * Return: Return void
  1746. */
  1747. static void dp_soc_reset_intr_mask(struct dp_soc *soc)
  1748. {
  1749. uint8_t j;
  1750. int *grp_mask = NULL;
  1751. int group_number, mask, num_ring;
  1752. /* number of tx ring */
  1753. num_ring = wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  1754. /*
  1755. * group mask for tx completion ring.
  1756. */
  1757. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  1758. /* loop and reset the mask for only offloaded ring */
  1759. for (j = 0; j < num_ring; j++) {
  1760. if (!dp_soc_ring_if_nss_offloaded(soc, WBM2SW_RELEASE, j)) {
  1761. continue;
  1762. }
  1763. /*
  1764. * Group number corresponding to tx offloaded ring.
  1765. */
  1766. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1767. if (group_number < 0) {
  1768. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1769. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1770. WBM2SW_RELEASE, j);
  1771. return;
  1772. }
  1773. /* reset the tx mask for offloaded ring */
  1774. mask = wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, group_number);
  1775. mask &= (~(1 << j));
  1776. /*
  1777. * reset the interrupt mask for offloaded ring.
  1778. */
  1779. wlan_cfg_set_tx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  1780. }
  1781. /* number of rx rings */
  1782. num_ring = wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  1783. /*
  1784. * group mask for reo destination ring.
  1785. */
  1786. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  1787. /* loop and reset the mask for only offloaded ring */
  1788. for (j = 0; j < num_ring; j++) {
  1789. if (!dp_soc_ring_if_nss_offloaded(soc, REO_DST, j)) {
  1790. continue;
  1791. }
  1792. /*
  1793. * Group number corresponding to rx offloaded ring.
  1794. */
  1795. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1796. if (group_number < 0) {
  1797. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1798. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1799. REO_DST, j);
  1800. return;
  1801. }
  1802. /* set the interrupt mask for offloaded ring */
  1803. mask = wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, group_number);
  1804. mask &= (~(1 << j));
  1805. /*
  1806. * set the interrupt mask to zero for rx offloaded radio.
  1807. */
  1808. wlan_cfg_set_rx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  1809. }
  1810. /*
  1811. * group mask for Rx buffer refill ring
  1812. */
  1813. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  1814. /* loop and reset the mask for only offloaded ring */
  1815. for (j = 0; j < MAX_PDEV_CNT; j++) {
  1816. if (!dp_soc_ring_if_nss_offloaded(soc, RXDMA_BUF, j)) {
  1817. continue;
  1818. }
  1819. /*
  1820. * Group number corresponding to rx offloaded ring.
  1821. */
  1822. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1823. if (group_number < 0) {
  1824. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1825. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1826. REO_DST, j);
  1827. return;
  1828. }
  1829. /* set the interrupt mask for offloaded ring */
  1830. mask = wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  1831. group_number);
  1832. mask &= (~(1 << j));
  1833. /*
  1834. * set the interrupt mask to zero for rx offloaded radio.
  1835. */
  1836. wlan_cfg_set_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  1837. group_number, mask);
  1838. }
  1839. }
  1840. #ifdef IPA_OFFLOAD
  1841. /**
  1842. * dp_reo_remap_config() - configure reo remap register value based
  1843. * nss configuration.
  1844. * based on offload_radio value below remap configuration
  1845. * get applied.
  1846. * 0 - both Radios handled by host (remap rings 1, 2, 3 & 4)
  1847. * 1 - 1st Radio handled by NSS (remap rings 2, 3 & 4)
  1848. * 2 - 2nd Radio handled by NSS (remap rings 1, 2 & 4)
  1849. * 3 - both Radios handled by NSS (remap not required)
  1850. * 4 - IPA OFFLOAD enabled (remap rings 1,2 & 3)
  1851. *
  1852. * @remap1: output parameter indicates reo remap 1 register value
  1853. * @remap2: output parameter indicates reo remap 2 register value
  1854. * Return: bool type, true if remap is configured else false.
  1855. */
  1856. static bool dp_reo_remap_config(struct dp_soc *soc,
  1857. uint32_t *remap1,
  1858. uint32_t *remap2)
  1859. {
  1860. *remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) | (0x1 << 9) |
  1861. (0x2 << 12) | (0x3 << 15) | (0x1 << 18) | (0x2 << 21)) << 8;
  1862. *remap2 = ((0x3 << 0) | (0x1 << 3) | (0x2 << 6) | (0x3 << 9) |
  1863. (0x1 << 12) | (0x2 << 15) | (0x3 << 18) | (0x1 << 21)) << 8;
  1864. return true;
  1865. }
  1866. #else
  1867. static bool dp_reo_remap_config(struct dp_soc *soc,
  1868. uint32_t *remap1,
  1869. uint32_t *remap2)
  1870. {
  1871. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1872. switch (offload_radio) {
  1873. case 0:
  1874. *remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
  1875. (0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
  1876. (0x3 << 18) | (0x4 << 21)) << 8;
  1877. *remap2 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
  1878. (0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
  1879. (0x3 << 18) | (0x4 << 21)) << 8;
  1880. break;
  1881. case 1:
  1882. *remap1 = ((0x2 << 0) | (0x3 << 3) | (0x4 << 6) |
  1883. (0x2 << 9) | (0x3 << 12) | (0x4 << 15) |
  1884. (0x2 << 18) | (0x3 << 21)) << 8;
  1885. *remap2 = ((0x4 << 0) | (0x2 << 3) | (0x3 << 6) |
  1886. (0x4 << 9) | (0x2 << 12) | (0x3 << 15) |
  1887. (0x4 << 18) | (0x2 << 21)) << 8;
  1888. break;
  1889. case 2:
  1890. *remap1 = ((0x1 << 0) | (0x3 << 3) | (0x4 << 6) |
  1891. (0x1 << 9) | (0x3 << 12) | (0x4 << 15) |
  1892. (0x1 << 18) | (0x3 << 21)) << 8;
  1893. *remap2 = ((0x4 << 0) | (0x1 << 3) | (0x3 << 6) |
  1894. (0x4 << 9) | (0x1 << 12) | (0x3 << 15) |
  1895. (0x4 << 18) | (0x1 << 21)) << 8;
  1896. break;
  1897. case 3:
  1898. /* return false if both radios are offloaded to NSS */
  1899. return false;
  1900. }
  1901. return true;
  1902. }
  1903. #endif
  1904. /*
  1905. * dp_reo_frag_dst_set() - configure reo register to set the
  1906. * fragment destination ring
  1907. * @soc : Datapath soc
  1908. * @frag_dst_ring : output parameter to set fragment destination ring
  1909. *
  1910. * Based on offload_radio below fragment destination rings is selected
  1911. * 0 - TCL
  1912. * 1 - SW1
  1913. * 2 - SW2
  1914. * 3 - SW3
  1915. * 4 - SW4
  1916. * 5 - Release
  1917. * 6 - FW
  1918. * 7 - alternate select
  1919. *
  1920. * return: void
  1921. */
  1922. static void dp_reo_frag_dst_set(struct dp_soc *soc, uint8_t *frag_dst_ring)
  1923. {
  1924. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1925. switch (offload_radio) {
  1926. case 0:
  1927. *frag_dst_ring = HAL_SRNG_REO_EXCEPTION;
  1928. break;
  1929. case 3:
  1930. *frag_dst_ring = HAL_SRNG_REO_ALTERNATE_SELECT;
  1931. break;
  1932. default:
  1933. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1934. FL("dp_reo_frag_dst_set invalid offload radio config"));
  1935. break;
  1936. }
  1937. }
  1938. /*
  1939. * dp_soc_cmn_setup() - Common SoC level initializion
  1940. * @soc: Datapath SOC handle
  1941. *
  1942. * This is an internal function used to setup common SOC data structures,
  1943. * to be called from PDEV attach after receiving HW mode capabilities from FW
  1944. */
  1945. static int dp_soc_cmn_setup(struct dp_soc *soc)
  1946. {
  1947. int i;
  1948. struct hal_reo_params reo_params;
  1949. int tx_ring_size;
  1950. int tx_comp_ring_size;
  1951. int reo_dst_ring_size;
  1952. if (qdf_atomic_read(&soc->cmn_init_done))
  1953. return 0;
  1954. if (dp_hw_link_desc_pool_setup(soc))
  1955. goto fail1;
  1956. /* Setup SRNG rings */
  1957. /* Common rings */
  1958. if (dp_srng_setup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0, 0,
  1959. WBM_RELEASE_RING_SIZE)) {
  1960. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1961. FL("dp_srng_setup failed for wbm_desc_rel_ring"));
  1962. goto fail1;
  1963. }
  1964. soc->num_tcl_data_rings = 0;
  1965. /* Tx data rings */
  1966. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  1967. soc->num_tcl_data_rings =
  1968. wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  1969. tx_comp_ring_size =
  1970. wlan_cfg_tx_comp_ring_size(soc->wlan_cfg_ctx);
  1971. tx_ring_size =
  1972. wlan_cfg_tx_ring_size(soc->wlan_cfg_ctx);
  1973. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  1974. if (dp_srng_setup(soc, &soc->tcl_data_ring[i],
  1975. TCL_DATA, i, 0, tx_ring_size)) {
  1976. QDF_TRACE(QDF_MODULE_ID_DP,
  1977. QDF_TRACE_LEVEL_ERROR,
  1978. FL("dp_srng_setup failed for tcl_data_ring[%d]"), i);
  1979. goto fail1;
  1980. }
  1981. /*
  1982. * TBD: Set IPA WBM ring size with ini IPA UC tx buffer
  1983. * count
  1984. */
  1985. if (dp_srng_setup(soc, &soc->tx_comp_ring[i],
  1986. WBM2SW_RELEASE, i, 0, tx_comp_ring_size)) {
  1987. QDF_TRACE(QDF_MODULE_ID_DP,
  1988. QDF_TRACE_LEVEL_ERROR,
  1989. FL("dp_srng_setup failed for tx_comp_ring[%d]"), i);
  1990. goto fail1;
  1991. }
  1992. }
  1993. } else {
  1994. /* This will be incremented during per pdev ring setup */
  1995. soc->num_tcl_data_rings = 0;
  1996. }
  1997. if (dp_tx_soc_attach(soc)) {
  1998. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1999. FL("dp_tx_soc_attach failed"));
  2000. goto fail1;
  2001. }
  2002. /* TCL command and status rings */
  2003. if (dp_srng_setup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0, 0,
  2004. TCL_CMD_RING_SIZE)) {
  2005. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2006. FL("dp_srng_setup failed for tcl_cmd_ring"));
  2007. goto fail1;
  2008. }
  2009. if (dp_srng_setup(soc, &soc->tcl_status_ring, TCL_STATUS, 0, 0,
  2010. TCL_STATUS_RING_SIZE)) {
  2011. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2012. FL("dp_srng_setup failed for tcl_status_ring"));
  2013. goto fail1;
  2014. }
  2015. reo_dst_ring_size = wlan_cfg_get_reo_dst_ring_size(soc->wlan_cfg_ctx);
  2016. /* TBD: call dp_tx_init to setup Tx SW descriptors and MSDU extension
  2017. * descriptors
  2018. */
  2019. /* Rx data rings */
  2020. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2021. soc->num_reo_dest_rings =
  2022. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  2023. QDF_TRACE(QDF_MODULE_ID_DP,
  2024. QDF_TRACE_LEVEL_ERROR,
  2025. FL("num_reo_dest_rings %d\n"), soc->num_reo_dest_rings);
  2026. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  2027. if (dp_srng_setup(soc, &soc->reo_dest_ring[i], REO_DST,
  2028. i, 0, reo_dst_ring_size)) {
  2029. QDF_TRACE(QDF_MODULE_ID_DP,
  2030. QDF_TRACE_LEVEL_ERROR,
  2031. FL("dp_srng_setup failed for reo_dest_ring[%d]"), i);
  2032. goto fail1;
  2033. }
  2034. }
  2035. } else {
  2036. /* This will be incremented during per pdev ring setup */
  2037. soc->num_reo_dest_rings = 0;
  2038. }
  2039. /* LMAC RxDMA to SW Rings configuration */
  2040. if (!wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  2041. /* Only valid for MCL */
  2042. struct dp_pdev *pdev = soc->pdev_list[0];
  2043. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  2044. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring[i],
  2045. RXDMA_DST, 0, i, RXDMA_ERR_DST_RING_SIZE)) {
  2046. QDF_TRACE(QDF_MODULE_ID_DP,
  2047. QDF_TRACE_LEVEL_ERROR,
  2048. FL("dp_srng_setup failed for rxdma_err_dst_ring"));
  2049. goto fail1;
  2050. }
  2051. }
  2052. }
  2053. /* TBD: call dp_rx_init to setup Rx SW descriptors */
  2054. /* REO reinjection ring */
  2055. if (dp_srng_setup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0, 0,
  2056. REO_REINJECT_RING_SIZE)) {
  2057. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2058. FL("dp_srng_setup failed for reo_reinject_ring"));
  2059. goto fail1;
  2060. }
  2061. /* Rx release ring */
  2062. if (dp_srng_setup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 3, 0,
  2063. RX_RELEASE_RING_SIZE)) {
  2064. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2065. FL("dp_srng_setup failed for rx_rel_ring"));
  2066. goto fail1;
  2067. }
  2068. /* Rx exception ring */
  2069. if (dp_srng_setup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0,
  2070. MAX_REO_DEST_RINGS, REO_EXCEPTION_RING_SIZE)) {
  2071. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2072. FL("dp_srng_setup failed for reo_exception_ring"));
  2073. goto fail1;
  2074. }
  2075. /* REO command and status rings */
  2076. if (dp_srng_setup(soc, &soc->reo_cmd_ring, REO_CMD, 0, 0,
  2077. REO_CMD_RING_SIZE)) {
  2078. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2079. FL("dp_srng_setup failed for reo_cmd_ring"));
  2080. goto fail1;
  2081. }
  2082. hal_reo_init_cmd_ring(soc->hal_soc, soc->reo_cmd_ring.hal_srng);
  2083. TAILQ_INIT(&soc->rx.reo_cmd_list);
  2084. qdf_spinlock_create(&soc->rx.reo_cmd_lock);
  2085. if (dp_srng_setup(soc, &soc->reo_status_ring, REO_STATUS, 0, 0,
  2086. REO_STATUS_RING_SIZE)) {
  2087. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2088. FL("dp_srng_setup failed for reo_status_ring"));
  2089. goto fail1;
  2090. }
  2091. qdf_spinlock_create(&soc->ast_lock);
  2092. dp_soc_wds_attach(soc);
  2093. /* Reset the cpu ring map if radio is NSS offloaded */
  2094. if (wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx)) {
  2095. dp_soc_reset_cpu_ring_map(soc);
  2096. dp_soc_reset_intr_mask(soc);
  2097. }
  2098. /* Setup HW REO */
  2099. qdf_mem_zero(&reo_params, sizeof(reo_params));
  2100. if (wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  2101. /*
  2102. * Reo ring remap is not required if both radios
  2103. * are offloaded to NSS
  2104. */
  2105. if (!dp_reo_remap_config(soc,
  2106. &reo_params.remap1,
  2107. &reo_params.remap2))
  2108. goto out;
  2109. reo_params.rx_hash_enabled = true;
  2110. }
  2111. /* setup the global rx defrag waitlist */
  2112. TAILQ_INIT(&soc->rx.defrag.waitlist);
  2113. soc->rx.defrag.timeout_ms =
  2114. wlan_cfg_get_rx_defrag_min_timeout(soc->wlan_cfg_ctx);
  2115. soc->rx.flags.defrag_timeout_check =
  2116. wlan_cfg_get_defrag_timeout_check(soc->wlan_cfg_ctx);
  2117. qdf_spinlock_create(&soc->rx.defrag.defrag_lock);
  2118. out:
  2119. /*
  2120. * set the fragment destination ring
  2121. */
  2122. dp_reo_frag_dst_set(soc, &reo_params.frag_dst_ring);
  2123. hal_reo_setup(soc->hal_soc, &reo_params);
  2124. qdf_atomic_set(&soc->cmn_init_done, 1);
  2125. qdf_nbuf_queue_init(&soc->htt_stats.msg);
  2126. return 0;
  2127. fail1:
  2128. /*
  2129. * Cleanup will be done as part of soc_detach, which will
  2130. * be called on pdev attach failure
  2131. */
  2132. return QDF_STATUS_E_FAILURE;
  2133. }
  2134. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force);
  2135. static void dp_lro_hash_setup(struct dp_soc *soc)
  2136. {
  2137. struct cdp_lro_hash_config lro_hash;
  2138. if (!wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  2139. !wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  2140. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2141. FL("LRO disabled RX hash disabled"));
  2142. return;
  2143. }
  2144. qdf_mem_zero(&lro_hash, sizeof(lro_hash));
  2145. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx)) {
  2146. lro_hash.lro_enable = 1;
  2147. lro_hash.tcp_flag = QDF_TCPHDR_ACK;
  2148. lro_hash.tcp_flag_mask = QDF_TCPHDR_FIN | QDF_TCPHDR_SYN |
  2149. QDF_TCPHDR_RST | QDF_TCPHDR_ACK | QDF_TCPHDR_URG |
  2150. QDF_TCPHDR_ECE | QDF_TCPHDR_CWR;
  2151. }
  2152. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW, FL("enabled"));
  2153. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv4,
  2154. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  2155. LRO_IPV4_SEED_ARR_SZ));
  2156. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv6,
  2157. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  2158. LRO_IPV6_SEED_ARR_SZ));
  2159. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  2160. "lro_hash: lro_enable: 0x%x tcp_flag 0x%x tcp_flag_mask 0x%x",
  2161. lro_hash.lro_enable, lro_hash.tcp_flag,
  2162. lro_hash.tcp_flag_mask);
  2163. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  2164. QDF_TRACE_LEVEL_ERROR,
  2165. (void *)lro_hash.toeplitz_hash_ipv4,
  2166. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  2167. LRO_IPV4_SEED_ARR_SZ));
  2168. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  2169. QDF_TRACE_LEVEL_ERROR,
  2170. (void *)lro_hash.toeplitz_hash_ipv6,
  2171. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  2172. LRO_IPV6_SEED_ARR_SZ));
  2173. qdf_assert(soc->cdp_soc.ol_ops->lro_hash_config);
  2174. if (soc->cdp_soc.ol_ops->lro_hash_config)
  2175. (void)soc->cdp_soc.ol_ops->lro_hash_config
  2176. (soc->ctrl_psoc, &lro_hash);
  2177. }
  2178. /*
  2179. * dp_rxdma_ring_setup() - configure the RX DMA rings
  2180. * @soc: data path SoC handle
  2181. * @pdev: Physical device handle
  2182. *
  2183. * Return: 0 - success, > 0 - failure
  2184. */
  2185. #ifdef QCA_HOST2FW_RXBUF_RING
  2186. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  2187. struct dp_pdev *pdev)
  2188. {
  2189. int max_mac_rings =
  2190. wlan_cfg_get_num_mac_rings
  2191. (pdev->wlan_cfg_ctx);
  2192. int i;
  2193. for (i = 0; i < max_mac_rings; i++) {
  2194. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2195. "%s: pdev_id %d mac_id %d\n",
  2196. __func__, pdev->pdev_id, i);
  2197. if (dp_srng_setup(soc, &pdev->rx_mac_buf_ring[i],
  2198. RXDMA_BUF, 1, i, RXDMA_BUF_RING_SIZE)) {
  2199. QDF_TRACE(QDF_MODULE_ID_DP,
  2200. QDF_TRACE_LEVEL_ERROR,
  2201. FL("failed rx mac ring setup"));
  2202. return QDF_STATUS_E_FAILURE;
  2203. }
  2204. }
  2205. return QDF_STATUS_SUCCESS;
  2206. }
  2207. #else
  2208. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  2209. struct dp_pdev *pdev)
  2210. {
  2211. return QDF_STATUS_SUCCESS;
  2212. }
  2213. #endif
  2214. /**
  2215. * dp_dscp_tid_map_setup(): Initialize the dscp-tid maps
  2216. * @pdev - DP_PDEV handle
  2217. *
  2218. * Return: void
  2219. */
  2220. static inline void
  2221. dp_dscp_tid_map_setup(struct dp_pdev *pdev)
  2222. {
  2223. uint8_t map_id;
  2224. for (map_id = 0; map_id < DP_MAX_TID_MAPS; map_id++) {
  2225. qdf_mem_copy(pdev->dscp_tid_map[map_id], default_dscp_tid_map,
  2226. sizeof(default_dscp_tid_map));
  2227. }
  2228. for (map_id = 0; map_id < HAL_MAX_HW_DSCP_TID_MAPS; map_id++) {
  2229. hal_tx_set_dscp_tid_map(pdev->soc->hal_soc,
  2230. pdev->dscp_tid_map[map_id],
  2231. map_id);
  2232. }
  2233. }
  2234. #ifdef QCA_SUPPORT_SON
  2235. /**
  2236. * dp_mark_peer_inact(): Update peer inactivity status
  2237. * @peer_handle - datapath peer handle
  2238. *
  2239. * Return: void
  2240. */
  2241. void dp_mark_peer_inact(void *peer_handle, bool inactive)
  2242. {
  2243. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  2244. struct dp_pdev *pdev;
  2245. struct dp_soc *soc;
  2246. bool inactive_old;
  2247. if (!peer)
  2248. return;
  2249. pdev = peer->vdev->pdev;
  2250. soc = pdev->soc;
  2251. inactive_old = peer->peer_bs_inact_flag == 1;
  2252. if (!inactive)
  2253. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  2254. peer->peer_bs_inact_flag = inactive ? 1 : 0;
  2255. if (inactive_old != inactive) {
  2256. /**
  2257. * Note: a node lookup can happen in RX datapath context
  2258. * when a node changes from inactive to active (at most once
  2259. * per inactivity timeout threshold)
  2260. */
  2261. if (soc->cdp_soc.ol_ops->record_act_change) {
  2262. soc->cdp_soc.ol_ops->record_act_change(
  2263. (void *)pdev->ctrl_pdev,
  2264. peer->mac_addr.raw, !inactive);
  2265. }
  2266. }
  2267. }
  2268. /**
  2269. * dp_txrx_peer_find_inact_timeout_handler(): Inactivity timeout function
  2270. *
  2271. * Periodically checks the inactivity status
  2272. */
  2273. static os_timer_func(dp_txrx_peer_find_inact_timeout_handler)
  2274. {
  2275. struct dp_pdev *pdev;
  2276. struct dp_vdev *vdev;
  2277. struct dp_peer *peer;
  2278. struct dp_soc *soc;
  2279. int i;
  2280. OS_GET_TIMER_ARG(soc, struct dp_soc *);
  2281. qdf_spin_lock(&soc->peer_ref_mutex);
  2282. for (i = 0; i < soc->pdev_count; i++) {
  2283. pdev = soc->pdev_list[i];
  2284. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  2285. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  2286. if (vdev->opmode != wlan_op_mode_ap)
  2287. continue;
  2288. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2289. if (!peer->authorize) {
  2290. /**
  2291. * Inactivity check only interested in
  2292. * connected node
  2293. */
  2294. continue;
  2295. }
  2296. if (peer->peer_bs_inact > soc->pdev_bs_inact_reload) {
  2297. /**
  2298. * This check ensures we do not wait extra long
  2299. * due to the potential race condition
  2300. */
  2301. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  2302. }
  2303. if (peer->peer_bs_inact > 0) {
  2304. /* Do not let it wrap around */
  2305. peer->peer_bs_inact--;
  2306. }
  2307. if (peer->peer_bs_inact == 0)
  2308. dp_mark_peer_inact(peer, true);
  2309. }
  2310. }
  2311. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  2312. }
  2313. qdf_spin_unlock(&soc->peer_ref_mutex);
  2314. qdf_timer_mod(&soc->pdev_bs_inact_timer,
  2315. soc->pdev_bs_inact_interval * 1000);
  2316. }
  2317. /**
  2318. * dp_free_inact_timer(): free inact timer
  2319. * @timer - inact timer handle
  2320. *
  2321. * Return: bool
  2322. */
  2323. void dp_free_inact_timer(struct dp_soc *soc)
  2324. {
  2325. qdf_timer_free(&soc->pdev_bs_inact_timer);
  2326. }
  2327. #else
  2328. void dp_mark_peer_inact(void *peer, bool inactive)
  2329. {
  2330. return;
  2331. }
  2332. void dp_free_inact_timer(struct dp_soc *soc)
  2333. {
  2334. return;
  2335. }
  2336. #endif
  2337. #ifdef IPA_OFFLOAD
  2338. /**
  2339. * dp_setup_ipa_rx_refill_buf_ring - Setup second Rx refill buffer ring
  2340. * @soc: data path instance
  2341. * @pdev: core txrx pdev context
  2342. *
  2343. * Return: QDF_STATUS_SUCCESS: success
  2344. * QDF_STATUS_E_RESOURCES: Error return
  2345. */
  2346. static int dp_setup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2347. struct dp_pdev *pdev)
  2348. {
  2349. /* Setup second Rx refill buffer ring */
  2350. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring2, RXDMA_BUF,
  2351. IPA_RX_REFILL_BUF_RING_IDX,
  2352. pdev->pdev_id, RXDMA_REFILL_RING_SIZE)) {
  2353. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2354. FL("dp_srng_setup failed second rx refill ring"));
  2355. return QDF_STATUS_E_FAILURE;
  2356. }
  2357. return QDF_STATUS_SUCCESS;
  2358. }
  2359. /**
  2360. * dp_cleanup_ipa_rx_refill_buf_ring - Cleanup second Rx refill buffer ring
  2361. * @soc: data path instance
  2362. * @pdev: core txrx pdev context
  2363. *
  2364. * Return: void
  2365. */
  2366. static void dp_cleanup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2367. struct dp_pdev *pdev)
  2368. {
  2369. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring2, RXDMA_BUF,
  2370. IPA_RX_REFILL_BUF_RING_IDX);
  2371. }
  2372. #else
  2373. static int dp_setup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2374. struct dp_pdev *pdev)
  2375. {
  2376. return QDF_STATUS_SUCCESS;
  2377. }
  2378. static void dp_cleanup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2379. struct dp_pdev *pdev)
  2380. {
  2381. }
  2382. #endif
  2383. #ifndef QCA_WIFI_QCA6390
  2384. static
  2385. QDF_STATUS dp_mon_rings_setup(struct dp_soc *soc, struct dp_pdev *pdev)
  2386. {
  2387. int mac_id = 0;
  2388. int pdev_id = pdev->pdev_id;
  2389. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  2390. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  2391. if (dp_srng_setup(soc, &pdev->rxdma_mon_buf_ring[mac_id],
  2392. RXDMA_MONITOR_BUF, 0, mac_for_pdev,
  2393. RXDMA_MONITOR_BUF_RING_SIZE)) {
  2394. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2395. FL("Srng setup failed for rxdma_mon_buf_ring"));
  2396. return QDF_STATUS_E_NOMEM;
  2397. }
  2398. if (dp_srng_setup(soc, &pdev->rxdma_mon_dst_ring[mac_id],
  2399. RXDMA_MONITOR_DST, 0, mac_for_pdev,
  2400. RXDMA_MONITOR_DST_RING_SIZE)) {
  2401. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2402. FL("Srng setup failed for rxdma_mon_dst_ring"));
  2403. return QDF_STATUS_E_NOMEM;
  2404. }
  2405. if (dp_srng_setup(soc, &pdev->rxdma_mon_status_ring[mac_id],
  2406. RXDMA_MONITOR_STATUS, 0, mac_for_pdev,
  2407. RXDMA_MONITOR_STATUS_RING_SIZE)) {
  2408. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2409. FL("Srng setup failed for rxdma_mon_status_ring"));
  2410. return QDF_STATUS_E_NOMEM;
  2411. }
  2412. if (dp_srng_setup(soc, &pdev->rxdma_mon_desc_ring[mac_id],
  2413. RXDMA_MONITOR_DESC, 0, mac_for_pdev,
  2414. RXDMA_MONITOR_DESC_RING_SIZE)) {
  2415. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2416. "Srng setup failed for rxdma_mon_desc_ring\n");
  2417. return QDF_STATUS_E_NOMEM;
  2418. }
  2419. }
  2420. return QDF_STATUS_SUCCESS;
  2421. }
  2422. #else
  2423. static QDF_STATUS dp_mon_rings_setup(struct dp_soc *soc, struct dp_pdev *pdev)
  2424. {
  2425. return QDF_STATUS_SUCCESS;
  2426. }
  2427. #endif
  2428. /*
  2429. * dp_pdev_attach_wifi3() - attach txrx pdev
  2430. * @ctrl_pdev: Opaque PDEV object
  2431. * @txrx_soc: Datapath SOC handle
  2432. * @htc_handle: HTC handle for host-target interface
  2433. * @qdf_osdev: QDF OS device
  2434. * @pdev_id: PDEV ID
  2435. *
  2436. * Return: DP PDEV handle on success, NULL on failure
  2437. */
  2438. static struct cdp_pdev *dp_pdev_attach_wifi3(struct cdp_soc_t *txrx_soc,
  2439. struct cdp_ctrl_objmgr_pdev *ctrl_pdev,
  2440. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev, uint8_t pdev_id)
  2441. {
  2442. int tx_ring_size;
  2443. int tx_comp_ring_size;
  2444. int reo_dst_ring_size;
  2445. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  2446. struct dp_pdev *pdev = qdf_mem_malloc(sizeof(*pdev));
  2447. if (!pdev) {
  2448. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2449. FL("DP PDEV memory allocation failed"));
  2450. goto fail0;
  2451. }
  2452. pdev->wlan_cfg_ctx = wlan_cfg_pdev_attach();
  2453. if (!pdev->wlan_cfg_ctx) {
  2454. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2455. FL("pdev cfg_attach failed"));
  2456. qdf_mem_free(pdev);
  2457. goto fail0;
  2458. }
  2459. /*
  2460. * set nss pdev config based on soc config
  2461. */
  2462. wlan_cfg_set_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx,
  2463. (wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx) & (1 << pdev_id)));
  2464. pdev->soc = soc;
  2465. pdev->ctrl_pdev = ctrl_pdev;
  2466. pdev->pdev_id = pdev_id;
  2467. soc->pdev_list[pdev_id] = pdev;
  2468. soc->pdev_count++;
  2469. TAILQ_INIT(&pdev->vdev_list);
  2470. qdf_spinlock_create(&pdev->vdev_list_lock);
  2471. pdev->vdev_count = 0;
  2472. qdf_spinlock_create(&pdev->tx_mutex);
  2473. qdf_spinlock_create(&pdev->neighbour_peer_mutex);
  2474. TAILQ_INIT(&pdev->neighbour_peers_list);
  2475. if (dp_soc_cmn_setup(soc)) {
  2476. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2477. FL("dp_soc_cmn_setup failed"));
  2478. goto fail1;
  2479. }
  2480. /* Setup per PDEV TCL rings if configured */
  2481. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2482. tx_ring_size =
  2483. wlan_cfg_tx_ring_size(soc->wlan_cfg_ctx);
  2484. tx_comp_ring_size =
  2485. wlan_cfg_tx_comp_ring_size(soc->wlan_cfg_ctx);
  2486. if (dp_srng_setup(soc, &soc->tcl_data_ring[pdev_id], TCL_DATA,
  2487. pdev_id, pdev_id, tx_ring_size)) {
  2488. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2489. FL("dp_srng_setup failed for tcl_data_ring"));
  2490. goto fail1;
  2491. }
  2492. if (dp_srng_setup(soc, &soc->tx_comp_ring[pdev_id],
  2493. WBM2SW_RELEASE, pdev_id, pdev_id, tx_comp_ring_size)) {
  2494. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2495. FL("dp_srng_setup failed for tx_comp_ring"));
  2496. goto fail1;
  2497. }
  2498. soc->num_tcl_data_rings++;
  2499. }
  2500. /* Tx specific init */
  2501. if (dp_tx_pdev_attach(pdev)) {
  2502. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2503. FL("dp_tx_pdev_attach failed"));
  2504. goto fail1;
  2505. }
  2506. reo_dst_ring_size = wlan_cfg_get_reo_dst_ring_size(soc->wlan_cfg_ctx);
  2507. /* Setup per PDEV REO rings if configured */
  2508. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2509. if (dp_srng_setup(soc, &soc->reo_dest_ring[pdev_id], REO_DST,
  2510. pdev_id, pdev_id, reo_dst_ring_size)) {
  2511. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2512. FL("dp_srng_setup failed for reo_dest_ringn"));
  2513. goto fail1;
  2514. }
  2515. soc->num_reo_dest_rings++;
  2516. }
  2517. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0, pdev_id,
  2518. RXDMA_REFILL_RING_SIZE)) {
  2519. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2520. FL("dp_srng_setup failed rx refill ring"));
  2521. goto fail1;
  2522. }
  2523. if (dp_rxdma_ring_setup(soc, pdev)) {
  2524. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2525. FL("RXDMA ring config failed"));
  2526. goto fail1;
  2527. }
  2528. if (dp_mon_rings_setup(soc, pdev)) {
  2529. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2530. FL("MONITOR rings setup failed"));
  2531. goto fail1;
  2532. }
  2533. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  2534. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring[0], RXDMA_DST,
  2535. 0, pdev_id, RXDMA_ERR_DST_RING_SIZE)) {
  2536. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2537. FL("dp_srng_setup failed for rxdma_err_dst_ring"));
  2538. goto fail1;
  2539. }
  2540. }
  2541. if (dp_setup_ipa_rx_refill_buf_ring(soc, pdev))
  2542. goto fail1;
  2543. if (dp_ipa_ring_resource_setup(soc, pdev))
  2544. goto fail1;
  2545. if (dp_ipa_uc_attach(soc, pdev) != QDF_STATUS_SUCCESS) {
  2546. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2547. FL("dp_ipa_uc_attach failed"));
  2548. goto fail1;
  2549. }
  2550. /* Rx specific init */
  2551. if (dp_rx_pdev_attach(pdev)) {
  2552. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2553. FL("dp_rx_pdev_attach failed"));
  2554. goto fail0;
  2555. }
  2556. DP_STATS_INIT(pdev);
  2557. /* Monitor filter init */
  2558. pdev->mon_filter_mode = MON_FILTER_ALL;
  2559. pdev->fp_mgmt_filter = FILTER_MGMT_ALL;
  2560. pdev->fp_ctrl_filter = FILTER_CTRL_ALL;
  2561. pdev->fp_data_filter = FILTER_DATA_ALL;
  2562. pdev->mo_mgmt_filter = FILTER_MGMT_ALL;
  2563. pdev->mo_ctrl_filter = FILTER_CTRL_ALL;
  2564. pdev->mo_data_filter = FILTER_DATA_ALL;
  2565. dp_local_peer_id_pool_init(pdev);
  2566. dp_dscp_tid_map_setup(pdev);
  2567. /* Rx monitor mode specific init */
  2568. if (dp_rx_pdev_mon_attach(pdev)) {
  2569. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2570. "dp_rx_pdev_attach failed\n");
  2571. goto fail1;
  2572. }
  2573. if (dp_wdi_event_attach(pdev)) {
  2574. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2575. "dp_wdi_evet_attach failed\n");
  2576. goto fail1;
  2577. }
  2578. /* set the reo destination during initialization */
  2579. pdev->reo_dest = pdev->pdev_id + 1;
  2580. /*
  2581. * initialize ppdu tlv list
  2582. */
  2583. TAILQ_INIT(&pdev->ppdu_info_list);
  2584. pdev->tlv_count = 0;
  2585. pdev->list_depth = 0;
  2586. return (struct cdp_pdev *)pdev;
  2587. fail1:
  2588. dp_pdev_detach_wifi3((struct cdp_pdev *)pdev, 0);
  2589. fail0:
  2590. return NULL;
  2591. }
  2592. /*
  2593. * dp_rxdma_ring_cleanup() - configure the RX DMA rings
  2594. * @soc: data path SoC handle
  2595. * @pdev: Physical device handle
  2596. *
  2597. * Return: void
  2598. */
  2599. #ifdef QCA_HOST2FW_RXBUF_RING
  2600. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  2601. struct dp_pdev *pdev)
  2602. {
  2603. int max_mac_rings =
  2604. wlan_cfg_get_num_mac_rings(pdev->wlan_cfg_ctx);
  2605. int i;
  2606. max_mac_rings = max_mac_rings < MAX_RX_MAC_RINGS ?
  2607. max_mac_rings : MAX_RX_MAC_RINGS;
  2608. for (i = 0; i < MAX_RX_MAC_RINGS; i++)
  2609. dp_srng_cleanup(soc, &pdev->rx_mac_buf_ring[i],
  2610. RXDMA_BUF, 1);
  2611. qdf_timer_free(&soc->mon_reap_timer);
  2612. }
  2613. #else
  2614. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  2615. struct dp_pdev *pdev)
  2616. {
  2617. }
  2618. #endif
  2619. /*
  2620. * dp_neighbour_peers_detach() - Detach neighbour peers(nac clients)
  2621. * @pdev: device object
  2622. *
  2623. * Return: void
  2624. */
  2625. static void dp_neighbour_peers_detach(struct dp_pdev *pdev)
  2626. {
  2627. struct dp_neighbour_peer *peer = NULL;
  2628. struct dp_neighbour_peer *temp_peer = NULL;
  2629. TAILQ_FOREACH_SAFE(peer, &pdev->neighbour_peers_list,
  2630. neighbour_peer_list_elem, temp_peer) {
  2631. /* delete this peer from the list */
  2632. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  2633. peer, neighbour_peer_list_elem);
  2634. qdf_mem_free(peer);
  2635. }
  2636. qdf_spinlock_destroy(&pdev->neighbour_peer_mutex);
  2637. }
  2638. /**
  2639. * dp_htt_ppdu_stats_detach() - detach stats resources
  2640. * @pdev: Datapath PDEV handle
  2641. *
  2642. * Return: void
  2643. */
  2644. static void dp_htt_ppdu_stats_detach(struct dp_pdev *pdev)
  2645. {
  2646. struct ppdu_info *ppdu_info, *ppdu_info_next;
  2647. TAILQ_FOREACH_SAFE(ppdu_info, &pdev->ppdu_info_list,
  2648. ppdu_info_list_elem, ppdu_info_next) {
  2649. if (!ppdu_info)
  2650. break;
  2651. qdf_assert_always(ppdu_info->nbuf);
  2652. qdf_nbuf_free(ppdu_info->nbuf);
  2653. qdf_mem_free(ppdu_info);
  2654. }
  2655. }
  2656. #ifndef QCA_WIFI_QCA6390
  2657. static
  2658. void dp_mon_ring_deinit(struct dp_soc *soc, struct dp_pdev *pdev,
  2659. int mac_id)
  2660. {
  2661. dp_srng_cleanup(soc, &pdev->rxdma_mon_buf_ring[mac_id],
  2662. RXDMA_MONITOR_BUF, 0);
  2663. dp_srng_cleanup(soc, &pdev->rxdma_mon_dst_ring[mac_id],
  2664. RXDMA_MONITOR_DST, 0);
  2665. dp_srng_cleanup(soc, &pdev->rxdma_mon_status_ring[mac_id],
  2666. RXDMA_MONITOR_STATUS, 0);
  2667. dp_srng_cleanup(soc, &pdev->rxdma_mon_desc_ring[mac_id],
  2668. RXDMA_MONITOR_DESC, 0);
  2669. dp_srng_cleanup(soc, &pdev->rxdma_err_dst_ring[mac_id],
  2670. RXDMA_DST, 0);
  2671. }
  2672. #else
  2673. static void dp_mon_ring_deinit(struct dp_soc *soc, struct dp_pdev *pdev,
  2674. int mac_id)
  2675. {
  2676. }
  2677. #endif
  2678. /*
  2679. * dp_pdev_detach_wifi3() - detach txrx pdev
  2680. * @txrx_pdev: Datapath PDEV handle
  2681. * @force: Force detach
  2682. *
  2683. */
  2684. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force)
  2685. {
  2686. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  2687. struct dp_soc *soc = pdev->soc;
  2688. qdf_nbuf_t curr_nbuf, next_nbuf;
  2689. int mac_id;
  2690. dp_wdi_event_detach(pdev);
  2691. dp_tx_pdev_detach(pdev);
  2692. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2693. dp_srng_cleanup(soc, &soc->tcl_data_ring[pdev->pdev_id],
  2694. TCL_DATA, pdev->pdev_id);
  2695. dp_srng_cleanup(soc, &soc->tx_comp_ring[pdev->pdev_id],
  2696. WBM2SW_RELEASE, pdev->pdev_id);
  2697. }
  2698. dp_pktlogmod_exit(pdev);
  2699. dp_rx_pdev_detach(pdev);
  2700. dp_rx_pdev_mon_detach(pdev);
  2701. dp_neighbour_peers_detach(pdev);
  2702. qdf_spinlock_destroy(&pdev->tx_mutex);
  2703. qdf_spinlock_destroy(&pdev->vdev_list_lock);
  2704. dp_ipa_uc_detach(soc, pdev);
  2705. dp_cleanup_ipa_rx_refill_buf_ring(soc, pdev);
  2706. /* Cleanup per PDEV REO rings if configured */
  2707. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2708. dp_srng_cleanup(soc, &soc->reo_dest_ring[pdev->pdev_id],
  2709. REO_DST, pdev->pdev_id);
  2710. }
  2711. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0);
  2712. dp_rxdma_ring_cleanup(soc, pdev);
  2713. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  2714. dp_mon_ring_deinit(soc, pdev, mac_id);
  2715. dp_srng_cleanup(soc, &pdev->rxdma_err_dst_ring[mac_id],
  2716. RXDMA_DST, 0);
  2717. }
  2718. curr_nbuf = pdev->invalid_peer_head_msdu;
  2719. while (curr_nbuf) {
  2720. next_nbuf = qdf_nbuf_next(curr_nbuf);
  2721. qdf_nbuf_free(curr_nbuf);
  2722. curr_nbuf = next_nbuf;
  2723. }
  2724. dp_htt_ppdu_stats_detach(pdev);
  2725. soc->pdev_list[pdev->pdev_id] = NULL;
  2726. soc->pdev_count--;
  2727. wlan_cfg_pdev_detach(pdev->wlan_cfg_ctx);
  2728. qdf_mem_free(pdev->dp_txrx_handle);
  2729. qdf_mem_free(pdev);
  2730. }
  2731. /*
  2732. * dp_reo_desc_freelist_destroy() - Flush REO descriptors from deferred freelist
  2733. * @soc: DP SOC handle
  2734. */
  2735. static inline void dp_reo_desc_freelist_destroy(struct dp_soc *soc)
  2736. {
  2737. struct reo_desc_list_node *desc;
  2738. struct dp_rx_tid *rx_tid;
  2739. qdf_spin_lock_bh(&soc->reo_desc_freelist_lock);
  2740. while (qdf_list_remove_front(&soc->reo_desc_freelist,
  2741. (qdf_list_node_t **)&desc) == QDF_STATUS_SUCCESS) {
  2742. rx_tid = &desc->rx_tid;
  2743. qdf_mem_unmap_nbytes_single(soc->osdev,
  2744. rx_tid->hw_qdesc_paddr,
  2745. QDF_DMA_BIDIRECTIONAL,
  2746. rx_tid->hw_qdesc_alloc_size);
  2747. qdf_mem_free(rx_tid->hw_qdesc_vaddr_unaligned);
  2748. qdf_mem_free(desc);
  2749. }
  2750. qdf_spin_unlock_bh(&soc->reo_desc_freelist_lock);
  2751. qdf_list_destroy(&soc->reo_desc_freelist);
  2752. qdf_spinlock_destroy(&soc->reo_desc_freelist_lock);
  2753. }
  2754. /*
  2755. * dp_soc_detach_wifi3() - Detach txrx SOC
  2756. * @txrx_soc: DP SOC handle, struct cdp_soc_t is first element of struct dp_soc.
  2757. */
  2758. static void dp_soc_detach_wifi3(void *txrx_soc)
  2759. {
  2760. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  2761. int i;
  2762. qdf_atomic_set(&soc->cmn_init_done, 0);
  2763. qdf_flush_work(&soc->htt_stats.work);
  2764. qdf_disable_work(&soc->htt_stats.work);
  2765. /* Free pending htt stats messages */
  2766. qdf_nbuf_queue_free(&soc->htt_stats.msg);
  2767. dp_free_inact_timer(soc);
  2768. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2769. if (soc->pdev_list[i])
  2770. dp_pdev_detach_wifi3(
  2771. (struct cdp_pdev *)soc->pdev_list[i], 1);
  2772. }
  2773. dp_peer_find_detach(soc);
  2774. /* TBD: Call Tx and Rx cleanup functions to free buffers and
  2775. * SW descriptors
  2776. */
  2777. /* Free the ring memories */
  2778. /* Common rings */
  2779. dp_srng_cleanup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  2780. dp_tx_soc_detach(soc);
  2781. /* Tx data rings */
  2782. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2783. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  2784. dp_srng_cleanup(soc, &soc->tcl_data_ring[i],
  2785. TCL_DATA, i);
  2786. dp_srng_cleanup(soc, &soc->tx_comp_ring[i],
  2787. WBM2SW_RELEASE, i);
  2788. }
  2789. }
  2790. /* TCL command and status rings */
  2791. dp_srng_cleanup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0);
  2792. dp_srng_cleanup(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  2793. /* Rx data rings */
  2794. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2795. soc->num_reo_dest_rings =
  2796. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  2797. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  2798. /* TODO: Get number of rings and ring sizes
  2799. * from wlan_cfg
  2800. */
  2801. dp_srng_cleanup(soc, &soc->reo_dest_ring[i],
  2802. REO_DST, i);
  2803. }
  2804. }
  2805. /* REO reinjection ring */
  2806. dp_srng_cleanup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  2807. /* Rx release ring */
  2808. dp_srng_cleanup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  2809. /* Rx exception ring */
  2810. /* TODO: Better to store ring_type and ring_num in
  2811. * dp_srng during setup
  2812. */
  2813. dp_srng_cleanup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  2814. /* REO command and status rings */
  2815. dp_srng_cleanup(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  2816. dp_srng_cleanup(soc, &soc->reo_status_ring, REO_STATUS, 0);
  2817. dp_hw_link_desc_pool_cleanup(soc);
  2818. qdf_spinlock_destroy(&soc->peer_ref_mutex);
  2819. qdf_spinlock_destroy(&soc->htt_stats.lock);
  2820. htt_soc_detach(soc->htt_handle);
  2821. qdf_spinlock_destroy(&soc->rx.defrag.defrag_lock);
  2822. dp_reo_cmdlist_destroy(soc);
  2823. qdf_spinlock_destroy(&soc->rx.reo_cmd_lock);
  2824. dp_reo_desc_freelist_destroy(soc);
  2825. wlan_cfg_soc_detach(soc->wlan_cfg_ctx);
  2826. dp_soc_wds_detach(soc);
  2827. qdf_spinlock_destroy(&soc->ast_lock);
  2828. qdf_mem_free(soc);
  2829. }
  2830. #ifndef QCA_WIFI_QCA6390
  2831. static void dp_mon_htt_srng_setup(struct dp_soc *soc,
  2832. struct dp_pdev *pdev,
  2833. int mac_id,
  2834. int mac_for_pdev)
  2835. {
  2836. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2837. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  2838. RXDMA_MONITOR_BUF);
  2839. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2840. pdev->rxdma_mon_dst_ring[mac_id].hal_srng,
  2841. RXDMA_MONITOR_DST);
  2842. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2843. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  2844. RXDMA_MONITOR_STATUS);
  2845. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2846. pdev->rxdma_mon_desc_ring[mac_id].hal_srng,
  2847. RXDMA_MONITOR_DESC);
  2848. }
  2849. #else
  2850. static void dp_mon_htt_srng_setup(struct dp_soc *soc,
  2851. struct dp_pdev *pdev,
  2852. int mac_id,
  2853. int mac_for_pdev)
  2854. {
  2855. }
  2856. #endif
  2857. /*
  2858. * dp_rxdma_ring_config() - configure the RX DMA rings
  2859. *
  2860. * This function is used to configure the MAC rings.
  2861. * On MCL host provides buffers in Host2FW ring
  2862. * FW refills (copies) buffers to the ring and updates
  2863. * ring_idx in register
  2864. *
  2865. * @soc: data path SoC handle
  2866. *
  2867. * Return: void
  2868. */
  2869. #ifdef QCA_HOST2FW_RXBUF_RING
  2870. static void dp_rxdma_ring_config(struct dp_soc *soc)
  2871. {
  2872. int i;
  2873. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2874. struct dp_pdev *pdev = soc->pdev_list[i];
  2875. if (pdev) {
  2876. int mac_id;
  2877. bool dbs_enable = 0;
  2878. int max_mac_rings =
  2879. wlan_cfg_get_num_mac_rings
  2880. (pdev->wlan_cfg_ctx);
  2881. htt_srng_setup(soc->htt_handle, 0,
  2882. pdev->rx_refill_buf_ring.hal_srng,
  2883. RXDMA_BUF);
  2884. if (pdev->rx_refill_buf_ring2.hal_srng)
  2885. htt_srng_setup(soc->htt_handle, 0,
  2886. pdev->rx_refill_buf_ring2.hal_srng,
  2887. RXDMA_BUF);
  2888. if (soc->cdp_soc.ol_ops->
  2889. is_hw_dbs_2x2_capable) {
  2890. dbs_enable = soc->cdp_soc.ol_ops->
  2891. is_hw_dbs_2x2_capable(soc->ctrl_psoc);
  2892. }
  2893. if (dbs_enable) {
  2894. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2895. QDF_TRACE_LEVEL_ERROR,
  2896. FL("DBS enabled max_mac_rings %d\n"),
  2897. max_mac_rings);
  2898. } else {
  2899. max_mac_rings = 1;
  2900. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2901. QDF_TRACE_LEVEL_ERROR,
  2902. FL("DBS disabled, max_mac_rings %d\n"),
  2903. max_mac_rings);
  2904. }
  2905. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2906. FL("pdev_id %d max_mac_rings %d\n"),
  2907. pdev->pdev_id, max_mac_rings);
  2908. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  2909. int mac_for_pdev = dp_get_mac_id_for_pdev(
  2910. mac_id, pdev->pdev_id);
  2911. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2912. QDF_TRACE_LEVEL_ERROR,
  2913. FL("mac_id %d\n"), mac_for_pdev);
  2914. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2915. pdev->rx_mac_buf_ring[mac_id]
  2916. .hal_srng,
  2917. RXDMA_BUF);
  2918. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2919. pdev->rxdma_err_dst_ring[mac_id]
  2920. .hal_srng,
  2921. RXDMA_DST);
  2922. /* Configure monitor mode rings */
  2923. dp_mon_htt_srng_setup(soc, pdev, mac_id,
  2924. mac_for_pdev);
  2925. }
  2926. }
  2927. }
  2928. /*
  2929. * Timer to reap rxdma status rings.
  2930. * Needed until we enable ppdu end interrupts
  2931. */
  2932. qdf_timer_init(soc->osdev, &soc->mon_reap_timer,
  2933. dp_service_mon_rings, (void *)soc,
  2934. QDF_TIMER_TYPE_WAKE_APPS);
  2935. soc->reap_timer_init = 1;
  2936. }
  2937. #else
  2938. /* This is only for WIN */
  2939. static void dp_rxdma_ring_config(struct dp_soc *soc)
  2940. {
  2941. int i;
  2942. int mac_id;
  2943. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2944. struct dp_pdev *pdev = soc->pdev_list[i];
  2945. if (pdev == NULL)
  2946. continue;
  2947. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  2948. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, i);
  2949. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2950. pdev->rx_refill_buf_ring.hal_srng, RXDMA_BUF);
  2951. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2952. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  2953. RXDMA_MONITOR_BUF);
  2954. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2955. pdev->rxdma_mon_dst_ring[mac_id].hal_srng,
  2956. RXDMA_MONITOR_DST);
  2957. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2958. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  2959. RXDMA_MONITOR_STATUS);
  2960. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2961. pdev->rxdma_mon_desc_ring[mac_id].hal_srng,
  2962. RXDMA_MONITOR_DESC);
  2963. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2964. pdev->rxdma_err_dst_ring[mac_id].hal_srng,
  2965. RXDMA_DST);
  2966. }
  2967. }
  2968. }
  2969. #endif
  2970. /*
  2971. * dp_soc_attach_target_wifi3() - SOC initialization in the target
  2972. * @txrx_soc: Datapath SOC handle
  2973. */
  2974. static int dp_soc_attach_target_wifi3(struct cdp_soc_t *cdp_soc)
  2975. {
  2976. struct dp_soc *soc = (struct dp_soc *)cdp_soc;
  2977. htt_soc_attach_target(soc->htt_handle);
  2978. dp_rxdma_ring_config(soc);
  2979. DP_STATS_INIT(soc);
  2980. /* initialize work queue for stats processing */
  2981. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  2982. return 0;
  2983. }
  2984. /*
  2985. * dp_soc_get_nss_cfg_wifi3() - SOC get nss config
  2986. * @txrx_soc: Datapath SOC handle
  2987. */
  2988. static int dp_soc_get_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc)
  2989. {
  2990. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  2991. return wlan_cfg_get_dp_soc_nss_cfg(dsoc->wlan_cfg_ctx);
  2992. }
  2993. /*
  2994. * dp_soc_set_nss_cfg_wifi3() - SOC set nss config
  2995. * @txrx_soc: Datapath SOC handle
  2996. * @nss_cfg: nss config
  2997. */
  2998. static void dp_soc_set_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc, int config)
  2999. {
  3000. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  3001. struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx = dsoc->wlan_cfg_ctx;
  3002. wlan_cfg_set_dp_soc_nss_cfg(wlan_cfg_ctx, config);
  3003. /*
  3004. * TODO: masked out based on the per offloaded radio
  3005. */
  3006. if (config == dp_nss_cfg_dbdc) {
  3007. wlan_cfg_set_num_tx_desc_pool(wlan_cfg_ctx, 0);
  3008. wlan_cfg_set_num_tx_ext_desc_pool(wlan_cfg_ctx, 0);
  3009. wlan_cfg_set_num_tx_desc(wlan_cfg_ctx, 0);
  3010. wlan_cfg_set_num_tx_ext_desc(wlan_cfg_ctx, 0);
  3011. }
  3012. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3013. FL("nss-wifi<0> nss config is enabled"));
  3014. }
  3015. /*
  3016. * dp_vdev_attach_wifi3() - attach txrx vdev
  3017. * @txrx_pdev: Datapath PDEV handle
  3018. * @vdev_mac_addr: MAC address of the virtual interface
  3019. * @vdev_id: VDEV Id
  3020. * @wlan_op_mode: VDEV operating mode
  3021. *
  3022. * Return: DP VDEV handle on success, NULL on failure
  3023. */
  3024. static struct cdp_vdev *dp_vdev_attach_wifi3(struct cdp_pdev *txrx_pdev,
  3025. uint8_t *vdev_mac_addr, uint8_t vdev_id, enum wlan_op_mode op_mode)
  3026. {
  3027. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  3028. struct dp_soc *soc = pdev->soc;
  3029. struct dp_vdev *vdev = qdf_mem_malloc(sizeof(*vdev));
  3030. if (!vdev) {
  3031. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3032. FL("DP VDEV memory allocation failed"));
  3033. goto fail0;
  3034. }
  3035. vdev->pdev = pdev;
  3036. vdev->vdev_id = vdev_id;
  3037. vdev->opmode = op_mode;
  3038. vdev->osdev = soc->osdev;
  3039. vdev->osif_rx = NULL;
  3040. vdev->osif_rsim_rx_decap = NULL;
  3041. vdev->osif_get_key = NULL;
  3042. vdev->osif_rx_mon = NULL;
  3043. vdev->osif_tx_free_ext = NULL;
  3044. vdev->osif_vdev = NULL;
  3045. vdev->delete.pending = 0;
  3046. vdev->safemode = 0;
  3047. vdev->drop_unenc = 1;
  3048. vdev->sec_type = cdp_sec_type_none;
  3049. #ifdef notyet
  3050. vdev->filters_num = 0;
  3051. #endif
  3052. qdf_mem_copy(
  3053. &vdev->mac_addr.raw[0], vdev_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  3054. vdev->tx_encap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  3055. vdev->rx_decap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  3056. vdev->dscp_tid_map_id = 0;
  3057. vdev->mcast_enhancement_en = 0;
  3058. /* TODO: Initialize default HTT meta data that will be used in
  3059. * TCL descriptors for packets transmitted from this VDEV
  3060. */
  3061. TAILQ_INIT(&vdev->peer_list);
  3062. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  3063. /* add this vdev into the pdev's list */
  3064. TAILQ_INSERT_TAIL(&pdev->vdev_list, vdev, vdev_list_elem);
  3065. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  3066. pdev->vdev_count++;
  3067. dp_tx_vdev_attach(vdev);
  3068. if ((soc->intr_mode == DP_INTR_POLL) &&
  3069. wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx) != 0) {
  3070. if (pdev->vdev_count == 1)
  3071. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  3072. }
  3073. dp_lro_hash_setup(soc);
  3074. /* LRO */
  3075. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  3076. wlan_op_mode_sta == vdev->opmode)
  3077. vdev->lro_enable = true;
  3078. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3079. "LRO: vdev_id %d lro_enable %d", vdev_id, vdev->lro_enable);
  3080. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3081. "Created vdev %pK (%pM)", vdev, vdev->mac_addr.raw);
  3082. DP_STATS_INIT(vdev);
  3083. if (wlan_op_mode_sta == vdev->opmode)
  3084. dp_peer_create_wifi3((struct cdp_vdev *)vdev,
  3085. vdev->mac_addr.raw,
  3086. NULL);
  3087. return (struct cdp_vdev *)vdev;
  3088. fail0:
  3089. return NULL;
  3090. }
  3091. /**
  3092. * dp_vdev_register_wifi3() - Register VDEV operations from osif layer
  3093. * @vdev: Datapath VDEV handle
  3094. * @osif_vdev: OSIF vdev handle
  3095. * @ctrl_vdev: UMAC vdev handle
  3096. * @txrx_ops: Tx and Rx operations
  3097. *
  3098. * Return: DP VDEV handle on success, NULL on failure
  3099. */
  3100. static void dp_vdev_register_wifi3(struct cdp_vdev *vdev_handle,
  3101. void *osif_vdev, struct cdp_ctrl_objmgr_vdev *ctrl_vdev,
  3102. struct ol_txrx_ops *txrx_ops)
  3103. {
  3104. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3105. vdev->osif_vdev = osif_vdev;
  3106. vdev->ctrl_vdev = ctrl_vdev;
  3107. vdev->osif_rx = txrx_ops->rx.rx;
  3108. vdev->osif_rsim_rx_decap = txrx_ops->rx.rsim_rx_decap;
  3109. vdev->osif_get_key = txrx_ops->get_key;
  3110. vdev->osif_rx_mon = txrx_ops->rx.mon;
  3111. vdev->osif_tx_free_ext = txrx_ops->tx.tx_free_ext;
  3112. #ifdef notyet
  3113. #if ATH_SUPPORT_WAPI
  3114. vdev->osif_check_wai = txrx_ops->rx.wai_check;
  3115. #endif
  3116. #endif
  3117. #ifdef UMAC_SUPPORT_PROXY_ARP
  3118. vdev->osif_proxy_arp = txrx_ops->proxy_arp;
  3119. #endif
  3120. vdev->me_convert = txrx_ops->me_convert;
  3121. /* TODO: Enable the following once Tx code is integrated */
  3122. if (vdev->mesh_vdev)
  3123. txrx_ops->tx.tx = dp_tx_send_mesh;
  3124. else
  3125. txrx_ops->tx.tx = dp_tx_send;
  3126. txrx_ops->tx.tx_exception = dp_tx_send_exception;
  3127. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  3128. "DP Vdev Register success");
  3129. }
  3130. /**
  3131. * dp_vdev_flush_peers() - Forcibily Flush peers of vdev
  3132. * @vdev: Datapath VDEV handle
  3133. *
  3134. * Return: void
  3135. */
  3136. static void dp_vdev_flush_peers(struct dp_vdev *vdev)
  3137. {
  3138. struct dp_pdev *pdev = vdev->pdev;
  3139. struct dp_soc *soc = pdev->soc;
  3140. struct dp_peer *peer;
  3141. uint16_t *peer_ids;
  3142. uint8_t i = 0, j = 0;
  3143. peer_ids = qdf_mem_malloc(soc->max_peers * sizeof(peer_ids[0]));
  3144. if (!peer_ids) {
  3145. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3146. "DP alloc failure - unable to flush peers");
  3147. return;
  3148. }
  3149. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3150. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3151. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  3152. if (peer->peer_ids[i] != HTT_INVALID_PEER)
  3153. if (j < soc->max_peers)
  3154. peer_ids[j++] = peer->peer_ids[i];
  3155. }
  3156. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3157. for (i = 0; i < j ; i++)
  3158. dp_rx_peer_unmap_handler(soc, peer_ids[i]);
  3159. qdf_mem_free(peer_ids);
  3160. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3161. FL("Flushed peers for vdev object %pK "), vdev);
  3162. }
  3163. /*
  3164. * dp_vdev_detach_wifi3() - Detach txrx vdev
  3165. * @txrx_vdev: Datapath VDEV handle
  3166. * @callback: Callback OL_IF on completion of detach
  3167. * @cb_context: Callback context
  3168. *
  3169. */
  3170. static void dp_vdev_detach_wifi3(struct cdp_vdev *vdev_handle,
  3171. ol_txrx_vdev_delete_cb callback, void *cb_context)
  3172. {
  3173. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3174. struct dp_pdev *pdev = vdev->pdev;
  3175. struct dp_soc *soc = pdev->soc;
  3176. /* preconditions */
  3177. qdf_assert(vdev);
  3178. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  3179. /* remove the vdev from its parent pdev's list */
  3180. TAILQ_REMOVE(&pdev->vdev_list, vdev, vdev_list_elem);
  3181. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  3182. if (wlan_op_mode_sta == vdev->opmode)
  3183. dp_peer_delete_wifi3(vdev->vap_bss_peer, 0);
  3184. /*
  3185. * If Target is hung, flush all peers before detaching vdev
  3186. * this will free all references held due to missing
  3187. * unmap commands from Target
  3188. */
  3189. if (hif_get_target_status(soc->hif_handle) == TARGET_STATUS_RESET)
  3190. dp_vdev_flush_peers(vdev);
  3191. /*
  3192. * Use peer_ref_mutex while accessing peer_list, in case
  3193. * a peer is in the process of being removed from the list.
  3194. */
  3195. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3196. /* check that the vdev has no peers allocated */
  3197. if (!TAILQ_EMPTY(&vdev->peer_list)) {
  3198. /* debug print - will be removed later */
  3199. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  3200. FL("not deleting vdev object %pK (%pM)"
  3201. "until deletion finishes for all its peers"),
  3202. vdev, vdev->mac_addr.raw);
  3203. /* indicate that the vdev needs to be deleted */
  3204. vdev->delete.pending = 1;
  3205. vdev->delete.callback = callback;
  3206. vdev->delete.context = cb_context;
  3207. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3208. return;
  3209. }
  3210. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3211. dp_tx_vdev_detach(vdev);
  3212. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3213. FL("deleting vdev object %pK (%pM)"), vdev, vdev->mac_addr.raw);
  3214. qdf_mem_free(vdev);
  3215. if (callback)
  3216. callback(cb_context);
  3217. }
  3218. /*
  3219. * dp_peer_delete_ast_entries(): Delete all AST entries for a peer
  3220. * @soc - datapath soc handle
  3221. * @peer - datapath peer handle
  3222. *
  3223. * Delete the AST entries belonging to a peer
  3224. */
  3225. #ifdef FEATURE_AST
  3226. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  3227. struct dp_peer *peer)
  3228. {
  3229. struct dp_ast_entry *ast_entry, *temp_ast_entry;
  3230. qdf_spin_lock_bh(&soc->ast_lock);
  3231. DP_PEER_ITERATE_ASE_LIST(peer, ast_entry, temp_ast_entry)
  3232. dp_peer_del_ast(soc, ast_entry);
  3233. peer->self_ast_entry = NULL;
  3234. TAILQ_INIT(&peer->ast_entry_list);
  3235. qdf_spin_unlock_bh(&soc->ast_lock);
  3236. }
  3237. #else
  3238. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  3239. struct dp_peer *peer)
  3240. {
  3241. }
  3242. #endif
  3243. /*
  3244. * dp_peer_create_wifi3() - attach txrx peer
  3245. * @txrx_vdev: Datapath VDEV handle
  3246. * @peer_mac_addr: Peer MAC address
  3247. *
  3248. * Return: DP peeer handle on success, NULL on failure
  3249. */
  3250. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  3251. uint8_t *peer_mac_addr, struct cdp_ctrl_objmgr_peer *ctrl_peer)
  3252. {
  3253. struct dp_peer *peer;
  3254. int i;
  3255. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3256. struct dp_pdev *pdev;
  3257. struct dp_soc *soc;
  3258. struct dp_ast_entry *ast_entry;
  3259. /* preconditions */
  3260. qdf_assert(vdev);
  3261. qdf_assert(peer_mac_addr);
  3262. pdev = vdev->pdev;
  3263. soc = pdev->soc;
  3264. peer = dp_peer_find_hash_find(pdev->soc, peer_mac_addr,
  3265. 0, vdev->vdev_id);
  3266. if (peer) {
  3267. peer->delete_in_progress = false;
  3268. dp_peer_delete_ast_entries(soc, peer);
  3269. /*
  3270. * on peer create, peer ref count decrements, sice new peer is not
  3271. * getting created earlier reference is reused, peer_unref_delete will
  3272. * take care of incrementing count
  3273. * */
  3274. if (soc->cdp_soc.ol_ops->peer_unref_delete) {
  3275. soc->cdp_soc.ol_ops->peer_unref_delete(pdev->ctrl_pdev,
  3276. vdev->vdev_id, peer->mac_addr.raw);
  3277. }
  3278. peer->ctrl_peer = ctrl_peer;
  3279. dp_local_peer_id_alloc(pdev, peer);
  3280. DP_STATS_INIT(peer);
  3281. return (void *)peer;
  3282. } else {
  3283. /*
  3284. * When a STA roams from RPTR AP to ROOT AP and vice versa, we
  3285. * need to remove the AST entry which was earlier added as a WDS
  3286. * entry.
  3287. */
  3288. ast_entry = dp_peer_ast_hash_find(soc, peer_mac_addr);
  3289. if (ast_entry)
  3290. dp_peer_del_ast(soc, ast_entry);
  3291. }
  3292. #ifdef notyet
  3293. peer = (struct dp_peer *)qdf_mempool_alloc(soc->osdev,
  3294. soc->mempool_ol_ath_peer);
  3295. #else
  3296. peer = (struct dp_peer *)qdf_mem_malloc(sizeof(*peer));
  3297. #endif
  3298. if (!peer)
  3299. return NULL; /* failure */
  3300. qdf_mem_zero(peer, sizeof(struct dp_peer));
  3301. TAILQ_INIT(&peer->ast_entry_list);
  3302. /* store provided params */
  3303. peer->vdev = vdev;
  3304. peer->ctrl_peer = ctrl_peer;
  3305. dp_peer_add_ast(soc, peer, peer_mac_addr, CDP_TXRX_AST_TYPE_STATIC, 0);
  3306. qdf_spinlock_create(&peer->peer_info_lock);
  3307. qdf_mem_copy(
  3308. &peer->mac_addr.raw[0], peer_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  3309. /* TODO: See of rx_opt_proc is really required */
  3310. peer->rx_opt_proc = soc->rx_opt_proc;
  3311. /* initialize the peer_id */
  3312. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  3313. peer->peer_ids[i] = HTT_INVALID_PEER;
  3314. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3315. qdf_atomic_init(&peer->ref_cnt);
  3316. /* keep one reference for attach */
  3317. qdf_atomic_inc(&peer->ref_cnt);
  3318. /* add this peer into the vdev's list */
  3319. if (wlan_op_mode_sta == vdev->opmode)
  3320. TAILQ_INSERT_HEAD(&vdev->peer_list, peer, peer_list_elem);
  3321. else
  3322. TAILQ_INSERT_TAIL(&vdev->peer_list, peer, peer_list_elem);
  3323. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3324. /* TODO: See if hash based search is required */
  3325. dp_peer_find_hash_add(soc, peer);
  3326. /* Initialize the peer state */
  3327. peer->state = OL_TXRX_PEER_STATE_DISC;
  3328. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3329. "vdev %pK created peer %pK (%pM) ref_cnt: %d",
  3330. vdev, peer, peer->mac_addr.raw,
  3331. qdf_atomic_read(&peer->ref_cnt));
  3332. /*
  3333. * For every peer MAp message search and set if bss_peer
  3334. */
  3335. if (memcmp(peer->mac_addr.raw, vdev->mac_addr.raw, 6) == 0) {
  3336. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3337. "vdev bss_peer!!!!");
  3338. peer->bss_peer = 1;
  3339. vdev->vap_bss_peer = peer;
  3340. }
  3341. dp_local_peer_id_alloc(pdev, peer);
  3342. DP_STATS_INIT(peer);
  3343. return (void *)peer;
  3344. }
  3345. /*
  3346. * dp_peer_setup_wifi3() - initialize the peer
  3347. * @vdev_hdl: virtual device object
  3348. * @peer: Peer object
  3349. *
  3350. * Return: void
  3351. */
  3352. static void dp_peer_setup_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  3353. {
  3354. struct dp_peer *peer = (struct dp_peer *)peer_hdl;
  3355. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  3356. struct dp_pdev *pdev;
  3357. struct dp_soc *soc;
  3358. bool hash_based = 0;
  3359. enum cdp_host_reo_dest_ring reo_dest;
  3360. /* preconditions */
  3361. qdf_assert(vdev);
  3362. qdf_assert(peer);
  3363. pdev = vdev->pdev;
  3364. soc = pdev->soc;
  3365. peer->last_assoc_rcvd = 0;
  3366. peer->last_disassoc_rcvd = 0;
  3367. peer->last_deauth_rcvd = 0;
  3368. /*
  3369. * hash based steering is disabled for Radios which are offloaded
  3370. * to NSS
  3371. */
  3372. if (!wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx))
  3373. hash_based = wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx);
  3374. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3375. FL("hash based steering for pdev: %d is %d\n"),
  3376. pdev->pdev_id, hash_based);
  3377. /*
  3378. * Below line of code will ensure the proper reo_dest ring is chosen
  3379. * for cases where toeplitz hash cannot be generated (ex: non TCP/UDP)
  3380. */
  3381. reo_dest = pdev->reo_dest;
  3382. if (soc->cdp_soc.ol_ops->peer_set_default_routing) {
  3383. /* TODO: Check the destination ring number to be passed to FW */
  3384. soc->cdp_soc.ol_ops->peer_set_default_routing(
  3385. pdev->ctrl_pdev, peer->mac_addr.raw,
  3386. peer->vdev->vdev_id, hash_based, reo_dest);
  3387. }
  3388. dp_peer_rx_init(pdev, peer);
  3389. return;
  3390. }
  3391. /*
  3392. * dp_set_vdev_tx_encap_type() - set the encap type of the vdev
  3393. * @vdev_handle: virtual device object
  3394. * @htt_pkt_type: type of pkt
  3395. *
  3396. * Return: void
  3397. */
  3398. static void dp_set_vdev_tx_encap_type(struct cdp_vdev *vdev_handle,
  3399. enum htt_cmn_pkt_type val)
  3400. {
  3401. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3402. vdev->tx_encap_type = val;
  3403. }
  3404. /*
  3405. * dp_set_vdev_rx_decap_type() - set the decap type of the vdev
  3406. * @vdev_handle: virtual device object
  3407. * @htt_pkt_type: type of pkt
  3408. *
  3409. * Return: void
  3410. */
  3411. static void dp_set_vdev_rx_decap_type(struct cdp_vdev *vdev_handle,
  3412. enum htt_cmn_pkt_type val)
  3413. {
  3414. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3415. vdev->rx_decap_type = val;
  3416. }
  3417. /*
  3418. * dp_set_pdev_reo_dest() - set the reo destination ring for this pdev
  3419. * @pdev_handle: physical device object
  3420. * @val: reo destination ring index (1 - 4)
  3421. *
  3422. * Return: void
  3423. */
  3424. static void dp_set_pdev_reo_dest(struct cdp_pdev *pdev_handle,
  3425. enum cdp_host_reo_dest_ring val)
  3426. {
  3427. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3428. if (pdev)
  3429. pdev->reo_dest = val;
  3430. }
  3431. /*
  3432. * dp_get_pdev_reo_dest() - get the reo destination for this pdev
  3433. * @pdev_handle: physical device object
  3434. *
  3435. * Return: reo destination ring index
  3436. */
  3437. static enum cdp_host_reo_dest_ring
  3438. dp_get_pdev_reo_dest(struct cdp_pdev *pdev_handle)
  3439. {
  3440. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3441. if (pdev)
  3442. return pdev->reo_dest;
  3443. else
  3444. return cdp_host_reo_dest_ring_unknown;
  3445. }
  3446. #ifdef QCA_SUPPORT_SON
  3447. static void dp_son_peer_authorize(struct dp_peer *peer)
  3448. {
  3449. struct dp_soc *soc;
  3450. soc = peer->vdev->pdev->soc;
  3451. peer->peer_bs_inact_flag = 0;
  3452. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  3453. return;
  3454. }
  3455. #else
  3456. static void dp_son_peer_authorize(struct dp_peer *peer)
  3457. {
  3458. return;
  3459. }
  3460. #endif
  3461. /*
  3462. * dp_set_filter_neighbour_peers() - set filter neighbour peers for smart mesh
  3463. * @pdev_handle: device object
  3464. * @val: value to be set
  3465. *
  3466. * Return: void
  3467. */
  3468. static int dp_set_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  3469. uint32_t val)
  3470. {
  3471. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3472. /* Enable/Disable smart mesh filtering. This flag will be checked
  3473. * during rx processing to check if packets are from NAC clients.
  3474. */
  3475. pdev->filter_neighbour_peers = val;
  3476. return 0;
  3477. }
  3478. /*
  3479. * dp_update_filter_neighbour_peers() - set neighbour peers(nac clients)
  3480. * address for smart mesh filtering
  3481. * @pdev_handle: device object
  3482. * @cmd: Add/Del command
  3483. * @macaddr: nac client mac address
  3484. *
  3485. * Return: void
  3486. */
  3487. static int dp_update_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  3488. uint32_t cmd, uint8_t *macaddr)
  3489. {
  3490. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3491. struct dp_neighbour_peer *peer = NULL;
  3492. if (!macaddr)
  3493. goto fail0;
  3494. /* Store address of NAC (neighbour peer) which will be checked
  3495. * against TA of received packets.
  3496. */
  3497. if (cmd == DP_NAC_PARAM_ADD) {
  3498. peer = (struct dp_neighbour_peer *) qdf_mem_malloc(
  3499. sizeof(*peer));
  3500. if (!peer) {
  3501. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3502. FL("DP neighbour peer node memory allocation failed"));
  3503. goto fail0;
  3504. }
  3505. qdf_mem_copy(&peer->neighbour_peers_macaddr.raw[0],
  3506. macaddr, DP_MAC_ADDR_LEN);
  3507. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  3508. /* add this neighbour peer into the list */
  3509. TAILQ_INSERT_TAIL(&pdev->neighbour_peers_list, peer,
  3510. neighbour_peer_list_elem);
  3511. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  3512. return 1;
  3513. } else if (cmd == DP_NAC_PARAM_DEL) {
  3514. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  3515. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  3516. neighbour_peer_list_elem) {
  3517. if (!qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  3518. macaddr, DP_MAC_ADDR_LEN)) {
  3519. /* delete this peer from the list */
  3520. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  3521. peer, neighbour_peer_list_elem);
  3522. qdf_mem_free(peer);
  3523. break;
  3524. }
  3525. }
  3526. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  3527. return 1;
  3528. }
  3529. fail0:
  3530. return 0;
  3531. }
  3532. /*
  3533. * dp_get_sec_type() - Get the security type
  3534. * @peer: Datapath peer handle
  3535. * @sec_idx: Security id (mcast, ucast)
  3536. *
  3537. * return sec_type: Security type
  3538. */
  3539. static int dp_get_sec_type(struct cdp_peer *peer, uint8_t sec_idx)
  3540. {
  3541. struct dp_peer *dpeer = (struct dp_peer *)peer;
  3542. return dpeer->security[sec_idx].sec_type;
  3543. }
  3544. /*
  3545. * dp_peer_authorize() - authorize txrx peer
  3546. * @peer_handle: Datapath peer handle
  3547. * @authorize
  3548. *
  3549. */
  3550. static void dp_peer_authorize(struct cdp_peer *peer_handle, uint32_t authorize)
  3551. {
  3552. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3553. struct dp_soc *soc;
  3554. if (peer != NULL) {
  3555. soc = peer->vdev->pdev->soc;
  3556. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3557. dp_son_peer_authorize(peer);
  3558. peer->authorize = authorize ? 1 : 0;
  3559. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3560. }
  3561. }
  3562. #ifdef QCA_SUPPORT_SON
  3563. /*
  3564. * dp_txrx_update_inact_threshold() - Update inact timer threshold
  3565. * @pdev_handle: Device handle
  3566. * @new_threshold : updated threshold value
  3567. *
  3568. */
  3569. static void
  3570. dp_txrx_update_inact_threshold(struct cdp_pdev *pdev_handle,
  3571. u_int16_t new_threshold)
  3572. {
  3573. struct dp_vdev *vdev;
  3574. struct dp_peer *peer;
  3575. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3576. struct dp_soc *soc = pdev->soc;
  3577. u_int16_t old_threshold = soc->pdev_bs_inact_reload;
  3578. if (old_threshold == new_threshold)
  3579. return;
  3580. soc->pdev_bs_inact_reload = new_threshold;
  3581. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3582. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  3583. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3584. if (vdev->opmode != wlan_op_mode_ap)
  3585. continue;
  3586. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3587. if (!peer->authorize)
  3588. continue;
  3589. if (old_threshold - peer->peer_bs_inact >=
  3590. new_threshold) {
  3591. dp_mark_peer_inact((void *)peer, true);
  3592. peer->peer_bs_inact = 0;
  3593. } else {
  3594. peer->peer_bs_inact = new_threshold -
  3595. (old_threshold - peer->peer_bs_inact);
  3596. }
  3597. }
  3598. }
  3599. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  3600. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3601. }
  3602. /**
  3603. * dp_txrx_reset_inact_count(): Reset inact count
  3604. * @pdev_handle - device handle
  3605. *
  3606. * Return: void
  3607. */
  3608. static void
  3609. dp_txrx_reset_inact_count(struct cdp_pdev *pdev_handle)
  3610. {
  3611. struct dp_vdev *vdev = NULL;
  3612. struct dp_peer *peer = NULL;
  3613. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3614. struct dp_soc *soc = pdev->soc;
  3615. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3616. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  3617. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3618. if (vdev->opmode != wlan_op_mode_ap)
  3619. continue;
  3620. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3621. if (!peer->authorize)
  3622. continue;
  3623. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  3624. }
  3625. }
  3626. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  3627. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3628. }
  3629. /**
  3630. * dp_set_inact_params(): set inactivity params
  3631. * @pdev_handle - device handle
  3632. * @inact_check_interval - inactivity interval
  3633. * @inact_normal - Inactivity normal
  3634. * @inact_overload - Inactivity overload
  3635. *
  3636. * Return: bool
  3637. */
  3638. bool dp_set_inact_params(struct cdp_pdev *pdev_handle,
  3639. u_int16_t inact_check_interval,
  3640. u_int16_t inact_normal, u_int16_t inact_overload)
  3641. {
  3642. struct dp_soc *soc;
  3643. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3644. if (!pdev)
  3645. return false;
  3646. soc = pdev->soc;
  3647. if (!soc)
  3648. return false;
  3649. soc->pdev_bs_inact_interval = inact_check_interval;
  3650. soc->pdev_bs_inact_normal = inact_normal;
  3651. soc->pdev_bs_inact_overload = inact_overload;
  3652. dp_txrx_update_inact_threshold((struct cdp_pdev *)pdev,
  3653. soc->pdev_bs_inact_normal);
  3654. return true;
  3655. }
  3656. /**
  3657. * dp_start_inact_timer(): Inactivity timer start
  3658. * @pdev_handle - device handle
  3659. * @enable - Inactivity timer start/stop
  3660. *
  3661. * Return: bool
  3662. */
  3663. bool dp_start_inact_timer(struct cdp_pdev *pdev_handle, bool enable)
  3664. {
  3665. struct dp_soc *soc;
  3666. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3667. if (!pdev)
  3668. return false;
  3669. soc = pdev->soc;
  3670. if (!soc)
  3671. return false;
  3672. if (enable) {
  3673. dp_txrx_reset_inact_count((struct cdp_pdev *)pdev);
  3674. qdf_timer_mod(&soc->pdev_bs_inact_timer,
  3675. soc->pdev_bs_inact_interval * 1000);
  3676. } else {
  3677. qdf_timer_stop(&soc->pdev_bs_inact_timer);
  3678. }
  3679. return true;
  3680. }
  3681. /**
  3682. * dp_set_overload(): Set inactivity overload
  3683. * @pdev_handle - device handle
  3684. * @overload - overload status
  3685. *
  3686. * Return: void
  3687. */
  3688. void dp_set_overload(struct cdp_pdev *pdev_handle, bool overload)
  3689. {
  3690. struct dp_soc *soc;
  3691. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3692. if (!pdev)
  3693. return;
  3694. soc = pdev->soc;
  3695. if (!soc)
  3696. return;
  3697. dp_txrx_update_inact_threshold((struct cdp_pdev *)pdev,
  3698. overload ? soc->pdev_bs_inact_overload :
  3699. soc->pdev_bs_inact_normal);
  3700. }
  3701. /**
  3702. * dp_peer_is_inact(): check whether peer is inactive
  3703. * @peer_handle - datapath peer handle
  3704. *
  3705. * Return: bool
  3706. */
  3707. bool dp_peer_is_inact(void *peer_handle)
  3708. {
  3709. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3710. if (!peer)
  3711. return false;
  3712. return peer->peer_bs_inact_flag == 1;
  3713. }
  3714. /**
  3715. * dp_init_inact_timer: initialize the inact timer
  3716. * @soc - SOC handle
  3717. *
  3718. * Return: void
  3719. */
  3720. void dp_init_inact_timer(struct dp_soc *soc)
  3721. {
  3722. qdf_timer_init(soc->osdev, &soc->pdev_bs_inact_timer,
  3723. dp_txrx_peer_find_inact_timeout_handler,
  3724. (void *)soc, QDF_TIMER_TYPE_WAKE_APPS);
  3725. }
  3726. #else
  3727. bool dp_set_inact_params(struct cdp_pdev *pdev, u_int16_t inact_check_interval,
  3728. u_int16_t inact_normal, u_int16_t inact_overload)
  3729. {
  3730. return false;
  3731. }
  3732. bool dp_start_inact_timer(struct cdp_pdev *pdev, bool enable)
  3733. {
  3734. return false;
  3735. }
  3736. void dp_set_overload(struct cdp_pdev *pdev, bool overload)
  3737. {
  3738. return;
  3739. }
  3740. void dp_init_inact_timer(struct dp_soc *soc)
  3741. {
  3742. return;
  3743. }
  3744. bool dp_peer_is_inact(void *peer)
  3745. {
  3746. return false;
  3747. }
  3748. #endif
  3749. /*
  3750. * dp_peer_unref_delete() - unref and delete peer
  3751. * @peer_handle: Datapath peer handle
  3752. *
  3753. */
  3754. void dp_peer_unref_delete(void *peer_handle)
  3755. {
  3756. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3757. struct dp_peer *bss_peer = NULL;
  3758. struct dp_vdev *vdev = peer->vdev;
  3759. struct dp_pdev *pdev = vdev->pdev;
  3760. struct dp_soc *soc = pdev->soc;
  3761. struct dp_peer *tmppeer;
  3762. int found = 0;
  3763. uint16_t peer_id;
  3764. uint16_t vdev_id;
  3765. /*
  3766. * Hold the lock all the way from checking if the peer ref count
  3767. * is zero until the peer references are removed from the hash
  3768. * table and vdev list (if the peer ref count is zero).
  3769. * This protects against a new HL tx operation starting to use the
  3770. * peer object just after this function concludes it's done being used.
  3771. * Furthermore, the lock needs to be held while checking whether the
  3772. * vdev's list of peers is empty, to make sure that list is not modified
  3773. * concurrently with the empty check.
  3774. */
  3775. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3776. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3777. "%s: peer %pK ref_cnt(before decrement): %d\n", __func__,
  3778. peer, qdf_atomic_read(&peer->ref_cnt));
  3779. if (qdf_atomic_dec_and_test(&peer->ref_cnt)) {
  3780. peer_id = peer->peer_ids[0];
  3781. vdev_id = vdev->vdev_id;
  3782. /*
  3783. * Make sure that the reference to the peer in
  3784. * peer object map is removed
  3785. */
  3786. if (peer_id != HTT_INVALID_PEER)
  3787. soc->peer_id_to_obj_map[peer_id] = NULL;
  3788. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3789. "Deleting peer %pK (%pM)", peer, peer->mac_addr.raw);
  3790. /* remove the reference to the peer from the hash table */
  3791. dp_peer_find_hash_remove(soc, peer);
  3792. qdf_spin_lock_bh(&soc->ast_lock);
  3793. if (peer->self_ast_entry) {
  3794. dp_peer_del_ast(soc, peer->self_ast_entry);
  3795. peer->self_ast_entry = NULL;
  3796. }
  3797. qdf_spin_unlock_bh(&soc->ast_lock);
  3798. TAILQ_FOREACH(tmppeer, &peer->vdev->peer_list, peer_list_elem) {
  3799. if (tmppeer == peer) {
  3800. found = 1;
  3801. break;
  3802. }
  3803. }
  3804. if (found) {
  3805. TAILQ_REMOVE(&peer->vdev->peer_list, peer,
  3806. peer_list_elem);
  3807. } else {
  3808. /*Ignoring the remove operation as peer not found*/
  3809. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  3810. "peer %pK not found in vdev (%pK)->peer_list:%pK",
  3811. peer, vdev, &peer->vdev->peer_list);
  3812. }
  3813. /* cleanup the peer data */
  3814. dp_peer_cleanup(vdev, peer);
  3815. /* check whether the parent vdev has no peers left */
  3816. if (TAILQ_EMPTY(&vdev->peer_list)) {
  3817. /*
  3818. * Now that there are no references to the peer, we can
  3819. * release the peer reference lock.
  3820. */
  3821. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3822. /*
  3823. * Check if the parent vdev was waiting for its peers
  3824. * to be deleted, in order for it to be deleted too.
  3825. */
  3826. if (vdev->delete.pending) {
  3827. ol_txrx_vdev_delete_cb vdev_delete_cb =
  3828. vdev->delete.callback;
  3829. void *vdev_delete_context =
  3830. vdev->delete.context;
  3831. QDF_TRACE(QDF_MODULE_ID_DP,
  3832. QDF_TRACE_LEVEL_INFO_HIGH,
  3833. FL("deleting vdev object %pK (%pM)"
  3834. " - its last peer is done"),
  3835. vdev, vdev->mac_addr.raw);
  3836. /* all peers are gone, go ahead and delete it */
  3837. dp_tx_flow_pool_unmap_handler(pdev, vdev_id,
  3838. FLOW_TYPE_VDEV,
  3839. vdev_id);
  3840. dp_tx_vdev_detach(vdev);
  3841. QDF_TRACE(QDF_MODULE_ID_DP,
  3842. QDF_TRACE_LEVEL_INFO_HIGH,
  3843. FL("deleting vdev object %pK (%pM)"),
  3844. vdev, vdev->mac_addr.raw);
  3845. qdf_mem_free(vdev);
  3846. vdev = NULL;
  3847. if (vdev_delete_cb)
  3848. vdev_delete_cb(vdev_delete_context);
  3849. }
  3850. } else {
  3851. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3852. }
  3853. if (vdev) {
  3854. if (vdev->vap_bss_peer == peer) {
  3855. vdev->vap_bss_peer = NULL;
  3856. }
  3857. }
  3858. if (soc->cdp_soc.ol_ops->peer_unref_delete) {
  3859. soc->cdp_soc.ol_ops->peer_unref_delete(pdev->ctrl_pdev,
  3860. vdev_id, peer->mac_addr.raw);
  3861. }
  3862. if (!vdev || !vdev->vap_bss_peer) {
  3863. goto free_peer;
  3864. }
  3865. #ifdef notyet
  3866. qdf_mempool_free(soc->osdev, soc->mempool_ol_ath_peer, peer);
  3867. #else
  3868. bss_peer = vdev->vap_bss_peer;
  3869. DP_UPDATE_STATS(bss_peer, peer);
  3870. free_peer:
  3871. qdf_mem_free(peer);
  3872. #endif
  3873. } else {
  3874. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3875. }
  3876. }
  3877. /*
  3878. * dp_peer_detach_wifi3() – Detach txrx peer
  3879. * @peer_handle: Datapath peer handle
  3880. * @bitmap: bitmap indicating special handling of request.
  3881. *
  3882. */
  3883. static void dp_peer_delete_wifi3(void *peer_handle, uint32_t bitmap)
  3884. {
  3885. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3886. /* redirect the peer's rx delivery function to point to a
  3887. * discard func
  3888. */
  3889. peer->rx_opt_proc = dp_rx_discard;
  3890. peer->ctrl_peer = NULL;
  3891. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3892. FL("peer %pK (%pM)"), peer, peer->mac_addr.raw);
  3893. dp_local_peer_id_free(peer->vdev->pdev, peer);
  3894. qdf_spinlock_destroy(&peer->peer_info_lock);
  3895. /*
  3896. * Remove the reference added during peer_attach.
  3897. * The peer will still be left allocated until the
  3898. * PEER_UNMAP message arrives to remove the other
  3899. * reference, added by the PEER_MAP message.
  3900. */
  3901. dp_peer_unref_delete(peer_handle);
  3902. }
  3903. /*
  3904. * dp_get_vdev_mac_addr_wifi3() – Detach txrx peer
  3905. * @peer_handle: Datapath peer handle
  3906. *
  3907. */
  3908. static uint8 *dp_get_vdev_mac_addr_wifi3(struct cdp_vdev *pvdev)
  3909. {
  3910. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  3911. return vdev->mac_addr.raw;
  3912. }
  3913. /*
  3914. * dp_vdev_set_wds() - Enable per packet stats
  3915. * @vdev_handle: DP VDEV handle
  3916. * @val: value
  3917. *
  3918. * Return: none
  3919. */
  3920. static int dp_vdev_set_wds(void *vdev_handle, uint32_t val)
  3921. {
  3922. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3923. vdev->wds_enabled = val;
  3924. return 0;
  3925. }
  3926. /*
  3927. * dp_get_vdev_from_vdev_id_wifi3() – Detach txrx peer
  3928. * @peer_handle: Datapath peer handle
  3929. *
  3930. */
  3931. static struct cdp_vdev *dp_get_vdev_from_vdev_id_wifi3(struct cdp_pdev *dev,
  3932. uint8_t vdev_id)
  3933. {
  3934. struct dp_pdev *pdev = (struct dp_pdev *)dev;
  3935. struct dp_vdev *vdev = NULL;
  3936. if (qdf_unlikely(!pdev))
  3937. return NULL;
  3938. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  3939. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3940. if (vdev->vdev_id == vdev_id)
  3941. break;
  3942. }
  3943. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  3944. return (struct cdp_vdev *)vdev;
  3945. }
  3946. static int dp_get_opmode(struct cdp_vdev *vdev_handle)
  3947. {
  3948. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3949. return vdev->opmode;
  3950. }
  3951. static struct cdp_cfg *dp_get_ctrl_pdev_from_vdev_wifi3(struct cdp_vdev *pvdev)
  3952. {
  3953. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  3954. struct dp_pdev *pdev = vdev->pdev;
  3955. return (struct cdp_cfg *)pdev->wlan_cfg_ctx;
  3956. }
  3957. /**
  3958. * dp_reset_monitor_mode() - Disable monitor mode
  3959. * @pdev_handle: Datapath PDEV handle
  3960. *
  3961. * Return: 0 on success, not 0 on failure
  3962. */
  3963. static int dp_reset_monitor_mode(struct cdp_pdev *pdev_handle)
  3964. {
  3965. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3966. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  3967. struct dp_soc *soc = pdev->soc;
  3968. uint8_t pdev_id;
  3969. int mac_id;
  3970. pdev_id = pdev->pdev_id;
  3971. soc = pdev->soc;
  3972. qdf_spin_lock_bh(&pdev->mon_lock);
  3973. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  3974. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3975. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  3976. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3977. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  3978. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3979. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3980. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  3981. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  3982. }
  3983. pdev->monitor_vdev = NULL;
  3984. qdf_spin_unlock_bh(&pdev->mon_lock);
  3985. return 0;
  3986. }
  3987. /**
  3988. * dp_set_nac() - set peer_nac
  3989. * @peer_handle: Datapath PEER handle
  3990. *
  3991. * Return: void
  3992. */
  3993. static void dp_set_nac(struct cdp_peer *peer_handle)
  3994. {
  3995. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3996. peer->nac = 1;
  3997. }
  3998. /**
  3999. * dp_get_tx_pending() - read pending tx
  4000. * @pdev_handle: Datapath PDEV handle
  4001. *
  4002. * Return: outstanding tx
  4003. */
  4004. static int dp_get_tx_pending(struct cdp_pdev *pdev_handle)
  4005. {
  4006. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4007. return qdf_atomic_read(&pdev->num_tx_outstanding);
  4008. }
  4009. /**
  4010. * dp_get_peer_mac_from_peer_id() - get peer mac
  4011. * @pdev_handle: Datapath PDEV handle
  4012. * @peer_id: Peer ID
  4013. * @peer_mac: MAC addr of PEER
  4014. *
  4015. * Return: void
  4016. */
  4017. static void dp_get_peer_mac_from_peer_id(struct cdp_pdev *pdev_handle,
  4018. uint32_t peer_id, uint8_t *peer_mac)
  4019. {
  4020. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4021. struct dp_peer *peer;
  4022. if (pdev && peer_mac) {
  4023. peer = dp_peer_find_by_id(pdev->soc, (uint16_t)peer_id);
  4024. if (peer && peer->mac_addr.raw) {
  4025. qdf_mem_copy(peer_mac, peer->mac_addr.raw,
  4026. DP_MAC_ADDR_LEN);
  4027. }
  4028. }
  4029. }
  4030. /**
  4031. * dp_vdev_set_monitor_mode() - Set DP VDEV to monitor mode
  4032. * @vdev_handle: Datapath VDEV handle
  4033. * @smart_monitor: Flag to denote if its smart monitor mode
  4034. *
  4035. * Return: 0 on success, not 0 on failure
  4036. */
  4037. static int dp_vdev_set_monitor_mode(struct cdp_vdev *vdev_handle,
  4038. uint8_t smart_monitor)
  4039. {
  4040. /* Many monitor VAPs can exists in a system but only one can be up at
  4041. * anytime
  4042. */
  4043. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4044. struct dp_pdev *pdev;
  4045. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  4046. struct dp_soc *soc;
  4047. uint8_t pdev_id;
  4048. int mac_id;
  4049. qdf_assert(vdev);
  4050. pdev = vdev->pdev;
  4051. pdev_id = pdev->pdev_id;
  4052. soc = pdev->soc;
  4053. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  4054. "pdev=%pK, pdev_id=%d, soc=%pK vdev=%pK\n",
  4055. pdev, pdev_id, soc, vdev);
  4056. /*Check if current pdev's monitor_vdev exists */
  4057. if (pdev->monitor_vdev) {
  4058. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  4059. "vdev=%pK\n", vdev);
  4060. qdf_assert(vdev);
  4061. }
  4062. pdev->monitor_vdev = vdev;
  4063. /* If smart monitor mode, do not configure monitor ring */
  4064. if (smart_monitor)
  4065. return QDF_STATUS_SUCCESS;
  4066. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  4067. "MODE[%x] FP[%02x|%02x|%02x] MO[%02x|%02x|%02x]\n",
  4068. pdev->mon_filter_mode, pdev->fp_mgmt_filter,
  4069. pdev->fp_ctrl_filter, pdev->fp_data_filter,
  4070. pdev->mo_mgmt_filter, pdev->mo_ctrl_filter,
  4071. pdev->mo_data_filter);
  4072. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  4073. htt_tlv_filter.mpdu_start = 1;
  4074. htt_tlv_filter.msdu_start = 1;
  4075. htt_tlv_filter.packet = 1;
  4076. htt_tlv_filter.msdu_end = 1;
  4077. htt_tlv_filter.mpdu_end = 1;
  4078. htt_tlv_filter.packet_header = 1;
  4079. htt_tlv_filter.attention = 1;
  4080. htt_tlv_filter.ppdu_start = 0;
  4081. htt_tlv_filter.ppdu_end = 0;
  4082. htt_tlv_filter.ppdu_end_user_stats = 0;
  4083. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  4084. htt_tlv_filter.ppdu_end_status_done = 0;
  4085. htt_tlv_filter.header_per_msdu = 1;
  4086. htt_tlv_filter.enable_fp =
  4087. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  4088. htt_tlv_filter.enable_md = 0;
  4089. htt_tlv_filter.enable_mo =
  4090. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  4091. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  4092. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  4093. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  4094. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  4095. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  4096. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  4097. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4098. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  4099. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4100. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  4101. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  4102. }
  4103. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  4104. htt_tlv_filter.mpdu_start = 1;
  4105. htt_tlv_filter.msdu_start = 0;
  4106. htt_tlv_filter.packet = 0;
  4107. htt_tlv_filter.msdu_end = 0;
  4108. htt_tlv_filter.mpdu_end = 0;
  4109. htt_tlv_filter.attention = 0;
  4110. htt_tlv_filter.ppdu_start = 1;
  4111. htt_tlv_filter.ppdu_end = 1;
  4112. htt_tlv_filter.ppdu_end_user_stats = 1;
  4113. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  4114. htt_tlv_filter.ppdu_end_status_done = 1;
  4115. htt_tlv_filter.enable_fp = 1;
  4116. htt_tlv_filter.enable_md = 0;
  4117. htt_tlv_filter.enable_mo = 1;
  4118. if (pdev->mcopy_mode) {
  4119. htt_tlv_filter.packet_header = 1;
  4120. }
  4121. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  4122. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  4123. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  4124. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  4125. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  4126. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  4127. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4128. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  4129. pdev->pdev_id);
  4130. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4131. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  4132. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  4133. }
  4134. return QDF_STATUS_SUCCESS;
  4135. }
  4136. /**
  4137. * dp_pdev_set_advance_monitor_filter() - Set DP PDEV monitor filter
  4138. * @pdev_handle: Datapath PDEV handle
  4139. * @filter_val: Flag to select Filter for monitor mode
  4140. * Return: 0 on success, not 0 on failure
  4141. */
  4142. static int dp_pdev_set_advance_monitor_filter(struct cdp_pdev *pdev_handle,
  4143. struct cdp_monitor_filter *filter_val)
  4144. {
  4145. /* Many monitor VAPs can exists in a system but only one can be up at
  4146. * anytime
  4147. */
  4148. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4149. struct dp_vdev *vdev = pdev->monitor_vdev;
  4150. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  4151. struct dp_soc *soc;
  4152. uint8_t pdev_id;
  4153. int mac_id;
  4154. pdev_id = pdev->pdev_id;
  4155. soc = pdev->soc;
  4156. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  4157. "pdev=%pK, pdev_id=%d, soc=%pK vdev=%pK\n",
  4158. pdev, pdev_id, soc, vdev);
  4159. /*Check if current pdev's monitor_vdev exists */
  4160. if (!pdev->monitor_vdev) {
  4161. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  4162. "vdev=%pK\n", vdev);
  4163. qdf_assert(vdev);
  4164. }
  4165. /* update filter mode, type in pdev structure */
  4166. pdev->mon_filter_mode = filter_val->mode;
  4167. pdev->fp_mgmt_filter = filter_val->fp_mgmt;
  4168. pdev->fp_ctrl_filter = filter_val->fp_ctrl;
  4169. pdev->fp_data_filter = filter_val->fp_data;
  4170. pdev->mo_mgmt_filter = filter_val->mo_mgmt;
  4171. pdev->mo_ctrl_filter = filter_val->mo_ctrl;
  4172. pdev->mo_data_filter = filter_val->mo_data;
  4173. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  4174. "MODE[%x] FP[%02x|%02x|%02x] MO[%02x|%02x|%02x]\n",
  4175. pdev->mon_filter_mode, pdev->fp_mgmt_filter,
  4176. pdev->fp_ctrl_filter, pdev->fp_data_filter,
  4177. pdev->mo_mgmt_filter, pdev->mo_ctrl_filter,
  4178. pdev->mo_data_filter);
  4179. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  4180. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4181. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  4182. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4183. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  4184. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  4185. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4186. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  4187. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  4188. }
  4189. htt_tlv_filter.mpdu_start = 1;
  4190. htt_tlv_filter.msdu_start = 1;
  4191. htt_tlv_filter.packet = 1;
  4192. htt_tlv_filter.msdu_end = 1;
  4193. htt_tlv_filter.mpdu_end = 1;
  4194. htt_tlv_filter.packet_header = 1;
  4195. htt_tlv_filter.attention = 1;
  4196. htt_tlv_filter.ppdu_start = 0;
  4197. htt_tlv_filter.ppdu_end = 0;
  4198. htt_tlv_filter.ppdu_end_user_stats = 0;
  4199. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  4200. htt_tlv_filter.ppdu_end_status_done = 0;
  4201. htt_tlv_filter.header_per_msdu = 1;
  4202. htt_tlv_filter.enable_fp =
  4203. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  4204. htt_tlv_filter.enable_md = 0;
  4205. htt_tlv_filter.enable_mo =
  4206. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  4207. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  4208. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  4209. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  4210. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  4211. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  4212. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  4213. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4214. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  4215. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4216. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  4217. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  4218. }
  4219. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  4220. htt_tlv_filter.mpdu_start = 1;
  4221. htt_tlv_filter.msdu_start = 0;
  4222. htt_tlv_filter.packet = 0;
  4223. htt_tlv_filter.msdu_end = 0;
  4224. htt_tlv_filter.mpdu_end = 0;
  4225. htt_tlv_filter.attention = 0;
  4226. htt_tlv_filter.ppdu_start = 1;
  4227. htt_tlv_filter.ppdu_end = 1;
  4228. htt_tlv_filter.ppdu_end_user_stats = 1;
  4229. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  4230. htt_tlv_filter.ppdu_end_status_done = 1;
  4231. htt_tlv_filter.enable_fp = 1;
  4232. htt_tlv_filter.enable_md = 0;
  4233. htt_tlv_filter.enable_mo = 1;
  4234. if (pdev->mcopy_mode) {
  4235. htt_tlv_filter.packet_header = 1;
  4236. }
  4237. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  4238. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  4239. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  4240. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  4241. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  4242. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  4243. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4244. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  4245. pdev->pdev_id);
  4246. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4247. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  4248. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  4249. }
  4250. return QDF_STATUS_SUCCESS;
  4251. }
  4252. /**
  4253. * dp_get_pdev_id_frm_pdev() - get pdev_id
  4254. * @pdev_handle: Datapath PDEV handle
  4255. *
  4256. * Return: pdev_id
  4257. */
  4258. static
  4259. uint8_t dp_get_pdev_id_frm_pdev(struct cdp_pdev *pdev_handle)
  4260. {
  4261. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4262. return pdev->pdev_id;
  4263. }
  4264. /**
  4265. * dp_vdev_get_filter_ucast_data() - get DP VDEV monitor ucast filter
  4266. * @vdev_handle: Datapath VDEV handle
  4267. * Return: true on ucast filter flag set
  4268. */
  4269. static bool dp_vdev_get_filter_ucast_data(struct cdp_vdev *vdev_handle)
  4270. {
  4271. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4272. struct dp_pdev *pdev;
  4273. pdev = vdev->pdev;
  4274. if ((pdev->fp_data_filter & FILTER_DATA_UCAST) ||
  4275. (pdev->mo_data_filter & FILTER_DATA_UCAST))
  4276. return true;
  4277. return false;
  4278. }
  4279. /**
  4280. * dp_vdev_get_filter_mcast_data() - get DP VDEV monitor mcast filter
  4281. * @vdev_handle: Datapath VDEV handle
  4282. * Return: true on mcast filter flag set
  4283. */
  4284. static bool dp_vdev_get_filter_mcast_data(struct cdp_vdev *vdev_handle)
  4285. {
  4286. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4287. struct dp_pdev *pdev;
  4288. pdev = vdev->pdev;
  4289. if ((pdev->fp_data_filter & FILTER_DATA_MCAST) ||
  4290. (pdev->mo_data_filter & FILTER_DATA_MCAST))
  4291. return true;
  4292. return false;
  4293. }
  4294. /**
  4295. * dp_vdev_get_filter_non_data() - get DP VDEV monitor non_data filter
  4296. * @vdev_handle: Datapath VDEV handle
  4297. * Return: true on non data filter flag set
  4298. */
  4299. static bool dp_vdev_get_filter_non_data(struct cdp_vdev *vdev_handle)
  4300. {
  4301. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4302. struct dp_pdev *pdev;
  4303. pdev = vdev->pdev;
  4304. if ((pdev->fp_mgmt_filter & FILTER_MGMT_ALL) ||
  4305. (pdev->mo_mgmt_filter & FILTER_MGMT_ALL)) {
  4306. if ((pdev->fp_ctrl_filter & FILTER_CTRL_ALL) ||
  4307. (pdev->mo_ctrl_filter & FILTER_CTRL_ALL)) {
  4308. return true;
  4309. }
  4310. }
  4311. return false;
  4312. }
  4313. #ifdef MESH_MODE_SUPPORT
  4314. void dp_peer_set_mesh_mode(struct cdp_vdev *vdev_hdl, uint32_t val)
  4315. {
  4316. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  4317. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  4318. FL("val %d"), val);
  4319. vdev->mesh_vdev = val;
  4320. }
  4321. /*
  4322. * dp_peer_set_mesh_rx_filter() - to set the mesh rx filter
  4323. * @vdev_hdl: virtual device object
  4324. * @val: value to be set
  4325. *
  4326. * Return: void
  4327. */
  4328. void dp_peer_set_mesh_rx_filter(struct cdp_vdev *vdev_hdl, uint32_t val)
  4329. {
  4330. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  4331. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  4332. FL("val %d"), val);
  4333. vdev->mesh_rx_filter = val;
  4334. }
  4335. #endif
  4336. /*
  4337. * dp_aggregate_pdev_ctrl_frames_stats()- function to agreegate peer stats
  4338. * Current scope is bar received count
  4339. *
  4340. * @pdev_handle: DP_PDEV handle
  4341. *
  4342. * Return: void
  4343. */
  4344. #define STATS_PROC_TIMEOUT (HZ/1000)
  4345. static void
  4346. dp_aggregate_pdev_ctrl_frames_stats(struct dp_pdev *pdev)
  4347. {
  4348. struct dp_vdev *vdev;
  4349. struct dp_peer *peer;
  4350. uint32_t waitcnt;
  4351. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  4352. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  4353. if (!peer) {
  4354. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4355. FL("DP Invalid Peer refernce"));
  4356. return;
  4357. }
  4358. if (peer->delete_in_progress) {
  4359. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4360. FL("DP Peer deletion in progress"));
  4361. continue;
  4362. }
  4363. qdf_atomic_inc(&peer->ref_cnt);
  4364. waitcnt = 0;
  4365. dp_peer_rxtid_stats(peer, dp_rx_bar_stats_cb, pdev);
  4366. while (!(qdf_atomic_read(&(pdev->stats_cmd_complete)))
  4367. && waitcnt < 10) {
  4368. schedule_timeout_interruptible(
  4369. STATS_PROC_TIMEOUT);
  4370. waitcnt++;
  4371. }
  4372. qdf_atomic_set(&(pdev->stats_cmd_complete), 0);
  4373. dp_peer_unref_delete(peer);
  4374. }
  4375. }
  4376. }
  4377. /**
  4378. * dp_rx_bar_stats_cb(): BAR received stats callback
  4379. * @soc: SOC handle
  4380. * @cb_ctxt: Call back context
  4381. * @reo_status: Reo status
  4382. *
  4383. * return: void
  4384. */
  4385. void dp_rx_bar_stats_cb(struct dp_soc *soc, void *cb_ctxt,
  4386. union hal_reo_status *reo_status)
  4387. {
  4388. struct dp_pdev *pdev = (struct dp_pdev *)cb_ctxt;
  4389. struct hal_reo_queue_status *queue_status = &(reo_status->queue_status);
  4390. if (queue_status->header.status != HAL_REO_CMD_SUCCESS) {
  4391. DP_TRACE_STATS(FATAL, "REO stats failure %d \n",
  4392. queue_status->header.status);
  4393. qdf_atomic_set(&(pdev->stats_cmd_complete), 1);
  4394. return;
  4395. }
  4396. pdev->stats.rx.bar_recv_cnt += queue_status->bar_rcvd_cnt;
  4397. qdf_atomic_set(&(pdev->stats_cmd_complete), 1);
  4398. }
  4399. /**
  4400. * dp_aggregate_vdev_stats(): Consolidate stats at VDEV level
  4401. * @vdev: DP VDEV handle
  4402. *
  4403. * return: void
  4404. */
  4405. void dp_aggregate_vdev_stats(struct dp_vdev *vdev)
  4406. {
  4407. struct dp_peer *peer = NULL;
  4408. struct dp_soc *soc = vdev->pdev->soc;
  4409. qdf_mem_set(&(vdev->stats.tx), sizeof(vdev->stats.tx), 0x0);
  4410. qdf_mem_set(&(vdev->stats.rx), sizeof(vdev->stats.rx), 0x0);
  4411. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem)
  4412. DP_UPDATE_STATS(vdev, peer);
  4413. if (soc->cdp_soc.ol_ops->update_dp_stats)
  4414. soc->cdp_soc.ol_ops->update_dp_stats(vdev->pdev->ctrl_pdev,
  4415. &vdev->stats, (uint16_t) vdev->vdev_id,
  4416. UPDATE_VDEV_STATS);
  4417. }
  4418. /**
  4419. * dp_aggregate_pdev_stats(): Consolidate stats at PDEV level
  4420. * @pdev: DP PDEV handle
  4421. *
  4422. * return: void
  4423. */
  4424. static inline void dp_aggregate_pdev_stats(struct dp_pdev *pdev)
  4425. {
  4426. struct dp_vdev *vdev = NULL;
  4427. struct dp_soc *soc = pdev->soc;
  4428. qdf_mem_set(&(pdev->stats.tx), sizeof(pdev->stats.tx), 0x0);
  4429. qdf_mem_set(&(pdev->stats.rx), sizeof(pdev->stats.rx), 0x0);
  4430. qdf_mem_set(&(pdev->stats.tx_i), sizeof(pdev->stats.tx_i), 0x0);
  4431. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  4432. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  4433. dp_aggregate_vdev_stats(vdev);
  4434. DP_UPDATE_STATS(pdev, vdev);
  4435. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.nawds_mcast);
  4436. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.rcvd);
  4437. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.processed);
  4438. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.reinject_pkts);
  4439. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.inspect_pkts);
  4440. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.raw.raw_pkt);
  4441. DP_STATS_AGGR(pdev, vdev, tx_i.raw.dma_map_error);
  4442. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.tso.tso_pkt);
  4443. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_host.num);
  4444. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_target);
  4445. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_host.num);
  4446. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_target);
  4447. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.sg.sg_pkt);
  4448. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.mcast_en.mcast_pkt);
  4449. DP_STATS_AGGR(pdev, vdev,
  4450. tx_i.mcast_en.dropped_map_error);
  4451. DP_STATS_AGGR(pdev, vdev,
  4452. tx_i.mcast_en.dropped_self_mac);
  4453. DP_STATS_AGGR(pdev, vdev,
  4454. tx_i.mcast_en.dropped_send_fail);
  4455. DP_STATS_AGGR(pdev, vdev, tx_i.mcast_en.ucast);
  4456. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.dma_error);
  4457. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.ring_full);
  4458. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.enqueue_fail);
  4459. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.desc_na.num);
  4460. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.res_full);
  4461. DP_STATS_AGGR(pdev, vdev, tx_i.cce_classified);
  4462. DP_STATS_AGGR(pdev, vdev, tx_i.cce_classified_raw);
  4463. DP_STATS_AGGR(pdev, vdev, tx_i.mesh.exception_fw);
  4464. DP_STATS_AGGR(pdev, vdev, tx_i.mesh.completion_fw);
  4465. pdev->stats.tx_i.dropped.dropped_pkt.num =
  4466. pdev->stats.tx_i.dropped.dma_error +
  4467. pdev->stats.tx_i.dropped.ring_full +
  4468. pdev->stats.tx_i.dropped.enqueue_fail +
  4469. pdev->stats.tx_i.dropped.desc_na.num +
  4470. pdev->stats.tx_i.dropped.res_full;
  4471. pdev->stats.tx.last_ack_rssi =
  4472. vdev->stats.tx.last_ack_rssi;
  4473. pdev->stats.tx_i.tso.num_seg =
  4474. vdev->stats.tx_i.tso.num_seg;
  4475. }
  4476. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  4477. if (soc->cdp_soc.ol_ops->update_dp_stats)
  4478. soc->cdp_soc.ol_ops->update_dp_stats(pdev->ctrl_pdev,
  4479. &pdev->stats, pdev->pdev_id, UPDATE_PDEV_STATS);
  4480. }
  4481. /**
  4482. * dp_vdev_getstats() - get vdev packet level stats
  4483. * @vdev_handle: Datapath VDEV handle
  4484. * @stats: cdp network device stats structure
  4485. *
  4486. * Return: void
  4487. */
  4488. static void dp_vdev_getstats(void *vdev_handle,
  4489. struct cdp_dev_stats *stats)
  4490. {
  4491. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4492. dp_aggregate_vdev_stats(vdev);
  4493. }
  4494. /**
  4495. * dp_pdev_getstats() - get pdev packet level stats
  4496. * @pdev_handle: Datapath PDEV handle
  4497. * @stats: cdp network device stats structure
  4498. *
  4499. * Return: void
  4500. */
  4501. static void dp_pdev_getstats(void *pdev_handle,
  4502. struct cdp_dev_stats *stats)
  4503. {
  4504. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4505. dp_aggregate_pdev_stats(pdev);
  4506. stats->tx_packets = pdev->stats.tx_i.rcvd.num;
  4507. stats->tx_bytes = pdev->stats.tx_i.rcvd.bytes;
  4508. stats->tx_errors = pdev->stats.tx.tx_failed +
  4509. pdev->stats.tx_i.dropped.dropped_pkt.num;
  4510. stats->tx_dropped = stats->tx_errors;
  4511. stats->rx_packets = pdev->stats.rx.unicast.num +
  4512. pdev->stats.rx.multicast.num +
  4513. pdev->stats.rx.bcast.num;
  4514. stats->rx_bytes = pdev->stats.rx.unicast.bytes +
  4515. pdev->stats.rx.multicast.bytes +
  4516. pdev->stats.rx.bcast.bytes;
  4517. }
  4518. /**
  4519. * dp_get_device_stats() - get interface level packet stats
  4520. * @handle: device handle
  4521. * @stats: cdp network device stats structure
  4522. * @type: device type pdev/vdev
  4523. *
  4524. * Return: void
  4525. */
  4526. static void dp_get_device_stats(void *handle,
  4527. struct cdp_dev_stats *stats, uint8_t type)
  4528. {
  4529. switch (type) {
  4530. case UPDATE_VDEV_STATS:
  4531. dp_vdev_getstats(handle, stats);
  4532. break;
  4533. case UPDATE_PDEV_STATS:
  4534. dp_pdev_getstats(handle, stats);
  4535. break;
  4536. default:
  4537. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  4538. "apstats cannot be updated for this input "
  4539. "type %d\n", type);
  4540. break;
  4541. }
  4542. }
  4543. /**
  4544. * dp_print_pdev_tx_stats(): Print Pdev level TX stats
  4545. * @pdev: DP_PDEV Handle
  4546. *
  4547. * Return:void
  4548. */
  4549. static inline void
  4550. dp_print_pdev_tx_stats(struct dp_pdev *pdev)
  4551. {
  4552. uint8_t index = 0;
  4553. DP_PRINT_STATS("PDEV Tx Stats:\n");
  4554. DP_PRINT_STATS("Received From Stack:");
  4555. DP_PRINT_STATS(" Packets = %d",
  4556. pdev->stats.tx_i.rcvd.num);
  4557. DP_PRINT_STATS(" Bytes = %llu",
  4558. pdev->stats.tx_i.rcvd.bytes);
  4559. DP_PRINT_STATS("Processed:");
  4560. DP_PRINT_STATS(" Packets = %d",
  4561. pdev->stats.tx_i.processed.num);
  4562. DP_PRINT_STATS(" Bytes = %llu",
  4563. pdev->stats.tx_i.processed.bytes);
  4564. DP_PRINT_STATS("Total Completions:");
  4565. DP_PRINT_STATS(" Packets = %u",
  4566. pdev->stats.tx.comp_pkt.num);
  4567. DP_PRINT_STATS(" Bytes = %llu",
  4568. pdev->stats.tx.comp_pkt.bytes);
  4569. DP_PRINT_STATS("Successful Completions:");
  4570. DP_PRINT_STATS(" Packets = %u",
  4571. pdev->stats.tx.tx_success.num);
  4572. DP_PRINT_STATS(" Bytes = %llu",
  4573. pdev->stats.tx.tx_success.bytes);
  4574. DP_PRINT_STATS("Dropped:");
  4575. DP_PRINT_STATS(" Total = %d",
  4576. pdev->stats.tx_i.dropped.dropped_pkt.num);
  4577. DP_PRINT_STATS(" Dma_map_error = %d",
  4578. pdev->stats.tx_i.dropped.dma_error);
  4579. DP_PRINT_STATS(" Ring Full = %d",
  4580. pdev->stats.tx_i.dropped.ring_full);
  4581. DP_PRINT_STATS(" Descriptor Not available = %d",
  4582. pdev->stats.tx_i.dropped.desc_na.num);
  4583. DP_PRINT_STATS(" HW enqueue failed= %d",
  4584. pdev->stats.tx_i.dropped.enqueue_fail);
  4585. DP_PRINT_STATS(" Resources Full = %d",
  4586. pdev->stats.tx_i.dropped.res_full);
  4587. DP_PRINT_STATS(" FW removed = %d",
  4588. pdev->stats.tx.dropped.fw_rem);
  4589. DP_PRINT_STATS(" FW removed transmitted = %d",
  4590. pdev->stats.tx.dropped.fw_rem_tx);
  4591. DP_PRINT_STATS(" FW removed untransmitted = %d",
  4592. pdev->stats.tx.dropped.fw_rem_notx);
  4593. DP_PRINT_STATS(" FW removed untransmitted fw_reason1 = %d",
  4594. pdev->stats.tx.dropped.fw_reason1);
  4595. DP_PRINT_STATS(" FW removed untransmitted fw_reason2 = %d",
  4596. pdev->stats.tx.dropped.fw_reason2);
  4597. DP_PRINT_STATS(" FW removed untransmitted fw_reason3 = %d",
  4598. pdev->stats.tx.dropped.fw_reason3);
  4599. DP_PRINT_STATS(" Aged Out from msdu/mpdu queues = %d",
  4600. pdev->stats.tx.dropped.age_out);
  4601. DP_PRINT_STATS(" Multicast:");
  4602. DP_PRINT_STATS(" Packets: %u",
  4603. pdev->stats.tx.mcast.num);
  4604. DP_PRINT_STATS(" Bytes: %llu",
  4605. pdev->stats.tx.mcast.bytes);
  4606. DP_PRINT_STATS("Scatter Gather:");
  4607. DP_PRINT_STATS(" Packets = %d",
  4608. pdev->stats.tx_i.sg.sg_pkt.num);
  4609. DP_PRINT_STATS(" Bytes = %llu",
  4610. pdev->stats.tx_i.sg.sg_pkt.bytes);
  4611. DP_PRINT_STATS(" Dropped By Host = %d",
  4612. pdev->stats.tx_i.sg.dropped_host.num);
  4613. DP_PRINT_STATS(" Dropped By Target = %d",
  4614. pdev->stats.tx_i.sg.dropped_target);
  4615. DP_PRINT_STATS("TSO:");
  4616. DP_PRINT_STATS(" Number of Segments = %d",
  4617. pdev->stats.tx_i.tso.num_seg);
  4618. DP_PRINT_STATS(" Packets = %d",
  4619. pdev->stats.tx_i.tso.tso_pkt.num);
  4620. DP_PRINT_STATS(" Bytes = %llu",
  4621. pdev->stats.tx_i.tso.tso_pkt.bytes);
  4622. DP_PRINT_STATS(" Dropped By Host = %d",
  4623. pdev->stats.tx_i.tso.dropped_host.num);
  4624. DP_PRINT_STATS("Mcast Enhancement:");
  4625. DP_PRINT_STATS(" Packets = %d",
  4626. pdev->stats.tx_i.mcast_en.mcast_pkt.num);
  4627. DP_PRINT_STATS(" Bytes = %llu",
  4628. pdev->stats.tx_i.mcast_en.mcast_pkt.bytes);
  4629. DP_PRINT_STATS(" Dropped: Map Errors = %d",
  4630. pdev->stats.tx_i.mcast_en.dropped_map_error);
  4631. DP_PRINT_STATS(" Dropped: Self Mac = %d",
  4632. pdev->stats.tx_i.mcast_en.dropped_self_mac);
  4633. DP_PRINT_STATS(" Dropped: Send Fail = %d",
  4634. pdev->stats.tx_i.mcast_en.dropped_send_fail);
  4635. DP_PRINT_STATS(" Unicast sent = %d",
  4636. pdev->stats.tx_i.mcast_en.ucast);
  4637. DP_PRINT_STATS("Raw:");
  4638. DP_PRINT_STATS(" Packets = %d",
  4639. pdev->stats.tx_i.raw.raw_pkt.num);
  4640. DP_PRINT_STATS(" Bytes = %llu",
  4641. pdev->stats.tx_i.raw.raw_pkt.bytes);
  4642. DP_PRINT_STATS(" DMA map error = %d",
  4643. pdev->stats.tx_i.raw.dma_map_error);
  4644. DP_PRINT_STATS("Reinjected:");
  4645. DP_PRINT_STATS(" Packets = %d",
  4646. pdev->stats.tx_i.reinject_pkts.num);
  4647. DP_PRINT_STATS(" Bytes = %llu\n",
  4648. pdev->stats.tx_i.reinject_pkts.bytes);
  4649. DP_PRINT_STATS("Inspected:");
  4650. DP_PRINT_STATS(" Packets = %d",
  4651. pdev->stats.tx_i.inspect_pkts.num);
  4652. DP_PRINT_STATS(" Bytes = %llu",
  4653. pdev->stats.tx_i.inspect_pkts.bytes);
  4654. DP_PRINT_STATS("Nawds Multicast:");
  4655. DP_PRINT_STATS(" Packets = %d",
  4656. pdev->stats.tx_i.nawds_mcast.num);
  4657. DP_PRINT_STATS(" Bytes = %llu",
  4658. pdev->stats.tx_i.nawds_mcast.bytes);
  4659. DP_PRINT_STATS("CCE Classified:");
  4660. DP_PRINT_STATS(" CCE Classified Packets: %u",
  4661. pdev->stats.tx_i.cce_classified);
  4662. DP_PRINT_STATS(" RAW CCE Classified Packets: %u",
  4663. pdev->stats.tx_i.cce_classified_raw);
  4664. DP_PRINT_STATS("Mesh stats:");
  4665. DP_PRINT_STATS(" frames to firmware: %u",
  4666. pdev->stats.tx_i.mesh.exception_fw);
  4667. DP_PRINT_STATS(" completions from fw: %u",
  4668. pdev->stats.tx_i.mesh.completion_fw);
  4669. DP_PRINT_STATS("PPDU stats counter");
  4670. for (index = 0; index < CDP_PPDU_STATS_MAX_TAG; index++) {
  4671. DP_PRINT_STATS(" Tag[%d] = %llu", index,
  4672. pdev->stats.ppdu_stats_counter[index]);
  4673. }
  4674. }
  4675. /**
  4676. * dp_print_pdev_rx_stats(): Print Pdev level RX stats
  4677. * @pdev: DP_PDEV Handle
  4678. *
  4679. * Return: void
  4680. */
  4681. static inline void
  4682. dp_print_pdev_rx_stats(struct dp_pdev *pdev)
  4683. {
  4684. DP_PRINT_STATS("PDEV Rx Stats:\n");
  4685. DP_PRINT_STATS("Received From HW (Per Rx Ring):");
  4686. DP_PRINT_STATS(" Packets = %d %d %d %d",
  4687. pdev->stats.rx.rcvd_reo[0].num,
  4688. pdev->stats.rx.rcvd_reo[1].num,
  4689. pdev->stats.rx.rcvd_reo[2].num,
  4690. pdev->stats.rx.rcvd_reo[3].num);
  4691. DP_PRINT_STATS(" Bytes = %llu %llu %llu %llu",
  4692. pdev->stats.rx.rcvd_reo[0].bytes,
  4693. pdev->stats.rx.rcvd_reo[1].bytes,
  4694. pdev->stats.rx.rcvd_reo[2].bytes,
  4695. pdev->stats.rx.rcvd_reo[3].bytes);
  4696. DP_PRINT_STATS("Replenished:");
  4697. DP_PRINT_STATS(" Packets = %d",
  4698. pdev->stats.replenish.pkts.num);
  4699. DP_PRINT_STATS(" Bytes = %llu",
  4700. pdev->stats.replenish.pkts.bytes);
  4701. DP_PRINT_STATS(" Buffers Added To Freelist = %d",
  4702. pdev->stats.buf_freelist);
  4703. DP_PRINT_STATS(" Low threshold intr = %d",
  4704. pdev->stats.replenish.low_thresh_intrs);
  4705. DP_PRINT_STATS("Dropped:");
  4706. DP_PRINT_STATS(" msdu_not_done = %d",
  4707. pdev->stats.dropped.msdu_not_done);
  4708. DP_PRINT_STATS(" mon_rx_drop = %d",
  4709. pdev->stats.dropped.mon_rx_drop);
  4710. DP_PRINT_STATS("Sent To Stack:");
  4711. DP_PRINT_STATS(" Packets = %d",
  4712. pdev->stats.rx.to_stack.num);
  4713. DP_PRINT_STATS(" Bytes = %llu",
  4714. pdev->stats.rx.to_stack.bytes);
  4715. DP_PRINT_STATS("Multicast/Broadcast:");
  4716. DP_PRINT_STATS(" Packets = %d",
  4717. (pdev->stats.rx.multicast.num +
  4718. pdev->stats.rx.bcast.num));
  4719. DP_PRINT_STATS(" Bytes = %llu",
  4720. (pdev->stats.rx.multicast.bytes +
  4721. pdev->stats.rx.bcast.bytes));
  4722. DP_PRINT_STATS("Errors:");
  4723. DP_PRINT_STATS(" Rxdma Ring Un-inititalized = %d",
  4724. pdev->stats.replenish.rxdma_err);
  4725. DP_PRINT_STATS(" Desc Alloc Failed: = %d",
  4726. pdev->stats.err.desc_alloc_fail);
  4727. DP_PRINT_STATS(" IP checksum error = %d",
  4728. pdev->stats.err.ip_csum_err);
  4729. DP_PRINT_STATS(" TCP/UDP checksum error = %d",
  4730. pdev->stats.err.tcp_udp_csum_err);
  4731. /* Get bar_recv_cnt */
  4732. dp_aggregate_pdev_ctrl_frames_stats(pdev);
  4733. DP_PRINT_STATS("BAR Received Count: = %d",
  4734. pdev->stats.rx.bar_recv_cnt);
  4735. }
  4736. /**
  4737. * dp_print_pdev_rx_mon_stats(): Print Pdev level RX monitor stats
  4738. * @pdev: DP_PDEV Handle
  4739. *
  4740. * Return: void
  4741. */
  4742. static inline void
  4743. dp_print_pdev_rx_mon_stats(struct dp_pdev *pdev)
  4744. {
  4745. struct cdp_pdev_mon_stats *rx_mon_stats;
  4746. rx_mon_stats = &pdev->rx_mon_stats;
  4747. DP_PRINT_STATS("PDEV Rx Monitor Stats:\n");
  4748. dp_rx_mon_print_dbg_ppdu_stats(rx_mon_stats);
  4749. DP_PRINT_STATS("status_ppdu_done_cnt = %d",
  4750. rx_mon_stats->status_ppdu_done);
  4751. DP_PRINT_STATS("dest_ppdu_done_cnt = %d",
  4752. rx_mon_stats->dest_ppdu_done);
  4753. DP_PRINT_STATS("dest_mpdu_done_cnt = %d",
  4754. rx_mon_stats->dest_mpdu_done);
  4755. DP_PRINT_STATS("dest_mpdu_drop_cnt = %d",
  4756. rx_mon_stats->dest_mpdu_drop);
  4757. }
  4758. /**
  4759. * dp_print_soc_tx_stats(): Print SOC level stats
  4760. * @soc DP_SOC Handle
  4761. *
  4762. * Return: void
  4763. */
  4764. static inline void
  4765. dp_print_soc_tx_stats(struct dp_soc *soc)
  4766. {
  4767. uint8_t desc_pool_id;
  4768. soc->stats.tx.desc_in_use = 0;
  4769. DP_PRINT_STATS("SOC Tx Stats:\n");
  4770. for (desc_pool_id = 0;
  4771. desc_pool_id < wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  4772. desc_pool_id++)
  4773. soc->stats.tx.desc_in_use +=
  4774. soc->tx_desc[desc_pool_id].num_allocated;
  4775. DP_PRINT_STATS("Tx Descriptors In Use = %d",
  4776. soc->stats.tx.desc_in_use);
  4777. DP_PRINT_STATS("Invalid peer:");
  4778. DP_PRINT_STATS(" Packets = %d",
  4779. soc->stats.tx.tx_invalid_peer.num);
  4780. DP_PRINT_STATS(" Bytes = %llu",
  4781. soc->stats.tx.tx_invalid_peer.bytes);
  4782. DP_PRINT_STATS("Packets dropped due to TCL ring full = %d %d %d",
  4783. soc->stats.tx.tcl_ring_full[0],
  4784. soc->stats.tx.tcl_ring_full[1],
  4785. soc->stats.tx.tcl_ring_full[2]);
  4786. }
  4787. /**
  4788. * dp_print_soc_rx_stats: Print SOC level Rx stats
  4789. * @soc: DP_SOC Handle
  4790. *
  4791. * Return:void
  4792. */
  4793. static inline void
  4794. dp_print_soc_rx_stats(struct dp_soc *soc)
  4795. {
  4796. uint32_t i;
  4797. char reo_error[DP_REO_ERR_LENGTH];
  4798. char rxdma_error[DP_RXDMA_ERR_LENGTH];
  4799. uint8_t index = 0;
  4800. DP_PRINT_STATS("SOC Rx Stats:\n");
  4801. DP_PRINT_STATS("Errors:\n");
  4802. DP_PRINT_STATS("Rx Decrypt Errors = %d",
  4803. (soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_DECRYPT] +
  4804. soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_TKIP_MIC]));
  4805. DP_PRINT_STATS("Invalid RBM = %d",
  4806. soc->stats.rx.err.invalid_rbm);
  4807. DP_PRINT_STATS("Invalid Vdev = %d",
  4808. soc->stats.rx.err.invalid_vdev);
  4809. DP_PRINT_STATS("Invalid Pdev = %d",
  4810. soc->stats.rx.err.invalid_pdev);
  4811. DP_PRINT_STATS("Invalid Peer = %d",
  4812. soc->stats.rx.err.rx_invalid_peer.num);
  4813. DP_PRINT_STATS("HAL Ring Access Fail = %d",
  4814. soc->stats.rx.err.hal_ring_access_fail);
  4815. for (i = 0; i < HAL_RXDMA_ERR_MAX; i++) {
  4816. index += qdf_snprint(&rxdma_error[index],
  4817. DP_RXDMA_ERR_LENGTH - index,
  4818. " %d", soc->stats.rx.err.rxdma_error[i]);
  4819. }
  4820. DP_PRINT_STATS("RXDMA Error (0-31):%s",
  4821. rxdma_error);
  4822. index = 0;
  4823. for (i = 0; i < HAL_REO_ERR_MAX; i++) {
  4824. index += qdf_snprint(&reo_error[index],
  4825. DP_REO_ERR_LENGTH - index,
  4826. " %d", soc->stats.rx.err.reo_error[i]);
  4827. }
  4828. DP_PRINT_STATS("REO Error(0-14):%s",
  4829. reo_error);
  4830. }
  4831. /**
  4832. * dp_print_ring_stat_from_hal(): Print hal level ring stats
  4833. * @soc: DP_SOC handle
  4834. * @srng: DP_SRNG handle
  4835. * @ring_name: SRNG name
  4836. *
  4837. * Return: void
  4838. */
  4839. static inline void
  4840. dp_print_ring_stat_from_hal(struct dp_soc *soc, struct dp_srng *srng,
  4841. char *ring_name)
  4842. {
  4843. uint32_t tailp;
  4844. uint32_t headp;
  4845. if (srng->hal_srng != NULL) {
  4846. hal_api_get_tphp(soc->hal_soc, srng->hal_srng, &tailp, &headp);
  4847. DP_PRINT_STATS("%s : Head pointer = %d Tail Pointer = %d\n",
  4848. ring_name, headp, tailp);
  4849. }
  4850. }
  4851. /**
  4852. * dp_print_ring_stats(): Print tail and head pointer
  4853. * @pdev: DP_PDEV handle
  4854. *
  4855. * Return:void
  4856. */
  4857. static inline void
  4858. dp_print_ring_stats(struct dp_pdev *pdev)
  4859. {
  4860. uint32_t i;
  4861. char ring_name[STR_MAXLEN + 1];
  4862. int mac_id;
  4863. dp_print_ring_stat_from_hal(pdev->soc,
  4864. &pdev->soc->reo_exception_ring,
  4865. "Reo Exception Ring");
  4866. dp_print_ring_stat_from_hal(pdev->soc,
  4867. &pdev->soc->reo_reinject_ring,
  4868. "Reo Inject Ring");
  4869. dp_print_ring_stat_from_hal(pdev->soc,
  4870. &pdev->soc->reo_cmd_ring,
  4871. "Reo Command Ring");
  4872. dp_print_ring_stat_from_hal(pdev->soc,
  4873. &pdev->soc->reo_status_ring,
  4874. "Reo Status Ring");
  4875. dp_print_ring_stat_from_hal(pdev->soc,
  4876. &pdev->soc->rx_rel_ring,
  4877. "Rx Release ring");
  4878. dp_print_ring_stat_from_hal(pdev->soc,
  4879. &pdev->soc->tcl_cmd_ring,
  4880. "Tcl command Ring");
  4881. dp_print_ring_stat_from_hal(pdev->soc,
  4882. &pdev->soc->tcl_status_ring,
  4883. "Tcl Status Ring");
  4884. dp_print_ring_stat_from_hal(pdev->soc,
  4885. &pdev->soc->wbm_desc_rel_ring,
  4886. "Wbm Desc Rel Ring");
  4887. for (i = 0; i < MAX_REO_DEST_RINGS; i++) {
  4888. snprintf(ring_name, STR_MAXLEN, "Reo Dest Ring %d", i);
  4889. dp_print_ring_stat_from_hal(pdev->soc,
  4890. &pdev->soc->reo_dest_ring[i],
  4891. ring_name);
  4892. }
  4893. for (i = 0; i < pdev->soc->num_tcl_data_rings; i++) {
  4894. snprintf(ring_name, STR_MAXLEN, "Tcl Data Ring %d", i);
  4895. dp_print_ring_stat_from_hal(pdev->soc,
  4896. &pdev->soc->tcl_data_ring[i],
  4897. ring_name);
  4898. }
  4899. for (i = 0; i < MAX_TCL_DATA_RINGS; i++) {
  4900. snprintf(ring_name, STR_MAXLEN, "Tx Comp Ring %d", i);
  4901. dp_print_ring_stat_from_hal(pdev->soc,
  4902. &pdev->soc->tx_comp_ring[i],
  4903. ring_name);
  4904. }
  4905. dp_print_ring_stat_from_hal(pdev->soc,
  4906. &pdev->rx_refill_buf_ring,
  4907. "Rx Refill Buf Ring");
  4908. dp_print_ring_stat_from_hal(pdev->soc,
  4909. &pdev->rx_refill_buf_ring2,
  4910. "Second Rx Refill Buf Ring");
  4911. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4912. dp_print_ring_stat_from_hal(pdev->soc,
  4913. &pdev->rxdma_mon_buf_ring[mac_id],
  4914. "Rxdma Mon Buf Ring");
  4915. dp_print_ring_stat_from_hal(pdev->soc,
  4916. &pdev->rxdma_mon_dst_ring[mac_id],
  4917. "Rxdma Mon Dst Ring");
  4918. dp_print_ring_stat_from_hal(pdev->soc,
  4919. &pdev->rxdma_mon_status_ring[mac_id],
  4920. "Rxdma Mon Status Ring");
  4921. dp_print_ring_stat_from_hal(pdev->soc,
  4922. &pdev->rxdma_mon_desc_ring[mac_id],
  4923. "Rxdma mon desc Ring");
  4924. }
  4925. for (i = 0; i < NUM_RXDMA_RINGS_PER_PDEV; i++) {
  4926. snprintf(ring_name, STR_MAXLEN, "Rxdma err dst ring %d", i);
  4927. dp_print_ring_stat_from_hal(pdev->soc,
  4928. &pdev->rxdma_err_dst_ring[i],
  4929. ring_name);
  4930. }
  4931. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  4932. snprintf(ring_name, STR_MAXLEN, "Rx mac buf ring %d", i);
  4933. dp_print_ring_stat_from_hal(pdev->soc,
  4934. &pdev->rx_mac_buf_ring[i],
  4935. ring_name);
  4936. }
  4937. }
  4938. /**
  4939. * dp_txrx_host_stats_clr(): Reinitialize the txrx stats
  4940. * @vdev: DP_VDEV handle
  4941. *
  4942. * Return:void
  4943. */
  4944. static inline void
  4945. dp_txrx_host_stats_clr(struct dp_vdev *vdev)
  4946. {
  4947. struct dp_peer *peer = NULL;
  4948. struct dp_soc *soc = (struct dp_soc *)vdev->pdev->soc;
  4949. DP_STATS_CLR(vdev->pdev);
  4950. DP_STATS_CLR(vdev->pdev->soc);
  4951. DP_STATS_CLR(vdev);
  4952. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  4953. if (!peer)
  4954. return;
  4955. DP_STATS_CLR(peer);
  4956. if (soc->cdp_soc.ol_ops->update_dp_stats) {
  4957. soc->cdp_soc.ol_ops->update_dp_stats(
  4958. vdev->pdev->ctrl_pdev,
  4959. &peer->stats,
  4960. peer->peer_ids[0],
  4961. UPDATE_PEER_STATS);
  4962. }
  4963. }
  4964. if (soc->cdp_soc.ol_ops->update_dp_stats)
  4965. soc->cdp_soc.ol_ops->update_dp_stats(vdev->pdev->ctrl_pdev,
  4966. &vdev->stats, (uint16_t)vdev->vdev_id,
  4967. UPDATE_VDEV_STATS);
  4968. }
  4969. /**
  4970. * dp_print_rx_rates(): Print Rx rate stats
  4971. * @vdev: DP_VDEV handle
  4972. *
  4973. * Return:void
  4974. */
  4975. static inline void
  4976. dp_print_rx_rates(struct dp_vdev *vdev)
  4977. {
  4978. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  4979. uint8_t i, mcs, pkt_type;
  4980. uint8_t index = 0;
  4981. char nss[DP_NSS_LENGTH];
  4982. DP_PRINT_STATS("Rx Rate Info:\n");
  4983. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4984. index = 0;
  4985. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4986. if (!dp_rate_string[pkt_type][mcs].valid)
  4987. continue;
  4988. DP_PRINT_STATS(" %s = %d",
  4989. dp_rate_string[pkt_type][mcs].mcs_type,
  4990. pdev->stats.rx.pkt_type[pkt_type].
  4991. mcs_count[mcs]);
  4992. }
  4993. DP_PRINT_STATS("\n");
  4994. }
  4995. index = 0;
  4996. for (i = 0; i < SS_COUNT; i++) {
  4997. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  4998. " %d", pdev->stats.rx.nss[i]);
  4999. }
  5000. DP_PRINT_STATS("NSS(1-8) = %s",
  5001. nss);
  5002. DP_PRINT_STATS("SGI ="
  5003. " 0.8us %d,"
  5004. " 0.4us %d,"
  5005. " 1.6us %d,"
  5006. " 3.2us %d,",
  5007. pdev->stats.rx.sgi_count[0],
  5008. pdev->stats.rx.sgi_count[1],
  5009. pdev->stats.rx.sgi_count[2],
  5010. pdev->stats.rx.sgi_count[3]);
  5011. DP_PRINT_STATS("BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  5012. pdev->stats.rx.bw[0], pdev->stats.rx.bw[1],
  5013. pdev->stats.rx.bw[2], pdev->stats.rx.bw[3]);
  5014. DP_PRINT_STATS("Reception Type ="
  5015. " SU: %d,"
  5016. " MU_MIMO:%d,"
  5017. " MU_OFDMA:%d,"
  5018. " MU_OFDMA_MIMO:%d\n",
  5019. pdev->stats.rx.reception_type[0],
  5020. pdev->stats.rx.reception_type[1],
  5021. pdev->stats.rx.reception_type[2],
  5022. pdev->stats.rx.reception_type[3]);
  5023. DP_PRINT_STATS("Aggregation:\n");
  5024. DP_PRINT_STATS("Number of Msdu's Part of Ampdus = %d",
  5025. pdev->stats.rx.ampdu_cnt);
  5026. DP_PRINT_STATS("Number of Msdu's With No Mpdu Level Aggregation : %d",
  5027. pdev->stats.rx.non_ampdu_cnt);
  5028. DP_PRINT_STATS("Number of Msdu's Part of Amsdu: %d",
  5029. pdev->stats.rx.amsdu_cnt);
  5030. DP_PRINT_STATS("Number of Msdu's With No Msdu Level Aggregation: %d",
  5031. pdev->stats.rx.non_amsdu_cnt);
  5032. }
  5033. /**
  5034. * dp_print_tx_rates(): Print tx rates
  5035. * @vdev: DP_VDEV handle
  5036. *
  5037. * Return:void
  5038. */
  5039. static inline void
  5040. dp_print_tx_rates(struct dp_vdev *vdev)
  5041. {
  5042. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  5043. uint8_t mcs, pkt_type;
  5044. uint8_t index;
  5045. char nss[DP_NSS_LENGTH];
  5046. int nss_index;
  5047. DP_PRINT_STATS("Tx Rate Info:\n");
  5048. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  5049. index = 0;
  5050. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  5051. if (!dp_rate_string[pkt_type][mcs].valid)
  5052. continue;
  5053. DP_PRINT_STATS(" %s = %d",
  5054. dp_rate_string[pkt_type][mcs].mcs_type,
  5055. pdev->stats.tx.pkt_type[pkt_type].
  5056. mcs_count[mcs]);
  5057. }
  5058. DP_PRINT_STATS("\n");
  5059. }
  5060. DP_PRINT_STATS("SGI ="
  5061. " 0.8us %d"
  5062. " 0.4us %d"
  5063. " 1.6us %d"
  5064. " 3.2us %d",
  5065. pdev->stats.tx.sgi_count[0],
  5066. pdev->stats.tx.sgi_count[1],
  5067. pdev->stats.tx.sgi_count[2],
  5068. pdev->stats.tx.sgi_count[3]);
  5069. DP_PRINT_STATS("BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  5070. pdev->stats.tx.bw[0], pdev->stats.tx.bw[1],
  5071. pdev->stats.tx.bw[2], pdev->stats.tx.bw[3]);
  5072. index = 0;
  5073. for (nss_index = 0; nss_index < SS_COUNT; nss_index++) {
  5074. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  5075. " %d", pdev->stats.tx.nss[nss_index]);
  5076. }
  5077. DP_PRINT_STATS("NSS(1-8) = %s", nss);
  5078. DP_PRINT_STATS("OFDMA = %d", pdev->stats.tx.ofdma);
  5079. DP_PRINT_STATS("STBC = %d", pdev->stats.tx.stbc);
  5080. DP_PRINT_STATS("LDPC = %d", pdev->stats.tx.ldpc);
  5081. DP_PRINT_STATS("Retries = %d", pdev->stats.tx.retries);
  5082. DP_PRINT_STATS("Last ack rssi = %d\n", pdev->stats.tx.last_ack_rssi);
  5083. DP_PRINT_STATS("Aggregation:\n");
  5084. DP_PRINT_STATS("Number of Msdu's Part of Amsdu = %d",
  5085. pdev->stats.tx.amsdu_cnt);
  5086. DP_PRINT_STATS("Number of Msdu's With No Msdu Level Aggregation = %d",
  5087. pdev->stats.tx.non_amsdu_cnt);
  5088. }
  5089. /**
  5090. * dp_print_peer_stats():print peer stats
  5091. * @peer: DP_PEER handle
  5092. *
  5093. * return void
  5094. */
  5095. static inline void dp_print_peer_stats(struct dp_peer *peer)
  5096. {
  5097. uint8_t i, mcs, pkt_type;
  5098. uint32_t index;
  5099. char nss[DP_NSS_LENGTH];
  5100. DP_PRINT_STATS("Node Tx Stats:\n");
  5101. DP_PRINT_STATS("Total Packet Completions = %d",
  5102. peer->stats.tx.comp_pkt.num);
  5103. DP_PRINT_STATS("Total Bytes Completions = %llu",
  5104. peer->stats.tx.comp_pkt.bytes);
  5105. DP_PRINT_STATS("Success Packets = %d",
  5106. peer->stats.tx.tx_success.num);
  5107. DP_PRINT_STATS("Success Bytes = %llu",
  5108. peer->stats.tx.tx_success.bytes);
  5109. DP_PRINT_STATS("Unicast Success Packets = %d",
  5110. peer->stats.tx.ucast.num);
  5111. DP_PRINT_STATS("Unicast Success Bytes = %llu",
  5112. peer->stats.tx.ucast.bytes);
  5113. DP_PRINT_STATS("Multicast Success Packets = %d",
  5114. peer->stats.tx.mcast.num);
  5115. DP_PRINT_STATS("Multicast Success Bytes = %llu",
  5116. peer->stats.tx.mcast.bytes);
  5117. DP_PRINT_STATS("Broadcast Success Packets = %d",
  5118. peer->stats.tx.bcast.num);
  5119. DP_PRINT_STATS("Broadcast Success Bytes = %llu",
  5120. peer->stats.tx.bcast.bytes);
  5121. DP_PRINT_STATS("Packets Failed = %d",
  5122. peer->stats.tx.tx_failed);
  5123. DP_PRINT_STATS("Packets In OFDMA = %d",
  5124. peer->stats.tx.ofdma);
  5125. DP_PRINT_STATS("Packets In STBC = %d",
  5126. peer->stats.tx.stbc);
  5127. DP_PRINT_STATS("Packets In LDPC = %d",
  5128. peer->stats.tx.ldpc);
  5129. DP_PRINT_STATS("Packet Retries = %d",
  5130. peer->stats.tx.retries);
  5131. DP_PRINT_STATS("MSDU's Part of AMSDU = %d",
  5132. peer->stats.tx.amsdu_cnt);
  5133. DP_PRINT_STATS("Last Packet RSSI = %d",
  5134. peer->stats.tx.last_ack_rssi);
  5135. DP_PRINT_STATS("Dropped At FW: Removed = %d",
  5136. peer->stats.tx.dropped.fw_rem);
  5137. DP_PRINT_STATS("Dropped At FW: Removed transmitted = %d",
  5138. peer->stats.tx.dropped.fw_rem_tx);
  5139. DP_PRINT_STATS("Dropped At FW: Removed Untransmitted = %d",
  5140. peer->stats.tx.dropped.fw_rem_notx);
  5141. DP_PRINT_STATS("Dropped : Age Out = %d",
  5142. peer->stats.tx.dropped.age_out);
  5143. DP_PRINT_STATS("NAWDS : ");
  5144. DP_PRINT_STATS(" Nawds multicast Drop Tx Packet = %d",
  5145. peer->stats.tx.nawds_mcast_drop);
  5146. DP_PRINT_STATS(" Nawds multicast Tx Packet Count = %d",
  5147. peer->stats.tx.nawds_mcast.num);
  5148. DP_PRINT_STATS(" Nawds multicast Tx Packet Bytes = %llu",
  5149. peer->stats.tx.nawds_mcast.bytes);
  5150. DP_PRINT_STATS("Rate Info:");
  5151. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  5152. index = 0;
  5153. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  5154. if (!dp_rate_string[pkt_type][mcs].valid)
  5155. continue;
  5156. DP_PRINT_STATS(" %s = %d",
  5157. dp_rate_string[pkt_type][mcs].mcs_type,
  5158. peer->stats.tx.pkt_type[pkt_type].
  5159. mcs_count[mcs]);
  5160. }
  5161. DP_PRINT_STATS("\n");
  5162. }
  5163. DP_PRINT_STATS("SGI = "
  5164. " 0.8us %d"
  5165. " 0.4us %d"
  5166. " 1.6us %d"
  5167. " 3.2us %d",
  5168. peer->stats.tx.sgi_count[0],
  5169. peer->stats.tx.sgi_count[1],
  5170. peer->stats.tx.sgi_count[2],
  5171. peer->stats.tx.sgi_count[3]);
  5172. DP_PRINT_STATS("Excess Retries per AC ");
  5173. DP_PRINT_STATS(" Best effort = %d",
  5174. peer->stats.tx.excess_retries_per_ac[0]);
  5175. DP_PRINT_STATS(" Background= %d",
  5176. peer->stats.tx.excess_retries_per_ac[1]);
  5177. DP_PRINT_STATS(" Video = %d",
  5178. peer->stats.tx.excess_retries_per_ac[2]);
  5179. DP_PRINT_STATS(" Voice = %d",
  5180. peer->stats.tx.excess_retries_per_ac[3]);
  5181. DP_PRINT_STATS("BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d\n",
  5182. peer->stats.tx.bw[2], peer->stats.tx.bw[3],
  5183. peer->stats.tx.bw[4], peer->stats.tx.bw[5]);
  5184. index = 0;
  5185. for (i = 0; i < SS_COUNT; i++) {
  5186. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  5187. " %d", peer->stats.tx.nss[i]);
  5188. }
  5189. DP_PRINT_STATS("NSS(1-8) = %s",
  5190. nss);
  5191. DP_PRINT_STATS("Aggregation:");
  5192. DP_PRINT_STATS(" Number of Msdu's Part of Amsdu = %d",
  5193. peer->stats.tx.amsdu_cnt);
  5194. DP_PRINT_STATS(" Number of Msdu's With No Msdu Level Aggregation = %d\n",
  5195. peer->stats.tx.non_amsdu_cnt);
  5196. DP_PRINT_STATS("Node Rx Stats:");
  5197. DP_PRINT_STATS("Packets Sent To Stack = %d",
  5198. peer->stats.rx.to_stack.num);
  5199. DP_PRINT_STATS("Bytes Sent To Stack = %llu",
  5200. peer->stats.rx.to_stack.bytes);
  5201. for (i = 0; i < CDP_MAX_RX_RINGS; i++) {
  5202. DP_PRINT_STATS("Ring Id = %d", i);
  5203. DP_PRINT_STATS(" Packets Received = %d",
  5204. peer->stats.rx.rcvd_reo[i].num);
  5205. DP_PRINT_STATS(" Bytes Received = %llu",
  5206. peer->stats.rx.rcvd_reo[i].bytes);
  5207. }
  5208. DP_PRINT_STATS("Multicast Packets Received = %d",
  5209. peer->stats.rx.multicast.num);
  5210. DP_PRINT_STATS("Multicast Bytes Received = %llu",
  5211. peer->stats.rx.multicast.bytes);
  5212. DP_PRINT_STATS("Broadcast Packets Received = %d",
  5213. peer->stats.rx.bcast.num);
  5214. DP_PRINT_STATS("Broadcast Bytes Received = %llu",
  5215. peer->stats.rx.bcast.bytes);
  5216. DP_PRINT_STATS("Intra BSS Packets Received = %d",
  5217. peer->stats.rx.intra_bss.pkts.num);
  5218. DP_PRINT_STATS("Intra BSS Bytes Received = %llu",
  5219. peer->stats.rx.intra_bss.pkts.bytes);
  5220. DP_PRINT_STATS("Raw Packets Received = %d",
  5221. peer->stats.rx.raw.num);
  5222. DP_PRINT_STATS("Raw Bytes Received = %llu",
  5223. peer->stats.rx.raw.bytes);
  5224. DP_PRINT_STATS("Errors: MIC Errors = %d",
  5225. peer->stats.rx.err.mic_err);
  5226. DP_PRINT_STATS("Erros: Decryption Errors = %d",
  5227. peer->stats.rx.err.decrypt_err);
  5228. DP_PRINT_STATS("Msdu's Received As Part of Ampdu = %d",
  5229. peer->stats.rx.non_ampdu_cnt);
  5230. DP_PRINT_STATS("Msdu's Recived As Ampdu = %d",
  5231. peer->stats.rx.ampdu_cnt);
  5232. DP_PRINT_STATS("Msdu's Received Not Part of Amsdu's = %d",
  5233. peer->stats.rx.non_amsdu_cnt);
  5234. DP_PRINT_STATS("MSDUs Received As Part of Amsdu = %d",
  5235. peer->stats.rx.amsdu_cnt);
  5236. DP_PRINT_STATS("NAWDS : ");
  5237. DP_PRINT_STATS(" Nawds multicast Drop Rx Packet = %d",
  5238. peer->stats.rx.nawds_mcast_drop);
  5239. DP_PRINT_STATS("SGI ="
  5240. " 0.8us %d"
  5241. " 0.4us %d"
  5242. " 1.6us %d"
  5243. " 3.2us %d",
  5244. peer->stats.rx.sgi_count[0],
  5245. peer->stats.rx.sgi_count[1],
  5246. peer->stats.rx.sgi_count[2],
  5247. peer->stats.rx.sgi_count[3]);
  5248. DP_PRINT_STATS("BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d",
  5249. peer->stats.rx.bw[0], peer->stats.rx.bw[1],
  5250. peer->stats.rx.bw[2], peer->stats.rx.bw[3]);
  5251. DP_PRINT_STATS("Reception Type ="
  5252. " SU %d,"
  5253. " MU_MIMO %d,"
  5254. " MU_OFDMA %d,"
  5255. " MU_OFDMA_MIMO %d",
  5256. peer->stats.rx.reception_type[0],
  5257. peer->stats.rx.reception_type[1],
  5258. peer->stats.rx.reception_type[2],
  5259. peer->stats.rx.reception_type[3]);
  5260. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  5261. index = 0;
  5262. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  5263. if (!dp_rate_string[pkt_type][mcs].valid)
  5264. continue;
  5265. DP_PRINT_STATS(" %s = %d",
  5266. dp_rate_string[pkt_type][mcs].mcs_type,
  5267. peer->stats.rx.pkt_type[pkt_type].
  5268. mcs_count[mcs]);
  5269. }
  5270. DP_PRINT_STATS("\n");
  5271. }
  5272. index = 0;
  5273. for (i = 0; i < SS_COUNT; i++) {
  5274. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  5275. " %d", peer->stats.rx.nss[i]);
  5276. }
  5277. DP_PRINT_STATS("NSS(1-8) = %s",
  5278. nss);
  5279. DP_PRINT_STATS("Aggregation:");
  5280. DP_PRINT_STATS(" Msdu's Part of Ampdu = %d",
  5281. peer->stats.rx.ampdu_cnt);
  5282. DP_PRINT_STATS(" Msdu's With No Mpdu Level Aggregation = %d",
  5283. peer->stats.rx.non_ampdu_cnt);
  5284. DP_PRINT_STATS(" Msdu's Part of Amsdu = %d",
  5285. peer->stats.rx.amsdu_cnt);
  5286. DP_PRINT_STATS(" Msdu's With No Msdu Level Aggregation = %d",
  5287. peer->stats.rx.non_amsdu_cnt);
  5288. }
  5289. /**
  5290. * dp_print_host_stats()- Function to print the stats aggregated at host
  5291. * @vdev_handle: DP_VDEV handle
  5292. * @type: host stats type
  5293. *
  5294. * Available Stat types
  5295. * TXRX_CLEAR_STATS : Clear the stats
  5296. * TXRX_RX_RATE_STATS: Print Rx Rate Info
  5297. * TXRX_TX_RATE_STATS: Print Tx Rate Info
  5298. * TXRX_TX_HOST_STATS: Print Tx Stats
  5299. * TXRX_RX_HOST_STATS: Print Rx Stats
  5300. * TXRX_AST_STATS: Print AST Stats
  5301. * TXRX_SRNG_PTR_STATS: Print SRNG ring pointer stats
  5302. *
  5303. * Return: 0 on success, print error message in case of failure
  5304. */
  5305. static int
  5306. dp_print_host_stats(struct cdp_vdev *vdev_handle, enum cdp_host_txrx_stats type)
  5307. {
  5308. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5309. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  5310. dp_aggregate_pdev_stats(pdev);
  5311. switch (type) {
  5312. case TXRX_CLEAR_STATS:
  5313. dp_txrx_host_stats_clr(vdev);
  5314. break;
  5315. case TXRX_RX_RATE_STATS:
  5316. dp_print_rx_rates(vdev);
  5317. break;
  5318. case TXRX_TX_RATE_STATS:
  5319. dp_print_tx_rates(vdev);
  5320. break;
  5321. case TXRX_TX_HOST_STATS:
  5322. dp_print_pdev_tx_stats(pdev);
  5323. dp_print_soc_tx_stats(pdev->soc);
  5324. break;
  5325. case TXRX_RX_HOST_STATS:
  5326. dp_print_pdev_rx_stats(pdev);
  5327. dp_print_soc_rx_stats(pdev->soc);
  5328. break;
  5329. case TXRX_AST_STATS:
  5330. dp_print_ast_stats(pdev->soc);
  5331. dp_print_peer_table(vdev);
  5332. break;
  5333. case TXRX_SRNG_PTR_STATS:
  5334. dp_print_ring_stats(pdev);
  5335. break;
  5336. case TXRX_RX_MON_STATS:
  5337. dp_print_pdev_rx_mon_stats(pdev);
  5338. break;
  5339. default:
  5340. DP_TRACE(FATAL, "Wrong Input For TxRx Host Stats");
  5341. break;
  5342. }
  5343. return 0;
  5344. }
  5345. /*
  5346. * dp_get_host_peer_stats()- function to print peer stats
  5347. * @pdev_handle: DP_PDEV handle
  5348. * @mac_addr: mac address of the peer
  5349. *
  5350. * Return: void
  5351. */
  5352. static void
  5353. dp_get_host_peer_stats(struct cdp_pdev *pdev_handle, char *mac_addr)
  5354. {
  5355. struct dp_peer *peer;
  5356. uint8_t local_id;
  5357. peer = (struct dp_peer *)dp_find_peer_by_addr(pdev_handle, mac_addr,
  5358. &local_id);
  5359. if (!peer) {
  5360. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  5361. "%s: Invalid peer\n", __func__);
  5362. return;
  5363. }
  5364. dp_print_peer_stats(peer);
  5365. dp_peer_rxtid_stats(peer, dp_rx_tid_stats_cb, NULL);
  5366. return;
  5367. }
  5368. /*
  5369. * dp_ppdu_ring_reset()- Reset PPDU Stats ring
  5370. * @pdev: DP_PDEV handle
  5371. *
  5372. * Return: void
  5373. */
  5374. static void
  5375. dp_ppdu_ring_reset(struct dp_pdev *pdev)
  5376. {
  5377. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  5378. int mac_id;
  5379. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  5380. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  5381. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  5382. pdev->pdev_id);
  5383. htt_h2t_rx_ring_cfg(pdev->soc->htt_handle, mac_for_pdev,
  5384. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  5385. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  5386. }
  5387. }
  5388. /*
  5389. * dp_ppdu_ring_cfg()- Configure PPDU Stats ring
  5390. * @pdev: DP_PDEV handle
  5391. *
  5392. * Return: void
  5393. */
  5394. static void
  5395. dp_ppdu_ring_cfg(struct dp_pdev *pdev)
  5396. {
  5397. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  5398. int mac_id;
  5399. htt_tlv_filter.mpdu_start = 1;
  5400. htt_tlv_filter.msdu_start = 0;
  5401. htt_tlv_filter.packet = 0;
  5402. htt_tlv_filter.msdu_end = 0;
  5403. htt_tlv_filter.mpdu_end = 0;
  5404. htt_tlv_filter.attention = 0;
  5405. htt_tlv_filter.ppdu_start = 1;
  5406. htt_tlv_filter.ppdu_end = 1;
  5407. htt_tlv_filter.ppdu_end_user_stats = 1;
  5408. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  5409. htt_tlv_filter.ppdu_end_status_done = 1;
  5410. htt_tlv_filter.enable_fp = 1;
  5411. htt_tlv_filter.enable_md = 0;
  5412. if (pdev->mcopy_mode) {
  5413. htt_tlv_filter.packet_header = 1;
  5414. htt_tlv_filter.enable_mo = 1;
  5415. }
  5416. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  5417. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  5418. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  5419. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  5420. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  5421. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  5422. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  5423. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  5424. pdev->pdev_id);
  5425. htt_h2t_rx_ring_cfg(pdev->soc->htt_handle, mac_for_pdev,
  5426. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  5427. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  5428. }
  5429. }
  5430. /*
  5431. *dp_set_bpr_enable() - API to enable/disable bpr feature
  5432. *@pdev_handle: DP_PDEV handle.
  5433. *@val: Provided value.
  5434. *
  5435. *Return: void
  5436. */
  5437. static void
  5438. dp_set_bpr_enable(struct cdp_pdev *pdev_handle, int val)
  5439. {
  5440. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5441. switch (val) {
  5442. case CDP_BPR_DISABLE:
  5443. pdev->bpr_enable = CDP_BPR_DISABLE;
  5444. if (!pdev->pktlog_ppdu_stats && !pdev->enhanced_stats_en &&
  5445. !pdev->tx_sniffer_enable && !pdev->mcopy_mode) {
  5446. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  5447. } else if (pdev->enhanced_stats_en &&
  5448. !pdev->tx_sniffer_enable && !pdev->mcopy_mode &&
  5449. !pdev->pktlog_ppdu_stats) {
  5450. dp_h2t_cfg_stats_msg_send(pdev,
  5451. DP_PPDU_STATS_CFG_ENH_STATS,
  5452. pdev->pdev_id);
  5453. }
  5454. break;
  5455. case CDP_BPR_ENABLE:
  5456. pdev->bpr_enable = CDP_BPR_ENABLE;
  5457. if (!pdev->enhanced_stats_en && !pdev->tx_sniffer_enable &&
  5458. !pdev->mcopy_mode && !pdev->pktlog_ppdu_stats) {
  5459. dp_h2t_cfg_stats_msg_send(pdev,
  5460. DP_PPDU_STATS_CFG_BPR,
  5461. pdev->pdev_id);
  5462. } else if (pdev->enhanced_stats_en &&
  5463. !pdev->tx_sniffer_enable && !pdev->mcopy_mode &&
  5464. !pdev->pktlog_ppdu_stats) {
  5465. dp_h2t_cfg_stats_msg_send(pdev,
  5466. DP_PPDU_STATS_CFG_BPR_ENH,
  5467. pdev->pdev_id);
  5468. } else if (pdev->pktlog_ppdu_stats) {
  5469. dp_h2t_cfg_stats_msg_send(pdev,
  5470. DP_PPDU_STATS_CFG_BPR_PKTLOG,
  5471. pdev->pdev_id);
  5472. }
  5473. break;
  5474. default:
  5475. break;
  5476. }
  5477. }
  5478. /*
  5479. * dp_config_debug_sniffer()- API to enable/disable debug sniffer
  5480. * @pdev_handle: DP_PDEV handle
  5481. * @val: user provided value
  5482. *
  5483. * Return: void
  5484. */
  5485. static void
  5486. dp_config_debug_sniffer(struct cdp_pdev *pdev_handle, int val)
  5487. {
  5488. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5489. switch (val) {
  5490. case 0:
  5491. pdev->tx_sniffer_enable = 0;
  5492. pdev->mcopy_mode = 0;
  5493. if (!pdev->pktlog_ppdu_stats && !pdev->enhanced_stats_en) {
  5494. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  5495. dp_ppdu_ring_reset(pdev);
  5496. } else if (pdev->enhanced_stats_en) {
  5497. dp_h2t_cfg_stats_msg_send(pdev,
  5498. DP_PPDU_STATS_CFG_ENH_STATS, pdev->pdev_id);
  5499. }
  5500. break;
  5501. case 1:
  5502. pdev->tx_sniffer_enable = 1;
  5503. pdev->mcopy_mode = 0;
  5504. if (!pdev->pktlog_ppdu_stats)
  5505. dp_h2t_cfg_stats_msg_send(pdev,
  5506. DP_PPDU_STATS_CFG_SNIFFER, pdev->pdev_id);
  5507. break;
  5508. case 2:
  5509. pdev->mcopy_mode = 1;
  5510. pdev->tx_sniffer_enable = 0;
  5511. dp_ppdu_ring_cfg(pdev);
  5512. if (!pdev->pktlog_ppdu_stats)
  5513. dp_h2t_cfg_stats_msg_send(pdev,
  5514. DP_PPDU_STATS_CFG_SNIFFER, pdev->pdev_id);
  5515. break;
  5516. default:
  5517. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5518. "Invalid value\n");
  5519. break;
  5520. }
  5521. }
  5522. /*
  5523. * dp_enable_enhanced_stats()- API to enable enhanced statistcs
  5524. * @pdev_handle: DP_PDEV handle
  5525. *
  5526. * Return: void
  5527. */
  5528. static void
  5529. dp_enable_enhanced_stats(struct cdp_pdev *pdev_handle)
  5530. {
  5531. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5532. pdev->enhanced_stats_en = 1;
  5533. if (!pdev->mcopy_mode)
  5534. dp_ppdu_ring_cfg(pdev);
  5535. if (!pdev->pktlog_ppdu_stats && !pdev->tx_sniffer_enable && !pdev->mcopy_mode)
  5536. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_ENH_STATS, pdev->pdev_id);
  5537. }
  5538. /*
  5539. * dp_disable_enhanced_stats()- API to disable enhanced statistcs
  5540. * @pdev_handle: DP_PDEV handle
  5541. *
  5542. * Return: void
  5543. */
  5544. static void
  5545. dp_disable_enhanced_stats(struct cdp_pdev *pdev_handle)
  5546. {
  5547. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5548. pdev->enhanced_stats_en = 0;
  5549. if (!pdev->pktlog_ppdu_stats && !pdev->tx_sniffer_enable && !pdev->mcopy_mode)
  5550. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  5551. if (!pdev->mcopy_mode)
  5552. dp_ppdu_ring_reset(pdev);
  5553. }
  5554. /*
  5555. * dp_get_fw_peer_stats()- function to print peer stats
  5556. * @pdev_handle: DP_PDEV handle
  5557. * @mac_addr: mac address of the peer
  5558. * @cap: Type of htt stats requested
  5559. *
  5560. * Currently Supporting only MAC ID based requests Only
  5561. * 1: HTT_PEER_STATS_REQ_MODE_NO_QUERY
  5562. * 2: HTT_PEER_STATS_REQ_MODE_QUERY_TQM
  5563. * 3: HTT_PEER_STATS_REQ_MODE_FLUSH_TQM
  5564. *
  5565. * Return: void
  5566. */
  5567. static void
  5568. dp_get_fw_peer_stats(struct cdp_pdev *pdev_handle, uint8_t *mac_addr,
  5569. uint32_t cap)
  5570. {
  5571. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5572. int i;
  5573. uint32_t config_param0 = 0;
  5574. uint32_t config_param1 = 0;
  5575. uint32_t config_param2 = 0;
  5576. uint32_t config_param3 = 0;
  5577. HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_SET(config_param0, 1);
  5578. config_param0 |= (1 << (cap + 1));
  5579. for (i = 0; i < HTT_PEER_STATS_MAX_TLV; i++) {
  5580. config_param1 |= (1 << i);
  5581. }
  5582. config_param2 |= (mac_addr[0] & 0x000000ff);
  5583. config_param2 |= ((mac_addr[1] << 8) & 0x0000ff00);
  5584. config_param2 |= ((mac_addr[2] << 16) & 0x00ff0000);
  5585. config_param2 |= ((mac_addr[3] << 24) & 0xff000000);
  5586. config_param3 |= (mac_addr[4] & 0x000000ff);
  5587. config_param3 |= ((mac_addr[5] << 8) & 0x0000ff00);
  5588. dp_h2t_ext_stats_msg_send(pdev, HTT_DBG_EXT_STATS_PEER_INFO,
  5589. config_param0, config_param1, config_param2,
  5590. config_param3, 0, 0, 0);
  5591. }
  5592. /* This struct definition will be removed from here
  5593. * once it get added in FW headers*/
  5594. struct httstats_cmd_req {
  5595. uint32_t config_param0;
  5596. uint32_t config_param1;
  5597. uint32_t config_param2;
  5598. uint32_t config_param3;
  5599. int cookie;
  5600. u_int8_t stats_id;
  5601. };
  5602. /*
  5603. * dp_get_htt_stats: function to process the httstas request
  5604. * @pdev_handle: DP pdev handle
  5605. * @data: pointer to request data
  5606. * @data_len: length for request data
  5607. *
  5608. * return: void
  5609. */
  5610. static void
  5611. dp_get_htt_stats(struct cdp_pdev *pdev_handle, void *data, uint32_t data_len)
  5612. {
  5613. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5614. struct httstats_cmd_req *req = (struct httstats_cmd_req *)data;
  5615. QDF_ASSERT(data_len == sizeof(struct httstats_cmd_req));
  5616. dp_h2t_ext_stats_msg_send(pdev, req->stats_id,
  5617. req->config_param0, req->config_param1,
  5618. req->config_param2, req->config_param3,
  5619. req->cookie, 0, 0);
  5620. }
  5621. /*
  5622. * dp_set_pdev_param: function to set parameters in pdev
  5623. * @pdev_handle: DP pdev handle
  5624. * @param: parameter type to be set
  5625. * @val: value of parameter to be set
  5626. *
  5627. * return: void
  5628. */
  5629. static void dp_set_pdev_param(struct cdp_pdev *pdev_handle,
  5630. enum cdp_pdev_param_type param, uint8_t val)
  5631. {
  5632. switch (param) {
  5633. case CDP_CONFIG_DEBUG_SNIFFER:
  5634. dp_config_debug_sniffer(pdev_handle, val);
  5635. break;
  5636. case CDP_CONFIG_BPR_ENABLE:
  5637. dp_set_bpr_enable(pdev_handle, val);
  5638. break;
  5639. default:
  5640. break;
  5641. }
  5642. }
  5643. /*
  5644. * dp_set_vdev_param: function to set parameters in vdev
  5645. * @param: parameter type to be set
  5646. * @val: value of parameter to be set
  5647. *
  5648. * return: void
  5649. */
  5650. static void dp_set_vdev_param(struct cdp_vdev *vdev_handle,
  5651. enum cdp_vdev_param_type param, uint32_t val)
  5652. {
  5653. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5654. switch (param) {
  5655. case CDP_ENABLE_WDS:
  5656. vdev->wds_enabled = val;
  5657. break;
  5658. case CDP_ENABLE_NAWDS:
  5659. vdev->nawds_enabled = val;
  5660. break;
  5661. case CDP_ENABLE_MCAST_EN:
  5662. vdev->mcast_enhancement_en = val;
  5663. break;
  5664. case CDP_ENABLE_PROXYSTA:
  5665. vdev->proxysta_vdev = val;
  5666. break;
  5667. case CDP_UPDATE_TDLS_FLAGS:
  5668. vdev->tdls_link_connected = val;
  5669. break;
  5670. case CDP_CFG_WDS_AGING_TIMER:
  5671. if (val == 0)
  5672. qdf_timer_stop(&vdev->pdev->soc->wds_aging_timer);
  5673. else if (val != vdev->wds_aging_timer_val)
  5674. qdf_timer_mod(&vdev->pdev->soc->wds_aging_timer, val);
  5675. vdev->wds_aging_timer_val = val;
  5676. break;
  5677. case CDP_ENABLE_AP_BRIDGE:
  5678. if (wlan_op_mode_sta != vdev->opmode)
  5679. vdev->ap_bridge_enabled = val;
  5680. else
  5681. vdev->ap_bridge_enabled = false;
  5682. break;
  5683. case CDP_ENABLE_CIPHER:
  5684. vdev->sec_type = val;
  5685. break;
  5686. case CDP_ENABLE_QWRAP_ISOLATION:
  5687. vdev->isolation_vdev = val;
  5688. break;
  5689. default:
  5690. break;
  5691. }
  5692. dp_tx_vdev_update_search_flags(vdev);
  5693. }
  5694. /**
  5695. * dp_peer_set_nawds: set nawds bit in peer
  5696. * @peer_handle: pointer to peer
  5697. * @value: enable/disable nawds
  5698. *
  5699. * return: void
  5700. */
  5701. static void dp_peer_set_nawds(struct cdp_peer *peer_handle, uint8_t value)
  5702. {
  5703. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  5704. peer->nawds_enabled = value;
  5705. }
  5706. /*
  5707. * dp_set_vdev_dscp_tid_map_wifi3(): Update Map ID selected for particular vdev
  5708. * @vdev_handle: DP_VDEV handle
  5709. * @map_id:ID of map that needs to be updated
  5710. *
  5711. * Return: void
  5712. */
  5713. static void dp_set_vdev_dscp_tid_map_wifi3(struct cdp_vdev *vdev_handle,
  5714. uint8_t map_id)
  5715. {
  5716. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5717. vdev->dscp_tid_map_id = map_id;
  5718. return;
  5719. }
  5720. /*
  5721. * dp_txrx_stats_publish(): publish pdev stats into a buffer
  5722. * @pdev_handle: DP_PDEV handle
  5723. * @buf: to hold pdev_stats
  5724. *
  5725. * Return: int
  5726. */
  5727. static int
  5728. dp_txrx_stats_publish(struct cdp_pdev *pdev_handle, void *buf)
  5729. {
  5730. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5731. struct cdp_pdev_stats *buffer = (struct cdp_pdev_stats *) buf;
  5732. struct cdp_txrx_stats_req req = {0,};
  5733. dp_aggregate_pdev_stats(pdev);
  5734. req.stats = HTT_DBG_EXT_STATS_PDEV_TX;
  5735. req.cookie_val = 1;
  5736. dp_h2t_ext_stats_msg_send(pdev, req.stats, req.param0,
  5737. req.param1, req.param2, req.param3, 0,
  5738. req.cookie_val, 0);
  5739. msleep(DP_MAX_SLEEP_TIME);
  5740. req.stats = HTT_DBG_EXT_STATS_PDEV_RX;
  5741. req.cookie_val = 1;
  5742. dp_h2t_ext_stats_msg_send(pdev, req.stats, req.param0,
  5743. req.param1, req.param2, req.param3, 0,
  5744. req.cookie_val, 0);
  5745. msleep(DP_MAX_SLEEP_TIME);
  5746. qdf_mem_copy(buffer, &pdev->stats, sizeof(pdev->stats));
  5747. return TXRX_STATS_LEVEL;
  5748. }
  5749. /**
  5750. * dp_set_pdev_dscp_tid_map_wifi3(): update dscp tid map in pdev
  5751. * @pdev: DP_PDEV handle
  5752. * @map_id: ID of map that needs to be updated
  5753. * @tos: index value in map
  5754. * @tid: tid value passed by the user
  5755. *
  5756. * Return: void
  5757. */
  5758. static void dp_set_pdev_dscp_tid_map_wifi3(struct cdp_pdev *pdev_handle,
  5759. uint8_t map_id, uint8_t tos, uint8_t tid)
  5760. {
  5761. uint8_t dscp;
  5762. struct dp_pdev *pdev = (struct dp_pdev *) pdev_handle;
  5763. dscp = (tos >> DP_IP_DSCP_SHIFT) & DP_IP_DSCP_MASK;
  5764. pdev->dscp_tid_map[map_id][dscp] = tid;
  5765. if (map_id < HAL_MAX_HW_DSCP_TID_MAPS)
  5766. hal_tx_update_dscp_tid(pdev->soc->hal_soc, tid,
  5767. map_id, dscp);
  5768. return;
  5769. }
  5770. /**
  5771. * dp_fw_stats_process(): Process TxRX FW stats request
  5772. * @vdev_handle: DP VDEV handle
  5773. * @req: stats request
  5774. *
  5775. * return: int
  5776. */
  5777. static int dp_fw_stats_process(struct cdp_vdev *vdev_handle,
  5778. struct cdp_txrx_stats_req *req)
  5779. {
  5780. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5781. struct dp_pdev *pdev = NULL;
  5782. uint32_t stats = req->stats;
  5783. uint8_t mac_id = req->mac_id;
  5784. if (!vdev) {
  5785. DP_TRACE(NONE, "VDEV not found");
  5786. return 1;
  5787. }
  5788. pdev = vdev->pdev;
  5789. /*
  5790. * For HTT_DBG_EXT_STATS_RESET command, FW need to config
  5791. * from param0 to param3 according to below rule:
  5792. *
  5793. * PARAM:
  5794. * - config_param0 : start_offset (stats type)
  5795. * - config_param1 : stats bmask from start offset
  5796. * - config_param2 : stats bmask from start offset + 32
  5797. * - config_param3 : stats bmask from start offset + 64
  5798. */
  5799. if (req->stats == CDP_TXRX_STATS_0) {
  5800. req->param0 = HTT_DBG_EXT_STATS_PDEV_TX;
  5801. req->param1 = 0xFFFFFFFF;
  5802. req->param2 = 0xFFFFFFFF;
  5803. req->param3 = 0xFFFFFFFF;
  5804. }
  5805. return dp_h2t_ext_stats_msg_send(pdev, stats, req->param0,
  5806. req->param1, req->param2, req->param3,
  5807. 0, 0, mac_id);
  5808. }
  5809. /**
  5810. * dp_txrx_stats_request - function to map to firmware and host stats
  5811. * @vdev: virtual handle
  5812. * @req: stats request
  5813. *
  5814. * Return: integer
  5815. */
  5816. static int dp_txrx_stats_request(struct cdp_vdev *vdev,
  5817. struct cdp_txrx_stats_req *req)
  5818. {
  5819. int host_stats;
  5820. int fw_stats;
  5821. enum cdp_stats stats;
  5822. if (!vdev || !req) {
  5823. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5824. "Invalid vdev/req instance");
  5825. return 0;
  5826. }
  5827. stats = req->stats;
  5828. if (stats >= CDP_TXRX_MAX_STATS)
  5829. return 0;
  5830. /*
  5831. * DP_CURR_FW_STATS_AVAIL: no of FW stats currently available
  5832. * has to be updated if new FW HTT stats added
  5833. */
  5834. if (stats > CDP_TXRX_STATS_HTT_MAX)
  5835. stats = stats + DP_CURR_FW_STATS_AVAIL - DP_HTT_DBG_EXT_STATS_MAX;
  5836. fw_stats = dp_stats_mapping_table[stats][STATS_FW];
  5837. host_stats = dp_stats_mapping_table[stats][STATS_HOST];
  5838. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5839. "stats: %u fw_stats_type: %d host_stats_type: %d",
  5840. stats, fw_stats, host_stats);
  5841. if (fw_stats != TXRX_FW_STATS_INVALID) {
  5842. /* update request with FW stats type */
  5843. req->stats = fw_stats;
  5844. return dp_fw_stats_process(vdev, req);
  5845. }
  5846. if ((host_stats != TXRX_HOST_STATS_INVALID) &&
  5847. (host_stats <= TXRX_HOST_STATS_MAX))
  5848. return dp_print_host_stats(vdev, host_stats);
  5849. else
  5850. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5851. "Wrong Input for TxRx Stats");
  5852. return 0;
  5853. }
  5854. /*
  5855. * dp_print_napi_stats(): NAPI stats
  5856. * @soc - soc handle
  5857. */
  5858. static void dp_print_napi_stats(struct dp_soc *soc)
  5859. {
  5860. hif_print_napi_stats(soc->hif_handle);
  5861. }
  5862. /*
  5863. * dp_print_per_ring_stats(): Packet count per ring
  5864. * @soc - soc handle
  5865. */
  5866. static void dp_print_per_ring_stats(struct dp_soc *soc)
  5867. {
  5868. uint8_t ring;
  5869. uint16_t core;
  5870. uint64_t total_packets;
  5871. DP_TRACE(FATAL, "Reo packets per ring:");
  5872. for (ring = 0; ring < MAX_REO_DEST_RINGS; ring++) {
  5873. total_packets = 0;
  5874. DP_TRACE(FATAL, "Packets on ring %u:", ring);
  5875. for (core = 0; core < NR_CPUS; core++) {
  5876. DP_TRACE(FATAL, "Packets arriving on core %u: %llu",
  5877. core, soc->stats.rx.ring_packets[core][ring]);
  5878. total_packets += soc->stats.rx.ring_packets[core][ring];
  5879. }
  5880. DP_TRACE(FATAL, "Total packets on ring %u: %llu",
  5881. ring, total_packets);
  5882. }
  5883. }
  5884. /*
  5885. * dp_txrx_path_stats() - Function to display dump stats
  5886. * @soc - soc handle
  5887. *
  5888. * return: none
  5889. */
  5890. static void dp_txrx_path_stats(struct dp_soc *soc)
  5891. {
  5892. uint8_t error_code;
  5893. uint8_t loop_pdev;
  5894. struct dp_pdev *pdev;
  5895. uint8_t i;
  5896. for (loop_pdev = 0; loop_pdev < soc->pdev_count; loop_pdev++) {
  5897. pdev = soc->pdev_list[loop_pdev];
  5898. dp_aggregate_pdev_stats(pdev);
  5899. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5900. "Tx path Statistics:");
  5901. DP_TRACE(FATAL, "from stack: %u msdus (%llu bytes)",
  5902. pdev->stats.tx_i.rcvd.num,
  5903. pdev->stats.tx_i.rcvd.bytes);
  5904. DP_TRACE(FATAL, "processed from host: %u msdus (%llu bytes)",
  5905. pdev->stats.tx_i.processed.num,
  5906. pdev->stats.tx_i.processed.bytes);
  5907. DP_TRACE(FATAL, "successfully transmitted: %u msdus (%llu bytes)",
  5908. pdev->stats.tx.tx_success.num,
  5909. pdev->stats.tx.tx_success.bytes);
  5910. DP_TRACE(FATAL, "Dropped in host:");
  5911. DP_TRACE(FATAL, "Total packets dropped: %u,",
  5912. pdev->stats.tx_i.dropped.dropped_pkt.num);
  5913. DP_TRACE(FATAL, "Descriptor not available: %u",
  5914. pdev->stats.tx_i.dropped.desc_na.num);
  5915. DP_TRACE(FATAL, "Ring full: %u",
  5916. pdev->stats.tx_i.dropped.ring_full);
  5917. DP_TRACE(FATAL, "Enqueue fail: %u",
  5918. pdev->stats.tx_i.dropped.enqueue_fail);
  5919. DP_TRACE(FATAL, "DMA Error: %u",
  5920. pdev->stats.tx_i.dropped.dma_error);
  5921. DP_TRACE(FATAL, "Dropped in hardware:");
  5922. DP_TRACE(FATAL, "total packets dropped: %u",
  5923. pdev->stats.tx.tx_failed);
  5924. DP_TRACE(FATAL, "mpdu age out: %u",
  5925. pdev->stats.tx.dropped.age_out);
  5926. DP_TRACE(FATAL, "firmware removed: %u",
  5927. pdev->stats.tx.dropped.fw_rem);
  5928. DP_TRACE(FATAL, "firmware removed tx: %u",
  5929. pdev->stats.tx.dropped.fw_rem_tx);
  5930. DP_TRACE(FATAL, "firmware removed notx %u",
  5931. pdev->stats.tx.dropped.fw_rem_notx);
  5932. DP_TRACE(FATAL, "peer_invalid: %u",
  5933. pdev->soc->stats.tx.tx_invalid_peer.num);
  5934. DP_TRACE(FATAL, "Tx packets sent per interrupt:");
  5935. DP_TRACE(FATAL, "Single Packet: %u",
  5936. pdev->stats.tx_comp_histogram.pkts_1);
  5937. DP_TRACE(FATAL, "2-20 Packets: %u",
  5938. pdev->stats.tx_comp_histogram.pkts_2_20);
  5939. DP_TRACE(FATAL, "21-40 Packets: %u",
  5940. pdev->stats.tx_comp_histogram.pkts_21_40);
  5941. DP_TRACE(FATAL, "41-60 Packets: %u",
  5942. pdev->stats.tx_comp_histogram.pkts_41_60);
  5943. DP_TRACE(FATAL, "61-80 Packets: %u",
  5944. pdev->stats.tx_comp_histogram.pkts_61_80);
  5945. DP_TRACE(FATAL, "81-100 Packets: %u",
  5946. pdev->stats.tx_comp_histogram.pkts_81_100);
  5947. DP_TRACE(FATAL, "101-200 Packets: %u",
  5948. pdev->stats.tx_comp_histogram.pkts_101_200);
  5949. DP_TRACE(FATAL, " 201+ Packets: %u",
  5950. pdev->stats.tx_comp_histogram.pkts_201_plus);
  5951. DP_TRACE(FATAL, "Rx path statistics");
  5952. DP_TRACE(FATAL, "delivered %u msdus ( %llu bytes),",
  5953. pdev->stats.rx.to_stack.num,
  5954. pdev->stats.rx.to_stack.bytes);
  5955. for (i = 0; i < CDP_MAX_RX_RINGS; i++)
  5956. DP_TRACE(FATAL, "received on reo[%d] %u msdus ( %llu bytes),",
  5957. i, pdev->stats.rx.rcvd_reo[i].num,
  5958. pdev->stats.rx.rcvd_reo[i].bytes);
  5959. DP_TRACE(FATAL, "intra-bss packets %u msdus ( %llu bytes),",
  5960. pdev->stats.rx.intra_bss.pkts.num,
  5961. pdev->stats.rx.intra_bss.pkts.bytes);
  5962. DP_TRACE(FATAL, "intra-bss fails %u msdus ( %llu bytes),",
  5963. pdev->stats.rx.intra_bss.fail.num,
  5964. pdev->stats.rx.intra_bss.fail.bytes);
  5965. DP_TRACE(FATAL, "raw packets %u msdus ( %llu bytes),",
  5966. pdev->stats.rx.raw.num,
  5967. pdev->stats.rx.raw.bytes);
  5968. DP_TRACE(FATAL, "dropped: error %u msdus",
  5969. pdev->stats.rx.err.mic_err);
  5970. DP_TRACE(FATAL, "peer invalid %u",
  5971. pdev->soc->stats.rx.err.rx_invalid_peer.num);
  5972. DP_TRACE(FATAL, "Reo Statistics");
  5973. DP_TRACE(FATAL, "rbm error: %u msdus",
  5974. pdev->soc->stats.rx.err.invalid_rbm);
  5975. DP_TRACE(FATAL, "hal ring access fail: %u msdus",
  5976. pdev->soc->stats.rx.err.hal_ring_access_fail);
  5977. for (error_code = 0; error_code < HAL_REO_ERR_MAX;
  5978. error_code++) {
  5979. if (!pdev->soc->stats.rx.err.reo_error[error_code])
  5980. continue;
  5981. DP_TRACE(FATAL, "Reo error number (%u): %u msdus",
  5982. error_code,
  5983. pdev->soc->stats.rx.err.reo_error[error_code]);
  5984. }
  5985. for (error_code = 0; error_code < HAL_RXDMA_ERR_MAX;
  5986. error_code++) {
  5987. if (!pdev->soc->stats.rx.err.rxdma_error[error_code])
  5988. continue;
  5989. DP_TRACE(FATAL, "Rxdma error number (%u): %u msdus",
  5990. error_code,
  5991. pdev->soc->stats.rx.err
  5992. .rxdma_error[error_code]);
  5993. }
  5994. DP_TRACE(FATAL, "Rx packets reaped per interrupt:");
  5995. DP_TRACE(FATAL, "Single Packet: %u",
  5996. pdev->stats.rx_ind_histogram.pkts_1);
  5997. DP_TRACE(FATAL, "2-20 Packets: %u",
  5998. pdev->stats.rx_ind_histogram.pkts_2_20);
  5999. DP_TRACE(FATAL, "21-40 Packets: %u",
  6000. pdev->stats.rx_ind_histogram.pkts_21_40);
  6001. DP_TRACE(FATAL, "41-60 Packets: %u",
  6002. pdev->stats.rx_ind_histogram.pkts_41_60);
  6003. DP_TRACE(FATAL, "61-80 Packets: %u",
  6004. pdev->stats.rx_ind_histogram.pkts_61_80);
  6005. DP_TRACE(FATAL, "81-100 Packets: %u",
  6006. pdev->stats.rx_ind_histogram.pkts_81_100);
  6007. DP_TRACE(FATAL, "101-200 Packets: %u",
  6008. pdev->stats.rx_ind_histogram.pkts_101_200);
  6009. DP_TRACE(FATAL, " 201+ Packets: %u",
  6010. pdev->stats.rx_ind_histogram.pkts_201_plus);
  6011. DP_TRACE_STATS(ERROR, "%s: tso_enable: %u lro_enable: %u rx_hash: %u napi_enable: %u",
  6012. __func__,
  6013. pdev->soc->wlan_cfg_ctx->tso_enabled,
  6014. pdev->soc->wlan_cfg_ctx->lro_enabled,
  6015. pdev->soc->wlan_cfg_ctx->rx_hash,
  6016. pdev->soc->wlan_cfg_ctx->napi_enabled);
  6017. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  6018. DP_TRACE_STATS(ERROR, "%s: Tx flow stop queue: %u tx flow start queue offset: %u",
  6019. __func__,
  6020. pdev->soc->wlan_cfg_ctx->tx_flow_stop_queue_threshold,
  6021. pdev->soc->wlan_cfg_ctx->tx_flow_start_queue_offset);
  6022. #endif
  6023. }
  6024. }
  6025. /*
  6026. * dp_txrx_dump_stats() - Dump statistics
  6027. * @value - Statistics option
  6028. */
  6029. static QDF_STATUS dp_txrx_dump_stats(void *psoc, uint16_t value,
  6030. enum qdf_stats_verbosity_level level)
  6031. {
  6032. struct dp_soc *soc =
  6033. (struct dp_soc *)psoc;
  6034. QDF_STATUS status = QDF_STATUS_SUCCESS;
  6035. if (!soc) {
  6036. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6037. "%s: soc is NULL", __func__);
  6038. return QDF_STATUS_E_INVAL;
  6039. }
  6040. switch (value) {
  6041. case CDP_TXRX_PATH_STATS:
  6042. dp_txrx_path_stats(soc);
  6043. break;
  6044. case CDP_RX_RING_STATS:
  6045. dp_print_per_ring_stats(soc);
  6046. break;
  6047. case CDP_TXRX_TSO_STATS:
  6048. /* TODO: NOT IMPLEMENTED */
  6049. break;
  6050. case CDP_DUMP_TX_FLOW_POOL_INFO:
  6051. cdp_dump_flow_pool_info((struct cdp_soc_t *)soc);
  6052. break;
  6053. case CDP_DP_NAPI_STATS:
  6054. dp_print_napi_stats(soc);
  6055. break;
  6056. case CDP_TXRX_DESC_STATS:
  6057. /* TODO: NOT IMPLEMENTED */
  6058. break;
  6059. default:
  6060. status = QDF_STATUS_E_INVAL;
  6061. break;
  6062. }
  6063. return status;
  6064. }
  6065. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  6066. /**
  6067. * dp_update_flow_control_parameters() - API to store datapath
  6068. * config parameters
  6069. * @soc: soc handle
  6070. * @cfg: ini parameter handle
  6071. *
  6072. * Return: void
  6073. */
  6074. static inline
  6075. void dp_update_flow_control_parameters(struct dp_soc *soc,
  6076. struct cdp_config_params *params)
  6077. {
  6078. soc->wlan_cfg_ctx->tx_flow_stop_queue_threshold =
  6079. params->tx_flow_stop_queue_threshold;
  6080. soc->wlan_cfg_ctx->tx_flow_start_queue_offset =
  6081. params->tx_flow_start_queue_offset;
  6082. }
  6083. #else
  6084. static inline
  6085. void dp_update_flow_control_parameters(struct dp_soc *soc,
  6086. struct cdp_config_params *params)
  6087. {
  6088. }
  6089. #endif
  6090. /**
  6091. * dp_update_config_parameters() - API to store datapath
  6092. * config parameters
  6093. * @soc: soc handle
  6094. * @cfg: ini parameter handle
  6095. *
  6096. * Return: status
  6097. */
  6098. static
  6099. QDF_STATUS dp_update_config_parameters(struct cdp_soc *psoc,
  6100. struct cdp_config_params *params)
  6101. {
  6102. struct dp_soc *soc = (struct dp_soc *)psoc;
  6103. if (!(soc)) {
  6104. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6105. "%s: Invalid handle", __func__);
  6106. return QDF_STATUS_E_INVAL;
  6107. }
  6108. soc->wlan_cfg_ctx->tso_enabled = params->tso_enable;
  6109. soc->wlan_cfg_ctx->lro_enabled = params->lro_enable;
  6110. soc->wlan_cfg_ctx->rx_hash = params->flow_steering_enable;
  6111. soc->wlan_cfg_ctx->tcp_udp_checksumoffload =
  6112. params->tcp_udp_checksumoffload;
  6113. soc->wlan_cfg_ctx->napi_enabled = params->napi_enable;
  6114. dp_update_flow_control_parameters(soc, params);
  6115. return QDF_STATUS_SUCCESS;
  6116. }
  6117. /**
  6118. * dp_txrx_set_wds_rx_policy() - API to store datapath
  6119. * config parameters
  6120. * @vdev_handle - datapath vdev handle
  6121. * @cfg: ini parameter handle
  6122. *
  6123. * Return: status
  6124. */
  6125. #ifdef WDS_VENDOR_EXTENSION
  6126. void
  6127. dp_txrx_set_wds_rx_policy(
  6128. struct cdp_vdev *vdev_handle,
  6129. u_int32_t val)
  6130. {
  6131. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  6132. struct dp_peer *peer;
  6133. if (vdev->opmode == wlan_op_mode_ap) {
  6134. /* for ap, set it on bss_peer */
  6135. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  6136. if (peer->bss_peer) {
  6137. peer->wds_ecm.wds_rx_filter = 1;
  6138. peer->wds_ecm.wds_rx_ucast_4addr = (val & WDS_POLICY_RX_UCAST_4ADDR) ? 1:0;
  6139. peer->wds_ecm.wds_rx_mcast_4addr = (val & WDS_POLICY_RX_MCAST_4ADDR) ? 1:0;
  6140. break;
  6141. }
  6142. }
  6143. } else if (vdev->opmode == wlan_op_mode_sta) {
  6144. peer = TAILQ_FIRST(&vdev->peer_list);
  6145. peer->wds_ecm.wds_rx_filter = 1;
  6146. peer->wds_ecm.wds_rx_ucast_4addr = (val & WDS_POLICY_RX_UCAST_4ADDR) ? 1:0;
  6147. peer->wds_ecm.wds_rx_mcast_4addr = (val & WDS_POLICY_RX_MCAST_4ADDR) ? 1:0;
  6148. }
  6149. }
  6150. /**
  6151. * dp_txrx_peer_wds_tx_policy_update() - API to set tx wds policy
  6152. *
  6153. * @peer_handle - datapath peer handle
  6154. * @wds_tx_ucast: policy for unicast transmission
  6155. * @wds_tx_mcast: policy for multicast transmission
  6156. *
  6157. * Return: void
  6158. */
  6159. void
  6160. dp_txrx_peer_wds_tx_policy_update(struct cdp_peer *peer_handle,
  6161. int wds_tx_ucast, int wds_tx_mcast)
  6162. {
  6163. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  6164. if (wds_tx_ucast || wds_tx_mcast) {
  6165. peer->wds_enabled = 1;
  6166. peer->wds_ecm.wds_tx_ucast_4addr = wds_tx_ucast;
  6167. peer->wds_ecm.wds_tx_mcast_4addr = wds_tx_mcast;
  6168. } else {
  6169. peer->wds_enabled = 0;
  6170. peer->wds_ecm.wds_tx_ucast_4addr = 0;
  6171. peer->wds_ecm.wds_tx_mcast_4addr = 0;
  6172. }
  6173. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  6174. FL("Policy Update set to :\
  6175. peer->wds_enabled %d\
  6176. peer->wds_ecm.wds_tx_ucast_4addr %d\
  6177. peer->wds_ecm.wds_tx_mcast_4addr %d\n"),
  6178. peer->wds_enabled, peer->wds_ecm.wds_tx_ucast_4addr,
  6179. peer->wds_ecm.wds_tx_mcast_4addr);
  6180. return;
  6181. }
  6182. #endif
  6183. static struct cdp_wds_ops dp_ops_wds = {
  6184. .vdev_set_wds = dp_vdev_set_wds,
  6185. #ifdef WDS_VENDOR_EXTENSION
  6186. .txrx_set_wds_rx_policy = dp_txrx_set_wds_rx_policy,
  6187. .txrx_wds_peer_tx_policy_update = dp_txrx_peer_wds_tx_policy_update,
  6188. #endif
  6189. };
  6190. /*
  6191. * dp_txrx_data_tx_cb_set(): set the callback for non standard tx
  6192. * @vdev_handle - datapath vdev handle
  6193. * @callback - callback function
  6194. * @ctxt: callback context
  6195. *
  6196. */
  6197. static void
  6198. dp_txrx_data_tx_cb_set(struct cdp_vdev *vdev_handle,
  6199. ol_txrx_data_tx_cb callback, void *ctxt)
  6200. {
  6201. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  6202. vdev->tx_non_std_data_callback.func = callback;
  6203. vdev->tx_non_std_data_callback.ctxt = ctxt;
  6204. }
  6205. /**
  6206. * dp_pdev_get_dp_txrx_handle() - get dp handle from pdev
  6207. * @pdev_hdl: datapath pdev handle
  6208. *
  6209. * Return: opaque pointer to dp txrx handle
  6210. */
  6211. static void *dp_pdev_get_dp_txrx_handle(struct cdp_pdev *pdev_hdl)
  6212. {
  6213. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  6214. return pdev->dp_txrx_handle;
  6215. }
  6216. /**
  6217. * dp_pdev_set_dp_txrx_handle() - set dp handle in pdev
  6218. * @pdev_hdl: datapath pdev handle
  6219. * @dp_txrx_hdl: opaque pointer for dp_txrx_handle
  6220. *
  6221. * Return: void
  6222. */
  6223. static void
  6224. dp_pdev_set_dp_txrx_handle(struct cdp_pdev *pdev_hdl, void *dp_txrx_hdl)
  6225. {
  6226. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  6227. pdev->dp_txrx_handle = dp_txrx_hdl;
  6228. }
  6229. /**
  6230. * dp_soc_get_dp_txrx_handle() - get context for external-dp from dp soc
  6231. * @soc_handle: datapath soc handle
  6232. *
  6233. * Return: opaque pointer to external dp (non-core DP)
  6234. */
  6235. static void *dp_soc_get_dp_txrx_handle(struct cdp_soc *soc_handle)
  6236. {
  6237. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  6238. return soc->external_txrx_handle;
  6239. }
  6240. /**
  6241. * dp_soc_set_dp_txrx_handle() - set external dp handle in soc
  6242. * @soc_handle: datapath soc handle
  6243. * @txrx_handle: opaque pointer to external dp (non-core DP)
  6244. *
  6245. * Return: void
  6246. */
  6247. static void
  6248. dp_soc_set_dp_txrx_handle(struct cdp_soc *soc_handle, void *txrx_handle)
  6249. {
  6250. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  6251. soc->external_txrx_handle = txrx_handle;
  6252. }
  6253. #ifdef FEATURE_AST
  6254. static void dp_peer_teardown_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  6255. {
  6256. struct dp_vdev *vdev = (struct dp_vdev *) vdev_hdl;
  6257. struct dp_peer *peer = (struct dp_peer *) peer_hdl;
  6258. struct dp_soc *soc = (struct dp_soc *) vdev->pdev->soc;
  6259. /*
  6260. * For BSS peer, new peer is not created on alloc_node if the
  6261. * peer with same address already exists , instead refcnt is
  6262. * increased for existing peer. Correspondingly in delete path,
  6263. * only refcnt is decreased; and peer is only deleted , when all
  6264. * references are deleted. So delete_in_progress should not be set
  6265. * for bss_peer, unless only 2 reference remains (peer map reference
  6266. * and peer hash table reference).
  6267. */
  6268. if (peer->bss_peer && (qdf_atomic_read(&peer->ref_cnt) > 2)) {
  6269. return;
  6270. }
  6271. peer->delete_in_progress = true;
  6272. dp_peer_delete_ast_entries(soc, peer);
  6273. }
  6274. #endif
  6275. #ifdef ATH_SUPPORT_NAC_RSSI
  6276. static QDF_STATUS dp_config_for_nac_rssi(struct cdp_vdev *vdev_handle,
  6277. enum cdp_nac_param_cmd cmd, char *bssid, char *client_macaddr,
  6278. uint8_t chan_num)
  6279. {
  6280. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  6281. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  6282. struct dp_soc *soc = (struct dp_soc *) vdev->pdev->soc;
  6283. pdev->nac_rssi_filtering = 1;
  6284. /* Store address of NAC (neighbour peer) which will be checked
  6285. * against TA of received packets.
  6286. */
  6287. if (cmd == CDP_NAC_PARAM_ADD) {
  6288. qdf_mem_copy(vdev->cdp_nac_rssi.client_mac,
  6289. client_macaddr, DP_MAC_ADDR_LEN);
  6290. vdev->cdp_nac_rssi_enabled = 1;
  6291. } else if (cmd == CDP_NAC_PARAM_DEL) {
  6292. if (!qdf_mem_cmp(vdev->cdp_nac_rssi.client_mac,
  6293. client_macaddr, DP_MAC_ADDR_LEN)) {
  6294. /* delete this peer from the list */
  6295. qdf_mem_zero(vdev->cdp_nac_rssi.client_mac,
  6296. DP_MAC_ADDR_LEN);
  6297. }
  6298. vdev->cdp_nac_rssi_enabled = 0;
  6299. }
  6300. if (soc->cdp_soc.ol_ops->config_bssid_in_fw_for_nac_rssi)
  6301. soc->cdp_soc.ol_ops->config_bssid_in_fw_for_nac_rssi
  6302. ((void *)vdev->pdev->ctrl_pdev,
  6303. vdev->vdev_id, cmd, bssid);
  6304. return QDF_STATUS_SUCCESS;
  6305. }
  6306. #endif
  6307. static QDF_STATUS dp_peer_map_attach_wifi3(struct cdp_soc_t *soc_hdl,
  6308. uint32_t max_peers)
  6309. {
  6310. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  6311. soc->max_peers = max_peers;
  6312. qdf_print ("%s max_peers %u\n", __func__, max_peers);
  6313. if (dp_peer_find_attach(soc))
  6314. return QDF_STATUS_E_FAILURE;
  6315. return QDF_STATUS_SUCCESS;
  6316. }
  6317. /**
  6318. * dp_pdev_set_ctrl_pdev() - set ctrl pdev handle in dp pdev
  6319. * @dp_pdev: dp pdev handle
  6320. * @ctrl_pdev: UMAC ctrl pdev handle
  6321. *
  6322. * Return: void
  6323. */
  6324. static void dp_pdev_set_ctrl_pdev(struct cdp_pdev *dp_pdev,
  6325. struct cdp_ctrl_objmgr_pdev *ctrl_pdev)
  6326. {
  6327. struct dp_pdev *pdev = (struct dp_pdev *)dp_pdev;
  6328. pdev->ctrl_pdev = ctrl_pdev;
  6329. }
  6330. static struct cdp_cmn_ops dp_ops_cmn = {
  6331. .txrx_soc_attach_target = dp_soc_attach_target_wifi3,
  6332. .txrx_vdev_attach = dp_vdev_attach_wifi3,
  6333. .txrx_vdev_detach = dp_vdev_detach_wifi3,
  6334. .txrx_pdev_attach = dp_pdev_attach_wifi3,
  6335. .txrx_pdev_detach = dp_pdev_detach_wifi3,
  6336. .txrx_peer_create = dp_peer_create_wifi3,
  6337. .txrx_peer_setup = dp_peer_setup_wifi3,
  6338. #ifdef FEATURE_AST
  6339. .txrx_peer_teardown = dp_peer_teardown_wifi3,
  6340. #else
  6341. .txrx_peer_teardown = NULL,
  6342. #endif
  6343. .txrx_peer_add_ast = dp_peer_add_ast_wifi3,
  6344. .txrx_peer_del_ast = dp_peer_del_ast_wifi3,
  6345. .txrx_peer_update_ast = dp_peer_update_ast_wifi3,
  6346. .txrx_peer_ast_hash_find = dp_peer_ast_hash_find_wifi3,
  6347. .txrx_peer_ast_get_pdev_id = dp_peer_ast_get_pdev_id_wifi3,
  6348. .txrx_peer_ast_get_next_hop = dp_peer_ast_get_next_hop_wifi3,
  6349. .txrx_peer_ast_set_type = dp_peer_ast_set_type_wifi3,
  6350. .txrx_peer_delete = dp_peer_delete_wifi3,
  6351. .txrx_vdev_register = dp_vdev_register_wifi3,
  6352. .txrx_soc_detach = dp_soc_detach_wifi3,
  6353. .txrx_get_vdev_mac_addr = dp_get_vdev_mac_addr_wifi3,
  6354. .txrx_get_vdev_from_vdev_id = dp_get_vdev_from_vdev_id_wifi3,
  6355. .txrx_get_ctrl_pdev_from_vdev = dp_get_ctrl_pdev_from_vdev_wifi3,
  6356. .txrx_ath_getstats = dp_get_device_stats,
  6357. .addba_requestprocess = dp_addba_requestprocess_wifi3,
  6358. .addba_responsesetup = dp_addba_responsesetup_wifi3,
  6359. .delba_process = dp_delba_process_wifi3,
  6360. .set_addba_response = dp_set_addba_response,
  6361. .get_peer_mac_addr_frm_id = dp_get_peer_mac_addr_frm_id,
  6362. .flush_cache_rx_queue = NULL,
  6363. /* TODO: get API's for dscp-tid need to be added*/
  6364. .set_vdev_dscp_tid_map = dp_set_vdev_dscp_tid_map_wifi3,
  6365. .set_pdev_dscp_tid_map = dp_set_pdev_dscp_tid_map_wifi3,
  6366. .txrx_stats_request = dp_txrx_stats_request,
  6367. .txrx_set_monitor_mode = dp_vdev_set_monitor_mode,
  6368. .txrx_get_pdev_id_frm_pdev = dp_get_pdev_id_frm_pdev,
  6369. .txrx_set_nac = dp_set_nac,
  6370. .txrx_get_tx_pending = dp_get_tx_pending,
  6371. .txrx_set_pdev_tx_capture = dp_config_debug_sniffer,
  6372. .txrx_get_peer_mac_from_peer_id = dp_get_peer_mac_from_peer_id,
  6373. .display_stats = dp_txrx_dump_stats,
  6374. .txrx_soc_set_nss_cfg = dp_soc_set_nss_cfg_wifi3,
  6375. .txrx_soc_get_nss_cfg = dp_soc_get_nss_cfg_wifi3,
  6376. .txrx_intr_attach = dp_soc_interrupt_attach_wrapper,
  6377. .txrx_intr_detach = dp_soc_interrupt_detach,
  6378. .set_pn_check = dp_set_pn_check_wifi3,
  6379. .update_config_parameters = dp_update_config_parameters,
  6380. /* TODO: Add other functions */
  6381. .txrx_data_tx_cb_set = dp_txrx_data_tx_cb_set,
  6382. .get_dp_txrx_handle = dp_pdev_get_dp_txrx_handle,
  6383. .set_dp_txrx_handle = dp_pdev_set_dp_txrx_handle,
  6384. .get_soc_dp_txrx_handle = dp_soc_get_dp_txrx_handle,
  6385. .set_soc_dp_txrx_handle = dp_soc_set_dp_txrx_handle,
  6386. .tx_send = dp_tx_send,
  6387. .txrx_peer_reset_ast = dp_wds_reset_ast_wifi3,
  6388. .txrx_peer_reset_ast_table = dp_wds_reset_ast_table_wifi3,
  6389. .txrx_peer_flush_ast_table = dp_wds_flush_ast_table_wifi3,
  6390. .txrx_peer_map_attach = dp_peer_map_attach_wifi3,
  6391. .txrx_pdev_set_ctrl_pdev = dp_pdev_set_ctrl_pdev,
  6392. };
  6393. static struct cdp_ctrl_ops dp_ops_ctrl = {
  6394. .txrx_peer_authorize = dp_peer_authorize,
  6395. #ifdef QCA_SUPPORT_SON
  6396. .txrx_set_inact_params = dp_set_inact_params,
  6397. .txrx_start_inact_timer = dp_start_inact_timer,
  6398. .txrx_set_overload = dp_set_overload,
  6399. .txrx_peer_is_inact = dp_peer_is_inact,
  6400. .txrx_mark_peer_inact = dp_mark_peer_inact,
  6401. #endif
  6402. .txrx_set_vdev_rx_decap_type = dp_set_vdev_rx_decap_type,
  6403. .txrx_set_tx_encap_type = dp_set_vdev_tx_encap_type,
  6404. #ifdef MESH_MODE_SUPPORT
  6405. .txrx_set_mesh_mode = dp_peer_set_mesh_mode,
  6406. .txrx_set_mesh_rx_filter = dp_peer_set_mesh_rx_filter,
  6407. #endif
  6408. .txrx_set_vdev_param = dp_set_vdev_param,
  6409. .txrx_peer_set_nawds = dp_peer_set_nawds,
  6410. .txrx_set_pdev_reo_dest = dp_set_pdev_reo_dest,
  6411. .txrx_get_pdev_reo_dest = dp_get_pdev_reo_dest,
  6412. .txrx_set_filter_neighbour_peers = dp_set_filter_neighbour_peers,
  6413. .txrx_update_filter_neighbour_peers =
  6414. dp_update_filter_neighbour_peers,
  6415. .txrx_get_sec_type = dp_get_sec_type,
  6416. /* TODO: Add other functions */
  6417. .txrx_wdi_event_sub = dp_wdi_event_sub,
  6418. .txrx_wdi_event_unsub = dp_wdi_event_unsub,
  6419. #ifdef WDI_EVENT_ENABLE
  6420. .txrx_get_pldev = dp_get_pldev,
  6421. #endif
  6422. .txrx_set_pdev_param = dp_set_pdev_param,
  6423. #ifdef ATH_SUPPORT_NAC_RSSI
  6424. .txrx_vdev_config_for_nac_rssi = dp_config_for_nac_rssi,
  6425. #endif
  6426. .set_key = dp_set_michael_key,
  6427. };
  6428. static struct cdp_me_ops dp_ops_me = {
  6429. #ifdef ATH_SUPPORT_IQUE
  6430. .tx_me_alloc_descriptor = dp_tx_me_alloc_descriptor,
  6431. .tx_me_free_descriptor = dp_tx_me_free_descriptor,
  6432. .tx_me_convert_ucast = dp_tx_me_send_convert_ucast,
  6433. #endif
  6434. };
  6435. static struct cdp_mon_ops dp_ops_mon = {
  6436. .txrx_monitor_set_filter_ucast_data = NULL,
  6437. .txrx_monitor_set_filter_mcast_data = NULL,
  6438. .txrx_monitor_set_filter_non_data = NULL,
  6439. .txrx_monitor_get_filter_ucast_data = dp_vdev_get_filter_ucast_data,
  6440. .txrx_monitor_get_filter_mcast_data = dp_vdev_get_filter_mcast_data,
  6441. .txrx_monitor_get_filter_non_data = dp_vdev_get_filter_non_data,
  6442. .txrx_reset_monitor_mode = dp_reset_monitor_mode,
  6443. /* Added support for HK advance filter */
  6444. .txrx_set_advance_monitor_filter = dp_pdev_set_advance_monitor_filter,
  6445. };
  6446. static struct cdp_host_stats_ops dp_ops_host_stats = {
  6447. .txrx_per_peer_stats = dp_get_host_peer_stats,
  6448. .get_fw_peer_stats = dp_get_fw_peer_stats,
  6449. .get_htt_stats = dp_get_htt_stats,
  6450. .txrx_enable_enhanced_stats = dp_enable_enhanced_stats,
  6451. .txrx_disable_enhanced_stats = dp_disable_enhanced_stats,
  6452. .txrx_stats_publish = dp_txrx_stats_publish,
  6453. /* TODO */
  6454. };
  6455. static struct cdp_raw_ops dp_ops_raw = {
  6456. /* TODO */
  6457. };
  6458. #ifdef CONFIG_WIN
  6459. static struct cdp_pflow_ops dp_ops_pflow = {
  6460. /* TODO */
  6461. };
  6462. #endif /* CONFIG_WIN */
  6463. #ifdef FEATURE_RUNTIME_PM
  6464. /**
  6465. * dp_runtime_suspend() - ensure DP is ready to runtime suspend
  6466. * @opaque_pdev: DP pdev context
  6467. *
  6468. * DP is ready to runtime suspend if there are no pending TX packets.
  6469. *
  6470. * Return: QDF_STATUS
  6471. */
  6472. static QDF_STATUS dp_runtime_suspend(struct cdp_pdev *opaque_pdev)
  6473. {
  6474. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  6475. struct dp_soc *soc = pdev->soc;
  6476. /* Call DP TX flow control API to check if there is any
  6477. pending packets */
  6478. if (soc->intr_mode == DP_INTR_POLL)
  6479. qdf_timer_stop(&soc->int_timer);
  6480. return QDF_STATUS_SUCCESS;
  6481. }
  6482. /**
  6483. * dp_runtime_resume() - ensure DP is ready to runtime resume
  6484. * @opaque_pdev: DP pdev context
  6485. *
  6486. * Resume DP for runtime PM.
  6487. *
  6488. * Return: QDF_STATUS
  6489. */
  6490. static QDF_STATUS dp_runtime_resume(struct cdp_pdev *opaque_pdev)
  6491. {
  6492. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  6493. struct dp_soc *soc = pdev->soc;
  6494. void *hal_srng;
  6495. int i;
  6496. if (soc->intr_mode == DP_INTR_POLL)
  6497. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  6498. for (i = 0; i < MAX_TCL_DATA_RINGS; i++) {
  6499. hal_srng = soc->tcl_data_ring[i].hal_srng;
  6500. if (hal_srng) {
  6501. /* We actually only need to acquire the lock */
  6502. hal_srng_access_start(soc->hal_soc, hal_srng);
  6503. /* Update SRC ring head pointer for HW to send
  6504. all pending packets */
  6505. hal_srng_access_end(soc->hal_soc, hal_srng);
  6506. }
  6507. }
  6508. return QDF_STATUS_SUCCESS;
  6509. }
  6510. #endif /* FEATURE_RUNTIME_PM */
  6511. static QDF_STATUS dp_bus_suspend(struct cdp_pdev *opaque_pdev)
  6512. {
  6513. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  6514. struct dp_soc *soc = pdev->soc;
  6515. if (soc->intr_mode == DP_INTR_POLL)
  6516. qdf_timer_stop(&soc->int_timer);
  6517. return QDF_STATUS_SUCCESS;
  6518. }
  6519. static QDF_STATUS dp_bus_resume(struct cdp_pdev *opaque_pdev)
  6520. {
  6521. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  6522. struct dp_soc *soc = pdev->soc;
  6523. if (soc->intr_mode == DP_INTR_POLL)
  6524. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  6525. return QDF_STATUS_SUCCESS;
  6526. }
  6527. #ifndef CONFIG_WIN
  6528. static struct cdp_misc_ops dp_ops_misc = {
  6529. .tx_non_std = dp_tx_non_std,
  6530. .get_opmode = dp_get_opmode,
  6531. #ifdef FEATURE_RUNTIME_PM
  6532. .runtime_suspend = dp_runtime_suspend,
  6533. .runtime_resume = dp_runtime_resume,
  6534. #endif /* FEATURE_RUNTIME_PM */
  6535. .pkt_log_init = dp_pkt_log_init,
  6536. .pkt_log_con_service = dp_pkt_log_con_service,
  6537. };
  6538. static struct cdp_flowctl_ops dp_ops_flowctl = {
  6539. /* WIFI 3.0 DP implement as required. */
  6540. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  6541. .flow_pool_map_handler = dp_tx_flow_pool_map,
  6542. .flow_pool_unmap_handler = dp_tx_flow_pool_unmap,
  6543. .register_pause_cb = dp_txrx_register_pause_cb,
  6544. .dump_flow_pool_info = dp_tx_dump_flow_pool_info,
  6545. #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
  6546. };
  6547. static struct cdp_lflowctl_ops dp_ops_l_flowctl = {
  6548. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  6549. };
  6550. #ifdef IPA_OFFLOAD
  6551. static struct cdp_ipa_ops dp_ops_ipa = {
  6552. .ipa_get_resource = dp_ipa_get_resource,
  6553. .ipa_set_doorbell_paddr = dp_ipa_set_doorbell_paddr,
  6554. .ipa_op_response = dp_ipa_op_response,
  6555. .ipa_register_op_cb = dp_ipa_register_op_cb,
  6556. .ipa_get_stat = dp_ipa_get_stat,
  6557. .ipa_tx_data_frame = dp_tx_send_ipa_data_frame,
  6558. .ipa_enable_autonomy = dp_ipa_enable_autonomy,
  6559. .ipa_disable_autonomy = dp_ipa_disable_autonomy,
  6560. .ipa_setup = dp_ipa_setup,
  6561. .ipa_cleanup = dp_ipa_cleanup,
  6562. .ipa_setup_iface = dp_ipa_setup_iface,
  6563. .ipa_cleanup_iface = dp_ipa_cleanup_iface,
  6564. .ipa_enable_pipes = dp_ipa_enable_pipes,
  6565. .ipa_disable_pipes = dp_ipa_disable_pipes,
  6566. .ipa_set_perf_level = dp_ipa_set_perf_level
  6567. };
  6568. #endif
  6569. static struct cdp_bus_ops dp_ops_bus = {
  6570. .bus_suspend = dp_bus_suspend,
  6571. .bus_resume = dp_bus_resume
  6572. };
  6573. static struct cdp_ocb_ops dp_ops_ocb = {
  6574. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  6575. };
  6576. static struct cdp_throttle_ops dp_ops_throttle = {
  6577. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  6578. };
  6579. static struct cdp_mob_stats_ops dp_ops_mob_stats = {
  6580. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  6581. };
  6582. static struct cdp_cfg_ops dp_ops_cfg = {
  6583. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  6584. };
  6585. /*
  6586. * dp_wrapper_peer_get_ref_by_addr - wrapper function to get to peer
  6587. * @dev: physical device instance
  6588. * @peer_mac_addr: peer mac address
  6589. * @local_id: local id for the peer
  6590. * @debug_id: to track enum peer access
  6591. * Return: peer instance pointer
  6592. */
  6593. static inline void *
  6594. dp_wrapper_peer_get_ref_by_addr(struct cdp_pdev *dev, u8 *peer_mac_addr,
  6595. u8 *local_id,
  6596. enum peer_debug_id_type debug_id)
  6597. {
  6598. /*
  6599. * Currently this function does not implement the "get ref"
  6600. * functionality and is mapped to dp_find_peer_by_addr which does not
  6601. * increment the peer ref count. So the peer state is uncertain after
  6602. * calling this API. The functionality needs to be implemented.
  6603. * Accordingly the corresponding release_ref function is NULL.
  6604. */
  6605. return dp_find_peer_by_addr(dev, peer_mac_addr, local_id);
  6606. }
  6607. static struct cdp_peer_ops dp_ops_peer = {
  6608. .register_peer = dp_register_peer,
  6609. .clear_peer = dp_clear_peer,
  6610. .find_peer_by_addr = dp_find_peer_by_addr,
  6611. .find_peer_by_addr_and_vdev = dp_find_peer_by_addr_and_vdev,
  6612. .peer_get_ref_by_addr = dp_wrapper_peer_get_ref_by_addr,
  6613. .peer_release_ref = NULL,
  6614. .local_peer_id = dp_local_peer_id,
  6615. .peer_find_by_local_id = dp_peer_find_by_local_id,
  6616. .peer_state_update = dp_peer_state_update,
  6617. .get_vdevid = dp_get_vdevid,
  6618. .get_vdev_by_sta_id = dp_get_vdev_by_sta_id,
  6619. .peer_get_peer_mac_addr = dp_peer_get_peer_mac_addr,
  6620. .get_vdev_for_peer = dp_get_vdev_for_peer,
  6621. .get_peer_state = dp_get_peer_state,
  6622. .get_last_mgmt_timestamp = dp_get_last_mgmt_timestamp,
  6623. .update_last_mgmt_timestamp = dp_update_last_mgmt_timestamp,
  6624. };
  6625. #endif
  6626. static struct cdp_ops dp_txrx_ops = {
  6627. .cmn_drv_ops = &dp_ops_cmn,
  6628. .ctrl_ops = &dp_ops_ctrl,
  6629. .me_ops = &dp_ops_me,
  6630. .mon_ops = &dp_ops_mon,
  6631. .host_stats_ops = &dp_ops_host_stats,
  6632. .wds_ops = &dp_ops_wds,
  6633. .raw_ops = &dp_ops_raw,
  6634. #ifdef CONFIG_WIN
  6635. .pflow_ops = &dp_ops_pflow,
  6636. #endif /* CONFIG_WIN */
  6637. #ifndef CONFIG_WIN
  6638. .misc_ops = &dp_ops_misc,
  6639. .cfg_ops = &dp_ops_cfg,
  6640. .flowctl_ops = &dp_ops_flowctl,
  6641. .l_flowctl_ops = &dp_ops_l_flowctl,
  6642. #ifdef IPA_OFFLOAD
  6643. .ipa_ops = &dp_ops_ipa,
  6644. #endif
  6645. .bus_ops = &dp_ops_bus,
  6646. .ocb_ops = &dp_ops_ocb,
  6647. .peer_ops = &dp_ops_peer,
  6648. .throttle_ops = &dp_ops_throttle,
  6649. .mob_stats_ops = &dp_ops_mob_stats,
  6650. #endif
  6651. };
  6652. /*
  6653. * dp_soc_set_txrx_ring_map()
  6654. * @dp_soc: DP handler for soc
  6655. *
  6656. * Return: Void
  6657. */
  6658. static void dp_soc_set_txrx_ring_map(struct dp_soc *soc)
  6659. {
  6660. uint32_t i;
  6661. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  6662. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_DEFAULT_MAP][i];
  6663. }
  6664. }
  6665. /*
  6666. * dp_soc_attach_wifi3() - Attach txrx SOC
  6667. * @ctrl_psoc: Opaque SOC handle from control plane
  6668. * @htc_handle: Opaque HTC handle
  6669. * @hif_handle: Opaque HIF handle
  6670. * @qdf_osdev: QDF device
  6671. *
  6672. * Return: DP SOC handle on success, NULL on failure
  6673. */
  6674. /*
  6675. * Local prototype added to temporarily address warning caused by
  6676. * -Wmissing-prototypes. A more correct solution, namely to expose
  6677. * a prototype in an appropriate header file, will come later.
  6678. */
  6679. void *dp_soc_attach_wifi3(void *ctrl_psoc, void *hif_handle,
  6680. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  6681. struct ol_if_ops *ol_ops);
  6682. void *dp_soc_attach_wifi3(void *ctrl_psoc, void *hif_handle,
  6683. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  6684. struct ol_if_ops *ol_ops)
  6685. {
  6686. struct dp_soc *soc = qdf_mem_malloc(sizeof(*soc));
  6687. int target_type;
  6688. if (!soc) {
  6689. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6690. FL("DP SOC memory allocation failed"));
  6691. goto fail0;
  6692. }
  6693. soc->cdp_soc.ops = &dp_txrx_ops;
  6694. soc->cdp_soc.ol_ops = ol_ops;
  6695. soc->ctrl_psoc = ctrl_psoc;
  6696. soc->osdev = qdf_osdev;
  6697. soc->hif_handle = hif_handle;
  6698. soc->hal_soc = hif_get_hal_handle(hif_handle);
  6699. soc->htt_handle = htt_soc_attach(soc, ctrl_psoc, htc_handle,
  6700. soc->hal_soc, qdf_osdev);
  6701. if (!soc->htt_handle) {
  6702. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6703. FL("HTT attach failed"));
  6704. goto fail1;
  6705. }
  6706. soc->wlan_cfg_ctx = wlan_cfg_soc_attach();
  6707. if (!soc->wlan_cfg_ctx) {
  6708. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6709. FL("wlan_cfg_soc_attach failed"));
  6710. goto fail2;
  6711. }
  6712. target_type = hal_get_target_type(soc->hal_soc);
  6713. switch (target_type) {
  6714. case TARGET_TYPE_QCA6290:
  6715. #ifdef QCA_WIFI_QCA6390
  6716. case TARGET_TYPE_QCA6390:
  6717. #endif
  6718. wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
  6719. REO_DST_RING_SIZE_QCA6290);
  6720. break;
  6721. case TARGET_TYPE_QCA8074:
  6722. wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
  6723. REO_DST_RING_SIZE_QCA8074);
  6724. break;
  6725. default:
  6726. qdf_print("%s: Unknown tgt type %d\n", __func__, target_type);
  6727. qdf_assert_always(0);
  6728. break;
  6729. }
  6730. wlan_cfg_set_rx_hash(soc->wlan_cfg_ctx, rx_hash);
  6731. soc->cce_disable = false;
  6732. if (soc->cdp_soc.ol_ops->get_dp_cfg_param) {
  6733. int ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  6734. CDP_CFG_MAX_PEER_ID);
  6735. if (ret != -EINVAL) {
  6736. wlan_cfg_set_max_peer_id(soc->wlan_cfg_ctx, ret);
  6737. }
  6738. ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  6739. CDP_CFG_CCE_DISABLE);
  6740. if (ret == 1)
  6741. soc->cce_disable = true;
  6742. }
  6743. qdf_spinlock_create(&soc->peer_ref_mutex);
  6744. qdf_spinlock_create(&soc->reo_desc_freelist_lock);
  6745. qdf_list_create(&soc->reo_desc_freelist, REO_DESC_FREELIST_SIZE);
  6746. /* fill the tx/rx cpu ring map*/
  6747. dp_soc_set_txrx_ring_map(soc);
  6748. qdf_spinlock_create(&soc->htt_stats.lock);
  6749. /* initialize work queue for stats processing */
  6750. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  6751. /*Initialize inactivity timer for wifison */
  6752. dp_init_inact_timer(soc);
  6753. return (void *)soc;
  6754. fail2:
  6755. htt_soc_detach(soc->htt_handle);
  6756. fail1:
  6757. qdf_mem_free(soc);
  6758. fail0:
  6759. return NULL;
  6760. }
  6761. /*
  6762. * dp_get_pdev_for_mac_id() - Return pdev for mac_id
  6763. *
  6764. * @soc: handle to DP soc
  6765. * @mac_id: MAC id
  6766. *
  6767. * Return: Return pdev corresponding to MAC
  6768. */
  6769. void *dp_get_pdev_for_mac_id(struct dp_soc *soc, uint32_t mac_id)
  6770. {
  6771. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx))
  6772. return soc->pdev_list[mac_id];
  6773. /* Typically for MCL as there only 1 PDEV*/
  6774. return soc->pdev_list[0];
  6775. }
  6776. /*
  6777. * dp_is_hw_dbs_enable() - Procedure to check if DBS is supported
  6778. * @soc: DP SoC context
  6779. * @max_mac_rings: No of MAC rings
  6780. *
  6781. * Return: None
  6782. */
  6783. static
  6784. void dp_is_hw_dbs_enable(struct dp_soc *soc,
  6785. int *max_mac_rings)
  6786. {
  6787. bool dbs_enable = false;
  6788. if (soc->cdp_soc.ol_ops->is_hw_dbs_2x2_capable)
  6789. dbs_enable = soc->cdp_soc.ol_ops->
  6790. is_hw_dbs_2x2_capable(soc->ctrl_psoc);
  6791. *max_mac_rings = (dbs_enable)?(*max_mac_rings):1;
  6792. }
  6793. /*
  6794. * dp_set_pktlog_wifi3() - attach txrx vdev
  6795. * @pdev: Datapath PDEV handle
  6796. * @event: which event's notifications are being subscribed to
  6797. * @enable: WDI event subscribe or not. (True or False)
  6798. *
  6799. * Return: Success, NULL on failure
  6800. */
  6801. #ifdef WDI_EVENT_ENABLE
  6802. int dp_set_pktlog_wifi3(struct dp_pdev *pdev, uint32_t event,
  6803. bool enable)
  6804. {
  6805. struct dp_soc *soc = pdev->soc;
  6806. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  6807. int max_mac_rings = wlan_cfg_get_num_mac_rings
  6808. (pdev->wlan_cfg_ctx);
  6809. uint8_t mac_id = 0;
  6810. dp_is_hw_dbs_enable(soc, &max_mac_rings);
  6811. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
  6812. FL("Max_mac_rings %d \n"),
  6813. max_mac_rings);
  6814. if (enable) {
  6815. switch (event) {
  6816. case WDI_EVENT_RX_DESC:
  6817. if (pdev->monitor_vdev) {
  6818. /* Nothing needs to be done if monitor mode is
  6819. * enabled
  6820. */
  6821. return 0;
  6822. }
  6823. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_FULL) {
  6824. pdev->rx_pktlog_mode = DP_RX_PKTLOG_FULL;
  6825. htt_tlv_filter.mpdu_start = 1;
  6826. htt_tlv_filter.msdu_start = 1;
  6827. htt_tlv_filter.msdu_end = 1;
  6828. htt_tlv_filter.mpdu_end = 1;
  6829. htt_tlv_filter.packet_header = 1;
  6830. htt_tlv_filter.attention = 1;
  6831. htt_tlv_filter.ppdu_start = 1;
  6832. htt_tlv_filter.ppdu_end = 1;
  6833. htt_tlv_filter.ppdu_end_user_stats = 1;
  6834. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  6835. htt_tlv_filter.ppdu_end_status_done = 1;
  6836. htt_tlv_filter.enable_fp = 1;
  6837. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  6838. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  6839. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  6840. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  6841. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  6842. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  6843. for (mac_id = 0; mac_id < max_mac_rings;
  6844. mac_id++) {
  6845. int mac_for_pdev =
  6846. dp_get_mac_id_for_pdev(mac_id,
  6847. pdev->pdev_id);
  6848. htt_h2t_rx_ring_cfg(soc->htt_handle,
  6849. mac_for_pdev,
  6850. pdev->rxdma_mon_status_ring[mac_id]
  6851. .hal_srng,
  6852. RXDMA_MONITOR_STATUS,
  6853. RX_BUFFER_SIZE,
  6854. &htt_tlv_filter);
  6855. }
  6856. if (soc->reap_timer_init)
  6857. qdf_timer_mod(&soc->mon_reap_timer,
  6858. DP_INTR_POLL_TIMER_MS);
  6859. }
  6860. break;
  6861. case WDI_EVENT_LITE_RX:
  6862. if (pdev->monitor_vdev) {
  6863. /* Nothing needs to be done if monitor mode is
  6864. * enabled
  6865. */
  6866. return 0;
  6867. }
  6868. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_LITE) {
  6869. pdev->rx_pktlog_mode = DP_RX_PKTLOG_LITE;
  6870. htt_tlv_filter.ppdu_start = 1;
  6871. htt_tlv_filter.ppdu_end = 1;
  6872. htt_tlv_filter.ppdu_end_user_stats = 1;
  6873. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  6874. htt_tlv_filter.ppdu_end_status_done = 1;
  6875. htt_tlv_filter.mpdu_start = 1;
  6876. htt_tlv_filter.enable_fp = 1;
  6877. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  6878. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  6879. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  6880. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  6881. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  6882. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  6883. for (mac_id = 0; mac_id < max_mac_rings;
  6884. mac_id++) {
  6885. int mac_for_pdev =
  6886. dp_get_mac_id_for_pdev(mac_id,
  6887. pdev->pdev_id);
  6888. htt_h2t_rx_ring_cfg(soc->htt_handle,
  6889. mac_for_pdev,
  6890. pdev->rxdma_mon_status_ring[mac_id]
  6891. .hal_srng,
  6892. RXDMA_MONITOR_STATUS,
  6893. RX_BUFFER_SIZE_PKTLOG_LITE,
  6894. &htt_tlv_filter);
  6895. }
  6896. if (soc->reap_timer_init)
  6897. qdf_timer_mod(&soc->mon_reap_timer,
  6898. DP_INTR_POLL_TIMER_MS);
  6899. }
  6900. break;
  6901. case WDI_EVENT_LITE_T2H:
  6902. if (pdev->monitor_vdev) {
  6903. /* Nothing needs to be done if monitor mode is
  6904. * enabled
  6905. */
  6906. return 0;
  6907. }
  6908. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  6909. int mac_for_pdev = dp_get_mac_id_for_pdev(
  6910. mac_id, pdev->pdev_id);
  6911. pdev->pktlog_ppdu_stats = true;
  6912. dp_h2t_cfg_stats_msg_send(pdev,
  6913. DP_PPDU_TXLITE_STATS_BITMASK_CFG,
  6914. mac_for_pdev);
  6915. }
  6916. break;
  6917. default:
  6918. /* Nothing needs to be done for other pktlog types */
  6919. break;
  6920. }
  6921. } else {
  6922. switch (event) {
  6923. case WDI_EVENT_RX_DESC:
  6924. case WDI_EVENT_LITE_RX:
  6925. if (pdev->monitor_vdev) {
  6926. /* Nothing needs to be done if monitor mode is
  6927. * enabled
  6928. */
  6929. return 0;
  6930. }
  6931. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_DISABLED) {
  6932. pdev->rx_pktlog_mode = DP_RX_PKTLOG_DISABLED;
  6933. for (mac_id = 0; mac_id < max_mac_rings;
  6934. mac_id++) {
  6935. int mac_for_pdev =
  6936. dp_get_mac_id_for_pdev(mac_id,
  6937. pdev->pdev_id);
  6938. htt_h2t_rx_ring_cfg(soc->htt_handle,
  6939. mac_for_pdev,
  6940. pdev->rxdma_mon_status_ring[mac_id]
  6941. .hal_srng,
  6942. RXDMA_MONITOR_STATUS,
  6943. RX_BUFFER_SIZE,
  6944. &htt_tlv_filter);
  6945. }
  6946. if (soc->reap_timer_init)
  6947. qdf_timer_stop(&soc->mon_reap_timer);
  6948. }
  6949. break;
  6950. case WDI_EVENT_LITE_T2H:
  6951. if (pdev->monitor_vdev) {
  6952. /* Nothing needs to be done if monitor mode is
  6953. * enabled
  6954. */
  6955. return 0;
  6956. }
  6957. /* To disable HTT_H2T_MSG_TYPE_PPDU_STATS_CFG in FW
  6958. * passing value 0. Once these macros will define in htt
  6959. * header file will use proper macros
  6960. */
  6961. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  6962. int mac_for_pdev =
  6963. dp_get_mac_id_for_pdev(mac_id,
  6964. pdev->pdev_id);
  6965. pdev->pktlog_ppdu_stats = false;
  6966. if (!pdev->enhanced_stats_en && !pdev->tx_sniffer_enable && !pdev->mcopy_mode) {
  6967. dp_h2t_cfg_stats_msg_send(pdev, 0,
  6968. mac_for_pdev);
  6969. } else if (pdev->tx_sniffer_enable || pdev->mcopy_mode) {
  6970. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_SNIFFER,
  6971. mac_for_pdev);
  6972. } else if (pdev->enhanced_stats_en) {
  6973. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_ENH_STATS,
  6974. mac_for_pdev);
  6975. }
  6976. }
  6977. break;
  6978. default:
  6979. /* Nothing needs to be done for other pktlog types */
  6980. break;
  6981. }
  6982. }
  6983. return 0;
  6984. }
  6985. #endif