cam_cpas_api.h 31 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022-2024, Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #ifndef _CAM_CPAS_API_H_
  7. #define _CAM_CPAS_API_H_
  8. #include <linux/device.h>
  9. #include <linux/platform_device.h>
  10. #include <media/cam_cpas.h>
  11. #include "cam_soc_util.h"
  12. #include "cam_req_mgr_interface.h"
  13. #define CAM_HW_IDENTIFIER_LENGTH 128
  14. /* Default AXI Bandwidth vote */
  15. #define CAM_CPAS_DEFAULT_AXI_BW 1024
  16. /* Default RT AXI Bandwidth vote */
  17. #define CAM_CPAS_DEFAULT_RT_AXI_BW 2000000000L
  18. #define CAM_CPAS_MAX_PATHS_PER_CLIENT 15
  19. #define CAM_CPAS_API_PATH_DATA_STD_START 512
  20. #define CAM_CPAS_VOTE_LEVEL_NONE 0
  21. #define CAM_CPAS_VOTE_LEVEL_MAX 3
  22. /* Qos Selection mask */
  23. #define CAM_CPAS_QOS_DEFAULT_SETTINGS_MASK 0x1
  24. #define CAM_CPAS_QOS_CUSTOM_SETTINGS_MASK 0x2
  25. /**
  26. * Secure camera QoS update id - Enum for identify QOS settings update type
  27. */
  28. enum secure_camera_qos_update_type {
  29. CAM_QOS_UPDATE_TYPE_STATIC = 0x0,
  30. CAM_QOS_UPDATE_TYPE_SMART = 0x1,
  31. CAM_QOS_UPDATE_TYPE_MAX,
  32. };
  33. /**
  34. * enum cam_cpas_regbase_types - Enum for cpas regbase available for clients
  35. * to read/write
  36. */
  37. enum cam_cpas_regbase_types {
  38. CAM_CPAS_REGBASE_CPASTOP,
  39. CAM_CPAS_REGBASE_MAX
  40. };
  41. /**
  42. * enum cam_cpas_vote_type - Enum for cpas vote type
  43. */
  44. enum cam_cpas_vote_type {
  45. CAM_CPAS_VOTE_TYPE_HLOS,
  46. CAM_CPAS_VOTE_TYPE_DRV,
  47. CAM_CPAS_VOTE_TYPE_MAX,
  48. };
  49. /**
  50. * enum cam_cpas_hw_index - Enum for identify HW index
  51. */
  52. enum cam_cpas_hw_index {
  53. CAM_CPAS_HW_IDX_ANY = 0,
  54. CAM_CPAS_HW_IDX_0 = 1<<0,
  55. CAM_CPAS_HW_IDX_1 = 1<<1,
  56. CAM_CPAS_HW_IDX_2 = 1<<2,
  57. CAM_CPAS_HW_IDX_3 = 1<<3,
  58. CAM_CPAS_HW_IDX_4 = 1<<4,
  59. CAM_CPAS_HW_IDX_5 = 1<<5,
  60. CAM_CPAS_HW_IDX_6 = 1<<6,
  61. CAM_CPAS_HW_IDX_7 = 1<<7,
  62. CAM_CPAS_HW_IDX_MAX = 1<<8
  63. };
  64. /**
  65. * enum cam_cpas_camera_version Enum for Titan Camera Versions
  66. */
  67. enum cam_cpas_camera_version {
  68. CAM_CPAS_CAMERA_VERSION_NONE = 0,
  69. CAM_CPAS_CAMERA_VERSION_150 = 0x00010500,
  70. CAM_CPAS_CAMERA_VERSION_170 = 0x00010700,
  71. CAM_CPAS_CAMERA_VERSION_175 = 0x00010705,
  72. CAM_CPAS_CAMERA_VERSION_480 = 0x00040800,
  73. CAM_CPAS_CAMERA_VERSION_520 = 0x00050200,
  74. CAM_CPAS_CAMERA_VERSION_540 = 0x00050400,
  75. CAM_CPAS_CAMERA_VERSION_580 = 0x00050800,
  76. CAM_CPAS_CAMERA_VERSION_545 = 0x00050405,
  77. CAM_CPAS_CAMERA_VERSION_570 = 0x00050700,
  78. CAM_CPAS_CAMERA_VERSION_680 = 0x00060800,
  79. CAM_CPAS_CAMERA_VERSION_165 = 0x00010605,
  80. CAM_CPAS_CAMERA_VERSION_780 = 0x00070800,
  81. CAM_CPAS_CAMERA_VERSION_640 = 0x00060400,
  82. CAM_CPAS_CAMERA_VERSION_880 = 0x00080800,
  83. CAM_CPAS_CAMERA_VERSION_980 = 0x00090800,
  84. CAM_CPAS_CAMERA_VERSION_860 = 0x00080600,
  85. CAM_CPAS_CAMERA_VERSION_770 = 0x00070700,
  86. CAM_CPAS_CAMERA_VERSION_665 = 0x00060605,
  87. CAM_CPAS_CAMERA_VERSION_MAX
  88. };
  89. /**
  90. * enum cam_cpas_version Enum for Titan CPAS Versions
  91. */
  92. enum cam_cpas_version {
  93. CAM_CPAS_VERSION_NONE = 0,
  94. CAM_CPAS_VERSION_100 = 0x10000000,
  95. CAM_CPAS_VERSION_101 = 0x10000001,
  96. CAM_CPAS_VERSION_110 = 0x10010000,
  97. CAM_CPAS_VERSION_120 = 0x10020000,
  98. CAM_CPAS_VERSION_130 = 0x10030000,
  99. CAM_CPAS_VERSION_200 = 0x20000000,
  100. CAM_CPAS_VERSION_210 = 0x20010000,
  101. CAM_CPAS_VERSION_MAX
  102. };
  103. /**
  104. * enum cam_cpas_camera_version_map_id Enum for camera version map id
  105. * This enum is mapped with cam_cpas_camera_version
  106. */
  107. enum cam_cpas_camera_version_map_id {
  108. CAM_CPAS_CAMERA_VERSION_ID_150 = 0x0,
  109. CAM_CPAS_CAMERA_VERSION_ID_170 = 0x1,
  110. CAM_CPAS_CAMERA_VERSION_ID_175 = 0x2,
  111. CAM_CPAS_CAMERA_VERSION_ID_480 = 0x3,
  112. CAM_CPAS_CAMERA_VERSION_ID_580 = 0x4,
  113. CAM_CPAS_CAMERA_VERSION_ID_520 = 0x5,
  114. CAM_CPAS_CAMERA_VERSION_ID_540 = 0x6,
  115. CAM_CPAS_CAMERA_VERSION_ID_545 = 0x7,
  116. CAM_CPAS_CAMERA_VERSION_ID_570 = 0x8,
  117. CAM_CPAS_CAMERA_VERSION_ID_680 = 0x9,
  118. CAM_CPAS_CAMERA_VERSION_ID_165 = 0xA,
  119. CAM_CPAS_CAMERA_VERSION_ID_780 = 0xB,
  120. CAM_CPAS_CAMERA_VERSION_ID_640 = 0xC,
  121. CAM_CPAS_CAMERA_VERSION_ID_880 = 0xD,
  122. CAM_CPAS_CAMERA_VERSION_ID_980 = 0xE,
  123. CAM_CPAS_CAMERA_VERSION_ID_860 = 0xF,
  124. CAM_CPAS_CAMERA_VERSION_ID_770 = 0x10,
  125. CAM_CPAS_CAMERA_VERSION_ID_665 = 0x11,
  126. CAM_CPAS_CAMERA_VERSION_ID_MAX
  127. };
  128. /**
  129. * enum cam_cpas_version_map_id Enum for cpas version map id
  130. * This enum is mapped with cam_cpas_version
  131. */
  132. enum cam_cpas_version_map_id {
  133. CAM_CPAS_VERSION_ID_100 = 0x0,
  134. CAM_CPAS_VERSION_ID_101 = 0x1,
  135. CAM_CPAS_VERSION_ID_110 = 0x2,
  136. CAM_CPAS_VERSION_ID_120 = 0x3,
  137. CAM_CPAS_VERSION_ID_130 = 0x4,
  138. CAM_CPAS_VERSION_ID_200 = 0x5,
  139. CAM_CPAS_VERSION_ID_210 = 0x6,
  140. CAM_CPAS_VERSION_ID_MAX
  141. };
  142. /**
  143. * enum cam_cpas_hw_version - Enum for Titan CPAS HW Versions
  144. */
  145. enum cam_cpas_hw_version {
  146. CAM_CPAS_TITAN_NONE = 0,
  147. CAM_CPAS_TITAN_150_V100 = 0x150100,
  148. CAM_CPAS_TITAN_165_V100 = 0x165100,
  149. CAM_CPAS_TITAN_170_V100 = 0x170100,
  150. CAM_CPAS_TITAN_170_V110 = 0x170110,
  151. CAM_CPAS_TITAN_170_V120 = 0x170120,
  152. CAM_CPAS_TITAN_170_V200 = 0x170200,
  153. CAM_CPAS_TITAN_175_V100 = 0x175100,
  154. CAM_CPAS_TITAN_175_V101 = 0x175101,
  155. CAM_CPAS_TITAN_175_V120 = 0x175120,
  156. CAM_CPAS_TITAN_175_V130 = 0x175130,
  157. CAM_CPAS_TITAN_480_V100 = 0x480100,
  158. CAM_CPAS_TITAN_580_V100 = 0x580100,
  159. CAM_CPAS_TITAN_540_V100 = 0x540100,
  160. CAM_CPAS_TITAN_520_V100 = 0x520100,
  161. CAM_CPAS_TITAN_545_V100 = 0x545100,
  162. CAM_CPAS_TITAN_570_V100 = 0x570100,
  163. CAM_CPAS_TITAN_570_V200 = 0x570200,
  164. CAM_CPAS_TITAN_680_V100 = 0x680100,
  165. CAM_CPAS_TITAN_680_V110 = 0x680110,
  166. CAM_CPAS_TITAN_780_V100 = 0x780100,
  167. CAM_CPAS_TITAN_640_V200 = 0x640200,
  168. CAM_CPAS_TITAN_640_V210 = 0x640210,
  169. CAM_CPAS_TITAN_880_V100 = 0x880100,
  170. CAM_CPAS_TITAN_980_V100 = 0x980100,
  171. CAM_CPAS_TITAN_860_V100 = 0x860100,
  172. CAM_CPAS_TITAN_770_V100 = 0x770100,
  173. CAM_CPAS_TITAN_665_V100 = 0x665100,
  174. CAM_CPAS_TITAN_MAX
  175. };
  176. /**
  177. * enum cam_camnoc_slave_error_codes - Enum for camnoc slave error codes
  178. *
  179. */
  180. enum cam_camnoc_slave_error_codes {
  181. CAM_CAMNOC_TARGET_ERROR,
  182. CAM_CAMNOC_ADDRESS_DECODE_ERROR,
  183. CAM_CAMNOC_UNSUPPORTED_REQUEST_ERROR,
  184. CAM_CAMNOC_DISCONNECTED_TARGET_ERROR,
  185. CAM_CAMNOC_SECURITY_VIOLATION,
  186. CAM_CAMNOC_HIDDEN_SECURITY_VIOLATION,
  187. CAM_CAMNOC_TIME_OUT,
  188. CAM_CAMNOC_UNUSED,
  189. };
  190. /**
  191. * enum cam_camnoc_irq_type - Enum for camnoc irq types
  192. *
  193. * @CAM_CAMNOC_IRQ_SLAVE_ERROR: Each slave port in CAMNOC (3 QSB ports and
  194. * 1 QHB port) has an error logger. The error
  195. * observed at any slave port is logged into
  196. * the error logger register and an IRQ is
  197. * triggered
  198. * @CAM_CAMNOC_IRQ_IFE_UBWC_ENCODE_ERROR : Triggered if any error detected
  199. * in the IFE UBWC encoder instance
  200. * @CAM_CAMNOC_IRQ_IFE_UBWC_STATS_ENCODE_ERROR: Triggered if any error detected
  201. * in the IFE UBWC-Stats encoder
  202. * instance
  203. * @CAM_CAMNOC_IRQ_IFE02_UBWC_ENCODE_ERROR : Triggered if any error detected
  204. * in the IFE0 UBWC encoder instance
  205. * @CAM_CAMNOC_IRQ_IFE13_UBWC_ENCODE_ERROR : Triggered if any error detected
  206. * in the IFE1 or IFE3 UBWC encoder
  207. * instance
  208. * @CAM_CAMNOC_IRQ_IFE0_UBWC_ENCODE_ERROR : Triggered if any error detected
  209. * in the IFE0 UBWC encoder instance
  210. * @CAM_CAMNOC_IRQ_IFE1_WR_UBWC_ENCODE_ERROR : Triggered if any error detected
  211. * in the IFE1 UBWC encoder
  212. * instance
  213. * @CAM_CAMNOC_IRQ_IPE_UBWC_ENCODE_ERROR : Triggered if any error detected
  214. * in the IPE write path encoder
  215. * instance
  216. * @CAM_CAMNOC_IRQ_BPS_UBWC_ENCODE_ERROR : Triggered if any error detected
  217. * in the BPS write path encoder
  218. * instance
  219. * @CAM_CAMNOC_IRQ_IPE1_BPS_UBWC_DECODE_ERROR: Triggered if any error detected
  220. * in the IPE1/BPS read path decoder
  221. * instance
  222. * @CAM_CAMNOC_IRQ_IPE0_UBWC_DECODE_ERROR : Triggered if any error detected
  223. * in the IPE0 read path decoder
  224. * instance
  225. * @CAM_CAMNOC_IRQ_IPE1_UBWC_DECODE_ERROR : Triggered if any error detected
  226. * in the IPE1 read path decoder
  227. * instance
  228. * @CAM_CAMNOC_IRQ_IPE_BPS_UBWC_DECODE_ERROR: Triggered if any error detected
  229. * in the IPE/BPS UBWC decoder
  230. * instance
  231. * @CAM_CAMNOC_IRQ_IPE_BPS_UBWC_ENCODE_ERROR: Triggered if any error detected
  232. * in the IPE/BPS UBWC encoder
  233. * instance
  234. * @CAM_CAMNOC_IRQ_OFE_WR_UBWC_ENCODE_ERROR : Triggered if any error detected
  235. * in the OFE write UBWC decoder
  236. * instance
  237. * @CAM_CAMNOC_IRQ_OFE_RD_UBWC_DECODE_ERROR : Triggered if any error detected
  238. * in the OFE read UBWC decoder
  239. * instance
  240. * @CAM_CAMNOC_IRQ_TFE_UBWC_ENCODE_ERROR : Triggered if any error detected
  241. * in the TFE UBWC encoder
  242. * instance
  243. * @CAM_CAMNOC_IRQ_AHB_TIMEOUT : Triggered when the QHS_ICP slave
  244. * times out after 4000 AHB cycles
  245. */
  246. enum cam_camnoc_irq_type {
  247. CAM_CAMNOC_IRQ_SLAVE_ERROR,
  248. CAM_CAMNOC_IRQ_IFE_UBWC_ENCODE_ERROR,
  249. CAM_CAMNOC_IRQ_IFE_UBWC_STATS_ENCODE_ERROR,
  250. CAM_CAMNOC_IRQ_IFE_UBWC_STATS_1_ENCODE_ERROR,
  251. CAM_CAMNOC_IRQ_IFE02_UBWC_ENCODE_ERROR,
  252. CAM_CAMNOC_IRQ_IFE13_UBWC_ENCODE_ERROR,
  253. CAM_CAMNOC_IRQ_IFE0_UBWC_ENCODE_ERROR,
  254. CAM_CAMNOC_IRQ_IFE1_WRITE_UBWC_ENCODE_ERROR,
  255. CAM_CAMNOC_IRQ_IPE_UBWC_ENCODE_ERROR,
  256. CAM_CAMNOC_IRQ_BPS_UBWC_ENCODE_ERROR,
  257. CAM_CAMNOC_IRQ_IPE1_BPS_UBWC_DECODE_ERROR,
  258. CAM_CAMNOC_IRQ_IPE0_UBWC_DECODE_ERROR,
  259. CAM_CAMNOC_IRQ_IPE1_UBWC_DECODE_ERROR,
  260. CAM_CAMNOC_IRQ_IPE_BPS_UBWC_DECODE_ERROR,
  261. CAM_CAMNOC_IRQ_IPE_BPS_UBWC_ENCODE_ERROR,
  262. CAM_CAMNOC_IRQ_OFE_WR_UBWC_ENCODE_ERROR,
  263. CAM_CAMNOC_IRQ_OFE_RD_UBWC_DECODE_ERROR,
  264. CAM_CAMNOC_IRQ_TFE_UBWC_ENCODE_ERROR,
  265. CAM_CAMNOC_IRQ_AHB_TIMEOUT,
  266. };
  267. /**
  268. * enum cam_sys_cache_config_types - Enum for camera llc's
  269. */
  270. enum cam_sys_cache_config_types {
  271. CAM_LLCC_SMALL_1 = 0,
  272. CAM_LLCC_SMALL_2 = 1,
  273. CAM_LLCC_LARGE_1 = 2,
  274. CAM_LLCC_LARGE_2 = 3,
  275. CAM_LLCC_LARGE_3 = 4,
  276. CAM_LLCC_LARGE_4 = 5,
  277. CAM_LLCC_MAX = 6,
  278. };
  279. /**
  280. * enum cam_sys_cache_llcc_staling_mode - Enum for camera llc's stalling mode
  281. */
  282. enum cam_sys_cache_llcc_staling_mode {
  283. CAM_LLCC_STALING_MODE_CAPACITY,
  284. CAM_LLCC_STALING_MODE_NOTIFY,
  285. CAM_LLCC_STALING_MODE_MAX,
  286. };
  287. /**
  288. * enum cam_sys_cache_llcc_staling_mode - Enum for camera llc's stalling mode
  289. */
  290. enum cam_sys_cache_llcc_staling_op_type {
  291. CAM_LLCC_NOTIFY_STALING_EVICT,
  292. CAM_LLCC_NOTIFY_STALING_FORGET,
  293. CAM_LLCC_NOTIFY_STALING_OPS_MAX
  294. };
  295. /**
  296. * enum cam_subparts_index - Enum for camera subparts indices
  297. */
  298. enum cam_subparts_index {
  299. CAM_IFE_HW_IDX,
  300. CAM_IFE_LITE_HW_IDX,
  301. CAM_SFE_HW_IDX,
  302. CAM_CUSTOM_HW_IDX
  303. };
  304. /**
  305. * struct cam_camnoc_irq_slave_err_data : Data for Slave error.
  306. *
  307. * @mainctrl : Err logger mainctrl info
  308. * @errvld : Err logger errvld info
  309. * @errlog0_low : Err logger errlog0_low info
  310. * @errlog0_high : Err logger errlog0_high info
  311. * @errlog1_low : Err logger errlog1_low info
  312. * @errlog1_high : Err logger errlog1_high info
  313. * @errlog2_low : Err logger errlog2_low info
  314. * @errlog2_high : Err logger errlog2_high info
  315. * @errlog3_low : Err logger errlog3_low info
  316. * @errlog3_high : Err logger errlog3_high info
  317. *
  318. */
  319. struct cam_camnoc_irq_slave_err_data {
  320. union {
  321. struct {
  322. uint32_t stall_en : 1; /* bit 0 */
  323. uint32_t fault_en : 1; /* bit 1 */
  324. uint32_t rsv : 30; /* bits 2-31 */
  325. };
  326. uint32_t value;
  327. } mainctrl;
  328. union {
  329. struct {
  330. uint32_t err_vld : 1; /* bit 0 */
  331. uint32_t rsv : 31; /* bits 1-31 */
  332. };
  333. uint32_t value;
  334. } errvld;
  335. union {
  336. struct {
  337. uint32_t loginfo_vld : 1; /* bit 0 */
  338. uint32_t word_error : 1; /* bit 1 */
  339. uint32_t non_secure : 1; /* bit 2 */
  340. uint32_t device : 1; /* bit 3 */
  341. uint32_t opc : 3; /* bits 4 - 6 */
  342. uint32_t rsv0 : 1; /* bit 7 */
  343. uint32_t err_code : 3; /* bits 8 - 10 */
  344. uint32_t sizef : 3; /* bits 11 - 13 */
  345. uint32_t rsv1 : 2; /* bits 14 - 15 */
  346. uint32_t addr_space : 6; /* bits 16 - 21 */
  347. uint32_t rsv2 : 10; /* bits 22 - 31 */
  348. };
  349. uint32_t value;
  350. } errlog0_low;
  351. union {
  352. struct {
  353. uint32_t len1 : 10; /* bits 0 - 9 */
  354. uint32_t rsv : 22; /* bits 10 - 31 */
  355. };
  356. uint32_t value;
  357. } errlog0_high;
  358. union {
  359. struct {
  360. uint32_t path : 16; /* bits 0 - 15 */
  361. uint32_t rsv : 16; /* bits 16 - 31 */
  362. };
  363. uint32_t value;
  364. } errlog1_low;
  365. union {
  366. struct {
  367. uint32_t extid : 18; /* bits 0 - 17 */
  368. uint32_t rsv : 14; /* bits 18 - 31 */
  369. };
  370. uint32_t value;
  371. } errlog1_high;
  372. union {
  373. struct {
  374. uint32_t errlog2_lsb : 32; /* bits 0 - 31 */
  375. };
  376. uint32_t value;
  377. } errlog2_low;
  378. union {
  379. struct {
  380. uint32_t errlog2_msb : 16; /* bits 0 - 16 */
  381. uint32_t rsv : 16; /* bits 16 - 31 */
  382. };
  383. uint32_t value;
  384. } errlog2_high;
  385. union {
  386. struct {
  387. uint32_t errlog3_lsb : 32; /* bits 0 - 31 */
  388. };
  389. uint32_t value;
  390. } errlog3_low;
  391. union {
  392. struct {
  393. uint32_t errlog3_msb : 32; /* bits 0 - 31 */
  394. };
  395. uint32_t value;
  396. } errlog3_high;
  397. };
  398. /**
  399. * struct cam_camnoc_irq_ubwc_enc_data : Data for UBWC Encode error.
  400. *
  401. * @encerr_status : Encode error status
  402. *
  403. */
  404. struct cam_camnoc_irq_ubwc_enc_data {
  405. union {
  406. struct {
  407. uint32_t encerrstatus : 3; /* bits 0 - 2 */
  408. uint32_t rsv : 29; /* bits 3 - 31 */
  409. };
  410. uint32_t value;
  411. } encerr_status;
  412. };
  413. /**
  414. * struct cam_camnoc_irq_ubwc_dec_data : Data for UBWC Decode error.
  415. *
  416. * @decerr_status : Decoder error status
  417. * @thr_err : Set to 1 if
  418. * At least one of the bflc_len fields in the bit steam exceeds
  419. * its threshold value. This error is possible only for
  420. * RGBA1010102, TP10, and RGB565 formats
  421. * @fcl_err : Set to 1 if
  422. * Fast clear with a legal non-RGB format
  423. * @len_md_err : Set to 1 if
  424. * The calculated burst length does not match burst length
  425. * specified by the metadata value
  426. * @format_err : Set to 1 if
  427. * Illegal format
  428. * 1. bad format :2,3,6
  429. * 2. For 32B MAL, metadata=6
  430. * 3. For 32B MAL RGB565, Metadata != 0,1,7
  431. * 4. For 64B MAL RGB565, metadata[3:1] == 1,2
  432. *
  433. */
  434. struct cam_camnoc_irq_ubwc_dec_data {
  435. union {
  436. struct {
  437. uint32_t thr_err : 1; /* bit 0 */
  438. uint32_t fcl_err : 1; /* bit 1 */
  439. uint32_t len_md_err : 1; /* bit 2 */
  440. uint32_t format_err : 1; /* bit 3 */
  441. uint32_t rsv : 28; /* bits 4 - 31 */
  442. };
  443. uint32_t value;
  444. } decerr_status;
  445. };
  446. struct cam_camnoc_irq_ahb_timeout_data {
  447. uint32_t data;
  448. };
  449. /**
  450. * struct cam_cpas_irq_data : CAMNOC IRQ data
  451. *
  452. * @irq_type : To identify the type of IRQ
  453. * @u : Union of irq err data information
  454. * @slave_err : Data for Slave error.
  455. * Valid if type is CAM_CAMNOC_IRQ_SLAVE_ERROR
  456. * @enc_err : Data for UBWC Encode error.
  457. * Valid if type is one of below:
  458. * CAM_CAMNOC_IRQ_IFE02_UBWC_ENCODE_ERROR
  459. * CAM_CAMNOC_IRQ_IFE13_UBWC_ENCODE_ERROR
  460. * CAM_CAMNOC_IRQ_IPE_BPS_UBWC_ENCODE_ERROR
  461. * @dec_err : Data for UBWC Decode error.
  462. * Valid if type is CAM_CAMNOC_IRQ_IPE_BPS_UBWC_DECODE_ERROR
  463. * @ahb_err : Data for Slave error.
  464. * Valid if type is CAM_CAMNOC_IRQ_AHB_TIMEOUT
  465. *
  466. */
  467. struct cam_cpas_irq_data {
  468. enum cam_camnoc_irq_type irq_type;
  469. union {
  470. struct cam_camnoc_irq_slave_err_data slave_err;
  471. struct cam_camnoc_irq_ubwc_enc_data enc_err;
  472. struct cam_camnoc_irq_ubwc_dec_data dec_err;
  473. struct cam_camnoc_irq_ahb_timeout_data ahb_err;
  474. } u;
  475. };
  476. /*
  477. * CPAS client callback
  478. *
  479. * @client_handle : CPAS client handle
  480. * @userdata : User data given at the time of register
  481. * @irq_data : Event data
  482. */
  483. typedef bool (*cam_cpas_client_cb_func)(
  484. uint32_t client_handle, void *userdata,
  485. struct cam_cpas_irq_data *irq_data);
  486. /**
  487. * struct cam_cpas_register_params : Register params for cpas client
  488. *
  489. * @identifier : Input identifier string which is the device label
  490. * from dt like vfe, ife, jpeg etc
  491. * @cell_index : Input integer identifier pointing to the cell index
  492. * from dt of the device. This can be used to form a
  493. * unique string with @identifier like vfe0, ife1,
  494. * jpeg0, etc
  495. * @dev : device handle
  496. * @userdata : Input private data which will be passed as
  497. * an argument while callback.
  498. * @cam_cpas_callback : Input callback pointer for triggering the
  499. * callbacks from CPAS driver.
  500. * @client_handle : Output Unique handle generated for this register
  501. *
  502. */
  503. struct cam_cpas_register_params {
  504. char identifier[CAM_HW_IDENTIFIER_LENGTH];
  505. uint32_t cell_index;
  506. struct device *dev;
  507. void *userdata;
  508. cam_cpas_client_cb_func cam_cpas_client_cb;
  509. uint32_t client_handle;
  510. };
  511. /**
  512. * enum cam_vote_type - Enum for voting type
  513. *
  514. * @CAM_VOTE_ABSOLUTE : Absolute vote
  515. * @CAM_VOTE_DYNAMIC : Dynamic vote
  516. */
  517. enum cam_vote_type {
  518. CAM_VOTE_ABSOLUTE,
  519. CAM_VOTE_DYNAMIC,
  520. };
  521. /**
  522. * struct cam_ahb_vote : AHB vote
  523. *
  524. * @type : AHB voting type.
  525. * CAM_VOTE_ABSOLUTE : vote based on the value 'level' is set
  526. * CAM_VOTE_DYNAMIC : vote calculated dynamically using 'freq'
  527. * and 'dev' handle is set
  528. * @level : AHB vote level
  529. * @freq : AHB vote dynamic frequency
  530. *
  531. */
  532. struct cam_ahb_vote {
  533. enum cam_vote_type type;
  534. union {
  535. enum cam_vote_level level;
  536. unsigned long freq;
  537. } vote;
  538. };
  539. /**
  540. * struct cam_cpas_axi_per_path_bw_vote - Internal per path bandwidth vote information
  541. *
  542. * @usage_data: client usage data (left/right/rdi)
  543. * @transac_type: Transaction type on the path (read/write)
  544. * @path_data_type: Path for which vote is given (video, display, rdi)
  545. * @vote_level: Vote level for this path
  546. * @camnoc_bw: CAMNOC bw for this path
  547. * @mnoc_ab_bw: MNOC AB bw for this path
  548. * @mnoc_ib_bw: MNOC IB bw for this path
  549. */
  550. struct cam_cpas_axi_per_path_bw_vote {
  551. uint32_t usage_data;
  552. uint32_t transac_type;
  553. uint32_t path_data_type;
  554. uint32_t vote_level;
  555. uint64_t camnoc_bw;
  556. uint64_t mnoc_ab_bw;
  557. uint64_t mnoc_ib_bw;
  558. };
  559. /**
  560. * struct cam_axi_vote : AXI vote
  561. *
  562. * @num_paths: Number of paths on which BW vote is sent to CPAS
  563. * @axi_path: Per path BW vote info
  564. *
  565. */
  566. struct cam_axi_vote {
  567. uint32_t num_paths;
  568. struct cam_cpas_axi_per_path_bw_vote axi_path[CAM_CPAS_MAX_PATHS_PER_CLIENT];
  569. };
  570. /**
  571. * cam_cpas_prepare_subpart_info()
  572. *
  573. * @brief: API to update the number of ifes, ife_lites, sfes and custom
  574. * in the struct cam_cpas_private_soc.
  575. *
  576. * @idx : Camera subpart index
  577. * @num_subpart_available : Number of available subparts
  578. * @num_subpart_functional: Number of functional subparts
  579. *
  580. * @returns 0 on success & -EINVAL when @subpart_type is invalid.
  581. *
  582. */
  583. int cam_cpas_prepare_subpart_info(
  584. enum cam_subparts_index idx, uint32_t num_subpart_available,
  585. uint32_t num_subpart_functional);
  586. /**
  587. * cam_cpas_register_client()
  588. *
  589. * @brief: API to register cpas client
  590. *
  591. * @register_params: Input params to register as a client to CPAS
  592. *
  593. * @return 0 on success.
  594. *
  595. */
  596. int cam_cpas_register_client(
  597. struct cam_cpas_register_params *register_params);
  598. /**
  599. * cam_cpas_unregister_client()
  600. *
  601. * @brief: API to unregister cpas client
  602. *
  603. * @client_handle: Client handle to be unregistered
  604. *
  605. * @return 0 on success.
  606. *
  607. */
  608. int cam_cpas_unregister_client(uint32_t client_handle);
  609. /**
  610. * cam_cpas_start()
  611. *
  612. * @brief: API to start cpas client hw. Clients have to vote for minimal
  613. * bandwidth requirements for AHB, AXI. Use cam_cpas_update_ahb_vote
  614. * to scale bandwidth after start.
  615. *
  616. * @client_handle: client cpas handle
  617. * @ahb_vote : Pointer to ahb vote info
  618. * @axi_vote : Pointer to axi bandwidth vote info
  619. *
  620. * If AXI vote is not applicable to a particular client, use the value exposed
  621. * by CAM_CPAS_DEFAULT_AXI_BW as the default vote request.
  622. *
  623. * @return 0 on success.
  624. *
  625. */
  626. int cam_cpas_start(
  627. uint32_t client_handle,
  628. struct cam_ahb_vote *ahb_vote,
  629. struct cam_axi_vote *axi_vote);
  630. /**
  631. * cam_cpas_stop()
  632. *
  633. * @brief: API to stop cpas client hw. Bandwidth for AHB, AXI votes
  634. * would be removed for this client on this call. Clients should not
  635. * use cam_cpas_update_ahb_vote or cam_cpas_update_axi_vote
  636. * to remove their bandwidth vote.
  637. *
  638. * @client_handle: client cpas handle
  639. *
  640. * @return 0 on success.
  641. *
  642. */
  643. int cam_cpas_stop(uint32_t client_handle);
  644. /**
  645. * cam_cpas_update_ahb_vote()
  646. *
  647. * @brief: API to update AHB vote requirement. Use this function only
  648. * between cam_cpas_start and cam_cpas_stop in case clients wants
  649. * to scale to different vote level. Do not use this function to de-vote,
  650. * removing client's vote is implicit on cam_cpas_stop
  651. *
  652. * @client_handle : Client cpas handle
  653. * @ahb_vote : Pointer to ahb vote info
  654. *
  655. * @return 0 on success.
  656. *
  657. */
  658. int cam_cpas_update_ahb_vote(
  659. uint32_t client_handle,
  660. struct cam_ahb_vote *ahb_vote);
  661. /**
  662. * cam_cpas_update_axi_vote()
  663. *
  664. * @brief: API to update AXI vote requirement. Use this function only
  665. * between cam_cpas_start and cam_cpas_stop in case clients wants
  666. * to scale to different vote level. Do not use this function to de-vote,
  667. * removing client's vote is implicit on cam_cpas_stop
  668. *
  669. * @client_handle : Client cpas handle
  670. * @axi_vote : Pointer to axi bandwidth vote info
  671. *
  672. * @return 0 on success.
  673. *
  674. */
  675. int cam_cpas_update_axi_vote(
  676. uint32_t client_handle,
  677. struct cam_axi_vote *axi_vote);
  678. /**
  679. * cam_cpas_reg_write()
  680. *
  681. * @brief: API to write a register value in CPAS register space
  682. *
  683. * @client_handle : Client cpas handle
  684. * @reg_base : Register base identifier
  685. * @offset : Offset from the register base address
  686. * @mb : Whether to do reg write with memory barrier
  687. * @value : Value to be written in register
  688. *
  689. * @return 0 on success.
  690. *
  691. */
  692. int cam_cpas_reg_write(
  693. uint32_t client_handle,
  694. enum cam_cpas_regbase_types reg_base,
  695. uint32_t offset,
  696. bool mb,
  697. uint32_t value);
  698. /**
  699. * cam_cpas_reg_read()
  700. *
  701. * @brief: API to read a register value from CPAS register space
  702. *
  703. * @client_handle : Client cpas handle
  704. * @reg_base : Register base identifier
  705. * @offset : Offset from the register base address
  706. * @mb : Whether to do reg read with memory barrier
  707. * @value : Value to be red from register
  708. *
  709. * @return 0 on success.
  710. *
  711. */
  712. int cam_cpas_reg_read(
  713. uint32_t client_handle,
  714. enum cam_cpas_regbase_types reg_base,
  715. uint32_t offset,
  716. bool mb,
  717. uint32_t *value);
  718. /**
  719. * cam_cpas_get_hw_info()
  720. *
  721. * @brief: API to get camera hw information
  722. *
  723. * @camera_family : Camera family type. One of
  724. * CAM_FAMILY_CAMERA_SS
  725. * CAM_FAMILY_CPAS_SS
  726. * @camera_version : Camera platform version
  727. * @cpas_version : Camera cpas version
  728. * @cam_caps : Camera capability array
  729. * @num_cap_mask : number of capability masks
  730. * @cam_fuse_info : Camera fuse info
  731. * @domain_id_info : Domain id info
  732. *
  733. * @return 0 on success.
  734. *
  735. */
  736. int cam_cpas_get_hw_info(
  737. uint32_t *camera_family,
  738. struct cam_hw_version *camera_version,
  739. struct cam_hw_version *cpas_version,
  740. uint32_t **cam_caps,
  741. uint32_t *num_cap_mask,
  742. struct cam_cpas_fuse_info *cam_fuse_info,
  743. struct cam_cpas_domain_id_caps *domain_id_info);
  744. /**
  745. * cam_cpas_get_cpas_hw_version()
  746. *
  747. * @brief: API to get camera cpas hw version
  748. *
  749. * @hw_version : Camera cpas hw version
  750. *
  751. * @return 0 on success.
  752. *
  753. */
  754. int cam_cpas_get_cpas_hw_version(uint32_t *hw_version);
  755. /**
  756. * cam_cpas_is_feature_supported()
  757. *
  758. * @brief: API to get camera features
  759. *
  760. * @flag : Camera hw features to check
  761. *
  762. * @hw_map : To indicate which HWs are supported
  763. *
  764. * @fule_val : Return fule value in case of value type feature
  765. *
  766. * @return 1 if feature is supported
  767. *
  768. */
  769. bool cam_cpas_is_feature_supported(uint32_t flag, uint32_t hw_map,
  770. uint32_t *fuse_val);
  771. /**
  772. * cam_cpas_axi_util_path_type_to_string()
  773. *
  774. * @brief: API to get string for given path type
  775. *
  776. * @path_data_type : Path type
  777. *
  778. * @return string.
  779. *
  780. */
  781. const char *cam_cpas_axi_util_path_type_to_string(
  782. uint32_t path_data_type);
  783. /**
  784. * cam_cpas_axi_util_trans_type_to_string()
  785. *
  786. * @brief: API to get string for given transaction type
  787. *
  788. * @path_data_type : Transaction type
  789. *
  790. * @return string.
  791. *
  792. */
  793. const char *cam_cpas_axi_util_trans_type_to_string(
  794. uint32_t path_data_type);
  795. /**
  796. * cam_cpas_axi_util_drv_vote_lvl_to_string()
  797. *
  798. * @brief: API to get string for given DRV vote level
  799. *
  800. * @vote_lvl : DRV vote level
  801. *
  802. * @return string.
  803. *
  804. */
  805. const char *cam_cpas_axi_util_drv_vote_lvl_to_string(
  806. uint32_t vote_lvl);
  807. /**
  808. * cam_cpas_util_vote_type_to_string()
  809. *
  810. * @brief: API to get string for given vote type
  811. *
  812. * @vote_type : DRV vote level
  813. *
  814. * @return string.
  815. *
  816. */
  817. const char *cam_cpas_util_vote_type_to_string(enum cam_cpas_vote_type vote_type);
  818. /**
  819. * cam_cpas_log_votes()
  820. *
  821. * @brief: API to print the all bw votes of axi client. It also print the
  822. * applied camnoc axi clock vote value and ahb vote value
  823. *
  824. * @ddr_only: Print only DDR info
  825. *
  826. * @return 0 on success.
  827. *
  828. */
  829. void cam_cpas_log_votes(bool ddr_only);
  830. /**
  831. * cam_cpas_select_qos_settings()
  832. *
  833. * @brief: API to select specific qos settings based on usecase requirements
  834. *
  835. * @return 0 on success.
  836. *
  837. */
  838. int cam_cpas_select_qos_settings(uint32_t selection_mask);
  839. /**
  840. * cam_cpas_notify_event()
  841. *
  842. * @brief: API that clients can notify about their events. CPAS save the event
  843. * and any other useful information related to this event. This will
  844. * be printed while cpas state dump - cam_cpas_log_votes.
  845. * One such example is IFE notifiying SOF or EPOCH to cpas and cpas
  846. * saving axi clock information (camnoc_axi, mnoc_hf) at that point
  847. * and printing latest history on IFE overflow.
  848. *
  849. * @identifier_string: Identifier string passed by caller
  850. * @identifier_value: Identifier value passed by caller
  851. *
  852. * @return 0 on success.
  853. *
  854. */
  855. int cam_cpas_notify_event(const char *identifier_string,
  856. int32_t identifier_value);
  857. /**
  858. * cam_cpas_get_scid()
  859. *
  860. * @brief: API to obtain slice id for the given type
  861. *
  862. * @type: Cache type
  863. *
  864. * @return slice id, -1 for invalid id.
  865. *
  866. */
  867. int cam_cpas_get_scid(enum cam_sys_cache_config_types type);
  868. /**
  869. * cam_cpas_activate_llcc()
  870. *
  871. * @brief: API to activate system cache
  872. *
  873. * @type: Cache type
  874. *
  875. * @return 0 for success.
  876. *
  877. */
  878. int cam_cpas_activate_llcc(enum cam_sys_cache_config_types type);
  879. /**
  880. * cam_cpas_deactivate_llcc()
  881. *
  882. * @brief: API to de-activate system cache
  883. *
  884. * @type: Cache type
  885. *
  886. * @return 0 for success.
  887. *
  888. */
  889. int cam_cpas_deactivate_llcc(enum cam_sys_cache_config_types type);
  890. /**
  891. * cam_cpas_configure_staling_llcc()
  892. *
  893. * @brief: Configure cache staling mode by setting the
  894. * staling_mode and corresponding params
  895. *
  896. * @type: Cache type
  897. * @mode_param: llcc stalling mode params
  898. * @operation_type: cache operation type
  899. * @stalling_distance: llcc sys cache stalling distance
  900. *
  901. * @return 0 for success.
  902. *
  903. */
  904. int cam_cpas_configure_staling_llcc(
  905. enum cam_sys_cache_config_types type,
  906. enum cam_sys_cache_llcc_staling_mode mode_param,
  907. enum cam_sys_cache_llcc_staling_op_type operation_type,
  908. uint32_t staling_distance);
  909. /**
  910. * cam_cpas_notif_increment_staling_counter()
  911. *
  912. * @brief: This will increment the stalling counter
  913. * depends on what operation it does.
  914. * The operation mode what we have setup in other function.
  915. *
  916. * @type: Cache type
  917. *
  918. * @return 0 for success.
  919. *
  920. */
  921. int cam_cpas_notif_increment_staling_counter(
  922. enum cam_sys_cache_config_types type);
  923. /**
  924. * cam_cpas_dump_camnoc_buff_fill_info()
  925. *
  926. * @brief: API to dump camnoc buffer fill level info
  927. *
  928. * @client_handle : Client cpas handle
  929. *
  930. * @return 0 on success
  931. *
  932. */
  933. int cam_cpas_dump_camnoc_buff_fill_info(uint32_t client_handle);
  934. /**
  935. * cam_cpas_csid_input_core_info_update()
  936. *
  937. * @brief: API to communicate csid input core info to cpas
  938. *
  939. * @csid_idx: csid hw index connected to particular sfe
  940. * @sfe_idx: sfe idx to be connected to particular DRV path
  941. * @set_port: Indicates whether to set or reset DRV port info in dynamic client
  942. *
  943. * @return 0 on success
  944. *
  945. */
  946. int cam_cpas_csid_input_core_info_update(int csid_idx, int sfe_idx, bool set_port);
  947. /**
  948. * cam_cpas_csid_process_resume()
  949. *
  950. * @brief: API to process csid resume in cpas
  951. * @csid_idx: CSID idx to notify resume for
  952. *
  953. * @return 0 on success
  954. *
  955. */
  956. int cam_cpas_csid_process_resume(uint32_t csid_idx);
  957. /**
  958. * cam_cpas_query_drv_enable()
  959. *
  960. * @brief: API to indicate DRV enabled on hw or not
  961. * @is_ddr_drv_enabled: If DDR DRV enabled
  962. * @is_clk_drv_enabled: If Clock Cesta DRV enabled
  963. *
  964. * @return 0 on success
  965. *
  966. */
  967. int cam_cpas_query_drv_enable(bool *is_ddr_drv_enabled, bool *is_clk_drv_enabled);
  968. /**
  969. * cam_cpas_query_domain_id_security_support()
  970. * @brief: API to determine if target supports domain id feature
  971. * This information is determined by cpas during probe
  972. *
  973. * @return true if there's support, false otherwise
  974. */
  975. bool cam_cpas_query_domain_id_security_support(void);
  976. /**
  977. * cam_cpas_enable_clks_for_domain_id()
  978. *
  979. * @brief: API to enable/disable clocks for domain id support.
  980. * All CSIDs including those not in use for a ctxt
  981. * needs to be programmed in a secure session.
  982. * @enable: True to turn on, false otherwise.
  983. * @return 0 on success
  984. */
  985. int cam_cpas_enable_clks_for_domain_id(bool enable);
  986. /**
  987. * cam_cpas_is_notif_staling_supported()
  988. *
  989. * @brief: API to check stalling feature is supported or not
  990. *
  991. * @return rue if supported
  992. */
  993. bool cam_cpas_is_notif_staling_supported(void);
  994. /**
  995. * cam_cpas_dump_state_monitor_info()
  996. *
  997. * @brief: API to dump the state monitor info of cpas.
  998. * @info: Dump information.
  999. * @return 0 on success
  1000. */
  1001. int cam_cpas_dump_state_monitor_info(struct cam_req_mgr_dump_info *info);
  1002. #endif /* _CAM_CPAS_API_H_ */