sde_plane.c 125 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847284828492850285128522853285428552856285728582859286028612862286328642865286628672868286928702871287228732874287528762877287828792880288128822883288428852886288728882889289028912892289328942895289628972898289929002901290229032904290529062907290829092910291129122913291429152916291729182919292029212922292329242925292629272928292929302931293229332934293529362937293829392940294129422943294429452946294729482949295029512952295329542955295629572958295929602961296229632964296529662967296829692970297129722973297429752976297729782979298029812982298329842985298629872988298929902991299229932994299529962997299829993000300130023003300430053006300730083009301030113012301330143015301630173018301930203021302230233024302530263027302830293030303130323033303430353036303730383039304030413042304330443045304630473048304930503051305230533054305530563057305830593060306130623063306430653066306730683069307030713072307330743075307630773078307930803081308230833084308530863087308830893090309130923093309430953096309730983099310031013102310331043105310631073108310931103111311231133114311531163117311831193120312131223123312431253126312731283129313031313132313331343135313631373138313931403141314231433144314531463147314831493150315131523153315431553156315731583159316031613162316331643165316631673168316931703171317231733174317531763177317831793180318131823183318431853186318731883189319031913192319331943195319631973198319932003201320232033204320532063207320832093210321132123213321432153216321732183219322032213222322332243225322632273228322932303231323232333234323532363237323832393240324132423243324432453246324732483249325032513252325332543255325632573258325932603261326232633264326532663267326832693270327132723273327432753276327732783279328032813282328332843285328632873288328932903291329232933294329532963297329832993300330133023303330433053306330733083309331033113312331333143315331633173318331933203321332233233324332533263327332833293330333133323333333433353336333733383339334033413342334333443345334633473348334933503351335233533354335533563357335833593360336133623363336433653366336733683369337033713372337333743375337633773378337933803381338233833384338533863387338833893390339133923393339433953396339733983399340034013402340334043405340634073408340934103411341234133414341534163417341834193420342134223423342434253426342734283429343034313432343334343435343634373438343934403441344234433444344534463447344834493450345134523453345434553456345734583459346034613462346334643465346634673468346934703471347234733474347534763477347834793480348134823483348434853486348734883489349034913492349334943495349634973498349935003501350235033504350535063507350835093510351135123513351435153516351735183519352035213522352335243525352635273528352935303531353235333534353535363537353835393540354135423543354435453546354735483549355035513552355335543555355635573558355935603561356235633564356535663567356835693570357135723573357435753576357735783579358035813582358335843585358635873588358935903591359235933594359535963597359835993600360136023603360436053606360736083609361036113612361336143615361636173618361936203621362236233624362536263627362836293630363136323633363436353636363736383639364036413642364336443645364636473648364936503651365236533654365536563657365836593660366136623663366436653666366736683669367036713672367336743675367636773678367936803681368236833684368536863687368836893690369136923693369436953696369736983699370037013702370337043705370637073708370937103711371237133714371537163717371837193720372137223723372437253726372737283729373037313732373337343735373637373738373937403741374237433744374537463747374837493750375137523753375437553756375737583759376037613762376337643765376637673768376937703771377237733774377537763777377837793780378137823783378437853786378737883789379037913792379337943795379637973798379938003801380238033804380538063807380838093810381138123813381438153816381738183819382038213822382338243825382638273828382938303831383238333834383538363837383838393840384138423843384438453846384738483849385038513852385338543855385638573858385938603861386238633864386538663867386838693870387138723873387438753876387738783879388038813882388338843885388638873888388938903891389238933894389538963897389838993900390139023903390439053906390739083909391039113912391339143915391639173918391939203921392239233924392539263927392839293930393139323933393439353936393739383939394039413942394339443945394639473948394939503951395239533954395539563957395839593960396139623963396439653966396739683969397039713972397339743975397639773978397939803981398239833984398539863987398839893990399139923993399439953996399739983999400040014002400340044005400640074008400940104011401240134014401540164017401840194020402140224023402440254026402740284029403040314032403340344035403640374038403940404041404240434044404540464047404840494050405140524053405440554056405740584059406040614062406340644065406640674068406940704071407240734074407540764077407840794080408140824083408440854086408740884089409040914092409340944095409640974098409941004101410241034104410541064107410841094110411141124113411441154116411741184119412041214122412341244125412641274128412941304131413241334134413541364137413841394140414141424143414441454146414741484149415041514152415341544155415641574158415941604161416241634164416541664167416841694170417141724173417441754176417741784179418041814182418341844185418641874188418941904191419241934194419541964197419841994200420142024203420442054206420742084209421042114212421342144215421642174218421942204221422242234224422542264227422842294230423142324233423442354236423742384239424042414242424342444245424642474248424942504251425242534254425542564257425842594260426142624263426442654266426742684269427042714272427342744275427642774278427942804281428242834284428542864287428842894290429142924293429442954296429742984299430043014302430343044305430643074308430943104311431243134314431543164317431843194320432143224323432443254326432743284329433043314332433343344335433643374338433943404341434243434344434543464347434843494350435143524353435443554356435743584359436043614362436343644365436643674368436943704371437243734374437543764377437843794380438143824383438443854386438743884389439043914392439343944395439643974398439944004401440244034404440544064407440844094410441144124413441444154416441744184419442044214422442344244425442644274428442944304431443244334434443544364437443844394440444144424443444444454446444744484449445044514452445344544455445644574458445944604461446244634464446544664467446844694470447144724473447444754476447744784479448044814482448344844485448644874488448944904491449244934494449544964497449844994500450145024503450445054506450745084509451045114512451345144515451645174518451945204521452245234524452545264527452845294530453145324533453445354536453745384539454045414542
  1. /*
  2. * Copyright (C) 2014-2019 The Linux Foundation. All rights reserved.
  3. * Copyright (C) 2013 Red Hat
  4. * Author: Rob Clark <[email protected]>
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License version 2 as published by
  8. * the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful, but WITHOUT
  11. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  13. * more details.
  14. *
  15. * You should have received a copy of the GNU General Public License along with
  16. * this program. If not, see <http://www.gnu.org/licenses/>.
  17. */
  18. #define pr_fmt(fmt) "[drm:%s:%d] " fmt, __func__, __LINE__
  19. #include <linux/debugfs.h>
  20. #include <linux/dma-buf.h>
  21. #include <uapi/drm/sde_drm.h>
  22. #include <uapi/drm/msm_drm_pp.h>
  23. #include "msm_prop.h"
  24. #include "msm_drv.h"
  25. #include "sde_kms.h"
  26. #include "sde_fence.h"
  27. #include "sde_formats.h"
  28. #include "sde_hw_sspp.h"
  29. #include "sde_hw_catalog_format.h"
  30. #include "sde_trace.h"
  31. #include "sde_crtc.h"
  32. #include "sde_vbif.h"
  33. #include "sde_plane.h"
  34. #include "sde_color_processing.h"
  35. #define SDE_DEBUG_PLANE(pl, fmt, ...) SDE_DEBUG("plane%d " fmt,\
  36. (pl) ? (pl)->base.base.id : -1, ##__VA_ARGS__)
  37. #define SDE_ERROR_PLANE(pl, fmt, ...) SDE_ERROR("plane%d " fmt,\
  38. (pl) ? (pl)->base.base.id : -1, ##__VA_ARGS__)
  39. #define DECIMATED_DIMENSION(dim, deci) (((dim) + ((1 << (deci)) - 1)) >> (deci))
  40. #define PHASE_STEP_SHIFT 21
  41. #define PHASE_STEP_UNIT_SCALE ((int) (1 << PHASE_STEP_SHIFT))
  42. #define PHASE_RESIDUAL 15
  43. #define SHARP_STRENGTH_DEFAULT 32
  44. #define SHARP_EDGE_THR_DEFAULT 112
  45. #define SHARP_SMOOTH_THR_DEFAULT 8
  46. #define SHARP_NOISE_THR_DEFAULT 2
  47. #define SDE_NAME_SIZE 12
  48. #define SDE_PLANE_COLOR_FILL_FLAG BIT(31)
  49. #define TIME_MULTIPLEX_RECT(r0, r1, buffer_lines) \
  50. ((r0).y >= ((r1).y + (r1).h + buffer_lines))
  51. /* multirect rect index */
  52. enum {
  53. R0,
  54. R1,
  55. R_MAX
  56. };
  57. #define SDE_QSEED_DEFAULT_DYN_EXP 0x0
  58. #define DEFAULT_REFRESH_RATE 60
  59. /**
  60. * enum sde_plane_qos - Different qos configurations for each pipe
  61. *
  62. * @SDE_PLANE_QOS_VBLANK_CTRL: Setup VBLANK qos for the pipe.
  63. * @SDE_PLANE_QOS_VBLANK_AMORTIZE: Enables Amortization within pipe.
  64. * this configuration is mutually exclusive from VBLANK_CTRL.
  65. * @SDE_PLANE_QOS_PANIC_CTRL: Setup panic for the pipe.
  66. */
  67. enum sde_plane_qos {
  68. SDE_PLANE_QOS_VBLANK_CTRL = BIT(0),
  69. SDE_PLANE_QOS_VBLANK_AMORTIZE = BIT(1),
  70. SDE_PLANE_QOS_PANIC_CTRL = BIT(2),
  71. };
  72. /*
  73. * struct sde_plane - local sde plane structure
  74. * @aspace: address space pointer
  75. * @csc_cfg: Decoded user configuration for csc
  76. * @csc_usr_ptr: Points to csc_cfg if valid user config available
  77. * @csc_ptr: Points to sde_csc_cfg structure to use for current
  78. * @mplane_list: List of multirect planes of the same pipe
  79. * @catalog: Points to sde catalog structure
  80. * @revalidate: force revalidation of all the plane properties
  81. * @xin_halt_forced_clk: whether or not clocks were forced on for xin halt
  82. * @blob_rot_caps: Pointer to rotator capability blob
  83. */
  84. struct sde_plane {
  85. struct drm_plane base;
  86. struct mutex lock;
  87. enum sde_sspp pipe;
  88. uint32_t features; /* capabilities from catalog */
  89. uint32_t perf_features; /* perf capabilities from catalog */
  90. uint32_t nformats;
  91. uint32_t formats[64];
  92. struct sde_hw_pipe *pipe_hw;
  93. struct sde_hw_pipe_cfg pipe_cfg;
  94. struct sde_hw_sharp_cfg sharp_cfg;
  95. struct sde_hw_pipe_qos_cfg pipe_qos_cfg;
  96. struct sde_vbif_set_qos_params cached_qos_params;
  97. uint32_t color_fill;
  98. bool is_error;
  99. bool is_rt_pipe;
  100. bool is_virtual;
  101. struct list_head mplane_list;
  102. struct sde_mdss_cfg *catalog;
  103. bool revalidate;
  104. bool xin_halt_forced_clk;
  105. struct sde_csc_cfg csc_cfg;
  106. struct sde_csc_cfg *csc_usr_ptr;
  107. struct sde_csc_cfg *csc_ptr;
  108. const struct sde_sspp_sub_blks *pipe_sblk;
  109. char pipe_name[SDE_NAME_SIZE];
  110. struct msm_property_info property_info;
  111. struct msm_property_data property_data[PLANE_PROP_COUNT];
  112. struct drm_property_blob *blob_info;
  113. struct drm_property_blob *blob_rot_caps;
  114. /* debugfs related stuff */
  115. struct dentry *debugfs_root;
  116. bool debugfs_default_scale;
  117. };
  118. #define to_sde_plane(x) container_of(x, struct sde_plane, base)
  119. static int plane_prop_array[PLANE_PROP_COUNT] = {SDE_PLANE_DIRTY_ALL};
  120. static struct sde_kms *_sde_plane_get_kms(struct drm_plane *plane)
  121. {
  122. struct msm_drm_private *priv;
  123. if (!plane || !plane->dev)
  124. return NULL;
  125. priv = plane->dev->dev_private;
  126. if (!priv)
  127. return NULL;
  128. return to_sde_kms(priv->kms);
  129. }
  130. static struct sde_hw_ctl *_sde_plane_get_hw_ctl(const struct drm_plane *plane)
  131. {
  132. struct drm_plane_state *pstate = NULL;
  133. struct drm_crtc *drm_crtc = NULL;
  134. struct sde_crtc *sde_crtc = NULL;
  135. struct sde_crtc_mixer *mixer = NULL;
  136. struct sde_hw_ctl *ctl = NULL;
  137. if (!plane) {
  138. DRM_ERROR("Invalid plane %pK\n", plane);
  139. return NULL;
  140. }
  141. pstate = plane->state;
  142. if (!pstate) {
  143. DRM_ERROR("Invalid plane state %pK\n", pstate);
  144. return NULL;
  145. }
  146. drm_crtc = pstate->crtc;
  147. if (!drm_crtc) {
  148. DRM_ERROR("Invalid drm_crtc %pK\n", drm_crtc);
  149. return NULL;
  150. }
  151. sde_crtc = to_sde_crtc(drm_crtc);
  152. if (!sde_crtc) {
  153. DRM_ERROR("invalid sde_crtc %pK\n", sde_crtc);
  154. return NULL;
  155. }
  156. /* it will always return the first mixer and single CTL */
  157. mixer = sde_crtc->mixers;
  158. if (!mixer) {
  159. DRM_ERROR("invalid mixer %pK\n", mixer);
  160. return NULL;
  161. }
  162. ctl = mixer->hw_ctl;
  163. if (!mixer) {
  164. DRM_ERROR("invalid ctl %pK\n", ctl);
  165. return NULL;
  166. }
  167. return ctl;
  168. }
  169. static bool sde_plane_enabled(const struct drm_plane_state *state)
  170. {
  171. return state && state->fb && state->crtc;
  172. }
  173. bool sde_plane_is_sec_ui_allowed(struct drm_plane *plane)
  174. {
  175. struct sde_plane *psde;
  176. if (!plane)
  177. return false;
  178. psde = to_sde_plane(plane);
  179. return !(psde->features & BIT(SDE_SSPP_BLOCK_SEC_UI));
  180. }
  181. void sde_plane_setup_src_split_order(struct drm_plane *plane,
  182. enum sde_sspp_multirect_index rect_mode, bool enable)
  183. {
  184. struct sde_plane *psde;
  185. if (!plane)
  186. return;
  187. psde = to_sde_plane(plane);
  188. if (psde->pipe_hw->ops.set_src_split_order)
  189. psde->pipe_hw->ops.set_src_split_order(psde->pipe_hw,
  190. rect_mode, enable);
  191. }
  192. /**
  193. * _sde_plane_calc_fill_level - calculate fill level of the given source format
  194. * @plane: Pointer to drm plane
  195. * @fmt: Pointer to source buffer format
  196. * @src_wdith: width of source buffer
  197. * Return: fill level corresponding to the source buffer/format or 0 if error
  198. */
  199. static inline int _sde_plane_calc_fill_level(struct drm_plane *plane,
  200. const struct sde_format *fmt, u32 src_width)
  201. {
  202. struct sde_plane *psde, *tmp;
  203. struct sde_plane_state *pstate;
  204. u32 fixed_buff_size;
  205. u32 total_fl;
  206. u32 hflip_bytes;
  207. u32 unused_space;
  208. if (!plane || !fmt || !plane->state || !src_width || !fmt->bpp) {
  209. SDE_ERROR("invalid arguments\n");
  210. return 0;
  211. }
  212. psde = to_sde_plane(plane);
  213. if (psde->perf_features & BIT(SDE_PERF_SSPP_QOS_FL_NOCALC))
  214. return 0;
  215. pstate = to_sde_plane_state(plane->state);
  216. fixed_buff_size = psde->pipe_sblk->pixel_ram_size;
  217. list_for_each_entry(tmp, &psde->mplane_list, mplane_list) {
  218. if (!sde_plane_enabled(tmp->base.state))
  219. continue;
  220. SDE_DEBUG("plane%d/%d src_width:%d/%d\n",
  221. psde->base.base.id, tmp->base.base.id,
  222. src_width, tmp->pipe_cfg.src_rect.w);
  223. src_width = max_t(u32, src_width, tmp->pipe_cfg.src_rect.w);
  224. }
  225. if ((pstate->rotation & DRM_MODE_REFLECT_X) &&
  226. SDE_FORMAT_IS_LINEAR(fmt))
  227. hflip_bytes = (src_width + 32) * fmt->bpp;
  228. else
  229. hflip_bytes = 0;
  230. if (fmt->fetch_planes == SDE_PLANE_PSEUDO_PLANAR) {
  231. unused_space = 23 * 128;
  232. if (fmt->chroma_sample == SDE_CHROMA_420) {
  233. /* NV12 */
  234. total_fl = (fixed_buff_size / 2 - hflip_bytes -
  235. unused_space) / ((src_width + 32) * fmt->bpp);
  236. } else {
  237. /* non NV12 */
  238. total_fl = (fixed_buff_size / 2 - hflip_bytes -
  239. unused_space) * 2 / ((src_width + 32) *
  240. fmt->bpp);
  241. }
  242. } else {
  243. unused_space = 6 * 128;
  244. if (pstate->multirect_mode == SDE_SSPP_MULTIRECT_PARALLEL) {
  245. total_fl = (fixed_buff_size / 2 - hflip_bytes -
  246. unused_space) * 2 / ((src_width + 32) *
  247. fmt->bpp);
  248. } else {
  249. total_fl = (fixed_buff_size - hflip_bytes -
  250. unused_space) * 2 / ((src_width + 32) *
  251. fmt->bpp);
  252. }
  253. }
  254. SDE_DEBUG("plane%u: pnum:%d fmt: %4.4s w:%u hf:%d us:%d fl:%u\n",
  255. plane->base.id, psde->pipe - SSPP_VIG0,
  256. (char *)&fmt->base.pixel_format,
  257. src_width, hflip_bytes, unused_space, total_fl);
  258. return total_fl;
  259. }
  260. /**
  261. * _sde_plane_get_qos_lut - get LUT mapping based on fill level
  262. * @tbl: Pointer to LUT table
  263. * @total_fl: fill level
  264. * Return: LUT setting corresponding to the fill level
  265. */
  266. static u64 _sde_plane_get_qos_lut(const struct sde_qos_lut_tbl *tbl,
  267. u32 total_fl)
  268. {
  269. int i;
  270. if (!tbl || !tbl->nentry || !tbl->entries)
  271. return 0;
  272. for (i = 0; i < tbl->nentry; i++)
  273. if (total_fl <= tbl->entries[i].fl)
  274. return tbl->entries[i].lut;
  275. /* if last fl is zero, use as default */
  276. if (!tbl->entries[i-1].fl)
  277. return tbl->entries[i-1].lut;
  278. return 0;
  279. }
  280. /**
  281. * _sde_plane_set_qos_lut - set QoS LUT of the given plane
  282. * @plane: Pointer to drm plane
  283. * @fb: Pointer to framebuffer associated with the given plane
  284. */
  285. static void _sde_plane_set_qos_lut(struct drm_plane *plane,
  286. struct drm_framebuffer *fb)
  287. {
  288. struct sde_plane *psde;
  289. const struct sde_format *fmt = NULL;
  290. u64 qos_lut;
  291. u32 total_fl = 0, lut_usage;
  292. if (!plane || !fb) {
  293. SDE_ERROR("invalid arguments plane %d fb %d\n",
  294. !plane, !fb);
  295. return;
  296. }
  297. psde = to_sde_plane(plane);
  298. if (!psde->pipe_hw || !psde->pipe_sblk || !psde->catalog) {
  299. SDE_ERROR("invalid arguments\n");
  300. return;
  301. } else if (!psde->pipe_hw->ops.setup_creq_lut) {
  302. return;
  303. }
  304. if (!psde->is_rt_pipe) {
  305. lut_usage = SDE_QOS_LUT_USAGE_NRT;
  306. } else {
  307. fmt = sde_get_sde_format_ext(
  308. fb->format->format,
  309. fb->modifier);
  310. total_fl = _sde_plane_calc_fill_level(plane, fmt,
  311. psde->pipe_cfg.src_rect.w);
  312. if (fmt && SDE_FORMAT_IS_LINEAR(fmt))
  313. lut_usage = SDE_QOS_LUT_USAGE_LINEAR;
  314. else if (psde->features & BIT(SDE_SSPP_SCALER_QSEED3) ||
  315. psde->features & BIT(SDE_SSPP_SCALER_QSEED3LITE))
  316. lut_usage = SDE_QOS_LUT_USAGE_MACROTILE_QSEED;
  317. else
  318. lut_usage = SDE_QOS_LUT_USAGE_MACROTILE;
  319. }
  320. qos_lut = _sde_plane_get_qos_lut(
  321. &psde->catalog->perf.qos_lut_tbl[lut_usage], total_fl);
  322. psde->pipe_qos_cfg.creq_lut = qos_lut;
  323. trace_sde_perf_set_qos_luts(psde->pipe - SSPP_VIG0,
  324. (fmt) ? fmt->base.pixel_format : 0,
  325. psde->is_rt_pipe, total_fl, qos_lut, lut_usage);
  326. SDE_DEBUG("plane%u: pnum:%d fmt: %4.4s rt:%d fl:%u lut:0x%llx\n",
  327. plane->base.id,
  328. psde->pipe - SSPP_VIG0,
  329. fmt ? (char *)&fmt->base.pixel_format : NULL,
  330. psde->is_rt_pipe, total_fl, qos_lut);
  331. psde->pipe_hw->ops.setup_creq_lut(psde->pipe_hw, &psde->pipe_qos_cfg);
  332. }
  333. /**
  334. * _sde_plane_set_panic_lut - set danger/safe LUT of the given plane
  335. * @plane: Pointer to drm plane
  336. * @fb: Pointer to framebuffer associated with the given plane
  337. */
  338. static void _sde_plane_set_danger_lut(struct drm_plane *plane,
  339. struct drm_framebuffer *fb)
  340. {
  341. struct sde_plane *psde;
  342. const struct sde_format *fmt = NULL;
  343. u32 danger_lut, safe_lut;
  344. u32 total_fl = 0, lut_usage;
  345. if (!plane || !fb) {
  346. SDE_ERROR("invalid arguments\n");
  347. return;
  348. }
  349. psde = to_sde_plane(plane);
  350. if (!psde->pipe_hw || !psde->pipe_sblk || !psde->catalog) {
  351. SDE_ERROR("invalid arguments\n");
  352. return;
  353. } else if (!psde->pipe_hw->ops.setup_danger_safe_lut) {
  354. return;
  355. }
  356. if (!psde->is_rt_pipe) {
  357. danger_lut = psde->catalog->perf.danger_lut_tbl
  358. [SDE_QOS_LUT_USAGE_NRT];
  359. lut_usage = SDE_QOS_LUT_USAGE_NRT;
  360. } else {
  361. fmt = sde_get_sde_format_ext(
  362. fb->format->format,
  363. fb->modifier);
  364. total_fl = _sde_plane_calc_fill_level(plane, fmt,
  365. psde->pipe_cfg.src_rect.w);
  366. if (fmt && SDE_FORMAT_IS_LINEAR(fmt)) {
  367. danger_lut = psde->catalog->perf.danger_lut_tbl
  368. [SDE_QOS_LUT_USAGE_LINEAR];
  369. lut_usage = SDE_QOS_LUT_USAGE_LINEAR;
  370. } else if (psde->features & BIT(SDE_SSPP_SCALER_QSEED3)) {
  371. danger_lut = psde->catalog->perf.danger_lut_tbl
  372. [SDE_QOS_LUT_USAGE_MACROTILE_QSEED];
  373. lut_usage = SDE_QOS_LUT_USAGE_MACROTILE_QSEED;
  374. } else {
  375. danger_lut = psde->catalog->perf.danger_lut_tbl
  376. [SDE_QOS_LUT_USAGE_MACROTILE];
  377. lut_usage = SDE_QOS_LUT_USAGE_MACROTILE;
  378. }
  379. }
  380. safe_lut = (u32) _sde_plane_get_qos_lut(
  381. &psde->catalog->perf.sfe_lut_tbl[lut_usage], total_fl);
  382. psde->pipe_qos_cfg.danger_lut = danger_lut;
  383. psde->pipe_qos_cfg.safe_lut = safe_lut;
  384. trace_sde_perf_set_danger_luts(psde->pipe - SSPP_VIG0,
  385. (fmt) ? fmt->base.pixel_format : 0,
  386. (fmt) ? fmt->fetch_mode : 0,
  387. psde->pipe_qos_cfg.danger_lut,
  388. psde->pipe_qos_cfg.safe_lut);
  389. SDE_DEBUG("plane%u: pnum:%d fmt:%4.4s mode:%d fl:%d luts[0x%x,0x%x]\n",
  390. plane->base.id,
  391. psde->pipe - SSPP_VIG0,
  392. fmt ? (char *)&fmt->base.pixel_format : NULL,
  393. fmt ? fmt->fetch_mode : -1, total_fl,
  394. psde->pipe_qos_cfg.danger_lut,
  395. psde->pipe_qos_cfg.safe_lut);
  396. psde->pipe_hw->ops.setup_danger_safe_lut(psde->pipe_hw,
  397. &psde->pipe_qos_cfg);
  398. }
  399. /**
  400. * _sde_plane_set_qos_ctrl - set QoS control of the given plane
  401. * @plane: Pointer to drm plane
  402. * @enable: true to enable QoS control
  403. * @flags: QoS control mode (enum sde_plane_qos)
  404. */
  405. static void _sde_plane_set_qos_ctrl(struct drm_plane *plane,
  406. bool enable, u32 flags)
  407. {
  408. struct sde_plane *psde;
  409. if (!plane) {
  410. SDE_ERROR("invalid arguments\n");
  411. return;
  412. }
  413. psde = to_sde_plane(plane);
  414. if (!psde->pipe_hw || !psde->pipe_sblk) {
  415. SDE_ERROR("invalid arguments\n");
  416. return;
  417. } else if (!psde->pipe_hw->ops.setup_qos_ctrl) {
  418. return;
  419. }
  420. if (flags & SDE_PLANE_QOS_VBLANK_CTRL) {
  421. psde->pipe_qos_cfg.creq_vblank = psde->pipe_sblk->creq_vblank;
  422. psde->pipe_qos_cfg.danger_vblank =
  423. psde->pipe_sblk->danger_vblank;
  424. psde->pipe_qos_cfg.vblank_en = enable;
  425. }
  426. if (flags & SDE_PLANE_QOS_VBLANK_AMORTIZE) {
  427. /* this feature overrules previous VBLANK_CTRL */
  428. psde->pipe_qos_cfg.vblank_en = false;
  429. psde->pipe_qos_cfg.creq_vblank = 0; /* clear vblank bits */
  430. }
  431. if (flags & SDE_PLANE_QOS_PANIC_CTRL)
  432. psde->pipe_qos_cfg.danger_safe_en = enable;
  433. if (!psde->is_rt_pipe) {
  434. psde->pipe_qos_cfg.vblank_en = false;
  435. psde->pipe_qos_cfg.danger_safe_en = false;
  436. }
  437. SDE_DEBUG("plane%u: pnum:%d ds:%d vb:%d pri[0x%x, 0x%x] is_rt:%d\n",
  438. plane->base.id,
  439. psde->pipe - SSPP_VIG0,
  440. psde->pipe_qos_cfg.danger_safe_en,
  441. psde->pipe_qos_cfg.vblank_en,
  442. psde->pipe_qos_cfg.creq_vblank,
  443. psde->pipe_qos_cfg.danger_vblank,
  444. psde->is_rt_pipe);
  445. psde->pipe_hw->ops.setup_qos_ctrl(psde->pipe_hw,
  446. &psde->pipe_qos_cfg);
  447. }
  448. void sde_plane_set_revalidate(struct drm_plane *plane, bool enable)
  449. {
  450. struct sde_plane *psde;
  451. if (!plane)
  452. return;
  453. psde = to_sde_plane(plane);
  454. psde->revalidate = enable;
  455. }
  456. int sde_plane_danger_signal_ctrl(struct drm_plane *plane, bool enable)
  457. {
  458. struct sde_plane *psde;
  459. int rc;
  460. if (!plane) {
  461. SDE_ERROR("invalid arguments\n");
  462. return -EINVAL;
  463. }
  464. psde = to_sde_plane(plane);
  465. if (!psde->is_rt_pipe)
  466. goto end;
  467. rc = pm_runtime_get_sync(plane->dev->dev);
  468. if (rc < 0) {
  469. SDE_ERROR("failed to enable power resource %d\n", rc);
  470. SDE_EVT32(rc, SDE_EVTLOG_ERROR);
  471. return rc;
  472. }
  473. _sde_plane_set_qos_ctrl(plane, enable, SDE_PLANE_QOS_PANIC_CTRL);
  474. pm_runtime_put_sync(plane->dev->dev);
  475. end:
  476. return 0;
  477. }
  478. /**
  479. * _sde_plane_set_ot_limit - set OT limit for the given plane
  480. * @plane: Pointer to drm plane
  481. * @crtc: Pointer to drm crtc
  482. */
  483. static void _sde_plane_set_ot_limit(struct drm_plane *plane,
  484. struct drm_crtc *crtc)
  485. {
  486. struct sde_plane *psde;
  487. struct sde_vbif_set_ot_params ot_params;
  488. struct msm_drm_private *priv;
  489. struct sde_kms *sde_kms;
  490. if (!plane || !plane->dev || !crtc) {
  491. SDE_ERROR("invalid arguments plane %d crtc %d\n",
  492. !plane, !crtc);
  493. return;
  494. }
  495. priv = plane->dev->dev_private;
  496. if (!priv || !priv->kms) {
  497. SDE_ERROR("invalid KMS reference\n");
  498. return;
  499. }
  500. sde_kms = to_sde_kms(priv->kms);
  501. psde = to_sde_plane(plane);
  502. if (!psde->pipe_hw) {
  503. SDE_ERROR("invalid pipe reference\n");
  504. return;
  505. }
  506. memset(&ot_params, 0, sizeof(ot_params));
  507. ot_params.xin_id = psde->pipe_hw->cap->xin_id;
  508. ot_params.num = psde->pipe_hw->idx - SSPP_NONE;
  509. ot_params.width = psde->pipe_cfg.src_rect.w;
  510. ot_params.height = psde->pipe_cfg.src_rect.h;
  511. ot_params.is_wfd = !psde->is_rt_pipe;
  512. ot_params.frame_rate = crtc->mode.vrefresh;
  513. ot_params.vbif_idx = VBIF_RT;
  514. ot_params.clk_ctrl = psde->pipe_hw->cap->clk_ctrl;
  515. ot_params.rd = true;
  516. sde_vbif_set_ot_limit(sde_kms, &ot_params);
  517. }
  518. /**
  519. * _sde_plane_set_vbif_qos - set vbif QoS for the given plane
  520. * @plane: Pointer to drm plane
  521. * @force: Force update of vbif QoS
  522. */
  523. static void _sde_plane_set_qos_remap(struct drm_plane *plane, bool force)
  524. {
  525. struct sde_plane *psde;
  526. struct sde_vbif_set_qos_params qos_params;
  527. struct msm_drm_private *priv;
  528. struct sde_kms *sde_kms;
  529. if (!plane || !plane->dev) {
  530. SDE_ERROR("invalid arguments\n");
  531. return;
  532. }
  533. priv = plane->dev->dev_private;
  534. if (!priv || !priv->kms) {
  535. SDE_ERROR("invalid KMS reference\n");
  536. return;
  537. }
  538. sde_kms = to_sde_kms(priv->kms);
  539. psde = to_sde_plane(plane);
  540. if (!psde->pipe_hw) {
  541. SDE_ERROR("invalid pipe reference\n");
  542. return;
  543. }
  544. memset(&qos_params, 0, sizeof(qos_params));
  545. qos_params.vbif_idx = VBIF_RT;
  546. qos_params.clk_ctrl = psde->pipe_hw->cap->clk_ctrl;
  547. qos_params.xin_id = psde->pipe_hw->cap->xin_id;
  548. qos_params.num = psde->pipe_hw->idx - SSPP_VIG0;
  549. qos_params.client_type = psde->is_rt_pipe ?
  550. VBIF_RT_CLIENT : VBIF_NRT_CLIENT;
  551. if (!force && !memcmp(&qos_params, &psde->cached_qos_params,
  552. sizeof(struct sde_vbif_set_qos_params))) {
  553. return;
  554. }
  555. SDE_DEBUG("changes in vbif QoS parameters, remap it\n");
  556. memcpy(&psde->cached_qos_params, &qos_params,
  557. sizeof(struct sde_vbif_set_qos_params));
  558. SDE_DEBUG("plane%d pipe:%d vbif:%d xin:%d rt:%d, clk_ctrl:%d\n",
  559. plane->base.id, qos_params.num,
  560. qos_params.vbif_idx,
  561. qos_params.xin_id, qos_params.client_type,
  562. qos_params.clk_ctrl);
  563. sde_vbif_set_qos_remap(sde_kms, &qos_params);
  564. }
  565. /**
  566. * _sde_plane_set_ts_prefill - set prefill with traffic shaper
  567. * @plane: Pointer to drm plane
  568. * @pstate: Pointer to sde plane state
  569. */
  570. static void _sde_plane_set_ts_prefill(struct drm_plane *plane,
  571. struct sde_plane_state *pstate)
  572. {
  573. struct sde_plane *psde;
  574. struct sde_hw_pipe_ts_cfg cfg;
  575. struct msm_drm_private *priv;
  576. struct sde_kms *sde_kms;
  577. if (!plane || !plane->dev) {
  578. SDE_ERROR("invalid arguments");
  579. return;
  580. }
  581. priv = plane->dev->dev_private;
  582. if (!priv || !priv->kms) {
  583. SDE_ERROR("invalid KMS reference\n");
  584. return;
  585. }
  586. sde_kms = to_sde_kms(priv->kms);
  587. psde = to_sde_plane(plane);
  588. if (!psde->pipe_hw) {
  589. SDE_ERROR("invalid pipe reference\n");
  590. return;
  591. }
  592. if (!psde->pipe_hw || !psde->pipe_hw->ops.setup_ts_prefill)
  593. return;
  594. _sde_plane_set_qos_ctrl(plane, false, SDE_PLANE_QOS_VBLANK_AMORTIZE);
  595. memset(&cfg, 0, sizeof(cfg));
  596. cfg.size = sde_plane_get_property(pstate,
  597. PLANE_PROP_PREFILL_SIZE);
  598. cfg.time = sde_plane_get_property(pstate,
  599. PLANE_PROP_PREFILL_TIME);
  600. SDE_DEBUG("plane%d size:%llu time:%llu\n",
  601. plane->base.id, cfg.size, cfg.time);
  602. SDE_EVT32_VERBOSE(DRMID(plane), cfg.size, cfg.time);
  603. psde->pipe_hw->ops.setup_ts_prefill(psde->pipe_hw, &cfg,
  604. pstate->multirect_index);
  605. }
  606. /* helper to update a state's input fence pointer from the property */
  607. static void _sde_plane_set_input_fence(struct sde_plane *psde,
  608. struct sde_plane_state *pstate, uint64_t fd)
  609. {
  610. if (!psde || !pstate) {
  611. SDE_ERROR("invalid arg(s), plane %d state %d\n",
  612. !psde, !pstate);
  613. return;
  614. }
  615. /* clear previous reference */
  616. if (pstate->input_fence)
  617. sde_sync_put(pstate->input_fence);
  618. /* get fence pointer for later */
  619. if (fd == 0)
  620. pstate->input_fence = NULL;
  621. else
  622. pstate->input_fence = sde_sync_get(fd);
  623. SDE_DEBUG_PLANE(psde, "0x%llX\n", fd);
  624. }
  625. int sde_plane_wait_input_fence(struct drm_plane *plane, uint32_t wait_ms)
  626. {
  627. struct sde_plane *psde;
  628. struct sde_plane_state *pstate;
  629. uint32_t prefix;
  630. void *input_fence;
  631. int ret = -EINVAL;
  632. signed long rc;
  633. if (!plane) {
  634. SDE_ERROR("invalid plane\n");
  635. } else if (!plane->state) {
  636. SDE_ERROR_PLANE(to_sde_plane(plane), "invalid state\n");
  637. } else {
  638. psde = to_sde_plane(plane);
  639. pstate = to_sde_plane_state(plane->state);
  640. input_fence = pstate->input_fence;
  641. if (input_fence) {
  642. prefix = sde_sync_get_name_prefix(input_fence);
  643. rc = sde_sync_wait(input_fence, wait_ms);
  644. switch (rc) {
  645. case 0:
  646. SDE_ERROR_PLANE(psde, "%ums timeout on %08X fd %d\n",
  647. wait_ms, prefix, sde_plane_get_property(pstate,
  648. PLANE_PROP_INPUT_FENCE));
  649. psde->is_error = true;
  650. sde_kms_timeline_status(plane->dev);
  651. ret = -ETIMEDOUT;
  652. break;
  653. case -ERESTARTSYS:
  654. SDE_ERROR_PLANE(psde,
  655. "%ums wait interrupted on %08X\n",
  656. wait_ms, prefix);
  657. psde->is_error = true;
  658. ret = -ERESTARTSYS;
  659. break;
  660. case -EINVAL:
  661. SDE_ERROR_PLANE(psde,
  662. "invalid fence param for %08X\n",
  663. prefix);
  664. psde->is_error = true;
  665. ret = -EINVAL;
  666. break;
  667. default:
  668. SDE_DEBUG_PLANE(psde, "signaled\n");
  669. ret = 0;
  670. break;
  671. }
  672. SDE_EVT32_VERBOSE(DRMID(plane), -ret, prefix);
  673. } else {
  674. ret = 0;
  675. }
  676. }
  677. return ret;
  678. }
  679. /**
  680. * _sde_plane_get_aspace: gets the address space based on the
  681. * fb_translation mode property
  682. */
  683. static int _sde_plane_get_aspace(
  684. struct sde_plane *psde,
  685. struct sde_plane_state *pstate,
  686. struct msm_gem_address_space **aspace)
  687. {
  688. struct sde_kms *kms;
  689. int mode;
  690. if (!psde || !pstate || !aspace) {
  691. SDE_ERROR("invalid parameters\n");
  692. return -EINVAL;
  693. }
  694. kms = _sde_plane_get_kms(&psde->base);
  695. if (!kms) {
  696. SDE_ERROR("invalid kms\n");
  697. return -EINVAL;
  698. }
  699. mode = sde_plane_get_property(pstate,
  700. PLANE_PROP_FB_TRANSLATION_MODE);
  701. switch (mode) {
  702. case SDE_DRM_FB_NON_SEC:
  703. *aspace = kms->aspace[MSM_SMMU_DOMAIN_UNSECURE];
  704. if (!aspace)
  705. return -EINVAL;
  706. break;
  707. case SDE_DRM_FB_SEC:
  708. *aspace = kms->aspace[MSM_SMMU_DOMAIN_SECURE];
  709. if (!aspace)
  710. return -EINVAL;
  711. break;
  712. case SDE_DRM_FB_SEC_DIR_TRANS:
  713. *aspace = NULL;
  714. break;
  715. default:
  716. SDE_ERROR("invalid fb_translation mode:%d\n", mode);
  717. return -EFAULT;
  718. }
  719. return 0;
  720. }
  721. static inline void _sde_plane_set_scanout(struct drm_plane *plane,
  722. struct sde_plane_state *pstate,
  723. struct sde_hw_pipe_cfg *pipe_cfg,
  724. struct drm_framebuffer *fb)
  725. {
  726. struct sde_plane *psde;
  727. struct msm_gem_address_space *aspace = NULL;
  728. int ret, mode;
  729. bool secure = false;
  730. if (!plane || !pstate || !pipe_cfg || !fb) {
  731. SDE_ERROR(
  732. "invalid arg(s), plane %d state %d cfg %d fb %d\n",
  733. !plane, !pstate, !pipe_cfg, !fb);
  734. return;
  735. }
  736. psde = to_sde_plane(plane);
  737. if (!psde->pipe_hw) {
  738. SDE_ERROR_PLANE(psde, "invalid pipe_hw\n");
  739. return;
  740. }
  741. ret = _sde_plane_get_aspace(psde, pstate, &aspace);
  742. if (ret) {
  743. SDE_ERROR_PLANE(psde, "Failed to get aspace %d\n", ret);
  744. return;
  745. }
  746. /*
  747. * framebuffer prepare is deferred for prepare_fb calls that
  748. * happen during the transition from secure to non-secure.
  749. * Handle the prepare at this point for such cases. This can be
  750. * expected for one or two frames during the transition.
  751. */
  752. if (aspace && pstate->defer_prepare_fb) {
  753. SDE_EVT32(DRMID(plane), psde->pipe, aspace->domain_attached);
  754. ret = msm_framebuffer_prepare(fb, pstate->aspace);
  755. if (ret) {
  756. SDE_ERROR_PLANE(psde,
  757. "failed to prepare framebuffer %d\n", ret);
  758. return;
  759. }
  760. pstate->defer_prepare_fb = false;
  761. }
  762. mode = sde_plane_get_property(pstate, PLANE_PROP_FB_TRANSLATION_MODE);
  763. if ((mode == SDE_DRM_FB_SEC) || (mode == SDE_DRM_FB_SEC_DIR_TRANS))
  764. secure = true;
  765. ret = sde_format_populate_layout(aspace, fb, &pipe_cfg->layout);
  766. if (ret == -EAGAIN)
  767. SDE_DEBUG_PLANE(psde, "not updating same src addrs\n");
  768. else if (ret) {
  769. SDE_ERROR_PLANE(psde, "failed to get format layout, %d\n", ret);
  770. /*
  771. * Force solid fill color on error. This is to prevent
  772. * smmu faults during secure session transition.
  773. */
  774. psde->is_error = true;
  775. } else if (psde->pipe_hw->ops.setup_sourceaddress) {
  776. SDE_EVT32_VERBOSE(psde->pipe_hw->idx,
  777. pipe_cfg->layout.width,
  778. pipe_cfg->layout.height,
  779. pipe_cfg->layout.plane_addr[0],
  780. pipe_cfg->layout.plane_size[0],
  781. pipe_cfg->layout.plane_addr[1],
  782. pipe_cfg->layout.plane_size[1],
  783. pipe_cfg->layout.plane_addr[2],
  784. pipe_cfg->layout.plane_size[2],
  785. pipe_cfg->layout.plane_addr[3],
  786. pipe_cfg->layout.plane_size[3],
  787. pstate->multirect_index,
  788. secure);
  789. psde->pipe_hw->ops.setup_sourceaddress(psde->pipe_hw, pipe_cfg,
  790. pstate->multirect_index);
  791. }
  792. }
  793. static int _sde_plane_setup_scaler3_lut(struct sde_plane *psde,
  794. struct sde_plane_state *pstate)
  795. {
  796. struct sde_hw_scaler3_cfg *cfg;
  797. int ret = 0;
  798. if (!psde || !pstate) {
  799. SDE_ERROR("invalid args\n");
  800. return -EINVAL;
  801. }
  802. cfg = &pstate->scaler3_cfg;
  803. cfg->dir_lut = msm_property_get_blob(
  804. &psde->property_info,
  805. &pstate->property_state, &cfg->dir_len,
  806. PLANE_PROP_SCALER_LUT_ED);
  807. cfg->cir_lut = msm_property_get_blob(
  808. &psde->property_info,
  809. &pstate->property_state, &cfg->cir_len,
  810. PLANE_PROP_SCALER_LUT_CIR);
  811. cfg->sep_lut = msm_property_get_blob(
  812. &psde->property_info,
  813. &pstate->property_state, &cfg->sep_len,
  814. PLANE_PROP_SCALER_LUT_SEP);
  815. if (!cfg->dir_lut || !cfg->cir_lut || !cfg->sep_lut)
  816. ret = -ENODATA;
  817. return ret;
  818. }
  819. static int _sde_plane_setup_scaler3lite_lut(struct sde_plane *psde,
  820. struct sde_plane_state *pstate)
  821. {
  822. struct sde_hw_scaler3_cfg *cfg;
  823. cfg = &pstate->scaler3_cfg;
  824. cfg->sep_lut = msm_property_get_blob(
  825. &psde->property_info,
  826. &pstate->property_state, &cfg->sep_len,
  827. PLANE_PROP_SCALER_LUT_SEP);
  828. return cfg->sep_lut ? 0 : -ENODATA;
  829. }
  830. static void _sde_plane_setup_scaler3(struct sde_plane *psde,
  831. struct sde_plane_state *pstate, const struct sde_format *fmt,
  832. uint32_t chroma_subsmpl_h, uint32_t chroma_subsmpl_v)
  833. {
  834. uint32_t decimated, i, src_w, src_h, dst_w, dst_h;
  835. struct sde_hw_scaler3_cfg *scale_cfg;
  836. if (!psde || !pstate || !fmt ||
  837. !chroma_subsmpl_h || !chroma_subsmpl_v) {
  838. SDE_ERROR("psde %d pstate %d fmt %d smp_h %d smp_v %d\n",
  839. !!psde, !!pstate, !!fmt, chroma_subsmpl_h,
  840. chroma_subsmpl_v);
  841. return;
  842. }
  843. scale_cfg = &pstate->scaler3_cfg;
  844. src_w = psde->pipe_cfg.src_rect.w;
  845. src_h = psde->pipe_cfg.src_rect.h;
  846. dst_w = psde->pipe_cfg.dst_rect.w;
  847. dst_h = psde->pipe_cfg.dst_rect.h;
  848. memset(scale_cfg, 0, sizeof(*scale_cfg));
  849. memset(&pstate->pixel_ext, 0, sizeof(struct sde_hw_pixel_ext));
  850. /*
  851. * For inline rotation cases, scaler config is post-rotation,
  852. * so swap the dimensions here. However, pixel extension will
  853. * need pre-rotation settings, this will be corrected below
  854. * when calculating pixel extension settings.
  855. */
  856. if (pstate->rotation & DRM_MODE_ROTATE_90)
  857. swap(src_w, src_h);
  858. decimated = DECIMATED_DIMENSION(src_w,
  859. psde->pipe_cfg.horz_decimation);
  860. scale_cfg->phase_step_x[SDE_SSPP_COMP_0] =
  861. mult_frac((1 << PHASE_STEP_SHIFT), decimated, dst_w);
  862. decimated = DECIMATED_DIMENSION(src_h,
  863. psde->pipe_cfg.vert_decimation);
  864. scale_cfg->phase_step_y[SDE_SSPP_COMP_0] =
  865. mult_frac((1 << PHASE_STEP_SHIFT), decimated, dst_h);
  866. scale_cfg->phase_step_y[SDE_SSPP_COMP_1_2] =
  867. scale_cfg->phase_step_y[SDE_SSPP_COMP_0] / chroma_subsmpl_v;
  868. scale_cfg->phase_step_x[SDE_SSPP_COMP_1_2] =
  869. scale_cfg->phase_step_x[SDE_SSPP_COMP_0] / chroma_subsmpl_h;
  870. scale_cfg->phase_step_x[SDE_SSPP_COMP_2] =
  871. scale_cfg->phase_step_x[SDE_SSPP_COMP_1_2];
  872. scale_cfg->phase_step_y[SDE_SSPP_COMP_2] =
  873. scale_cfg->phase_step_y[SDE_SSPP_COMP_1_2];
  874. scale_cfg->phase_step_x[SDE_SSPP_COMP_3] =
  875. scale_cfg->phase_step_x[SDE_SSPP_COMP_0];
  876. scale_cfg->phase_step_y[SDE_SSPP_COMP_3] =
  877. scale_cfg->phase_step_y[SDE_SSPP_COMP_0];
  878. for (i = 0; i < SDE_MAX_PLANES; i++) {
  879. scale_cfg->src_width[i] = DECIMATED_DIMENSION(src_w,
  880. psde->pipe_cfg.horz_decimation);
  881. scale_cfg->src_height[i] = DECIMATED_DIMENSION(src_h,
  882. psde->pipe_cfg.vert_decimation);
  883. if (i == SDE_SSPP_COMP_1_2 || i == SDE_SSPP_COMP_2) {
  884. scale_cfg->src_width[i] /= chroma_subsmpl_h;
  885. scale_cfg->src_height[i] /= chroma_subsmpl_v;
  886. }
  887. scale_cfg->preload_x[i] = psde->pipe_sblk->scaler_blk.h_preload;
  888. scale_cfg->preload_y[i] = psde->pipe_sblk->scaler_blk.v_preload;
  889. /* For pixel extension we need the pre-rotated orientation */
  890. if (pstate->rotation & DRM_MODE_ROTATE_90) {
  891. pstate->pixel_ext.num_ext_pxls_top[i] =
  892. scale_cfg->src_width[i];
  893. pstate->pixel_ext.num_ext_pxls_left[i] =
  894. scale_cfg->src_height[i];
  895. } else {
  896. pstate->pixel_ext.num_ext_pxls_top[i] =
  897. scale_cfg->src_height[i];
  898. pstate->pixel_ext.num_ext_pxls_left[i] =
  899. scale_cfg->src_width[i];
  900. }
  901. }
  902. if ((!(SDE_FORMAT_IS_YUV(fmt)) && (src_h == dst_h)
  903. && (src_w == dst_w)) || pstate->multirect_mode)
  904. return;
  905. SDE_DEBUG_PLANE(psde,
  906. "setting bilinear: src:%dx%d dst:%dx%d chroma:%dx%d fmt:%x\n",
  907. src_w, src_h, dst_w, dst_h,
  908. chroma_subsmpl_v, chroma_subsmpl_h,
  909. fmt->base.pixel_format);
  910. scale_cfg->dst_width = dst_w;
  911. scale_cfg->dst_height = dst_h;
  912. scale_cfg->y_rgb_filter_cfg = SDE_SCALE_BIL;
  913. scale_cfg->uv_filter_cfg = SDE_SCALE_BIL;
  914. scale_cfg->alpha_filter_cfg = SDE_SCALE_ALPHA_BIL;
  915. scale_cfg->lut_flag = 0;
  916. scale_cfg->blend_cfg = 1;
  917. scale_cfg->enable = 1;
  918. scale_cfg->dyn_exp_disabled = SDE_QSEED_DEFAULT_DYN_EXP;
  919. }
  920. /**
  921. * _sde_plane_setup_scaler2 - determine default scaler phase steps/filter type
  922. * @psde: Pointer to SDE plane object
  923. * @src: Source size
  924. * @dst: Destination size
  925. * @phase_steps: Pointer to output array for phase steps
  926. * @filter: Pointer to output array for filter type
  927. * @fmt: Pointer to format definition
  928. * @chroma_subsampling: Subsampling amount for chroma channel
  929. *
  930. * Returns: 0 on success
  931. */
  932. static int _sde_plane_setup_scaler2(struct sde_plane *psde,
  933. uint32_t src, uint32_t dst, uint32_t *phase_steps,
  934. enum sde_hw_filter *filter, const struct sde_format *fmt,
  935. uint32_t chroma_subsampling)
  936. {
  937. if (!psde || !phase_steps || !filter || !fmt) {
  938. SDE_ERROR(
  939. "invalid arg(s), plane %d phase %d filter %d fmt %d\n",
  940. !psde, !phase_steps, !filter, !fmt);
  941. return -EINVAL;
  942. }
  943. /* calculate phase steps, leave init phase as zero */
  944. phase_steps[SDE_SSPP_COMP_0] =
  945. mult_frac(1 << PHASE_STEP_SHIFT, src, dst);
  946. phase_steps[SDE_SSPP_COMP_1_2] =
  947. phase_steps[SDE_SSPP_COMP_0] / chroma_subsampling;
  948. phase_steps[SDE_SSPP_COMP_2] = phase_steps[SDE_SSPP_COMP_1_2];
  949. phase_steps[SDE_SSPP_COMP_3] = phase_steps[SDE_SSPP_COMP_0];
  950. /* calculate scaler config, if necessary */
  951. if (SDE_FORMAT_IS_YUV(fmt) || src != dst) {
  952. filter[SDE_SSPP_COMP_3] =
  953. (src <= dst) ? SDE_SCALE_FILTER_BIL :
  954. SDE_SCALE_FILTER_PCMN;
  955. if (SDE_FORMAT_IS_YUV(fmt)) {
  956. filter[SDE_SSPP_COMP_0] = SDE_SCALE_FILTER_CA;
  957. filter[SDE_SSPP_COMP_1_2] = filter[SDE_SSPP_COMP_3];
  958. } else {
  959. filter[SDE_SSPP_COMP_0] = filter[SDE_SSPP_COMP_3];
  960. filter[SDE_SSPP_COMP_1_2] =
  961. SDE_SCALE_FILTER_NEAREST;
  962. }
  963. } else {
  964. /* disable scaler */
  965. filter[SDE_SSPP_COMP_0] = SDE_SCALE_FILTER_MAX;
  966. filter[SDE_SSPP_COMP_1_2] = SDE_SCALE_FILTER_MAX;
  967. filter[SDE_SSPP_COMP_3] = SDE_SCALE_FILTER_MAX;
  968. }
  969. return 0;
  970. }
  971. /**
  972. * _sde_plane_setup_pixel_ext - determine default pixel extension values
  973. * @psde: Pointer to SDE plane object
  974. * @src: Source size
  975. * @dst: Destination size
  976. * @decimated_src: Source size after decimation, if any
  977. * @phase_steps: Pointer to output array for phase steps
  978. * @out_src: Output array for pixel extension values
  979. * @out_edge1: Output array for pixel extension first edge
  980. * @out_edge2: Output array for pixel extension second edge
  981. * @filter: Pointer to array for filter type
  982. * @fmt: Pointer to format definition
  983. * @chroma_subsampling: Subsampling amount for chroma channel
  984. * @post_compare: Whether to chroma subsampled source size for comparisions
  985. */
  986. static void _sde_plane_setup_pixel_ext(struct sde_plane *psde,
  987. uint32_t src, uint32_t dst, uint32_t decimated_src,
  988. uint32_t *phase_steps, uint32_t *out_src, int *out_edge1,
  989. int *out_edge2, enum sde_hw_filter *filter,
  990. const struct sde_format *fmt, uint32_t chroma_subsampling,
  991. bool post_compare)
  992. {
  993. int64_t edge1, edge2, caf;
  994. uint32_t src_work;
  995. int i, tmp;
  996. if (psde && phase_steps && out_src && out_edge1 &&
  997. out_edge2 && filter && fmt) {
  998. /* handle CAF for YUV formats */
  999. if (SDE_FORMAT_IS_YUV(fmt) && *filter == SDE_SCALE_FILTER_CA)
  1000. caf = PHASE_STEP_UNIT_SCALE;
  1001. else
  1002. caf = 0;
  1003. for (i = 0; i < SDE_MAX_PLANES; i++) {
  1004. src_work = decimated_src;
  1005. if (i == SDE_SSPP_COMP_1_2 || i == SDE_SSPP_COMP_2)
  1006. src_work /= chroma_subsampling;
  1007. if (post_compare)
  1008. src = src_work;
  1009. if (!SDE_FORMAT_IS_YUV(fmt) && (src == dst)) {
  1010. /* unity */
  1011. edge1 = 0;
  1012. edge2 = 0;
  1013. } else if (dst >= src) {
  1014. /* upscale */
  1015. edge1 = (1 << PHASE_RESIDUAL);
  1016. edge1 -= caf;
  1017. edge2 = (1 << PHASE_RESIDUAL);
  1018. edge2 += (dst - 1) * *(phase_steps + i);
  1019. edge2 -= (src_work - 1) * PHASE_STEP_UNIT_SCALE;
  1020. edge2 += caf;
  1021. edge2 = -(edge2);
  1022. } else {
  1023. /* downscale */
  1024. edge1 = 0;
  1025. edge2 = (dst - 1) * *(phase_steps + i);
  1026. edge2 -= (src_work - 1) * PHASE_STEP_UNIT_SCALE;
  1027. edge2 += *(phase_steps + i);
  1028. edge2 = -(edge2);
  1029. }
  1030. /* only enable CAF for luma plane */
  1031. caf = 0;
  1032. /* populate output arrays */
  1033. *(out_src + i) = src_work;
  1034. /* edge updates taken from __pxl_extn_helper */
  1035. if (edge1 >= 0) {
  1036. tmp = (uint32_t)edge1;
  1037. tmp >>= PHASE_STEP_SHIFT;
  1038. *(out_edge1 + i) = -tmp;
  1039. } else {
  1040. tmp = (uint32_t)(-edge1);
  1041. *(out_edge1 + i) =
  1042. (tmp + PHASE_STEP_UNIT_SCALE - 1) >>
  1043. PHASE_STEP_SHIFT;
  1044. }
  1045. if (edge2 >= 0) {
  1046. tmp = (uint32_t)edge2;
  1047. tmp >>= PHASE_STEP_SHIFT;
  1048. *(out_edge2 + i) = -tmp;
  1049. } else {
  1050. tmp = (uint32_t)(-edge2);
  1051. *(out_edge2 + i) =
  1052. (tmp + PHASE_STEP_UNIT_SCALE - 1) >>
  1053. PHASE_STEP_SHIFT;
  1054. }
  1055. }
  1056. }
  1057. }
  1058. static inline void _sde_plane_setup_csc(struct sde_plane *psde)
  1059. {
  1060. static const struct sde_csc_cfg sde_csc_YUV2RGB_601L = {
  1061. {
  1062. /* S15.16 format */
  1063. 0x00012A00, 0x00000000, 0x00019880,
  1064. 0x00012A00, 0xFFFF9B80, 0xFFFF3000,
  1065. 0x00012A00, 0x00020480, 0x00000000,
  1066. },
  1067. /* signed bias */
  1068. { 0xfff0, 0xff80, 0xff80,},
  1069. { 0x0, 0x0, 0x0,},
  1070. /* unsigned clamp */
  1071. { 0x10, 0xeb, 0x10, 0xf0, 0x10, 0xf0,},
  1072. { 0x00, 0xff, 0x00, 0xff, 0x00, 0xff,},
  1073. };
  1074. static const struct sde_csc_cfg sde_csc10_YUV2RGB_601L = {
  1075. {
  1076. /* S15.16 format */
  1077. 0x00012A00, 0x00000000, 0x00019880,
  1078. 0x00012A00, 0xFFFF9B80, 0xFFFF3000,
  1079. 0x00012A00, 0x00020480, 0x00000000,
  1080. },
  1081. /* signed bias */
  1082. { 0xffc0, 0xfe00, 0xfe00,},
  1083. { 0x0, 0x0, 0x0,},
  1084. /* unsigned clamp */
  1085. { 0x40, 0x3ac, 0x40, 0x3c0, 0x40, 0x3c0,},
  1086. { 0x00, 0x3ff, 0x00, 0x3ff, 0x00, 0x3ff,},
  1087. };
  1088. if (!psde) {
  1089. SDE_ERROR("invalid plane\n");
  1090. return;
  1091. }
  1092. /* revert to kernel default if override not available */
  1093. if (psde->csc_usr_ptr)
  1094. psde->csc_ptr = psde->csc_usr_ptr;
  1095. else if (BIT(SDE_SSPP_CSC_10BIT) & psde->features)
  1096. psde->csc_ptr = (struct sde_csc_cfg *)&sde_csc10_YUV2RGB_601L;
  1097. else
  1098. psde->csc_ptr = (struct sde_csc_cfg *)&sde_csc_YUV2RGB_601L;
  1099. SDE_DEBUG_PLANE(psde, "using 0x%X 0x%X 0x%X...\n",
  1100. psde->csc_ptr->csc_mv[0],
  1101. psde->csc_ptr->csc_mv[1],
  1102. psde->csc_ptr->csc_mv[2]);
  1103. }
  1104. static void sde_color_process_plane_setup(struct drm_plane *plane)
  1105. {
  1106. struct sde_plane *psde;
  1107. struct sde_plane_state *pstate;
  1108. uint32_t hue, saturation, value, contrast;
  1109. struct drm_msm_memcol *memcol = NULL;
  1110. struct drm_msm_3d_gamut *vig_gamut = NULL;
  1111. struct drm_msm_igc_lut *igc = NULL;
  1112. struct drm_msm_pgc_lut *gc = NULL;
  1113. size_t memcol_sz = 0, size = 0;
  1114. struct sde_hw_cp_cfg hw_cfg = {};
  1115. struct sde_hw_ctl *ctl = _sde_plane_get_hw_ctl(plane);
  1116. psde = to_sde_plane(plane);
  1117. pstate = to_sde_plane_state(plane->state);
  1118. hue = (uint32_t) sde_plane_get_property(pstate, PLANE_PROP_HUE_ADJUST);
  1119. if (psde->pipe_hw->ops.setup_pa_hue)
  1120. psde->pipe_hw->ops.setup_pa_hue(psde->pipe_hw, &hue);
  1121. saturation = (uint32_t) sde_plane_get_property(pstate,
  1122. PLANE_PROP_SATURATION_ADJUST);
  1123. if (psde->pipe_hw->ops.setup_pa_sat)
  1124. psde->pipe_hw->ops.setup_pa_sat(psde->pipe_hw, &saturation);
  1125. value = (uint32_t) sde_plane_get_property(pstate,
  1126. PLANE_PROP_VALUE_ADJUST);
  1127. if (psde->pipe_hw->ops.setup_pa_val)
  1128. psde->pipe_hw->ops.setup_pa_val(psde->pipe_hw, &value);
  1129. contrast = (uint32_t) sde_plane_get_property(pstate,
  1130. PLANE_PROP_CONTRAST_ADJUST);
  1131. if (psde->pipe_hw->ops.setup_pa_cont)
  1132. psde->pipe_hw->ops.setup_pa_cont(psde->pipe_hw, &contrast);
  1133. if (psde->pipe_hw->ops.setup_pa_memcolor) {
  1134. /* Skin memory color setup */
  1135. memcol = msm_property_get_blob(&psde->property_info,
  1136. &pstate->property_state,
  1137. &memcol_sz,
  1138. PLANE_PROP_SKIN_COLOR);
  1139. psde->pipe_hw->ops.setup_pa_memcolor(psde->pipe_hw,
  1140. MEMCOLOR_SKIN, memcol);
  1141. /* Sky memory color setup */
  1142. memcol = msm_property_get_blob(&psde->property_info,
  1143. &pstate->property_state,
  1144. &memcol_sz,
  1145. PLANE_PROP_SKY_COLOR);
  1146. psde->pipe_hw->ops.setup_pa_memcolor(psde->pipe_hw,
  1147. MEMCOLOR_SKY, memcol);
  1148. /* Foliage memory color setup */
  1149. memcol = msm_property_get_blob(&psde->property_info,
  1150. &pstate->property_state,
  1151. &memcol_sz,
  1152. PLANE_PROP_FOLIAGE_COLOR);
  1153. psde->pipe_hw->ops.setup_pa_memcolor(psde->pipe_hw,
  1154. MEMCOLOR_FOLIAGE, memcol);
  1155. }
  1156. if (pstate->dirty & SDE_PLANE_DIRTY_VIG_GAMUT &&
  1157. psde->pipe_hw->ops.setup_vig_gamut) {
  1158. vig_gamut = msm_property_get_blob(&psde->property_info,
  1159. &pstate->property_state,
  1160. &size,
  1161. PLANE_PROP_VIG_GAMUT);
  1162. hw_cfg.last_feature = 0;
  1163. hw_cfg.ctl = ctl;
  1164. hw_cfg.len = sizeof(struct drm_msm_3d_gamut);
  1165. hw_cfg.payload = vig_gamut;
  1166. psde->pipe_hw->ops.setup_vig_gamut(psde->pipe_hw, &hw_cfg);
  1167. }
  1168. if (pstate->dirty & SDE_PLANE_DIRTY_VIG_IGC &&
  1169. psde->pipe_hw->ops.setup_vig_igc) {
  1170. igc = msm_property_get_blob(&psde->property_info,
  1171. &pstate->property_state,
  1172. &size,
  1173. PLANE_PROP_VIG_IGC);
  1174. hw_cfg.last_feature = 0;
  1175. hw_cfg.ctl = ctl;
  1176. hw_cfg.len = sizeof(struct drm_msm_igc_lut);
  1177. hw_cfg.payload = igc;
  1178. psde->pipe_hw->ops.setup_vig_igc(psde->pipe_hw, &hw_cfg);
  1179. }
  1180. if (pstate->dirty & SDE_PLANE_DIRTY_DMA_IGC &&
  1181. psde->pipe_hw->ops.setup_dma_igc) {
  1182. igc = msm_property_get_blob(&psde->property_info,
  1183. &pstate->property_state,
  1184. &size,
  1185. PLANE_PROP_DMA_IGC);
  1186. hw_cfg.last_feature = 0;
  1187. hw_cfg.ctl = ctl;
  1188. hw_cfg.len = sizeof(struct drm_msm_igc_lut);
  1189. hw_cfg.payload = igc;
  1190. psde->pipe_hw->ops.setup_dma_igc(psde->pipe_hw, &hw_cfg,
  1191. pstate->multirect_index);
  1192. }
  1193. if (pstate->dirty & SDE_PLANE_DIRTY_DMA_GC &&
  1194. psde->pipe_hw->ops.setup_dma_gc) {
  1195. gc = msm_property_get_blob(&psde->property_info,
  1196. &pstate->property_state,
  1197. &size,
  1198. PLANE_PROP_DMA_GC);
  1199. hw_cfg.last_feature = 0;
  1200. hw_cfg.ctl = ctl;
  1201. hw_cfg.len = sizeof(struct drm_msm_pgc_lut);
  1202. hw_cfg.payload = gc;
  1203. psde->pipe_hw->ops.setup_dma_gc(psde->pipe_hw, &hw_cfg,
  1204. pstate->multirect_index);
  1205. }
  1206. }
  1207. static void _sde_plane_setup_scaler(struct sde_plane *psde,
  1208. struct sde_plane_state *pstate,
  1209. const struct sde_format *fmt, bool color_fill)
  1210. {
  1211. struct sde_hw_pixel_ext *pe;
  1212. uint32_t chroma_subsmpl_h, chroma_subsmpl_v;
  1213. if (!psde || !fmt || !pstate) {
  1214. SDE_ERROR("invalid arg(s), plane %d fmt %d state %d\n",
  1215. !psde, !fmt, !pstate);
  1216. return;
  1217. }
  1218. pe = &pstate->pixel_ext;
  1219. psde->pipe_cfg.horz_decimation =
  1220. sde_plane_get_property(pstate, PLANE_PROP_H_DECIMATE);
  1221. psde->pipe_cfg.vert_decimation =
  1222. sde_plane_get_property(pstate, PLANE_PROP_V_DECIMATE);
  1223. /* don't chroma subsample if decimating */
  1224. chroma_subsmpl_h = psde->pipe_cfg.horz_decimation ? 1 :
  1225. drm_format_horz_chroma_subsampling(fmt->base.pixel_format);
  1226. chroma_subsmpl_v = psde->pipe_cfg.vert_decimation ? 1 :
  1227. drm_format_vert_chroma_subsampling(fmt->base.pixel_format);
  1228. /* update scaler */
  1229. if (psde->features & BIT(SDE_SSPP_SCALER_QSEED3) ||
  1230. (psde->features & BIT(SDE_SSPP_SCALER_QSEED3LITE))) {
  1231. int rc = -EINVAL;
  1232. if (!color_fill && !psde->debugfs_default_scale)
  1233. rc = is_qseed3_rev_qseed3lite(psde->pipe_hw->catalog) ?
  1234. _sde_plane_setup_scaler3lite_lut(psde, pstate) :
  1235. _sde_plane_setup_scaler3_lut(psde, pstate);
  1236. if (rc || pstate->scaler_check_state !=
  1237. SDE_PLANE_SCLCHECK_SCALER_V2) {
  1238. SDE_EVT32_VERBOSE(DRMID(&psde->base), color_fill,
  1239. pstate->scaler_check_state,
  1240. psde->debugfs_default_scale, rc,
  1241. psde->pipe_cfg.src_rect.w,
  1242. psde->pipe_cfg.src_rect.h,
  1243. psde->pipe_cfg.dst_rect.w,
  1244. psde->pipe_cfg.dst_rect.h,
  1245. pstate->multirect_mode);
  1246. /* calculate default config for QSEED3 */
  1247. _sde_plane_setup_scaler3(psde, pstate, fmt,
  1248. chroma_subsmpl_h, chroma_subsmpl_v);
  1249. }
  1250. } else if (pstate->scaler_check_state != SDE_PLANE_SCLCHECK_SCALER_V1 ||
  1251. color_fill || psde->debugfs_default_scale) {
  1252. uint32_t deci_dim, i;
  1253. /* calculate default configuration for QSEED2 */
  1254. memset(pe, 0, sizeof(struct sde_hw_pixel_ext));
  1255. SDE_DEBUG_PLANE(psde, "default config\n");
  1256. deci_dim = DECIMATED_DIMENSION(psde->pipe_cfg.src_rect.w,
  1257. psde->pipe_cfg.horz_decimation);
  1258. _sde_plane_setup_scaler2(psde,
  1259. deci_dim,
  1260. psde->pipe_cfg.dst_rect.w,
  1261. pe->phase_step_x,
  1262. pe->horz_filter, fmt, chroma_subsmpl_h);
  1263. if (SDE_FORMAT_IS_YUV(fmt))
  1264. deci_dim &= ~0x1;
  1265. _sde_plane_setup_pixel_ext(psde, psde->pipe_cfg.src_rect.w,
  1266. psde->pipe_cfg.dst_rect.w, deci_dim,
  1267. pe->phase_step_x,
  1268. pe->roi_w,
  1269. pe->num_ext_pxls_left,
  1270. pe->num_ext_pxls_right, pe->horz_filter, fmt,
  1271. chroma_subsmpl_h, 0);
  1272. deci_dim = DECIMATED_DIMENSION(psde->pipe_cfg.src_rect.h,
  1273. psde->pipe_cfg.vert_decimation);
  1274. _sde_plane_setup_scaler2(psde,
  1275. deci_dim,
  1276. psde->pipe_cfg.dst_rect.h,
  1277. pe->phase_step_y,
  1278. pe->vert_filter, fmt, chroma_subsmpl_v);
  1279. _sde_plane_setup_pixel_ext(psde, psde->pipe_cfg.src_rect.h,
  1280. psde->pipe_cfg.dst_rect.h, deci_dim,
  1281. pe->phase_step_y,
  1282. pe->roi_h,
  1283. pe->num_ext_pxls_top,
  1284. pe->num_ext_pxls_btm, pe->vert_filter, fmt,
  1285. chroma_subsmpl_v, 1);
  1286. for (i = 0; i < SDE_MAX_PLANES; i++) {
  1287. if (pe->num_ext_pxls_left[i] >= 0)
  1288. pe->left_rpt[i] = pe->num_ext_pxls_left[i];
  1289. else
  1290. pe->left_ftch[i] = pe->num_ext_pxls_left[i];
  1291. if (pe->num_ext_pxls_right[i] >= 0)
  1292. pe->right_rpt[i] = pe->num_ext_pxls_right[i];
  1293. else
  1294. pe->right_ftch[i] = pe->num_ext_pxls_right[i];
  1295. if (pe->num_ext_pxls_top[i] >= 0)
  1296. pe->top_rpt[i] = pe->num_ext_pxls_top[i];
  1297. else
  1298. pe->top_ftch[i] = pe->num_ext_pxls_top[i];
  1299. if (pe->num_ext_pxls_btm[i] >= 0)
  1300. pe->btm_rpt[i] = pe->num_ext_pxls_btm[i];
  1301. else
  1302. pe->btm_ftch[i] = pe->num_ext_pxls_btm[i];
  1303. }
  1304. }
  1305. }
  1306. /**
  1307. * _sde_plane_color_fill - enables color fill on plane
  1308. * @psde: Pointer to SDE plane object
  1309. * @color: RGB fill color value, [23..16] Blue, [15..8] Green, [7..0] Red
  1310. * @alpha: 8-bit fill alpha value, 255 selects 100% alpha
  1311. * Returns: 0 on success
  1312. */
  1313. static int _sde_plane_color_fill(struct sde_plane *psde,
  1314. uint32_t color, uint32_t alpha)
  1315. {
  1316. const struct sde_format *fmt;
  1317. const struct drm_plane *plane;
  1318. struct sde_plane_state *pstate;
  1319. bool blend_enable = true;
  1320. if (!psde || !psde->base.state) {
  1321. SDE_ERROR("invalid plane\n");
  1322. return -EINVAL;
  1323. }
  1324. if (!psde->pipe_hw) {
  1325. SDE_ERROR_PLANE(psde, "invalid plane h/w pointer\n");
  1326. return -EINVAL;
  1327. }
  1328. plane = &psde->base;
  1329. pstate = to_sde_plane_state(plane->state);
  1330. SDE_DEBUG_PLANE(psde, "\n");
  1331. /*
  1332. * select fill format to match user property expectation,
  1333. * h/w only supports RGB variants
  1334. */
  1335. fmt = sde_get_sde_format(DRM_FORMAT_ABGR8888);
  1336. blend_enable = (SDE_DRM_BLEND_OP_OPAQUE !=
  1337. sde_plane_get_property(pstate, PLANE_PROP_BLEND_OP));
  1338. /* update sspp */
  1339. if (fmt && psde->pipe_hw->ops.setup_solidfill) {
  1340. psde->pipe_hw->ops.setup_solidfill(psde->pipe_hw,
  1341. (color & 0xFFFFFF) | ((alpha & 0xFF) << 24),
  1342. pstate->multirect_index);
  1343. /* override scaler/decimation if solid fill */
  1344. psde->pipe_cfg.src_rect.x = 0;
  1345. psde->pipe_cfg.src_rect.y = 0;
  1346. psde->pipe_cfg.src_rect.w = psde->pipe_cfg.dst_rect.w;
  1347. psde->pipe_cfg.src_rect.h = psde->pipe_cfg.dst_rect.h;
  1348. _sde_plane_setup_scaler(psde, pstate, fmt, true);
  1349. if (psde->pipe_hw->ops.setup_format)
  1350. psde->pipe_hw->ops.setup_format(psde->pipe_hw,
  1351. fmt, blend_enable,
  1352. SDE_SSPP_SOLID_FILL,
  1353. pstate->multirect_index);
  1354. if (psde->pipe_hw->ops.setup_rects)
  1355. psde->pipe_hw->ops.setup_rects(psde->pipe_hw,
  1356. &psde->pipe_cfg,
  1357. pstate->multirect_index);
  1358. if (psde->pipe_hw->ops.setup_pe)
  1359. psde->pipe_hw->ops.setup_pe(psde->pipe_hw,
  1360. &pstate->pixel_ext);
  1361. if (psde->pipe_hw->ops.setup_scaler &&
  1362. pstate->multirect_index != SDE_SSPP_RECT_1) {
  1363. psde->pipe_hw->ctl = _sde_plane_get_hw_ctl(plane);
  1364. psde->pipe_hw->ops.setup_scaler(psde->pipe_hw,
  1365. &psde->pipe_cfg, &pstate->pixel_ext,
  1366. &pstate->scaler3_cfg);
  1367. }
  1368. }
  1369. return 0;
  1370. }
  1371. /**
  1372. * sde_plane_rot_atomic_check - verify rotator update of the given state
  1373. * @plane: Pointer to drm plane
  1374. * @state: Pointer to drm plane state to be validated
  1375. * return: 0 if success; error code otherwise
  1376. */
  1377. static int sde_plane_rot_atomic_check(struct drm_plane *plane,
  1378. struct drm_plane_state *state)
  1379. {
  1380. struct sde_plane *psde;
  1381. struct sde_plane_state *pstate, *old_pstate;
  1382. int ret = 0;
  1383. u32 rotation;
  1384. if (!plane || !state) {
  1385. SDE_ERROR("invalid plane/state\n");
  1386. return -EINVAL;
  1387. }
  1388. psde = to_sde_plane(plane);
  1389. pstate = to_sde_plane_state(state);
  1390. old_pstate = to_sde_plane_state(plane->state);
  1391. /* check inline rotation and simplify the transform */
  1392. rotation = drm_rotation_simplify(
  1393. state->rotation,
  1394. DRM_MODE_ROTATE_0 | DRM_MODE_ROTATE_90 |
  1395. DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y);
  1396. if ((rotation & DRM_MODE_ROTATE_180) ||
  1397. (rotation & DRM_MODE_ROTATE_270)) {
  1398. SDE_ERROR_PLANE(psde,
  1399. "invalid rotation transform must be simplified 0x%x\n",
  1400. rotation);
  1401. ret = -EINVAL;
  1402. goto exit;
  1403. }
  1404. if (rotation & DRM_MODE_ROTATE_90) {
  1405. struct msm_drm_private *priv = plane->dev->dev_private;
  1406. struct sde_kms *sde_kms;
  1407. const struct msm_format *msm_fmt;
  1408. const struct sde_format *fmt;
  1409. struct sde_rect src;
  1410. bool q16_data = true;
  1411. POPULATE_RECT(&src, state->src_x, state->src_y,
  1412. state->src_w, state->src_h, q16_data);
  1413. /*
  1414. * DRM framework expects rotation flag in counter-clockwise
  1415. * direction and the HW expects in clockwise direction.
  1416. * Flip the flags to match with HW.
  1417. */
  1418. rotation ^= (DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y);
  1419. if (!psde->pipe_sblk->in_rot_maxdwnscale_rt_num ||
  1420. !psde->pipe_sblk->in_rot_maxdwnscale_rt_denom ||
  1421. !psde->pipe_sblk->in_rot_maxdwnscale_nrt ||
  1422. !psde->pipe_sblk->in_rot_maxheight ||
  1423. !psde->pipe_sblk->in_rot_format_list ||
  1424. !(psde->features & BIT(SDE_SSPP_TRUE_INLINE_ROT_V1))) {
  1425. SDE_ERROR_PLANE(psde,
  1426. "wrong config rt:%d/%d nrt:%d fmt:%d h:%d 0x%x\n",
  1427. !psde->pipe_sblk->in_rot_maxdwnscale_rt_num,
  1428. !psde->pipe_sblk->in_rot_maxdwnscale_rt_denom,
  1429. !psde->pipe_sblk->in_rot_maxdwnscale_nrt,
  1430. !psde->pipe_sblk->in_rot_format_list,
  1431. !psde->pipe_sblk->in_rot_maxheight,
  1432. psde->features);
  1433. ret = -EINVAL;
  1434. goto exit;
  1435. }
  1436. /* check for valid height */
  1437. if (src.h > psde->pipe_sblk->in_rot_maxheight) {
  1438. SDE_ERROR_PLANE(psde,
  1439. "invalid height for inline rot:%d max:%d\n",
  1440. src.h, psde->pipe_sblk->in_rot_maxheight);
  1441. ret = -EINVAL;
  1442. goto exit;
  1443. }
  1444. if (!sde_plane_enabled(state))
  1445. goto exit;
  1446. /* check for valid formats supported by inline rot */
  1447. sde_kms = to_sde_kms(priv->kms);
  1448. msm_fmt = msm_framebuffer_format(state->fb);
  1449. fmt = to_sde_format(msm_fmt);
  1450. ret = sde_format_validate_fmt(&sde_kms->base, fmt,
  1451. psde->pipe_sblk->in_rot_format_list);
  1452. }
  1453. exit:
  1454. pstate->rotation = rotation;
  1455. return ret;
  1456. }
  1457. static bool _sde_plane_halt_requests(struct drm_plane *plane,
  1458. uint32_t xin_id, bool halt_forced_clk, bool enable)
  1459. {
  1460. struct sde_plane *psde;
  1461. struct msm_drm_private *priv;
  1462. struct sde_vbif_set_xin_halt_params halt_params;
  1463. if (!plane || !plane->dev) {
  1464. SDE_ERROR("invalid arguments\n");
  1465. return false;
  1466. }
  1467. psde = to_sde_plane(plane);
  1468. if (!psde->pipe_hw || !psde->pipe_hw->cap) {
  1469. SDE_ERROR("invalid pipe reference\n");
  1470. return false;
  1471. }
  1472. priv = plane->dev->dev_private;
  1473. if (!priv || !priv->kms) {
  1474. SDE_ERROR("invalid KMS reference\n");
  1475. return false;
  1476. }
  1477. memset(&halt_params, 0, sizeof(halt_params));
  1478. halt_params.vbif_idx = VBIF_RT;
  1479. halt_params.xin_id = xin_id;
  1480. halt_params.clk_ctrl = psde->pipe_hw->cap->clk_ctrl;
  1481. halt_params.forced_on = halt_forced_clk;
  1482. halt_params.enable = enable;
  1483. return sde_vbif_set_xin_halt(to_sde_kms(priv->kms), &halt_params);
  1484. }
  1485. void sde_plane_halt_requests(struct drm_plane *plane, bool enable)
  1486. {
  1487. struct sde_plane *psde;
  1488. if (!plane) {
  1489. SDE_ERROR("invalid plane\n");
  1490. return;
  1491. }
  1492. psde = to_sde_plane(plane);
  1493. if (!psde->pipe_hw || !psde->pipe_hw->cap) {
  1494. SDE_ERROR("invalid pipe reference\n");
  1495. return;
  1496. }
  1497. SDE_EVT32(DRMID(plane), psde->xin_halt_forced_clk, enable);
  1498. psde->xin_halt_forced_clk =
  1499. _sde_plane_halt_requests(plane, psde->pipe_hw->cap->xin_id,
  1500. psde->xin_halt_forced_clk, enable);
  1501. }
  1502. void sde_plane_secure_ctrl_xin_client(struct drm_plane *plane,
  1503. struct drm_crtc *crtc)
  1504. {
  1505. struct sde_plane *psde;
  1506. if (!plane || !crtc) {
  1507. SDE_ERROR("invalid plane/crtc\n");
  1508. return;
  1509. }
  1510. psde = to_sde_plane(plane);
  1511. if (psde->features & BIT(SDE_SSPP_BLOCK_SEC_UI))
  1512. return;
  1513. /* do all VBIF programming for the sec-ui allowed SSPP */
  1514. _sde_plane_set_qos_remap(plane, true);
  1515. _sde_plane_set_ot_limit(plane, crtc);
  1516. }
  1517. /**
  1518. * sde_plane_rot_install_properties - install plane rotator properties
  1519. * @plane: Pointer to drm plane
  1520. * @catalog: Pointer to mdss configuration
  1521. * return: none
  1522. */
  1523. static void sde_plane_rot_install_properties(struct drm_plane *plane,
  1524. struct sde_mdss_cfg *catalog)
  1525. {
  1526. struct sde_plane *psde = to_sde_plane(plane);
  1527. unsigned long supported_rotations = DRM_MODE_ROTATE_0 |
  1528. DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y;
  1529. int ret = 0;
  1530. if (!plane || !psde) {
  1531. SDE_ERROR("invalid plane\n");
  1532. return;
  1533. } else if (!catalog) {
  1534. SDE_ERROR("invalid catalog\n");
  1535. return;
  1536. }
  1537. if (psde->features & BIT(SDE_SSPP_TRUE_INLINE_ROT_V1))
  1538. supported_rotations |= DRM_MODE_ROTATE_0 | DRM_MODE_ROTATE_90 |
  1539. DRM_MODE_ROTATE_180 | DRM_MODE_ROTATE_270;
  1540. ret = drm_plane_create_rotation_property(plane,
  1541. DRM_MODE_ROTATE_0, supported_rotations);
  1542. if (ret) {
  1543. DRM_ERROR("create rotation property failed: %d\n", ret);
  1544. return;
  1545. }
  1546. }
  1547. void sde_plane_clear_multirect(const struct drm_plane_state *drm_state)
  1548. {
  1549. struct sde_plane_state *pstate;
  1550. if (!drm_state)
  1551. return;
  1552. pstate = to_sde_plane_state(drm_state);
  1553. pstate->multirect_index = SDE_SSPP_RECT_SOLO;
  1554. pstate->multirect_mode = SDE_SSPP_MULTIRECT_NONE;
  1555. }
  1556. /**
  1557. * multi_rect validate API allows to validate only R0 and R1 RECT
  1558. * passing for each plane. Client of this API must not pass multiple
  1559. * plane which are not sharing same XIN client. Such calls will fail
  1560. * even though kernel client is passing valid multirect configuration.
  1561. */
  1562. int sde_plane_validate_multirect_v2(struct sde_multirect_plane_states *plane)
  1563. {
  1564. struct sde_plane_state *pstate[R_MAX];
  1565. const struct drm_plane_state *drm_state[R_MAX];
  1566. struct sde_rect src[R_MAX], dst[R_MAX];
  1567. struct sde_plane *sde_plane[R_MAX];
  1568. const struct sde_format *fmt[R_MAX];
  1569. int xin_id[R_MAX];
  1570. bool q16_data = true;
  1571. int i, j, buffer_lines, width_threshold[R_MAX];
  1572. unsigned int max_tile_height = 1;
  1573. bool parallel_fetch_qualified = true;
  1574. enum sde_sspp_multirect_mode mode = SDE_SSPP_MULTIRECT_NONE;
  1575. const struct msm_format *msm_fmt;
  1576. bool const_alpha_enable = true;
  1577. for (i = 0; i < R_MAX; i++) {
  1578. drm_state[i] = i ? plane->r1 : plane->r0;
  1579. if (!drm_state[i]) {
  1580. SDE_ERROR("drm plane state is NULL\n");
  1581. return -EINVAL;
  1582. }
  1583. pstate[i] = to_sde_plane_state(drm_state[i]);
  1584. sde_plane[i] = to_sde_plane(drm_state[i]->plane);
  1585. xin_id[i] = sde_plane[i]->pipe_hw->cap->xin_id;
  1586. for (j = 0; j < i; j++) {
  1587. if (xin_id[i] != xin_id[j]) {
  1588. SDE_ERROR_PLANE(sde_plane[i],
  1589. "invalid multirect validate call base:%d xin_id:%d curr:%d xin:%d\n",
  1590. j, xin_id[j], i, xin_id[i]);
  1591. return -EINVAL;
  1592. }
  1593. }
  1594. msm_fmt = msm_framebuffer_format(drm_state[i]->fb);
  1595. if (!msm_fmt) {
  1596. SDE_ERROR_PLANE(sde_plane[i], "null fb\n");
  1597. return -EINVAL;
  1598. }
  1599. fmt[i] = to_sde_format(msm_fmt);
  1600. if (SDE_FORMAT_IS_UBWC(fmt[i]) &&
  1601. (fmt[i]->tile_height > max_tile_height))
  1602. max_tile_height = fmt[i]->tile_height;
  1603. POPULATE_RECT(&src[i], drm_state[i]->src_x, drm_state[i]->src_y,
  1604. drm_state[i]->src_w, drm_state[i]->src_h, q16_data);
  1605. POPULATE_RECT(&dst[i], drm_state[i]->crtc_x,
  1606. drm_state[i]->crtc_y, drm_state[i]->crtc_w,
  1607. drm_state[i]->crtc_h, !q16_data);
  1608. if (src[i].w != dst[i].w || src[i].h != dst[i].h) {
  1609. SDE_ERROR_PLANE(sde_plane[i],
  1610. "scaling is not supported in multirect mode\n");
  1611. return -EINVAL;
  1612. }
  1613. if (SDE_FORMAT_IS_YUV(fmt[i])) {
  1614. SDE_ERROR_PLANE(sde_plane[i],
  1615. "Unsupported format for multirect mode\n");
  1616. return -EINVAL;
  1617. }
  1618. /**
  1619. * SSPP PD_MEM is split half - one for each RECT.
  1620. * Tiled formats need 5 lines of buffering while fetching
  1621. * whereas linear formats need only 2 lines.
  1622. * So we cannot support more than half of the supported SSPP
  1623. * width for tiled formats.
  1624. */
  1625. width_threshold[i] = sde_plane[i]->pipe_sblk->maxlinewidth;
  1626. if (SDE_FORMAT_IS_UBWC(fmt[i]))
  1627. width_threshold[i] /= 2;
  1628. if (parallel_fetch_qualified && src[i].w > width_threshold[i])
  1629. parallel_fetch_qualified = false;
  1630. if (sde_plane[i]->is_virtual)
  1631. mode = sde_plane_get_property(pstate[i],
  1632. PLANE_PROP_MULTIRECT_MODE);
  1633. if (pstate[i]->const_alpha_en != const_alpha_enable)
  1634. const_alpha_enable = false;
  1635. }
  1636. buffer_lines = 2 * max_tile_height;
  1637. /**
  1638. * fallback to driver mode selection logic if client is using
  1639. * multirect plane without setting property.
  1640. *
  1641. * validate multirect mode configuration based on rectangle
  1642. */
  1643. switch (mode) {
  1644. case SDE_SSPP_MULTIRECT_NONE:
  1645. if (parallel_fetch_qualified)
  1646. mode = SDE_SSPP_MULTIRECT_PARALLEL;
  1647. else if (TIME_MULTIPLEX_RECT(dst[R1], dst[R0], buffer_lines) ||
  1648. TIME_MULTIPLEX_RECT(dst[R0], dst[R1], buffer_lines))
  1649. mode = SDE_SSPP_MULTIRECT_TIME_MX;
  1650. else
  1651. SDE_ERROR(
  1652. "planes(%d - %d) multirect mode selection fail\n",
  1653. drm_state[R0]->plane->base.id,
  1654. drm_state[R1]->plane->base.id);
  1655. break;
  1656. case SDE_SSPP_MULTIRECT_PARALLEL:
  1657. if (!parallel_fetch_qualified) {
  1658. SDE_ERROR("R0 plane:%d width_threshold:%d src_w:%d\n",
  1659. drm_state[R0]->plane->base.id,
  1660. width_threshold[R0], src[R0].w);
  1661. SDE_ERROR("R1 plane:%d width_threshold:%d src_w:%d\n",
  1662. drm_state[R1]->plane->base.id,
  1663. width_threshold[R1], src[R1].w);
  1664. SDE_ERROR("parallel fetch not qualified\n");
  1665. mode = SDE_SSPP_MULTIRECT_NONE;
  1666. }
  1667. break;
  1668. case SDE_SSPP_MULTIRECT_TIME_MX:
  1669. if (!TIME_MULTIPLEX_RECT(dst[R1], dst[R0], buffer_lines) &&
  1670. !TIME_MULTIPLEX_RECT(dst[R0], dst[R1], buffer_lines)) {
  1671. SDE_ERROR(
  1672. "buffer_lines:%d R0 plane:%d dst_y:%d dst_h:%d\n",
  1673. buffer_lines, drm_state[R0]->plane->base.id,
  1674. dst[R0].y, dst[R0].h);
  1675. SDE_ERROR(
  1676. "buffer_lines:%d R1 plane:%d dst_y:%d dst_h:%d\n",
  1677. buffer_lines, drm_state[R1]->plane->base.id,
  1678. dst[R1].y, dst[R1].h);
  1679. SDE_ERROR("time multiplexed fetch not qualified\n");
  1680. mode = SDE_SSPP_MULTIRECT_NONE;
  1681. }
  1682. break;
  1683. default:
  1684. SDE_ERROR("bad mode:%d selection\n", mode);
  1685. mode = SDE_SSPP_MULTIRECT_NONE;
  1686. break;
  1687. }
  1688. for (i = 0; i < R_MAX; i++) {
  1689. pstate[i]->multirect_mode = mode;
  1690. pstate[i]->const_alpha_en = const_alpha_enable;
  1691. }
  1692. if (mode == SDE_SSPP_MULTIRECT_NONE)
  1693. return -EINVAL;
  1694. if (sde_plane[R0]->is_virtual) {
  1695. pstate[R0]->multirect_index = SDE_SSPP_RECT_1;
  1696. pstate[R1]->multirect_index = SDE_SSPP_RECT_0;
  1697. } else {
  1698. pstate[R0]->multirect_index = SDE_SSPP_RECT_0;
  1699. pstate[R1]->multirect_index = SDE_SSPP_RECT_1;
  1700. }
  1701. SDE_DEBUG_PLANE(sde_plane[R0], "R0: %d - %d\n",
  1702. pstate[R0]->multirect_mode, pstate[R0]->multirect_index);
  1703. SDE_DEBUG_PLANE(sde_plane[R1], "R1: %d - %d\n",
  1704. pstate[R1]->multirect_mode, pstate[R1]->multirect_index);
  1705. return 0;
  1706. }
  1707. /**
  1708. * sde_plane_ctl_flush - set/clear control flush bitmask for the given plane
  1709. * @plane: Pointer to drm plane structure
  1710. * @ctl: Pointer to hardware control driver
  1711. * @set: set if true else clear
  1712. */
  1713. void sde_plane_ctl_flush(struct drm_plane *plane, struct sde_hw_ctl *ctl,
  1714. bool set)
  1715. {
  1716. if (!plane || !ctl) {
  1717. SDE_ERROR("invalid parameters\n");
  1718. return;
  1719. }
  1720. if (!ctl->ops.update_bitmask_sspp) {
  1721. SDE_ERROR("invalid ops\n");
  1722. return;
  1723. }
  1724. ctl->ops.update_bitmask_sspp(ctl, sde_plane_pipe(plane), set);
  1725. }
  1726. static int sde_plane_prepare_fb(struct drm_plane *plane,
  1727. struct drm_plane_state *new_state)
  1728. {
  1729. struct drm_framebuffer *fb = new_state->fb;
  1730. struct sde_plane *psde = to_sde_plane(plane);
  1731. struct sde_plane_state *pstate = to_sde_plane_state(new_state);
  1732. struct sde_hw_fmt_layout layout;
  1733. struct msm_gem_address_space *aspace;
  1734. int ret;
  1735. if (!fb)
  1736. return 0;
  1737. SDE_DEBUG_PLANE(psde, "FB[%u]\n", fb->base.id);
  1738. ret = _sde_plane_get_aspace(psde, pstate, &aspace);
  1739. if (ret) {
  1740. SDE_ERROR_PLANE(psde, "Failed to get aspace\n");
  1741. return ret;
  1742. }
  1743. /* cache aspace */
  1744. pstate->aspace = aspace;
  1745. /*
  1746. * when transitioning from secure to non-secure,
  1747. * plane->prepare_fb happens before the commit. In such case,
  1748. * defer the prepare_fb and handled it late, during the commit
  1749. * after attaching the domains as part of the transition
  1750. */
  1751. pstate->defer_prepare_fb = (aspace && !aspace->domain_attached) ?
  1752. true : false;
  1753. if (pstate->defer_prepare_fb) {
  1754. SDE_EVT32(DRMID(plane), psde->pipe);
  1755. SDE_DEBUG_PLANE(psde,
  1756. "domain not attached, prepare_fb handled later\n");
  1757. return 0;
  1758. }
  1759. if (pstate->aspace && fb) {
  1760. ret = msm_framebuffer_prepare(fb,
  1761. pstate->aspace);
  1762. if (ret) {
  1763. SDE_ERROR("failed to prepare framebuffer\n");
  1764. return ret;
  1765. }
  1766. }
  1767. /* validate framebuffer layout before commit */
  1768. ret = sde_format_populate_layout(pstate->aspace,
  1769. fb, &layout);
  1770. if (ret) {
  1771. SDE_ERROR_PLANE(psde, "failed to get format layout, %d\n", ret);
  1772. return ret;
  1773. }
  1774. return 0;
  1775. }
  1776. /**
  1777. * _sde_plane_fetch_halt - halts vbif transactions for a plane
  1778. * @plane: Pointer to plane
  1779. * Returns: 0 on success
  1780. */
  1781. static int _sde_plane_fetch_halt(struct drm_plane *plane)
  1782. {
  1783. struct sde_plane *psde;
  1784. int xin_id;
  1785. enum sde_clk_ctrl_type clk_ctrl;
  1786. struct msm_drm_private *priv;
  1787. struct sde_kms *sde_kms;
  1788. psde = to_sde_plane(plane);
  1789. if (!plane || !plane->dev || !psde->pipe_hw) {
  1790. SDE_ERROR("invalid arguments\n");
  1791. return -EINVAL;
  1792. }
  1793. priv = plane->dev->dev_private;
  1794. if (!priv || !priv->kms) {
  1795. SDE_ERROR("invalid KMS reference\n");
  1796. return -EINVAL;
  1797. }
  1798. sde_kms = to_sde_kms(priv->kms);
  1799. clk_ctrl = psde->pipe_hw->cap->clk_ctrl;
  1800. xin_id = psde->pipe_hw->cap->xin_id;
  1801. SDE_DEBUG_PLANE(psde, "pipe:%d xin_id:%d clk_ctrl:%d\n",
  1802. psde->pipe - SSPP_VIG0, xin_id, clk_ctrl);
  1803. SDE_EVT32_VERBOSE(psde, psde->pipe - SSPP_VIG0, xin_id, clk_ctrl);
  1804. return sde_vbif_halt_plane_xin(sde_kms, xin_id, clk_ctrl);
  1805. }
  1806. static void sde_plane_cleanup_fb(struct drm_plane *plane,
  1807. struct drm_plane_state *old_state)
  1808. {
  1809. struct sde_plane *psde = to_sde_plane(plane);
  1810. struct sde_plane_state *old_pstate;
  1811. int ret;
  1812. if (!old_state || !old_state->fb || !plane || !plane->state)
  1813. return;
  1814. old_pstate = to_sde_plane_state(old_state);
  1815. SDE_DEBUG_PLANE(psde, "FB[%u]\n", old_state->fb->base.id);
  1816. /*
  1817. * plane->state gets populated for next frame after swap_state. If
  1818. * plane->state->crtc pointer is not populated then it is not used in
  1819. * the next frame, hence making it an unused plane.
  1820. */
  1821. if ((plane->state->crtc == NULL) && !psde->is_virtual) {
  1822. SDE_DEBUG_PLANE(psde, "unused pipe:%u\n",
  1823. psde->pipe - SSPP_VIG0);
  1824. /* halt this plane now */
  1825. ret = pm_runtime_get_sync(plane->dev->dev);
  1826. if (ret < 0) {
  1827. SDE_ERROR("power resource enable failed with %d", ret);
  1828. SDE_EVT32(ret, SDE_EVTLOG_ERROR);
  1829. return;
  1830. }
  1831. ret = _sde_plane_fetch_halt(plane);
  1832. if (ret) {
  1833. SDE_ERROR_PLANE(psde,
  1834. "unused pipe %u halt failed\n",
  1835. psde->pipe - SSPP_VIG0);
  1836. SDE_EVT32(DRMID(plane), psde->pipe - SSPP_VIG0,
  1837. ret, SDE_EVTLOG_ERROR);
  1838. }
  1839. pm_runtime_put_sync(plane->dev->dev);
  1840. }
  1841. msm_framebuffer_cleanup(old_state->fb, old_pstate->aspace);
  1842. }
  1843. static void _sde_plane_sspp_atomic_check_mode_changed(struct sde_plane *psde,
  1844. struct drm_plane_state *state,
  1845. struct drm_plane_state *old_state)
  1846. {
  1847. struct sde_plane_state *pstate = to_sde_plane_state(state);
  1848. struct sde_plane_state *old_pstate = to_sde_plane_state(old_state);
  1849. struct drm_framebuffer *fb, *old_fb;
  1850. /* no need to check it again */
  1851. if (pstate->dirty == SDE_PLANE_DIRTY_ALL)
  1852. return;
  1853. if (!sde_plane_enabled(state) || !sde_plane_enabled(old_state)
  1854. || psde->is_error) {
  1855. SDE_DEBUG_PLANE(psde,
  1856. "enabling/disabling full modeset required\n");
  1857. pstate->dirty |= SDE_PLANE_DIRTY_ALL;
  1858. } else if (to_sde_plane_state(old_state)->pending) {
  1859. SDE_DEBUG_PLANE(psde, "still pending\n");
  1860. pstate->dirty |= SDE_PLANE_DIRTY_ALL;
  1861. } else if (pstate->multirect_index != old_pstate->multirect_index ||
  1862. pstate->multirect_mode != old_pstate->multirect_mode) {
  1863. SDE_DEBUG_PLANE(psde, "multirect config updated\n");
  1864. pstate->dirty |= SDE_PLANE_DIRTY_ALL;
  1865. } else if (state->src_w != old_state->src_w ||
  1866. state->src_h != old_state->src_h ||
  1867. state->src_x != old_state->src_x ||
  1868. state->src_y != old_state->src_y) {
  1869. SDE_DEBUG_PLANE(psde, "src rect updated\n");
  1870. pstate->dirty |= SDE_PLANE_DIRTY_RECTS;
  1871. } else if (state->crtc_w != old_state->crtc_w ||
  1872. state->crtc_h != old_state->crtc_h ||
  1873. state->crtc_x != old_state->crtc_x ||
  1874. state->crtc_y != old_state->crtc_y) {
  1875. SDE_DEBUG_PLANE(psde, "crtc rect updated\n");
  1876. pstate->dirty |= SDE_PLANE_DIRTY_RECTS;
  1877. } else if (pstate->excl_rect.w != old_pstate->excl_rect.w ||
  1878. pstate->excl_rect.h != old_pstate->excl_rect.h ||
  1879. pstate->excl_rect.x != old_pstate->excl_rect.x ||
  1880. pstate->excl_rect.y != old_pstate->excl_rect.y) {
  1881. SDE_DEBUG_PLANE(psde, "excl_rect updated\n");
  1882. pstate->dirty |= SDE_PLANE_DIRTY_RECTS;
  1883. } else if (pstate->rotation != old_pstate->rotation) {
  1884. SDE_DEBUG_PLANE(psde, "rotation updated 0x%x->0x%x\n",
  1885. pstate->rotation, old_pstate->rotation);
  1886. pstate->dirty |= SDE_PLANE_DIRTY_FORMAT;
  1887. }
  1888. fb = state->fb;
  1889. old_fb = old_state->fb;
  1890. if (!fb || !old_fb) {
  1891. SDE_DEBUG_PLANE(psde, "can't compare fb handles\n");
  1892. } else if ((fb->format->format != old_fb->format->format) ||
  1893. pstate->const_alpha_en != old_pstate->const_alpha_en) {
  1894. SDE_DEBUG_PLANE(psde, "format change\n");
  1895. pstate->dirty |= SDE_PLANE_DIRTY_FORMAT | SDE_PLANE_DIRTY_RECTS;
  1896. } else {
  1897. uint64_t new_mod = fb->modifier;
  1898. uint64_t old_mod = old_fb->modifier;
  1899. uint32_t *new_pitches = fb->pitches;
  1900. uint32_t *old_pitches = old_fb->pitches;
  1901. uint32_t *new_offset = fb->offsets;
  1902. uint32_t *old_offset = old_fb->offsets;
  1903. int i;
  1904. if (new_mod != old_mod) {
  1905. SDE_DEBUG_PLANE(psde,
  1906. "format modifiers change new_mode:%llu old_mode:%llu\n",
  1907. new_mod, old_mod);
  1908. pstate->dirty |= SDE_PLANE_DIRTY_FORMAT |
  1909. SDE_PLANE_DIRTY_RECTS;
  1910. }
  1911. for (i = 0; i < ARRAY_SIZE(fb->pitches); i++) {
  1912. if (new_pitches[i] != old_pitches[i]) {
  1913. SDE_DEBUG_PLANE(psde,
  1914. "pitches change plane:%d old_pitches:%u new_pitches:%u\n",
  1915. i, old_pitches[i], new_pitches[i]);
  1916. pstate->dirty |= SDE_PLANE_DIRTY_RECTS;
  1917. break;
  1918. }
  1919. }
  1920. for (i = 0; i < ARRAY_SIZE(fb->offsets); i++) {
  1921. if (new_offset[i] != old_offset[i]) {
  1922. SDE_DEBUG_PLANE(psde,
  1923. "offset change plane:%d old_offset:%u new_offset:%u\n",
  1924. i, old_offset[i], new_offset[i]);
  1925. pstate->dirty |= SDE_PLANE_DIRTY_FORMAT |
  1926. SDE_PLANE_DIRTY_RECTS;
  1927. break;
  1928. }
  1929. }
  1930. }
  1931. }
  1932. int sde_plane_validate_src_addr(struct drm_plane *plane,
  1933. unsigned long base_addr, u32 size)
  1934. {
  1935. int ret = -EINVAL;
  1936. u32 addr;
  1937. struct sde_plane *psde = to_sde_plane(plane);
  1938. if (!psde || !base_addr || !size) {
  1939. SDE_ERROR_PLANE(psde, "invalid arguments\n");
  1940. return ret;
  1941. }
  1942. if (psde->pipe_hw && psde->pipe_hw->ops.get_sourceaddress) {
  1943. addr = psde->pipe_hw->ops.get_sourceaddress(psde->pipe_hw,
  1944. is_sde_plane_virtual(plane));
  1945. if ((addr >= base_addr) && (addr < (base_addr + size)))
  1946. ret = 0;
  1947. }
  1948. return ret;
  1949. }
  1950. static int _sde_plane_validate_scaler_v2(struct sde_plane *psde,
  1951. struct sde_plane_state *pstate,
  1952. const struct sde_format *fmt,
  1953. uint32_t img_w, uint32_t img_h,
  1954. uint32_t src_w, uint32_t src_h,
  1955. uint32_t deci_w, uint32_t deci_h)
  1956. {
  1957. int i;
  1958. if (!psde || !pstate || !fmt) {
  1959. SDE_ERROR_PLANE(psde, "invalid arguments\n");
  1960. return -EINVAL;
  1961. }
  1962. if (psde->debugfs_default_scale ||
  1963. (pstate->scaler_check_state != SDE_PLANE_SCLCHECK_SCALER_V2 &&
  1964. pstate->scaler_check_state != SDE_PLANE_SCLCHECK_SCALER_V2_CHECK))
  1965. return 0;
  1966. pstate->scaler_check_state = SDE_PLANE_SCLCHECK_INVALID;
  1967. for (i = 0; i < SDE_MAX_PLANES; i++) {
  1968. uint32_t hor_req_pixels, hor_fetch_pixels;
  1969. uint32_t vert_req_pixels, vert_fetch_pixels;
  1970. uint32_t src_w_tmp, src_h_tmp;
  1971. uint32_t scaler_w, scaler_h;
  1972. bool rot;
  1973. /* re-use color plane 1's config for plane 2 */
  1974. if (i == 2)
  1975. continue;
  1976. src_w_tmp = src_w;
  1977. src_h_tmp = src_h;
  1978. /*
  1979. * For chroma plane, width is half for the following sub sampled
  1980. * formats. Except in case of decimation, where hardware avoids
  1981. * 1 line of decimation instead of downsampling.
  1982. */
  1983. if (i == 1) {
  1984. if (!deci_w &&
  1985. (fmt->chroma_sample == SDE_CHROMA_420 ||
  1986. fmt->chroma_sample == SDE_CHROMA_H2V1))
  1987. src_w_tmp >>= 1;
  1988. if (!deci_h &&
  1989. (fmt->chroma_sample == SDE_CHROMA_420 ||
  1990. fmt->chroma_sample == SDE_CHROMA_H1V2))
  1991. src_h_tmp >>= 1;
  1992. }
  1993. hor_req_pixels = pstate->pixel_ext.roi_w[i];
  1994. vert_req_pixels = pstate->pixel_ext.roi_h[i];
  1995. hor_fetch_pixels = DECIMATED_DIMENSION(src_w_tmp +
  1996. (int8_t)(pstate->pixel_ext.left_ftch[i] & 0xFF) +
  1997. (int8_t)(pstate->pixel_ext.right_ftch[i] & 0xFF),
  1998. deci_w);
  1999. vert_fetch_pixels = DECIMATED_DIMENSION(src_h_tmp +
  2000. (int8_t)(pstate->pixel_ext.top_ftch[i] & 0xFF) +
  2001. (int8_t)(pstate->pixel_ext.btm_ftch[i] & 0xFF),
  2002. deci_h);
  2003. if ((hor_req_pixels != hor_fetch_pixels) ||
  2004. (hor_fetch_pixels > img_w) ||
  2005. (vert_req_pixels != vert_fetch_pixels) ||
  2006. (vert_fetch_pixels > img_h)) {
  2007. SDE_ERROR_PLANE(psde,
  2008. "req %d/%d, fetch %d/%d, src %dx%d\n",
  2009. hor_req_pixels, vert_req_pixels,
  2010. hor_fetch_pixels, vert_fetch_pixels,
  2011. img_w, img_h);
  2012. return -EINVAL;
  2013. }
  2014. /*
  2015. * swap the scaler src width & height for inline-rotation 90
  2016. * comparison with Pixel-Extension, as PE is based on
  2017. * pre-rotation and QSEED is based on post-rotation
  2018. */
  2019. rot = pstate->rotation & DRM_MODE_ROTATE_90;
  2020. scaler_w = rot ? pstate->scaler3_cfg.src_height[i]
  2021. : pstate->scaler3_cfg.src_width[i];
  2022. scaler_h = rot ? pstate->scaler3_cfg.src_width[i]
  2023. : pstate->scaler3_cfg.src_height[i];
  2024. /*
  2025. * Alpha plane can only be scaled using bilinear or pixel
  2026. * repeat/drop, src_width and src_height are only specified
  2027. * for Y and UV plane
  2028. */
  2029. if (i != 3 && (hor_req_pixels != scaler_w ||
  2030. vert_req_pixels != scaler_h)) {
  2031. SDE_ERROR_PLANE(psde,
  2032. "roi[%d] roi:%dx%d scaler:%dx%d src:%dx%d rot:%d\n",
  2033. i, pstate->pixel_ext.roi_w[i],
  2034. pstate->pixel_ext.roi_h[i],
  2035. scaler_w, scaler_h, src_w, src_h, rot);
  2036. return -EINVAL;
  2037. }
  2038. /*
  2039. * SSPP fetch , unpack output and QSEED3 input lines need
  2040. * to match for Y plane
  2041. */
  2042. if (i == 0 &&
  2043. (sde_plane_get_property(pstate, PLANE_PROP_SRC_CONFIG) &
  2044. BIT(SDE_DRM_DEINTERLACE)) &&
  2045. ((pstate->scaler3_cfg.src_height[i] != (src_h/2)) ||
  2046. (pstate->pixel_ext.roi_h[i] != (src_h/2)))) {
  2047. SDE_ERROR_PLANE(psde,
  2048. "de-interlace fail roi[%d] %d/%d, src %dx%d, src %dx%d\n",
  2049. i, pstate->pixel_ext.roi_w[i],
  2050. pstate->pixel_ext.roi_h[i],
  2051. pstate->scaler3_cfg.src_width[i],
  2052. pstate->scaler3_cfg.src_height[i],
  2053. src_w, src_h);
  2054. return -EINVAL;
  2055. }
  2056. }
  2057. pstate->scaler_check_state = SDE_PLANE_SCLCHECK_SCALER_V2;
  2058. return 0;
  2059. }
  2060. static int _sde_atomic_check_decimation_scaler(struct drm_plane_state *state,
  2061. struct sde_plane *psde, const struct sde_format *fmt,
  2062. struct sde_plane_state *pstate, struct sde_rect *src,
  2063. struct sde_rect *dst, u32 width, u32 height)
  2064. {
  2065. int ret = 0;
  2066. uint32_t deci_w, deci_h, src_deci_w, src_deci_h;
  2067. uint32_t scaler_src_w, scaler_src_h;
  2068. uint32_t max_downscale_num, max_downscale_denom;
  2069. uint32_t max_upscale, max_linewidth;
  2070. bool inline_rotation, rt_client;
  2071. struct drm_crtc *crtc;
  2072. deci_w = sde_plane_get_property(pstate, PLANE_PROP_H_DECIMATE);
  2073. deci_h = sde_plane_get_property(pstate, PLANE_PROP_V_DECIMATE);
  2074. src_deci_w = DECIMATED_DIMENSION(src->w, deci_w);
  2075. src_deci_h = DECIMATED_DIMENSION(src->h, deci_h);
  2076. /* with inline rotator, the source of the scaler is post-rotated */
  2077. inline_rotation = pstate->rotation & DRM_MODE_ROTATE_90 ? true : false;
  2078. if (inline_rotation) {
  2079. scaler_src_w = src_deci_h;
  2080. scaler_src_h = src_deci_w;
  2081. } else {
  2082. scaler_src_w = src_deci_w;
  2083. scaler_src_h = src_deci_h;
  2084. }
  2085. max_upscale = psde->pipe_sblk->maxupscale;
  2086. max_linewidth = psde->pipe_sblk->maxlinewidth;
  2087. crtc = state->crtc;
  2088. rt_client = sde_crtc_is_rt_client(crtc);
  2089. max_downscale_denom = 1;
  2090. /* inline rotation RT clients have a different max downscaling limit */
  2091. if (inline_rotation) {
  2092. if (rt_client) {
  2093. max_downscale_num =
  2094. psde->pipe_sblk->in_rot_maxdwnscale_rt_num;
  2095. max_downscale_denom =
  2096. psde->pipe_sblk->in_rot_maxdwnscale_rt_denom;
  2097. } else {
  2098. max_downscale_num =
  2099. psde->pipe_sblk->in_rot_maxdwnscale_nrt;
  2100. }
  2101. } else {
  2102. max_downscale_num = psde->pipe_sblk->maxdwnscale;
  2103. }
  2104. /* decimation validation */
  2105. if ((deci_w || deci_h)
  2106. && ((deci_w > psde->pipe_sblk->maxhdeciexp)
  2107. || (deci_h > psde->pipe_sblk->maxvdeciexp))) {
  2108. SDE_ERROR_PLANE(psde, "too much decimation requested\n");
  2109. ret = -EINVAL;
  2110. } else if ((deci_w || deci_h)
  2111. && (fmt->fetch_mode != SDE_FETCH_LINEAR)) {
  2112. SDE_ERROR_PLANE(psde, "decimation requires linear fetch\n");
  2113. ret = -EINVAL;
  2114. } else if (!(psde->features & SDE_SSPP_SCALER) &&
  2115. ((src->w != dst->w) || (src->h != dst->h))) {
  2116. SDE_ERROR_PLANE(psde,
  2117. "pipe doesn't support scaling %ux%u->%ux%u\n",
  2118. src->w, src->h, dst->w, dst->h);
  2119. ret = -EINVAL;
  2120. /* check decimated source width */
  2121. } else if (src_deci_w > max_linewidth) {
  2122. SDE_ERROR_PLANE(psde,
  2123. "invalid src w:%u, deci w:%u, line w:%u\n",
  2124. src->w, src_deci_w, max_linewidth);
  2125. ret = -E2BIG;
  2126. }
  2127. /* check max scaler capability */
  2128. else if (((scaler_src_w * max_upscale) < dst->w) ||
  2129. ((scaler_src_h * max_upscale) < dst->h) ||
  2130. (((dst->w * max_downscale_num) / max_downscale_denom)
  2131. < scaler_src_w) ||
  2132. (((dst->h * max_downscale_num) / max_downscale_denom)
  2133. < scaler_src_h)) {
  2134. SDE_ERROR_PLANE(psde,
  2135. "too much scaling requested %ux%u->%ux%u rot:%d\n",
  2136. scaler_src_w, scaler_src_h, dst->w, dst->h,
  2137. inline_rotation);
  2138. ret = -E2BIG;
  2139. } else if (_sde_plane_validate_scaler_v2(psde, pstate, fmt,
  2140. width, height,
  2141. src->w, src->h, deci_w, deci_h)) {
  2142. ret = -EINVAL;
  2143. }
  2144. return ret;
  2145. }
  2146. static int _sde_atomic_check_excl_rect(struct sde_plane *psde,
  2147. struct sde_plane_state *pstate, struct sde_rect *src,
  2148. const struct sde_format *fmt, int ret)
  2149. {
  2150. /* check excl rect configs */
  2151. if (!ret && pstate->excl_rect.w && pstate->excl_rect.h) {
  2152. struct sde_rect intersect;
  2153. /*
  2154. * Check exclusion rect against src rect.
  2155. * it must intersect with source rect.
  2156. */
  2157. sde_kms_rect_intersect(src, &pstate->excl_rect, &intersect);
  2158. if (intersect.w != pstate->excl_rect.w ||
  2159. intersect.h != pstate->excl_rect.h ||
  2160. SDE_FORMAT_IS_YUV(fmt)) {
  2161. SDE_ERROR_PLANE(psde,
  2162. "invalid excl_rect:{%d,%d,%d,%d} src:{%d,%d,%d,%d}, fmt: %4.4s\n",
  2163. pstate->excl_rect.x, pstate->excl_rect.y,
  2164. pstate->excl_rect.w, pstate->excl_rect.h,
  2165. src->x, src->y, src->w, src->h,
  2166. (char *)&fmt->base.pixel_format);
  2167. ret = -EINVAL;
  2168. }
  2169. SDE_DEBUG_PLANE(psde, "excl_rect: {%d,%d,%d,%d}\n",
  2170. pstate->excl_rect.x, pstate->excl_rect.y,
  2171. pstate->excl_rect.w, pstate->excl_rect.h);
  2172. }
  2173. return ret;
  2174. }
  2175. static int sde_plane_sspp_atomic_check(struct drm_plane *plane,
  2176. struct drm_plane_state *state)
  2177. {
  2178. int ret = 0;
  2179. struct sde_plane *psde;
  2180. struct sde_plane_state *pstate;
  2181. const struct msm_format *msm_fmt;
  2182. const struct sde_format *fmt;
  2183. struct sde_rect src, dst;
  2184. uint32_t min_src_size;
  2185. bool q16_data = true;
  2186. struct drm_framebuffer *fb;
  2187. u32 width;
  2188. u32 height;
  2189. psde = to_sde_plane(plane);
  2190. pstate = to_sde_plane_state(state);
  2191. if (!psde->pipe_sblk) {
  2192. SDE_ERROR_PLANE(psde, "invalid catalog\n");
  2193. return -EINVAL;
  2194. }
  2195. /* src values are in Q16 fixed point, convert to integer */
  2196. POPULATE_RECT(&src, state->src_x, state->src_y,
  2197. state->src_w, state->src_h, q16_data);
  2198. POPULATE_RECT(&dst, state->crtc_x, state->crtc_y, state->crtc_w,
  2199. state->crtc_h, !q16_data);
  2200. SDE_DEBUG_PLANE(psde, "check %d -> %d\n",
  2201. sde_plane_enabled(plane->state), sde_plane_enabled(state));
  2202. if (!sde_plane_enabled(state))
  2203. goto modeset_update;
  2204. fb = state->fb;
  2205. width = fb ? state->fb->width : 0x0;
  2206. height = fb ? state->fb->height : 0x0;
  2207. SDE_DEBUG("plane%d sspp:%x/%dx%d/%4.4s/%llx\n",
  2208. plane->base.id,
  2209. pstate->rotation,
  2210. width, height,
  2211. fb ? (char *) &state->fb->format->format : 0x0,
  2212. fb ? state->fb->modifier : 0x0);
  2213. SDE_DEBUG("src:%dx%d %d,%d crtc:%dx%d+%d+%d\n",
  2214. state->src_w >> 16, state->src_h >> 16,
  2215. state->src_x >> 16, state->src_y >> 16,
  2216. state->crtc_w, state->crtc_h,
  2217. state->crtc_x, state->crtc_y);
  2218. msm_fmt = msm_framebuffer_format(fb);
  2219. fmt = to_sde_format(msm_fmt);
  2220. min_src_size = SDE_FORMAT_IS_YUV(fmt) ? 2 : 1;
  2221. if (SDE_FORMAT_IS_YUV(fmt) &&
  2222. (!(psde->features & SDE_SSPP_SCALER) ||
  2223. !(psde->features & (BIT(SDE_SSPP_CSC)
  2224. | BIT(SDE_SSPP_CSC_10BIT))))) {
  2225. SDE_ERROR_PLANE(psde,
  2226. "plane doesn't have scaler/csc for yuv\n");
  2227. ret = -EINVAL;
  2228. /* check src bounds */
  2229. } else if (width > MAX_IMG_WIDTH ||
  2230. height > MAX_IMG_HEIGHT ||
  2231. src.w < min_src_size || src.h < min_src_size ||
  2232. CHECK_LAYER_BOUNDS(src.x, src.w, width) ||
  2233. CHECK_LAYER_BOUNDS(src.y, src.h, height)) {
  2234. SDE_ERROR_PLANE(psde, "invalid source %u, %u, %ux%u\n",
  2235. src.x, src.y, src.w, src.h);
  2236. ret = -E2BIG;
  2237. /* valid yuv image */
  2238. } else if (SDE_FORMAT_IS_YUV(fmt) && ((src.x & 0x1) || (src.y & 0x1) ||
  2239. (src.w & 0x1) || (src.h & 0x1))) {
  2240. SDE_ERROR_PLANE(psde, "invalid yuv source %u, %u, %ux%u\n",
  2241. src.x, src.y, src.w, src.h);
  2242. ret = -EINVAL;
  2243. /* min dst support */
  2244. } else if (dst.w < 0x1 || dst.h < 0x1) {
  2245. SDE_ERROR_PLANE(psde, "invalid dest rect %u, %u, %ux%u\n",
  2246. dst.x, dst.y, dst.w, dst.h);
  2247. ret = -EINVAL;
  2248. }
  2249. if (ret)
  2250. return ret;
  2251. ret = _sde_atomic_check_decimation_scaler(state, psde, fmt, pstate,
  2252. &src, &dst, width, height);
  2253. if (ret)
  2254. return ret;
  2255. ret = _sde_atomic_check_excl_rect(psde, pstate,
  2256. &src, fmt, ret);
  2257. if (ret)
  2258. return ret;
  2259. pstate->const_alpha_en = fmt->alpha_enable &&
  2260. (SDE_DRM_BLEND_OP_OPAQUE !=
  2261. sde_plane_get_property(pstate, PLANE_PROP_BLEND_OP)) &&
  2262. (pstate->stage != SDE_STAGE_0);
  2263. modeset_update:
  2264. if (!ret)
  2265. _sde_plane_sspp_atomic_check_mode_changed(psde,
  2266. state, plane->state);
  2267. return ret;
  2268. }
  2269. static int sde_plane_atomic_check(struct drm_plane *plane,
  2270. struct drm_plane_state *state)
  2271. {
  2272. int ret = 0;
  2273. struct sde_plane *psde;
  2274. struct sde_plane_state *pstate;
  2275. if (!plane || !state) {
  2276. SDE_ERROR("invalid arg(s), plane %d state %d\n",
  2277. !plane, !state);
  2278. ret = -EINVAL;
  2279. goto exit;
  2280. }
  2281. psde = to_sde_plane(plane);
  2282. pstate = to_sde_plane_state(state);
  2283. SDE_DEBUG_PLANE(psde, "\n");
  2284. ret = sde_plane_rot_atomic_check(plane, state);
  2285. if (ret)
  2286. goto exit;
  2287. ret = sde_plane_sspp_atomic_check(plane, state);
  2288. exit:
  2289. return ret;
  2290. }
  2291. void sde_plane_flush(struct drm_plane *plane)
  2292. {
  2293. struct sde_plane *psde;
  2294. struct sde_plane_state *pstate;
  2295. if (!plane || !plane->state) {
  2296. SDE_ERROR("invalid plane\n");
  2297. return;
  2298. }
  2299. psde = to_sde_plane(plane);
  2300. pstate = to_sde_plane_state(plane->state);
  2301. /*
  2302. * These updates have to be done immediately before the plane flush
  2303. * timing, and may not be moved to the atomic_update/mode_set functions.
  2304. */
  2305. if (psde->is_error)
  2306. /* force white frame with 100% alpha pipe output on error */
  2307. _sde_plane_color_fill(psde, 0xFFFFFF, 0xFF);
  2308. else if (psde->color_fill & SDE_PLANE_COLOR_FILL_FLAG)
  2309. /* force 100% alpha */
  2310. _sde_plane_color_fill(psde, psde->color_fill, 0xFF);
  2311. else if (psde->pipe_hw && psde->csc_ptr && psde->pipe_hw->ops.setup_csc)
  2312. psde->pipe_hw->ops.setup_csc(psde->pipe_hw, psde->csc_ptr);
  2313. /* flag h/w flush complete */
  2314. if (plane->state)
  2315. pstate->pending = false;
  2316. }
  2317. /**
  2318. * sde_plane_set_error: enable/disable error condition
  2319. * @plane: pointer to drm_plane structure
  2320. */
  2321. void sde_plane_set_error(struct drm_plane *plane, bool error)
  2322. {
  2323. struct sde_plane *psde;
  2324. if (!plane)
  2325. return;
  2326. psde = to_sde_plane(plane);
  2327. psde->is_error = error;
  2328. }
  2329. static void _sde_plane_sspp_setup_sys_cache(struct sde_plane *psde,
  2330. struct sde_plane_state *pstate, const struct sde_format *fmt)
  2331. {
  2332. if (!psde->pipe_hw->ops.setup_sys_cache ||
  2333. !(psde->perf_features & BIT(SDE_PERF_SSPP_SYS_CACHE)))
  2334. return;
  2335. SDE_DEBUG("features:0x%x rotation:0x%x\n",
  2336. psde->features, pstate->rotation);
  2337. if ((pstate->rotation & DRM_MODE_ROTATE_90) &&
  2338. sde_format_is_tp10_ubwc(fmt)) {
  2339. pstate->sc_cfg.rd_en = true;
  2340. pstate->sc_cfg.rd_scid =
  2341. psde->pipe_sblk->llcc_scid;
  2342. pstate->sc_cfg.flags = SSPP_SYS_CACHE_EN_FLAG |
  2343. SSPP_SYS_CACHE_SCID;
  2344. } else {
  2345. pstate->sc_cfg.rd_en = false;
  2346. pstate->sc_cfg.rd_scid = 0x0;
  2347. pstate->sc_cfg.flags = SSPP_SYS_CACHE_EN_FLAG |
  2348. SSPP_SYS_CACHE_SCID;
  2349. }
  2350. psde->pipe_hw->ops.setup_sys_cache(
  2351. psde->pipe_hw, &pstate->sc_cfg);
  2352. }
  2353. static void _sde_plane_map_prop_to_dirty_bits(void)
  2354. {
  2355. plane_prop_array[PLANE_PROP_SCALER_V1] =
  2356. plane_prop_array[PLANE_PROP_SCALER_V2] =
  2357. plane_prop_array[PLANE_PROP_SCALER_LUT_ED] =
  2358. plane_prop_array[PLANE_PROP_SCALER_LUT_CIR] =
  2359. plane_prop_array[PLANE_PROP_SCALER_LUT_SEP] =
  2360. plane_prop_array[PLANE_PROP_H_DECIMATE] =
  2361. plane_prop_array[PLANE_PROP_V_DECIMATE] =
  2362. plane_prop_array[PLANE_PROP_SRC_CONFIG] =
  2363. plane_prop_array[PLANE_PROP_ZPOS] =
  2364. plane_prop_array[PLANE_PROP_EXCL_RECT_V1] =
  2365. SDE_PLANE_DIRTY_RECTS;
  2366. plane_prop_array[PLANE_PROP_CSC_V1] =
  2367. plane_prop_array[PLANE_PROP_CSC_DMA_V1] =
  2368. plane_prop_array[PLANE_PROP_INVERSE_PMA] =
  2369. SDE_PLANE_DIRTY_FORMAT;
  2370. plane_prop_array[PLANE_PROP_MULTIRECT_MODE] =
  2371. plane_prop_array[PLANE_PROP_COLOR_FILL] =
  2372. SDE_PLANE_DIRTY_ALL;
  2373. /* no special action required */
  2374. plane_prop_array[PLANE_PROP_INFO] =
  2375. plane_prop_array[PLANE_PROP_ALPHA] =
  2376. plane_prop_array[PLANE_PROP_INPUT_FENCE] =
  2377. plane_prop_array[PLANE_PROP_BLEND_OP] = 0;
  2378. plane_prop_array[PLANE_PROP_FB_TRANSLATION_MODE] =
  2379. SDE_PLANE_DIRTY_FB_TRANSLATION_MODE;
  2380. plane_prop_array[PLANE_PROP_PREFILL_SIZE] =
  2381. plane_prop_array[PLANE_PROP_PREFILL_TIME] =
  2382. SDE_PLANE_DIRTY_PERF;
  2383. plane_prop_array[PLANE_PROP_VIG_GAMUT] = SDE_PLANE_DIRTY_VIG_GAMUT;
  2384. plane_prop_array[PLANE_PROP_VIG_IGC] = SDE_PLANE_DIRTY_VIG_IGC;
  2385. plane_prop_array[PLANE_PROP_DMA_IGC] = SDE_PLANE_DIRTY_DMA_IGC;
  2386. plane_prop_array[PLANE_PROP_DMA_GC] = SDE_PLANE_DIRTY_DMA_GC;
  2387. plane_prop_array[PLANE_PROP_SKIN_COLOR] =
  2388. plane_prop_array[PLANE_PROP_SKY_COLOR] =
  2389. plane_prop_array[PLANE_PROP_FOLIAGE_COLOR] =
  2390. plane_prop_array[PLANE_PROP_HUE_ADJUST] =
  2391. plane_prop_array[PLANE_PROP_SATURATION_ADJUST] =
  2392. plane_prop_array[PLANE_PROP_VALUE_ADJUST] =
  2393. plane_prop_array[PLANE_PROP_CONTRAST_ADJUST] =
  2394. SDE_PLANE_DIRTY_ALL;
  2395. }
  2396. static inline bool _sde_plane_allow_uidle(struct sde_plane *psde,
  2397. struct sde_rect *src, struct sde_rect *dst)
  2398. {
  2399. u32 max_downscale = psde->catalog->uidle_cfg.max_dwnscale;
  2400. u32 downscale = (src->h * 1000)/dst->h;
  2401. return (downscale > max_downscale) ? false : true;
  2402. }
  2403. static void _sde_plane_setup_uidle(struct drm_crtc *crtc,
  2404. struct sde_plane *psde, struct sde_plane_state *pstate,
  2405. struct sde_rect *src, struct sde_rect *dst)
  2406. {
  2407. struct sde_hw_pipe_uidle_cfg cfg;
  2408. u32 line_time = sde_get_linetime(&crtc->mode); /* nS */
  2409. u32 fal1_target_idle_time_ns =
  2410. psde->catalog->uidle_cfg.fal1_target_idle_time * 1000; /* nS */
  2411. u32 fal10_target_idle_time_ns =
  2412. psde->catalog->uidle_cfg.fal10_target_idle_time * 1000; /* nS */
  2413. u32 fal10_threshold =
  2414. psde->catalog->uidle_cfg.fal10_threshold; /* uS */
  2415. if (line_time && fal10_threshold && fal10_target_idle_time_ns &&
  2416. fal1_target_idle_time_ns) {
  2417. cfg.enable = _sde_plane_allow_uidle(psde, src, dst);
  2418. cfg.fal10_threshold = fal10_threshold;
  2419. cfg.fal10_exit_threshold = fal10_threshold + 2;
  2420. cfg.fal1_threshold = 1 +
  2421. (fal1_target_idle_time_ns*1000/line_time*2)/1000;
  2422. cfg.fal_allowed_threshold = fal10_threshold +
  2423. (fal10_target_idle_time_ns*1000/line_time*2)/1000;
  2424. } else {
  2425. SDE_ERROR("invalid settings, will disable UIDLE %d %d %d %d\n",
  2426. line_time, fal10_threshold, fal10_target_idle_time_ns,
  2427. fal1_target_idle_time_ns);
  2428. memset(&cfg, 0, sizeof(struct sde_hw_pipe_uidle_cfg));
  2429. }
  2430. SDE_DEBUG_PLANE(psde,
  2431. "tholds: fal10=%d fal10_exit=%d fal1=%d fal_allowed=%d\n",
  2432. cfg.fal10_threshold, cfg.fal10_exit_threshold,
  2433. cfg.fal1_threshold, cfg.fal_allowed_threshold);
  2434. SDE_DEBUG_PLANE(psde,
  2435. "times: line:%d fal1_idle:%d fal10_idle:%d dwnscale:%d\n",
  2436. line_time, fal1_target_idle_time_ns,
  2437. fal10_target_idle_time_ns,
  2438. psde->catalog->uidle_cfg.max_dwnscale);
  2439. SDE_EVT32_VERBOSE(cfg.enable,
  2440. cfg.fal10_threshold, cfg.fal10_exit_threshold,
  2441. cfg.fal1_threshold, cfg.fal_allowed_threshold,
  2442. psde->catalog->uidle_cfg.max_dwnscale);
  2443. psde->pipe_hw->ops.setup_uidle(
  2444. psde->pipe_hw, &cfg,
  2445. pstate->multirect_index);
  2446. }
  2447. static void _sde_plane_update_secure_session(struct sde_plane *psde,
  2448. struct sde_plane_state *pstate)
  2449. {
  2450. bool enable = false;
  2451. int mode = sde_plane_get_property(pstate,
  2452. PLANE_PROP_FB_TRANSLATION_MODE);
  2453. if ((mode == SDE_DRM_FB_SEC) ||
  2454. (mode == SDE_DRM_FB_SEC_DIR_TRANS))
  2455. enable = true;
  2456. /* update secure session flag */
  2457. psde->pipe_hw->ops.setup_secure_address(psde->pipe_hw,
  2458. pstate->multirect_index,
  2459. enable);
  2460. }
  2461. static void _sde_plane_update_roi_config(struct drm_plane *plane,
  2462. struct drm_crtc *crtc, struct drm_framebuffer *fb)
  2463. {
  2464. const struct sde_format *fmt;
  2465. const struct msm_format *msm_fmt;
  2466. struct sde_plane *psde;
  2467. struct drm_plane_state *state;
  2468. struct sde_plane_state *pstate;
  2469. struct sde_rect src, dst;
  2470. const struct sde_rect *crtc_roi;
  2471. bool q16_data = true;
  2472. int idx;
  2473. psde = to_sde_plane(plane);
  2474. state = plane->state;
  2475. pstate = to_sde_plane_state(state);
  2476. msm_fmt = msm_framebuffer_format(fb);
  2477. if (!msm_fmt) {
  2478. SDE_ERROR("crtc%d plane%d: null format\n",
  2479. DRMID(crtc), DRMID(plane));
  2480. return;
  2481. }
  2482. fmt = to_sde_format(msm_fmt);
  2483. POPULATE_RECT(&src, state->src_x, state->src_y,
  2484. state->src_w, state->src_h, q16_data);
  2485. POPULATE_RECT(&dst, state->crtc_x, state->crtc_y,
  2486. state->crtc_w, state->crtc_h, !q16_data);
  2487. SDE_DEBUG_PLANE(psde,
  2488. "FB[%u] %u,%u,%ux%u->crtc%u %d,%d,%ux%u, %4.4s ubwc %d\n",
  2489. fb->base.id, src.x, src.y, src.w, src.h,
  2490. crtc->base.id, dst.x, dst.y, dst.w, dst.h,
  2491. (char *)&fmt->base.pixel_format,
  2492. SDE_FORMAT_IS_UBWC(fmt));
  2493. if (sde_plane_get_property(pstate, PLANE_PROP_SRC_CONFIG) &
  2494. BIT(SDE_DRM_DEINTERLACE)) {
  2495. SDE_DEBUG_PLANE(psde, "deinterlace\n");
  2496. for (idx = 0; idx < SDE_MAX_PLANES; ++idx)
  2497. psde->pipe_cfg.layout.plane_pitch[idx] <<= 1;
  2498. src.h /= 2;
  2499. src.y = DIV_ROUND_UP(src.y, 2);
  2500. src.y &= ~0x1;
  2501. }
  2502. /*
  2503. * adjust layer mixer position of the sspp in the presence
  2504. * of a partial update to the active lm origin
  2505. */
  2506. sde_crtc_get_crtc_roi(crtc->state, &crtc_roi);
  2507. dst.x -= crtc_roi->x;
  2508. dst.y -= crtc_roi->y;
  2509. /* check for UIDLE */
  2510. if (psde->pipe_hw->ops.setup_uidle)
  2511. _sde_plane_setup_uidle(crtc, psde, pstate, &src, &dst);
  2512. psde->pipe_cfg.src_rect = src;
  2513. psde->pipe_cfg.dst_rect = dst;
  2514. _sde_plane_setup_scaler(psde, pstate, fmt, false);
  2515. /* check for color fill */
  2516. psde->color_fill = (uint32_t)sde_plane_get_property(pstate,
  2517. PLANE_PROP_COLOR_FILL);
  2518. if (psde->color_fill & SDE_PLANE_COLOR_FILL_FLAG) {
  2519. /* skip remaining processing on color fill */
  2520. pstate->dirty = 0x0;
  2521. } else if (psde->pipe_hw->ops.setup_rects) {
  2522. psde->pipe_hw->ops.setup_rects(psde->pipe_hw,
  2523. &psde->pipe_cfg,
  2524. pstate->multirect_index);
  2525. }
  2526. if (psde->pipe_hw->ops.setup_pe &&
  2527. (pstate->multirect_index != SDE_SSPP_RECT_1))
  2528. psde->pipe_hw->ops.setup_pe(psde->pipe_hw,
  2529. &pstate->pixel_ext);
  2530. /**
  2531. * when programmed in multirect mode, scalar block will be
  2532. * bypassed. Still we need to update alpha and bitwidth
  2533. * ONLY for RECT0
  2534. */
  2535. if (psde->pipe_hw->ops.setup_scaler &&
  2536. pstate->multirect_index != SDE_SSPP_RECT_1) {
  2537. psde->pipe_hw->ctl = _sde_plane_get_hw_ctl(plane);
  2538. psde->pipe_hw->ops.setup_scaler(psde->pipe_hw,
  2539. &psde->pipe_cfg, &pstate->pixel_ext,
  2540. &pstate->scaler3_cfg);
  2541. }
  2542. /* update excl rect */
  2543. if (psde->pipe_hw->ops.setup_excl_rect)
  2544. psde->pipe_hw->ops.setup_excl_rect(psde->pipe_hw,
  2545. &pstate->excl_rect,
  2546. pstate->multirect_index);
  2547. if (psde->pipe_hw->ops.setup_multirect)
  2548. psde->pipe_hw->ops.setup_multirect(
  2549. psde->pipe_hw,
  2550. pstate->multirect_index,
  2551. pstate->multirect_mode);
  2552. }
  2553. static void _sde_plane_update_format_and_rects(struct sde_plane *psde,
  2554. struct sde_plane_state *pstate, const struct sde_format *fmt)
  2555. {
  2556. uint32_t src_flags = 0;
  2557. SDE_DEBUG_PLANE(psde, "rotation 0x%X\n", pstate->rotation);
  2558. if (pstate->rotation & DRM_MODE_REFLECT_X)
  2559. src_flags |= SDE_SSPP_FLIP_LR;
  2560. if (pstate->rotation & DRM_MODE_REFLECT_Y)
  2561. src_flags |= SDE_SSPP_FLIP_UD;
  2562. if (pstate->rotation & DRM_MODE_ROTATE_90)
  2563. src_flags |= SDE_SSPP_ROT_90;
  2564. /* update format */
  2565. psde->pipe_hw->ops.setup_format(psde->pipe_hw, fmt,
  2566. pstate->const_alpha_en, src_flags,
  2567. pstate->multirect_index);
  2568. if (psde->pipe_hw->ops.setup_cdp) {
  2569. struct sde_hw_pipe_cdp_cfg *cdp_cfg = &pstate->cdp_cfg;
  2570. memset(cdp_cfg, 0, sizeof(struct sde_hw_pipe_cdp_cfg));
  2571. cdp_cfg->enable = psde->catalog->perf.cdp_cfg
  2572. [SDE_PERF_CDP_USAGE_RT].rd_enable;
  2573. cdp_cfg->ubwc_meta_enable =
  2574. SDE_FORMAT_IS_UBWC(fmt);
  2575. cdp_cfg->tile_amortize_enable =
  2576. SDE_FORMAT_IS_UBWC(fmt) ||
  2577. SDE_FORMAT_IS_TILE(fmt);
  2578. cdp_cfg->preload_ahead = SDE_WB_CDP_PRELOAD_AHEAD_64;
  2579. psde->pipe_hw->ops.setup_cdp(psde->pipe_hw, cdp_cfg,
  2580. pstate->multirect_index);
  2581. }
  2582. _sde_plane_sspp_setup_sys_cache(psde, pstate, fmt);
  2583. /* update csc */
  2584. if (SDE_FORMAT_IS_YUV(fmt))
  2585. _sde_plane_setup_csc(psde);
  2586. else
  2587. psde->csc_ptr = 0;
  2588. if (psde->pipe_hw->ops.setup_inverse_pma) {
  2589. uint32_t pma_mode = 0;
  2590. if (fmt->alpha_enable)
  2591. pma_mode = (uint32_t) sde_plane_get_property(
  2592. pstate, PLANE_PROP_INVERSE_PMA);
  2593. psde->pipe_hw->ops.setup_inverse_pma(psde->pipe_hw,
  2594. pstate->multirect_index, pma_mode);
  2595. }
  2596. if (psde->pipe_hw->ops.setup_dgm_csc)
  2597. psde->pipe_hw->ops.setup_dgm_csc(psde->pipe_hw,
  2598. pstate->multirect_index, psde->csc_usr_ptr);
  2599. }
  2600. static void _sde_plane_update_sharpening(struct sde_plane *psde)
  2601. {
  2602. psde->sharp_cfg.strength = SHARP_STRENGTH_DEFAULT;
  2603. psde->sharp_cfg.edge_thr = SHARP_EDGE_THR_DEFAULT;
  2604. psde->sharp_cfg.smooth_thr = SHARP_SMOOTH_THR_DEFAULT;
  2605. psde->sharp_cfg.noise_thr = SHARP_NOISE_THR_DEFAULT;
  2606. psde->pipe_hw->ops.setup_sharpening(psde->pipe_hw,
  2607. &psde->sharp_cfg);
  2608. }
  2609. static void _sde_plane_update_properties(struct drm_plane *plane,
  2610. struct drm_crtc *crtc, struct drm_framebuffer *fb)
  2611. {
  2612. uint32_t nplanes;
  2613. const struct msm_format *msm_fmt;
  2614. const struct sde_format *fmt;
  2615. struct sde_plane *psde;
  2616. struct drm_plane_state *state;
  2617. struct sde_plane_state *pstate;
  2618. psde = to_sde_plane(plane);
  2619. state = plane->state;
  2620. pstate = to_sde_plane_state(state);
  2621. if (!pstate) {
  2622. SDE_ERROR("invalid plane state for plane%d\n", DRMID(plane));
  2623. return;
  2624. }
  2625. msm_fmt = msm_framebuffer_format(fb);
  2626. if (!msm_fmt) {
  2627. SDE_ERROR("crtc%d plane%d: null format\n",
  2628. DRMID(crtc), DRMID(plane));
  2629. return;
  2630. }
  2631. fmt = to_sde_format(msm_fmt);
  2632. nplanes = fmt->num_planes;
  2633. /* update secure session flag */
  2634. if (pstate->dirty & SDE_PLANE_DIRTY_FB_TRANSLATION_MODE)
  2635. _sde_plane_update_secure_session(psde, pstate);
  2636. /* update roi config */
  2637. if (pstate->dirty & SDE_PLANE_DIRTY_RECTS)
  2638. _sde_plane_update_roi_config(plane, crtc, fb);
  2639. if ((pstate->dirty & SDE_PLANE_DIRTY_FORMAT ||
  2640. pstate->dirty & SDE_PLANE_DIRTY_RECTS) &&
  2641. psde->pipe_hw->ops.setup_format)
  2642. _sde_plane_update_format_and_rects(psde, pstate, fmt);
  2643. sde_color_process_plane_setup(plane);
  2644. /* update sharpening */
  2645. if ((pstate->dirty & SDE_PLANE_DIRTY_SHARPEN) &&
  2646. psde->pipe_hw->ops.setup_sharpening)
  2647. _sde_plane_update_sharpening(psde);
  2648. _sde_plane_set_qos_lut(plane, fb);
  2649. _sde_plane_set_danger_lut(plane, fb);
  2650. if (plane->type != DRM_PLANE_TYPE_CURSOR) {
  2651. _sde_plane_set_qos_ctrl(plane, true, SDE_PLANE_QOS_PANIC_CTRL);
  2652. _sde_plane_set_ot_limit(plane, crtc);
  2653. if (pstate->dirty & SDE_PLANE_DIRTY_PERF)
  2654. _sde_plane_set_ts_prefill(plane, pstate);
  2655. }
  2656. if ((pstate->dirty & SDE_PLANE_DIRTY_ALL) == SDE_PLANE_DIRTY_ALL)
  2657. _sde_plane_set_qos_remap(plane, true);
  2658. else
  2659. _sde_plane_set_qos_remap(plane, false);
  2660. /* clear dirty */
  2661. pstate->dirty = 0x0;
  2662. }
  2663. static int sde_plane_sspp_atomic_update(struct drm_plane *plane,
  2664. struct drm_plane_state *old_state)
  2665. {
  2666. struct sde_plane *psde;
  2667. struct drm_plane_state *state;
  2668. struct sde_plane_state *pstate;
  2669. struct sde_plane_state *old_pstate;
  2670. struct drm_crtc *crtc;
  2671. struct drm_framebuffer *fb;
  2672. int idx;
  2673. int dirty_prop_flag;
  2674. if (!plane) {
  2675. SDE_ERROR("invalid plane\n");
  2676. return -EINVAL;
  2677. } else if (!plane->state) {
  2678. SDE_ERROR("invalid plane state\n");
  2679. return -EINVAL;
  2680. } else if (!old_state) {
  2681. SDE_ERROR("invalid old state\n");
  2682. return -EINVAL;
  2683. }
  2684. psde = to_sde_plane(plane);
  2685. state = plane->state;
  2686. pstate = to_sde_plane_state(state);
  2687. old_pstate = to_sde_plane_state(old_state);
  2688. crtc = state->crtc;
  2689. fb = state->fb;
  2690. if (!crtc || !fb) {
  2691. SDE_ERROR_PLANE(psde, "invalid crtc %d or fb %d\n",
  2692. !crtc, !fb);
  2693. return -EINVAL;
  2694. }
  2695. SDE_DEBUG(
  2696. "plane%d sspp:%dx%d/%4.4s/%llx/%dx%d+%d+%d/%x crtc:%dx%d+%d+%d\n",
  2697. plane->base.id,
  2698. state->fb->width, state->fb->height,
  2699. (char *) &state->fb->format->format,
  2700. state->fb->modifier,
  2701. state->src_w >> 16, state->src_h >> 16,
  2702. state->src_x >> 16, state->src_y >> 16,
  2703. pstate->rotation,
  2704. state->crtc_w, state->crtc_h,
  2705. state->crtc_x, state->crtc_y);
  2706. /* force reprogramming of all the parameters, if the flag is set */
  2707. if (psde->revalidate) {
  2708. SDE_DEBUG("plane:%d - reconfigure all the parameters\n",
  2709. plane->base.id);
  2710. pstate->dirty = SDE_PLANE_DIRTY_ALL | SDE_PLANE_DIRTY_CP;
  2711. psde->revalidate = false;
  2712. }
  2713. /* determine what needs to be refreshed */
  2714. while ((idx = msm_property_pop_dirty(&psde->property_info,
  2715. &pstate->property_state)) >= 0) {
  2716. dirty_prop_flag = plane_prop_array[idx];
  2717. pstate->dirty |= dirty_prop_flag;
  2718. if (dirty_prop_flag == SDE_PLANE_DIRTY_ALL)
  2719. break;
  2720. }
  2721. /**
  2722. * since plane_atomic_check is invoked before crtc_atomic_check
  2723. * in the commit sequence, all the parameters for updating the
  2724. * plane dirty flag will not be available during
  2725. * plane_atomic_check as some features params are updated
  2726. * in crtc_atomic_check (eg.:sDMA). So check for mode_change
  2727. * before sspp update.
  2728. */
  2729. _sde_plane_sspp_atomic_check_mode_changed(psde, state,
  2730. old_state);
  2731. /* re-program the output rects always if partial update roi changed */
  2732. if (sde_crtc_is_crtc_roi_dirty(crtc->state))
  2733. pstate->dirty |= SDE_PLANE_DIRTY_RECTS;
  2734. if (pstate->dirty & SDE_PLANE_DIRTY_RECTS)
  2735. memset(&(psde->pipe_cfg), 0, sizeof(struct sde_hw_pipe_cfg));
  2736. _sde_plane_set_scanout(plane, pstate, &psde->pipe_cfg, fb);
  2737. /* early out if nothing dirty */
  2738. if (!pstate->dirty)
  2739. return 0;
  2740. pstate->pending = true;
  2741. psde->is_rt_pipe = sde_crtc_is_rt_client(crtc);
  2742. _sde_plane_set_qos_ctrl(plane, false, SDE_PLANE_QOS_PANIC_CTRL);
  2743. _sde_plane_update_properties(plane, crtc, fb);
  2744. return 0;
  2745. }
  2746. static void _sde_plane_atomic_disable(struct drm_plane *plane,
  2747. struct drm_plane_state *old_state)
  2748. {
  2749. struct sde_plane *psde;
  2750. struct drm_plane_state *state;
  2751. struct sde_plane_state *pstate;
  2752. if (!plane) {
  2753. SDE_ERROR("invalid plane\n");
  2754. return;
  2755. } else if (!plane->state) {
  2756. SDE_ERROR("invalid plane state\n");
  2757. return;
  2758. } else if (!old_state) {
  2759. SDE_ERROR("invalid old state\n");
  2760. return;
  2761. }
  2762. psde = to_sde_plane(plane);
  2763. state = plane->state;
  2764. pstate = to_sde_plane_state(state);
  2765. SDE_EVT32(DRMID(plane), is_sde_plane_virtual(plane),
  2766. pstate->multirect_mode);
  2767. pstate->pending = true;
  2768. if (is_sde_plane_virtual(plane) &&
  2769. psde->pipe_hw && psde->pipe_hw->ops.setup_multirect)
  2770. psde->pipe_hw->ops.setup_multirect(psde->pipe_hw,
  2771. SDE_SSPP_RECT_SOLO, SDE_SSPP_MULTIRECT_NONE);
  2772. }
  2773. static void sde_plane_atomic_update(struct drm_plane *plane,
  2774. struct drm_plane_state *old_state)
  2775. {
  2776. struct sde_plane *psde;
  2777. struct drm_plane_state *state;
  2778. if (!plane) {
  2779. SDE_ERROR("invalid plane\n");
  2780. return;
  2781. } else if (!plane->state) {
  2782. SDE_ERROR("invalid plane state\n");
  2783. return;
  2784. }
  2785. psde = to_sde_plane(plane);
  2786. psde->is_error = false;
  2787. state = plane->state;
  2788. SDE_DEBUG_PLANE(psde, "\n");
  2789. if (!sde_plane_enabled(state)) {
  2790. _sde_plane_atomic_disable(plane, old_state);
  2791. } else {
  2792. int ret;
  2793. ret = sde_plane_sspp_atomic_update(plane, old_state);
  2794. /* atomic_check should have ensured that this doesn't fail */
  2795. WARN_ON(ret < 0);
  2796. }
  2797. }
  2798. void sde_plane_restore(struct drm_plane *plane)
  2799. {
  2800. struct sde_plane *psde;
  2801. if (!plane || !plane->state) {
  2802. SDE_ERROR("invalid plane\n");
  2803. return;
  2804. }
  2805. psde = to_sde_plane(plane);
  2806. /*
  2807. * Revalidate is only true here if idle PC occurred and
  2808. * there is no plane state update in current commit cycle.
  2809. */
  2810. if (!psde->revalidate)
  2811. return;
  2812. SDE_DEBUG_PLANE(psde, "\n");
  2813. /* last plane state is same as current state */
  2814. sde_plane_atomic_update(plane, plane->state);
  2815. }
  2816. bool sde_plane_is_cache_required(struct drm_plane *plane)
  2817. {
  2818. struct sde_plane_state *pstate;
  2819. if (!plane || !plane->state) {
  2820. SDE_ERROR("invalid plane\n");
  2821. return false;
  2822. }
  2823. pstate = to_sde_plane_state(plane->state);
  2824. /* check if llcc is required for the plane */
  2825. if (pstate->sc_cfg.rd_en)
  2826. return true;
  2827. else
  2828. return false;
  2829. }
  2830. static void _sde_plane_install_non_master_properties(struct sde_plane *psde)
  2831. {
  2832. char feature_name[256];
  2833. if (psde->pipe_sblk->maxhdeciexp) {
  2834. msm_property_install_range(&psde->property_info,
  2835. "h_decimate", 0x0, 0,
  2836. psde->pipe_sblk->maxhdeciexp, 0,
  2837. PLANE_PROP_H_DECIMATE);
  2838. }
  2839. if (psde->pipe_sblk->maxvdeciexp) {
  2840. msm_property_install_range(&psde->property_info,
  2841. "v_decimate", 0x0, 0,
  2842. psde->pipe_sblk->maxvdeciexp, 0,
  2843. PLANE_PROP_V_DECIMATE);
  2844. }
  2845. if (psde->features & BIT(SDE_SSPP_SCALER_QSEED3)) {
  2846. msm_property_install_range(
  2847. &psde->property_info, "scaler_v2",
  2848. 0x0, 0, ~0, 0, PLANE_PROP_SCALER_V2);
  2849. msm_property_install_blob(&psde->property_info,
  2850. "lut_ed", 0, PLANE_PROP_SCALER_LUT_ED);
  2851. msm_property_install_blob(&psde->property_info,
  2852. "lut_cir", 0,
  2853. PLANE_PROP_SCALER_LUT_CIR);
  2854. msm_property_install_blob(&psde->property_info,
  2855. "lut_sep", 0,
  2856. PLANE_PROP_SCALER_LUT_SEP);
  2857. } else if (psde->features & BIT(SDE_SSPP_SCALER_QSEED3LITE)) {
  2858. msm_property_install_range(
  2859. &psde->property_info, "scaler_v2",
  2860. 0x0, 0, ~0, 0, PLANE_PROP_SCALER_V2);
  2861. msm_property_install_blob(&psde->property_info,
  2862. "lut_sep", 0,
  2863. PLANE_PROP_SCALER_LUT_SEP);
  2864. } else if (psde->features & SDE_SSPP_SCALER) {
  2865. msm_property_install_range(
  2866. &psde->property_info, "scaler_v1", 0x0,
  2867. 0, ~0, 0, PLANE_PROP_SCALER_V1);
  2868. }
  2869. if (psde->features & BIT(SDE_SSPP_CSC) ||
  2870. psde->features & BIT(SDE_SSPP_CSC_10BIT))
  2871. msm_property_install_volatile_range(
  2872. &psde->property_info, "csc_v1", 0x0,
  2873. 0, ~0, 0, PLANE_PROP_CSC_V1);
  2874. if (psde->features & BIT(SDE_SSPP_HSIC)) {
  2875. snprintf(feature_name, sizeof(feature_name), "%s%d",
  2876. "SDE_SSPP_HUE_V",
  2877. psde->pipe_sblk->hsic_blk.version >> 16);
  2878. msm_property_install_range(&psde->property_info,
  2879. feature_name, 0, 0, 0xFFFFFFFF, 0,
  2880. PLANE_PROP_HUE_ADJUST);
  2881. snprintf(feature_name, sizeof(feature_name), "%s%d",
  2882. "SDE_SSPP_SATURATION_V",
  2883. psde->pipe_sblk->hsic_blk.version >> 16);
  2884. msm_property_install_range(&psde->property_info,
  2885. feature_name, 0, 0, 0xFFFFFFFF, 0,
  2886. PLANE_PROP_SATURATION_ADJUST);
  2887. snprintf(feature_name, sizeof(feature_name), "%s%d",
  2888. "SDE_SSPP_VALUE_V",
  2889. psde->pipe_sblk->hsic_blk.version >> 16);
  2890. msm_property_install_range(&psde->property_info,
  2891. feature_name, 0, 0, 0xFFFFFFFF, 0,
  2892. PLANE_PROP_VALUE_ADJUST);
  2893. snprintf(feature_name, sizeof(feature_name), "%s%d",
  2894. "SDE_SSPP_CONTRAST_V",
  2895. psde->pipe_sblk->hsic_blk.version >> 16);
  2896. msm_property_install_range(&psde->property_info,
  2897. feature_name, 0, 0, 0xFFFFFFFF, 0,
  2898. PLANE_PROP_CONTRAST_ADJUST);
  2899. }
  2900. }
  2901. /* helper to install properties which are common to planes and crtcs */
  2902. static void _sde_plane_install_properties(struct drm_plane *plane,
  2903. struct sde_mdss_cfg *catalog, u32 master_plane_id)
  2904. {
  2905. static const struct drm_prop_enum_list e_blend_op[] = {
  2906. {SDE_DRM_BLEND_OP_NOT_DEFINED, "not_defined"},
  2907. {SDE_DRM_BLEND_OP_OPAQUE, "opaque"},
  2908. {SDE_DRM_BLEND_OP_PREMULTIPLIED, "premultiplied"},
  2909. {SDE_DRM_BLEND_OP_COVERAGE, "coverage"}
  2910. };
  2911. static const struct drm_prop_enum_list e_src_config[] = {
  2912. {SDE_DRM_DEINTERLACE, "deinterlace"}
  2913. };
  2914. static const struct drm_prop_enum_list e_fb_translation_mode[] = {
  2915. {SDE_DRM_FB_NON_SEC, "non_sec"},
  2916. {SDE_DRM_FB_SEC, "sec"},
  2917. {SDE_DRM_FB_NON_SEC_DIR_TRANS, "non_sec_direct_translation"},
  2918. {SDE_DRM_FB_SEC_DIR_TRANS, "sec_direct_translation"},
  2919. };
  2920. static const struct drm_prop_enum_list e_multirect_mode[] = {
  2921. {SDE_SSPP_MULTIRECT_NONE, "none"},
  2922. {SDE_SSPP_MULTIRECT_PARALLEL, "parallel"},
  2923. {SDE_SSPP_MULTIRECT_TIME_MX, "serial"},
  2924. };
  2925. const struct sde_format_extended *format_list;
  2926. struct sde_kms_info *info;
  2927. struct sde_plane *psde = to_sde_plane(plane);
  2928. int zpos_max = 255;
  2929. int zpos_def = 0;
  2930. char feature_name[256];
  2931. if (!plane || !psde) {
  2932. SDE_ERROR("invalid plane\n");
  2933. return;
  2934. } else if (!psde->pipe_hw || !psde->pipe_sblk) {
  2935. SDE_ERROR("invalid plane, pipe_hw %d pipe_sblk %d\n",
  2936. !psde->pipe_hw, !psde->pipe_sblk);
  2937. return;
  2938. } else if (!catalog) {
  2939. SDE_ERROR("invalid catalog\n");
  2940. return;
  2941. }
  2942. psde->catalog = catalog;
  2943. if (sde_is_custom_client()) {
  2944. if (catalog->mixer_count &&
  2945. catalog->mixer[0].sblk->maxblendstages) {
  2946. zpos_max = catalog->mixer[0].sblk->maxblendstages - 1;
  2947. if (zpos_max > SDE_STAGE_MAX - SDE_STAGE_0 - 1)
  2948. zpos_max = SDE_STAGE_MAX - SDE_STAGE_0 - 1;
  2949. }
  2950. } else if (plane->type != DRM_PLANE_TYPE_PRIMARY) {
  2951. /* reserve zpos == 0 for primary planes */
  2952. zpos_def = drm_plane_index(plane) + 1;
  2953. }
  2954. msm_property_install_range(&psde->property_info, "zpos",
  2955. 0x0, 0, zpos_max, zpos_def, PLANE_PROP_ZPOS);
  2956. msm_property_install_range(&psde->property_info, "alpha",
  2957. 0x0, 0, 255, 255, PLANE_PROP_ALPHA);
  2958. /* linux default file descriptor range on each process */
  2959. msm_property_install_range(&psde->property_info, "input_fence",
  2960. 0x0, 0, INR_OPEN_MAX, 0, PLANE_PROP_INPUT_FENCE);
  2961. if (!master_plane_id)
  2962. _sde_plane_install_non_master_properties(psde);
  2963. if (psde->features & BIT(SDE_SSPP_EXCL_RECT))
  2964. msm_property_install_volatile_range(&psde->property_info,
  2965. "excl_rect_v1", 0x0, 0, ~0, 0, PLANE_PROP_EXCL_RECT_V1);
  2966. sde_plane_rot_install_properties(plane, catalog);
  2967. msm_property_install_enum(&psde->property_info, "blend_op", 0x0, 0,
  2968. e_blend_op, ARRAY_SIZE(e_blend_op), PLANE_PROP_BLEND_OP);
  2969. msm_property_install_enum(&psde->property_info, "src_config", 0x0, 1,
  2970. e_src_config, ARRAY_SIZE(e_src_config), PLANE_PROP_SRC_CONFIG);
  2971. if (psde->pipe_hw->ops.setup_solidfill)
  2972. msm_property_install_range(&psde->property_info, "color_fill",
  2973. 0, 0, 0xFFFFFFFF, 0, PLANE_PROP_COLOR_FILL);
  2974. msm_property_install_range(&psde->property_info,
  2975. "prefill_size", 0x0, 0, ~0, 0,
  2976. PLANE_PROP_PREFILL_SIZE);
  2977. msm_property_install_range(&psde->property_info,
  2978. "prefill_time", 0x0, 0, ~0, 0,
  2979. PLANE_PROP_PREFILL_TIME);
  2980. info = kzalloc(sizeof(struct sde_kms_info), GFP_KERNEL);
  2981. if (!info) {
  2982. SDE_ERROR("failed to allocate info memory\n");
  2983. return;
  2984. }
  2985. msm_property_install_blob(&psde->property_info, "capabilities",
  2986. DRM_MODE_PROP_IMMUTABLE, PLANE_PROP_INFO);
  2987. sde_kms_info_reset(info);
  2988. if (!master_plane_id) {
  2989. format_list = psde->pipe_sblk->format_list;
  2990. } else {
  2991. format_list = psde->pipe_sblk->virt_format_list;
  2992. sde_kms_info_add_keyint(info, "primary_smart_plane_id",
  2993. master_plane_id);
  2994. msm_property_install_enum(&psde->property_info,
  2995. "multirect_mode", 0x0, 0, e_multirect_mode,
  2996. ARRAY_SIZE(e_multirect_mode),
  2997. PLANE_PROP_MULTIRECT_MODE);
  2998. }
  2999. if (format_list) {
  3000. sde_kms_info_start(info, "pixel_formats");
  3001. while (format_list->fourcc_format) {
  3002. sde_kms_info_append_format(info,
  3003. format_list->fourcc_format,
  3004. format_list->modifier);
  3005. ++format_list;
  3006. }
  3007. sde_kms_info_stop(info);
  3008. }
  3009. if (psde->pipe_hw && psde->pipe_hw->ops.get_scaler_ver)
  3010. sde_kms_info_add_keyint(info, "scaler_step_ver",
  3011. psde->pipe_hw->ops.get_scaler_ver(psde->pipe_hw));
  3012. sde_kms_info_add_keyint(info, "max_linewidth",
  3013. psde->pipe_sblk->maxlinewidth);
  3014. sde_kms_info_add_keyint(info, "max_upscale",
  3015. psde->pipe_sblk->maxupscale);
  3016. sde_kms_info_add_keyint(info, "max_downscale",
  3017. psde->pipe_sblk->maxdwnscale);
  3018. sde_kms_info_add_keyint(info, "max_horizontal_deci",
  3019. psde->pipe_sblk->maxhdeciexp);
  3020. sde_kms_info_add_keyint(info, "max_vertical_deci",
  3021. psde->pipe_sblk->maxvdeciexp);
  3022. sde_kms_info_add_keyint(info, "max_per_pipe_bw",
  3023. psde->pipe_sblk->max_per_pipe_bw * 1000LL);
  3024. sde_kms_info_add_keyint(info, "max_per_pipe_bw_high",
  3025. psde->pipe_sblk->max_per_pipe_bw_high * 1000LL);
  3026. if ((!master_plane_id &&
  3027. (psde->features & BIT(SDE_SSPP_INVERSE_PMA))) ||
  3028. (psde->features & BIT(SDE_SSPP_DGM_INVERSE_PMA))) {
  3029. msm_property_install_range(&psde->property_info,
  3030. "inverse_pma", 0x0, 0, 1, 0, PLANE_PROP_INVERSE_PMA);
  3031. sde_kms_info_add_keyint(info, "inverse_pma", 1);
  3032. }
  3033. if (psde->features & BIT(SDE_SSPP_DGM_CSC)) {
  3034. msm_property_install_volatile_range(
  3035. &psde->property_info, "csc_dma_v1", 0x0,
  3036. 0, ~0, 0, PLANE_PROP_CSC_DMA_V1);
  3037. sde_kms_info_add_keyint(info, "csc_dma_v1", 1);
  3038. }
  3039. if (psde->features & BIT(SDE_SSPP_SEC_UI_ALLOWED))
  3040. sde_kms_info_add_keyint(info, "sec_ui_allowed", 1);
  3041. if (psde->features & BIT(SDE_SSPP_BLOCK_SEC_UI))
  3042. sde_kms_info_add_keyint(info, "block_sec_ui", 1);
  3043. if (psde->features & BIT(SDE_SSPP_TRUE_INLINE_ROT_V1)) {
  3044. const struct sde_format_extended *inline_rot_fmt_list;
  3045. sde_kms_info_add_keyint(info, "true_inline_rot_rev", 1);
  3046. sde_kms_info_add_keyint(info,
  3047. "true_inline_dwnscale_rt",
  3048. (int) (psde->pipe_sblk->in_rot_maxdwnscale_rt_num /
  3049. psde->pipe_sblk->in_rot_maxdwnscale_rt_denom));
  3050. sde_kms_info_add_keyint(info,
  3051. "true_inline_dwnscale_rt_numerator",
  3052. psde->pipe_sblk->in_rot_maxdwnscale_rt_num);
  3053. sde_kms_info_add_keyint(info,
  3054. "true_inline_dwnscale_rt_denominator",
  3055. psde->pipe_sblk->in_rot_maxdwnscale_rt_denom);
  3056. sde_kms_info_add_keyint(info, "true_inline_dwnscale_nrt",
  3057. psde->pipe_sblk->in_rot_maxdwnscale_nrt);
  3058. sde_kms_info_add_keyint(info, "true_inline_max_height",
  3059. psde->pipe_sblk->in_rot_maxheight);
  3060. sde_kms_info_add_keyint(info, "true_inline_prefill_fudge_lines",
  3061. psde->pipe_sblk->in_rot_prefill_fudge_lines);
  3062. sde_kms_info_add_keyint(info, "true_inline_prefill_lines_nv12",
  3063. psde->pipe_sblk->in_rot_prefill_lines_nv12);
  3064. sde_kms_info_add_keyint(info, "true_inline_prefill_lines",
  3065. psde->pipe_sblk->in_rot_prefill_lines);
  3066. inline_rot_fmt_list = psde->pipe_sblk->in_rot_format_list;
  3067. if (inline_rot_fmt_list) {
  3068. sde_kms_info_start(info, "inline_rot_pixel_formats");
  3069. while (inline_rot_fmt_list->fourcc_format) {
  3070. sde_kms_info_append_format(info,
  3071. inline_rot_fmt_list->fourcc_format,
  3072. inline_rot_fmt_list->modifier);
  3073. ++inline_rot_fmt_list;
  3074. }
  3075. sde_kms_info_stop(info);
  3076. }
  3077. }
  3078. msm_property_set_blob(&psde->property_info, &psde->blob_info,
  3079. info->data, SDE_KMS_INFO_DATALEN(info),
  3080. PLANE_PROP_INFO);
  3081. kfree(info);
  3082. if (psde->features & BIT(SDE_SSPP_MEMCOLOR)) {
  3083. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3084. "SDE_SSPP_SKIN_COLOR_V",
  3085. psde->pipe_sblk->memcolor_blk.version >> 16);
  3086. msm_property_install_blob(&psde->property_info, feature_name, 0,
  3087. PLANE_PROP_SKIN_COLOR);
  3088. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3089. "SDE_SSPP_SKY_COLOR_V",
  3090. psde->pipe_sblk->memcolor_blk.version >> 16);
  3091. msm_property_install_blob(&psde->property_info, feature_name, 0,
  3092. PLANE_PROP_SKY_COLOR);
  3093. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3094. "SDE_SSPP_FOLIAGE_COLOR_V",
  3095. psde->pipe_sblk->memcolor_blk.version >> 16);
  3096. msm_property_install_blob(&psde->property_info, feature_name, 0,
  3097. PLANE_PROP_FOLIAGE_COLOR);
  3098. }
  3099. if (psde->features & BIT(SDE_SSPP_VIG_GAMUT)) {
  3100. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3101. "SDE_VIG_3D_LUT_GAMUT_V",
  3102. psde->pipe_sblk->gamut_blk.version >> 16);
  3103. msm_property_install_blob(&psde->property_info, feature_name, 0,
  3104. PLANE_PROP_VIG_GAMUT);
  3105. }
  3106. if (psde->features & BIT(SDE_SSPP_VIG_IGC)) {
  3107. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3108. "SDE_VIG_1D_LUT_IGC_V",
  3109. psde->pipe_sblk->igc_blk[0].version >> 16);
  3110. msm_property_install_blob(&psde->property_info, feature_name, 0,
  3111. PLANE_PROP_VIG_IGC);
  3112. }
  3113. if (psde->features & BIT(SDE_SSPP_DMA_IGC)) {
  3114. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3115. "SDE_DGM_1D_LUT_IGC_V",
  3116. psde->pipe_sblk->igc_blk[0].version >> 16);
  3117. msm_property_install_blob(&psde->property_info, feature_name, 0,
  3118. PLANE_PROP_DMA_IGC);
  3119. }
  3120. if (psde->features & BIT(SDE_SSPP_DMA_GC)) {
  3121. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3122. "SDE_DGM_1D_LUT_GC_V",
  3123. psde->pipe_sblk->gc_blk[0].version >> 16);
  3124. msm_property_install_blob(&psde->property_info, feature_name, 0,
  3125. PLANE_PROP_DMA_GC);
  3126. }
  3127. msm_property_install_enum(&psde->property_info, "fb_translation_mode",
  3128. 0x0,
  3129. 0, e_fb_translation_mode,
  3130. ARRAY_SIZE(e_fb_translation_mode),
  3131. PLANE_PROP_FB_TRANSLATION_MODE);
  3132. }
  3133. static inline void _sde_plane_set_csc_v1(struct sde_plane *psde,
  3134. void __user *usr_ptr)
  3135. {
  3136. struct sde_drm_csc_v1 csc_v1;
  3137. int i;
  3138. if (!psde) {
  3139. SDE_ERROR("invalid plane\n");
  3140. return;
  3141. }
  3142. psde->csc_usr_ptr = NULL;
  3143. if (!usr_ptr) {
  3144. SDE_DEBUG_PLANE(psde, "csc data removed\n");
  3145. return;
  3146. }
  3147. if (copy_from_user(&csc_v1, usr_ptr, sizeof(csc_v1))) {
  3148. SDE_ERROR_PLANE(psde, "failed to copy csc data\n");
  3149. return;
  3150. }
  3151. /* populate from user space */
  3152. for (i = 0; i < SDE_CSC_MATRIX_COEFF_SIZE; ++i)
  3153. psde->csc_cfg.csc_mv[i] = csc_v1.ctm_coeff[i] >> 16;
  3154. for (i = 0; i < SDE_CSC_BIAS_SIZE; ++i) {
  3155. psde->csc_cfg.csc_pre_bv[i] = csc_v1.pre_bias[i];
  3156. psde->csc_cfg.csc_post_bv[i] = csc_v1.post_bias[i];
  3157. }
  3158. for (i = 0; i < SDE_CSC_CLAMP_SIZE; ++i) {
  3159. psde->csc_cfg.csc_pre_lv[i] = csc_v1.pre_clamp[i];
  3160. psde->csc_cfg.csc_post_lv[i] = csc_v1.post_clamp[i];
  3161. }
  3162. psde->csc_usr_ptr = &psde->csc_cfg;
  3163. }
  3164. static inline void _sde_plane_set_scaler_v1(struct sde_plane *psde,
  3165. struct sde_plane_state *pstate, void __user *usr)
  3166. {
  3167. struct sde_drm_scaler_v1 scale_v1;
  3168. struct sde_hw_pixel_ext *pe;
  3169. int i;
  3170. if (!psde || !pstate) {
  3171. SDE_ERROR("invalid argument(s)\n");
  3172. return;
  3173. }
  3174. pstate->scaler_check_state = SDE_PLANE_SCLCHECK_NONE;
  3175. if (!usr) {
  3176. SDE_DEBUG_PLANE(psde, "scale data removed\n");
  3177. return;
  3178. }
  3179. if (copy_from_user(&scale_v1, usr, sizeof(scale_v1))) {
  3180. SDE_ERROR_PLANE(psde, "failed to copy scale data\n");
  3181. return;
  3182. }
  3183. /* force property to be dirty, even if the pointer didn't change */
  3184. msm_property_set_dirty(&psde->property_info,
  3185. &pstate->property_state, PLANE_PROP_SCALER_V1);
  3186. /* populate from user space */
  3187. pe = &pstate->pixel_ext;
  3188. memset(pe, 0, sizeof(struct sde_hw_pixel_ext));
  3189. for (i = 0; i < SDE_MAX_PLANES; i++) {
  3190. pe->init_phase_x[i] = scale_v1.init_phase_x[i];
  3191. pe->phase_step_x[i] = scale_v1.phase_step_x[i];
  3192. pe->init_phase_y[i] = scale_v1.init_phase_y[i];
  3193. pe->phase_step_y[i] = scale_v1.phase_step_y[i];
  3194. pe->horz_filter[i] = scale_v1.horz_filter[i];
  3195. pe->vert_filter[i] = scale_v1.vert_filter[i];
  3196. }
  3197. for (i = 0; i < SDE_MAX_PLANES; i++) {
  3198. pe->left_ftch[i] = scale_v1.pe.left_ftch[i];
  3199. pe->right_ftch[i] = scale_v1.pe.right_ftch[i];
  3200. pe->left_rpt[i] = scale_v1.pe.left_rpt[i];
  3201. pe->right_rpt[i] = scale_v1.pe.right_rpt[i];
  3202. pe->roi_w[i] = scale_v1.pe.num_ext_pxls_lr[i];
  3203. pe->top_ftch[i] = scale_v1.pe.top_ftch[i];
  3204. pe->btm_ftch[i] = scale_v1.pe.btm_ftch[i];
  3205. pe->top_rpt[i] = scale_v1.pe.top_rpt[i];
  3206. pe->btm_rpt[i] = scale_v1.pe.btm_rpt[i];
  3207. pe->roi_h[i] = scale_v1.pe.num_ext_pxls_tb[i];
  3208. }
  3209. pstate->scaler_check_state = SDE_PLANE_SCLCHECK_SCALER_V1;
  3210. SDE_EVT32_VERBOSE(DRMID(&psde->base));
  3211. SDE_DEBUG_PLANE(psde, "user property data copied\n");
  3212. }
  3213. static inline void _sde_plane_set_scaler_v2(struct sde_plane *psde,
  3214. struct sde_plane_state *pstate, void __user *usr)
  3215. {
  3216. struct sde_drm_scaler_v2 scale_v2;
  3217. struct sde_hw_pixel_ext *pe;
  3218. int i;
  3219. struct sde_hw_scaler3_cfg *cfg;
  3220. if (!psde || !pstate) {
  3221. SDE_ERROR("invalid argument(s)\n");
  3222. return;
  3223. }
  3224. cfg = &pstate->scaler3_cfg;
  3225. pstate->scaler_check_state = SDE_PLANE_SCLCHECK_NONE;
  3226. if (!usr) {
  3227. SDE_DEBUG_PLANE(psde, "scale data removed\n");
  3228. cfg->enable = 0;
  3229. goto end;
  3230. }
  3231. if (copy_from_user(&scale_v2, usr, sizeof(scale_v2))) {
  3232. SDE_ERROR_PLANE(psde, "failed to copy scale data\n");
  3233. return;
  3234. }
  3235. /* detach/ignore user data if 'disabled' */
  3236. if (!scale_v2.enable) {
  3237. SDE_DEBUG_PLANE(psde, "scale data removed\n");
  3238. cfg->enable = 0;
  3239. goto end;
  3240. }
  3241. /* populate from user space */
  3242. sde_set_scaler_v2(cfg, &scale_v2);
  3243. pe = &pstate->pixel_ext;
  3244. memset(pe, 0, sizeof(struct sde_hw_pixel_ext));
  3245. for (i = 0; i < SDE_MAX_PLANES; i++) {
  3246. pe->left_ftch[i] = scale_v2.pe.left_ftch[i];
  3247. pe->right_ftch[i] = scale_v2.pe.right_ftch[i];
  3248. pe->left_rpt[i] = scale_v2.pe.left_rpt[i];
  3249. pe->right_rpt[i] = scale_v2.pe.right_rpt[i];
  3250. pe->roi_w[i] = scale_v2.pe.num_ext_pxls_lr[i];
  3251. pe->top_ftch[i] = scale_v2.pe.top_ftch[i];
  3252. pe->btm_ftch[i] = scale_v2.pe.btm_ftch[i];
  3253. pe->top_rpt[i] = scale_v2.pe.top_rpt[i];
  3254. pe->btm_rpt[i] = scale_v2.pe.btm_rpt[i];
  3255. pe->roi_h[i] = scale_v2.pe.num_ext_pxls_tb[i];
  3256. }
  3257. pstate->scaler_check_state = SDE_PLANE_SCLCHECK_SCALER_V2_CHECK;
  3258. end:
  3259. /* force property to be dirty, even if the pointer didn't change */
  3260. msm_property_set_dirty(&psde->property_info,
  3261. &pstate->property_state, PLANE_PROP_SCALER_V2);
  3262. SDE_EVT32_VERBOSE(DRMID(&psde->base), cfg->enable, cfg->de.enable,
  3263. cfg->src_width[0], cfg->src_height[0],
  3264. cfg->dst_width, cfg->dst_height);
  3265. SDE_DEBUG_PLANE(psde, "user property data copied\n");
  3266. }
  3267. static void _sde_plane_set_excl_rect_v1(struct sde_plane *psde,
  3268. struct sde_plane_state *pstate, void __user *usr_ptr)
  3269. {
  3270. struct drm_clip_rect excl_rect_v1;
  3271. if (!psde || !pstate) {
  3272. SDE_ERROR("invalid argument(s)\n");
  3273. return;
  3274. }
  3275. if (!usr_ptr) {
  3276. memset(&pstate->excl_rect, 0, sizeof(pstate->excl_rect));
  3277. SDE_DEBUG_PLANE(psde, "excl_rect data cleared\n");
  3278. return;
  3279. }
  3280. if (copy_from_user(&excl_rect_v1, usr_ptr, sizeof(excl_rect_v1))) {
  3281. SDE_ERROR_PLANE(psde, "failed to copy excl_rect data\n");
  3282. return;
  3283. }
  3284. /* populate from user space */
  3285. pstate->excl_rect.x = excl_rect_v1.x1;
  3286. pstate->excl_rect.y = excl_rect_v1.y1;
  3287. pstate->excl_rect.w = excl_rect_v1.x2 - excl_rect_v1.x1;
  3288. pstate->excl_rect.h = excl_rect_v1.y2 - excl_rect_v1.y1;
  3289. SDE_DEBUG_PLANE(psde, "excl_rect: {%d,%d,%d,%d}\n",
  3290. pstate->excl_rect.x, pstate->excl_rect.y,
  3291. pstate->excl_rect.w, pstate->excl_rect.h);
  3292. }
  3293. static int sde_plane_atomic_set_property(struct drm_plane *plane,
  3294. struct drm_plane_state *state, struct drm_property *property,
  3295. uint64_t val)
  3296. {
  3297. struct sde_plane *psde = plane ? to_sde_plane(plane) : NULL;
  3298. struct sde_plane_state *pstate;
  3299. int idx, ret = -EINVAL;
  3300. SDE_DEBUG_PLANE(psde, "\n");
  3301. if (!plane) {
  3302. SDE_ERROR("invalid plane\n");
  3303. } else if (!state) {
  3304. SDE_ERROR_PLANE(psde, "invalid state\n");
  3305. } else {
  3306. pstate = to_sde_plane_state(state);
  3307. ret = msm_property_atomic_set(&psde->property_info,
  3308. &pstate->property_state, property, val);
  3309. if (!ret) {
  3310. idx = msm_property_index(&psde->property_info,
  3311. property);
  3312. switch (idx) {
  3313. case PLANE_PROP_INPUT_FENCE:
  3314. _sde_plane_set_input_fence(psde, pstate, val);
  3315. break;
  3316. case PLANE_PROP_CSC_V1:
  3317. case PLANE_PROP_CSC_DMA_V1:
  3318. _sde_plane_set_csc_v1(psde, (void __user *)val);
  3319. break;
  3320. case PLANE_PROP_SCALER_V1:
  3321. _sde_plane_set_scaler_v1(psde, pstate,
  3322. (void *)(uintptr_t)val);
  3323. break;
  3324. case PLANE_PROP_SCALER_V2:
  3325. _sde_plane_set_scaler_v2(psde, pstate,
  3326. (void *)(uintptr_t)val);
  3327. break;
  3328. case PLANE_PROP_EXCL_RECT_V1:
  3329. _sde_plane_set_excl_rect_v1(psde, pstate,
  3330. (void *)(uintptr_t)val);
  3331. break;
  3332. default:
  3333. /* nothing to do */
  3334. break;
  3335. }
  3336. }
  3337. }
  3338. SDE_DEBUG_PLANE(psde, "%s[%d] <= 0x%llx ret=%d\n",
  3339. property->name, property->base.id, val, ret);
  3340. return ret;
  3341. }
  3342. static int sde_plane_atomic_get_property(struct drm_plane *plane,
  3343. const struct drm_plane_state *state,
  3344. struct drm_property *property, uint64_t *val)
  3345. {
  3346. struct sde_plane *psde = plane ? to_sde_plane(plane) : NULL;
  3347. struct sde_plane_state *pstate;
  3348. int ret = -EINVAL;
  3349. if (!plane) {
  3350. SDE_ERROR("invalid plane\n");
  3351. } else if (!state) {
  3352. SDE_ERROR("invalid state\n");
  3353. } else {
  3354. SDE_DEBUG_PLANE(psde, "\n");
  3355. pstate = to_sde_plane_state(state);
  3356. ret = msm_property_atomic_get(&psde->property_info,
  3357. &pstate->property_state, property, val);
  3358. }
  3359. return ret;
  3360. }
  3361. int sde_plane_helper_reset_custom_properties(struct drm_plane *plane,
  3362. struct drm_plane_state *plane_state)
  3363. {
  3364. struct sde_plane *psde;
  3365. struct sde_plane_state *pstate;
  3366. struct drm_property *drm_prop;
  3367. enum msm_mdp_plane_property prop_idx;
  3368. if (!plane || !plane_state) {
  3369. SDE_ERROR("invalid params\n");
  3370. return -EINVAL;
  3371. }
  3372. psde = to_sde_plane(plane);
  3373. pstate = to_sde_plane_state(plane_state);
  3374. for (prop_idx = 0; prop_idx < PLANE_PROP_COUNT; prop_idx++) {
  3375. uint64_t val = pstate->property_values[prop_idx].value;
  3376. uint64_t def;
  3377. int ret;
  3378. drm_prop = msm_property_index_to_drm_property(
  3379. &psde->property_info, prop_idx);
  3380. if (!drm_prop) {
  3381. /* not all props will be installed, based on caps */
  3382. SDE_DEBUG_PLANE(psde, "invalid property index %d\n",
  3383. prop_idx);
  3384. continue;
  3385. }
  3386. def = msm_property_get_default(&psde->property_info, prop_idx);
  3387. if (val == def)
  3388. continue;
  3389. SDE_DEBUG_PLANE(psde, "set prop %s idx %d from %llu to %llu\n",
  3390. drm_prop->name, prop_idx, val, def);
  3391. ret = sde_plane_atomic_set_property(plane, plane_state,
  3392. drm_prop, def);
  3393. if (ret) {
  3394. SDE_ERROR_PLANE(psde,
  3395. "set property failed, idx %d ret %d\n",
  3396. prop_idx, ret);
  3397. continue;
  3398. }
  3399. }
  3400. return 0;
  3401. }
  3402. static void sde_plane_destroy(struct drm_plane *plane)
  3403. {
  3404. struct sde_plane *psde = plane ? to_sde_plane(plane) : NULL;
  3405. SDE_DEBUG_PLANE(psde, "\n");
  3406. if (psde) {
  3407. _sde_plane_set_qos_ctrl(plane, false, SDE_PLANE_QOS_PANIC_CTRL);
  3408. if (psde->blob_info)
  3409. drm_property_blob_put(psde->blob_info);
  3410. msm_property_destroy(&psde->property_info);
  3411. mutex_destroy(&psde->lock);
  3412. drm_plane_helper_disable(plane, NULL);
  3413. /* this will destroy the states as well */
  3414. drm_plane_cleanup(plane);
  3415. if (psde->pipe_hw)
  3416. sde_hw_sspp_destroy(psde->pipe_hw);
  3417. kfree(psde);
  3418. }
  3419. }
  3420. static void sde_plane_destroy_state(struct drm_plane *plane,
  3421. struct drm_plane_state *state)
  3422. {
  3423. struct sde_plane *psde;
  3424. struct sde_plane_state *pstate;
  3425. if (!plane || !state) {
  3426. SDE_ERROR("invalid arg(s), plane %d state %d\n",
  3427. !plane, !state);
  3428. return;
  3429. }
  3430. psde = to_sde_plane(plane);
  3431. pstate = to_sde_plane_state(state);
  3432. SDE_DEBUG_PLANE(psde, "\n");
  3433. /* remove ref count for frame buffers */
  3434. if (state->fb)
  3435. drm_framebuffer_put(state->fb);
  3436. /* remove ref count for fence */
  3437. if (pstate->input_fence)
  3438. sde_sync_put(pstate->input_fence);
  3439. /* destroy value helper */
  3440. msm_property_destroy_state(&psde->property_info, pstate,
  3441. &pstate->property_state);
  3442. }
  3443. static struct drm_plane_state *
  3444. sde_plane_duplicate_state(struct drm_plane *plane)
  3445. {
  3446. struct sde_plane *psde;
  3447. struct sde_plane_state *pstate;
  3448. struct sde_plane_state *old_state;
  3449. struct drm_property *drm_prop;
  3450. uint64_t input_fence_default;
  3451. if (!plane) {
  3452. SDE_ERROR("invalid plane\n");
  3453. return NULL;
  3454. } else if (!plane->state) {
  3455. SDE_ERROR("invalid plane state\n");
  3456. return NULL;
  3457. }
  3458. old_state = to_sde_plane_state(plane->state);
  3459. psde = to_sde_plane(plane);
  3460. pstate = msm_property_alloc_state(&psde->property_info);
  3461. if (!pstate) {
  3462. SDE_ERROR_PLANE(psde, "failed to allocate state\n");
  3463. return NULL;
  3464. }
  3465. SDE_DEBUG_PLANE(psde, "\n");
  3466. /* duplicate value helper */
  3467. msm_property_duplicate_state(&psde->property_info, old_state, pstate,
  3468. &pstate->property_state, pstate->property_values);
  3469. /* clear out any input fence */
  3470. pstate->input_fence = 0;
  3471. input_fence_default = msm_property_get_default(
  3472. &psde->property_info, PLANE_PROP_INPUT_FENCE);
  3473. drm_prop = msm_property_index_to_drm_property(
  3474. &psde->property_info, PLANE_PROP_INPUT_FENCE);
  3475. if (msm_property_atomic_set(&psde->property_info,
  3476. &pstate->property_state, drm_prop,
  3477. input_fence_default))
  3478. SDE_DEBUG_PLANE(psde,
  3479. "error clearing duplicated input fence\n");
  3480. pstate->dirty = 0x0;
  3481. pstate->pending = false;
  3482. __drm_atomic_helper_plane_duplicate_state(plane, &pstate->base);
  3483. return &pstate->base;
  3484. }
  3485. static void sde_plane_reset(struct drm_plane *plane)
  3486. {
  3487. struct sde_plane *psde;
  3488. struct sde_plane_state *pstate;
  3489. if (!plane) {
  3490. SDE_ERROR("invalid plane\n");
  3491. return;
  3492. }
  3493. psde = to_sde_plane(plane);
  3494. SDE_DEBUG_PLANE(psde, "\n");
  3495. if (plane->state && !sde_crtc_is_reset_required(plane->state->crtc)) {
  3496. SDE_DEBUG_PLANE(psde, "avoid reset for plane\n");
  3497. return;
  3498. }
  3499. /* remove previous state, if present */
  3500. if (plane->state) {
  3501. sde_plane_destroy_state(plane, plane->state);
  3502. plane->state = 0;
  3503. }
  3504. pstate = msm_property_alloc_state(&psde->property_info);
  3505. if (!pstate) {
  3506. SDE_ERROR_PLANE(psde, "failed to allocate state\n");
  3507. return;
  3508. }
  3509. /* reset value helper */
  3510. msm_property_reset_state(&psde->property_info, pstate,
  3511. &pstate->property_state,
  3512. pstate->property_values);
  3513. pstate->base.plane = plane;
  3514. plane->state = &pstate->base;
  3515. }
  3516. u32 sde_plane_get_ubwc_error(struct drm_plane *plane)
  3517. {
  3518. u32 ubwc_error = 0;
  3519. struct sde_plane *psde;
  3520. if (!plane) {
  3521. SDE_ERROR("invalid plane\n");
  3522. return 0;
  3523. }
  3524. psde = to_sde_plane(plane);
  3525. if (!psde->is_virtual && psde->pipe_hw->ops.get_ubwc_error)
  3526. ubwc_error = psde->pipe_hw->ops.get_ubwc_error(psde->pipe_hw);
  3527. return ubwc_error;
  3528. }
  3529. void sde_plane_clear_ubwc_error(struct drm_plane *plane)
  3530. {
  3531. struct sde_plane *psde;
  3532. if (!plane) {
  3533. SDE_ERROR("invalid plane\n");
  3534. return;
  3535. }
  3536. psde = to_sde_plane(plane);
  3537. if (psde->pipe_hw->ops.clear_ubwc_error)
  3538. psde->pipe_hw->ops.clear_ubwc_error(psde->pipe_hw);
  3539. }
  3540. #ifdef CONFIG_DEBUG_FS
  3541. static ssize_t _sde_plane_danger_read(struct file *file,
  3542. char __user *buff, size_t count, loff_t *ppos)
  3543. {
  3544. struct sde_kms *kms = file->private_data;
  3545. struct sde_mdss_cfg *cfg = kms->catalog;
  3546. int len = 0;
  3547. char buf[40] = {'\0'};
  3548. if (!cfg)
  3549. return -ENODEV;
  3550. if (*ppos)
  3551. return 0; /* the end */
  3552. len = snprintf(buf, sizeof(buf), "%d\n", !kms->has_danger_ctrl);
  3553. if (len < 0 || len >= sizeof(buf))
  3554. return 0;
  3555. if ((count < sizeof(buf)) || copy_to_user(buff, buf, len))
  3556. return -EFAULT;
  3557. *ppos += len; /* increase offset */
  3558. return len;
  3559. }
  3560. static void _sde_plane_set_danger_state(struct sde_kms *kms, bool enable)
  3561. {
  3562. struct drm_plane *plane;
  3563. drm_for_each_plane(plane, kms->dev) {
  3564. if (plane->fb && plane->state) {
  3565. sde_plane_danger_signal_ctrl(plane, enable);
  3566. SDE_DEBUG("plane:%d img:%dx%d ",
  3567. plane->base.id, plane->fb->width,
  3568. plane->fb->height);
  3569. SDE_DEBUG("src[%d,%d,%d,%d] dst[%d,%d,%d,%d]\n",
  3570. plane->state->src_x >> 16,
  3571. plane->state->src_y >> 16,
  3572. plane->state->src_w >> 16,
  3573. plane->state->src_h >> 16,
  3574. plane->state->crtc_x, plane->state->crtc_y,
  3575. plane->state->crtc_w, plane->state->crtc_h);
  3576. } else {
  3577. SDE_DEBUG("Inactive plane:%d\n", plane->base.id);
  3578. }
  3579. }
  3580. }
  3581. static ssize_t _sde_plane_danger_write(struct file *file,
  3582. const char __user *user_buf, size_t count, loff_t *ppos)
  3583. {
  3584. struct sde_kms *kms = file->private_data;
  3585. struct sde_mdss_cfg *cfg = kms->catalog;
  3586. int disable_panic;
  3587. char buf[10];
  3588. if (!cfg)
  3589. return -EFAULT;
  3590. if (count >= sizeof(buf))
  3591. return -EFAULT;
  3592. if (copy_from_user(buf, user_buf, count))
  3593. return -EFAULT;
  3594. buf[count] = 0; /* end of string */
  3595. if (kstrtoint(buf, 0, &disable_panic))
  3596. return -EFAULT;
  3597. if (disable_panic) {
  3598. /* Disable panic signal for all active pipes */
  3599. SDE_DEBUG("Disabling danger:\n");
  3600. _sde_plane_set_danger_state(kms, false);
  3601. kms->has_danger_ctrl = false;
  3602. } else {
  3603. /* Enable panic signal for all active pipes */
  3604. SDE_DEBUG("Enabling danger:\n");
  3605. kms->has_danger_ctrl = true;
  3606. _sde_plane_set_danger_state(kms, true);
  3607. }
  3608. return count;
  3609. }
  3610. static const struct file_operations sde_plane_danger_enable = {
  3611. .open = simple_open,
  3612. .read = _sde_plane_danger_read,
  3613. .write = _sde_plane_danger_write,
  3614. };
  3615. static int _sde_plane_init_debugfs(struct drm_plane *plane)
  3616. {
  3617. struct sde_plane *psde;
  3618. struct sde_kms *kms;
  3619. struct msm_drm_private *priv;
  3620. const struct sde_sspp_sub_blks *sblk = 0;
  3621. const struct sde_sspp_cfg *cfg = 0;
  3622. if (!plane || !plane->dev) {
  3623. SDE_ERROR("invalid arguments\n");
  3624. return -EINVAL;
  3625. }
  3626. priv = plane->dev->dev_private;
  3627. if (!priv || !priv->kms) {
  3628. SDE_ERROR("invalid KMS reference\n");
  3629. return -EINVAL;
  3630. }
  3631. kms = to_sde_kms(priv->kms);
  3632. psde = to_sde_plane(plane);
  3633. if (psde && psde->pipe_hw)
  3634. cfg = psde->pipe_hw->cap;
  3635. if (cfg)
  3636. sblk = cfg->sblk;
  3637. if (!sblk)
  3638. return 0;
  3639. /* create overall sub-directory for the pipe */
  3640. psde->debugfs_root =
  3641. debugfs_create_dir(psde->pipe_name,
  3642. plane->dev->primary->debugfs_root);
  3643. if (!psde->debugfs_root)
  3644. return -ENOMEM;
  3645. /* don't error check these */
  3646. debugfs_create_x32("features", 0400,
  3647. psde->debugfs_root, &psde->features);
  3648. if (cfg->features & BIT(SDE_SSPP_SCALER_QSEED3) ||
  3649. cfg->features & BIT(SDE_SSPP_SCALER_QSEED3LITE) ||
  3650. cfg->features & BIT(SDE_SSPP_SCALER_QSEED2))
  3651. debugfs_create_bool("default_scaling",
  3652. 0600,
  3653. psde->debugfs_root,
  3654. &psde->debugfs_default_scale);
  3655. if (cfg->features & BIT(SDE_SSPP_TRUE_INLINE_ROT_V1)) {
  3656. debugfs_create_u32("in_rot_max_downscale_rt_num",
  3657. 0600,
  3658. psde->debugfs_root,
  3659. (u32 *) &psde->pipe_sblk->in_rot_maxdwnscale_rt_num);
  3660. debugfs_create_u32("in_rot_max_downscale_rt_denom",
  3661. 0600,
  3662. psde->debugfs_root,
  3663. (u32 *) &psde->pipe_sblk->in_rot_maxdwnscale_rt_denom);
  3664. debugfs_create_u32("in_rot_max_downscale_nrt",
  3665. 0600,
  3666. psde->debugfs_root,
  3667. (u32 *) &psde->pipe_sblk->in_rot_maxdwnscale_nrt);
  3668. debugfs_create_u32("in_rot_max_height",
  3669. 0600,
  3670. psde->debugfs_root,
  3671. (u32 *) &psde->pipe_sblk->in_rot_maxheight);
  3672. }
  3673. debugfs_create_u32("xin_id",
  3674. 0400,
  3675. psde->debugfs_root,
  3676. (u32 *) &cfg->xin_id);
  3677. debugfs_create_x32("creq_vblank",
  3678. 0600,
  3679. psde->debugfs_root,
  3680. (u32 *) &sblk->creq_vblank);
  3681. debugfs_create_x32("danger_vblank",
  3682. 0600,
  3683. psde->debugfs_root,
  3684. (u32 *) &sblk->danger_vblank);
  3685. debugfs_create_file("disable_danger",
  3686. 0600,
  3687. psde->debugfs_root,
  3688. kms, &sde_plane_danger_enable);
  3689. return 0;
  3690. }
  3691. static void _sde_plane_destroy_debugfs(struct drm_plane *plane)
  3692. {
  3693. struct sde_plane *psde;
  3694. if (!plane)
  3695. return;
  3696. psde = to_sde_plane(plane);
  3697. debugfs_remove_recursive(psde->debugfs_root);
  3698. }
  3699. #else
  3700. static int _sde_plane_init_debugfs(struct drm_plane *plane)
  3701. {
  3702. return 0;
  3703. }
  3704. static void _sde_plane_destroy_debugfs(struct drm_plane *plane)
  3705. {
  3706. }
  3707. #endif
  3708. static int sde_plane_late_register(struct drm_plane *plane)
  3709. {
  3710. return _sde_plane_init_debugfs(plane);
  3711. }
  3712. static void sde_plane_early_unregister(struct drm_plane *plane)
  3713. {
  3714. _sde_plane_destroy_debugfs(plane);
  3715. }
  3716. static const struct drm_plane_funcs sde_plane_funcs = {
  3717. .update_plane = drm_atomic_helper_update_plane,
  3718. .disable_plane = drm_atomic_helper_disable_plane,
  3719. .destroy = sde_plane_destroy,
  3720. .atomic_set_property = sde_plane_atomic_set_property,
  3721. .atomic_get_property = sde_plane_atomic_get_property,
  3722. .reset = sde_plane_reset,
  3723. .atomic_duplicate_state = sde_plane_duplicate_state,
  3724. .atomic_destroy_state = sde_plane_destroy_state,
  3725. .late_register = sde_plane_late_register,
  3726. .early_unregister = sde_plane_early_unregister,
  3727. };
  3728. static const struct drm_plane_helper_funcs sde_plane_helper_funcs = {
  3729. .prepare_fb = sde_plane_prepare_fb,
  3730. .cleanup_fb = sde_plane_cleanup_fb,
  3731. .atomic_check = sde_plane_atomic_check,
  3732. .atomic_update = sde_plane_atomic_update,
  3733. };
  3734. enum sde_sspp sde_plane_pipe(struct drm_plane *plane)
  3735. {
  3736. return plane ? to_sde_plane(plane)->pipe : SSPP_NONE;
  3737. }
  3738. bool is_sde_plane_virtual(struct drm_plane *plane)
  3739. {
  3740. return plane ? to_sde_plane(plane)->is_virtual : false;
  3741. }
  3742. /* initialize plane */
  3743. struct drm_plane *sde_plane_init(struct drm_device *dev,
  3744. uint32_t pipe, bool primary_plane,
  3745. unsigned long possible_crtcs, u32 master_plane_id)
  3746. {
  3747. struct drm_plane *plane = NULL, *master_plane = NULL;
  3748. const struct sde_format_extended *format_list;
  3749. struct sde_plane *psde;
  3750. struct msm_drm_private *priv;
  3751. struct sde_kms *kms;
  3752. enum drm_plane_type type;
  3753. int ret = -EINVAL;
  3754. if (!dev) {
  3755. SDE_ERROR("[%u]device is NULL\n", pipe);
  3756. goto exit;
  3757. }
  3758. priv = dev->dev_private;
  3759. if (!priv) {
  3760. SDE_ERROR("[%u]private data is NULL\n", pipe);
  3761. goto exit;
  3762. }
  3763. if (!priv->kms) {
  3764. SDE_ERROR("[%u]invalid KMS reference\n", pipe);
  3765. goto exit;
  3766. }
  3767. kms = to_sde_kms(priv->kms);
  3768. if (!kms->catalog) {
  3769. SDE_ERROR("[%u]invalid catalog reference\n", pipe);
  3770. goto exit;
  3771. }
  3772. /* create and zero local structure */
  3773. psde = kzalloc(sizeof(*psde), GFP_KERNEL);
  3774. if (!psde) {
  3775. SDE_ERROR("[%u]failed to allocate local plane struct\n", pipe);
  3776. ret = -ENOMEM;
  3777. goto exit;
  3778. }
  3779. /* cache local stuff for later */
  3780. plane = &psde->base;
  3781. psde->pipe = pipe;
  3782. psde->is_virtual = (master_plane_id != 0);
  3783. INIT_LIST_HEAD(&psde->mplane_list);
  3784. master_plane = drm_plane_find(dev, NULL, master_plane_id);
  3785. if (master_plane) {
  3786. struct sde_plane *mpsde = to_sde_plane(master_plane);
  3787. list_add_tail(&psde->mplane_list, &mpsde->mplane_list);
  3788. }
  3789. /* initialize underlying h/w driver */
  3790. psde->pipe_hw = sde_hw_sspp_init(pipe, kms->mmio, kms->catalog,
  3791. master_plane_id != 0);
  3792. if (IS_ERR(psde->pipe_hw)) {
  3793. SDE_ERROR("[%u]SSPP init failed\n", pipe);
  3794. ret = PTR_ERR(psde->pipe_hw);
  3795. goto clean_plane;
  3796. } else if (!psde->pipe_hw->cap || !psde->pipe_hw->cap->sblk) {
  3797. SDE_ERROR("[%u]SSPP init returned invalid cfg\n", pipe);
  3798. goto clean_sspp;
  3799. }
  3800. /* cache features mask for later */
  3801. psde->features = psde->pipe_hw->cap->features;
  3802. psde->perf_features = psde->pipe_hw->cap->perf_features;
  3803. psde->pipe_sblk = psde->pipe_hw->cap->sblk;
  3804. if (!psde->pipe_sblk) {
  3805. SDE_ERROR("[%u]invalid sblk\n", pipe);
  3806. goto clean_sspp;
  3807. }
  3808. if (!master_plane_id)
  3809. format_list = psde->pipe_sblk->format_list;
  3810. else
  3811. format_list = psde->pipe_sblk->virt_format_list;
  3812. psde->nformats = sde_populate_formats(format_list,
  3813. psde->formats,
  3814. 0,
  3815. ARRAY_SIZE(psde->formats));
  3816. if (!psde->nformats) {
  3817. SDE_ERROR("[%u]no valid formats for plane\n", pipe);
  3818. goto clean_sspp;
  3819. }
  3820. if (psde->features & BIT(SDE_SSPP_CURSOR))
  3821. type = DRM_PLANE_TYPE_CURSOR;
  3822. else if (primary_plane)
  3823. type = DRM_PLANE_TYPE_PRIMARY;
  3824. else
  3825. type = DRM_PLANE_TYPE_OVERLAY;
  3826. ret = drm_universal_plane_init(dev, plane, 0xff, &sde_plane_funcs,
  3827. psde->formats, psde->nformats,
  3828. NULL, type, NULL);
  3829. if (ret)
  3830. goto clean_sspp;
  3831. /* Populate static array of plane property flags */
  3832. _sde_plane_map_prop_to_dirty_bits();
  3833. /* success! finalize initialization */
  3834. drm_plane_helper_add(plane, &sde_plane_helper_funcs);
  3835. msm_property_init(&psde->property_info, &plane->base, dev,
  3836. priv->plane_property, psde->property_data,
  3837. PLANE_PROP_COUNT, PLANE_PROP_BLOBCOUNT,
  3838. sizeof(struct sde_plane_state));
  3839. _sde_plane_install_properties(plane, kms->catalog, master_plane_id);
  3840. /* save user friendly pipe name for later */
  3841. snprintf(psde->pipe_name, SDE_NAME_SIZE, "plane%u", plane->base.id);
  3842. mutex_init(&psde->lock);
  3843. SDE_DEBUG("%s created for pipe:%u id:%u virtual:%u\n", psde->pipe_name,
  3844. pipe, plane->base.id, master_plane_id);
  3845. return plane;
  3846. clean_sspp:
  3847. if (psde && psde->pipe_hw)
  3848. sde_hw_sspp_destroy(psde->pipe_hw);
  3849. clean_plane:
  3850. kfree(psde);
  3851. exit:
  3852. return ERR_PTR(ret);
  3853. }