main.c 111 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2020, 2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #define pr_fmt(fmt) "icnss2: " fmt
  7. #include <linux/of_address.h>
  8. #include <linux/clk.h>
  9. #include <linux/iommu.h>
  10. #include <linux/export.h>
  11. #include <linux/err.h>
  12. #include <linux/of.h>
  13. #include <linux/of_device.h>
  14. #include <linux/init.h>
  15. #include <linux/io.h>
  16. #include <linux/module.h>
  17. #include <linux/kernel.h>
  18. #include <linux/debugfs.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/slab.h>
  21. #include <linux/regulator/consumer.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/sched.h>
  24. #include <linux/delay.h>
  25. #include <linux/dma-mapping.h>
  26. #include <linux/thread_info.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/adc-tm-clients.h>
  29. #include <linux/iio/consumer.h>
  30. #include <linux/etherdevice.h>
  31. #include <linux/of.h>
  32. #include <linux/of_irq.h>
  33. #include <linux/pm_runtime.h>
  34. #include <linux/soc/qcom/qmi.h>
  35. #include <linux/sysfs.h>
  36. #include <linux/thermal.h>
  37. #include <soc/qcom/memory_dump.h>
  38. #include <soc/qcom/secure_buffer.h>
  39. #include <soc/qcom/socinfo.h>
  40. #include <soc/qcom/qcom_ramdump.h>
  41. #include <linux/soc/qcom/smem.h>
  42. #include <linux/soc/qcom/smem_state.h>
  43. #include <linux/remoteproc.h>
  44. #include <linux/remoteproc/qcom_rproc.h>
  45. #include <linux/soc/qcom/pdr.h>
  46. #include <linux/remoteproc.h>
  47. #include <trace/hooks/remoteproc.h>
  48. #include "main.h"
  49. #include "qmi.h"
  50. #include "debug.h"
  51. #include "power.h"
  52. #include "genl.h"
  53. #define MAX_PROP_SIZE 32
  54. #define NUM_LOG_PAGES 10
  55. #define NUM_LOG_LONG_PAGES 4
  56. #define ICNSS_MAGIC 0x5abc5abc
  57. #define ICNSS_WLAN_SERVICE_NAME "wlan/fw"
  58. #define ICNSS_WLANPD_NAME "msm/modem/wlan_pd"
  59. #define ICNSS_DEFAULT_FEATURE_MASK 0x01
  60. #define ICNSS_M3_SEGMENT(segment) "wcnss_"segment
  61. #define ICNSS_M3_SEGMENT_PHYAREG "phyareg"
  62. #define ICNSS_M3_SEGMENT_PHYA "phydbg"
  63. #define ICNSS_M3_SEGMENT_WMACREG "wmac0reg"
  64. #define ICNSS_M3_SEGMENT_WCSSDBG "WCSSDBG"
  65. #define ICNSS_M3_SEGMENT_PHYAM3 "PHYAPDMEM"
  66. #define ICNSS_QUIRKS_DEFAULT BIT(FW_REJUVENATE_ENABLE)
  67. #define ICNSS_MAX_PROBE_CNT 2
  68. #define ICNSS_BDF_TYPE_DEFAULT ICNSS_BDF_ELF
  69. #define PROBE_TIMEOUT 15000
  70. #define SMP2P_SOC_WAKE_TIMEOUT 500
  71. #ifdef CONFIG_ICNSS2_DEBUG
  72. static unsigned long qmi_timeout = 3000;
  73. module_param(qmi_timeout, ulong, 0600);
  74. #define WLFW_TIMEOUT msecs_to_jiffies(qmi_timeout)
  75. #else
  76. #define WLFW_TIMEOUT msecs_to_jiffies(3000)
  77. #endif
  78. static struct icnss_priv *penv;
  79. static struct work_struct wpss_loader;
  80. uint64_t dynamic_feature_mask = ICNSS_DEFAULT_FEATURE_MASK;
  81. #define ICNSS_EVENT_PENDING 2989
  82. #define ICNSS_EVENT_SYNC BIT(0)
  83. #define ICNSS_EVENT_UNINTERRUPTIBLE BIT(1)
  84. #define ICNSS_EVENT_SYNC_UNINTERRUPTIBLE (ICNSS_EVENT_UNINTERRUPTIBLE | \
  85. ICNSS_EVENT_SYNC)
  86. #define ICNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  87. #define ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  88. #define SMP2P_GET_MAX_RETRY 4
  89. #define SMP2P_GET_RETRY_DELAY_MS 500
  90. #define RAMDUMP_NUM_DEVICES 256
  91. #define ICNSS_RAMDUMP_NAME "icnss_ramdump"
  92. #define ICNSS_RPROC_LEN 10
  93. static DEFINE_IDA(rd_minor_id);
  94. enum icnss_pdr_cause_index {
  95. ICNSS_FW_CRASH,
  96. ICNSS_ROOT_PD_CRASH,
  97. ICNSS_ROOT_PD_SHUTDOWN,
  98. ICNSS_HOST_ERROR,
  99. };
  100. static const char * const icnss_pdr_cause[] = {
  101. [ICNSS_FW_CRASH] = "FW crash",
  102. [ICNSS_ROOT_PD_CRASH] = "Root PD crashed",
  103. [ICNSS_ROOT_PD_SHUTDOWN] = "Root PD shutdown",
  104. [ICNSS_HOST_ERROR] = "Host error",
  105. };
  106. static void icnss_set_plat_priv(struct icnss_priv *priv)
  107. {
  108. penv = priv;
  109. }
  110. static struct icnss_priv *icnss_get_plat_priv()
  111. {
  112. return penv;
  113. }
  114. static ssize_t icnss_sysfs_store(struct kobject *kobj,
  115. struct kobj_attribute *attr,
  116. const char *buf, size_t count)
  117. {
  118. struct icnss_priv *priv = icnss_get_plat_priv();
  119. atomic_set(&priv->is_shutdown, true);
  120. icnss_pr_dbg("Received shutdown indication");
  121. return count;
  122. }
  123. static struct kobj_attribute icnss_sysfs_attribute =
  124. __ATTR(shutdown, 0660, NULL, icnss_sysfs_store);
  125. static void icnss_pm_stay_awake(struct icnss_priv *priv)
  126. {
  127. if (atomic_inc_return(&priv->pm_count) != 1)
  128. return;
  129. icnss_pr_vdbg("PM stay awake, state: 0x%lx, count: %d\n", priv->state,
  130. atomic_read(&priv->pm_count));
  131. pm_stay_awake(&priv->pdev->dev);
  132. priv->stats.pm_stay_awake++;
  133. }
  134. static void icnss_pm_relax(struct icnss_priv *priv)
  135. {
  136. int r = atomic_dec_return(&priv->pm_count);
  137. WARN_ON(r < 0);
  138. if (r != 0)
  139. return;
  140. icnss_pr_vdbg("PM relax, state: 0x%lx, count: %d\n", priv->state,
  141. atomic_read(&priv->pm_count));
  142. pm_relax(&priv->pdev->dev);
  143. priv->stats.pm_relax++;
  144. }
  145. char *icnss_driver_event_to_str(enum icnss_driver_event_type type)
  146. {
  147. switch (type) {
  148. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  149. return "SERVER_ARRIVE";
  150. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  151. return "SERVER_EXIT";
  152. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  153. return "FW_READY";
  154. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  155. return "REGISTER_DRIVER";
  156. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  157. return "UNREGISTER_DRIVER";
  158. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  159. return "PD_SERVICE_DOWN";
  160. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  161. return "FW_EARLY_CRASH_IND";
  162. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  163. return "IDLE_SHUTDOWN";
  164. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  165. return "IDLE_RESTART";
  166. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  167. return "FW_INIT_DONE";
  168. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  169. return "QDSS_TRACE_REQ_MEM";
  170. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  171. return "QDSS_TRACE_SAVE";
  172. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  173. return "QDSS_TRACE_FREE";
  174. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  175. return "M3_DUMP_UPLOAD";
  176. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  177. return "QDSS_TRACE_REQ_DATA";
  178. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  179. return "SUBSYS_RESTART_LEVEL";
  180. case ICNSS_DRIVER_EVENT_MAX:
  181. return "EVENT_MAX";
  182. }
  183. return "UNKNOWN";
  184. };
  185. char *icnss_soc_wake_event_to_str(enum icnss_soc_wake_event_type type)
  186. {
  187. switch (type) {
  188. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  189. return "SOC_WAKE_REQUEST";
  190. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  191. return "SOC_WAKE_RELEASE";
  192. case ICNSS_SOC_WAKE_EVENT_MAX:
  193. return "SOC_EVENT_MAX";
  194. }
  195. return "UNKNOWN";
  196. };
  197. int icnss_driver_event_post(struct icnss_priv *priv,
  198. enum icnss_driver_event_type type,
  199. u32 flags, void *data)
  200. {
  201. struct icnss_driver_event *event;
  202. unsigned long irq_flags;
  203. int gfp = GFP_KERNEL;
  204. int ret = 0;
  205. if (!priv)
  206. return -ENODEV;
  207. icnss_pr_dbg("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  208. icnss_driver_event_to_str(type), type, current->comm,
  209. flags, priv->state);
  210. if (type >= ICNSS_DRIVER_EVENT_MAX) {
  211. icnss_pr_err("Invalid Event type: %d, can't post", type);
  212. return -EINVAL;
  213. }
  214. if (in_interrupt() || irqs_disabled())
  215. gfp = GFP_ATOMIC;
  216. event = kzalloc(sizeof(*event), gfp);
  217. if (event == NULL)
  218. return -ENOMEM;
  219. icnss_pm_stay_awake(priv);
  220. event->type = type;
  221. event->data = data;
  222. init_completion(&event->complete);
  223. event->ret = ICNSS_EVENT_PENDING;
  224. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  225. spin_lock_irqsave(&priv->event_lock, irq_flags);
  226. list_add_tail(&event->list, &priv->event_list);
  227. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  228. priv->stats.events[type].posted++;
  229. queue_work(priv->event_wq, &priv->event_work);
  230. if (!(flags & ICNSS_EVENT_SYNC))
  231. goto out;
  232. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  233. wait_for_completion(&event->complete);
  234. else
  235. ret = wait_for_completion_interruptible(&event->complete);
  236. icnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  237. icnss_driver_event_to_str(type), type, priv->state, ret,
  238. event->ret);
  239. spin_lock_irqsave(&priv->event_lock, irq_flags);
  240. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  241. event->sync = false;
  242. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  243. ret = -EINTR;
  244. goto out;
  245. }
  246. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  247. ret = event->ret;
  248. kfree(event);
  249. out:
  250. icnss_pm_relax(priv);
  251. return ret;
  252. }
  253. int icnss_soc_wake_event_post(struct icnss_priv *priv,
  254. enum icnss_soc_wake_event_type type,
  255. u32 flags, void *data)
  256. {
  257. struct icnss_soc_wake_event *event;
  258. unsigned long irq_flags;
  259. int gfp = GFP_KERNEL;
  260. int ret = 0;
  261. if (!priv)
  262. return -ENODEV;
  263. icnss_pr_soc_wake("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  264. icnss_soc_wake_event_to_str(type),
  265. type, current->comm, flags, priv->state);
  266. if (type >= ICNSS_SOC_WAKE_EVENT_MAX) {
  267. icnss_pr_err("Invalid Event type: %d, can't post", type);
  268. return -EINVAL;
  269. }
  270. if (in_interrupt() || irqs_disabled())
  271. gfp = GFP_ATOMIC;
  272. event = kzalloc(sizeof(*event), gfp);
  273. if (!event)
  274. return -ENOMEM;
  275. icnss_pm_stay_awake(priv);
  276. event->type = type;
  277. event->data = data;
  278. init_completion(&event->complete);
  279. event->ret = ICNSS_EVENT_PENDING;
  280. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  281. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  282. list_add_tail(&event->list, &priv->soc_wake_msg_list);
  283. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  284. priv->stats.soc_wake_events[type].posted++;
  285. queue_work(priv->soc_wake_wq, &priv->soc_wake_msg_work);
  286. if (!(flags & ICNSS_EVENT_SYNC))
  287. goto out;
  288. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  289. wait_for_completion(&event->complete);
  290. else
  291. ret = wait_for_completion_interruptible(&event->complete);
  292. icnss_pr_soc_wake("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  293. icnss_soc_wake_event_to_str(type),
  294. type, priv->state, ret, event->ret);
  295. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  296. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  297. event->sync = false;
  298. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  299. ret = -EINTR;
  300. goto out;
  301. }
  302. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  303. ret = event->ret;
  304. kfree(event);
  305. out:
  306. icnss_pm_relax(priv);
  307. return ret;
  308. }
  309. bool icnss_is_fw_ready(void)
  310. {
  311. if (!penv)
  312. return false;
  313. else
  314. return test_bit(ICNSS_FW_READY, &penv->state);
  315. }
  316. EXPORT_SYMBOL(icnss_is_fw_ready);
  317. void icnss_block_shutdown(bool status)
  318. {
  319. if (!penv)
  320. return;
  321. if (status) {
  322. set_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  323. reinit_completion(&penv->unblock_shutdown);
  324. } else {
  325. clear_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  326. complete(&penv->unblock_shutdown);
  327. }
  328. }
  329. EXPORT_SYMBOL(icnss_block_shutdown);
  330. bool icnss_is_fw_down(void)
  331. {
  332. struct icnss_priv *priv = icnss_get_plat_priv();
  333. if (!priv)
  334. return false;
  335. return test_bit(ICNSS_FW_DOWN, &priv->state) ||
  336. test_bit(ICNSS_PD_RESTART, &priv->state) ||
  337. test_bit(ICNSS_REJUVENATE, &priv->state);
  338. }
  339. EXPORT_SYMBOL(icnss_is_fw_down);
  340. bool icnss_is_rejuvenate(void)
  341. {
  342. if (!penv)
  343. return false;
  344. else
  345. return test_bit(ICNSS_REJUVENATE, &penv->state);
  346. }
  347. EXPORT_SYMBOL(icnss_is_rejuvenate);
  348. bool icnss_is_pdr(void)
  349. {
  350. if (!penv)
  351. return false;
  352. else
  353. return test_bit(ICNSS_PDR, &penv->state);
  354. }
  355. EXPORT_SYMBOL(icnss_is_pdr);
  356. static int icnss_send_smp2p(struct icnss_priv *priv,
  357. enum icnss_smp2p_msg_id msg_id,
  358. enum smp2p_out_entry smp2p_entry)
  359. {
  360. unsigned int value = 0;
  361. int ret;
  362. if (IS_ERR(priv->smp2p_info[smp2p_entry].smem_state))
  363. return -EINVAL;
  364. /* No Need to check FW_DOWN for ICNSS_RESET_MSG */
  365. if (msg_id == ICNSS_RESET_MSG) {
  366. priv->smp2p_info[smp2p_entry].seq = 0;
  367. ret = qcom_smem_state_update_bits(
  368. priv->smp2p_info[smp2p_entry].smem_state,
  369. ICNSS_SMEM_VALUE_MASK,
  370. 0);
  371. if (ret)
  372. icnss_pr_err("Error in SMP2P sent. ret: %d, %s\n",
  373. ret, icnss_smp2p_str[smp2p_entry]);
  374. return ret;
  375. }
  376. if (test_bit(ICNSS_FW_DOWN, &priv->state))
  377. return -ENODEV;
  378. value |= priv->smp2p_info[smp2p_entry].seq++;
  379. value <<= ICNSS_SMEM_SEQ_NO_POS;
  380. value |= msg_id;
  381. icnss_pr_smp2p("Sending SMP2P value: 0x%X\n", value);
  382. if (msg_id == ICNSS_SOC_WAKE_REQ || msg_id == ICNSS_SOC_WAKE_REL)
  383. reinit_completion(&penv->smp2p_soc_wake_wait);
  384. ret = qcom_smem_state_update_bits(
  385. priv->smp2p_info[smp2p_entry].smem_state,
  386. ICNSS_SMEM_VALUE_MASK,
  387. value);
  388. if (ret) {
  389. icnss_pr_smp2p("Error in SMP2P send ret: %d, %s\n", ret,
  390. icnss_smp2p_str[smp2p_entry]);
  391. } else {
  392. if (msg_id == ICNSS_SOC_WAKE_REQ ||
  393. msg_id == ICNSS_SOC_WAKE_REL) {
  394. if (!wait_for_completion_timeout(
  395. &priv->smp2p_soc_wake_wait,
  396. msecs_to_jiffies(SMP2P_SOC_WAKE_TIMEOUT))) {
  397. icnss_pr_err("SMP2P Soc Wake timeout msg %d, %s\n", msg_id,
  398. icnss_smp2p_str[smp2p_entry]);
  399. if (!test_bit(ICNSS_FW_DOWN, &priv->state))
  400. ICNSS_ASSERT(0);
  401. }
  402. }
  403. }
  404. return ret;
  405. }
  406. static irqreturn_t fw_error_fatal_handler(int irq, void *ctx)
  407. {
  408. struct icnss_priv *priv = ctx;
  409. if (priv)
  410. priv->force_err_fatal = true;
  411. icnss_pr_err("Received force error fatal request from FW\n");
  412. return IRQ_HANDLED;
  413. }
  414. static irqreturn_t fw_crash_indication_handler(int irq, void *ctx)
  415. {
  416. struct icnss_priv *priv = ctx;
  417. struct icnss_uevent_fw_down_data fw_down_data = {0};
  418. icnss_pr_err("Received early crash indication from FW\n");
  419. if (priv) {
  420. set_bit(ICNSS_FW_DOWN, &priv->state);
  421. icnss_ignore_fw_timeout(true);
  422. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  423. clear_bit(ICNSS_FW_READY, &priv->state);
  424. fw_down_data.crashed = true;
  425. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  426. &fw_down_data);
  427. }
  428. }
  429. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND,
  430. 0, NULL);
  431. return IRQ_HANDLED;
  432. }
  433. static void register_fw_error_notifications(struct device *dev)
  434. {
  435. struct icnss_priv *priv = dev_get_drvdata(dev);
  436. struct device_node *dev_node;
  437. int irq = 0, ret = 0;
  438. if (!priv)
  439. return;
  440. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  441. if (!dev_node) {
  442. icnss_pr_err("Failed to get smp2p node for force-fatal-error\n");
  443. return;
  444. }
  445. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  446. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  447. ret = irq = of_irq_get_byname(dev_node,
  448. "qcom,smp2p-force-fatal-error");
  449. if (ret < 0) {
  450. icnss_pr_err("Unable to get force-fatal-error irq %d\n",
  451. irq);
  452. return;
  453. }
  454. }
  455. ret = devm_request_threaded_irq(dev, irq, NULL, fw_error_fatal_handler,
  456. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  457. "wlanfw-err", priv);
  458. if (ret < 0) {
  459. icnss_pr_err("Unable to register for error fatal IRQ handler %d ret = %d",
  460. irq, ret);
  461. return;
  462. }
  463. icnss_pr_dbg("FW force error fatal handler registered irq = %d\n", irq);
  464. priv->fw_error_fatal_irq = irq;
  465. }
  466. static void register_early_crash_notifications(struct device *dev)
  467. {
  468. struct icnss_priv *priv = dev_get_drvdata(dev);
  469. struct device_node *dev_node;
  470. int irq = 0, ret = 0;
  471. if (!priv)
  472. return;
  473. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  474. if (!dev_node) {
  475. icnss_pr_err("Failed to get smp2p node for early-crash-ind\n");
  476. return;
  477. }
  478. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  479. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  480. ret = irq = of_irq_get_byname(dev_node,
  481. "qcom,smp2p-early-crash-ind");
  482. if (ret < 0) {
  483. icnss_pr_err("Unable to get early-crash-ind irq %d\n",
  484. irq);
  485. return;
  486. }
  487. }
  488. ret = devm_request_threaded_irq(dev, irq, NULL,
  489. fw_crash_indication_handler,
  490. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  491. "wlanfw-early-crash-ind", priv);
  492. if (ret < 0) {
  493. icnss_pr_err("Unable to register for early crash indication IRQ handler %d ret = %d",
  494. irq, ret);
  495. return;
  496. }
  497. icnss_pr_dbg("FW crash indication handler registered irq = %d\n", irq);
  498. priv->fw_early_crash_irq = irq;
  499. }
  500. static irqreturn_t fw_soc_wake_ack_handler(int irq, void *ctx)
  501. {
  502. struct icnss_priv *priv = ctx;
  503. if (priv)
  504. complete(&priv->smp2p_soc_wake_wait);
  505. return IRQ_HANDLED;
  506. }
  507. static void register_soc_wake_notif(struct device *dev)
  508. {
  509. struct icnss_priv *priv = dev_get_drvdata(dev);
  510. struct device_node *dev_node;
  511. int irq = 0, ret = 0;
  512. if (!priv)
  513. return;
  514. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_2_in");
  515. if (!dev_node) {
  516. icnss_pr_err("Failed to get smp2p node for soc-wake-ack\n");
  517. return;
  518. }
  519. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  520. if (strcmp("qcom,smp2p_map_wlan_2_in", dev_node->name) == 0) {
  521. ret = irq = of_irq_get_byname(dev_node,
  522. "qcom,smp2p-soc-wake-ack");
  523. if (ret < 0) {
  524. icnss_pr_err("Unable to get soc wake ack irq %d\n",
  525. irq);
  526. return;
  527. }
  528. }
  529. ret = devm_request_threaded_irq(dev, irq, NULL,
  530. fw_soc_wake_ack_handler,
  531. IRQF_ONESHOT | IRQF_TRIGGER_RISING |
  532. IRQF_TRIGGER_FALLING,
  533. "wlanfw-soc-wake-ack", priv);
  534. if (ret < 0) {
  535. icnss_pr_err("Unable to register for SOC Wake ACK IRQ handler %d ret = %d",
  536. irq, ret);
  537. return;
  538. }
  539. icnss_pr_dbg("FW SOC Wake ACK handler registered irq = %d\n", irq);
  540. priv->fw_soc_wake_ack_irq = irq;
  541. }
  542. int icnss_call_driver_uevent(struct icnss_priv *priv,
  543. enum icnss_uevent uevent, void *data)
  544. {
  545. struct icnss_uevent_data uevent_data;
  546. if (!priv->ops || !priv->ops->uevent)
  547. return 0;
  548. icnss_pr_dbg("Calling driver uevent state: 0x%lx, uevent: %d\n",
  549. priv->state, uevent);
  550. uevent_data.uevent = uevent;
  551. uevent_data.data = data;
  552. return priv->ops->uevent(&priv->pdev->dev, &uevent_data);
  553. }
  554. static int icnss_setup_dms_mac(struct icnss_priv *priv)
  555. {
  556. int i;
  557. int ret = 0;
  558. ret = icnss_qmi_get_dms_mac(priv);
  559. if (ret == 0 && priv->dms.mac_valid)
  560. goto qmi_send;
  561. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  562. * Thus assert on failure to get MAC from DMS even after retries
  563. */
  564. if (priv->use_nv_mac) {
  565. for (i = 0; i < ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  566. if (priv->dms.mac_valid)
  567. break;
  568. ret = icnss_qmi_get_dms_mac(priv);
  569. if (ret != -EAGAIN)
  570. break;
  571. msleep(ICNSS_DMS_QMI_CONNECTION_WAIT_MS);
  572. }
  573. if (!priv->dms.nv_mac_not_prov && !priv->dms.mac_valid) {
  574. icnss_pr_err("Unable to get MAC from DMS after retries\n");
  575. ICNSS_ASSERT(0);
  576. return -EINVAL;
  577. }
  578. }
  579. qmi_send:
  580. if (priv->dms.mac_valid)
  581. ret =
  582. icnss_wlfw_wlan_mac_req_send_sync(priv, priv->dms.mac,
  583. ARRAY_SIZE(priv->dms.mac));
  584. return ret;
  585. }
  586. static void icnss_get_smp2p_info(struct icnss_priv *priv,
  587. enum smp2p_out_entry smp2p_entry)
  588. {
  589. int retry = 0;
  590. int error;
  591. if (priv->smp2p_info[smp2p_entry].smem_state)
  592. return;
  593. retry:
  594. priv->smp2p_info[smp2p_entry].smem_state =
  595. qcom_smem_state_get(&priv->pdev->dev,
  596. icnss_smp2p_str[smp2p_entry],
  597. &priv->smp2p_info[smp2p_entry].smem_bit);
  598. if (IS_ERR(priv->smp2p_info[smp2p_entry].smem_state)) {
  599. if (retry++ < SMP2P_GET_MAX_RETRY) {
  600. error = PTR_ERR(priv->smp2p_info[smp2p_entry].smem_state);
  601. icnss_pr_err("Failed to get smem state, ret: %d Entry: %s",
  602. error, icnss_smp2p_str[smp2p_entry]);
  603. msleep(SMP2P_GET_RETRY_DELAY_MS);
  604. goto retry;
  605. }
  606. ICNSS_ASSERT(0);
  607. return;
  608. }
  609. icnss_pr_dbg("smem state, Entry: %s", icnss_smp2p_str[smp2p_entry]);
  610. }
  611. static int icnss_driver_event_server_arrive(struct icnss_priv *priv,
  612. void *data)
  613. {
  614. int ret = 0;
  615. bool ignore_assert = false;
  616. if (!priv)
  617. return -ENODEV;
  618. set_bit(ICNSS_WLFW_EXISTS, &priv->state);
  619. clear_bit(ICNSS_FW_DOWN, &priv->state);
  620. clear_bit(ICNSS_FW_READY, &priv->state);
  621. icnss_ignore_fw_timeout(false);
  622. if (test_bit(ICNSS_WLFW_CONNECTED, &priv->state)) {
  623. icnss_pr_err("QMI Server already in Connected State\n");
  624. ICNSS_ASSERT(0);
  625. }
  626. ret = icnss_connect_to_fw_server(priv, data);
  627. if (ret)
  628. goto fail;
  629. set_bit(ICNSS_WLFW_CONNECTED, &priv->state);
  630. ret = wlfw_ind_register_send_sync_msg(priv);
  631. if (ret < 0) {
  632. if (ret == -EALREADY) {
  633. ret = 0;
  634. goto qmi_registered;
  635. }
  636. ignore_assert = true;
  637. goto fail;
  638. }
  639. if (priv->device_id == WCN6750_DEVICE_ID) {
  640. ret = wlfw_host_cap_send_sync(priv);
  641. if (ret < 0)
  642. goto fail;
  643. }
  644. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  645. if (!priv->msa_va) {
  646. icnss_pr_err("Invalid MSA address\n");
  647. ret = -EINVAL;
  648. goto fail;
  649. }
  650. ret = wlfw_msa_mem_info_send_sync_msg(priv);
  651. if (ret < 0) {
  652. ignore_assert = true;
  653. goto fail;
  654. }
  655. ret = wlfw_msa_ready_send_sync_msg(priv);
  656. if (ret < 0) {
  657. ignore_assert = true;
  658. goto fail;
  659. }
  660. }
  661. ret = wlfw_cap_send_sync_msg(priv);
  662. if (ret < 0) {
  663. ignore_assert = true;
  664. goto fail;
  665. }
  666. ret = icnss_hw_power_on(priv);
  667. if (ret)
  668. goto fail;
  669. if (priv->device_id == WCN6750_DEVICE_ID) {
  670. ret = wlfw_device_info_send_msg(priv);
  671. if (ret < 0) {
  672. ignore_assert = true;
  673. goto device_info_failure;
  674. }
  675. priv->mem_base_va = devm_ioremap(&priv->pdev->dev,
  676. priv->mem_base_pa,
  677. priv->mem_base_size);
  678. if (!priv->mem_base_va) {
  679. icnss_pr_err("Ioremap failed for bar address\n");
  680. goto device_info_failure;
  681. }
  682. icnss_pr_dbg("Non-Secured Bar Address pa: %pa, va: 0x%pK\n",
  683. &priv->mem_base_pa,
  684. priv->mem_base_va);
  685. if (priv->mhi_state_info_pa)
  686. priv->mhi_state_info_va = devm_ioremap(&priv->pdev->dev,
  687. priv->mhi_state_info_pa,
  688. PAGE_SIZE);
  689. if (!priv->mhi_state_info_va)
  690. icnss_pr_err("Ioremap failed for MHI info address\n");
  691. icnss_pr_dbg("MHI state info Address pa: %pa, va: 0x%pK\n",
  692. &priv->mhi_state_info_pa,
  693. priv->mhi_state_info_va);
  694. }
  695. if (priv->bdf_download_support) {
  696. icnss_wlfw_bdf_dnld_send_sync(priv, ICNSS_BDF_REGDB);
  697. ret = icnss_wlfw_bdf_dnld_send_sync(priv,
  698. priv->ctrl_params.bdf_type);
  699. if (ret < 0)
  700. goto device_info_failure;
  701. }
  702. if (priv->device_id == WCN6750_DEVICE_ID) {
  703. if (!priv->fw_soc_wake_ack_irq)
  704. register_soc_wake_notif(&priv->pdev->dev);
  705. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_POWER_SAVE);
  706. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_SOC_WAKE);
  707. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  708. }
  709. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  710. if (priv->bdf_download_support) {
  711. ret = wlfw_cal_report_req(priv);
  712. if (ret < 0)
  713. goto device_info_failure;
  714. }
  715. wlfw_dynamic_feature_mask_send_sync_msg(priv,
  716. dynamic_feature_mask);
  717. }
  718. if (!priv->fw_error_fatal_irq)
  719. register_fw_error_notifications(&priv->pdev->dev);
  720. if (!priv->fw_early_crash_irq)
  721. register_early_crash_notifications(&priv->pdev->dev);
  722. if (priv->vbatt_supported)
  723. icnss_init_vph_monitor(priv);
  724. return ret;
  725. device_info_failure:
  726. icnss_hw_power_off(priv);
  727. fail:
  728. ICNSS_ASSERT(ignore_assert);
  729. qmi_registered:
  730. return ret;
  731. }
  732. static int icnss_driver_event_server_exit(struct icnss_priv *priv)
  733. {
  734. if (!priv)
  735. return -ENODEV;
  736. icnss_pr_info("WLAN FW Service Disconnected: 0x%lx\n", priv->state);
  737. icnss_clear_server(priv);
  738. if (priv->adc_tm_dev && priv->vbatt_supported)
  739. adc_tm_disable_chan_meas(priv->adc_tm_dev,
  740. &priv->vph_monitor_params);
  741. return 0;
  742. }
  743. static int icnss_call_driver_probe(struct icnss_priv *priv)
  744. {
  745. int ret = 0;
  746. int probe_cnt = 0;
  747. if (!priv->ops || !priv->ops->probe)
  748. return 0;
  749. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  750. return -EINVAL;
  751. icnss_pr_dbg("Calling driver probe state: 0x%lx\n", priv->state);
  752. icnss_hw_power_on(priv);
  753. icnss_block_shutdown(true);
  754. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  755. ret = priv->ops->probe(&priv->pdev->dev);
  756. probe_cnt++;
  757. if (ret != -EPROBE_DEFER)
  758. break;
  759. }
  760. if (ret < 0) {
  761. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  762. ret, priv->state, probe_cnt);
  763. icnss_block_shutdown(false);
  764. goto out;
  765. }
  766. icnss_block_shutdown(false);
  767. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  768. return 0;
  769. out:
  770. icnss_hw_power_off(priv);
  771. return ret;
  772. }
  773. static int icnss_call_driver_shutdown(struct icnss_priv *priv)
  774. {
  775. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  776. goto out;
  777. if (!priv->ops || !priv->ops->shutdown)
  778. goto out;
  779. if (test_bit(ICNSS_SHUTDOWN_DONE, &priv->state))
  780. goto out;
  781. icnss_pr_dbg("Calling driver shutdown state: 0x%lx\n", priv->state);
  782. priv->ops->shutdown(&priv->pdev->dev);
  783. set_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  784. out:
  785. return 0;
  786. }
  787. static int icnss_pd_restart_complete(struct icnss_priv *priv)
  788. {
  789. int ret = 0;
  790. icnss_pm_relax(priv);
  791. icnss_call_driver_shutdown(priv);
  792. clear_bit(ICNSS_PDR, &priv->state);
  793. clear_bit(ICNSS_REJUVENATE, &priv->state);
  794. clear_bit(ICNSS_PD_RESTART, &priv->state);
  795. priv->early_crash_ind = false;
  796. priv->is_ssr = false;
  797. if (!priv->ops || !priv->ops->reinit)
  798. goto out;
  799. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  800. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  801. priv->state);
  802. goto out;
  803. }
  804. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  805. goto call_probe;
  806. icnss_pr_dbg("Calling driver reinit state: 0x%lx\n", priv->state);
  807. icnss_hw_power_on(priv);
  808. icnss_block_shutdown(true);
  809. ret = priv->ops->reinit(&priv->pdev->dev);
  810. if (ret < 0) {
  811. icnss_fatal_err("Driver reinit failed: %d, state: 0x%lx\n",
  812. ret, priv->state);
  813. if (!priv->allow_recursive_recovery)
  814. ICNSS_ASSERT(false);
  815. icnss_block_shutdown(false);
  816. goto out_power_off;
  817. }
  818. icnss_block_shutdown(false);
  819. clear_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  820. return 0;
  821. call_probe:
  822. return icnss_call_driver_probe(priv);
  823. out_power_off:
  824. icnss_hw_power_off(priv);
  825. out:
  826. return ret;
  827. }
  828. static int icnss_driver_event_fw_ready_ind(struct icnss_priv *priv, void *data)
  829. {
  830. int ret = 0;
  831. if (!priv)
  832. return -ENODEV;
  833. set_bit(ICNSS_FW_READY, &priv->state);
  834. clear_bit(ICNSS_MODE_ON, &priv->state);
  835. atomic_set(&priv->soc_wake_ref_count, 0);
  836. if (priv->device_id == WCN6750_DEVICE_ID)
  837. icnss_free_qdss_mem(priv);
  838. icnss_pr_info("WLAN FW is ready: 0x%lx\n", priv->state);
  839. icnss_hw_power_off(priv);
  840. if (!priv->pdev) {
  841. icnss_pr_err("Device is not ready\n");
  842. ret = -ENODEV;
  843. goto out;
  844. }
  845. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  846. ret = icnss_pd_restart_complete(priv);
  847. } else {
  848. if (priv->device_id == WCN6750_DEVICE_ID)
  849. icnss_setup_dms_mac(priv);
  850. ret = icnss_call_driver_probe(priv);
  851. }
  852. icnss_vreg_unvote(priv);
  853. out:
  854. return ret;
  855. }
  856. static int icnss_driver_event_fw_init_done(struct icnss_priv *priv, void *data)
  857. {
  858. int ret = 0;
  859. if (!priv)
  860. return -ENODEV;
  861. icnss_pr_info("WLAN FW Initialization done: 0x%lx\n", priv->state);
  862. if (icnss_wlfw_qdss_dnld_send_sync(priv))
  863. icnss_pr_info("Failed to download qdss configuration file");
  864. if (test_bit(ICNSS_COLD_BOOT_CAL, &priv->state))
  865. ret = wlfw_wlan_mode_send_sync_msg(priv,
  866. (enum wlfw_driver_mode_enum_v01)ICNSS_CALIBRATION);
  867. else
  868. icnss_driver_event_fw_ready_ind(priv, NULL);
  869. return ret;
  870. }
  871. int icnss_alloc_qdss_mem(struct icnss_priv *priv)
  872. {
  873. struct platform_device *pdev = priv->pdev;
  874. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  875. int i, j;
  876. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  877. if (!qdss_mem[i].va && qdss_mem[i].size) {
  878. qdss_mem[i].va =
  879. dma_alloc_coherent(&pdev->dev,
  880. qdss_mem[i].size,
  881. &qdss_mem[i].pa,
  882. GFP_KERNEL);
  883. if (!qdss_mem[i].va) {
  884. icnss_pr_err("Failed to allocate QDSS memory for FW, size: 0x%zx, type: %u, chuck-ID: %d\n",
  885. qdss_mem[i].size,
  886. qdss_mem[i].type, i);
  887. break;
  888. }
  889. }
  890. }
  891. /* Best-effort allocation for QDSS trace */
  892. if (i < priv->qdss_mem_seg_len) {
  893. for (j = i; j < priv->qdss_mem_seg_len; j++) {
  894. qdss_mem[j].type = 0;
  895. qdss_mem[j].size = 0;
  896. }
  897. priv->qdss_mem_seg_len = i;
  898. }
  899. return 0;
  900. }
  901. void icnss_free_qdss_mem(struct icnss_priv *priv)
  902. {
  903. struct platform_device *pdev = priv->pdev;
  904. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  905. int i;
  906. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  907. if (qdss_mem[i].va && qdss_mem[i].size) {
  908. icnss_pr_dbg("Freeing memory for QDSS: pa: %pa, size: 0x%zx, type: %u\n",
  909. &qdss_mem[i].pa, qdss_mem[i].size,
  910. qdss_mem[i].type);
  911. dma_free_coherent(&pdev->dev,
  912. qdss_mem[i].size, qdss_mem[i].va,
  913. qdss_mem[i].pa);
  914. qdss_mem[i].va = NULL;
  915. qdss_mem[i].pa = 0;
  916. qdss_mem[i].size = 0;
  917. qdss_mem[i].type = 0;
  918. }
  919. }
  920. priv->qdss_mem_seg_len = 0;
  921. }
  922. static int icnss_qdss_trace_req_mem_hdlr(struct icnss_priv *priv)
  923. {
  924. int ret = 0;
  925. ret = icnss_alloc_qdss_mem(priv);
  926. if (ret < 0)
  927. return ret;
  928. return wlfw_qdss_trace_mem_info_send_sync(priv);
  929. }
  930. static void *icnss_qdss_trace_pa_to_va(struct icnss_priv *priv,
  931. u64 pa, u32 size, int *seg_id)
  932. {
  933. int i = 0;
  934. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  935. u64 offset = 0;
  936. void *va = NULL;
  937. u64 local_pa;
  938. u32 local_size;
  939. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  940. local_pa = (u64)qdss_mem[i].pa;
  941. local_size = (u32)qdss_mem[i].size;
  942. if (pa == local_pa && size <= local_size) {
  943. va = qdss_mem[i].va;
  944. break;
  945. }
  946. if (pa > local_pa &&
  947. pa < local_pa + local_size &&
  948. pa + size <= local_pa + local_size) {
  949. offset = pa - local_pa;
  950. va = qdss_mem[i].va + offset;
  951. break;
  952. }
  953. }
  954. *seg_id = i;
  955. return va;
  956. }
  957. static int icnss_qdss_trace_save_hdlr(struct icnss_priv *priv,
  958. void *data)
  959. {
  960. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  961. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  962. int ret = 0;
  963. int i;
  964. void *va = NULL;
  965. u64 pa;
  966. u32 size;
  967. int seg_id = 0;
  968. if (!priv->qdss_mem_seg_len) {
  969. icnss_pr_err("Memory for QDSS trace is not available\n");
  970. return -ENOMEM;
  971. }
  972. if (event_data->mem_seg_len == 0) {
  973. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  974. ret = icnss_genl_send_msg(qdss_mem[i].va,
  975. ICNSS_GENL_MSG_TYPE_QDSS,
  976. event_data->file_name,
  977. qdss_mem[i].size);
  978. if (ret < 0) {
  979. icnss_pr_err("Fail to save QDSS data: %d\n",
  980. ret);
  981. break;
  982. }
  983. }
  984. } else {
  985. for (i = 0; i < event_data->mem_seg_len; i++) {
  986. pa = event_data->mem_seg[i].addr;
  987. size = event_data->mem_seg[i].size;
  988. va = icnss_qdss_trace_pa_to_va(priv, pa,
  989. size, &seg_id);
  990. if (!va) {
  991. icnss_pr_err("Fail to find matching va for pa %pa\n",
  992. &pa);
  993. ret = -EINVAL;
  994. break;
  995. }
  996. ret = icnss_genl_send_msg(va, ICNSS_GENL_MSG_TYPE_QDSS,
  997. event_data->file_name, size);
  998. if (ret < 0) {
  999. icnss_pr_err("Fail to save QDSS data: %d\n",
  1000. ret);
  1001. break;
  1002. }
  1003. }
  1004. }
  1005. kfree(data);
  1006. return ret;
  1007. }
  1008. static inline int icnss_atomic_dec_if_greater_one(atomic_t *v)
  1009. {
  1010. int dec, c = atomic_read(v);
  1011. do {
  1012. dec = c - 1;
  1013. if (unlikely(dec < 1))
  1014. break;
  1015. } while (!atomic_try_cmpxchg(v, &c, dec));
  1016. return dec;
  1017. }
  1018. static int icnss_qdss_trace_req_data_hdlr(struct icnss_priv *priv,
  1019. void *data)
  1020. {
  1021. int ret = 0;
  1022. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1023. if (!priv)
  1024. return -ENODEV;
  1025. if (!data)
  1026. return -EINVAL;
  1027. ret = icnss_wlfw_qdss_data_send_sync(priv, event_data->file_name,
  1028. event_data->total_size);
  1029. kfree(data);
  1030. return ret;
  1031. }
  1032. static int icnss_event_soc_wake_request(struct icnss_priv *priv, void *data)
  1033. {
  1034. int ret = 0;
  1035. if (!priv)
  1036. return -ENODEV;
  1037. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  1038. icnss_pr_soc_wake("SOC awake after posting work, Ref count: %d",
  1039. atomic_read(&priv->soc_wake_ref_count));
  1040. return 0;
  1041. }
  1042. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REQ,
  1043. ICNSS_SMP2P_OUT_SOC_WAKE);
  1044. if (!ret)
  1045. atomic_inc(&priv->soc_wake_ref_count);
  1046. return ret;
  1047. }
  1048. static int icnss_event_soc_wake_release(struct icnss_priv *priv, void *data)
  1049. {
  1050. int ret = 0;
  1051. if (!priv)
  1052. return -ENODEV;
  1053. if (atomic_dec_if_positive(&priv->soc_wake_ref_count)) {
  1054. icnss_pr_soc_wake("Wake release not called. Ref count: %d",
  1055. priv->soc_wake_ref_count);
  1056. return 0;
  1057. }
  1058. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REL,
  1059. ICNSS_SMP2P_OUT_SOC_WAKE);
  1060. return ret;
  1061. }
  1062. static int icnss_driver_event_register_driver(struct icnss_priv *priv,
  1063. void *data)
  1064. {
  1065. int ret = 0;
  1066. int probe_cnt = 0;
  1067. if (priv->ops)
  1068. return -EEXIST;
  1069. priv->ops = data;
  1070. if (test_bit(SKIP_QMI, &priv->ctrl_params.quirks))
  1071. set_bit(ICNSS_FW_READY, &priv->state);
  1072. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1073. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  1074. priv->state);
  1075. return -ENODEV;
  1076. }
  1077. if (!test_bit(ICNSS_FW_READY, &priv->state)) {
  1078. icnss_pr_dbg("FW is not ready yet, state: 0x%lx\n",
  1079. priv->state);
  1080. goto out;
  1081. }
  1082. ret = icnss_hw_power_on(priv);
  1083. if (ret)
  1084. goto out;
  1085. icnss_block_shutdown(true);
  1086. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  1087. ret = priv->ops->probe(&priv->pdev->dev);
  1088. probe_cnt++;
  1089. if (ret != -EPROBE_DEFER)
  1090. break;
  1091. }
  1092. if (ret) {
  1093. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  1094. ret, priv->state, probe_cnt);
  1095. icnss_block_shutdown(false);
  1096. goto power_off;
  1097. }
  1098. icnss_block_shutdown(false);
  1099. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1100. return 0;
  1101. power_off:
  1102. icnss_hw_power_off(priv);
  1103. out:
  1104. return ret;
  1105. }
  1106. static int icnss_driver_event_unregister_driver(struct icnss_priv *priv,
  1107. void *data)
  1108. {
  1109. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state)) {
  1110. priv->ops = NULL;
  1111. goto out;
  1112. }
  1113. set_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1114. icnss_block_shutdown(true);
  1115. if (priv->ops)
  1116. priv->ops->remove(&priv->pdev->dev);
  1117. icnss_block_shutdown(false);
  1118. clear_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1119. clear_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1120. priv->ops = NULL;
  1121. icnss_hw_power_off(priv);
  1122. out:
  1123. return 0;
  1124. }
  1125. static int icnss_fw_crashed(struct icnss_priv *priv,
  1126. struct icnss_event_pd_service_down_data *event_data)
  1127. {
  1128. icnss_pr_dbg("FW crashed, state: 0x%lx\n", priv->state);
  1129. set_bit(ICNSS_PD_RESTART, &priv->state);
  1130. clear_bit(ICNSS_FW_READY, &priv->state);
  1131. icnss_pm_stay_awake(priv);
  1132. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  1133. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_CRASHED, NULL);
  1134. if (event_data && event_data->fw_rejuvenate)
  1135. wlfw_rejuvenate_ack_send_sync_msg(priv);
  1136. return 0;
  1137. }
  1138. int icnss_update_hang_event_data(struct icnss_priv *priv,
  1139. struct icnss_uevent_hang_data *hang_data)
  1140. {
  1141. if (!priv->hang_event_data_va)
  1142. return -EINVAL;
  1143. priv->hang_event_data = kmemdup(priv->hang_event_data_va,
  1144. priv->hang_event_data_len,
  1145. GFP_ATOMIC);
  1146. if (!priv->hang_event_data)
  1147. return -ENOMEM;
  1148. // Update the hang event params
  1149. hang_data->hang_event_data = priv->hang_event_data;
  1150. hang_data->hang_event_data_len = priv->hang_event_data_len;
  1151. return 0;
  1152. }
  1153. int icnss_send_hang_event_data(struct icnss_priv *priv)
  1154. {
  1155. struct icnss_uevent_hang_data hang_data = {0};
  1156. int ret = 0xFF;
  1157. if (priv->early_crash_ind) {
  1158. ret = icnss_update_hang_event_data(priv, &hang_data);
  1159. if (ret)
  1160. icnss_pr_err("Unable to allocate memory for Hang event data\n");
  1161. }
  1162. icnss_call_driver_uevent(priv, ICNSS_UEVENT_HANG_DATA,
  1163. &hang_data);
  1164. if (!ret) {
  1165. kfree(priv->hang_event_data);
  1166. priv->hang_event_data = NULL;
  1167. }
  1168. return 0;
  1169. }
  1170. static int icnss_driver_event_pd_service_down(struct icnss_priv *priv,
  1171. void *data)
  1172. {
  1173. struct icnss_event_pd_service_down_data *event_data = data;
  1174. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1175. icnss_ignore_fw_timeout(false);
  1176. goto out;
  1177. }
  1178. if (priv->force_err_fatal)
  1179. ICNSS_ASSERT(0);
  1180. if (priv->device_id == WCN6750_DEVICE_ID) {
  1181. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1182. ICNSS_SMP2P_OUT_POWER_SAVE);
  1183. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1184. ICNSS_SMP2P_OUT_SOC_WAKE);
  1185. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1186. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  1187. }
  1188. icnss_send_hang_event_data(priv);
  1189. if (priv->early_crash_ind) {
  1190. icnss_pr_dbg("PD Down ignored as early indication is processed: %d, state: 0x%lx\n",
  1191. event_data->crashed, priv->state);
  1192. goto out;
  1193. }
  1194. if (test_bit(ICNSS_PD_RESTART, &priv->state) && event_data->crashed) {
  1195. icnss_fatal_err("PD Down while recovery inprogress, crashed: %d, state: 0x%lx\n",
  1196. event_data->crashed, priv->state);
  1197. if (!priv->allow_recursive_recovery)
  1198. ICNSS_ASSERT(0);
  1199. goto out;
  1200. }
  1201. if (!test_bit(ICNSS_PD_RESTART, &priv->state))
  1202. icnss_fw_crashed(priv, event_data);
  1203. out:
  1204. kfree(data);
  1205. return 0;
  1206. }
  1207. static int icnss_driver_event_early_crash_ind(struct icnss_priv *priv,
  1208. void *data)
  1209. {
  1210. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1211. icnss_ignore_fw_timeout(false);
  1212. goto out;
  1213. }
  1214. priv->early_crash_ind = true;
  1215. icnss_fw_crashed(priv, NULL);
  1216. out:
  1217. kfree(data);
  1218. return 0;
  1219. }
  1220. static int icnss_driver_event_idle_shutdown(struct icnss_priv *priv,
  1221. void *data)
  1222. {
  1223. int ret = 0;
  1224. if (!priv->ops || !priv->ops->idle_shutdown)
  1225. return 0;
  1226. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1227. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1228. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown callback\n");
  1229. ret = -EBUSY;
  1230. } else {
  1231. icnss_pr_dbg("Calling driver idle shutdown, state: 0x%lx\n",
  1232. priv->state);
  1233. icnss_block_shutdown(true);
  1234. ret = priv->ops->idle_shutdown(&priv->pdev->dev);
  1235. icnss_block_shutdown(false);
  1236. }
  1237. return ret;
  1238. }
  1239. static int icnss_driver_event_idle_restart(struct icnss_priv *priv,
  1240. void *data)
  1241. {
  1242. int ret = 0;
  1243. if (!priv->ops || !priv->ops->idle_restart)
  1244. return 0;
  1245. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1246. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1247. icnss_pr_err("SSR/PDR is already in-progress during idle restart callback\n");
  1248. ret = -EBUSY;
  1249. } else {
  1250. icnss_pr_dbg("Calling driver idle restart, state: 0x%lx\n",
  1251. priv->state);
  1252. icnss_block_shutdown(true);
  1253. ret = priv->ops->idle_restart(&priv->pdev->dev);
  1254. icnss_block_shutdown(false);
  1255. }
  1256. return ret;
  1257. }
  1258. static int icnss_qdss_trace_free_hdlr(struct icnss_priv *priv)
  1259. {
  1260. icnss_free_qdss_mem(priv);
  1261. return 0;
  1262. }
  1263. static int icnss_m3_dump_upload_req_hdlr(struct icnss_priv *priv,
  1264. void *data)
  1265. {
  1266. struct icnss_m3_upload_segments_req_data *event_data = data;
  1267. struct qcom_dump_segment segment;
  1268. int i, status = 0, ret = 0;
  1269. struct list_head head;
  1270. if (!dump_enabled()) {
  1271. icnss_pr_info("Dump collection is not enabled\n");
  1272. return ret;
  1273. }
  1274. INIT_LIST_HEAD(&head);
  1275. for (i = 0; i < event_data->no_of_valid_segments; i++) {
  1276. memset(&segment, 0, sizeof(segment));
  1277. segment.va = devm_ioremap(&priv->pdev->dev,
  1278. event_data->m3_segment[i].addr,
  1279. event_data->m3_segment[i].size);
  1280. if (!segment.va) {
  1281. icnss_pr_err("Failed to ioremap M3 Dump region");
  1282. ret = -ENOMEM;
  1283. goto send_resp;
  1284. }
  1285. segment.size = event_data->m3_segment[i].size;
  1286. list_add(&segment.node, &head);
  1287. icnss_pr_dbg("Started Dump colletcion for %s segment",
  1288. event_data->m3_segment[i].name);
  1289. switch (event_data->m3_segment[i].type) {
  1290. case QMI_M3_SEGMENT_PHYAREG_V01:
  1291. ret = qcom_dump(&head, priv->m3_dump_phyareg->dev);
  1292. break;
  1293. case QMI_M3_SEGMENT_PHYDBG_V01:
  1294. ret = qcom_dump(&head, priv->m3_dump_phydbg->dev);
  1295. break;
  1296. case QMI_M3_SEGMENT_WMAC0_REG_V01:
  1297. ret = qcom_dump(&head, priv->m3_dump_wmac0reg->dev);
  1298. break;
  1299. case QMI_M3_SEGMENT_WCSSDBG_V01:
  1300. ret = qcom_dump(&head, priv->m3_dump_wcssdbg->dev);
  1301. break;
  1302. case QMI_M3_SEGMENT_PHYAPDMEM_V01:
  1303. ret = qcom_dump(&head, priv->m3_dump_phyapdmem->dev);
  1304. break;
  1305. default:
  1306. icnss_pr_err("Invalid Segment type: %d",
  1307. event_data->m3_segment[i].type);
  1308. }
  1309. if (ret) {
  1310. status = ret;
  1311. icnss_pr_err("Failed to dump m3 %s segment, err = %d\n",
  1312. event_data->m3_segment[i].name, ret);
  1313. }
  1314. list_del(&segment.node);
  1315. }
  1316. send_resp:
  1317. icnss_wlfw_m3_dump_upload_done_send_sync(priv, event_data->pdev_id,
  1318. status);
  1319. return ret;
  1320. }
  1321. static int icnss_subsys_restart_level(struct icnss_priv *priv, void *data)
  1322. {
  1323. int ret = 0;
  1324. struct icnss_subsys_restart_level_data *event_data = data;
  1325. if (!priv)
  1326. return -ENODEV;
  1327. if (!data)
  1328. return -EINVAL;
  1329. ret = wlfw_subsys_restart_level_msg(priv, event_data->restart_level);
  1330. kfree(data);
  1331. return ret;
  1332. }
  1333. static void icnss_driver_event_work(struct work_struct *work)
  1334. {
  1335. struct icnss_priv *priv =
  1336. container_of(work, struct icnss_priv, event_work);
  1337. struct icnss_driver_event *event;
  1338. unsigned long flags;
  1339. int ret;
  1340. icnss_pm_stay_awake(priv);
  1341. spin_lock_irqsave(&priv->event_lock, flags);
  1342. while (!list_empty(&priv->event_list)) {
  1343. event = list_first_entry(&priv->event_list,
  1344. struct icnss_driver_event, list);
  1345. list_del(&event->list);
  1346. spin_unlock_irqrestore(&priv->event_lock, flags);
  1347. icnss_pr_dbg("Processing event: %s%s(%d), state: 0x%lx\n",
  1348. icnss_driver_event_to_str(event->type),
  1349. event->sync ? "-sync" : "", event->type,
  1350. priv->state);
  1351. switch (event->type) {
  1352. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1353. ret = icnss_driver_event_server_arrive(priv,
  1354. event->data);
  1355. break;
  1356. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  1357. ret = icnss_driver_event_server_exit(priv);
  1358. break;
  1359. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  1360. ret = icnss_driver_event_fw_ready_ind(priv,
  1361. event->data);
  1362. break;
  1363. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1364. ret = icnss_driver_event_register_driver(priv,
  1365. event->data);
  1366. break;
  1367. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1368. ret = icnss_driver_event_unregister_driver(priv,
  1369. event->data);
  1370. break;
  1371. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  1372. ret = icnss_driver_event_pd_service_down(priv,
  1373. event->data);
  1374. break;
  1375. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  1376. ret = icnss_driver_event_early_crash_ind(priv,
  1377. event->data);
  1378. break;
  1379. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1380. ret = icnss_driver_event_idle_shutdown(priv,
  1381. event->data);
  1382. break;
  1383. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  1384. ret = icnss_driver_event_idle_restart(priv,
  1385. event->data);
  1386. break;
  1387. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  1388. ret = icnss_driver_event_fw_init_done(priv,
  1389. event->data);
  1390. break;
  1391. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1392. ret = icnss_qdss_trace_req_mem_hdlr(priv);
  1393. break;
  1394. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  1395. ret = icnss_qdss_trace_save_hdlr(priv,
  1396. event->data);
  1397. break;
  1398. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1399. ret = icnss_qdss_trace_free_hdlr(priv);
  1400. break;
  1401. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  1402. ret = icnss_m3_dump_upload_req_hdlr(priv, event->data);
  1403. break;
  1404. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1405. ret = icnss_qdss_trace_req_data_hdlr(priv,
  1406. event->data);
  1407. break;
  1408. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  1409. ret = icnss_subsys_restart_level(priv, event->data);
  1410. break;
  1411. default:
  1412. icnss_pr_err("Invalid Event type: %d", event->type);
  1413. kfree(event);
  1414. continue;
  1415. }
  1416. priv->stats.events[event->type].processed++;
  1417. icnss_pr_dbg("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1418. icnss_driver_event_to_str(event->type),
  1419. event->sync ? "-sync" : "", event->type, ret,
  1420. priv->state);
  1421. spin_lock_irqsave(&priv->event_lock, flags);
  1422. if (event->sync) {
  1423. event->ret = ret;
  1424. complete(&event->complete);
  1425. continue;
  1426. }
  1427. spin_unlock_irqrestore(&priv->event_lock, flags);
  1428. kfree(event);
  1429. spin_lock_irqsave(&priv->event_lock, flags);
  1430. }
  1431. spin_unlock_irqrestore(&priv->event_lock, flags);
  1432. icnss_pm_relax(priv);
  1433. }
  1434. static void icnss_soc_wake_msg_work(struct work_struct *work)
  1435. {
  1436. struct icnss_priv *priv =
  1437. container_of(work, struct icnss_priv, soc_wake_msg_work);
  1438. struct icnss_soc_wake_event *event;
  1439. unsigned long flags;
  1440. int ret;
  1441. icnss_pm_stay_awake(priv);
  1442. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1443. while (!list_empty(&priv->soc_wake_msg_list)) {
  1444. event = list_first_entry(&priv->soc_wake_msg_list,
  1445. struct icnss_soc_wake_event, list);
  1446. list_del(&event->list);
  1447. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1448. icnss_pr_soc_wake("Processing event: %s%s(%d), state: 0x%lx\n",
  1449. icnss_soc_wake_event_to_str(event->type),
  1450. event->sync ? "-sync" : "", event->type,
  1451. priv->state);
  1452. switch (event->type) {
  1453. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  1454. ret = icnss_event_soc_wake_request(priv,
  1455. event->data);
  1456. break;
  1457. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  1458. ret = icnss_event_soc_wake_release(priv,
  1459. event->data);
  1460. break;
  1461. default:
  1462. icnss_pr_err("Invalid Event type: %d", event->type);
  1463. kfree(event);
  1464. continue;
  1465. }
  1466. priv->stats.soc_wake_events[event->type].processed++;
  1467. icnss_pr_soc_wake("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1468. icnss_soc_wake_event_to_str(event->type),
  1469. event->sync ? "-sync" : "", event->type, ret,
  1470. priv->state);
  1471. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1472. if (event->sync) {
  1473. event->ret = ret;
  1474. complete(&event->complete);
  1475. continue;
  1476. }
  1477. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1478. kfree(event);
  1479. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1480. }
  1481. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1482. icnss_pm_relax(priv);
  1483. }
  1484. static int icnss_msa0_ramdump(struct icnss_priv *priv)
  1485. {
  1486. int ret = 0;
  1487. struct qcom_dump_segment segment;
  1488. struct icnss_ramdump_info *msa0_dump_dev = priv->msa0_dump_dev;
  1489. struct list_head head;
  1490. if (!dump_enabled()) {
  1491. icnss_pr_info("Dump collection is not enabled\n");
  1492. return ret;
  1493. }
  1494. INIT_LIST_HEAD(&head);
  1495. memset(&segment, 0, sizeof(segment));
  1496. segment.va = priv->msa_va;
  1497. segment.size = priv->msa_mem_size;
  1498. list_add(&segment.node, &head);
  1499. if (!msa0_dump_dev->dev) {
  1500. icnss_pr_err("Created Dump Device not found\n");
  1501. return 0;
  1502. }
  1503. ret = qcom_dump(&head, msa0_dump_dev->dev);
  1504. if (ret) {
  1505. icnss_pr_err("Failed to dump msa0, err = %d\n", ret);
  1506. return ret;
  1507. }
  1508. list_del(&segment.node);
  1509. return ret;
  1510. }
  1511. static void icnss_update_state_send_modem_shutdown(struct icnss_priv *priv,
  1512. void *data)
  1513. {
  1514. struct qcom_ssr_notify_data *notif = data;
  1515. int ret = 0;
  1516. if (!notif->crashed) {
  1517. if (atomic_read(&priv->is_shutdown)) {
  1518. atomic_set(&priv->is_shutdown, false);
  1519. if (!test_bit(ICNSS_PD_RESTART, &priv->state) &&
  1520. !test_bit(ICNSS_SHUTDOWN_DONE, &priv->state) &&
  1521. !test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1522. clear_bit(ICNSS_FW_READY, &priv->state);
  1523. icnss_driver_event_post(priv,
  1524. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  1525. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE,
  1526. NULL);
  1527. }
  1528. }
  1529. if (test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1530. if (!wait_for_completion_timeout(
  1531. &priv->unblock_shutdown,
  1532. msecs_to_jiffies(PROBE_TIMEOUT)))
  1533. icnss_pr_err("modem block shutdown timeout\n");
  1534. }
  1535. ret = wlfw_send_modem_shutdown_msg(priv);
  1536. if (ret < 0)
  1537. icnss_pr_err("Fail to send modem shutdown Indication %d\n",
  1538. ret);
  1539. }
  1540. }
  1541. static char *icnss_qcom_ssr_notify_state_to_str(enum qcom_ssr_notify_type code)
  1542. {
  1543. switch (code) {
  1544. case QCOM_SSR_BEFORE_POWERUP:
  1545. return "BEFORE_POWERUP";
  1546. case QCOM_SSR_AFTER_POWERUP:
  1547. return "AFTER_POWERUP";
  1548. case QCOM_SSR_BEFORE_SHUTDOWN:
  1549. return "BEFORE_SHUTDOWN";
  1550. case QCOM_SSR_AFTER_SHUTDOWN:
  1551. return "AFTER_SHUTDOWN";
  1552. default:
  1553. return "UNKNOWN";
  1554. }
  1555. };
  1556. static int icnss_wpss_early_notifier_nb(struct notifier_block *nb,
  1557. unsigned long code,
  1558. void *data)
  1559. {
  1560. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1561. wpss_early_ssr_nb);
  1562. icnss_pr_vdbg("WPSS-EARLY-Notify: event %s(%lu)\n",
  1563. icnss_qcom_ssr_notify_state_to_str(code), code);
  1564. if (code == QCOM_SSR_BEFORE_SHUTDOWN) {
  1565. set_bit(ICNSS_FW_DOWN, &priv->state);
  1566. icnss_ignore_fw_timeout(true);
  1567. }
  1568. return NOTIFY_DONE;
  1569. }
  1570. static int icnss_wpss_notifier_nb(struct notifier_block *nb,
  1571. unsigned long code,
  1572. void *data)
  1573. {
  1574. struct icnss_event_pd_service_down_data *event_data;
  1575. struct qcom_ssr_notify_data *notif = data;
  1576. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1577. wpss_ssr_nb);
  1578. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1579. icnss_pr_vdbg("WPSS-Notify: event %s(%lu)\n",
  1580. icnss_qcom_ssr_notify_state_to_str(code), code);
  1581. if (code == QCOM_SSR_AFTER_SHUTDOWN) {
  1582. icnss_pr_info("Collecting msa0 segment dump\n");
  1583. icnss_msa0_ramdump(priv);
  1584. goto out;
  1585. }
  1586. if (code != QCOM_SSR_BEFORE_SHUTDOWN)
  1587. goto out;
  1588. priv->is_ssr = true;
  1589. icnss_pr_info("WPSS went down, state: 0x%lx, crashed: %d\n",
  1590. priv->state, notif->crashed);
  1591. set_bit(ICNSS_FW_DOWN, &priv->state);
  1592. if (notif->crashed)
  1593. priv->stats.recovery.root_pd_crash++;
  1594. else
  1595. priv->stats.recovery.root_pd_shutdown++;
  1596. icnss_ignore_fw_timeout(true);
  1597. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1598. if (event_data == NULL)
  1599. return notifier_from_errno(-ENOMEM);
  1600. event_data->crashed = notif->crashed;
  1601. fw_down_data.crashed = !!notif->crashed;
  1602. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1603. clear_bit(ICNSS_FW_READY, &priv->state);
  1604. fw_down_data.crashed = !!notif->crashed;
  1605. icnss_call_driver_uevent(priv,
  1606. ICNSS_UEVENT_FW_DOWN,
  1607. &fw_down_data);
  1608. }
  1609. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1610. ICNSS_EVENT_SYNC, event_data);
  1611. out:
  1612. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1613. return NOTIFY_OK;
  1614. }
  1615. static int icnss_modem_notifier_nb(struct notifier_block *nb,
  1616. unsigned long code,
  1617. void *data)
  1618. {
  1619. struct icnss_event_pd_service_down_data *event_data;
  1620. struct qcom_ssr_notify_data *notif = data;
  1621. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1622. modem_ssr_nb);
  1623. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1624. icnss_pr_vdbg("Modem-Notify: event %s(%lu)\n",
  1625. icnss_qcom_ssr_notify_state_to_str(code), code);
  1626. if (code == QCOM_SSR_AFTER_SHUTDOWN) {
  1627. icnss_pr_info("Collecting msa0 segment dump\n");
  1628. icnss_msa0_ramdump(priv);
  1629. goto out;
  1630. }
  1631. if (code != QCOM_SSR_BEFORE_SHUTDOWN)
  1632. goto out;
  1633. priv->is_ssr = true;
  1634. if (notif->crashed) {
  1635. priv->stats.recovery.root_pd_crash++;
  1636. priv->root_pd_shutdown = false;
  1637. } else {
  1638. priv->stats.recovery.root_pd_shutdown++;
  1639. priv->root_pd_shutdown = true;
  1640. }
  1641. icnss_update_state_send_modem_shutdown(priv, data);
  1642. if (test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  1643. set_bit(ICNSS_FW_DOWN, &priv->state);
  1644. icnss_ignore_fw_timeout(true);
  1645. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1646. clear_bit(ICNSS_FW_READY, &priv->state);
  1647. fw_down_data.crashed = !!notif->crashed;
  1648. icnss_call_driver_uevent(priv,
  1649. ICNSS_UEVENT_FW_DOWN,
  1650. &fw_down_data);
  1651. }
  1652. goto out;
  1653. }
  1654. icnss_pr_info("Modem went down, state: 0x%lx, crashed: %d\n",
  1655. priv->state, notif->crashed);
  1656. set_bit(ICNSS_FW_DOWN, &priv->state);
  1657. icnss_ignore_fw_timeout(true);
  1658. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1659. if (event_data == NULL)
  1660. return notifier_from_errno(-ENOMEM);
  1661. event_data->crashed = notif->crashed;
  1662. fw_down_data.crashed = !!notif->crashed;
  1663. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1664. clear_bit(ICNSS_FW_READY, &priv->state);
  1665. fw_down_data.crashed = !!notif->crashed;
  1666. icnss_call_driver_uevent(priv,
  1667. ICNSS_UEVENT_FW_DOWN,
  1668. &fw_down_data);
  1669. }
  1670. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1671. ICNSS_EVENT_SYNC, event_data);
  1672. out:
  1673. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1674. return NOTIFY_OK;
  1675. }
  1676. static int icnss_wpss_early_ssr_register_notifier(struct icnss_priv *priv)
  1677. {
  1678. int ret = 0;
  1679. priv->wpss_early_ssr_nb.notifier_call = icnss_wpss_early_notifier_nb;
  1680. priv->wpss_early_notify_handler =
  1681. qcom_register_early_ssr_notifier("wpss",
  1682. &priv->wpss_early_ssr_nb);
  1683. if (IS_ERR(priv->wpss_early_notify_handler)) {
  1684. ret = PTR_ERR(priv->wpss_early_notify_handler);
  1685. icnss_pr_err("WPSS register early notifier failed: %d\n", ret);
  1686. }
  1687. return ret;
  1688. }
  1689. static int icnss_wpss_ssr_register_notifier(struct icnss_priv *priv)
  1690. {
  1691. int ret = 0;
  1692. priv->wpss_ssr_nb.notifier_call = icnss_wpss_notifier_nb;
  1693. /*
  1694. * Assign priority of icnss wpss notifier callback over IPA
  1695. * modem notifier callback which is 0
  1696. */
  1697. priv->wpss_ssr_nb.priority = 1;
  1698. priv->wpss_notify_handler =
  1699. qcom_register_ssr_notifier("wpss", &priv->wpss_ssr_nb);
  1700. if (IS_ERR(priv->wpss_notify_handler)) {
  1701. ret = PTR_ERR(priv->wpss_notify_handler);
  1702. icnss_pr_err("WPSS register notifier failed: %d\n", ret);
  1703. }
  1704. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1705. return ret;
  1706. }
  1707. static int icnss_modem_ssr_register_notifier(struct icnss_priv *priv)
  1708. {
  1709. int ret = 0;
  1710. priv->modem_ssr_nb.notifier_call = icnss_modem_notifier_nb;
  1711. /*
  1712. * Assign priority of icnss modem notifier callback over IPA
  1713. * modem notifier callback which is 0
  1714. */
  1715. priv->modem_ssr_nb.priority = 1;
  1716. priv->modem_notify_handler =
  1717. qcom_register_ssr_notifier("modem", &priv->modem_ssr_nb);
  1718. if (IS_ERR(priv->modem_notify_handler)) {
  1719. ret = PTR_ERR(priv->modem_notify_handler);
  1720. icnss_pr_err("Modem register notifier failed: %d\n", ret);
  1721. }
  1722. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1723. return ret;
  1724. }
  1725. static void icnss_wpss_early_ssr_unregister_notifier(struct icnss_priv *priv)
  1726. {
  1727. if (IS_ERR(priv->wpss_early_notify_handler))
  1728. return;
  1729. qcom_unregister_early_ssr_notifier(priv->wpss_early_notify_handler,
  1730. &priv->wpss_early_ssr_nb);
  1731. priv->wpss_early_notify_handler = NULL;
  1732. }
  1733. static int icnss_wpss_ssr_unregister_notifier(struct icnss_priv *priv)
  1734. {
  1735. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  1736. return 0;
  1737. qcom_unregister_ssr_notifier(priv->wpss_notify_handler,
  1738. &priv->wpss_ssr_nb);
  1739. priv->wpss_notify_handler = NULL;
  1740. return 0;
  1741. }
  1742. static int icnss_modem_ssr_unregister_notifier(struct icnss_priv *priv)
  1743. {
  1744. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  1745. return 0;
  1746. qcom_unregister_ssr_notifier(priv->modem_notify_handler,
  1747. &priv->modem_ssr_nb);
  1748. priv->modem_notify_handler = NULL;
  1749. return 0;
  1750. }
  1751. static void icnss_pdr_notifier_cb(int state, char *service_path, void *priv_cb)
  1752. {
  1753. struct icnss_priv *priv = priv_cb;
  1754. struct icnss_event_pd_service_down_data *event_data;
  1755. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1756. enum icnss_pdr_cause_index cause = ICNSS_ROOT_PD_CRASH;
  1757. icnss_pr_dbg("PD service notification: 0x%lx state: 0x%lx\n",
  1758. state, priv->state);
  1759. switch (state) {
  1760. case SERVREG_SERVICE_STATE_DOWN:
  1761. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1762. if (!event_data)
  1763. return;
  1764. event_data->crashed = true;
  1765. if (!priv->is_ssr) {
  1766. set_bit(ICNSS_PDR, &penv->state);
  1767. if (test_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state)) {
  1768. cause = ICNSS_HOST_ERROR;
  1769. priv->stats.recovery.pdr_host_error++;
  1770. } else {
  1771. cause = ICNSS_FW_CRASH;
  1772. priv->stats.recovery.pdr_fw_crash++;
  1773. }
  1774. } else if (priv->root_pd_shutdown) {
  1775. cause = ICNSS_ROOT_PD_SHUTDOWN;
  1776. event_data->crashed = false;
  1777. }
  1778. icnss_pr_info("PD service down, state: 0x%lx: cause: %s\n",
  1779. priv->state, icnss_pdr_cause[cause]);
  1780. if (!test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1781. set_bit(ICNSS_FW_DOWN, &priv->state);
  1782. icnss_ignore_fw_timeout(true);
  1783. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1784. clear_bit(ICNSS_FW_READY, &priv->state);
  1785. fw_down_data.crashed = event_data->crashed;
  1786. icnss_call_driver_uevent(priv,
  1787. ICNSS_UEVENT_FW_DOWN,
  1788. &fw_down_data);
  1789. }
  1790. }
  1791. clear_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  1792. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1793. ICNSS_EVENT_SYNC, event_data);
  1794. break;
  1795. case SERVREG_SERVICE_STATE_UP:
  1796. clear_bit(ICNSS_FW_DOWN, &priv->state);
  1797. break;
  1798. default:
  1799. break;
  1800. }
  1801. return;
  1802. }
  1803. static int icnss_pd_restart_enable(struct icnss_priv *priv)
  1804. {
  1805. struct pdr_handle *handle = NULL;
  1806. struct pdr_service *service = NULL;
  1807. int err = 0;
  1808. handle = pdr_handle_alloc(icnss_pdr_notifier_cb, priv);
  1809. if (IS_ERR_OR_NULL(handle)) {
  1810. err = PTR_ERR(handle);
  1811. icnss_pr_err("Failed to alloc pdr handle, err %d", err);
  1812. goto out;
  1813. }
  1814. service = pdr_add_lookup(handle, ICNSS_WLAN_SERVICE_NAME, ICNSS_WLANPD_NAME);
  1815. if (IS_ERR_OR_NULL(service)) {
  1816. err = PTR_ERR(service);
  1817. icnss_pr_err("Failed to add lookup, err %d", err);
  1818. goto out;
  1819. }
  1820. priv->pdr_handle = handle;
  1821. priv->pdr_service = service;
  1822. set_bit(ICNSS_PDR_REGISTERED, &priv->state);
  1823. icnss_pr_info("PDR registration happened");
  1824. out:
  1825. return err;
  1826. }
  1827. static void icnss_pdr_unregister_notifier(struct icnss_priv *priv)
  1828. {
  1829. if (!test_and_clear_bit(ICNSS_PDR_REGISTERED, &priv->state))
  1830. return;
  1831. pdr_handle_release(priv->pdr_handle);
  1832. }
  1833. static int icnss_ramdump_devnode_init(struct icnss_priv *priv)
  1834. {
  1835. int ret = 0;
  1836. priv->icnss_ramdump_class = class_create(THIS_MODULE, ICNSS_RAMDUMP_NAME);
  1837. if (IS_ERR_OR_NULL(priv->icnss_ramdump_class)) {
  1838. ret = PTR_ERR(priv->icnss_ramdump_class);
  1839. icnss_pr_err("%s:Class create failed for ramdump devices (%d)\n", __func__, ret);
  1840. return ret;
  1841. }
  1842. ret = alloc_chrdev_region(&priv->icnss_ramdump_dev, 0, RAMDUMP_NUM_DEVICES,
  1843. ICNSS_RAMDUMP_NAME);
  1844. if (ret < 0) {
  1845. icnss_pr_err("%s: Unable to allocate major\n", __func__);
  1846. goto fail_alloc_major;
  1847. }
  1848. return 0;
  1849. fail_alloc_major:
  1850. class_destroy(priv->icnss_ramdump_class);
  1851. return ret;
  1852. }
  1853. void *icnss_create_ramdump_device(struct icnss_priv *priv, const char *dev_name)
  1854. {
  1855. int ret = 0;
  1856. struct icnss_ramdump_info *ramdump_info;
  1857. ramdump_info = kzalloc(sizeof(*ramdump_info), GFP_KERNEL);
  1858. if (!dev_name) {
  1859. icnss_pr_err("%s: Invalid device name.\n", __func__);
  1860. return NULL;
  1861. }
  1862. snprintf(ramdump_info->name, ARRAY_SIZE(ramdump_info->name), "icnss_%s", dev_name);
  1863. ramdump_info->minor = ida_simple_get(&rd_minor_id, 0, RAMDUMP_NUM_DEVICES, GFP_KERNEL);
  1864. if (ramdump_info->minor < 0) {
  1865. icnss_pr_err("%s: No more minor numbers left! rc:%d\n", __func__,
  1866. ramdump_info->minor);
  1867. ret = -ENODEV;
  1868. goto fail_out_of_minors;
  1869. }
  1870. ramdump_info->dev = device_create(priv->icnss_ramdump_class, NULL,
  1871. MKDEV(MAJOR(priv->icnss_ramdump_dev),
  1872. ramdump_info->minor),
  1873. ramdump_info, ramdump_info->name);
  1874. if (IS_ERR_OR_NULL(ramdump_info->dev)) {
  1875. ret = PTR_ERR(ramdump_info->dev);
  1876. icnss_pr_err("%s: Device create failed for %s (%d)\n", __func__,
  1877. ramdump_info->name, ret);
  1878. goto fail_device_create;
  1879. }
  1880. return (void *)ramdump_info;
  1881. fail_device_create:
  1882. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  1883. fail_out_of_minors:
  1884. kfree(ramdump_info);
  1885. return ERR_PTR(ret);
  1886. }
  1887. static int icnss_register_ramdump_devices(struct icnss_priv *priv)
  1888. {
  1889. int ret = 0;
  1890. if (!priv || !priv->pdev) {
  1891. icnss_pr_err("Platform priv or pdev is NULL\n");
  1892. return -EINVAL;
  1893. }
  1894. ret = icnss_ramdump_devnode_init(priv);
  1895. if (ret)
  1896. return ret;
  1897. priv->msa0_dump_dev = icnss_create_ramdump_device(priv, "wcss_msa0");
  1898. if (!priv->msa0_dump_dev->dev) {
  1899. icnss_pr_err("Failed to create msa0 dump device!");
  1900. return -ENOMEM;
  1901. }
  1902. if (priv->device_id == WCN6750_DEVICE_ID) {
  1903. priv->m3_dump_phyareg = icnss_create_ramdump_device(priv,
  1904. ICNSS_M3_SEGMENT(
  1905. ICNSS_M3_SEGMENT_PHYAREG));
  1906. if (!priv->m3_dump_phyareg->dev) {
  1907. icnss_pr_err("Failed to create m3 dump for Phyareg segment device!");
  1908. return -ENOMEM;
  1909. }
  1910. priv->m3_dump_phydbg = icnss_create_ramdump_device(priv,
  1911. ICNSS_M3_SEGMENT(
  1912. ICNSS_M3_SEGMENT_PHYA));
  1913. if (!priv->m3_dump_phydbg->dev) {
  1914. icnss_pr_err("Failed to create m3 dump for Phydbg segment device!");
  1915. return -ENOMEM;
  1916. }
  1917. priv->m3_dump_wmac0reg = icnss_create_ramdump_device(priv,
  1918. ICNSS_M3_SEGMENT(
  1919. ICNSS_M3_SEGMENT_WMACREG));
  1920. if (!priv->m3_dump_wmac0reg->dev) {
  1921. icnss_pr_err("Failed to create m3 dump for Wmac0reg segment device!");
  1922. return -ENOMEM;
  1923. }
  1924. priv->m3_dump_wcssdbg = icnss_create_ramdump_device(priv,
  1925. ICNSS_M3_SEGMENT(
  1926. ICNSS_M3_SEGMENT_WCSSDBG));
  1927. if (!priv->m3_dump_wcssdbg->dev) {
  1928. icnss_pr_err("Failed to create m3 dump for Wcssdbg segment device!");
  1929. return -ENOMEM;
  1930. }
  1931. priv->m3_dump_phyapdmem = icnss_create_ramdump_device(priv,
  1932. ICNSS_M3_SEGMENT(
  1933. ICNSS_M3_SEGMENT_PHYAM3));
  1934. if (!priv->m3_dump_phyapdmem->dev) {
  1935. icnss_pr_err("Failed to create m3 dump for Phyapdmem segment device!");
  1936. return -ENOMEM;
  1937. }
  1938. }
  1939. return 0;
  1940. }
  1941. static int icnss_enable_recovery(struct icnss_priv *priv)
  1942. {
  1943. int ret;
  1944. if (test_bit(RECOVERY_DISABLE, &priv->ctrl_params.quirks)) {
  1945. icnss_pr_dbg("Recovery disabled through module parameter\n");
  1946. return 0;
  1947. }
  1948. if (test_bit(PDR_ONLY, &priv->ctrl_params.quirks)) {
  1949. icnss_pr_dbg("SSR disabled through module parameter\n");
  1950. goto enable_pdr;
  1951. }
  1952. ret = icnss_register_ramdump_devices(priv);
  1953. if (ret)
  1954. return ret;
  1955. if (priv->device_id == WCN6750_DEVICE_ID) {
  1956. icnss_wpss_early_ssr_register_notifier(priv);
  1957. icnss_wpss_ssr_register_notifier(priv);
  1958. return 0;
  1959. }
  1960. icnss_modem_ssr_register_notifier(priv);
  1961. if (test_bit(SSR_ONLY, &priv->ctrl_params.quirks)) {
  1962. icnss_pr_dbg("PDR disabled through module parameter\n");
  1963. return 0;
  1964. }
  1965. enable_pdr:
  1966. ret = icnss_pd_restart_enable(priv);
  1967. if (ret)
  1968. return ret;
  1969. return 0;
  1970. }
  1971. static int icnss_dev_id_match(struct icnss_priv *priv,
  1972. struct device_info *dev_info)
  1973. {
  1974. if (!dev_info) {
  1975. icnss_pr_info("WLAN driver devinfo is null, Continue driver loading");
  1976. return 1;
  1977. }
  1978. while (dev_info->device_id) {
  1979. if (priv->device_id == dev_info->device_id)
  1980. return 1;
  1981. dev_info++;
  1982. }
  1983. return 0;
  1984. }
  1985. static int icnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  1986. unsigned long *thermal_state)
  1987. {
  1988. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  1989. *thermal_state = icnss_tcdev->max_thermal_state;
  1990. return 0;
  1991. }
  1992. static int icnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  1993. unsigned long *thermal_state)
  1994. {
  1995. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  1996. *thermal_state = icnss_tcdev->curr_thermal_state;
  1997. return 0;
  1998. }
  1999. static int icnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  2000. unsigned long thermal_state)
  2001. {
  2002. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2003. struct device *dev = &penv->pdev->dev;
  2004. int ret = 0;
  2005. if (!penv->ops || !penv->ops->set_therm_cdev_state)
  2006. return 0;
  2007. if (thermal_state > icnss_tcdev->max_thermal_state)
  2008. return -EINVAL;
  2009. icnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  2010. thermal_state, icnss_tcdev->tcdev_id);
  2011. mutex_lock(&penv->tcdev_lock);
  2012. ret = penv->ops->set_therm_cdev_state(dev, thermal_state,
  2013. icnss_tcdev->tcdev_id);
  2014. if (!ret)
  2015. icnss_tcdev->curr_thermal_state = thermal_state;
  2016. mutex_unlock(&penv->tcdev_lock);
  2017. if (ret) {
  2018. icnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  2019. ret, icnss_tcdev->tcdev_id);
  2020. return ret;
  2021. }
  2022. return 0;
  2023. }
  2024. static struct thermal_cooling_device_ops icnss_cooling_ops = {
  2025. .get_max_state = icnss_tcdev_get_max_state,
  2026. .get_cur_state = icnss_tcdev_get_cur_state,
  2027. .set_cur_state = icnss_tcdev_set_cur_state,
  2028. };
  2029. int icnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  2030. int tcdev_id)
  2031. {
  2032. struct icnss_priv *priv = dev_get_drvdata(dev);
  2033. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2034. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  2035. struct device_node *dev_node;
  2036. int ret = 0;
  2037. icnss_tcdev = kzalloc(sizeof(*icnss_tcdev), GFP_KERNEL);
  2038. if (!icnss_tcdev)
  2039. return -ENOMEM;
  2040. icnss_tcdev->tcdev_id = tcdev_id;
  2041. icnss_tcdev->max_thermal_state = max_state;
  2042. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  2043. "qcom,icnss_cdev%d", tcdev_id);
  2044. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  2045. if (!dev_node) {
  2046. icnss_pr_err("Failed to get cooling device node\n");
  2047. return -EINVAL;
  2048. }
  2049. icnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  2050. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  2051. icnss_tcdev->tcdev = thermal_of_cooling_device_register(
  2052. dev_node,
  2053. cdev_node_name, icnss_tcdev,
  2054. &icnss_cooling_ops);
  2055. if (IS_ERR_OR_NULL(icnss_tcdev->tcdev)) {
  2056. ret = PTR_ERR(icnss_tcdev->tcdev);
  2057. icnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  2058. ret, icnss_tcdev->tcdev_id);
  2059. } else {
  2060. icnss_pr_dbg("Cooling device registered for cdev id %d",
  2061. icnss_tcdev->tcdev_id);
  2062. list_add(&icnss_tcdev->tcdev_list,
  2063. &priv->icnss_tcdev_list);
  2064. }
  2065. } else {
  2066. icnss_pr_dbg("Cooling device registration not supported");
  2067. ret = -EOPNOTSUPP;
  2068. }
  2069. return ret;
  2070. }
  2071. EXPORT_SYMBOL(icnss_thermal_cdev_register);
  2072. void icnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  2073. {
  2074. struct icnss_priv *priv = dev_get_drvdata(dev);
  2075. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2076. while (!list_empty(&priv->icnss_tcdev_list)) {
  2077. icnss_tcdev = list_first_entry(&priv->icnss_tcdev_list,
  2078. struct icnss_thermal_cdev,
  2079. tcdev_list);
  2080. thermal_cooling_device_unregister(icnss_tcdev->tcdev);
  2081. list_del(&icnss_tcdev->tcdev_list);
  2082. kfree(icnss_tcdev);
  2083. }
  2084. }
  2085. EXPORT_SYMBOL(icnss_thermal_cdev_unregister);
  2086. int icnss_get_curr_therm_cdev_state(struct device *dev,
  2087. unsigned long *thermal_state,
  2088. int tcdev_id)
  2089. {
  2090. struct icnss_priv *priv = dev_get_drvdata(dev);
  2091. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2092. mutex_lock(&priv->tcdev_lock);
  2093. list_for_each_entry(icnss_tcdev, &priv->icnss_tcdev_list, tcdev_list) {
  2094. if (icnss_tcdev->tcdev_id != tcdev_id)
  2095. continue;
  2096. *thermal_state = icnss_tcdev->curr_thermal_state;
  2097. mutex_unlock(&priv->tcdev_lock);
  2098. icnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  2099. icnss_tcdev->curr_thermal_state, tcdev_id);
  2100. return 0;
  2101. }
  2102. mutex_unlock(&priv->tcdev_lock);
  2103. icnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  2104. return -EINVAL;
  2105. }
  2106. EXPORT_SYMBOL(icnss_get_curr_therm_cdev_state);
  2107. int icnss_qmi_send(struct device *dev, int type, void *cmd,
  2108. int cmd_len, void *cb_ctx,
  2109. int (*cb)(void *ctx, void *event, int event_len))
  2110. {
  2111. struct icnss_priv *priv = icnss_get_plat_priv();
  2112. int ret;
  2113. if (!priv)
  2114. return -ENODEV;
  2115. if (!test_bit(ICNSS_WLFW_CONNECTED, &priv->state))
  2116. return -EINVAL;
  2117. priv->get_info_cb = cb;
  2118. priv->get_info_cb_ctx = cb_ctx;
  2119. ret = icnss_wlfw_get_info_send_sync(priv, type, cmd, cmd_len);
  2120. if (ret) {
  2121. priv->get_info_cb = NULL;
  2122. priv->get_info_cb_ctx = NULL;
  2123. }
  2124. return ret;
  2125. }
  2126. EXPORT_SYMBOL(icnss_qmi_send);
  2127. int __icnss_register_driver(struct icnss_driver_ops *ops,
  2128. struct module *owner, const char *mod_name)
  2129. {
  2130. int ret = 0;
  2131. struct icnss_priv *priv = icnss_get_plat_priv();
  2132. if (!priv || !priv->pdev) {
  2133. ret = -ENODEV;
  2134. goto out;
  2135. }
  2136. icnss_pr_dbg("Registering driver, state: 0x%lx\n", priv->state);
  2137. if (priv->ops) {
  2138. icnss_pr_err("Driver already registered\n");
  2139. ret = -EEXIST;
  2140. goto out;
  2141. }
  2142. if (!icnss_dev_id_match(priv, ops->dev_info)) {
  2143. icnss_pr_err("WLAN driver dev name is %s, not supported by platform driver\n",
  2144. ops->dev_info->name);
  2145. return -ENODEV;
  2146. }
  2147. if (!ops->probe || !ops->remove) {
  2148. ret = -EINVAL;
  2149. goto out;
  2150. }
  2151. ret = icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_REGISTER_DRIVER,
  2152. 0, ops);
  2153. if (ret == -EINTR)
  2154. ret = 0;
  2155. out:
  2156. return ret;
  2157. }
  2158. EXPORT_SYMBOL(__icnss_register_driver);
  2159. int icnss_unregister_driver(struct icnss_driver_ops *ops)
  2160. {
  2161. int ret;
  2162. struct icnss_priv *priv = icnss_get_plat_priv();
  2163. if (!priv || !priv->pdev) {
  2164. ret = -ENODEV;
  2165. goto out;
  2166. }
  2167. icnss_pr_dbg("Unregistering driver, state: 0x%lx\n", priv->state);
  2168. if (!priv->ops) {
  2169. icnss_pr_err("Driver not registered\n");
  2170. ret = -ENOENT;
  2171. goto out;
  2172. }
  2173. ret = icnss_driver_event_post(priv,
  2174. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  2175. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2176. out:
  2177. return ret;
  2178. }
  2179. EXPORT_SYMBOL(icnss_unregister_driver);
  2180. static struct icnss_msi_config msi_config = {
  2181. .total_vectors = 28,
  2182. .total_users = 2,
  2183. .users = (struct icnss_msi_user[]) {
  2184. { .name = "CE", .num_vectors = 10, .base_vector = 0 },
  2185. { .name = "DP", .num_vectors = 18, .base_vector = 10 },
  2186. },
  2187. };
  2188. static int icnss_get_msi_assignment(struct icnss_priv *priv)
  2189. {
  2190. priv->msi_config = &msi_config;
  2191. return 0;
  2192. }
  2193. int icnss_get_user_msi_assignment(struct device *dev, char *user_name,
  2194. int *num_vectors, u32 *user_base_data,
  2195. u32 *base_vector)
  2196. {
  2197. struct icnss_priv *priv = dev_get_drvdata(dev);
  2198. struct icnss_msi_config *msi_config;
  2199. int idx;
  2200. if (!priv)
  2201. return -ENODEV;
  2202. msi_config = priv->msi_config;
  2203. if (!msi_config) {
  2204. icnss_pr_err("MSI is not supported.\n");
  2205. return -EINVAL;
  2206. }
  2207. for (idx = 0; idx < msi_config->total_users; idx++) {
  2208. if (strcmp(user_name, msi_config->users[idx].name) == 0) {
  2209. *num_vectors = msi_config->users[idx].num_vectors;
  2210. *user_base_data = msi_config->users[idx].base_vector
  2211. + priv->msi_base_data;
  2212. *base_vector = msi_config->users[idx].base_vector;
  2213. icnss_pr_dbg("Assign MSI to user: %s, num_vectors: %d, user_base_data: %u, base_vector: %u\n",
  2214. user_name, *num_vectors, *user_base_data,
  2215. *base_vector);
  2216. return 0;
  2217. }
  2218. }
  2219. icnss_pr_err("Failed to find MSI assignment for %s!\n", user_name);
  2220. return -EINVAL;
  2221. }
  2222. EXPORT_SYMBOL(icnss_get_user_msi_assignment);
  2223. int icnss_get_msi_irq(struct device *dev, unsigned int vector)
  2224. {
  2225. struct icnss_priv *priv = dev_get_drvdata(dev);
  2226. int irq_num;
  2227. irq_num = priv->srng_irqs[vector];
  2228. icnss_pr_dbg("Get IRQ number %d for vector index %d\n",
  2229. irq_num, vector);
  2230. return irq_num;
  2231. }
  2232. EXPORT_SYMBOL(icnss_get_msi_irq);
  2233. void icnss_get_msi_address(struct device *dev, u32 *msi_addr_low,
  2234. u32 *msi_addr_high)
  2235. {
  2236. struct icnss_priv *priv = dev_get_drvdata(dev);
  2237. *msi_addr_low = lower_32_bits(priv->msi_addr_iova);
  2238. *msi_addr_high = upper_32_bits(priv->msi_addr_iova);
  2239. }
  2240. EXPORT_SYMBOL(icnss_get_msi_address);
  2241. int icnss_ce_request_irq(struct device *dev, unsigned int ce_id,
  2242. irqreturn_t (*handler)(int, void *),
  2243. unsigned long flags, const char *name, void *ctx)
  2244. {
  2245. int ret = 0;
  2246. unsigned int irq;
  2247. struct ce_irq_list *irq_entry;
  2248. struct icnss_priv *priv = dev_get_drvdata(dev);
  2249. if (!priv || !priv->pdev) {
  2250. ret = -ENODEV;
  2251. goto out;
  2252. }
  2253. icnss_pr_vdbg("CE request IRQ: %d, state: 0x%lx\n", ce_id, priv->state);
  2254. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2255. icnss_pr_err("Invalid CE ID, ce_id: %d\n", ce_id);
  2256. ret = -EINVAL;
  2257. goto out;
  2258. }
  2259. irq = priv->ce_irqs[ce_id];
  2260. irq_entry = &priv->ce_irq_list[ce_id];
  2261. if (irq_entry->handler || irq_entry->irq) {
  2262. icnss_pr_err("IRQ already requested: %d, ce_id: %d\n",
  2263. irq, ce_id);
  2264. ret = -EEXIST;
  2265. goto out;
  2266. }
  2267. ret = request_irq(irq, handler, flags, name, ctx);
  2268. if (ret) {
  2269. icnss_pr_err("IRQ request failed: %d, ce_id: %d, ret: %d\n",
  2270. irq, ce_id, ret);
  2271. goto out;
  2272. }
  2273. irq_entry->irq = irq;
  2274. irq_entry->handler = handler;
  2275. icnss_pr_vdbg("IRQ requested: %d, ce_id: %d\n", irq, ce_id);
  2276. penv->stats.ce_irqs[ce_id].request++;
  2277. out:
  2278. return ret;
  2279. }
  2280. EXPORT_SYMBOL(icnss_ce_request_irq);
  2281. int icnss_ce_free_irq(struct device *dev, unsigned int ce_id, void *ctx)
  2282. {
  2283. int ret = 0;
  2284. unsigned int irq;
  2285. struct ce_irq_list *irq_entry;
  2286. if (!penv || !penv->pdev || !dev) {
  2287. ret = -ENODEV;
  2288. goto out;
  2289. }
  2290. icnss_pr_vdbg("CE free IRQ: %d, state: 0x%lx\n", ce_id, penv->state);
  2291. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2292. icnss_pr_err("Invalid CE ID to free, ce_id: %d\n", ce_id);
  2293. ret = -EINVAL;
  2294. goto out;
  2295. }
  2296. irq = penv->ce_irqs[ce_id];
  2297. irq_entry = &penv->ce_irq_list[ce_id];
  2298. if (!irq_entry->handler || !irq_entry->irq) {
  2299. icnss_pr_err("IRQ not requested: %d, ce_id: %d\n", irq, ce_id);
  2300. ret = -EEXIST;
  2301. goto out;
  2302. }
  2303. free_irq(irq, ctx);
  2304. irq_entry->irq = 0;
  2305. irq_entry->handler = NULL;
  2306. penv->stats.ce_irqs[ce_id].free++;
  2307. out:
  2308. return ret;
  2309. }
  2310. EXPORT_SYMBOL(icnss_ce_free_irq);
  2311. void icnss_enable_irq(struct device *dev, unsigned int ce_id)
  2312. {
  2313. unsigned int irq;
  2314. if (!penv || !penv->pdev || !dev) {
  2315. icnss_pr_err("Platform driver not initialized\n");
  2316. return;
  2317. }
  2318. icnss_pr_vdbg("Enable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2319. penv->state);
  2320. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2321. icnss_pr_err("Invalid CE ID to enable IRQ, ce_id: %d\n", ce_id);
  2322. return;
  2323. }
  2324. penv->stats.ce_irqs[ce_id].enable++;
  2325. irq = penv->ce_irqs[ce_id];
  2326. enable_irq(irq);
  2327. }
  2328. EXPORT_SYMBOL(icnss_enable_irq);
  2329. void icnss_disable_irq(struct device *dev, unsigned int ce_id)
  2330. {
  2331. unsigned int irq;
  2332. if (!penv || !penv->pdev || !dev) {
  2333. icnss_pr_err("Platform driver not initialized\n");
  2334. return;
  2335. }
  2336. icnss_pr_vdbg("Disable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2337. penv->state);
  2338. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2339. icnss_pr_err("Invalid CE ID to disable IRQ, ce_id: %d\n",
  2340. ce_id);
  2341. return;
  2342. }
  2343. irq = penv->ce_irqs[ce_id];
  2344. disable_irq(irq);
  2345. penv->stats.ce_irqs[ce_id].disable++;
  2346. }
  2347. EXPORT_SYMBOL(icnss_disable_irq);
  2348. int icnss_get_soc_info(struct device *dev, struct icnss_soc_info *info)
  2349. {
  2350. char *fw_build_timestamp = NULL;
  2351. struct icnss_priv *priv = dev_get_drvdata(dev);
  2352. if (!priv) {
  2353. icnss_pr_err("Platform driver not initialized\n");
  2354. return -EINVAL;
  2355. }
  2356. info->v_addr = priv->mem_base_va;
  2357. info->p_addr = priv->mem_base_pa;
  2358. info->chip_id = priv->chip_info.chip_id;
  2359. info->chip_family = priv->chip_info.chip_family;
  2360. info->board_id = priv->board_id;
  2361. info->soc_id = priv->soc_id;
  2362. info->fw_version = priv->fw_version_info.fw_version;
  2363. fw_build_timestamp = priv->fw_version_info.fw_build_timestamp;
  2364. fw_build_timestamp[WLFW_MAX_TIMESTAMP_LEN] = '\0';
  2365. strlcpy(info->fw_build_timestamp,
  2366. priv->fw_version_info.fw_build_timestamp,
  2367. WLFW_MAX_TIMESTAMP_LEN + 1);
  2368. return 0;
  2369. }
  2370. EXPORT_SYMBOL(icnss_get_soc_info);
  2371. int icnss_get_mhi_state(struct device *dev)
  2372. {
  2373. struct icnss_priv *priv = dev_get_drvdata(dev);
  2374. if (!priv) {
  2375. icnss_pr_err("Platform driver not initialized\n");
  2376. return -EINVAL;
  2377. }
  2378. if (!priv->mhi_state_info_va)
  2379. return -ENOMEM;
  2380. return ioread32(priv->mhi_state_info_va);
  2381. }
  2382. EXPORT_SYMBOL(icnss_get_mhi_state);
  2383. int icnss_set_fw_log_mode(struct device *dev, uint8_t fw_log_mode)
  2384. {
  2385. int ret;
  2386. struct icnss_priv *priv;
  2387. if (!dev)
  2388. return -ENODEV;
  2389. priv = dev_get_drvdata(dev);
  2390. if (!priv) {
  2391. icnss_pr_err("Platform driver not initialized\n");
  2392. return -EINVAL;
  2393. }
  2394. if (test_bit(ICNSS_FW_DOWN, &penv->state) ||
  2395. !test_bit(ICNSS_FW_READY, &penv->state)) {
  2396. icnss_pr_err("FW down, ignoring fw_log_mode state: 0x%lx\n",
  2397. priv->state);
  2398. return -EINVAL;
  2399. }
  2400. icnss_pr_dbg("FW log mode: %u\n", fw_log_mode);
  2401. ret = wlfw_ini_send_sync_msg(priv, fw_log_mode);
  2402. if (ret)
  2403. icnss_pr_err("Fail to send ini, ret = %d, fw_log_mode: %u\n",
  2404. ret, fw_log_mode);
  2405. return ret;
  2406. }
  2407. EXPORT_SYMBOL(icnss_set_fw_log_mode);
  2408. int icnss_force_wake_request(struct device *dev)
  2409. {
  2410. struct icnss_priv *priv;
  2411. if (!dev)
  2412. return -ENODEV;
  2413. priv = dev_get_drvdata(dev);
  2414. if (!priv) {
  2415. icnss_pr_err("Platform driver not initialized\n");
  2416. return -EINVAL;
  2417. }
  2418. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  2419. icnss_pr_soc_wake("SOC already awake, Ref count: %d",
  2420. atomic_read(&priv->soc_wake_ref_count));
  2421. return 0;
  2422. }
  2423. icnss_pr_soc_wake("Calling SOC Wake request");
  2424. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_REQUEST_EVENT,
  2425. 0, NULL);
  2426. return 0;
  2427. }
  2428. EXPORT_SYMBOL(icnss_force_wake_request);
  2429. int icnss_force_wake_release(struct device *dev)
  2430. {
  2431. struct icnss_priv *priv;
  2432. if (!dev)
  2433. return -ENODEV;
  2434. priv = dev_get_drvdata(dev);
  2435. if (!priv) {
  2436. icnss_pr_err("Platform driver not initialized\n");
  2437. return -EINVAL;
  2438. }
  2439. icnss_pr_soc_wake("Calling SOC Wake response");
  2440. if (atomic_read(&priv->soc_wake_ref_count) &&
  2441. icnss_atomic_dec_if_greater_one(&priv->soc_wake_ref_count)) {
  2442. icnss_pr_soc_wake("SOC previous release pending, Ref count: %d",
  2443. atomic_read(&priv->soc_wake_ref_count));
  2444. return 0;
  2445. }
  2446. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_RELEASE_EVENT,
  2447. 0, NULL);
  2448. return 0;
  2449. }
  2450. EXPORT_SYMBOL(icnss_force_wake_release);
  2451. int icnss_is_device_awake(struct device *dev)
  2452. {
  2453. struct icnss_priv *priv = dev_get_drvdata(dev);
  2454. if (!priv) {
  2455. icnss_pr_err("Platform driver not initialized\n");
  2456. return -EINVAL;
  2457. }
  2458. return atomic_read(&priv->soc_wake_ref_count);
  2459. }
  2460. EXPORT_SYMBOL(icnss_is_device_awake);
  2461. int icnss_is_pci_ep_awake(struct device *dev)
  2462. {
  2463. struct icnss_priv *priv = dev_get_drvdata(dev);
  2464. if (!priv) {
  2465. icnss_pr_err("Platform driver not initialized\n");
  2466. return -EINVAL;
  2467. }
  2468. if (!priv->mhi_state_info_va)
  2469. return -ENOMEM;
  2470. return ioread32(priv->mhi_state_info_va + ICNSS_PCI_EP_WAKE_OFFSET);
  2471. }
  2472. EXPORT_SYMBOL(icnss_is_pci_ep_awake);
  2473. int icnss_athdiag_read(struct device *dev, uint32_t offset,
  2474. uint32_t mem_type, uint32_t data_len,
  2475. uint8_t *output)
  2476. {
  2477. int ret = 0;
  2478. struct icnss_priv *priv = dev_get_drvdata(dev);
  2479. if (priv->magic != ICNSS_MAGIC) {
  2480. icnss_pr_err("Invalid drvdata for diag read: dev %pK, data %pK, magic 0x%x\n",
  2481. dev, priv, priv->magic);
  2482. return -EINVAL;
  2483. }
  2484. if (!output || data_len == 0
  2485. || data_len > WLFW_MAX_DATA_SIZE) {
  2486. icnss_pr_err("Invalid parameters for diag read: output %pK, data_len %u\n",
  2487. output, data_len);
  2488. ret = -EINVAL;
  2489. goto out;
  2490. }
  2491. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2492. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2493. icnss_pr_err("Invalid state for diag read: 0x%lx\n",
  2494. priv->state);
  2495. ret = -EINVAL;
  2496. goto out;
  2497. }
  2498. ret = wlfw_athdiag_read_send_sync_msg(priv, offset, mem_type,
  2499. data_len, output);
  2500. out:
  2501. return ret;
  2502. }
  2503. EXPORT_SYMBOL(icnss_athdiag_read);
  2504. int icnss_athdiag_write(struct device *dev, uint32_t offset,
  2505. uint32_t mem_type, uint32_t data_len,
  2506. uint8_t *input)
  2507. {
  2508. int ret = 0;
  2509. struct icnss_priv *priv = dev_get_drvdata(dev);
  2510. if (priv->magic != ICNSS_MAGIC) {
  2511. icnss_pr_err("Invalid drvdata for diag write: dev %pK, data %pK, magic 0x%x\n",
  2512. dev, priv, priv->magic);
  2513. return -EINVAL;
  2514. }
  2515. if (!input || data_len == 0
  2516. || data_len > WLFW_MAX_DATA_SIZE) {
  2517. icnss_pr_err("Invalid parameters for diag write: input %pK, data_len %u\n",
  2518. input, data_len);
  2519. ret = -EINVAL;
  2520. goto out;
  2521. }
  2522. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2523. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2524. icnss_pr_err("Invalid state for diag write: 0x%lx\n",
  2525. priv->state);
  2526. ret = -EINVAL;
  2527. goto out;
  2528. }
  2529. ret = wlfw_athdiag_write_send_sync_msg(priv, offset, mem_type,
  2530. data_len, input);
  2531. out:
  2532. return ret;
  2533. }
  2534. EXPORT_SYMBOL(icnss_athdiag_write);
  2535. int icnss_wlan_enable(struct device *dev, struct icnss_wlan_enable_cfg *config,
  2536. enum icnss_driver_mode mode,
  2537. const char *host_version)
  2538. {
  2539. struct icnss_priv *priv = dev_get_drvdata(dev);
  2540. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2541. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2542. icnss_pr_err("FW down, ignoring wlan_enable state: 0x%lx\n",
  2543. priv->state);
  2544. return -EINVAL;
  2545. }
  2546. if (test_bit(ICNSS_MODE_ON, &priv->state)) {
  2547. icnss_pr_err("Already Mode on, ignoring wlan_enable state: 0x%lx\n",
  2548. priv->state);
  2549. return -EINVAL;
  2550. }
  2551. if (priv->device_id == WCN6750_DEVICE_ID &&
  2552. !priv->dms.nv_mac_not_prov && !priv->dms.mac_valid)
  2553. icnss_setup_dms_mac(priv);
  2554. return icnss_send_wlan_enable_to_fw(priv, config, mode, host_version);
  2555. }
  2556. EXPORT_SYMBOL(icnss_wlan_enable);
  2557. int icnss_wlan_disable(struct device *dev, enum icnss_driver_mode mode)
  2558. {
  2559. struct icnss_priv *priv = dev_get_drvdata(dev);
  2560. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2561. icnss_pr_dbg("FW down, ignoring wlan_disable state: 0x%lx\n",
  2562. priv->state);
  2563. return 0;
  2564. }
  2565. return icnss_send_wlan_disable_to_fw(priv);
  2566. }
  2567. EXPORT_SYMBOL(icnss_wlan_disable);
  2568. bool icnss_is_qmi_disable(struct device *dev)
  2569. {
  2570. return test_bit(SKIP_QMI, &penv->ctrl_params.quirks) ? true : false;
  2571. }
  2572. EXPORT_SYMBOL(icnss_is_qmi_disable);
  2573. int icnss_get_ce_id(struct device *dev, int irq)
  2574. {
  2575. int i;
  2576. if (!penv || !penv->pdev || !dev)
  2577. return -ENODEV;
  2578. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  2579. if (penv->ce_irqs[i] == irq)
  2580. return i;
  2581. }
  2582. icnss_pr_err("No matching CE id for irq %d\n", irq);
  2583. return -EINVAL;
  2584. }
  2585. EXPORT_SYMBOL(icnss_get_ce_id);
  2586. int icnss_get_irq(struct device *dev, int ce_id)
  2587. {
  2588. int irq;
  2589. if (!penv || !penv->pdev || !dev)
  2590. return -ENODEV;
  2591. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS)
  2592. return -EINVAL;
  2593. irq = penv->ce_irqs[ce_id];
  2594. return irq;
  2595. }
  2596. EXPORT_SYMBOL(icnss_get_irq);
  2597. struct iommu_domain *icnss_smmu_get_domain(struct device *dev)
  2598. {
  2599. struct icnss_priv *priv = dev_get_drvdata(dev);
  2600. if (!priv) {
  2601. icnss_pr_err("Invalid drvdata: dev %pK\n", dev);
  2602. return NULL;
  2603. }
  2604. return priv->iommu_domain;
  2605. }
  2606. EXPORT_SYMBOL(icnss_smmu_get_domain);
  2607. int icnss_smmu_map(struct device *dev,
  2608. phys_addr_t paddr, uint32_t *iova_addr, size_t size)
  2609. {
  2610. struct icnss_priv *priv = dev_get_drvdata(dev);
  2611. int flag = IOMMU_READ | IOMMU_WRITE;
  2612. bool dma_coherent = false;
  2613. unsigned long iova;
  2614. int prop_len = 0;
  2615. size_t len;
  2616. int ret = 0;
  2617. if (!priv) {
  2618. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  2619. dev, priv);
  2620. return -EINVAL;
  2621. }
  2622. if (!iova_addr) {
  2623. icnss_pr_err("iova_addr is NULL, paddr %pa, size %zu\n",
  2624. &paddr, size);
  2625. return -EINVAL;
  2626. }
  2627. len = roundup(size + paddr - rounddown(paddr, PAGE_SIZE), PAGE_SIZE);
  2628. iova = roundup(priv->smmu_iova_ipa_current, PAGE_SIZE);
  2629. if (of_get_property(dev->of_node, "qcom,iommu-geometry", &prop_len) &&
  2630. iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  2631. icnss_pr_err("No IOVA space to map, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  2632. iova,
  2633. &priv->smmu_iova_ipa_start,
  2634. priv->smmu_iova_ipa_len);
  2635. return -ENOMEM;
  2636. }
  2637. dma_coherent = of_property_read_bool(dev->of_node, "dma-coherent");
  2638. icnss_pr_dbg("dma-coherent is %s\n",
  2639. dma_coherent ? "enabled" : "disabled");
  2640. if (dma_coherent)
  2641. flag |= IOMMU_CACHE;
  2642. icnss_pr_dbg("IOMMU Map: iova %lx, len %zu\n", iova, len);
  2643. ret = iommu_map(priv->iommu_domain, iova,
  2644. rounddown(paddr, PAGE_SIZE), len,
  2645. flag);
  2646. if (ret) {
  2647. icnss_pr_err("PA to IOVA mapping failed, ret %d\n", ret);
  2648. return ret;
  2649. }
  2650. priv->smmu_iova_ipa_current = iova + len;
  2651. *iova_addr = (uint32_t)(iova + paddr - rounddown(paddr, PAGE_SIZE));
  2652. icnss_pr_dbg("IOVA addr mapped to physical addr %lx\n", *iova_addr);
  2653. return 0;
  2654. }
  2655. EXPORT_SYMBOL(icnss_smmu_map);
  2656. int icnss_smmu_unmap(struct device *dev,
  2657. uint32_t iova_addr, size_t size)
  2658. {
  2659. struct icnss_priv *priv = dev_get_drvdata(dev);
  2660. unsigned long iova;
  2661. size_t len, unmapped_len;
  2662. if (!priv) {
  2663. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  2664. dev, priv);
  2665. return -EINVAL;
  2666. }
  2667. if (!iova_addr) {
  2668. icnss_pr_err("iova_addr is NULL, size %zu\n",
  2669. size);
  2670. return -EINVAL;
  2671. }
  2672. len = roundup(size + iova_addr - rounddown(iova_addr, PAGE_SIZE),
  2673. PAGE_SIZE);
  2674. iova = rounddown(iova_addr, PAGE_SIZE);
  2675. if (iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  2676. icnss_pr_err("Out of IOVA space during unmap, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  2677. iova,
  2678. &priv->smmu_iova_ipa_start,
  2679. priv->smmu_iova_ipa_len);
  2680. return -ENOMEM;
  2681. }
  2682. icnss_pr_dbg("IOMMU Unmap: iova %lx, len %zu\n",
  2683. iova, len);
  2684. unmapped_len = iommu_unmap(priv->iommu_domain, iova, len);
  2685. if (unmapped_len != len) {
  2686. icnss_pr_err("Failed to unmap, %zu\n", unmapped_len);
  2687. return -EINVAL;
  2688. }
  2689. priv->smmu_iova_ipa_current = iova;
  2690. return 0;
  2691. }
  2692. EXPORT_SYMBOL(icnss_smmu_unmap);
  2693. unsigned int icnss_socinfo_get_serial_number(struct device *dev)
  2694. {
  2695. return socinfo_get_serial_number();
  2696. }
  2697. EXPORT_SYMBOL(icnss_socinfo_get_serial_number);
  2698. int icnss_trigger_recovery(struct device *dev)
  2699. {
  2700. int ret = 0;
  2701. struct icnss_priv *priv = dev_get_drvdata(dev);
  2702. if (priv->magic != ICNSS_MAGIC) {
  2703. icnss_pr_err("Invalid drvdata: magic 0x%x\n", priv->magic);
  2704. ret = -EINVAL;
  2705. goto out;
  2706. }
  2707. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  2708. icnss_pr_err("PD recovery already in progress: state: 0x%lx\n",
  2709. priv->state);
  2710. ret = -EPERM;
  2711. goto out;
  2712. }
  2713. if (priv->device_id == WCN6750_DEVICE_ID) {
  2714. icnss_pr_vdbg("Initiate Root PD restart");
  2715. ret = icnss_send_smp2p(priv, ICNSS_TRIGGER_SSR,
  2716. ICNSS_SMP2P_OUT_POWER_SAVE);
  2717. if (!ret)
  2718. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2719. return ret;
  2720. }
  2721. if (!test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  2722. icnss_pr_err("PD restart not enabled to trigger recovery: state: 0x%lx\n",
  2723. priv->state);
  2724. ret = -EOPNOTSUPP;
  2725. goto out;
  2726. }
  2727. icnss_pr_warn("Initiate PD restart at WLAN FW, state: 0x%lx\n",
  2728. priv->state);
  2729. ret = pdr_restart_pd(priv->pdr_handle, priv->pdr_service);
  2730. if (!ret)
  2731. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2732. out:
  2733. return ret;
  2734. }
  2735. EXPORT_SYMBOL(icnss_trigger_recovery);
  2736. int icnss_idle_shutdown(struct device *dev)
  2737. {
  2738. struct icnss_priv *priv = dev_get_drvdata(dev);
  2739. if (!priv) {
  2740. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  2741. return -EINVAL;
  2742. }
  2743. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  2744. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  2745. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown\n");
  2746. return -EBUSY;
  2747. }
  2748. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  2749. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2750. }
  2751. EXPORT_SYMBOL(icnss_idle_shutdown);
  2752. int icnss_idle_restart(struct device *dev)
  2753. {
  2754. struct icnss_priv *priv = dev_get_drvdata(dev);
  2755. if (!priv) {
  2756. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  2757. return -EINVAL;
  2758. }
  2759. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  2760. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  2761. icnss_pr_err("SSR/PDR is already in-progress during idle restart\n");
  2762. return -EBUSY;
  2763. }
  2764. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_RESTART,
  2765. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2766. }
  2767. EXPORT_SYMBOL(icnss_idle_restart);
  2768. int icnss_exit_power_save(struct device *dev)
  2769. {
  2770. struct icnss_priv *priv = dev_get_drvdata(dev);
  2771. icnss_pr_vdbg("Calling Exit Power Save\n");
  2772. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  2773. !test_bit(ICNSS_MODE_ON, &priv->state))
  2774. return 0;
  2775. return icnss_send_smp2p(priv, ICNSS_POWER_SAVE_EXIT,
  2776. ICNSS_SMP2P_OUT_POWER_SAVE);
  2777. }
  2778. EXPORT_SYMBOL(icnss_exit_power_save);
  2779. int icnss_prevent_l1(struct device *dev)
  2780. {
  2781. struct icnss_priv *priv = dev_get_drvdata(dev);
  2782. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  2783. !test_bit(ICNSS_MODE_ON, &priv->state))
  2784. return 0;
  2785. return icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_EXIT,
  2786. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  2787. }
  2788. EXPORT_SYMBOL(icnss_prevent_l1);
  2789. void icnss_allow_l1(struct device *dev)
  2790. {
  2791. struct icnss_priv *priv = dev_get_drvdata(dev);
  2792. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  2793. !test_bit(ICNSS_MODE_ON, &priv->state))
  2794. return;
  2795. icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_ENTER,
  2796. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  2797. }
  2798. EXPORT_SYMBOL(icnss_allow_l1);
  2799. void icnss_allow_recursive_recovery(struct device *dev)
  2800. {
  2801. struct icnss_priv *priv = dev_get_drvdata(dev);
  2802. priv->allow_recursive_recovery = true;
  2803. icnss_pr_info("Recursive recovery allowed for WLAN\n");
  2804. }
  2805. void icnss_disallow_recursive_recovery(struct device *dev)
  2806. {
  2807. struct icnss_priv *priv = dev_get_drvdata(dev);
  2808. priv->allow_recursive_recovery = false;
  2809. icnss_pr_info("Recursive recovery disallowed for WLAN\n");
  2810. }
  2811. static int icnss_create_shutdown_sysfs(struct icnss_priv *priv)
  2812. {
  2813. struct kobject *icnss_kobject;
  2814. int ret = 0;
  2815. atomic_set(&priv->is_shutdown, false);
  2816. icnss_kobject = kobject_create_and_add("shutdown_wlan", kernel_kobj);
  2817. if (!icnss_kobject) {
  2818. icnss_pr_err("Unable to create shutdown_wlan kernel object");
  2819. return -EINVAL;
  2820. }
  2821. priv->icnss_kobject = icnss_kobject;
  2822. ret = sysfs_create_file(icnss_kobject, &icnss_sysfs_attribute.attr);
  2823. if (ret) {
  2824. icnss_pr_err("Unable to create icnss sysfs file err:%d", ret);
  2825. return ret;
  2826. }
  2827. return ret;
  2828. }
  2829. static void icnss_destroy_shutdown_sysfs(struct icnss_priv *priv)
  2830. {
  2831. struct kobject *icnss_kobject;
  2832. icnss_kobject = priv->icnss_kobject;
  2833. if (icnss_kobject)
  2834. kobject_put(icnss_kobject);
  2835. }
  2836. static ssize_t qdss_tr_start_store(struct device *dev,
  2837. struct device_attribute *attr,
  2838. const char *buf, size_t count)
  2839. {
  2840. struct icnss_priv *priv = dev_get_drvdata(dev);
  2841. wlfw_qdss_trace_start(priv);
  2842. icnss_pr_dbg("Received QDSS start command\n");
  2843. return count;
  2844. }
  2845. static ssize_t qdss_tr_stop_store(struct device *dev,
  2846. struct device_attribute *attr,
  2847. const char *user_buf, size_t count)
  2848. {
  2849. struct icnss_priv *priv = dev_get_drvdata(dev);
  2850. u32 option = 0;
  2851. if (sscanf(user_buf, "%du", &option) != 1)
  2852. return -EINVAL;
  2853. wlfw_qdss_trace_stop(priv, option);
  2854. icnss_pr_dbg("Received QDSS stop command\n");
  2855. return count;
  2856. }
  2857. static ssize_t qdss_conf_download_store(struct device *dev,
  2858. struct device_attribute *attr,
  2859. const char *buf, size_t count)
  2860. {
  2861. struct icnss_priv *priv = dev_get_drvdata(dev);
  2862. icnss_wlfw_qdss_dnld_send_sync(priv);
  2863. icnss_pr_dbg("Received QDSS download config command\n");
  2864. return count;
  2865. }
  2866. static ssize_t hw_trc_override_store(struct device *dev,
  2867. struct device_attribute *attr,
  2868. const char *buf, size_t count)
  2869. {
  2870. struct icnss_priv *priv = dev_get_drvdata(dev);
  2871. int tmp = 0;
  2872. if (sscanf(buf, "%du", &tmp) != 1)
  2873. return -EINVAL;
  2874. priv->hw_trc_override = tmp;
  2875. icnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  2876. return count;
  2877. }
  2878. static void icnss_wpss_load(struct work_struct *wpss_load_work)
  2879. {
  2880. struct icnss_priv *priv = icnss_get_plat_priv();
  2881. phandle rproc_phandle;
  2882. int ret;
  2883. if (of_property_read_u32(priv->pdev->dev.of_node, "qcom,rproc-handle",
  2884. &rproc_phandle)) {
  2885. icnss_pr_err("error reading rproc phandle\n");
  2886. return;
  2887. }
  2888. priv->rproc = rproc_get_by_phandle(rproc_phandle);
  2889. if (IS_ERR_OR_NULL(priv->rproc)) {
  2890. icnss_pr_err("rproc not found");
  2891. return;
  2892. }
  2893. ret = rproc_boot(priv->rproc);
  2894. if (ret) {
  2895. icnss_pr_err("Failed to boot wpss rproc, ret: %d", ret);
  2896. rproc_put(priv->rproc);
  2897. }
  2898. }
  2899. static inline void icnss_wpss_unload(struct icnss_priv *priv)
  2900. {
  2901. if (priv && priv->rproc) {
  2902. rproc_shutdown(priv->rproc);
  2903. rproc_put(priv->rproc);
  2904. priv->rproc = NULL;
  2905. }
  2906. }
  2907. static ssize_t wpss_boot_store(struct device *dev,
  2908. struct device_attribute *attr,
  2909. const char *buf, size_t count)
  2910. {
  2911. struct icnss_priv *priv = dev_get_drvdata(dev);
  2912. int wpss_rproc = 0;
  2913. if (priv->device_id != WCN6750_DEVICE_ID)
  2914. return count;
  2915. if (sscanf(buf, "%du", &wpss_rproc) != 1) {
  2916. icnss_pr_err("Failed to read wpss rproc info");
  2917. return -EINVAL;
  2918. }
  2919. icnss_pr_dbg("WPSS Remote Processor: %s", wpss_rproc ? "GET" : "PUT");
  2920. if (wpss_rproc == 1)
  2921. schedule_work(&wpss_loader);
  2922. else if (wpss_rproc == 0)
  2923. icnss_wpss_unload(priv);
  2924. return count;
  2925. }
  2926. static ssize_t wlan_en_delay_store(struct device *dev,
  2927. struct device_attribute *attr,
  2928. const char *buf, size_t count)
  2929. {
  2930. struct icnss_priv *priv = dev_get_drvdata(dev);
  2931. uint32_t wlan_en_delay = 0;
  2932. if (priv->device_id != WCN6750_DEVICE_ID)
  2933. return count;
  2934. if (sscanf(buf, "%du", &wlan_en_delay) != 1) {
  2935. icnss_pr_err("Failed to read wlan_en_delay");
  2936. return -EINVAL;
  2937. }
  2938. icnss_pr_dbg("WLAN_EN delay: %dms", wlan_en_delay);
  2939. priv->wlan_en_delay_ms = wlan_en_delay;
  2940. return count;
  2941. }
  2942. static DEVICE_ATTR_WO(qdss_tr_start);
  2943. static DEVICE_ATTR_WO(qdss_tr_stop);
  2944. static DEVICE_ATTR_WO(qdss_conf_download);
  2945. static DEVICE_ATTR_WO(hw_trc_override);
  2946. static DEVICE_ATTR_WO(wpss_boot);
  2947. static DEVICE_ATTR_WO(wlan_en_delay);
  2948. static struct attribute *icnss_attrs[] = {
  2949. &dev_attr_qdss_tr_start.attr,
  2950. &dev_attr_qdss_tr_stop.attr,
  2951. &dev_attr_qdss_conf_download.attr,
  2952. &dev_attr_hw_trc_override.attr,
  2953. &dev_attr_wpss_boot.attr,
  2954. &dev_attr_wlan_en_delay.attr,
  2955. NULL,
  2956. };
  2957. static struct attribute_group icnss_attr_group = {
  2958. .attrs = icnss_attrs,
  2959. };
  2960. static int icnss_create_sysfs_link(struct icnss_priv *priv)
  2961. {
  2962. struct device *dev = &priv->pdev->dev;
  2963. int ret;
  2964. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "icnss");
  2965. if (ret) {
  2966. icnss_pr_err("Failed to create icnss link, err = %d\n",
  2967. ret);
  2968. goto out;
  2969. }
  2970. return 0;
  2971. out:
  2972. return ret;
  2973. }
  2974. static void icnss_remove_sysfs_link(struct icnss_priv *priv)
  2975. {
  2976. sysfs_remove_link(kernel_kobj, "icnss");
  2977. }
  2978. static int icnss_sysfs_create(struct icnss_priv *priv)
  2979. {
  2980. int ret = 0;
  2981. ret = devm_device_add_group(&priv->pdev->dev,
  2982. &icnss_attr_group);
  2983. if (ret) {
  2984. icnss_pr_err("Failed to create icnss device group, err = %d\n",
  2985. ret);
  2986. goto out;
  2987. }
  2988. icnss_create_sysfs_link(priv);
  2989. ret = icnss_create_shutdown_sysfs(priv);
  2990. if (ret)
  2991. goto remove_icnss_group;
  2992. return 0;
  2993. remove_icnss_group:
  2994. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  2995. out:
  2996. return ret;
  2997. }
  2998. static void icnss_sysfs_destroy(struct icnss_priv *priv)
  2999. {
  3000. icnss_destroy_shutdown_sysfs(priv);
  3001. icnss_remove_sysfs_link(priv);
  3002. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3003. }
  3004. static int icnss_get_vbatt_info(struct icnss_priv *priv)
  3005. {
  3006. struct adc_tm_chip *adc_tm_dev = NULL;
  3007. struct iio_channel *channel = NULL;
  3008. int ret = 0;
  3009. adc_tm_dev = get_adc_tm(&priv->pdev->dev, "icnss");
  3010. if (PTR_ERR(adc_tm_dev) == -EPROBE_DEFER) {
  3011. icnss_pr_err("adc_tm_dev probe defer\n");
  3012. return -EPROBE_DEFER;
  3013. }
  3014. if (IS_ERR(adc_tm_dev)) {
  3015. ret = PTR_ERR(adc_tm_dev);
  3016. icnss_pr_err("Not able to get ADC dev, VBATT monitoring is disabled: %d\n",
  3017. ret);
  3018. return ret;
  3019. }
  3020. channel = devm_iio_channel_get(&priv->pdev->dev, "icnss");
  3021. if (PTR_ERR(channel) == -EPROBE_DEFER) {
  3022. icnss_pr_err("channel probe defer\n");
  3023. return -EPROBE_DEFER;
  3024. }
  3025. if (IS_ERR(channel)) {
  3026. ret = PTR_ERR(channel);
  3027. icnss_pr_err("Not able to get VADC dev, VBATT monitoring is disabled: %d\n",
  3028. ret);
  3029. return ret;
  3030. }
  3031. priv->adc_tm_dev = adc_tm_dev;
  3032. priv->channel = channel;
  3033. return 0;
  3034. }
  3035. static int icnss_resource_parse(struct icnss_priv *priv)
  3036. {
  3037. int ret = 0, i = 0;
  3038. struct platform_device *pdev = priv->pdev;
  3039. struct device *dev = &pdev->dev;
  3040. struct resource *res;
  3041. u32 int_prop;
  3042. if (of_property_read_bool(pdev->dev.of_node, "qcom,icnss-adc_tm")) {
  3043. ret = icnss_get_vbatt_info(priv);
  3044. if (ret == -EPROBE_DEFER)
  3045. goto out;
  3046. priv->vbatt_supported = true;
  3047. }
  3048. ret = icnss_get_vreg(priv);
  3049. if (ret) {
  3050. icnss_pr_err("Failed to get vreg, err = %d\n", ret);
  3051. goto out;
  3052. }
  3053. ret = icnss_get_clk(priv);
  3054. if (ret) {
  3055. icnss_pr_err("Failed to get clocks, err = %d\n", ret);
  3056. goto put_vreg;
  3057. }
  3058. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  3059. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3060. "membase");
  3061. if (!res) {
  3062. icnss_pr_err("Memory base not found in DT\n");
  3063. ret = -EINVAL;
  3064. goto put_clk;
  3065. }
  3066. priv->mem_base_pa = res->start;
  3067. priv->mem_base_va = devm_ioremap(dev, priv->mem_base_pa,
  3068. resource_size(res));
  3069. if (!priv->mem_base_va) {
  3070. icnss_pr_err("Memory base ioremap failed: phy addr: %pa\n",
  3071. &priv->mem_base_pa);
  3072. ret = -EINVAL;
  3073. goto put_clk;
  3074. }
  3075. icnss_pr_dbg("MEM_BASE pa: %pa, va: 0x%pK\n",
  3076. &priv->mem_base_pa,
  3077. priv->mem_base_va);
  3078. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  3079. res = platform_get_resource(priv->pdev,
  3080. IORESOURCE_IRQ, i);
  3081. if (!res) {
  3082. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3083. ret = -ENODEV;
  3084. goto put_clk;
  3085. } else {
  3086. priv->ce_irqs[i] = res->start;
  3087. }
  3088. }
  3089. } else if (priv->device_id == WCN6750_DEVICE_ID) {
  3090. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3091. "msi_addr");
  3092. if (!res) {
  3093. icnss_pr_err("MSI address not found in DT\n");
  3094. ret = -EINVAL;
  3095. goto put_clk;
  3096. }
  3097. priv->msi_addr_pa = res->start;
  3098. priv->msi_addr_iova = dma_map_resource(dev, priv->msi_addr_pa,
  3099. PAGE_SIZE,
  3100. DMA_FROM_DEVICE, 0);
  3101. if (dma_mapping_error(dev, priv->msi_addr_iova)) {
  3102. icnss_pr_err("MSI: failed to map msi address\n");
  3103. priv->msi_addr_iova = 0;
  3104. ret = -ENOMEM;
  3105. goto put_clk;
  3106. }
  3107. icnss_pr_dbg("MSI Addr pa: %pa, iova: 0x%pK\n",
  3108. &priv->msi_addr_pa,
  3109. priv->msi_addr_iova);
  3110. ret = of_property_read_u32_index(dev->of_node,
  3111. "interrupts",
  3112. 1,
  3113. &int_prop);
  3114. if (ret) {
  3115. icnss_pr_dbg("Read interrupt prop failed");
  3116. goto put_clk;
  3117. }
  3118. priv->msi_base_data = int_prop + 32;
  3119. icnss_pr_dbg(" MSI Base Data: %d, IRQ Index: %d\n",
  3120. priv->msi_base_data, int_prop);
  3121. icnss_get_msi_assignment(priv);
  3122. for (i = 0; i < msi_config.total_vectors; i++) {
  3123. res = platform_get_resource(priv->pdev,
  3124. IORESOURCE_IRQ, i);
  3125. if (!res) {
  3126. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3127. ret = -ENODEV;
  3128. goto put_clk;
  3129. } else {
  3130. priv->srng_irqs[i] = res->start;
  3131. }
  3132. }
  3133. }
  3134. return 0;
  3135. put_clk:
  3136. icnss_put_clk(priv);
  3137. put_vreg:
  3138. icnss_put_vreg(priv);
  3139. out:
  3140. return ret;
  3141. }
  3142. static int icnss_msa_dt_parse(struct icnss_priv *priv)
  3143. {
  3144. int ret = 0;
  3145. struct platform_device *pdev = priv->pdev;
  3146. struct device *dev = &pdev->dev;
  3147. struct device_node *np = NULL;
  3148. u64 prop_size = 0;
  3149. const __be32 *addrp = NULL;
  3150. np = of_parse_phandle(dev->of_node,
  3151. "qcom,wlan-msa-fixed-region", 0);
  3152. if (np) {
  3153. addrp = of_get_address(np, 0, &prop_size, NULL);
  3154. if (!addrp) {
  3155. icnss_pr_err("Failed to get assigned-addresses or property\n");
  3156. ret = -EINVAL;
  3157. of_node_put(np);
  3158. goto out;
  3159. }
  3160. priv->msa_pa = of_translate_address(np, addrp);
  3161. if (priv->msa_pa == OF_BAD_ADDR) {
  3162. icnss_pr_err("Failed to translate MSA PA from device-tree\n");
  3163. ret = -EINVAL;
  3164. of_node_put(np);
  3165. goto out;
  3166. }
  3167. of_node_put(np);
  3168. priv->msa_va = memremap(priv->msa_pa,
  3169. (unsigned long)prop_size, MEMREMAP_WT);
  3170. if (!priv->msa_va) {
  3171. icnss_pr_err("MSA PA ioremap failed: phy addr: %pa\n",
  3172. &priv->msa_pa);
  3173. ret = -EINVAL;
  3174. goto out;
  3175. }
  3176. priv->msa_mem_size = prop_size;
  3177. } else {
  3178. ret = of_property_read_u32(dev->of_node, "qcom,wlan-msa-memory",
  3179. &priv->msa_mem_size);
  3180. if (ret || priv->msa_mem_size == 0) {
  3181. icnss_pr_err("Fail to get MSA Memory Size: %u ret: %d\n",
  3182. priv->msa_mem_size, ret);
  3183. goto out;
  3184. }
  3185. priv->msa_va = dmam_alloc_coherent(&pdev->dev,
  3186. priv->msa_mem_size, &priv->msa_pa, GFP_KERNEL);
  3187. if (!priv->msa_va) {
  3188. icnss_pr_err("DMA alloc failed for MSA\n");
  3189. ret = -ENOMEM;
  3190. goto out;
  3191. }
  3192. }
  3193. icnss_pr_dbg("MSA pa: %pa, MSA va: 0x%pK MSA Memory Size: 0x%x\n",
  3194. &priv->msa_pa, (void *)priv->msa_va, priv->msa_mem_size);
  3195. priv->use_prefix_path = of_property_read_bool(priv->pdev->dev.of_node,
  3196. "qcom,fw-prefix");
  3197. return 0;
  3198. out:
  3199. return ret;
  3200. }
  3201. static int icnss_smmu_fault_handler(struct iommu_domain *domain,
  3202. struct device *dev, unsigned long iova,
  3203. int flags, void *handler_token)
  3204. {
  3205. struct icnss_priv *priv = handler_token;
  3206. struct icnss_uevent_fw_down_data fw_down_data = {0};
  3207. icnss_fatal_err("SMMU fault happened with IOVA 0x%lx\n", iova);
  3208. if (!priv) {
  3209. icnss_pr_err("priv is NULL\n");
  3210. return -ENODEV;
  3211. }
  3212. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  3213. fw_down_data.crashed = true;
  3214. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  3215. &fw_down_data);
  3216. }
  3217. icnss_trigger_recovery(&priv->pdev->dev);
  3218. /* IOMMU driver requires non-zero return value to print debug info. */
  3219. return -EINVAL;
  3220. }
  3221. static int icnss_smmu_dt_parse(struct icnss_priv *priv)
  3222. {
  3223. int ret = 0;
  3224. struct platform_device *pdev = priv->pdev;
  3225. struct device *dev = &pdev->dev;
  3226. const char *iommu_dma_type;
  3227. struct resource *res;
  3228. u32 addr_win[2];
  3229. ret = of_property_read_u32_array(dev->of_node,
  3230. "qcom,iommu-dma-addr-pool",
  3231. addr_win,
  3232. ARRAY_SIZE(addr_win));
  3233. if (ret) {
  3234. icnss_pr_err("SMMU IOVA base not found\n");
  3235. } else {
  3236. priv->smmu_iova_start = addr_win[0];
  3237. priv->smmu_iova_len = addr_win[1];
  3238. icnss_pr_dbg("SMMU IOVA start: %pa, len: %zx\n",
  3239. &priv->smmu_iova_start,
  3240. priv->smmu_iova_len);
  3241. priv->iommu_domain =
  3242. iommu_get_domain_for_dev(&pdev->dev);
  3243. ret = of_property_read_string(dev->of_node, "qcom,iommu-dma",
  3244. &iommu_dma_type);
  3245. if (!ret && !strcmp("fastmap", iommu_dma_type)) {
  3246. icnss_pr_dbg("SMMU S1 stage enabled\n");
  3247. priv->smmu_s1_enable = true;
  3248. if (priv->device_id == WCN6750_DEVICE_ID)
  3249. iommu_set_fault_handler(priv->iommu_domain,
  3250. icnss_smmu_fault_handler,
  3251. priv);
  3252. }
  3253. res = platform_get_resource_byname(pdev,
  3254. IORESOURCE_MEM,
  3255. "smmu_iova_ipa");
  3256. if (!res) {
  3257. icnss_pr_err("SMMU IOVA IPA not found\n");
  3258. } else {
  3259. priv->smmu_iova_ipa_start = res->start;
  3260. priv->smmu_iova_ipa_current = res->start;
  3261. priv->smmu_iova_ipa_len = resource_size(res);
  3262. icnss_pr_dbg("SMMU IOVA IPA start: %pa, len: %zx\n",
  3263. &priv->smmu_iova_ipa_start,
  3264. priv->smmu_iova_ipa_len);
  3265. }
  3266. }
  3267. return 0;
  3268. }
  3269. int icnss_get_iova(struct icnss_priv *priv, u64 *addr, u64 *size)
  3270. {
  3271. if (!priv)
  3272. return -ENODEV;
  3273. if (!priv->smmu_iova_len)
  3274. return -EINVAL;
  3275. *addr = priv->smmu_iova_start;
  3276. *size = priv->smmu_iova_len;
  3277. return 0;
  3278. }
  3279. int icnss_get_iova_ipa(struct icnss_priv *priv, u64 *addr, u64 *size)
  3280. {
  3281. if (!priv)
  3282. return -ENODEV;
  3283. if (!priv->smmu_iova_ipa_len)
  3284. return -EINVAL;
  3285. *addr = priv->smmu_iova_ipa_start;
  3286. *size = priv->smmu_iova_ipa_len;
  3287. return 0;
  3288. }
  3289. void icnss_add_fw_prefix_name(struct icnss_priv *priv, char *prefix_name,
  3290. char *name)
  3291. {
  3292. if (!priv)
  3293. return;
  3294. if (!priv->use_prefix_path) {
  3295. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME, "%s", name);
  3296. return;
  3297. }
  3298. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3299. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3300. ADRASTEA_PATH_PREFIX "%s", name);
  3301. else
  3302. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3303. QCA6750_PATH_PREFIX "%s", name);
  3304. icnss_pr_dbg("File added with prefix: %s\n", prefix_name);
  3305. }
  3306. static const struct platform_device_id icnss_platform_id_table[] = {
  3307. { .name = "wcn6750", .driver_data = WCN6750_DEVICE_ID, },
  3308. { .name = "adrastea", .driver_data = ADRASTEA_DEVICE_ID, },
  3309. { },
  3310. };
  3311. static const struct of_device_id icnss_dt_match[] = {
  3312. {
  3313. .compatible = "qcom,wcn6750",
  3314. .data = (void *)&icnss_platform_id_table[0]},
  3315. {
  3316. .compatible = "qcom,icnss",
  3317. .data = (void *)&icnss_platform_id_table[1]},
  3318. { },
  3319. };
  3320. MODULE_DEVICE_TABLE(of, icnss_dt_match);
  3321. static void icnss_init_control_params(struct icnss_priv *priv)
  3322. {
  3323. priv->ctrl_params.qmi_timeout = WLFW_TIMEOUT;
  3324. priv->ctrl_params.quirks = ICNSS_QUIRKS_DEFAULT;
  3325. priv->ctrl_params.bdf_type = ICNSS_BDF_TYPE_DEFAULT;
  3326. if (of_property_read_bool(priv->pdev->dev.of_node,
  3327. "bdf-download-support"))
  3328. priv->bdf_download_support = true;
  3329. if (priv->bdf_download_support && priv->device_id == ADRASTEA_DEVICE_ID)
  3330. priv->ctrl_params.bdf_type = ICNSS_BDF_BIN;
  3331. }
  3332. static inline void icnss_runtime_pm_init(struct icnss_priv *priv)
  3333. {
  3334. pm_runtime_get_sync(&priv->pdev->dev);
  3335. pm_runtime_forbid(&priv->pdev->dev);
  3336. pm_runtime_set_active(&priv->pdev->dev);
  3337. pm_runtime_enable(&priv->pdev->dev);
  3338. }
  3339. static inline void icnss_runtime_pm_deinit(struct icnss_priv *priv)
  3340. {
  3341. pm_runtime_disable(&priv->pdev->dev);
  3342. pm_runtime_allow(&priv->pdev->dev);
  3343. pm_runtime_put_sync(&priv->pdev->dev);
  3344. }
  3345. static inline bool icnss_use_nv_mac(struct icnss_priv *priv)
  3346. {
  3347. return of_property_read_bool(priv->pdev->dev.of_node,
  3348. "use-nv-mac");
  3349. }
  3350. static void rproc_restart_level_notifier(void *data, struct rproc *rproc)
  3351. {
  3352. struct icnss_subsys_restart_level_data *restart_level_data;
  3353. icnss_pr_info("rproc name: %s recovery disable: %d",
  3354. rproc->name, rproc->recovery_disabled);
  3355. restart_level_data = kzalloc(sizeof(*restart_level_data), GFP_ATOMIC);
  3356. if (!restart_level_data)
  3357. return;
  3358. if (strnstr(rproc->name, "wpss", ICNSS_RPROC_LEN)) {
  3359. if (rproc->recovery_disabled)
  3360. restart_level_data->restart_level = ICNSS_DISABLE_M3_SSR;
  3361. else
  3362. restart_level_data->restart_level = ICNSS_ENABLE_M3_SSR;
  3363. icnss_driver_event_post(penv, ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL,
  3364. 0, restart_level_data);
  3365. }
  3366. }
  3367. static int icnss_probe(struct platform_device *pdev)
  3368. {
  3369. int ret = 0;
  3370. struct device *dev = &pdev->dev;
  3371. struct icnss_priv *priv;
  3372. const struct of_device_id *of_id;
  3373. const struct platform_device_id *device_id;
  3374. if (dev_get_drvdata(dev)) {
  3375. icnss_pr_err("Driver is already initialized\n");
  3376. return -EEXIST;
  3377. }
  3378. of_id = of_match_device(icnss_dt_match, &pdev->dev);
  3379. if (!of_id || !of_id->data) {
  3380. icnss_pr_err("Failed to find of match device!\n");
  3381. ret = -ENODEV;
  3382. goto out_reset_drvdata;
  3383. }
  3384. device_id = of_id->data;
  3385. icnss_pr_dbg("Platform driver probe\n");
  3386. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  3387. if (!priv)
  3388. return -ENOMEM;
  3389. priv->magic = ICNSS_MAGIC;
  3390. dev_set_drvdata(dev, priv);
  3391. priv->pdev = pdev;
  3392. priv->device_id = device_id->driver_data;
  3393. priv->is_chain1_supported = true;
  3394. INIT_LIST_HEAD(&priv->vreg_list);
  3395. INIT_LIST_HEAD(&priv->clk_list);
  3396. icnss_allow_recursive_recovery(dev);
  3397. icnss_init_control_params(priv);
  3398. ret = icnss_resource_parse(priv);
  3399. if (ret)
  3400. goto out_reset_drvdata;
  3401. ret = icnss_msa_dt_parse(priv);
  3402. if (ret)
  3403. goto out_free_resources;
  3404. ret = icnss_smmu_dt_parse(priv);
  3405. if (ret)
  3406. goto out_free_resources;
  3407. spin_lock_init(&priv->event_lock);
  3408. spin_lock_init(&priv->on_off_lock);
  3409. spin_lock_init(&priv->soc_wake_msg_lock);
  3410. mutex_init(&priv->dev_lock);
  3411. mutex_init(&priv->tcdev_lock);
  3412. priv->event_wq = alloc_workqueue("icnss_driver_event", WQ_UNBOUND, 1);
  3413. if (!priv->event_wq) {
  3414. icnss_pr_err("Workqueue creation failed\n");
  3415. ret = -EFAULT;
  3416. goto smmu_cleanup;
  3417. }
  3418. INIT_WORK(&priv->event_work, icnss_driver_event_work);
  3419. INIT_LIST_HEAD(&priv->event_list);
  3420. priv->soc_wake_wq = alloc_workqueue("icnss_soc_wake_event",
  3421. WQ_UNBOUND|WQ_HIGHPRI, 1);
  3422. if (!priv->soc_wake_wq) {
  3423. icnss_pr_err("Soc wake Workqueue creation failed\n");
  3424. ret = -EFAULT;
  3425. goto out_destroy_wq;
  3426. }
  3427. INIT_WORK(&priv->soc_wake_msg_work, icnss_soc_wake_msg_work);
  3428. INIT_LIST_HEAD(&priv->soc_wake_msg_list);
  3429. ret = icnss_register_fw_service(priv);
  3430. if (ret < 0) {
  3431. icnss_pr_err("fw service registration failed: %d\n", ret);
  3432. goto out_destroy_soc_wq;
  3433. }
  3434. icnss_enable_recovery(priv);
  3435. icnss_debugfs_create(priv);
  3436. icnss_sysfs_create(priv);
  3437. ret = device_init_wakeup(&priv->pdev->dev, true);
  3438. if (ret)
  3439. icnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3440. ret);
  3441. icnss_set_plat_priv(priv);
  3442. init_completion(&priv->unblock_shutdown);
  3443. if (priv->device_id == WCN6750_DEVICE_ID) {
  3444. ret = icnss_dms_init(priv);
  3445. if (ret)
  3446. icnss_pr_err("ICNSS DMS init failed %d\n", ret);
  3447. ret = icnss_genl_init();
  3448. if (ret < 0)
  3449. icnss_pr_err("ICNSS genl init failed %d\n", ret);
  3450. init_completion(&priv->smp2p_soc_wake_wait);
  3451. icnss_runtime_pm_init(priv);
  3452. icnss_aop_mbox_init(priv);
  3453. set_bit(ICNSS_COLD_BOOT_CAL, &priv->state);
  3454. priv->bdf_download_support = true;
  3455. priv->use_nv_mac = icnss_use_nv_mac(priv);
  3456. icnss_pr_dbg("NV MAC feature is %s\n",
  3457. priv->use_nv_mac ? "Mandatory":"Not Mandatory");
  3458. INIT_WORK(&wpss_loader, icnss_wpss_load);
  3459. register_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3460. }
  3461. INIT_LIST_HEAD(&priv->icnss_tcdev_list);
  3462. icnss_pr_info("Platform driver probed successfully\n");
  3463. return 0;
  3464. out_destroy_soc_wq:
  3465. destroy_workqueue(priv->soc_wake_wq);
  3466. out_destroy_wq:
  3467. destroy_workqueue(priv->event_wq);
  3468. smmu_cleanup:
  3469. priv->iommu_domain = NULL;
  3470. out_free_resources:
  3471. icnss_put_resources(priv);
  3472. out_reset_drvdata:
  3473. dev_set_drvdata(dev, NULL);
  3474. return ret;
  3475. }
  3476. void icnss_destroy_ramdump_device(struct icnss_ramdump_info *ramdump_info)
  3477. {
  3478. device_unregister(ramdump_info->dev);
  3479. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  3480. kfree(ramdump_info);
  3481. }
  3482. static int icnss_remove(struct platform_device *pdev)
  3483. {
  3484. struct icnss_priv *priv = dev_get_drvdata(&pdev->dev);
  3485. icnss_pr_info("Removing driver: state: 0x%lx\n", priv->state);
  3486. if (priv->device_id == WCN6750_DEVICE_ID) {
  3487. icnss_dms_deinit(priv);
  3488. icnss_genl_exit();
  3489. icnss_runtime_pm_deinit(priv);
  3490. if (!IS_ERR_OR_NULL(priv->mbox_chan))
  3491. mbox_free_channel(priv->mbox_chan);
  3492. unregister_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3493. complete_all(&priv->smp2p_soc_wake_wait);
  3494. }
  3495. device_init_wakeup(&priv->pdev->dev, false);
  3496. icnss_debugfs_destroy(priv);
  3497. icnss_sysfs_destroy(priv);
  3498. complete_all(&priv->unblock_shutdown);
  3499. icnss_destroy_ramdump_device(priv->msa0_dump_dev);
  3500. if (priv->device_id == WCN6750_DEVICE_ID) {
  3501. icnss_wpss_early_ssr_unregister_notifier(priv);
  3502. icnss_wpss_ssr_unregister_notifier(priv);
  3503. rproc_put(priv->rproc);
  3504. icnss_destroy_ramdump_device(priv->m3_dump_phyareg);
  3505. icnss_destroy_ramdump_device(priv->m3_dump_phydbg);
  3506. icnss_destroy_ramdump_device(priv->m3_dump_wmac0reg);
  3507. icnss_destroy_ramdump_device(priv->m3_dump_wcssdbg);
  3508. icnss_destroy_ramdump_device(priv->m3_dump_phyapdmem);
  3509. } else {
  3510. icnss_modem_ssr_unregister_notifier(priv);
  3511. icnss_pdr_unregister_notifier(priv);
  3512. }
  3513. class_destroy(priv->icnss_ramdump_class);
  3514. unregister_chrdev_region(priv->icnss_ramdump_dev, RAMDUMP_NUM_DEVICES);
  3515. icnss_unregister_fw_service(priv);
  3516. if (priv->event_wq)
  3517. destroy_workqueue(priv->event_wq);
  3518. if (priv->soc_wake_wq)
  3519. destroy_workqueue(priv->soc_wake_wq);
  3520. priv->iommu_domain = NULL;
  3521. icnss_hw_power_off(priv);
  3522. icnss_put_resources(priv);
  3523. dev_set_drvdata(&pdev->dev, NULL);
  3524. return 0;
  3525. }
  3526. #ifdef CONFIG_PM_SLEEP
  3527. static int icnss_pm_suspend(struct device *dev)
  3528. {
  3529. struct icnss_priv *priv = dev_get_drvdata(dev);
  3530. int ret = 0;
  3531. if (priv->magic != ICNSS_MAGIC) {
  3532. icnss_pr_err("Invalid drvdata for pm suspend: dev %pK, data %pK, magic 0x%x\n",
  3533. dev, priv, priv->magic);
  3534. return -EINVAL;
  3535. }
  3536. icnss_pr_vdbg("PM Suspend, state: 0x%lx\n", priv->state);
  3537. if (!priv->ops || !priv->ops->pm_suspend ||
  3538. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3539. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3540. return 0;
  3541. ret = priv->ops->pm_suspend(dev);
  3542. if (ret == 0) {
  3543. if (priv->device_id == WCN6750_DEVICE_ID) {
  3544. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3545. !test_bit(ICNSS_MODE_ON, &priv->state))
  3546. return 0;
  3547. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  3548. ICNSS_SMP2P_OUT_POWER_SAVE);
  3549. }
  3550. priv->stats.pm_suspend++;
  3551. set_bit(ICNSS_PM_SUSPEND, &priv->state);
  3552. } else {
  3553. priv->stats.pm_suspend_err++;
  3554. }
  3555. return ret;
  3556. }
  3557. static int icnss_pm_resume(struct device *dev)
  3558. {
  3559. struct icnss_priv *priv = dev_get_drvdata(dev);
  3560. int ret = 0;
  3561. if (priv->magic != ICNSS_MAGIC) {
  3562. icnss_pr_err("Invalid drvdata for pm resume: dev %pK, data %pK, magic 0x%x\n",
  3563. dev, priv, priv->magic);
  3564. return -EINVAL;
  3565. }
  3566. icnss_pr_vdbg("PM resume, state: 0x%lx\n", priv->state);
  3567. if (!priv->ops || !priv->ops->pm_resume ||
  3568. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3569. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3570. goto out;
  3571. ret = priv->ops->pm_resume(dev);
  3572. out:
  3573. if (ret == 0) {
  3574. priv->stats.pm_resume++;
  3575. clear_bit(ICNSS_PM_SUSPEND, &priv->state);
  3576. } else {
  3577. priv->stats.pm_resume_err++;
  3578. }
  3579. return ret;
  3580. }
  3581. static int icnss_pm_suspend_noirq(struct device *dev)
  3582. {
  3583. struct icnss_priv *priv = dev_get_drvdata(dev);
  3584. int ret = 0;
  3585. if (priv->magic != ICNSS_MAGIC) {
  3586. icnss_pr_err("Invalid drvdata for pm suspend_noirq: dev %pK, data %pK, magic 0x%x\n",
  3587. dev, priv, priv->magic);
  3588. return -EINVAL;
  3589. }
  3590. icnss_pr_vdbg("PM suspend_noirq, state: 0x%lx\n", priv->state);
  3591. if (!priv->ops || !priv->ops->suspend_noirq ||
  3592. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3593. goto out;
  3594. ret = priv->ops->suspend_noirq(dev);
  3595. out:
  3596. if (ret == 0) {
  3597. priv->stats.pm_suspend_noirq++;
  3598. set_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  3599. } else {
  3600. priv->stats.pm_suspend_noirq_err++;
  3601. }
  3602. return ret;
  3603. }
  3604. static int icnss_pm_resume_noirq(struct device *dev)
  3605. {
  3606. struct icnss_priv *priv = dev_get_drvdata(dev);
  3607. int ret = 0;
  3608. if (priv->magic != ICNSS_MAGIC) {
  3609. icnss_pr_err("Invalid drvdata for pm resume_noirq: dev %pK, data %pK, magic 0x%x\n",
  3610. dev, priv, priv->magic);
  3611. return -EINVAL;
  3612. }
  3613. icnss_pr_vdbg("PM resume_noirq, state: 0x%lx\n", priv->state);
  3614. if (!priv->ops || !priv->ops->resume_noirq ||
  3615. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3616. goto out;
  3617. ret = priv->ops->resume_noirq(dev);
  3618. out:
  3619. if (ret == 0) {
  3620. priv->stats.pm_resume_noirq++;
  3621. clear_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  3622. } else {
  3623. priv->stats.pm_resume_noirq_err++;
  3624. }
  3625. return ret;
  3626. }
  3627. static int icnss_pm_runtime_suspend(struct device *dev)
  3628. {
  3629. struct icnss_priv *priv = dev_get_drvdata(dev);
  3630. int ret = 0;
  3631. if (priv->device_id != WCN6750_DEVICE_ID) {
  3632. icnss_pr_err("Ignore runtime suspend:\n");
  3633. goto out;
  3634. }
  3635. if (priv->magic != ICNSS_MAGIC) {
  3636. icnss_pr_err("Invalid drvdata for runtime suspend: dev %pK, data %pK, magic 0x%x\n",
  3637. dev, priv, priv->magic);
  3638. return -EINVAL;
  3639. }
  3640. if (!priv->ops || !priv->ops->runtime_suspend ||
  3641. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  3642. goto out;
  3643. icnss_pr_vdbg("Runtime suspend\n");
  3644. ret = priv->ops->runtime_suspend(dev);
  3645. if (!ret) {
  3646. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3647. !test_bit(ICNSS_MODE_ON, &priv->state))
  3648. return 0;
  3649. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  3650. ICNSS_SMP2P_OUT_POWER_SAVE);
  3651. }
  3652. out:
  3653. return ret;
  3654. }
  3655. static int icnss_pm_runtime_resume(struct device *dev)
  3656. {
  3657. struct icnss_priv *priv = dev_get_drvdata(dev);
  3658. int ret = 0;
  3659. if (priv->device_id != WCN6750_DEVICE_ID) {
  3660. icnss_pr_err("Ignore runtime resume:\n");
  3661. goto out;
  3662. }
  3663. if (priv->magic != ICNSS_MAGIC) {
  3664. icnss_pr_err("Invalid drvdata for runtime resume: dev %pK, data %pK, magic 0x%x\n",
  3665. dev, priv, priv->magic);
  3666. return -EINVAL;
  3667. }
  3668. if (!priv->ops || !priv->ops->runtime_resume ||
  3669. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  3670. goto out;
  3671. icnss_pr_vdbg("Runtime resume, state: 0x%lx\n", priv->state);
  3672. ret = priv->ops->runtime_resume(dev);
  3673. out:
  3674. return ret;
  3675. }
  3676. static int icnss_pm_runtime_idle(struct device *dev)
  3677. {
  3678. struct icnss_priv *priv = dev_get_drvdata(dev);
  3679. if (priv->device_id != WCN6750_DEVICE_ID) {
  3680. icnss_pr_err("Ignore runtime idle:\n");
  3681. goto out;
  3682. }
  3683. icnss_pr_vdbg("Runtime idle\n");
  3684. pm_request_autosuspend(dev);
  3685. out:
  3686. return -EBUSY;
  3687. }
  3688. #endif
  3689. static const struct dev_pm_ops icnss_pm_ops = {
  3690. SET_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend,
  3691. icnss_pm_resume)
  3692. SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend_noirq,
  3693. icnss_pm_resume_noirq)
  3694. SET_RUNTIME_PM_OPS(icnss_pm_runtime_suspend, icnss_pm_runtime_resume,
  3695. icnss_pm_runtime_idle)
  3696. };
  3697. static struct platform_driver icnss_driver = {
  3698. .probe = icnss_probe,
  3699. .remove = icnss_remove,
  3700. .driver = {
  3701. .name = "icnss2",
  3702. .pm = &icnss_pm_ops,
  3703. .of_match_table = icnss_dt_match,
  3704. },
  3705. };
  3706. static int __init icnss_initialize(void)
  3707. {
  3708. icnss_debug_init();
  3709. return platform_driver_register(&icnss_driver);
  3710. }
  3711. static void __exit icnss_exit(void)
  3712. {
  3713. platform_driver_unregister(&icnss_driver);
  3714. icnss_debug_deinit();
  3715. }
  3716. module_init(icnss_initialize);
  3717. module_exit(icnss_exit);
  3718. MODULE_LICENSE("GPL v2");
  3719. MODULE_DESCRIPTION("iWCN CORE platform driver");