dp_rx_mon_status.c 32 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122
  1. /*
  2. * Copyright (c) 2017-2019 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_peer.h"
  22. #include "hal_rx.h"
  23. #include "hal_api.h"
  24. #include "qdf_trace.h"
  25. #include "qdf_nbuf.h"
  26. #include "hal_api_mon.h"
  27. #include "dp_rx_mon.h"
  28. #include "dp_internal.h"
  29. #include "qdf_mem.h" /* qdf_mem_malloc,free */
  30. #ifdef FEATURE_PERPKT_INFO
  31. #include "dp_ratetable.h"
  32. #endif
  33. #ifdef WLAN_RX_PKT_CAPTURE_ENH
  34. #include "dp_rx_mon_feature.h"
  35. #else
  36. static QDF_STATUS
  37. dp_rx_handle_enh_capture(struct dp_soc *soc, struct dp_pdev *pdev,
  38. struct hal_rx_ppdu_info *ppdu_info)
  39. {
  40. return QDF_STATUS_SUCCESS;
  41. }
  42. static void
  43. dp_rx_mon_enh_capture_process(struct dp_pdev *pdev, uint32_t tlv_status,
  44. qdf_nbuf_t status_nbuf,
  45. struct hal_rx_ppdu_info *ppdu_info,
  46. bool *nbuf_used,
  47. uint32_t rx_enh_capture_mode)
  48. {
  49. }
  50. #endif
  51. /**
  52. * dp_rx_populate_cdp_indication_ppdu() - Populate cdp rx indication structure
  53. * @pdev: pdev ctx
  54. * @ppdu_info: ppdu info structure from ppdu ring
  55. * @ppdu_nbuf: qdf nbuf abstraction for linux skb
  56. *
  57. * Return: none
  58. */
  59. #ifdef FEATURE_PERPKT_INFO
  60. static inline void
  61. dp_rx_populate_cdp_indication_ppdu(struct dp_pdev *pdev,
  62. struct hal_rx_ppdu_info *ppdu_info,
  63. qdf_nbuf_t ppdu_nbuf)
  64. {
  65. struct dp_peer *peer;
  66. struct dp_soc *soc = pdev->soc;
  67. struct dp_ast_entry *ast_entry;
  68. struct cdp_rx_indication_ppdu *cdp_rx_ppdu;
  69. uint32_t ast_index;
  70. cdp_rx_ppdu = (struct cdp_rx_indication_ppdu *)ppdu_nbuf->data;
  71. cdp_rx_ppdu->first_data_seq_ctrl =
  72. ppdu_info->rx_status.first_data_seq_ctrl;
  73. cdp_rx_ppdu->frame_ctrl =
  74. ppdu_info->rx_status.frame_control;
  75. cdp_rx_ppdu->ppdu_id = ppdu_info->com_info.ppdu_id;
  76. cdp_rx_ppdu->length = ppdu_info->rx_status.ppdu_len;
  77. cdp_rx_ppdu->duration = ppdu_info->rx_status.duration;
  78. cdp_rx_ppdu->u.bw = ppdu_info->rx_status.bw;
  79. cdp_rx_ppdu->tcp_msdu_count = ppdu_info->rx_status.tcp_msdu_count;
  80. cdp_rx_ppdu->udp_msdu_count = ppdu_info->rx_status.udp_msdu_count;
  81. cdp_rx_ppdu->other_msdu_count = ppdu_info->rx_status.other_msdu_count;
  82. cdp_rx_ppdu->u.nss = ppdu_info->rx_status.nss;
  83. cdp_rx_ppdu->u.mcs = ppdu_info->rx_status.mcs;
  84. if ((ppdu_info->rx_status.sgi == VHT_SGI_NYSM) &&
  85. (ppdu_info->rx_status.preamble_type == HAL_RX_PKT_TYPE_11AC))
  86. cdp_rx_ppdu->u.gi = CDP_SGI_0_4_US;
  87. else
  88. cdp_rx_ppdu->u.gi = ppdu_info->rx_status.sgi;
  89. cdp_rx_ppdu->u.ldpc = ppdu_info->rx_status.ldpc;
  90. cdp_rx_ppdu->u.preamble = ppdu_info->rx_status.preamble_type;
  91. cdp_rx_ppdu->u.ppdu_type = ppdu_info->rx_status.reception_type;
  92. cdp_rx_ppdu->u.ltf_size = (ppdu_info->rx_status.he_data5 >>
  93. QDF_MON_STATUS_HE_LTF_SIZE_SHIFT) & 0x3;
  94. cdp_rx_ppdu->num_mpdu = ppdu_info->com_info.mpdu_cnt_fcs_ok;
  95. cdp_rx_ppdu->rssi = ppdu_info->rx_status.rssi_comb;
  96. cdp_rx_ppdu->timestamp = ppdu_info->rx_status.tsft;
  97. cdp_rx_ppdu->channel = ppdu_info->rx_status.chan_num;
  98. cdp_rx_ppdu->beamformed = ppdu_info->rx_status.beamformed;
  99. cdp_rx_ppdu->num_msdu = (cdp_rx_ppdu->tcp_msdu_count +
  100. cdp_rx_ppdu->udp_msdu_count +
  101. cdp_rx_ppdu->other_msdu_count);
  102. cdp_rx_ppdu->num_bytes = ppdu_info->rx_status.ppdu_len;
  103. cdp_rx_ppdu->retries = CDP_FC_IS_RETRY_SET(cdp_rx_ppdu->frame_ctrl) ?
  104. ppdu_info->com_info.mpdu_cnt_fcs_ok : 0;
  105. if (ppdu_info->com_info.mpdu_cnt_fcs_ok > 1)
  106. cdp_rx_ppdu->is_ampdu = 1;
  107. else
  108. cdp_rx_ppdu->is_ampdu = 0;
  109. cdp_rx_ppdu->tid = ppdu_info->rx_status.tid;
  110. cdp_rx_ppdu->lsig_a = ppdu_info->rx_status.rate;
  111. ast_index = ppdu_info->rx_status.ast_index;
  112. if (ast_index >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx)) {
  113. cdp_rx_ppdu->peer_id = HTT_INVALID_PEER;
  114. return;
  115. }
  116. ast_entry = soc->ast_table[ast_index];
  117. if (!ast_entry) {
  118. cdp_rx_ppdu->peer_id = HTT_INVALID_PEER;
  119. return;
  120. }
  121. peer = ast_entry->peer;
  122. if (!peer || peer->peer_ids[0] == HTT_INVALID_PEER) {
  123. cdp_rx_ppdu->peer_id = HTT_INVALID_PEER;
  124. return;
  125. }
  126. qdf_mem_copy(cdp_rx_ppdu->mac_addr,
  127. peer->mac_addr.raw, QDF_MAC_ADDR_SIZE);
  128. cdp_rx_ppdu->peer_id = peer->peer_ids[0];
  129. cdp_rx_ppdu->vdev_id = peer->vdev->vdev_id;
  130. cdp_rx_ppdu->u.ltf_size = ppdu_info->rx_status.ltf_size;
  131. }
  132. #else
  133. static inline void
  134. dp_rx_populate_cdp_indication_ppdu(struct dp_pdev *pdev,
  135. struct hal_rx_ppdu_info *ppdu_info,
  136. qdf_nbuf_t ppdu_nbuf)
  137. {
  138. }
  139. #endif
  140. /**
  141. * dp_rx_stats_update() - Update per-peer statistics
  142. * @soc: Datapath SOC handle
  143. * @peer: Datapath peer handle
  144. * @ppdu: PPDU Descriptor
  145. *
  146. * Return: None
  147. */
  148. #ifdef FEATURE_PERPKT_INFO
  149. static inline void dp_rx_rate_stats_update(struct dp_peer *peer,
  150. struct cdp_rx_indication_ppdu *ppdu)
  151. {
  152. uint32_t ratekbps = 0;
  153. uint32_t ppdu_rx_rate = 0;
  154. uint32_t nss = 0;
  155. uint32_t rix;
  156. if (!peer || !ppdu)
  157. return;
  158. if (ppdu->u.nss == 0)
  159. nss = 0;
  160. else
  161. nss = ppdu->u.nss - 1;
  162. ratekbps = dp_getrateindex(ppdu->u.gi,
  163. ppdu->u.mcs,
  164. nss,
  165. ppdu->u.preamble,
  166. ppdu->u.bw,
  167. &rix);
  168. if (!ratekbps)
  169. return;
  170. ppdu->rix = rix;
  171. DP_STATS_UPD(peer, rx.last_rx_rate, ratekbps);
  172. dp_ath_rate_lpf(peer->stats.rx.avg_rx_rate, ratekbps);
  173. ppdu_rx_rate = dp_ath_rate_out(peer->stats.rx.avg_rx_rate);
  174. DP_STATS_UPD(peer, rx.rnd_avg_rx_rate, ppdu_rx_rate);
  175. ppdu->rx_ratekbps = ratekbps;
  176. if (peer->vdev)
  177. peer->vdev->stats.rx.last_rx_rate = ratekbps;
  178. }
  179. static void dp_rx_stats_update(struct dp_pdev *pdev, struct dp_peer *peer,
  180. struct cdp_rx_indication_ppdu *ppdu)
  181. {
  182. struct dp_soc *soc = NULL;
  183. uint8_t mcs, preamble, ac = 0;
  184. uint16_t num_msdu;
  185. bool is_invalid_peer = false;
  186. mcs = ppdu->u.mcs;
  187. preamble = ppdu->u.preamble;
  188. num_msdu = ppdu->num_msdu;
  189. if (pdev)
  190. soc = pdev->soc;
  191. else
  192. return;
  193. if (!peer) {
  194. is_invalid_peer = true;
  195. peer = pdev->invalid_peer;
  196. }
  197. if (!soc || soc->process_rx_status)
  198. return;
  199. DP_STATS_UPD(peer, rx.rssi, ppdu->rssi);
  200. if (peer->stats.rx.avg_rssi == INVALID_RSSI)
  201. peer->stats.rx.avg_rssi = ppdu->rssi;
  202. else
  203. peer->stats.rx.avg_rssi =
  204. DP_GET_AVG_RSSI(peer->stats.rx.avg_rssi, ppdu->rssi);
  205. if ((preamble == DOT11_A) || (preamble == DOT11_B))
  206. ppdu->u.nss = 1;
  207. if (ppdu->u.nss)
  208. DP_STATS_INC(peer, rx.nss[ppdu->u.nss - 1], num_msdu);
  209. DP_STATS_INC(peer, rx.sgi_count[ppdu->u.gi], num_msdu);
  210. DP_STATS_INC(peer, rx.bw[ppdu->u.bw], num_msdu);
  211. DP_STATS_INC(peer, rx.reception_type[ppdu->u.ppdu_type], num_msdu);
  212. DP_STATS_INCC(peer, rx.ampdu_cnt, num_msdu, ppdu->is_ampdu);
  213. DP_STATS_INCC(peer, rx.non_ampdu_cnt, num_msdu, !(ppdu->is_ampdu));
  214. DP_STATS_UPD(peer, rx.rx_rate, mcs);
  215. DP_STATS_INCC(peer,
  216. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  217. ((mcs >= MAX_MCS_11A) && (preamble == DOT11_A)));
  218. DP_STATS_INCC(peer,
  219. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  220. ((mcs < MAX_MCS_11A) && (preamble == DOT11_A)));
  221. DP_STATS_INCC(peer,
  222. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  223. ((mcs >= MAX_MCS_11B) && (preamble == DOT11_B)));
  224. DP_STATS_INCC(peer,
  225. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  226. ((mcs < MAX_MCS_11B) && (preamble == DOT11_B)));
  227. DP_STATS_INCC(peer,
  228. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  229. ((mcs >= MAX_MCS_11A) && (preamble == DOT11_N)));
  230. DP_STATS_INCC(peer,
  231. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  232. ((mcs < MAX_MCS_11A) && (preamble == DOT11_N)));
  233. DP_STATS_INCC(peer,
  234. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  235. ((mcs >= MAX_MCS_11AC) && (preamble == DOT11_AC)));
  236. DP_STATS_INCC(peer,
  237. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  238. ((mcs < MAX_MCS_11AC) && (preamble == DOT11_AC)));
  239. DP_STATS_INCC(peer,
  240. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  241. ((mcs >= (MAX_MCS - 1)) && (preamble == DOT11_AX)));
  242. DP_STATS_INCC(peer,
  243. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  244. ((mcs < (MAX_MCS - 1)) && (preamble == DOT11_AX)));
  245. /*
  246. * If invalid TID, it could be a non-qos frame, hence do not update
  247. * any AC counters
  248. */
  249. ac = TID_TO_WME_AC(ppdu->tid);
  250. if (ppdu->tid != HAL_TID_INVALID)
  251. DP_STATS_INC(peer, rx.wme_ac_type[ac], num_msdu);
  252. dp_peer_stats_notify(peer);
  253. DP_STATS_UPD(peer, rx.last_rssi, ppdu->rssi);
  254. if (is_invalid_peer)
  255. return;
  256. if (dp_is_subtype_data(ppdu->frame_ctrl))
  257. dp_rx_rate_stats_update(peer, ppdu);
  258. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  259. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, pdev->soc,
  260. &peer->stats, ppdu->peer_id,
  261. UPDATE_PEER_STATS, pdev->pdev_id);
  262. #endif
  263. }
  264. #endif
  265. /**
  266. * dp_rx_handle_mcopy_mode() - Allocate and deliver first MSDU payload
  267. * @soc: core txrx main context
  268. * @pdev: pdev strcuture
  269. * @ppdu_info: structure for rx ppdu ring
  270. *
  271. * Return: QDF_STATUS_SUCCESS - If nbuf to be freed by caller
  272. * QDF_STATUS_E_ALREADY - If nbuf not to be freed by caller
  273. */
  274. #ifdef FEATURE_PERPKT_INFO
  275. static inline QDF_STATUS
  276. dp_rx_handle_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  277. struct hal_rx_ppdu_info *ppdu_info, qdf_nbuf_t nbuf)
  278. {
  279. uint8_t size = 0;
  280. struct ieee80211_frame *wh;
  281. uint32_t *nbuf_data;
  282. if (!ppdu_info->msdu_info.first_msdu_payload)
  283. return QDF_STATUS_SUCCESS;
  284. if (pdev->m_copy_id.rx_ppdu_id == ppdu_info->com_info.ppdu_id)
  285. return QDF_STATUS_SUCCESS;
  286. pdev->m_copy_id.rx_ppdu_id = ppdu_info->com_info.ppdu_id;
  287. wh = (struct ieee80211_frame *)(ppdu_info->msdu_info.first_msdu_payload
  288. + 4);
  289. size = (ppdu_info->msdu_info.first_msdu_payload -
  290. qdf_nbuf_data(nbuf));
  291. ppdu_info->msdu_info.first_msdu_payload = NULL;
  292. if (qdf_nbuf_pull_head(nbuf, size) == NULL)
  293. return QDF_STATUS_SUCCESS;
  294. if (((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
  295. IEEE80211_FC0_TYPE_MGT) ||
  296. ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
  297. IEEE80211_FC0_TYPE_CTL)) {
  298. return QDF_STATUS_SUCCESS;
  299. }
  300. nbuf_data = (uint32_t *)qdf_nbuf_data(nbuf);
  301. *nbuf_data = pdev->ppdu_info.com_info.ppdu_id;
  302. /* only retain RX MSDU payload in the skb */
  303. qdf_nbuf_trim_tail(nbuf, qdf_nbuf_len(nbuf) -
  304. ppdu_info->msdu_info.payload_len);
  305. dp_wdi_event_handler(WDI_EVENT_RX_DATA, soc,
  306. nbuf, HTT_INVALID_PEER, WDI_NO_VAL, pdev->pdev_id);
  307. return QDF_STATUS_E_ALREADY;
  308. }
  309. #else
  310. static inline QDF_STATUS
  311. dp_rx_handle_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  312. struct hal_rx_ppdu_info *ppdu_info, qdf_nbuf_t nbuf)
  313. {
  314. return QDF_STATUS_SUCCESS;
  315. }
  316. #endif
  317. /**
  318. * dp_rx_handle_smart_mesh_mode() - Deliver header for smart mesh
  319. * @soc: Datapath SOC handle
  320. * @pdev: Datapath PDEV handle
  321. * @ppdu_info: Structure for rx ppdu info
  322. * @nbuf: Qdf nbuf abstraction for linux skb
  323. *
  324. * Return: 0 on success, 1 on failure
  325. */
  326. static inline int
  327. dp_rx_handle_smart_mesh_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  328. struct hal_rx_ppdu_info *ppdu_info,
  329. qdf_nbuf_t nbuf)
  330. {
  331. uint8_t size = 0;
  332. if (!pdev->monitor_vdev) {
  333. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  334. "[%s]:[%d] Monitor vdev is NULL !!",
  335. __func__, __LINE__);
  336. return 1;
  337. }
  338. if (!ppdu_info->msdu_info.first_msdu_payload) {
  339. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  340. "[%s]:[%d] First msdu payload not present",
  341. __func__, __LINE__);
  342. return 1;
  343. }
  344. /* Adding 4 bytes to get to start of 802.11 frame after phy_ppdu_id */
  345. size = (ppdu_info->msdu_info.first_msdu_payload -
  346. qdf_nbuf_data(nbuf)) + 4;
  347. ppdu_info->msdu_info.first_msdu_payload = NULL;
  348. if (qdf_nbuf_pull_head(nbuf, size) == NULL) {
  349. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  350. "[%s]:[%d] No header present",
  351. __func__, __LINE__);
  352. return 1;
  353. }
  354. /* Only retain RX MSDU payload in the skb */
  355. qdf_nbuf_trim_tail(nbuf, qdf_nbuf_len(nbuf) -
  356. ppdu_info->msdu_info.payload_len);
  357. qdf_nbuf_update_radiotap(&(pdev->ppdu_info.rx_status),
  358. nbuf, sizeof(struct rx_pkt_tlvs));
  359. pdev->monitor_vdev->osif_rx_mon(pdev->monitor_vdev->osif_vdev,
  360. nbuf, NULL);
  361. pdev->ppdu_info.rx_status.monitor_direct_used = 0;
  362. return 0;
  363. }
  364. /**
  365. * dp_rx_handle_ppdu_stats() - Allocate and deliver ppdu stats to cdp layer
  366. * @soc: core txrx main context
  367. * @pdev: pdev strcuture
  368. * @ppdu_info: structure for rx ppdu ring
  369. *
  370. * Return: none
  371. */
  372. #ifdef FEATURE_PERPKT_INFO
  373. static inline void
  374. dp_rx_handle_ppdu_stats(struct dp_soc *soc, struct dp_pdev *pdev,
  375. struct hal_rx_ppdu_info *ppdu_info)
  376. {
  377. qdf_nbuf_t ppdu_nbuf;
  378. struct dp_peer *peer;
  379. struct cdp_rx_indication_ppdu *cdp_rx_ppdu;
  380. /*
  381. * Do not allocate if fcs error,
  382. * ast idx invalid / fctl invalid
  383. */
  384. if (ppdu_info->com_info.mpdu_cnt_fcs_ok == 0)
  385. return;
  386. if (ppdu_info->nac_info.fc_valid &&
  387. ppdu_info->nac_info.to_ds_flag &&
  388. ppdu_info->nac_info.mac_addr2_valid) {
  389. struct dp_neighbour_peer *peer = NULL;
  390. uint8_t rssi = ppdu_info->rx_status.rssi_comb;
  391. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  392. if (pdev->neighbour_peers_added) {
  393. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  394. neighbour_peer_list_elem) {
  395. if (!qdf_mem_cmp(&peer->neighbour_peers_macaddr,
  396. &ppdu_info->nac_info.mac_addr2,
  397. QDF_MAC_ADDR_SIZE)) {
  398. peer->rssi = rssi;
  399. break;
  400. }
  401. }
  402. }
  403. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  404. }
  405. /* need not generate wdi event when mcopy and
  406. * enhanced stats are not enabled
  407. */
  408. if (!pdev->mcopy_mode && !pdev->enhanced_stats_en)
  409. return;
  410. if (!pdev->mcopy_mode) {
  411. if (!ppdu_info->rx_status.frame_control_info_valid)
  412. return;
  413. if (ppdu_info->rx_status.ast_index == HAL_AST_IDX_INVALID)
  414. return;
  415. }
  416. ppdu_nbuf = qdf_nbuf_alloc(soc->osdev,
  417. sizeof(struct cdp_rx_indication_ppdu), 0, 0, FALSE);
  418. if (ppdu_nbuf) {
  419. dp_rx_populate_cdp_indication_ppdu(pdev, ppdu_info, ppdu_nbuf);
  420. qdf_nbuf_put_tail(ppdu_nbuf,
  421. sizeof(struct cdp_rx_indication_ppdu));
  422. cdp_rx_ppdu = (struct cdp_rx_indication_ppdu *)ppdu_nbuf->data;
  423. peer = dp_peer_find_by_id(soc, cdp_rx_ppdu->peer_id);
  424. if (peer) {
  425. cdp_rx_ppdu->cookie = (void *)peer->wlanstats_ctx;
  426. dp_rx_stats_update(pdev, peer, cdp_rx_ppdu);
  427. dp_peer_unref_del_find_by_id(peer);
  428. }
  429. if (cdp_rx_ppdu->peer_id != HTT_INVALID_PEER) {
  430. dp_wdi_event_handler(WDI_EVENT_RX_PPDU_DESC,
  431. soc, ppdu_nbuf,
  432. cdp_rx_ppdu->peer_id,
  433. WDI_NO_VAL, pdev->pdev_id);
  434. } else if (pdev->mcopy_mode) {
  435. dp_wdi_event_handler(WDI_EVENT_RX_PPDU_DESC, soc,
  436. ppdu_nbuf, HTT_INVALID_PEER,
  437. WDI_NO_VAL, pdev->pdev_id);
  438. } else {
  439. qdf_nbuf_free(ppdu_nbuf);
  440. }
  441. }
  442. }
  443. #else
  444. static inline void
  445. dp_rx_handle_ppdu_stats(struct dp_soc *soc, struct dp_pdev *pdev,
  446. struct hal_rx_ppdu_info *ppdu_info)
  447. {
  448. }
  449. #endif
  450. /**
  451. * dp_rx_process_peer_based_pktlog() - Process Rx pktlog if peer based
  452. * filtering enabled
  453. * @soc: core txrx main context
  454. * @ppdu_info: Structure for rx ppdu info
  455. * @status_nbuf: Qdf nbuf abstraction for linux skb
  456. * @mac_id: mac_id/pdev_id correspondinggly for MCL and WIN
  457. *
  458. * Return: none
  459. */
  460. static inline void
  461. dp_rx_process_peer_based_pktlog(struct dp_soc *soc,
  462. struct hal_rx_ppdu_info *ppdu_info,
  463. qdf_nbuf_t status_nbuf, uint32_t mac_id)
  464. {
  465. struct dp_peer *peer;
  466. struct dp_ast_entry *ast_entry;
  467. uint32_t ast_index;
  468. ast_index = ppdu_info->rx_status.ast_index;
  469. if (ast_index < (WLAN_UMAC_PSOC_MAX_PEERS * 2)) {
  470. ast_entry = soc->ast_table[ast_index];
  471. if (ast_entry) {
  472. peer = ast_entry->peer;
  473. if (peer && (peer->peer_ids[0] != HTT_INVALID_PEER)) {
  474. if (peer->peer_based_pktlog_filter) {
  475. dp_wdi_event_handler(
  476. WDI_EVENT_RX_DESC, soc,
  477. status_nbuf,
  478. peer->peer_ids[0],
  479. WDI_NO_VAL, mac_id);
  480. }
  481. }
  482. }
  483. }
  484. }
  485. /**
  486. * dp_rx_mon_status_process_tlv() - Process status TLV in status
  487. * buffer on Rx status Queue posted by status SRNG processing.
  488. * @soc: core txrx main context
  489. * @mac_id: mac_id which is one of 3 mac_ids _ring
  490. *
  491. * Return: none
  492. */
  493. static inline void
  494. dp_rx_mon_status_process_tlv(struct dp_soc *soc, uint32_t mac_id,
  495. uint32_t quota)
  496. {
  497. struct dp_pdev *pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  498. struct hal_rx_ppdu_info *ppdu_info;
  499. qdf_nbuf_t status_nbuf;
  500. uint8_t *rx_tlv;
  501. uint8_t *rx_tlv_start;
  502. uint32_t tlv_status = HAL_TLV_STATUS_BUF_DONE;
  503. QDF_STATUS m_copy_status = QDF_STATUS_SUCCESS;
  504. QDF_STATUS enh_log_status = QDF_STATUS_SUCCESS;
  505. struct cdp_pdev_mon_stats *rx_mon_stats;
  506. int smart_mesh_status;
  507. enum WDI_EVENT pktlog_mode = WDI_NO_VAL;
  508. bool nbuf_used;
  509. uint32_t rx_enh_capture_mode;
  510. ppdu_info = &pdev->ppdu_info;
  511. rx_mon_stats = &pdev->rx_mon_stats;
  512. if (pdev->mon_ppdu_status != DP_PPDU_STATUS_START)
  513. return;
  514. rx_enh_capture_mode = pdev->rx_enh_capture_mode;
  515. while (!qdf_nbuf_is_queue_empty(&pdev->rx_status_q)) {
  516. status_nbuf = qdf_nbuf_queue_remove(&pdev->rx_status_q);
  517. rx_tlv = qdf_nbuf_data(status_nbuf);
  518. rx_tlv_start = rx_tlv;
  519. nbuf_used = false;
  520. if ((pdev->monitor_vdev) || (pdev->enhanced_stats_en) ||
  521. pdev->mcopy_mode ||
  522. (rx_enh_capture_mode != CDP_RX_ENH_CAPTURE_DISABLED)) {
  523. do {
  524. tlv_status = hal_rx_status_get_tlv_info(rx_tlv,
  525. ppdu_info, pdev->soc->hal_soc);
  526. dp_rx_mon_update_dbg_ppdu_stats(ppdu_info,
  527. rx_mon_stats);
  528. dp_rx_mon_enh_capture_process(pdev, tlv_status,
  529. status_nbuf, ppdu_info,
  530. &nbuf_used, rx_enh_capture_mode);
  531. rx_tlv = hal_rx_status_get_next_tlv(rx_tlv);
  532. if ((rx_tlv - rx_tlv_start) >= RX_BUFFER_SIZE)
  533. break;
  534. } while ((tlv_status == HAL_TLV_STATUS_PPDU_NOT_DONE) ||
  535. (tlv_status == HAL_TLV_STATUS_HEADER) ||
  536. (tlv_status == HAL_TLV_STATUS_MPDU_END));
  537. }
  538. if (pdev->dp_peer_based_pktlog) {
  539. dp_rx_process_peer_based_pktlog(soc, ppdu_info,
  540. status_nbuf, mac_id);
  541. } else {
  542. if (pdev->rx_pktlog_mode == DP_RX_PKTLOG_FULL)
  543. pktlog_mode = WDI_EVENT_RX_DESC;
  544. else if (pdev->rx_pktlog_mode == DP_RX_PKTLOG_LITE)
  545. pktlog_mode = WDI_EVENT_LITE_RX;
  546. if (pktlog_mode != WDI_NO_VAL)
  547. dp_wdi_event_handler(pktlog_mode, soc,
  548. status_nbuf,
  549. HTT_INVALID_PEER,
  550. WDI_NO_VAL, mac_id);
  551. }
  552. /* smart monitor vap and m_copy cannot co-exist */
  553. if (ppdu_info->rx_status.monitor_direct_used && pdev->neighbour_peers_added
  554. && pdev->monitor_vdev) {
  555. smart_mesh_status = dp_rx_handle_smart_mesh_mode(soc,
  556. pdev, ppdu_info, status_nbuf);
  557. if (smart_mesh_status)
  558. qdf_nbuf_free(status_nbuf);
  559. } else if (pdev->mcopy_mode) {
  560. m_copy_status = dp_rx_handle_mcopy_mode(soc,
  561. pdev, ppdu_info, status_nbuf);
  562. if (m_copy_status == QDF_STATUS_SUCCESS)
  563. qdf_nbuf_free(status_nbuf);
  564. } else if (rx_enh_capture_mode != CDP_RX_ENH_CAPTURE_DISABLED) {
  565. if (!nbuf_used)
  566. qdf_nbuf_free(status_nbuf);
  567. if (tlv_status == HAL_TLV_STATUS_PPDU_DONE)
  568. enh_log_status =
  569. dp_rx_handle_enh_capture(soc,
  570. pdev, ppdu_info);
  571. } else {
  572. qdf_nbuf_free(status_nbuf);
  573. }
  574. if (tlv_status == HAL_TLV_STATUS_PPDU_NON_STD_DONE) {
  575. dp_rx_mon_deliver_non_std(soc, mac_id);
  576. } else if (tlv_status == HAL_TLV_STATUS_PPDU_DONE) {
  577. rx_mon_stats->status_ppdu_done++;
  578. if (pdev->enhanced_stats_en ||
  579. pdev->mcopy_mode || pdev->neighbour_peers_added)
  580. dp_rx_handle_ppdu_stats(soc, pdev, ppdu_info);
  581. pdev->mon_ppdu_status = DP_PPDU_STATUS_DONE;
  582. dp_rx_mon_dest_process(soc, mac_id, quota);
  583. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  584. }
  585. }
  586. return;
  587. }
  588. /*
  589. * dp_rx_mon_status_srng_process() - Process monitor status ring
  590. * post the status ring buffer to Rx status Queue for later
  591. * processing when status ring is filled with status TLV.
  592. * Allocate a new buffer to status ring if the filled buffer
  593. * is posted.
  594. *
  595. * @soc: core txrx main context
  596. * @mac_id: mac_id which is one of 3 mac_ids
  597. * @quota: No. of ring entry that can be serviced in one shot.
  598. * Return: uint32_t: No. of ring entry that is processed.
  599. */
  600. static inline uint32_t
  601. dp_rx_mon_status_srng_process(struct dp_soc *soc, uint32_t mac_id,
  602. uint32_t quota)
  603. {
  604. struct dp_pdev *pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  605. void *hal_soc;
  606. void *mon_status_srng;
  607. void *rxdma_mon_status_ring_entry;
  608. QDF_STATUS status;
  609. uint32_t work_done = 0;
  610. int mac_for_pdev = dp_get_mac_id_for_mac(soc, mac_id);
  611. mon_status_srng = pdev->rxdma_mon_status_ring[mac_for_pdev].hal_srng;
  612. qdf_assert(mon_status_srng);
  613. if (!mon_status_srng || !hal_srng_initialized(mon_status_srng)) {
  614. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  615. "%s %d : HAL Monitor Status Ring Init Failed -- %pK",
  616. __func__, __LINE__, mon_status_srng);
  617. return work_done;
  618. }
  619. hal_soc = soc->hal_soc;
  620. qdf_assert(hal_soc);
  621. if (qdf_unlikely(hal_srng_access_start(hal_soc, mon_status_srng)))
  622. goto done;
  623. /* mon_status_ring_desc => WBM_BUFFER_RING STRUCT =>
  624. * BUFFER_ADDR_INFO STRUCT
  625. */
  626. while (qdf_likely((rxdma_mon_status_ring_entry =
  627. hal_srng_src_peek(hal_soc, mon_status_srng))
  628. && quota--)) {
  629. uint32_t rx_buf_cookie;
  630. qdf_nbuf_t status_nbuf;
  631. struct dp_rx_desc *rx_desc;
  632. uint8_t *status_buf;
  633. qdf_dma_addr_t paddr;
  634. uint64_t buf_addr;
  635. buf_addr =
  636. (HAL_RX_BUFFER_ADDR_31_0_GET(
  637. rxdma_mon_status_ring_entry) |
  638. ((uint64_t)(HAL_RX_BUFFER_ADDR_39_32_GET(
  639. rxdma_mon_status_ring_entry)) << 32));
  640. if (qdf_likely(buf_addr)) {
  641. rx_buf_cookie =
  642. HAL_RX_BUF_COOKIE_GET(
  643. rxdma_mon_status_ring_entry);
  644. rx_desc = dp_rx_cookie_2_va_mon_status(soc,
  645. rx_buf_cookie);
  646. qdf_assert(rx_desc);
  647. status_nbuf = rx_desc->nbuf;
  648. qdf_nbuf_sync_for_cpu(soc->osdev, status_nbuf,
  649. QDF_DMA_FROM_DEVICE);
  650. status_buf = qdf_nbuf_data(status_nbuf);
  651. status = hal_get_rx_status_done(status_buf);
  652. if (status != QDF_STATUS_SUCCESS) {
  653. uint32_t hp, tp;
  654. hal_get_sw_hptp(hal_soc, mon_status_srng,
  655. &tp, &hp);
  656. QDF_TRACE(QDF_MODULE_ID_DP,
  657. QDF_TRACE_LEVEL_ERROR,
  658. "[%s][%d] status not done - hp:%u, tp:%u",
  659. __func__, __LINE__, hp, tp);
  660. /* WAR for missing status: Skip status entry */
  661. hal_srng_src_get_next(hal_soc, mon_status_srng);
  662. continue;
  663. }
  664. qdf_nbuf_set_pktlen(status_nbuf, RX_BUFFER_SIZE);
  665. qdf_nbuf_unmap_single(soc->osdev, status_nbuf,
  666. QDF_DMA_FROM_DEVICE);
  667. /* Put the status_nbuf to queue */
  668. qdf_nbuf_queue_add(&pdev->rx_status_q, status_nbuf);
  669. } else {
  670. union dp_rx_desc_list_elem_t *desc_list = NULL;
  671. union dp_rx_desc_list_elem_t *tail = NULL;
  672. struct rx_desc_pool *rx_desc_pool;
  673. uint32_t num_alloc_desc;
  674. rx_desc_pool = &soc->rx_desc_status[mac_id];
  675. num_alloc_desc = dp_rx_get_free_desc_list(soc, mac_id,
  676. rx_desc_pool,
  677. 1,
  678. &desc_list,
  679. &tail);
  680. /*
  681. * No free descriptors available
  682. */
  683. if (qdf_unlikely(num_alloc_desc == 0)) {
  684. work_done++;
  685. break;
  686. }
  687. rx_desc = &desc_list->rx_desc;
  688. }
  689. status_nbuf = dp_rx_nbuf_prepare(soc, pdev);
  690. /*
  691. * qdf_nbuf alloc or map failed,
  692. * free the dp rx desc to free list,
  693. * fill in NULL dma address at current HP entry,
  694. * keep HP in mon_status_ring unchanged,
  695. * wait next time dp_rx_mon_status_srng_process
  696. * to fill in buffer at current HP.
  697. */
  698. if (qdf_unlikely(!status_nbuf)) {
  699. union dp_rx_desc_list_elem_t *desc_list = NULL;
  700. union dp_rx_desc_list_elem_t *tail = NULL;
  701. struct rx_desc_pool *rx_desc_pool;
  702. rx_desc_pool = &soc->rx_desc_status[mac_id];
  703. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  704. "%s: fail to allocate or map qdf_nbuf",
  705. __func__);
  706. dp_rx_add_to_free_desc_list(&desc_list,
  707. &tail, rx_desc);
  708. dp_rx_add_desc_list_to_free_list(soc, &desc_list,
  709. &tail, mac_id, rx_desc_pool);
  710. hal_rxdma_buff_addr_info_set(
  711. rxdma_mon_status_ring_entry,
  712. 0, 0, HAL_RX_BUF_RBM_SW3_BM);
  713. work_done++;
  714. break;
  715. }
  716. paddr = qdf_nbuf_get_frag_paddr(status_nbuf, 0);
  717. rx_desc->nbuf = status_nbuf;
  718. rx_desc->in_use = 1;
  719. hal_rxdma_buff_addr_info_set(rxdma_mon_status_ring_entry,
  720. paddr, rx_desc->cookie, HAL_RX_BUF_RBM_SW3_BM);
  721. hal_srng_src_get_next(hal_soc, mon_status_srng);
  722. work_done++;
  723. }
  724. done:
  725. hal_srng_access_end(hal_soc, mon_status_srng);
  726. return work_done;
  727. }
  728. /*
  729. * dp_rx_mon_status_process() - Process monitor status ring and
  730. * TLV in status ring.
  731. *
  732. * @soc: core txrx main context
  733. * @mac_id: mac_id which is one of 3 mac_ids
  734. * @quota: No. of ring entry that can be serviced in one shot.
  735. * Return: uint32_t: No. of ring entry that is processed.
  736. */
  737. static inline uint32_t
  738. dp_rx_mon_status_process(struct dp_soc *soc, uint32_t mac_id, uint32_t quota) {
  739. uint32_t work_done;
  740. work_done = dp_rx_mon_status_srng_process(soc, mac_id, quota);
  741. quota -= work_done;
  742. dp_rx_mon_status_process_tlv(soc, mac_id, quota);
  743. return work_done;
  744. }
  745. /**
  746. * dp_mon_process() - Main monitor mode processing roution.
  747. * This call monitor status ring process then monitor
  748. * destination ring process.
  749. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  750. * @soc: core txrx main context
  751. * @mac_id: mac_id which is one of 3 mac_ids
  752. * @quota: No. of status ring entry that can be serviced in one shot.
  753. * Return: uint32_t: No. of ring entry that is processed.
  754. */
  755. uint32_t
  756. dp_mon_process(struct dp_soc *soc, uint32_t mac_id, uint32_t quota) {
  757. return dp_rx_mon_status_process(soc, mac_id, quota);
  758. }
  759. /**
  760. * dp_rx_pdev_mon_status_detach() - detach dp rx for status ring
  761. * @pdev: core txrx pdev context
  762. * @mac_id: mac_id/pdev_id correspondinggly for MCL and WIN
  763. *
  764. * This function will detach DP RX status ring from
  765. * main device context. will free DP Rx resources for
  766. * status ring
  767. *
  768. * Return: QDF_STATUS_SUCCESS: success
  769. * QDF_STATUS_E_RESOURCES: Error return
  770. */
  771. QDF_STATUS
  772. dp_rx_pdev_mon_status_detach(struct dp_pdev *pdev, int mac_id)
  773. {
  774. struct dp_soc *soc = pdev->soc;
  775. struct rx_desc_pool *rx_desc_pool;
  776. rx_desc_pool = &soc->rx_desc_status[mac_id];
  777. if (rx_desc_pool->pool_size != 0) {
  778. if (!dp_is_soc_reinit(soc))
  779. dp_rx_desc_nbuf_and_pool_free(soc, mac_id,
  780. rx_desc_pool);
  781. else
  782. dp_rx_desc_nbuf_free(soc, rx_desc_pool);
  783. }
  784. return QDF_STATUS_SUCCESS;
  785. }
  786. /*
  787. * dp_rx_buffers_replenish() - replenish monitor status ring with
  788. * rx nbufs called during dp rx
  789. * monitor status ring initialization
  790. *
  791. * @soc: core txrx main context
  792. * @mac_id: mac_id which is one of 3 mac_ids
  793. * @dp_rxdma_srng: dp monitor status circular ring
  794. * @rx_desc_pool; Pointer to Rx descriptor pool
  795. * @num_req_buffers: number of buffer to be replenished
  796. * @desc_list: list of descs if called from dp rx monitor status
  797. * process or NULL during dp rx initialization or
  798. * out of buffer interrupt
  799. * @tail: tail of descs list
  800. * @owner: who owns the nbuf (host, NSS etc...)
  801. * Return: return success or failure
  802. */
  803. static inline
  804. QDF_STATUS dp_rx_mon_status_buffers_replenish(struct dp_soc *dp_soc,
  805. uint32_t mac_id,
  806. struct dp_srng *dp_rxdma_srng,
  807. struct rx_desc_pool *rx_desc_pool,
  808. uint32_t num_req_buffers,
  809. union dp_rx_desc_list_elem_t **desc_list,
  810. union dp_rx_desc_list_elem_t **tail,
  811. uint8_t owner)
  812. {
  813. uint32_t num_alloc_desc;
  814. uint16_t num_desc_to_free = 0;
  815. uint32_t num_entries_avail;
  816. uint32_t count = 0;
  817. int sync_hw_ptr = 1;
  818. qdf_dma_addr_t paddr;
  819. qdf_nbuf_t rx_netbuf;
  820. void *rxdma_ring_entry;
  821. union dp_rx_desc_list_elem_t *next;
  822. void *rxdma_srng;
  823. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(dp_soc, mac_id);
  824. rxdma_srng = dp_rxdma_srng->hal_srng;
  825. qdf_assert(rxdma_srng);
  826. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  827. "[%s][%d] requested %d buffers for replenish",
  828. __func__, __LINE__, num_req_buffers);
  829. /*
  830. * if desc_list is NULL, allocate the descs from freelist
  831. */
  832. if (!(*desc_list)) {
  833. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  834. rx_desc_pool,
  835. num_req_buffers,
  836. desc_list,
  837. tail);
  838. if (!num_alloc_desc) {
  839. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  840. "[%s][%d] no free rx_descs in freelist",
  841. __func__, __LINE__);
  842. return QDF_STATUS_E_NOMEM;
  843. }
  844. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  845. "[%s][%d] %d rx desc allocated", __func__, __LINE__,
  846. num_alloc_desc);
  847. num_req_buffers = num_alloc_desc;
  848. }
  849. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  850. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  851. rxdma_srng, sync_hw_ptr);
  852. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  853. "[%s][%d] no of available entries in rxdma ring: %d",
  854. __func__, __LINE__, num_entries_avail);
  855. if (num_entries_avail < num_req_buffers) {
  856. num_desc_to_free = num_req_buffers - num_entries_avail;
  857. num_req_buffers = num_entries_avail;
  858. }
  859. while (count < num_req_buffers) {
  860. rx_netbuf = dp_rx_nbuf_prepare(dp_soc, dp_pdev);
  861. /*
  862. * qdf_nbuf alloc or map failed,
  863. * keep HP in mon_status_ring unchanged,
  864. * wait dp_rx_mon_status_srng_process
  865. * to fill in buffer at current HP.
  866. */
  867. if (qdf_unlikely(!rx_netbuf)) {
  868. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  869. "%s: qdf_nbuf allocate or map fail, count %d",
  870. __func__, count);
  871. break;
  872. }
  873. paddr = qdf_nbuf_get_frag_paddr(rx_netbuf, 0);
  874. next = (*desc_list)->next;
  875. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  876. rxdma_srng);
  877. if (qdf_unlikely(!rxdma_ring_entry)) {
  878. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  879. "[%s][%d] rxdma_ring_entry is NULL, count - %d",
  880. __func__, __LINE__, count);
  881. qdf_nbuf_unmap_single(dp_soc->osdev, rx_netbuf,
  882. QDF_DMA_FROM_DEVICE);
  883. qdf_nbuf_free(rx_netbuf);
  884. break;
  885. }
  886. (*desc_list)->rx_desc.nbuf = rx_netbuf;
  887. (*desc_list)->rx_desc.in_use = 1;
  888. count++;
  889. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  890. (*desc_list)->rx_desc.cookie, owner);
  891. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  892. "[%s][%d] rx_desc=%pK, cookie=%d, nbuf=%pK, \
  893. paddr=%pK",
  894. __func__, __LINE__, &(*desc_list)->rx_desc,
  895. (*desc_list)->rx_desc.cookie, rx_netbuf,
  896. (void *)paddr);
  897. *desc_list = next;
  898. }
  899. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  900. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  901. "successfully replenished %d buffers", num_req_buffers);
  902. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  903. "%d rx desc added back to free list", num_desc_to_free);
  904. /*
  905. * add any available free desc back to the free list
  906. */
  907. if (*desc_list) {
  908. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  909. mac_id, rx_desc_pool);
  910. }
  911. return QDF_STATUS_SUCCESS;
  912. }
  913. /**
  914. * dp_rx_pdev_mon_status_attach() - attach DP RX monitor status ring
  915. * @pdev: core txrx pdev context
  916. * @ring_id: ring number
  917. * This function will attach a DP RX monitor status ring into pDEV
  918. * and replenish monitor status ring with buffer.
  919. *
  920. * Return: QDF_STATUS_SUCCESS: success
  921. * QDF_STATUS_E_RESOURCES: Error return
  922. */
  923. QDF_STATUS
  924. dp_rx_pdev_mon_status_attach(struct dp_pdev *pdev, int ring_id) {
  925. struct dp_soc *soc = pdev->soc;
  926. union dp_rx_desc_list_elem_t *desc_list = NULL;
  927. union dp_rx_desc_list_elem_t *tail = NULL;
  928. struct dp_srng *mon_status_ring;
  929. uint32_t num_entries;
  930. uint32_t i;
  931. struct rx_desc_pool *rx_desc_pool;
  932. QDF_STATUS status;
  933. int mac_for_pdev = dp_get_mac_id_for_mac(soc, ring_id);
  934. mon_status_ring = &pdev->rxdma_mon_status_ring[mac_for_pdev];
  935. num_entries = mon_status_ring->num_entries;
  936. rx_desc_pool = &soc->rx_desc_status[ring_id];
  937. dp_info("Mon RX Status Pool[%d] entries=%d",
  938. ring_id, num_entries);
  939. status = dp_rx_desc_pool_alloc(soc, ring_id, num_entries + 1,
  940. rx_desc_pool);
  941. if (!QDF_IS_STATUS_SUCCESS(status))
  942. return status;
  943. dp_debug("Mon RX Status Buffers Replenish ring_id=%d", ring_id);
  944. status = dp_rx_mon_status_buffers_replenish(soc, ring_id,
  945. mon_status_ring,
  946. rx_desc_pool,
  947. num_entries,
  948. &desc_list, &tail,
  949. HAL_RX_BUF_RBM_SW3_BM);
  950. if (!QDF_IS_STATUS_SUCCESS(status))
  951. return status;
  952. qdf_nbuf_queue_init(&pdev->rx_status_q);
  953. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  954. qdf_mem_zero(&(pdev->ppdu_info.rx_status),
  955. sizeof(pdev->ppdu_info.rx_status));
  956. qdf_mem_zero(&pdev->rx_mon_stats,
  957. sizeof(pdev->rx_mon_stats));
  958. dp_rx_mon_init_dbg_ppdu_stats(&pdev->ppdu_info,
  959. &pdev->rx_mon_stats);
  960. for (i = 0; i < MAX_MU_USERS; i++) {
  961. qdf_nbuf_queue_init(&pdev->mpdu_q[i]);
  962. pdev->is_mpdu_hdr[i] = true;
  963. }
  964. qdf_mem_zero(pdev->msdu_list, sizeof(pdev->msdu_list[MAX_MU_USERS]));
  965. pdev->rx_enh_capture_mode = CDP_RX_ENH_CAPTURE_DISABLED;
  966. return QDF_STATUS_SUCCESS;
  967. }