dp_be.c 87 KB

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  1. /*
  2. * Copyright (c) 2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include <wlan_utility.h>
  20. #include <dp_internal.h>
  21. #include "dp_rings.h"
  22. #include <dp_htt.h>
  23. #include "dp_be.h"
  24. #include "dp_be_tx.h"
  25. #include "dp_be_rx.h"
  26. #ifdef WIFI_MONITOR_SUPPORT
  27. #if !defined(DISABLE_MON_CONFIG) && (defined(WLAN_PKT_CAPTURE_TX_2_0) || \
  28. defined(WLAN_PKT_CAPTURE_RX_2_0))
  29. #include "dp_mon_2.0.h"
  30. #endif
  31. #include "dp_mon.h"
  32. #endif
  33. #include <hal_be_api.h>
  34. #ifdef WLAN_SUPPORT_PPEDS
  35. #include "be/dp_ppeds.h"
  36. #include <ppe_vp_public.h>
  37. #include <ppe_drv_sc.h>
  38. #endif
  39. #ifdef WLAN_SUPPORT_PPEDS
  40. static const char *ring_usage_dump[RING_USAGE_MAX] = {
  41. "100%",
  42. "Greater than 90%",
  43. "70 to 90%",
  44. "50 to 70%",
  45. "Less than 50%"
  46. };
  47. #endif
  48. /* Generic AST entry aging timer value */
  49. #define DP_AST_AGING_TIMER_DEFAULT_MS 5000
  50. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  51. #define DP_TX_VDEV_ID_CHECK_ENABLE 0
  52. static struct wlan_cfg_tcl_wbm_ring_num_map g_tcl_wbm_map_array[MAX_TCL_DATA_RINGS] = {
  53. {.tcl_ring_num = 0, .wbm_ring_num = 0, .wbm_rbm_id = HAL_BE_WBM_SW0_BM_ID, .for_ipa = 0},
  54. {1, 4, HAL_BE_WBM_SW4_BM_ID, 0},
  55. {2, 2, HAL_BE_WBM_SW2_BM_ID, 0},
  56. #ifdef QCA_WIFI_KIWI_V2
  57. {3, 5, HAL_BE_WBM_SW5_BM_ID, 0},
  58. {4, 6, HAL_BE_WBM_SW6_BM_ID, 0}
  59. #else
  60. {3, 6, HAL_BE_WBM_SW5_BM_ID, 0},
  61. {4, 7, HAL_BE_WBM_SW6_BM_ID, 0}
  62. #endif
  63. };
  64. #else
  65. #define DP_TX_VDEV_ID_CHECK_ENABLE 1
  66. static struct wlan_cfg_tcl_wbm_ring_num_map g_tcl_wbm_map_array[MAX_TCL_DATA_RINGS] = {
  67. {.tcl_ring_num = 0, .wbm_ring_num = 0, .wbm_rbm_id = HAL_BE_WBM_SW0_BM_ID, .for_ipa = 0},
  68. {1, 1, HAL_BE_WBM_SW1_BM_ID, 0},
  69. {2, 2, HAL_BE_WBM_SW2_BM_ID, 0},
  70. {3, 3, HAL_BE_WBM_SW3_BM_ID, 0},
  71. {4, 4, HAL_BE_WBM_SW4_BM_ID, 0}
  72. };
  73. #endif
  74. #ifdef WLAN_SUPPORT_PPEDS
  75. static struct cdp_ppeds_txrx_ops dp_ops_ppeds_be = {
  76. .ppeds_entry_attach = dp_ppeds_attach_vdev_be,
  77. .ppeds_entry_detach = dp_ppeds_detach_vdev_be,
  78. .ppeds_set_int_pri2tid = dp_ppeds_set_int_pri2tid_be,
  79. .ppeds_update_int_pri2tid = dp_ppeds_update_int_pri2tid_be,
  80. .ppeds_entry_dump = dp_ppeds_dump_ppe_vp_tbl_be,
  81. .ppeds_enable_pri2tid = dp_ppeds_vdev_enable_pri2tid_be,
  82. .ppeds_vp_setup_recovery = dp_ppeds_vp_setup_on_fw_recovery,
  83. .ppeds_stats_sync = dp_ppeds_stats_sync_be,
  84. };
  85. static void dp_ppeds_rings_status(struct dp_soc *soc)
  86. {
  87. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  88. dp_print_ring_stat_from_hal(soc, &be_soc->reo2ppe_ring, REO2PPE);
  89. dp_print_ring_stat_from_hal(soc, &be_soc->ppe2tcl_ring, PPE2TCL);
  90. dp_print_ring_stat_from_hal(soc, &be_soc->ppeds_wbm_release_ring,
  91. WBM2SW_RELEASE);
  92. }
  93. static void dp_ppeds_inuse_desc(struct dp_soc *soc)
  94. {
  95. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  96. DP_PRINT_STATS("PPE-DS Tx Descriptors in Use = %u num_free %u",
  97. be_soc->ppeds_tx_desc.num_allocated,
  98. be_soc->ppeds_tx_desc.num_free);
  99. DP_PRINT_STATS("PPE-DS Tx desc alloc failed %u",
  100. be_soc->ppeds_stats.tx.desc_alloc_failed);
  101. }
  102. static void dp_ppeds_clear_stats(struct dp_soc *soc)
  103. {
  104. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  105. be_soc->ppeds_stats.tx.desc_alloc_failed = 0;
  106. }
  107. static void dp_ppeds_rings_stats(struct dp_soc *soc)
  108. {
  109. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  110. int i = 0;
  111. DP_PRINT_STATS("Ring utilization statistics");
  112. DP_PRINT_STATS("WBM2SW_RELEASE");
  113. for (i = 0; i < RING_USAGE_MAX; i++)
  114. DP_PRINT_STATS("\t %s utilized %d instances",
  115. ring_usage_dump[i],
  116. be_soc->ppeds_wbm_release_ring.stats.util[i]);
  117. DP_PRINT_STATS("PPE2TCL");
  118. for (i = 0; i < RING_USAGE_MAX; i++)
  119. DP_PRINT_STATS("\t %s utilized %d instances",
  120. ring_usage_dump[i],
  121. be_soc->ppe2tcl_ring.stats.util[i]);
  122. }
  123. static void dp_ppeds_clear_rings_stats(struct dp_soc *soc)
  124. {
  125. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  126. memset(&be_soc->ppeds_wbm_release_ring.stats, 0,
  127. sizeof(struct ring_util_stats));
  128. memset(&be_soc->ppe2tcl_ring.stats, 0, sizeof(struct ring_util_stats));
  129. }
  130. #endif
  131. static void dp_soc_cfg_attach_be(struct dp_soc *soc)
  132. {
  133. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx = soc->wlan_cfg_ctx;
  134. dp_soc_cfg_attach(soc);
  135. wlan_cfg_set_rx_rel_ring_id(soc_cfg_ctx, WBM2SW_REL_ERR_RING_NUM);
  136. soc->wlan_cfg_ctx->tcl_wbm_map_array = g_tcl_wbm_map_array;
  137. /* this is used only when dmac mode is enabled */
  138. soc->num_rx_refill_buf_rings = 1;
  139. soc->wlan_cfg_ctx->notify_frame_support =
  140. DP_MARK_NOTIFY_FRAME_SUPPORT;
  141. }
  142. qdf_size_t dp_get_context_size_be(enum dp_context_type context_type)
  143. {
  144. switch (context_type) {
  145. case DP_CONTEXT_TYPE_SOC:
  146. return sizeof(struct dp_soc_be);
  147. case DP_CONTEXT_TYPE_PDEV:
  148. return sizeof(struct dp_pdev_be);
  149. case DP_CONTEXT_TYPE_VDEV:
  150. return sizeof(struct dp_vdev_be);
  151. case DP_CONTEXT_TYPE_PEER:
  152. return sizeof(struct dp_peer_be);
  153. default:
  154. return 0;
  155. }
  156. }
  157. #if defined(DP_FEATURE_HW_COOKIE_CONVERSION) || defined(WLAN_SUPPORT_RX_FISA)
  158. static uint64_t dp_get_cmem_chunk(struct dp_soc *soc, uint64_t size,
  159. enum CMEM_MEM_CLIENTS client)
  160. {
  161. uint64_t cmem_chunk;
  162. dp_info("cmem base 0x%llx, total size 0x%llx avail_size 0x%llx",
  163. soc->cmem_base, soc->cmem_total_size, soc->cmem_avail_size);
  164. /* Check if requested cmem space is available */
  165. if (soc->cmem_avail_size < size) {
  166. dp_err("cmem_size 0x%llx bytes < requested size 0x%llx bytes",
  167. soc->cmem_avail_size, size);
  168. return 0;
  169. }
  170. cmem_chunk = soc->cmem_base +
  171. (soc->cmem_total_size - soc->cmem_avail_size);
  172. soc->cmem_avail_size -= size;
  173. dp_info("Reserved cmem space 0x%llx, size 0x%llx for client %d",
  174. cmem_chunk, size, client);
  175. return cmem_chunk;
  176. }
  177. #endif
  178. #ifdef WLAN_SUPPORT_RX_FISA
  179. static uint64_t dp_get_fst_cmem_base_be(struct dp_soc *soc, uint64_t size)
  180. {
  181. return dp_get_cmem_chunk(soc, size, FISA_FST);
  182. }
  183. static void dp_initialize_arch_ops_be_fisa(struct dp_arch_ops *arch_ops)
  184. {
  185. arch_ops->dp_get_fst_cmem_base = dp_get_fst_cmem_base_be;
  186. }
  187. #else
  188. static void dp_initialize_arch_ops_be_fisa(struct dp_arch_ops *arch_ops)
  189. {
  190. }
  191. #endif
  192. #ifdef DP_FEATURE_HW_COOKIE_CONVERSION
  193. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  194. /**
  195. * dp_cc_wbm_sw_en_cfg() - configure HW cookie conversion enablement
  196. * per wbm2sw ring
  197. *
  198. * @cc_cfg: HAL HW cookie conversion configuration structure pointer
  199. *
  200. * Return: None
  201. */
  202. #ifdef IPA_OPT_WIFI_DP
  203. static inline
  204. void dp_cc_wbm_sw_en_cfg(struct hal_hw_cc_config *cc_cfg)
  205. {
  206. cc_cfg->wbm2sw6_cc_en = 1;
  207. cc_cfg->wbm2sw5_cc_en = 0;
  208. cc_cfg->wbm2sw4_cc_en = 1;
  209. cc_cfg->wbm2sw3_cc_en = 1;
  210. cc_cfg->wbm2sw2_cc_en = 1;
  211. /* disable wbm2sw1 hw cc as it's for FW */
  212. cc_cfg->wbm2sw1_cc_en = 0;
  213. cc_cfg->wbm2sw0_cc_en = 1;
  214. cc_cfg->wbm2fw_cc_en = 0;
  215. }
  216. #else
  217. static inline
  218. void dp_cc_wbm_sw_en_cfg(struct hal_hw_cc_config *cc_cfg)
  219. {
  220. cc_cfg->wbm2sw6_cc_en = 1;
  221. cc_cfg->wbm2sw5_cc_en = 1;
  222. cc_cfg->wbm2sw4_cc_en = 1;
  223. cc_cfg->wbm2sw3_cc_en = 1;
  224. cc_cfg->wbm2sw2_cc_en = 1;
  225. /* disable wbm2sw1 hw cc as it's for FW */
  226. cc_cfg->wbm2sw1_cc_en = 0;
  227. cc_cfg->wbm2sw0_cc_en = 1;
  228. cc_cfg->wbm2fw_cc_en = 0;
  229. }
  230. #endif
  231. #else
  232. static inline
  233. void dp_cc_wbm_sw_en_cfg(struct hal_hw_cc_config *cc_cfg)
  234. {
  235. cc_cfg->wbm2sw6_cc_en = 1;
  236. cc_cfg->wbm2sw5_cc_en = 1;
  237. cc_cfg->wbm2sw4_cc_en = 1;
  238. cc_cfg->wbm2sw3_cc_en = 1;
  239. cc_cfg->wbm2sw2_cc_en = 1;
  240. cc_cfg->wbm2sw1_cc_en = 1;
  241. cc_cfg->wbm2sw0_cc_en = 1;
  242. cc_cfg->wbm2fw_cc_en = 0;
  243. }
  244. #endif
  245. /**
  246. * dp_cc_reg_cfg_init() - initialize and configure HW cookie
  247. * conversion register
  248. *
  249. * @soc: SOC handle
  250. * @is_4k_align: page address 4k aligned
  251. *
  252. * Return: None
  253. */
  254. static void dp_cc_reg_cfg_init(struct dp_soc *soc,
  255. bool is_4k_align)
  256. {
  257. struct hal_hw_cc_config cc_cfg = { 0 };
  258. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  259. if (soc->cdp_soc.ol_ops->get_con_mode &&
  260. soc->cdp_soc.ol_ops->get_con_mode() == QDF_GLOBAL_FTM_MODE)
  261. return;
  262. if (!soc->wlan_cfg_ctx->hw_cc_enabled) {
  263. dp_info("INI skip HW CC register setting");
  264. return;
  265. }
  266. cc_cfg.lut_base_addr_31_0 = be_soc->cc_cmem_base;
  267. cc_cfg.cc_global_en = true;
  268. cc_cfg.page_4k_align = is_4k_align;
  269. cc_cfg.cookie_offset_msb = DP_CC_DESC_ID_SPT_VA_OS_MSB;
  270. cc_cfg.cookie_page_msb = DP_CC_DESC_ID_PPT_PAGE_OS_MSB;
  271. /* 36th bit should be 1 then HW know this is CMEM address */
  272. cc_cfg.lut_base_addr_39_32 = 0x10;
  273. cc_cfg.error_path_cookie_conv_en = true;
  274. cc_cfg.release_path_cookie_conv_en = true;
  275. dp_cc_wbm_sw_en_cfg(&cc_cfg);
  276. hal_cookie_conversion_reg_cfg_be(soc->hal_soc, &cc_cfg);
  277. }
  278. /**
  279. * dp_hw_cc_cmem_write() - DP wrapper function for CMEM buffer writing
  280. * @hal_soc_hdl: HAL SOC handle
  281. * @offset: CMEM address
  282. * @value: value to write
  283. *
  284. * Return: None.
  285. */
  286. static inline void dp_hw_cc_cmem_write(hal_soc_handle_t hal_soc_hdl,
  287. uint32_t offset,
  288. uint32_t value)
  289. {
  290. hal_cmem_write(hal_soc_hdl, offset, value);
  291. }
  292. /**
  293. * dp_hw_cc_cmem_addr_init() - Check and initialize CMEM base address for
  294. * HW cookie conversion
  295. *
  296. * @soc: SOC handle
  297. *
  298. * Return: 0 in case of success, else error value
  299. */
  300. static inline QDF_STATUS dp_hw_cc_cmem_addr_init(struct dp_soc *soc)
  301. {
  302. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  303. be_soc->cc_cmem_base = dp_get_cmem_chunk(soc, DP_CC_PPT_MEM_SIZE,
  304. COOKIE_CONVERSION);
  305. return QDF_STATUS_SUCCESS;
  306. }
  307. #else
  308. static inline void dp_cc_reg_cfg_init(struct dp_soc *soc,
  309. bool is_4k_align) {}
  310. static inline void dp_hw_cc_cmem_write(hal_soc_handle_t hal_soc_hdl,
  311. uint32_t offset,
  312. uint32_t value)
  313. { }
  314. static inline QDF_STATUS dp_hw_cc_cmem_addr_init(struct dp_soc *soc)
  315. {
  316. return QDF_STATUS_SUCCESS;
  317. }
  318. #endif
  319. #if defined(DP_FEATURE_HW_COOKIE_CONVERSION) || defined(WLAN_SUPPORT_RX_FISA)
  320. static QDF_STATUS dp_get_cmem_allocation(struct dp_soc *soc,
  321. uint8_t for_feature)
  322. {
  323. QDF_STATUS status = QDF_STATUS_E_NOMEM;
  324. switch (for_feature) {
  325. case COOKIE_CONVERSION:
  326. status = dp_hw_cc_cmem_addr_init(soc);
  327. break;
  328. default:
  329. dp_err("Invalid CMEM request");
  330. }
  331. return status;
  332. }
  333. #else
  334. static QDF_STATUS dp_get_cmem_allocation(struct dp_soc *soc,
  335. uint8_t for_feature)
  336. {
  337. return QDF_STATUS_SUCCESS;
  338. }
  339. #endif
  340. QDF_STATUS
  341. dp_hw_cookie_conversion_attach(struct dp_soc_be *be_soc,
  342. struct dp_hw_cookie_conversion_t *cc_ctx,
  343. uint32_t num_descs,
  344. enum qdf_dp_desc_type desc_type,
  345. uint8_t desc_pool_id)
  346. {
  347. struct dp_soc *soc = DP_SOC_BE_GET_SOC(be_soc);
  348. uint32_t num_spt_pages, i = 0;
  349. struct dp_spt_page_desc *spt_desc;
  350. struct qdf_mem_dma_page_t *dma_page;
  351. uint8_t chip_id;
  352. /* estimate how many SPT DDR pages needed */
  353. num_spt_pages = qdf_do_div(
  354. num_descs + (DP_CC_SPT_PAGE_MAX_ENTRIES - 1),
  355. DP_CC_SPT_PAGE_MAX_ENTRIES);
  356. num_spt_pages = num_spt_pages <= DP_CC_PPT_MAX_ENTRIES ?
  357. num_spt_pages : DP_CC_PPT_MAX_ENTRIES;
  358. dp_info("num_spt_pages needed %d", num_spt_pages);
  359. dp_desc_multi_pages_mem_alloc(soc, QDF_DP_HW_CC_SPT_PAGE_TYPE,
  360. &cc_ctx->page_pool, qdf_page_size,
  361. num_spt_pages, 0, false);
  362. if (!cc_ctx->page_pool.dma_pages) {
  363. dp_err("spt ddr pages allocation failed");
  364. return QDF_STATUS_E_RESOURCES;
  365. }
  366. cc_ctx->page_desc_base = qdf_mem_malloc(
  367. num_spt_pages * sizeof(struct dp_spt_page_desc));
  368. if (!cc_ctx->page_desc_base) {
  369. dp_err("spt page descs allocation failed");
  370. goto fail_0;
  371. }
  372. chip_id = dp_mlo_get_chip_id(soc);
  373. cc_ctx->cmem_offset = dp_desc_pool_get_cmem_base(chip_id, desc_pool_id,
  374. desc_type);
  375. /* initial page desc */
  376. spt_desc = cc_ctx->page_desc_base;
  377. dma_page = cc_ctx->page_pool.dma_pages;
  378. while (i < num_spt_pages) {
  379. /* check if page address 4K aligned */
  380. if (qdf_unlikely(dma_page[i].page_p_addr & 0xFFF)) {
  381. dp_err("non-4k aligned pages addr %pK",
  382. (void *)dma_page[i].page_p_addr);
  383. goto fail_1;
  384. }
  385. spt_desc[i].page_v_addr =
  386. dma_page[i].page_v_addr_start;
  387. spt_desc[i].page_p_addr =
  388. dma_page[i].page_p_addr;
  389. i++;
  390. }
  391. cc_ctx->total_page_num = num_spt_pages;
  392. qdf_spinlock_create(&cc_ctx->cc_lock);
  393. return QDF_STATUS_SUCCESS;
  394. fail_1:
  395. qdf_mem_free(cc_ctx->page_desc_base);
  396. cc_ctx->page_desc_base = NULL;
  397. fail_0:
  398. dp_desc_multi_pages_mem_free(soc, QDF_DP_HW_CC_SPT_PAGE_TYPE,
  399. &cc_ctx->page_pool, 0, false);
  400. return QDF_STATUS_E_FAILURE;
  401. }
  402. QDF_STATUS
  403. dp_hw_cookie_conversion_detach(struct dp_soc_be *be_soc,
  404. struct dp_hw_cookie_conversion_t *cc_ctx)
  405. {
  406. struct dp_soc *soc = DP_SOC_BE_GET_SOC(be_soc);
  407. dp_desc_multi_pages_mem_free(soc, QDF_DP_HW_CC_SPT_PAGE_TYPE,
  408. &cc_ctx->page_pool, 0, false);
  409. if (cc_ctx->page_desc_base)
  410. qdf_spinlock_destroy(&cc_ctx->cc_lock);
  411. qdf_mem_free(cc_ctx->page_desc_base);
  412. cc_ctx->page_desc_base = NULL;
  413. return QDF_STATUS_SUCCESS;
  414. }
  415. QDF_STATUS
  416. dp_hw_cookie_conversion_init(struct dp_soc_be *be_soc,
  417. struct dp_hw_cookie_conversion_t *cc_ctx)
  418. {
  419. struct dp_soc *soc = DP_SOC_BE_GET_SOC(be_soc);
  420. uint32_t i = 0;
  421. struct dp_spt_page_desc *spt_desc;
  422. uint32_t ppt_index;
  423. uint32_t ppt_id_start;
  424. if (!cc_ctx->total_page_num) {
  425. dp_err("total page num is 0");
  426. return QDF_STATUS_E_INVAL;
  427. }
  428. ppt_id_start = DP_CMEM_OFFSET_TO_PPT_ID(cc_ctx->cmem_offset);
  429. spt_desc = cc_ctx->page_desc_base;
  430. while (i < cc_ctx->total_page_num) {
  431. /* write page PA to CMEM */
  432. dp_hw_cc_cmem_write(soc->hal_soc,
  433. (cc_ctx->cmem_offset + be_soc->cc_cmem_base
  434. + (i * DP_CC_PPT_ENTRY_SIZE_4K_ALIGNED)),
  435. (spt_desc[i].page_p_addr >>
  436. DP_CC_PPT_ENTRY_HW_APEND_BITS_4K_ALIGNED));
  437. ppt_index = ppt_id_start + i;
  438. if (ppt_index >= DP_CC_PPT_MAX_ENTRIES)
  439. qdf_assert_always(0);
  440. spt_desc[i].ppt_index = ppt_index;
  441. be_soc->page_desc_base[ppt_index].page_v_addr =
  442. spt_desc[i].page_v_addr;
  443. i++;
  444. }
  445. return QDF_STATUS_SUCCESS;
  446. }
  447. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  448. QDF_STATUS
  449. dp_hw_cookie_conversion_deinit(struct dp_soc_be *be_soc,
  450. struct dp_hw_cookie_conversion_t *cc_ctx)
  451. {
  452. uint32_t ppt_index;
  453. struct dp_spt_page_desc *spt_desc;
  454. int i = 0;
  455. spt_desc = cc_ctx->page_desc_base;
  456. while (i < cc_ctx->total_page_num) {
  457. ppt_index = spt_desc[i].ppt_index;
  458. be_soc->page_desc_base[ppt_index].page_v_addr = NULL;
  459. i++;
  460. }
  461. return QDF_STATUS_SUCCESS;
  462. }
  463. #else
  464. QDF_STATUS
  465. dp_hw_cookie_conversion_deinit(struct dp_soc_be *be_soc,
  466. struct dp_hw_cookie_conversion_t *cc_ctx)
  467. {
  468. struct dp_soc *soc = DP_SOC_BE_GET_SOC(be_soc);
  469. uint32_t ppt_index;
  470. struct dp_spt_page_desc *spt_desc;
  471. int i = 0;
  472. spt_desc = cc_ctx->page_desc_base;
  473. while (i < cc_ctx->total_page_num) {
  474. /* reset PA in CMEM to NULL */
  475. dp_hw_cc_cmem_write(soc->hal_soc,
  476. (cc_ctx->cmem_offset + be_soc->cc_cmem_base
  477. + (i * DP_CC_PPT_ENTRY_SIZE_4K_ALIGNED)),
  478. 0);
  479. ppt_index = spt_desc[i].ppt_index;
  480. be_soc->page_desc_base[ppt_index].page_v_addr = NULL;
  481. i++;
  482. }
  483. return QDF_STATUS_SUCCESS;
  484. }
  485. #endif
  486. #ifdef WLAN_SUPPORT_PPEDS
  487. static QDF_STATUS dp_soc_ppeds_attach_be(struct dp_soc *soc)
  488. {
  489. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  490. int target_type = hal_get_target_type(soc->hal_soc);
  491. struct cdp_ops *cdp_ops = soc->cdp_soc.ops;
  492. /*
  493. * Check if PPE DS is enabled and wlan soc supports it.
  494. */
  495. if (!wlan_cfg_get_dp_soc_ppeds_enable(soc->wlan_cfg_ctx) ||
  496. !dp_ppeds_target_supported(target_type))
  497. return QDF_STATUS_SUCCESS;
  498. if (dp_ppeds_attach_soc_be(be_soc) != QDF_STATUS_SUCCESS)
  499. return QDF_STATUS_SUCCESS;
  500. cdp_ops->ppeds_ops = &dp_ops_ppeds_be;
  501. return QDF_STATUS_SUCCESS;
  502. }
  503. static QDF_STATUS dp_soc_ppeds_detach_be(struct dp_soc *soc)
  504. {
  505. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  506. struct cdp_ops *cdp_ops = soc->cdp_soc.ops;
  507. if (!be_soc->ppeds_handle)
  508. return QDF_STATUS_E_FAILURE;
  509. dp_ppeds_detach_soc_be(be_soc);
  510. cdp_ops->ppeds_ops = NULL;
  511. return QDF_STATUS_SUCCESS;
  512. }
  513. static QDF_STATUS dp_peer_ppeds_default_route_be(struct dp_soc *soc,
  514. struct dp_peer_be *be_peer,
  515. uint8_t vdev_id,
  516. uint16_t src_info)
  517. {
  518. uint16_t service_code;
  519. uint8_t priority_valid;
  520. uint8_t use_ppe_ds = PEER_ROUTING_USE_PPE;
  521. uint8_t peer_routing_enabled = PEER_ROUTING_ENABLED;
  522. QDF_STATUS status = QDF_STATUS_SUCCESS;
  523. struct wlan_cfg_dp_soc_ctxt *cfg = soc->wlan_cfg_ctx;
  524. struct dp_vdev_be *be_vdev;
  525. be_vdev = dp_get_be_vdev_from_dp_vdev(be_peer->peer.vdev);
  526. /*
  527. * Program service code bypass to avoid L2 new mac address
  528. * learning exception when fdb learning is disabled.
  529. */
  530. service_code = PPE_DRV_SC_SPF_BYPASS;
  531. priority_valid = be_peer->priority_valid;
  532. /*
  533. * if FST is enabled then let flow rule take the decision of
  534. * routing the pkt to DS or host
  535. */
  536. if (wlan_cfg_is_rx_flow_tag_enabled(cfg))
  537. use_ppe_ds = 0;
  538. if (soc->cdp_soc.ol_ops->peer_set_ppeds_default_routing) {
  539. status =
  540. soc->cdp_soc.ol_ops->peer_set_ppeds_default_routing
  541. (soc->ctrl_psoc,
  542. be_peer->peer.mac_addr.raw,
  543. service_code, priority_valid,
  544. src_info, vdev_id, use_ppe_ds,
  545. peer_routing_enabled);
  546. if (status != QDF_STATUS_SUCCESS) {
  547. dp_err("vdev_id: %d, PPE peer routing mac:"
  548. QDF_MAC_ADDR_FMT, vdev_id,
  549. QDF_MAC_ADDR_REF(be_peer->peer.mac_addr.raw));
  550. return QDF_STATUS_E_FAILURE;
  551. }
  552. }
  553. return QDF_STATUS_SUCCESS;
  554. }
  555. #ifdef WLAN_FEATURE_11BE_MLO
  556. QDF_STATUS dp_peer_setup_ppeds_be(struct dp_soc *soc,
  557. struct dp_peer *peer,
  558. struct dp_vdev_be *be_vdev,
  559. void *args)
  560. {
  561. struct dp_peer *mld_peer;
  562. struct dp_soc *mld_soc;
  563. struct dp_soc_be *be_soc;
  564. struct cdp_soc_t *cdp_soc;
  565. struct dp_peer_be *be_peer = dp_get_be_peer_from_dp_peer(peer);
  566. struct cdp_ds_vp_params vp_params = {0};
  567. struct dp_ppe_vp_profile *ppe_vp_profile = (struct dp_ppe_vp_profile *)args;
  568. uint16_t src_info = ppe_vp_profile->vp_num;
  569. uint8_t vdev_id = be_vdev->vdev.vdev_id;
  570. QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
  571. if (!be_peer) {
  572. dp_err("BE peer is null");
  573. return QDF_STATUS_E_NULL_VALUE;
  574. }
  575. if (IS_DP_LEGACY_PEER(peer)) {
  576. qdf_status = dp_peer_ppeds_default_route_be(soc, be_peer,
  577. vdev_id, src_info);
  578. } else if (IS_MLO_DP_MLD_PEER(peer)) {
  579. int i;
  580. struct dp_peer *link_peer = NULL;
  581. struct dp_mld_link_peers link_peers_info;
  582. /* get link peers with reference */
  583. dp_get_link_peers_ref_from_mld_peer(soc, peer, &link_peers_info,
  584. DP_MOD_ID_DS);
  585. for (i = 0; i < link_peers_info.num_links; i++) {
  586. link_peer = link_peers_info.link_peers[i];
  587. be_peer = dp_get_be_peer_from_dp_peer(link_peer);
  588. if (!be_peer) {
  589. dp_err("BE peer is null");
  590. continue;
  591. }
  592. be_vdev = dp_get_be_vdev_from_dp_vdev(link_peer->vdev);
  593. if (!be_vdev) {
  594. dp_err("BE vap is null for peer id %d ",
  595. link_peer->peer_id);
  596. continue;
  597. }
  598. vdev_id = be_vdev->vdev.vdev_id;
  599. soc = link_peer->vdev->pdev->soc;
  600. qdf_status = dp_peer_ppeds_default_route_be(soc,
  601. be_peer,
  602. vdev_id,
  603. src_info);
  604. }
  605. dp_release_link_peers_ref(&link_peers_info, DP_MOD_ID_DS);
  606. } else {
  607. mld_peer = DP_GET_MLD_PEER_FROM_PEER(peer);
  608. if (!mld_peer)
  609. return qdf_status;
  610. /*
  611. * In case of MLO link peer,
  612. * Fetch the VP profile from the mld vdev.
  613. */
  614. be_vdev = dp_get_be_vdev_from_dp_vdev(mld_peer->vdev);
  615. if (!be_vdev) {
  616. dp_err("BE vap is null");
  617. return QDF_STATUS_E_NULL_VALUE;
  618. }
  619. /*
  620. * Extract the VP profile from the vap
  621. * in case of MLO peer, we have to get the profile from
  622. * the MLD vdev's osif handle and not the link peer.
  623. */
  624. mld_soc = mld_peer->vdev->pdev->soc;
  625. cdp_soc = &mld_soc->cdp_soc;
  626. if (!cdp_soc->ol_ops->get_ppeds_profile_info_for_vap) {
  627. dp_err("%pK: Register PPEDS profile info API before use", cdp_soc);
  628. return QDF_STATUS_E_NULL_VALUE;
  629. }
  630. qdf_status = cdp_soc->ol_ops->get_ppeds_profile_info_for_vap(mld_soc->ctrl_psoc,
  631. mld_peer->vdev->vdev_id,
  632. &vp_params);
  633. if (qdf_status == QDF_STATUS_E_NULL_VALUE) {
  634. dp_err("%pK: Failed to get ppeds profile for mld soc", mld_soc);
  635. return qdf_status;
  636. }
  637. /*
  638. * Check if PPE DS routing is enabled on
  639. * the associated vap.
  640. */
  641. if (vp_params.ppe_vp_type != PPE_VP_USER_TYPE_DS)
  642. return qdf_status;
  643. be_soc = dp_get_be_soc_from_dp_soc(mld_soc);
  644. ppe_vp_profile = &be_soc->ppe_vp_profile[vp_params.ppe_vp_profile_idx];
  645. src_info = ppe_vp_profile->vp_num;
  646. qdf_status = dp_peer_ppeds_default_route_be(soc, be_peer,
  647. vdev_id, src_info);
  648. }
  649. return qdf_status;
  650. }
  651. #else
  652. static QDF_STATUS dp_peer_setup_ppeds_be(struct dp_soc *soc,
  653. struct dp_peer *peer,
  654. struct dp_vdev_be *be_vdev
  655. void *args)
  656. {
  657. struct dp_ppe_vp_profile *vp_profile = (struct dp_ppe_vp_profile *)args;
  658. struct dp_peer_be *be_peer = dp_get_be_peer_from_dp_peer(peer);
  659. QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
  660. if (!be_peer) {
  661. dp_err("BE peer is null");
  662. return QDF_STATUS_E_NULL_VALUE;
  663. }
  664. qdf_status = dp_peer_ppeds_default_route_be(soc, be_peer,
  665. be_vdev->vdev.vdev_id,
  666. vp_profile->vp_num);
  667. return qdf_status;
  668. }
  669. #endif
  670. #else
  671. static QDF_STATUS dp_ppeds_init_soc_be(struct dp_soc *soc)
  672. {
  673. return QDF_STATUS_SUCCESS;
  674. }
  675. static QDF_STATUS dp_ppeds_deinit_soc_be(struct dp_soc *soc)
  676. {
  677. return QDF_STATUS_SUCCESS;
  678. }
  679. static inline QDF_STATUS dp_soc_ppeds_attach_be(struct dp_soc *soc)
  680. {
  681. return QDF_STATUS_SUCCESS;
  682. }
  683. static inline QDF_STATUS dp_soc_ppeds_detach_be(struct dp_soc *soc)
  684. {
  685. return QDF_STATUS_SUCCESS;
  686. }
  687. QDF_STATUS dp_peer_setup_ppeds_be(struct dp_soc *soc, struct dp_peer *peer,
  688. struct dp_vdev_be *be_vdev,
  689. void *args)
  690. {
  691. return QDF_STATUS_SUCCESS;
  692. }
  693. static inline void dp_ppeds_stop_soc_be(struct dp_soc *soc)
  694. {
  695. }
  696. #endif /* WLAN_SUPPORT_PPEDS */
  697. void dp_reo_shared_qaddr_detach(struct dp_soc *soc)
  698. {
  699. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  700. REO_QUEUE_REF_ML_TABLE_SIZE,
  701. soc->reo_qref.mlo_reo_qref_table_vaddr,
  702. soc->reo_qref.mlo_reo_qref_table_paddr, 0);
  703. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  704. REO_QUEUE_REF_NON_ML_TABLE_SIZE,
  705. soc->reo_qref.non_mlo_reo_qref_table_vaddr,
  706. soc->reo_qref.non_mlo_reo_qref_table_paddr, 0);
  707. }
  708. static QDF_STATUS dp_soc_detach_be(struct dp_soc *soc)
  709. {
  710. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  711. int i = 0;
  712. dp_soc_ppeds_detach_be(soc);
  713. dp_reo_shared_qaddr_detach(soc);
  714. for (i = 0; i < MAX_TXDESC_POOLS; i++)
  715. dp_hw_cookie_conversion_detach(be_soc,
  716. &be_soc->tx_cc_ctx[i]);
  717. for (i = 0; i < MAX_RXDESC_POOLS; i++)
  718. dp_hw_cookie_conversion_detach(be_soc,
  719. &be_soc->rx_cc_ctx[i]);
  720. qdf_mem_free(be_soc->page_desc_base);
  721. be_soc->page_desc_base = NULL;
  722. return QDF_STATUS_SUCCESS;
  723. }
  724. #ifdef QCA_SUPPORT_DP_GLOBAL_CTX
  725. static void dp_set_rx_fst_be(struct dp_rx_fst *fst)
  726. {
  727. struct dp_global_context *dp_global = wlan_objmgr_get_global_ctx();
  728. if (dp_global)
  729. dp_global->fst_ctx = fst;
  730. }
  731. static struct dp_rx_fst *dp_get_rx_fst_be(void)
  732. {
  733. struct dp_global_context *dp_global = wlan_objmgr_get_global_ctx();
  734. if (dp_global)
  735. return dp_global->fst_ctx;
  736. return NULL;
  737. }
  738. static uint32_t dp_rx_fst_release_ref_be(void)
  739. {
  740. struct dp_global_context *dp_global = wlan_objmgr_get_global_ctx();
  741. uint32_t rx_fst_ref_cnt;
  742. if (dp_global) {
  743. rx_fst_ref_cnt = qdf_atomic_read(&dp_global->rx_fst_ref_cnt);
  744. qdf_atomic_dec(&dp_global->rx_fst_ref_cnt);
  745. return rx_fst_ref_cnt;
  746. }
  747. return 1;
  748. }
  749. static void dp_rx_fst_get_ref_be(void)
  750. {
  751. struct dp_global_context *dp_global = wlan_objmgr_get_global_ctx();
  752. if (dp_global)
  753. qdf_atomic_inc(&dp_global->rx_fst_ref_cnt);
  754. }
  755. #else
  756. static void dp_set_rx_fst_be(struct dp_rx_fst *fst)
  757. {
  758. }
  759. static struct dp_rx_fst *dp_get_rx_fst_be(void)
  760. {
  761. return NULL;
  762. }
  763. static uint32_t dp_rx_fst_release_ref_be(void)
  764. {
  765. return 1;
  766. }
  767. static void dp_rx_fst_get_ref_be(void)
  768. {
  769. }
  770. #endif
  771. #ifdef WLAN_MLO_MULTI_CHIP
  772. #ifdef WLAN_MCAST_MLO
  773. static inline void
  774. dp_mlo_mcast_init(struct dp_soc *soc, struct dp_vdev *vdev)
  775. {
  776. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  777. be_vdev->mcast_primary = false;
  778. be_vdev->seq_num = 0;
  779. hal_tx_mcast_mlo_reinject_routing_set(
  780. soc->hal_soc,
  781. HAL_TX_MCAST_MLO_REINJECT_TQM_NOTIFY);
  782. if (vdev->opmode == wlan_op_mode_ap) {
  783. hal_tx_vdev_mcast_ctrl_set(vdev->pdev->soc->hal_soc,
  784. vdev->vdev_id,
  785. HAL_TX_MCAST_CTRL_FW_EXCEPTION);
  786. }
  787. }
  788. static inline void
  789. dp_mlo_mcast_deinit(struct dp_soc *soc, struct dp_vdev *vdev)
  790. {
  791. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  792. be_vdev->seq_num = 0;
  793. be_vdev->mcast_primary = false;
  794. vdev->mlo_vdev = 0;
  795. }
  796. #else
  797. static inline void
  798. dp_mlo_mcast_init(struct dp_soc *soc, struct dp_vdev *vdev)
  799. {
  800. }
  801. static inline void
  802. dp_mlo_mcast_deinit(struct dp_soc *soc, struct dp_vdev *vdev)
  803. {
  804. }
  805. #endif
  806. static void dp_mlo_init_ptnr_list(struct dp_vdev *vdev)
  807. {
  808. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  809. qdf_mem_set(be_vdev->partner_vdev_list,
  810. WLAN_MAX_MLO_CHIPS * WLAN_MAX_MLO_LINKS_PER_SOC,
  811. CDP_INVALID_VDEV_ID);
  812. qdf_mem_set(be_vdev->bridge_vdev_list,
  813. WLAN_MAX_MLO_CHIPS * WLAN_MAX_MLO_LINKS_PER_SOC,
  814. CDP_INVALID_VDEV_ID);
  815. }
  816. static void dp_get_rx_hash_key_be(struct dp_soc *soc,
  817. struct cdp_lro_hash_config *lro_hash)
  818. {
  819. dp_mlo_get_rx_hash_key(soc, lro_hash);
  820. }
  821. #else
  822. static inline void
  823. dp_mlo_mcast_init(struct dp_soc *soc, struct dp_vdev *vdev)
  824. {
  825. }
  826. static inline void
  827. dp_mlo_mcast_deinit(struct dp_soc *soc, struct dp_vdev *vdev)
  828. {
  829. }
  830. static void dp_mlo_init_ptnr_list(struct dp_vdev *vdev)
  831. {
  832. }
  833. static void dp_get_rx_hash_key_be(struct dp_soc *soc,
  834. struct cdp_lro_hash_config *lro_hash)
  835. {
  836. dp_get_rx_hash_key_bytes(lro_hash);
  837. }
  838. #endif
  839. static QDF_STATUS dp_soc_attach_be(struct dp_soc *soc,
  840. struct cdp_soc_attach_params *params)
  841. {
  842. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  843. QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
  844. uint32_t max_tx_rx_desc_num, num_spt_pages;
  845. uint32_t num_entries;
  846. int i = 0;
  847. max_tx_rx_desc_num = WLAN_CFG_NUM_TX_DESC_MAX * MAX_TXDESC_POOLS +
  848. WLAN_CFG_RX_SW_DESC_NUM_SIZE_MAX * MAX_RXDESC_POOLS +
  849. WLAN_CFG_NUM_PPEDS_TX_DESC_MAX * MAX_PPE_TXDESC_POOLS;
  850. /* estimate how many SPT DDR pages needed */
  851. num_spt_pages = max_tx_rx_desc_num / DP_CC_SPT_PAGE_MAX_ENTRIES;
  852. num_spt_pages = num_spt_pages <= DP_CC_PPT_MAX_ENTRIES ?
  853. num_spt_pages : DP_CC_PPT_MAX_ENTRIES;
  854. be_soc->page_desc_base = qdf_mem_malloc(
  855. DP_CC_PPT_MAX_ENTRIES * sizeof(struct dp_spt_page_desc));
  856. if (!be_soc->page_desc_base) {
  857. dp_err("spt page descs allocation failed");
  858. return QDF_STATUS_E_NOMEM;
  859. }
  860. soc->wbm_sw0_bm_id = hal_tx_get_wbm_sw0_bm_id();
  861. qdf_status = dp_get_cmem_allocation(soc, COOKIE_CONVERSION);
  862. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  863. goto fail;
  864. dp_soc_mlo_fill_params(soc, params);
  865. qdf_status = dp_soc_ppeds_attach_be(soc);
  866. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  867. goto fail;
  868. for (i = 0; i < MAX_TXDESC_POOLS; i++) {
  869. num_entries = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  870. qdf_status =
  871. dp_hw_cookie_conversion_attach(be_soc,
  872. &be_soc->tx_cc_ctx[i],
  873. num_entries,
  874. QDF_DP_TX_DESC_TYPE, i);
  875. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  876. goto fail;
  877. }
  878. for (i = 0; i < MAX_RXDESC_POOLS; i++) {
  879. num_entries =
  880. wlan_cfg_get_dp_soc_rx_sw_desc_num(soc->wlan_cfg_ctx);
  881. qdf_status =
  882. dp_hw_cookie_conversion_attach(be_soc,
  883. &be_soc->rx_cc_ctx[i],
  884. num_entries,
  885. QDF_DP_RX_DESC_BUF_TYPE,
  886. i);
  887. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  888. goto fail;
  889. }
  890. return qdf_status;
  891. fail:
  892. dp_soc_detach_be(soc);
  893. return qdf_status;
  894. }
  895. static QDF_STATUS dp_soc_deinit_be(struct dp_soc *soc)
  896. {
  897. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  898. int i = 0;
  899. qdf_atomic_set(&soc->cmn_init_done, 0);
  900. dp_ppeds_stop_soc_be(soc);
  901. dp_tx_deinit_bank_profiles(be_soc);
  902. for (i = 0; i < MAX_TXDESC_POOLS; i++)
  903. dp_hw_cookie_conversion_deinit(be_soc,
  904. &be_soc->tx_cc_ctx[i]);
  905. for (i = 0; i < MAX_RXDESC_POOLS; i++)
  906. dp_hw_cookie_conversion_deinit(be_soc,
  907. &be_soc->rx_cc_ctx[i]);
  908. dp_ppeds_deinit_soc_be(soc);
  909. return QDF_STATUS_SUCCESS;
  910. }
  911. static QDF_STATUS dp_soc_deinit_be_wrapper(struct dp_soc *soc)
  912. {
  913. QDF_STATUS qdf_status;
  914. qdf_status = dp_soc_deinit_be(soc);
  915. if (QDF_IS_STATUS_ERROR(qdf_status))
  916. return qdf_status;
  917. dp_soc_deinit(soc);
  918. return QDF_STATUS_SUCCESS;
  919. }
  920. static void *dp_soc_init_be(struct dp_soc *soc, HTC_HANDLE htc_handle,
  921. struct hif_opaque_softc *hif_handle)
  922. {
  923. QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
  924. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  925. int i = 0;
  926. void *ret_addr;
  927. wlan_minidump_log(soc, sizeof(*soc), soc->ctrl_psoc,
  928. WLAN_MD_DP_SOC, "dp_soc");
  929. soc->hif_handle = hif_handle;
  930. soc->hal_soc = hif_get_hal_handle(soc->hif_handle);
  931. if (!soc->hal_soc)
  932. return NULL;
  933. dp_ppeds_init_soc_be(soc);
  934. for (i = 0; i < MAX_TXDESC_POOLS; i++) {
  935. qdf_status =
  936. dp_hw_cookie_conversion_init(be_soc,
  937. &be_soc->tx_cc_ctx[i]);
  938. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  939. goto fail;
  940. }
  941. for (i = 0; i < MAX_RXDESC_POOLS; i++) {
  942. qdf_status =
  943. dp_hw_cookie_conversion_init(be_soc,
  944. &be_soc->rx_cc_ctx[i]);
  945. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  946. goto fail;
  947. }
  948. /* route vdev_id mismatch notification via FW completion */
  949. hal_tx_vdev_mismatch_routing_set(soc->hal_soc,
  950. HAL_TX_VDEV_MISMATCH_FW_NOTIFY);
  951. qdf_status = dp_tx_init_bank_profiles(be_soc);
  952. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  953. goto fail;
  954. /* write WBM/REO cookie conversion CFG register */
  955. dp_cc_reg_cfg_init(soc, true);
  956. ret_addr = dp_soc_init(soc, htc_handle, hif_handle);
  957. if (!ret_addr)
  958. goto fail;
  959. return ret_addr;
  960. fail:
  961. dp_soc_deinit_be(soc);
  962. return NULL;
  963. }
  964. static QDF_STATUS dp_pdev_attach_be(struct dp_pdev *pdev,
  965. struct cdp_pdev_attach_params *params)
  966. {
  967. dp_pdev_mlo_fill_params(pdev, params);
  968. return QDF_STATUS_SUCCESS;
  969. }
  970. static QDF_STATUS dp_pdev_detach_be(struct dp_pdev *pdev)
  971. {
  972. dp_mlo_update_link_to_pdev_unmap(pdev->soc, pdev);
  973. return QDF_STATUS_SUCCESS;
  974. }
  975. #ifdef INTRA_BSS_FWD_OFFLOAD
  976. static
  977. void dp_vdev_set_intra_bss(struct dp_soc *soc, uint16_t vdev_id, bool enable)
  978. {
  979. soc->cdp_soc.ol_ops->vdev_set_intra_bss(soc->ctrl_psoc, vdev_id,
  980. enable);
  981. }
  982. #else
  983. static
  984. void dp_vdev_set_intra_bss(struct dp_soc *soc, uint16_t vdev_id, bool enable)
  985. {
  986. }
  987. #endif
  988. static QDF_STATUS dp_vdev_attach_be(struct dp_soc *soc, struct dp_vdev *vdev)
  989. {
  990. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  991. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  992. struct dp_pdev *pdev = vdev->pdev;
  993. if (vdev->opmode == wlan_op_mode_monitor)
  994. return QDF_STATUS_SUCCESS;
  995. be_vdev->vdev_id_check_en = DP_TX_VDEV_ID_CHECK_ENABLE;
  996. be_vdev->bank_id = dp_tx_get_bank_profile(be_soc, be_vdev);
  997. vdev->bank_id = be_vdev->bank_id;
  998. if (be_vdev->bank_id == DP_BE_INVALID_BANK_ID) {
  999. QDF_BUG(0);
  1000. return QDF_STATUS_E_FAULT;
  1001. }
  1002. if (vdev->opmode == wlan_op_mode_sta) {
  1003. if (soc->cdp_soc.ol_ops->set_mec_timer)
  1004. soc->cdp_soc.ol_ops->set_mec_timer(
  1005. soc->ctrl_psoc,
  1006. vdev->vdev_id,
  1007. DP_AST_AGING_TIMER_DEFAULT_MS);
  1008. if (pdev->isolation)
  1009. hal_tx_vdev_mcast_ctrl_set(soc->hal_soc, vdev->vdev_id,
  1010. HAL_TX_MCAST_CTRL_FW_EXCEPTION);
  1011. else
  1012. hal_tx_vdev_mcast_ctrl_set(soc->hal_soc, vdev->vdev_id,
  1013. HAL_TX_MCAST_CTRL_MEC_NOTIFY);
  1014. } else if (vdev->ap_bridge_enabled) {
  1015. dp_vdev_set_intra_bss(soc, vdev->vdev_id, true);
  1016. }
  1017. dp_mlo_mcast_init(soc, vdev);
  1018. dp_mlo_init_ptnr_list(vdev);
  1019. return QDF_STATUS_SUCCESS;
  1020. }
  1021. static QDF_STATUS dp_vdev_detach_be(struct dp_soc *soc, struct dp_vdev *vdev)
  1022. {
  1023. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1024. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  1025. if (vdev->opmode == wlan_op_mode_monitor)
  1026. return QDF_STATUS_SUCCESS;
  1027. if (vdev->opmode == wlan_op_mode_ap)
  1028. dp_mlo_mcast_deinit(soc, vdev);
  1029. dp_tx_put_bank_profile(be_soc, be_vdev);
  1030. dp_clr_mlo_ptnr_list(soc, vdev);
  1031. return QDF_STATUS_SUCCESS;
  1032. }
  1033. #ifdef WLAN_SUPPORT_PPEDS
  1034. static void dp_soc_txrx_peer_setup_be(struct dp_soc *soc, uint8_t vdev_id,
  1035. uint8_t *peer_mac)
  1036. {
  1037. struct dp_vdev_be *be_vdev;
  1038. QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
  1039. struct dp_soc_be *be_soc;
  1040. struct cdp_ds_vp_params vp_params = {0};
  1041. struct cdp_soc_t *cdp_soc;
  1042. enum wlan_op_mode vdev_opmode;
  1043. struct dp_peer *peer;
  1044. struct dp_peer *tgt_peer = NULL;
  1045. struct dp_soc *tgt_soc = NULL;
  1046. peer = dp_peer_find_hash_find(soc, peer_mac, 0, vdev_id, DP_MOD_ID_CDP);
  1047. if (!peer)
  1048. return;
  1049. vdev_opmode = peer->vdev->opmode;
  1050. if (vdev_opmode != wlan_op_mode_ap &&
  1051. vdev_opmode != wlan_op_mode_sta) {
  1052. dp_peer_unref_delete(peer, DP_MOD_ID_CDP);
  1053. return;
  1054. }
  1055. tgt_peer = dp_get_tgt_peer_from_peer(peer);
  1056. tgt_soc = tgt_peer->vdev->pdev->soc;
  1057. be_soc = dp_get_be_soc_from_dp_soc(tgt_soc);
  1058. cdp_soc = &tgt_soc->cdp_soc;
  1059. be_vdev = dp_get_be_vdev_from_dp_vdev(tgt_peer->vdev);
  1060. if (!be_vdev) {
  1061. qdf_err("BE vap is null");
  1062. qdf_status = QDF_STATUS_E_NULL_VALUE;
  1063. goto fail;
  1064. }
  1065. /*
  1066. * Extract the VP profile from the VAP
  1067. */
  1068. if (!cdp_soc->ol_ops->get_ppeds_profile_info_for_vap) {
  1069. dp_err("%pK: Register get ppeds profile info first", cdp_soc);
  1070. qdf_status = QDF_STATUS_E_NULL_VALUE;
  1071. goto fail;
  1072. }
  1073. /*
  1074. * Check if PPE DS routing is enabled on the associated vap.
  1075. */
  1076. qdf_status =
  1077. cdp_soc->ol_ops->get_ppeds_profile_info_for_vap(tgt_soc->ctrl_psoc,
  1078. tgt_peer->vdev->vdev_id,
  1079. &vp_params);
  1080. if (qdf_status == QDF_STATUS_E_NULL_VALUE) {
  1081. dp_err("%pK: Could not find ppeds profile info vdev", be_vdev);
  1082. qdf_status = QDF_STATUS_E_NULL_VALUE;
  1083. goto fail;
  1084. }
  1085. if (vp_params.ppe_vp_type == PPE_VP_USER_TYPE_DS) {
  1086. qdf_status = dp_peer_setup_ppeds_be(tgt_soc, tgt_peer, be_vdev,
  1087. (void *)&be_soc->ppe_vp_profile[vp_params.ppe_vp_profile_idx]);
  1088. }
  1089. fail:
  1090. dp_peer_unref_delete(peer, DP_MOD_ID_CDP);
  1091. if (!QDF_IS_STATUS_SUCCESS(qdf_status)) {
  1092. dp_err("Unable to do ppeds peer setup");
  1093. qdf_assert_always(0);
  1094. }
  1095. }
  1096. #else
  1097. static inline
  1098. void dp_soc_txrx_peer_setup_be(struct dp_soc *soc, uint8_t vdev_id,
  1099. uint8_t *peer_mac)
  1100. {
  1101. }
  1102. #endif
  1103. static QDF_STATUS dp_peer_setup_be(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  1104. uint8_t *peer_mac,
  1105. struct cdp_peer_setup_info *setup_info)
  1106. {
  1107. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  1108. QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
  1109. qdf_status = dp_peer_setup_wifi3(soc_hdl, vdev_id, peer_mac,
  1110. setup_info);
  1111. if (!QDF_IS_STATUS_SUCCESS(qdf_status)) {
  1112. dp_err("Unable to dp peer setup");
  1113. return qdf_status;
  1114. }
  1115. dp_soc_txrx_peer_setup_be(soc, vdev_id, peer_mac);
  1116. return QDF_STATUS_SUCCESS;
  1117. }
  1118. qdf_size_t dp_get_soc_context_size_be(void)
  1119. {
  1120. return sizeof(struct dp_soc_be);
  1121. }
  1122. #ifdef CONFIG_WORD_BASED_TLV
  1123. /**
  1124. * dp_rxdma_ring_wmask_cfg_be() - Setup RXDMA ring word mask config
  1125. * @soc: Common DP soc handle
  1126. * @htt_tlv_filter: Rx SRNG TLV and filter setting
  1127. *
  1128. * Return: none
  1129. */
  1130. static inline void
  1131. dp_rxdma_ring_wmask_cfg_be(struct dp_soc *soc,
  1132. struct htt_rx_ring_tlv_filter *htt_tlv_filter)
  1133. {
  1134. htt_tlv_filter->rx_msdu_end_wmask =
  1135. hal_rx_msdu_end_wmask_get(soc->hal_soc);
  1136. htt_tlv_filter->rx_mpdu_start_wmask =
  1137. hal_rx_mpdu_start_wmask_get(soc->hal_soc);
  1138. }
  1139. #else
  1140. static inline void
  1141. dp_rxdma_ring_wmask_cfg_be(struct dp_soc *soc,
  1142. struct htt_rx_ring_tlv_filter *htt_tlv_filter)
  1143. {
  1144. }
  1145. #endif
  1146. #ifdef WLAN_SUPPORT_PPEDS
  1147. static
  1148. void dp_free_ppeds_interrupts(struct dp_soc *soc, struct dp_srng *srng,
  1149. int ring_type, int ring_num)
  1150. {
  1151. if (srng->irq >= 0) {
  1152. qdf_dev_clear_irq_status_flags(srng->irq, IRQ_DISABLE_UNLAZY);
  1153. if (ring_type == WBM2SW_RELEASE &&
  1154. ring_num == WBM2_SW_PPE_REL_RING_ID)
  1155. pld_pfrm_free_irq(soc->osdev->dev, srng->irq, soc);
  1156. else if (ring_type == REO2PPE || ring_type == PPE2TCL)
  1157. pld_pfrm_free_irq(soc->osdev->dev, srng->irq,
  1158. dp_get_ppe_ds_ctxt(soc));
  1159. }
  1160. }
  1161. static
  1162. int dp_register_ppeds_interrupts(struct dp_soc *soc, struct dp_srng *srng,
  1163. int vector, int ring_type, int ring_num)
  1164. {
  1165. int irq = -1, ret = 0;
  1166. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1167. int pci_slot = pld_get_pci_slot(soc->osdev->dev);
  1168. srng->irq = -1;
  1169. irq = pld_get_msi_irq(soc->osdev->dev, vector);
  1170. qdf_dev_set_irq_status_flags(irq, IRQ_DISABLE_UNLAZY);
  1171. if (ring_type == WBM2SW_RELEASE &&
  1172. ring_num == WBM2_SW_PPE_REL_RING_ID) {
  1173. snprintf(be_soc->irq_name[2], DP_PPE_INTR_STRNG_LEN,
  1174. "pci%d_ppe_wbm_rel", pci_slot);
  1175. ret = pld_pfrm_request_irq(soc->osdev->dev, irq,
  1176. dp_ppeds_handle_tx_comp,
  1177. IRQF_SHARED | IRQF_NO_SUSPEND,
  1178. be_soc->irq_name[2], (void *)soc);
  1179. if (ret)
  1180. goto fail;
  1181. } else if (ring_type == REO2PPE && be_soc->ppeds_int_mode_enabled) {
  1182. snprintf(be_soc->irq_name[0], DP_PPE_INTR_STRNG_LEN,
  1183. "pci%d_reo2ppe", pci_slot);
  1184. ret = pld_pfrm_request_irq(soc->osdev->dev, irq,
  1185. dp_ppe_ds_reo2ppe_irq_handler,
  1186. IRQF_SHARED | IRQF_NO_SUSPEND,
  1187. be_soc->irq_name[0],
  1188. dp_get_ppe_ds_ctxt(soc));
  1189. if (ret)
  1190. goto fail;
  1191. } else if (ring_type == PPE2TCL && be_soc->ppeds_int_mode_enabled) {
  1192. snprintf(be_soc->irq_name[1], DP_PPE_INTR_STRNG_LEN,
  1193. "pci%d_ppe2tcl", pci_slot);
  1194. ret = pld_pfrm_request_irq(soc->osdev->dev, irq,
  1195. dp_ppe_ds_ppe2tcl_irq_handler,
  1196. IRQF_NO_SUSPEND,
  1197. be_soc->irq_name[1],
  1198. dp_get_ppe_ds_ctxt(soc));
  1199. if (ret)
  1200. goto fail;
  1201. pld_pfrm_disable_irq_nosync(soc->osdev->dev, irq);
  1202. } else {
  1203. return 0;
  1204. }
  1205. srng->irq = irq;
  1206. dp_info("Registered irq %d for soc %pK ring type %d",
  1207. irq, soc, ring_type);
  1208. return 0;
  1209. fail:
  1210. dp_err("Unable to config irq : ring type %d irq %d vector %d",
  1211. ring_type, irq, vector);
  1212. qdf_dev_clear_irq_status_flags(irq, IRQ_DISABLE_UNLAZY);
  1213. return ret;
  1214. }
  1215. void dp_ppeds_disable_irq(struct dp_soc *soc, struct dp_srng *srng)
  1216. {
  1217. if (srng->irq >= 0)
  1218. pld_pfrm_disable_irq_nosync(soc->osdev->dev, srng->irq);
  1219. }
  1220. void dp_ppeds_enable_irq(struct dp_soc *soc, struct dp_srng *srng)
  1221. {
  1222. if (srng->irq >= 0)
  1223. pld_pfrm_enable_irq(soc->osdev->dev, srng->irq);
  1224. }
  1225. #endif
  1226. #ifdef NO_RX_PKT_HDR_TLV
  1227. /**
  1228. * dp_rxdma_ring_sel_cfg_be() - Setup RXDMA ring config
  1229. * @soc: Common DP soc handle
  1230. *
  1231. * Return: QDF_STATUS
  1232. */
  1233. static QDF_STATUS
  1234. dp_rxdma_ring_sel_cfg_be(struct dp_soc *soc)
  1235. {
  1236. int i;
  1237. int mac_id;
  1238. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  1239. struct dp_srng *rx_mac_srng;
  1240. QDF_STATUS status = QDF_STATUS_SUCCESS;
  1241. /*
  1242. * In Beryllium chipset msdu_start, mpdu_end
  1243. * and rx_attn are part of msdu_end/mpdu_start
  1244. */
  1245. htt_tlv_filter.msdu_start = 0;
  1246. htt_tlv_filter.mpdu_end = 0;
  1247. htt_tlv_filter.attention = 0;
  1248. htt_tlv_filter.mpdu_start = 1;
  1249. htt_tlv_filter.msdu_end = 1;
  1250. htt_tlv_filter.packet = 1;
  1251. htt_tlv_filter.packet_header = 0;
  1252. htt_tlv_filter.ppdu_start = 0;
  1253. htt_tlv_filter.ppdu_end = 0;
  1254. htt_tlv_filter.ppdu_end_user_stats = 0;
  1255. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  1256. htt_tlv_filter.ppdu_end_status_done = 0;
  1257. htt_tlv_filter.enable_fp = 1;
  1258. htt_tlv_filter.enable_md = 0;
  1259. htt_tlv_filter.enable_md = 0;
  1260. htt_tlv_filter.enable_mo = 0;
  1261. htt_tlv_filter.fp_mgmt_filter = 0;
  1262. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_BA_REQ;
  1263. htt_tlv_filter.fp_data_filter = (FILTER_DATA_UCAST |
  1264. FILTER_DATA_DATA);
  1265. htt_tlv_filter.fp_data_filter |=
  1266. hal_rx_en_mcast_fp_data_filter(soc->hal_soc) ?
  1267. FILTER_DATA_MCAST : 0;
  1268. htt_tlv_filter.mo_mgmt_filter = 0;
  1269. htt_tlv_filter.mo_ctrl_filter = 0;
  1270. htt_tlv_filter.mo_data_filter = 0;
  1271. htt_tlv_filter.md_data_filter = 0;
  1272. htt_tlv_filter.offset_valid = true;
  1273. /* Not subscribing to mpdu_end, msdu_start and rx_attn */
  1274. htt_tlv_filter.rx_mpdu_end_offset = 0;
  1275. htt_tlv_filter.rx_msdu_start_offset = 0;
  1276. htt_tlv_filter.rx_attn_offset = 0;
  1277. /*
  1278. * For monitor mode, the packet hdr tlv is enabled later during
  1279. * filter update
  1280. */
  1281. if (soc->cdp_soc.ol_ops->get_con_mode &&
  1282. soc->cdp_soc.ol_ops->get_con_mode() == QDF_GLOBAL_MONITOR_MODE)
  1283. htt_tlv_filter.rx_packet_offset = soc->rx_mon_pkt_tlv_size;
  1284. else
  1285. htt_tlv_filter.rx_packet_offset = soc->rx_pkt_tlv_size;
  1286. /*Not subscribing rx_pkt_header*/
  1287. htt_tlv_filter.rx_header_offset = 0;
  1288. htt_tlv_filter.rx_mpdu_start_offset =
  1289. hal_rx_mpdu_start_offset_get(soc->hal_soc);
  1290. htt_tlv_filter.rx_msdu_end_offset =
  1291. hal_rx_msdu_end_offset_get(soc->hal_soc);
  1292. dp_rxdma_ring_wmask_cfg_be(soc, &htt_tlv_filter);
  1293. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1294. struct dp_pdev *pdev = soc->pdev_list[i];
  1295. if (!pdev)
  1296. continue;
  1297. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  1298. int mac_for_pdev =
  1299. dp_get_mac_id_for_pdev(mac_id, pdev->pdev_id);
  1300. /*
  1301. * Obtain lmac id from pdev to access the LMAC ring
  1302. * in soc context
  1303. */
  1304. int lmac_id =
  1305. dp_get_lmac_id_for_pdev_id(soc, mac_id,
  1306. pdev->pdev_id);
  1307. rx_mac_srng = dp_get_rxdma_ring(pdev, lmac_id);
  1308. if (!rx_mac_srng->hal_srng)
  1309. continue;
  1310. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  1311. rx_mac_srng->hal_srng,
  1312. RXDMA_BUF, RX_DATA_BUFFER_SIZE,
  1313. &htt_tlv_filter);
  1314. }
  1315. }
  1316. return status;
  1317. }
  1318. #else
  1319. /**
  1320. * dp_rxdma_ring_sel_cfg_be() - Setup RXDMA ring config
  1321. * @soc: Common DP soc handle
  1322. *
  1323. * Return: QDF_STATUS
  1324. */
  1325. static QDF_STATUS
  1326. dp_rxdma_ring_sel_cfg_be(struct dp_soc *soc)
  1327. {
  1328. int i;
  1329. int mac_id;
  1330. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  1331. struct dp_srng *rx_mac_srng;
  1332. QDF_STATUS status = QDF_STATUS_SUCCESS;
  1333. /*
  1334. * In Beryllium chipset msdu_start, mpdu_end
  1335. * and rx_attn are part of msdu_end/mpdu_start
  1336. */
  1337. htt_tlv_filter.msdu_start = 0;
  1338. htt_tlv_filter.mpdu_end = 0;
  1339. htt_tlv_filter.attention = 0;
  1340. htt_tlv_filter.mpdu_start = 1;
  1341. htt_tlv_filter.msdu_end = 1;
  1342. htt_tlv_filter.packet = 1;
  1343. htt_tlv_filter.packet_header = 1;
  1344. htt_tlv_filter.ppdu_start = 0;
  1345. htt_tlv_filter.ppdu_end = 0;
  1346. htt_tlv_filter.ppdu_end_user_stats = 0;
  1347. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  1348. htt_tlv_filter.ppdu_end_status_done = 0;
  1349. htt_tlv_filter.enable_fp = 1;
  1350. htt_tlv_filter.enable_md = 0;
  1351. htt_tlv_filter.enable_md = 0;
  1352. htt_tlv_filter.enable_mo = 0;
  1353. htt_tlv_filter.fp_mgmt_filter = 0;
  1354. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_BA_REQ;
  1355. htt_tlv_filter.fp_data_filter = (FILTER_DATA_UCAST |
  1356. FILTER_DATA_DATA);
  1357. htt_tlv_filter.fp_data_filter |=
  1358. hal_rx_en_mcast_fp_data_filter(soc->hal_soc) ?
  1359. FILTER_DATA_MCAST : 0;
  1360. htt_tlv_filter.mo_mgmt_filter = 0;
  1361. htt_tlv_filter.mo_ctrl_filter = 0;
  1362. htt_tlv_filter.mo_data_filter = 0;
  1363. htt_tlv_filter.md_data_filter = 0;
  1364. htt_tlv_filter.offset_valid = true;
  1365. /* Not subscribing to mpdu_end, msdu_start and rx_attn */
  1366. htt_tlv_filter.rx_mpdu_end_offset = 0;
  1367. htt_tlv_filter.rx_msdu_start_offset = 0;
  1368. htt_tlv_filter.rx_attn_offset = 0;
  1369. /*
  1370. * For monitor mode, the packet hdr tlv is enabled later during
  1371. * filter update
  1372. */
  1373. if (soc->cdp_soc.ol_ops->get_con_mode &&
  1374. soc->cdp_soc.ol_ops->get_con_mode() == QDF_GLOBAL_MONITOR_MODE)
  1375. htt_tlv_filter.rx_packet_offset = soc->rx_mon_pkt_tlv_size;
  1376. else
  1377. htt_tlv_filter.rx_packet_offset = soc->rx_pkt_tlv_size;
  1378. htt_tlv_filter.rx_header_offset =
  1379. hal_rx_pkt_tlv_offset_get(soc->hal_soc);
  1380. htt_tlv_filter.rx_mpdu_start_offset =
  1381. hal_rx_mpdu_start_offset_get(soc->hal_soc);
  1382. htt_tlv_filter.rx_msdu_end_offset =
  1383. hal_rx_msdu_end_offset_get(soc->hal_soc);
  1384. dp_info("TLV subscription\n"
  1385. "msdu_start %d, mpdu_end %d, attention %d"
  1386. "mpdu_start %d, msdu_end %d, pkt_hdr %d, pkt %d\n"
  1387. "TLV offsets\n"
  1388. "msdu_start %d, mpdu_end %d, attention %d"
  1389. "mpdu_start %d, msdu_end %d, pkt_hdr %d, pkt %d\n",
  1390. htt_tlv_filter.msdu_start,
  1391. htt_tlv_filter.mpdu_end,
  1392. htt_tlv_filter.attention,
  1393. htt_tlv_filter.mpdu_start,
  1394. htt_tlv_filter.msdu_end,
  1395. htt_tlv_filter.packet_header,
  1396. htt_tlv_filter.packet,
  1397. htt_tlv_filter.rx_msdu_start_offset,
  1398. htt_tlv_filter.rx_mpdu_end_offset,
  1399. htt_tlv_filter.rx_attn_offset,
  1400. htt_tlv_filter.rx_mpdu_start_offset,
  1401. htt_tlv_filter.rx_msdu_end_offset,
  1402. htt_tlv_filter.rx_header_offset,
  1403. htt_tlv_filter.rx_packet_offset);
  1404. dp_rxdma_ring_wmask_cfg_be(soc, &htt_tlv_filter);
  1405. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1406. struct dp_pdev *pdev = soc->pdev_list[i];
  1407. if (!pdev)
  1408. continue;
  1409. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  1410. int mac_for_pdev =
  1411. dp_get_mac_id_for_pdev(mac_id, pdev->pdev_id);
  1412. /*
  1413. * Obtain lmac id from pdev to access the LMAC ring
  1414. * in soc context
  1415. */
  1416. int lmac_id =
  1417. dp_get_lmac_id_for_pdev_id(soc, mac_id,
  1418. pdev->pdev_id);
  1419. rx_mac_srng = dp_get_rxdma_ring(pdev, lmac_id);
  1420. if (!rx_mac_srng->hal_srng)
  1421. continue;
  1422. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  1423. rx_mac_srng->hal_srng,
  1424. RXDMA_BUF, RX_DATA_BUFFER_SIZE,
  1425. &htt_tlv_filter);
  1426. }
  1427. }
  1428. return status;
  1429. }
  1430. #endif
  1431. #ifdef WLAN_FEATURE_NEAR_FULL_IRQ
  1432. /**
  1433. * dp_service_near_full_srngs_be() - Main bottom half callback for the
  1434. * near-full IRQs.
  1435. * @soc: Datapath SoC handle
  1436. * @int_ctx: Interrupt context
  1437. * @dp_budget: Budget of the work that can be done in the bottom half
  1438. *
  1439. * Return: work done in the handler
  1440. */
  1441. static uint32_t
  1442. dp_service_near_full_srngs_be(struct dp_soc *soc, struct dp_intr *int_ctx,
  1443. uint32_t dp_budget)
  1444. {
  1445. int ring = 0;
  1446. int budget = dp_budget;
  1447. uint32_t work_done = 0;
  1448. uint32_t remaining_quota = dp_budget;
  1449. struct dp_intr_stats *intr_stats = &int_ctx->intr_stats;
  1450. int tx_ring_near_full_mask = int_ctx->tx_ring_near_full_mask;
  1451. int rx_near_full_grp_1_mask = int_ctx->rx_near_full_grp_1_mask;
  1452. int rx_near_full_grp_2_mask = int_ctx->rx_near_full_grp_2_mask;
  1453. int rx_near_full_mask = rx_near_full_grp_1_mask |
  1454. rx_near_full_grp_2_mask;
  1455. dp_verbose_debug("rx_ring_near_full 0x%x tx_ring_near_full 0x%x",
  1456. rx_near_full_mask,
  1457. tx_ring_near_full_mask);
  1458. if (rx_near_full_mask) {
  1459. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  1460. if (!(rx_near_full_mask & (1 << ring)))
  1461. continue;
  1462. work_done = dp_rx_nf_process(int_ctx,
  1463. soc->reo_dest_ring[ring].hal_srng,
  1464. ring, remaining_quota);
  1465. if (work_done) {
  1466. intr_stats->num_rx_ring_near_full_masks[ring]++;
  1467. dp_verbose_debug("rx NF mask 0x%x ring %d, work_done %d budget %d",
  1468. rx_near_full_mask, ring,
  1469. work_done,
  1470. budget);
  1471. budget -= work_done;
  1472. if (budget <= 0)
  1473. goto budget_done;
  1474. remaining_quota = budget;
  1475. }
  1476. }
  1477. }
  1478. if (tx_ring_near_full_mask) {
  1479. for (ring = 0; ring < soc->num_tcl_data_rings; ring++) {
  1480. if (!(tx_ring_near_full_mask & (1 << ring)))
  1481. continue;
  1482. work_done = dp_tx_comp_nf_handler(int_ctx, soc,
  1483. soc->tx_comp_ring[ring].hal_srng,
  1484. ring, remaining_quota);
  1485. if (work_done) {
  1486. intr_stats->num_tx_comp_ring_near_full_masks[ring]++;
  1487. dp_verbose_debug("tx NF mask 0x%x ring %d, work_done %d budget %d",
  1488. tx_ring_near_full_mask, ring,
  1489. work_done, budget);
  1490. budget -= work_done;
  1491. if (budget <= 0)
  1492. break;
  1493. remaining_quota = budget;
  1494. }
  1495. }
  1496. }
  1497. intr_stats->num_near_full_masks++;
  1498. budget_done:
  1499. return dp_budget - budget;
  1500. }
  1501. /**
  1502. * dp_srng_test_and_update_nf_params_be() - Check if the srng is in near full
  1503. * state and set the reap_limit appropriately
  1504. * as per the near full state
  1505. * @soc: Datapath soc handle
  1506. * @dp_srng: Datapath handle for SRNG
  1507. * @max_reap_limit: [Output Buffer] Buffer to set the max reap limit as per
  1508. * the srng near-full state
  1509. *
  1510. * Return: 1, if the srng is in near-full state
  1511. * 0, if the srng is not in near-full state
  1512. */
  1513. static int
  1514. dp_srng_test_and_update_nf_params_be(struct dp_soc *soc,
  1515. struct dp_srng *dp_srng,
  1516. int *max_reap_limit)
  1517. {
  1518. return _dp_srng_test_and_update_nf_params(soc, dp_srng, max_reap_limit);
  1519. }
  1520. /**
  1521. * dp_init_near_full_arch_ops_be() - Initialize the arch ops handler for the
  1522. * near full IRQ handling operations.
  1523. * @arch_ops: arch ops handle
  1524. *
  1525. * Return: none
  1526. */
  1527. static inline void
  1528. dp_init_near_full_arch_ops_be(struct dp_arch_ops *arch_ops)
  1529. {
  1530. arch_ops->dp_service_near_full_srngs = dp_service_near_full_srngs_be;
  1531. arch_ops->dp_srng_test_and_update_nf_params =
  1532. dp_srng_test_and_update_nf_params_be;
  1533. }
  1534. #else
  1535. static inline void
  1536. dp_init_near_full_arch_ops_be(struct dp_arch_ops *arch_ops)
  1537. {
  1538. }
  1539. #endif
  1540. static inline
  1541. QDF_STATUS dp_srng_init_be(struct dp_soc *soc, struct dp_srng *srng,
  1542. int ring_type, int ring_num, int mac_id)
  1543. {
  1544. return dp_srng_init_idx(soc, srng, ring_type, ring_num, mac_id, 0);
  1545. }
  1546. #ifdef WLAN_SUPPORT_PPEDS
  1547. static void dp_soc_ppeds_srng_deinit(struct dp_soc *soc)
  1548. {
  1549. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1550. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  1551. soc_cfg_ctx = soc->wlan_cfg_ctx;
  1552. if (!be_soc->ppeds_handle)
  1553. return;
  1554. dp_srng_deinit(soc, &be_soc->ppe2tcl_ring, PPE2TCL, 0);
  1555. wlan_minidump_remove(be_soc->ppe2tcl_ring.base_vaddr_unaligned,
  1556. be_soc->ppe2tcl_ring.alloc_size,
  1557. soc->ctrl_psoc,
  1558. WLAN_MD_DP_SRNG_PPE2TCL,
  1559. "ppe2tcl_ring");
  1560. dp_srng_deinit(soc, &be_soc->reo2ppe_ring, REO2PPE, 0);
  1561. wlan_minidump_remove(be_soc->reo2ppe_ring.base_vaddr_unaligned,
  1562. be_soc->reo2ppe_ring.alloc_size,
  1563. soc->ctrl_psoc,
  1564. WLAN_MD_DP_SRNG_REO2PPE,
  1565. "reo2ppe_ring");
  1566. dp_srng_deinit(soc, &be_soc->ppeds_wbm_release_ring, WBM2SW_RELEASE,
  1567. WBM2_SW_PPE_REL_RING_ID);
  1568. wlan_minidump_remove(be_soc->ppeds_wbm_release_ring.base_vaddr_unaligned,
  1569. be_soc->ppeds_wbm_release_ring.alloc_size,
  1570. soc->ctrl_psoc,
  1571. WLAN_MD_DP_SRNG_PPE_WBM2SW_RELEASE,
  1572. "ppeds_wbm_release_ring");
  1573. }
  1574. static void dp_soc_ppeds_srng_free(struct dp_soc *soc)
  1575. {
  1576. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1577. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  1578. soc_cfg_ctx = soc->wlan_cfg_ctx;
  1579. dp_srng_free(soc, &be_soc->ppeds_wbm_release_ring);
  1580. dp_srng_free(soc, &be_soc->ppe2tcl_ring);
  1581. dp_srng_free(soc, &be_soc->reo2ppe_ring);
  1582. }
  1583. static QDF_STATUS dp_soc_ppeds_srng_alloc(struct dp_soc *soc)
  1584. {
  1585. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1586. uint32_t entries;
  1587. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  1588. soc_cfg_ctx = soc->wlan_cfg_ctx;
  1589. if (!be_soc->ppeds_handle)
  1590. return QDF_STATUS_SUCCESS;
  1591. entries = wlan_cfg_get_dp_soc_reo2ppe_ring_size(soc_cfg_ctx);
  1592. if (dp_srng_alloc(soc, &be_soc->reo2ppe_ring, REO2PPE,
  1593. entries, 0)) {
  1594. dp_err("%pK: dp_srng_alloc failed for reo2ppe", soc);
  1595. goto fail;
  1596. }
  1597. entries = wlan_cfg_get_dp_soc_ppe2tcl_ring_size(soc_cfg_ctx);
  1598. if (dp_srng_alloc(soc, &be_soc->ppe2tcl_ring, PPE2TCL,
  1599. entries, 0)) {
  1600. dp_err("%pK: dp_srng_alloc failed for ppe2tcl_ring", soc);
  1601. goto fail;
  1602. }
  1603. entries = wlan_cfg_tx_comp_ring_size(soc_cfg_ctx);
  1604. if (dp_srng_alloc(soc, &be_soc->ppeds_wbm_release_ring, WBM2SW_RELEASE,
  1605. entries, 1)) {
  1606. dp_err("%pK: dp_srng_alloc failed for ppeds_wbm_release_ring",
  1607. soc);
  1608. goto fail;
  1609. }
  1610. return QDF_STATUS_SUCCESS;
  1611. fail:
  1612. dp_soc_ppeds_srng_free(soc);
  1613. return QDF_STATUS_E_NOMEM;
  1614. }
  1615. static QDF_STATUS dp_soc_ppeds_srng_init(struct dp_soc *soc)
  1616. {
  1617. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1618. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  1619. hal_soc_handle_t hal_soc = soc->hal_soc;
  1620. struct dp_ppe_ds_idxs idx = {0};
  1621. soc_cfg_ctx = soc->wlan_cfg_ctx;
  1622. if (!be_soc->ppeds_handle)
  1623. return QDF_STATUS_SUCCESS;
  1624. if (dp_ppeds_register_soc_be(be_soc, &idx)) {
  1625. dp_err("%pK: ppeds registration failed", soc);
  1626. goto fail;
  1627. }
  1628. if (dp_srng_init_idx(soc, &be_soc->reo2ppe_ring, REO2PPE, 0, 0,
  1629. idx.reo2ppe_start_idx)) {
  1630. dp_err("%pK: dp_srng_init failed for reo2ppe", soc);
  1631. goto fail;
  1632. }
  1633. wlan_minidump_log(be_soc->reo2ppe_ring.base_vaddr_unaligned,
  1634. be_soc->reo2ppe_ring.alloc_size,
  1635. soc->ctrl_psoc,
  1636. WLAN_MD_DP_SRNG_REO2PPE,
  1637. "reo2ppe_ring");
  1638. hal_reo_config_reo2ppe_dest_info(hal_soc);
  1639. if (dp_srng_init_idx(soc, &be_soc->ppe2tcl_ring, PPE2TCL, 0, 0,
  1640. idx.ppe2tcl_start_idx)) {
  1641. dp_err("%pK: dp_srng_init failed for ppe2tcl_ring", soc);
  1642. goto fail;
  1643. }
  1644. wlan_minidump_log(be_soc->ppe2tcl_ring.base_vaddr_unaligned,
  1645. be_soc->ppe2tcl_ring.alloc_size,
  1646. soc->ctrl_psoc,
  1647. WLAN_MD_DP_SRNG_PPE2TCL,
  1648. "ppe2tcl_ring");
  1649. hal_tx_config_rbm_mapping_be(soc->hal_soc,
  1650. be_soc->ppe2tcl_ring.hal_srng,
  1651. WBM2_SW_PPE_REL_MAP_ID);
  1652. if (dp_srng_init(soc, &be_soc->ppeds_wbm_release_ring, WBM2SW_RELEASE,
  1653. WBM2_SW_PPE_REL_RING_ID, 0)) {
  1654. dp_err("%pK: dp_srng_init failed for ppeds_wbm_release_ring",
  1655. soc);
  1656. goto fail;
  1657. }
  1658. wlan_minidump_log(be_soc->ppeds_wbm_release_ring.base_vaddr_unaligned,
  1659. be_soc->ppeds_wbm_release_ring.alloc_size,
  1660. soc->ctrl_psoc, WLAN_MD_DP_SRNG_PPE_WBM2SW_RELEASE,
  1661. "ppeds_wbm_release_ring");
  1662. return QDF_STATUS_SUCCESS;
  1663. fail:
  1664. dp_soc_ppeds_srng_deinit(soc);
  1665. return QDF_STATUS_E_NOMEM;
  1666. }
  1667. #else
  1668. static void dp_soc_ppeds_srng_deinit(struct dp_soc *soc)
  1669. {
  1670. }
  1671. static void dp_soc_ppeds_srng_free(struct dp_soc *soc)
  1672. {
  1673. }
  1674. static QDF_STATUS dp_soc_ppeds_srng_alloc(struct dp_soc *soc)
  1675. {
  1676. return QDF_STATUS_SUCCESS;
  1677. }
  1678. static QDF_STATUS dp_soc_ppeds_srng_init(struct dp_soc *soc)
  1679. {
  1680. return QDF_STATUS_SUCCESS;
  1681. }
  1682. #endif
  1683. static void dp_soc_srng_deinit_be(struct dp_soc *soc)
  1684. {
  1685. uint32_t i;
  1686. dp_soc_ppeds_srng_deinit(soc);
  1687. if (soc->features.dmac_cmn_src_rxbuf_ring_enabled) {
  1688. for (i = 0; i < soc->num_rx_refill_buf_rings; i++) {
  1689. dp_srng_deinit(soc, &soc->rx_refill_buf_ring[i],
  1690. RXDMA_BUF, 0);
  1691. }
  1692. }
  1693. }
  1694. static void dp_soc_srng_free_be(struct dp_soc *soc)
  1695. {
  1696. uint32_t i;
  1697. dp_soc_ppeds_srng_free(soc);
  1698. if (soc->features.dmac_cmn_src_rxbuf_ring_enabled) {
  1699. for (i = 0; i < soc->num_rx_refill_buf_rings; i++)
  1700. dp_srng_free(soc, &soc->rx_refill_buf_ring[i]);
  1701. }
  1702. }
  1703. static QDF_STATUS dp_soc_srng_alloc_be(struct dp_soc *soc)
  1704. {
  1705. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  1706. uint32_t ring_size;
  1707. uint32_t i;
  1708. soc_cfg_ctx = soc->wlan_cfg_ctx;
  1709. ring_size = wlan_cfg_get_dp_soc_rxdma_refill_ring_size(soc_cfg_ctx);
  1710. if (soc->features.dmac_cmn_src_rxbuf_ring_enabled) {
  1711. for (i = 0; i < soc->num_rx_refill_buf_rings; i++) {
  1712. if (dp_srng_alloc(soc, &soc->rx_refill_buf_ring[i],
  1713. RXDMA_BUF, ring_size, 0)) {
  1714. dp_err("%pK: dp_srng_alloc failed refill ring",
  1715. soc);
  1716. goto fail;
  1717. }
  1718. }
  1719. }
  1720. if (dp_soc_ppeds_srng_alloc(soc)) {
  1721. dp_err("%pK: ppe rings alloc failed",
  1722. soc);
  1723. goto fail;
  1724. }
  1725. return QDF_STATUS_SUCCESS;
  1726. fail:
  1727. dp_soc_srng_free_be(soc);
  1728. return QDF_STATUS_E_NOMEM;
  1729. }
  1730. static QDF_STATUS dp_soc_srng_init_be(struct dp_soc *soc)
  1731. {
  1732. int i = 0;
  1733. if (soc->features.dmac_cmn_src_rxbuf_ring_enabled) {
  1734. for (i = 0; i < soc->num_rx_refill_buf_rings; i++) {
  1735. if (dp_srng_init(soc, &soc->rx_refill_buf_ring[i],
  1736. RXDMA_BUF, 0, 0)) {
  1737. dp_err("%pK: dp_srng_init failed refill ring",
  1738. soc);
  1739. goto fail;
  1740. }
  1741. }
  1742. }
  1743. if (dp_soc_ppeds_srng_init(soc)) {
  1744. dp_err("%pK: ppe ds rings init failed",
  1745. soc);
  1746. goto fail;
  1747. }
  1748. return QDF_STATUS_SUCCESS;
  1749. fail:
  1750. dp_soc_srng_deinit_be(soc);
  1751. return QDF_STATUS_E_NOMEM;
  1752. }
  1753. #ifdef WLAN_FEATURE_11BE_MLO
  1754. static inline unsigned
  1755. dp_mlo_peer_find_hash_index(dp_mld_peer_hash_obj_t mld_hash_obj,
  1756. union dp_align_mac_addr *mac_addr)
  1757. {
  1758. uint32_t index;
  1759. index =
  1760. mac_addr->align2.bytes_ab ^
  1761. mac_addr->align2.bytes_cd ^
  1762. mac_addr->align2.bytes_ef;
  1763. index ^= index >> mld_hash_obj->mld_peer_hash.idx_bits;
  1764. index &= mld_hash_obj->mld_peer_hash.mask;
  1765. return index;
  1766. }
  1767. QDF_STATUS
  1768. dp_mlo_peer_find_hash_attach_be(dp_mld_peer_hash_obj_t mld_hash_obj,
  1769. int hash_elems)
  1770. {
  1771. int i, log2;
  1772. if (!mld_hash_obj)
  1773. return QDF_STATUS_E_FAILURE;
  1774. hash_elems *= DP_PEER_HASH_LOAD_MULT;
  1775. hash_elems >>= DP_PEER_HASH_LOAD_SHIFT;
  1776. log2 = dp_log2_ceil(hash_elems);
  1777. hash_elems = 1 << log2;
  1778. mld_hash_obj->mld_peer_hash.mask = hash_elems - 1;
  1779. mld_hash_obj->mld_peer_hash.idx_bits = log2;
  1780. /* allocate an array of TAILQ peer object lists */
  1781. mld_hash_obj->mld_peer_hash.bins = qdf_mem_malloc(
  1782. hash_elems * sizeof(TAILQ_HEAD(anonymous_tail_q, dp_peer)));
  1783. if (!mld_hash_obj->mld_peer_hash.bins)
  1784. return QDF_STATUS_E_NOMEM;
  1785. for (i = 0; i < hash_elems; i++)
  1786. TAILQ_INIT(&mld_hash_obj->mld_peer_hash.bins[i]);
  1787. qdf_spinlock_create(&mld_hash_obj->mld_peer_hash_lock);
  1788. return QDF_STATUS_SUCCESS;
  1789. }
  1790. void
  1791. dp_mlo_peer_find_hash_detach_be(dp_mld_peer_hash_obj_t mld_hash_obj)
  1792. {
  1793. if (!mld_hash_obj)
  1794. return;
  1795. if (mld_hash_obj->mld_peer_hash.bins) {
  1796. qdf_mem_free(mld_hash_obj->mld_peer_hash.bins);
  1797. mld_hash_obj->mld_peer_hash.bins = NULL;
  1798. qdf_spinlock_destroy(&mld_hash_obj->mld_peer_hash_lock);
  1799. }
  1800. }
  1801. #ifdef WLAN_MLO_MULTI_CHIP
  1802. static QDF_STATUS dp_mlo_peer_find_hash_attach_wrapper(struct dp_soc *soc)
  1803. {
  1804. /* In case of MULTI chip MLO peer hash table when MLO global object
  1805. * is created, avoid from SOC attach path
  1806. */
  1807. return QDF_STATUS_SUCCESS;
  1808. }
  1809. static void dp_mlo_peer_find_hash_detach_wrapper(struct dp_soc *soc)
  1810. {
  1811. }
  1812. #else
  1813. static QDF_STATUS dp_mlo_peer_find_hash_attach_wrapper(struct dp_soc *soc)
  1814. {
  1815. dp_mld_peer_hash_obj_t mld_hash_obj;
  1816. mld_hash_obj = dp_mlo_get_peer_hash_obj(soc);
  1817. if (!mld_hash_obj)
  1818. return QDF_STATUS_E_FAILURE;
  1819. return dp_mlo_peer_find_hash_attach_be(mld_hash_obj, soc->max_peers);
  1820. }
  1821. static void dp_mlo_peer_find_hash_detach_wrapper(struct dp_soc *soc)
  1822. {
  1823. dp_mld_peer_hash_obj_t mld_hash_obj;
  1824. mld_hash_obj = dp_mlo_get_peer_hash_obj(soc);
  1825. if (!mld_hash_obj)
  1826. return;
  1827. return dp_mlo_peer_find_hash_detach_be(mld_hash_obj);
  1828. }
  1829. #endif
  1830. #ifdef QCA_ENHANCED_STATS_SUPPORT
  1831. static uint8_t
  1832. dp_get_hw_link_id_be(struct dp_pdev *pdev)
  1833. {
  1834. struct dp_pdev_be *be_pdev = dp_get_be_pdev_from_dp_pdev(pdev);
  1835. return be_pdev->mlo_link_id;
  1836. }
  1837. #else
  1838. static uint8_t
  1839. dp_get_hw_link_id_be(struct dp_pdev *pdev)
  1840. {
  1841. return 0;
  1842. }
  1843. #endif /* QCA_ENHANCED_STATS_SUPPORT */
  1844. static struct dp_peer *
  1845. dp_mlo_peer_find_hash_find_be(struct dp_soc *soc,
  1846. uint8_t *peer_mac_addr,
  1847. int mac_addr_is_aligned,
  1848. enum dp_mod_id mod_id,
  1849. uint8_t vdev_id)
  1850. {
  1851. union dp_align_mac_addr local_mac_addr_aligned, *mac_addr;
  1852. uint32_t index;
  1853. struct dp_peer *peer;
  1854. struct dp_vdev *vdev;
  1855. dp_mld_peer_hash_obj_t mld_hash_obj;
  1856. mld_hash_obj = dp_mlo_get_peer_hash_obj(soc);
  1857. if (!mld_hash_obj)
  1858. return NULL;
  1859. if (!mld_hash_obj->mld_peer_hash.bins)
  1860. return NULL;
  1861. if (mac_addr_is_aligned) {
  1862. mac_addr = (union dp_align_mac_addr *)peer_mac_addr;
  1863. } else {
  1864. qdf_mem_copy(
  1865. &local_mac_addr_aligned.raw[0],
  1866. peer_mac_addr, QDF_MAC_ADDR_SIZE);
  1867. mac_addr = &local_mac_addr_aligned;
  1868. }
  1869. if (vdev_id != DP_VDEV_ALL) {
  1870. vdev = dp_vdev_get_ref_by_id(soc, vdev_id, mod_id);
  1871. if (!vdev) {
  1872. dp_err("vdev is null");
  1873. return NULL;
  1874. }
  1875. } else {
  1876. vdev = NULL;
  1877. }
  1878. /* search mld peer table if no link peer for given mac address */
  1879. index = dp_mlo_peer_find_hash_index(mld_hash_obj, mac_addr);
  1880. qdf_spin_lock_bh(&mld_hash_obj->mld_peer_hash_lock);
  1881. TAILQ_FOREACH(peer, &mld_hash_obj->mld_peer_hash.bins[index],
  1882. hash_list_elem) {
  1883. if (dp_peer_find_mac_addr_cmp(mac_addr, &peer->mac_addr) == 0) {
  1884. if ((vdev_id == DP_VDEV_ALL) || (
  1885. dp_peer_find_mac_addr_cmp(
  1886. &peer->vdev->mld_mac_addr,
  1887. &vdev->mld_mac_addr) == 0)) {
  1888. /* take peer reference before returning */
  1889. if (dp_peer_get_ref(NULL, peer, mod_id) !=
  1890. QDF_STATUS_SUCCESS)
  1891. peer = NULL;
  1892. if (vdev)
  1893. dp_vdev_unref_delete(soc, vdev, mod_id);
  1894. qdf_spin_unlock_bh(
  1895. &mld_hash_obj->mld_peer_hash_lock);
  1896. return peer;
  1897. }
  1898. }
  1899. }
  1900. if (vdev)
  1901. dp_vdev_unref_delete(soc, vdev, mod_id);
  1902. qdf_spin_unlock_bh(&mld_hash_obj->mld_peer_hash_lock);
  1903. return NULL; /* failure */
  1904. }
  1905. static void
  1906. dp_mlo_peer_find_hash_remove_be(struct dp_soc *soc, struct dp_peer *peer)
  1907. {
  1908. uint32_t index;
  1909. struct dp_peer *tmppeer = NULL;
  1910. int found = 0;
  1911. dp_mld_peer_hash_obj_t mld_hash_obj;
  1912. mld_hash_obj = dp_mlo_get_peer_hash_obj(soc);
  1913. if (!mld_hash_obj)
  1914. return;
  1915. index = dp_mlo_peer_find_hash_index(mld_hash_obj, &peer->mac_addr);
  1916. QDF_ASSERT(!TAILQ_EMPTY(&mld_hash_obj->mld_peer_hash.bins[index]));
  1917. qdf_spin_lock_bh(&mld_hash_obj->mld_peer_hash_lock);
  1918. TAILQ_FOREACH(tmppeer, &mld_hash_obj->mld_peer_hash.bins[index],
  1919. hash_list_elem) {
  1920. if (tmppeer == peer) {
  1921. found = 1;
  1922. break;
  1923. }
  1924. }
  1925. QDF_ASSERT(found);
  1926. TAILQ_REMOVE(&mld_hash_obj->mld_peer_hash.bins[index], peer,
  1927. hash_list_elem);
  1928. dp_info("Peer %pK (" QDF_MAC_ADDR_FMT ") removed. (found %u)",
  1929. peer, QDF_MAC_ADDR_REF(peer->mac_addr.raw), found);
  1930. dp_peer_unref_delete(peer, DP_MOD_ID_CONFIG);
  1931. qdf_spin_unlock_bh(&mld_hash_obj->mld_peer_hash_lock);
  1932. }
  1933. static void
  1934. dp_mlo_peer_find_hash_add_be(struct dp_soc *soc, struct dp_peer *peer)
  1935. {
  1936. uint32_t index;
  1937. dp_mld_peer_hash_obj_t mld_hash_obj;
  1938. mld_hash_obj = dp_mlo_get_peer_hash_obj(soc);
  1939. if (!mld_hash_obj)
  1940. return;
  1941. index = dp_mlo_peer_find_hash_index(mld_hash_obj, &peer->mac_addr);
  1942. qdf_spin_lock_bh(&mld_hash_obj->mld_peer_hash_lock);
  1943. if (QDF_IS_STATUS_ERROR(dp_peer_get_ref(NULL, peer,
  1944. DP_MOD_ID_CONFIG))) {
  1945. dp_err("fail to get peer ref:" QDF_MAC_ADDR_FMT,
  1946. QDF_MAC_ADDR_REF(peer->mac_addr.raw));
  1947. qdf_spin_unlock_bh(&mld_hash_obj->mld_peer_hash_lock);
  1948. return;
  1949. }
  1950. TAILQ_INSERT_TAIL(&mld_hash_obj->mld_peer_hash.bins[index], peer,
  1951. hash_list_elem);
  1952. qdf_spin_unlock_bh(&mld_hash_obj->mld_peer_hash_lock);
  1953. dp_info("Peer %pK (" QDF_MAC_ADDR_FMT ") added",
  1954. peer, QDF_MAC_ADDR_REF(peer->mac_addr.raw));
  1955. }
  1956. void dp_print_mlo_ast_stats_be(struct dp_soc *soc)
  1957. {
  1958. uint32_t index;
  1959. struct dp_peer *peer;
  1960. dp_mld_peer_hash_obj_t mld_hash_obj;
  1961. mld_hash_obj = dp_mlo_get_peer_hash_obj(soc);
  1962. if (!mld_hash_obj)
  1963. return;
  1964. qdf_spin_lock_bh(&mld_hash_obj->mld_peer_hash_lock);
  1965. for (index = 0; index < mld_hash_obj->mld_peer_hash.mask; index++) {
  1966. TAILQ_FOREACH(peer, &mld_hash_obj->mld_peer_hash.bins[index],
  1967. hash_list_elem) {
  1968. dp_print_peer_ast_entries(soc, peer, NULL);
  1969. }
  1970. }
  1971. qdf_spin_unlock_bh(&mld_hash_obj->mld_peer_hash_lock);
  1972. }
  1973. #endif
  1974. #if defined(DP_UMAC_HW_HARD_RESET) && defined(DP_UMAC_HW_RESET_SUPPORT)
  1975. static void dp_reconfig_tx_vdev_mcast_ctrl_be(struct dp_soc *soc,
  1976. struct dp_vdev *vdev)
  1977. {
  1978. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1979. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  1980. hal_soc_handle_t hal_soc = soc->hal_soc;
  1981. uint8_t vdev_id = vdev->vdev_id;
  1982. if (vdev->opmode == wlan_op_mode_sta) {
  1983. if (vdev->pdev->isolation)
  1984. hal_tx_vdev_mcast_ctrl_set(hal_soc, vdev_id,
  1985. HAL_TX_MCAST_CTRL_FW_EXCEPTION);
  1986. else
  1987. hal_tx_vdev_mcast_ctrl_set(hal_soc, vdev_id,
  1988. HAL_TX_MCAST_CTRL_MEC_NOTIFY);
  1989. } else if (vdev->opmode == wlan_op_mode_ap) {
  1990. hal_tx_mcast_mlo_reinject_routing_set(
  1991. hal_soc,
  1992. HAL_TX_MCAST_MLO_REINJECT_TQM_NOTIFY);
  1993. if (vdev->mlo_vdev) {
  1994. hal_tx_vdev_mcast_ctrl_set(
  1995. hal_soc,
  1996. vdev_id,
  1997. HAL_TX_MCAST_CTRL_NO_SPECIAL);
  1998. } else {
  1999. hal_tx_vdev_mcast_ctrl_set(hal_soc,
  2000. vdev_id,
  2001. HAL_TX_MCAST_CTRL_FW_EXCEPTION);
  2002. }
  2003. }
  2004. }
  2005. static void dp_bank_reconfig_be(struct dp_soc *soc, struct dp_vdev *vdev)
  2006. {
  2007. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  2008. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  2009. union hal_tx_bank_config *bank_config;
  2010. if (!be_vdev || be_vdev->bank_id == DP_BE_INVALID_BANK_ID)
  2011. return;
  2012. bank_config = &be_soc->bank_profiles[be_vdev->bank_id].bank_config;
  2013. hal_tx_populate_bank_register(be_soc->soc.hal_soc, bank_config,
  2014. be_vdev->bank_id);
  2015. }
  2016. #endif
  2017. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP) && \
  2018. defined(WLAN_MCAST_MLO)
  2019. static void dp_mlo_mcast_reset_pri_mcast(struct dp_vdev_be *be_vdev,
  2020. struct dp_vdev *ptnr_vdev,
  2021. void *arg)
  2022. {
  2023. struct dp_vdev_be *be_ptnr_vdev =
  2024. dp_get_be_vdev_from_dp_vdev(ptnr_vdev);
  2025. be_ptnr_vdev->mcast_primary = false;
  2026. }
  2027. #if defined(CONFIG_MLO_SINGLE_DEV)
  2028. static void dp_txrx_set_mlo_mcast_primary_vdev_param_be(
  2029. struct dp_vdev *vdev,
  2030. cdp_config_param_type val)
  2031. {
  2032. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  2033. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(
  2034. be_vdev->vdev.pdev->soc);
  2035. be_vdev->mcast_primary = val.cdp_vdev_param_mcast_vdev;
  2036. vdev->mlo_vdev = 1;
  2037. if (be_vdev->mcast_primary) {
  2038. struct cdp_txrx_peer_params_update params = {0};
  2039. dp_mlo_iter_ptnr_vdev(be_soc, be_vdev,
  2040. dp_mlo_mcast_reset_pri_mcast,
  2041. (void *)&be_vdev->mcast_primary,
  2042. DP_MOD_ID_TX_MCAST,
  2043. DP_LINK_VDEV_ITER);
  2044. params.chip_id = be_soc->mlo_chip_id;
  2045. params.pdev_id = be_vdev->vdev.pdev->pdev_id;
  2046. params.vdev_id = vdev->vdev_id;
  2047. dp_wdi_event_handler(
  2048. WDI_EVENT_MCAST_PRIMARY_UPDATE,
  2049. be_vdev->vdev.pdev->soc,
  2050. (void *)&params, CDP_INVALID_PEER,
  2051. WDI_NO_VAL, params.pdev_id);
  2052. }
  2053. }
  2054. static
  2055. void dp_get_vdev_stats_for_unmap_peer_be(struct dp_vdev *vdev,
  2056. struct dp_peer *peer,
  2057. struct cdp_vdev_stats **vdev_stats)
  2058. {
  2059. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  2060. if (!IS_DP_LEGACY_PEER(peer))
  2061. *vdev_stats = &be_vdev->mlo_stats;
  2062. }
  2063. #else
  2064. static void dp_txrx_set_mlo_mcast_primary_vdev_param_be(
  2065. struct dp_vdev *vdev,
  2066. cdp_config_param_type val)
  2067. {
  2068. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  2069. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(
  2070. be_vdev->vdev.pdev->soc);
  2071. be_vdev->mcast_primary = val.cdp_vdev_param_mcast_vdev;
  2072. vdev->mlo_vdev = 1;
  2073. hal_tx_vdev_mcast_ctrl_set(vdev->pdev->soc->hal_soc,
  2074. vdev->vdev_id,
  2075. HAL_TX_MCAST_CTRL_NO_SPECIAL);
  2076. if (be_vdev->mcast_primary) {
  2077. struct cdp_txrx_peer_params_update params = {0};
  2078. dp_mlo_iter_ptnr_vdev(be_soc, be_vdev,
  2079. dp_mlo_mcast_reset_pri_mcast,
  2080. (void *)&be_vdev->mcast_primary,
  2081. DP_MOD_ID_TX_MCAST,
  2082. DP_LINK_VDEV_ITER);
  2083. params.chip_id = be_soc->mlo_chip_id;
  2084. params.pdev_id = vdev->pdev->pdev_id;
  2085. params.vdev_id = vdev->vdev_id;
  2086. dp_wdi_event_handler(
  2087. WDI_EVENT_MCAST_PRIMARY_UPDATE,
  2088. vdev->pdev->soc,
  2089. (void *)&params, CDP_INVALID_PEER,
  2090. WDI_NO_VAL, params.pdev_id);
  2091. }
  2092. }
  2093. #endif
  2094. static void dp_txrx_reset_mlo_mcast_primary_vdev_param_be(
  2095. struct dp_vdev *vdev,
  2096. cdp_config_param_type val)
  2097. {
  2098. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  2099. be_vdev->mcast_primary = false;
  2100. vdev->mlo_vdev = 0;
  2101. hal_tx_vdev_mcast_ctrl_set(vdev->pdev->soc->hal_soc,
  2102. vdev->vdev_id,
  2103. HAL_TX_MCAST_CTRL_FW_EXCEPTION);
  2104. }
  2105. /**
  2106. * dp_txrx_get_vdev_mcast_param_be() - Target specific ops for getting vdev
  2107. * params related to multicast
  2108. * @soc: DP soc handle
  2109. * @vdev: pointer to vdev structure
  2110. * @val: buffer address
  2111. *
  2112. * Return: QDF_STATUS
  2113. */
  2114. static
  2115. QDF_STATUS dp_txrx_get_vdev_mcast_param_be(struct dp_soc *soc,
  2116. struct dp_vdev *vdev,
  2117. cdp_config_param_type *val)
  2118. {
  2119. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  2120. if (be_vdev->mcast_primary)
  2121. val->cdp_vdev_param_mcast_vdev = true;
  2122. else
  2123. val->cdp_vdev_param_mcast_vdev = false;
  2124. return QDF_STATUS_SUCCESS;
  2125. }
  2126. #else
  2127. static void dp_txrx_set_mlo_mcast_primary_vdev_param_be(
  2128. struct dp_vdev *vdev,
  2129. cdp_config_param_type val)
  2130. {
  2131. }
  2132. static void dp_txrx_reset_mlo_mcast_primary_vdev_param_be(
  2133. struct dp_vdev *vdev,
  2134. cdp_config_param_type val)
  2135. {
  2136. }
  2137. static
  2138. QDF_STATUS dp_txrx_get_vdev_mcast_param_be(struct dp_soc *soc,
  2139. struct dp_vdev *vdev,
  2140. cdp_config_param_type *val)
  2141. {
  2142. return QDF_STATUS_SUCCESS;
  2143. }
  2144. static
  2145. void dp_get_vdev_stats_for_unmap_peer_be(struct dp_vdev *vdev,
  2146. struct dp_peer *peer,
  2147. struct cdp_vdev_stats **vdev_stats)
  2148. {
  2149. }
  2150. #endif
  2151. #ifdef DP_TX_IMPLICIT_RBM_MAPPING
  2152. static void dp_tx_implicit_rbm_set_be(struct dp_soc *soc,
  2153. uint8_t tx_ring_id,
  2154. uint8_t bm_id)
  2155. {
  2156. hal_tx_config_rbm_mapping_be(soc->hal_soc,
  2157. soc->tcl_data_ring[tx_ring_id].hal_srng,
  2158. bm_id);
  2159. }
  2160. #else
  2161. static void dp_tx_implicit_rbm_set_be(struct dp_soc *soc,
  2162. uint8_t tx_ring_id,
  2163. uint8_t bm_id)
  2164. {
  2165. }
  2166. #endif
  2167. /**
  2168. * dp_txrx_set_vdev_param_be() - Target specific ops while setting vdev params
  2169. * @soc: DP soc handle
  2170. * @vdev: pointer to vdev structure
  2171. * @param: parameter type to get value
  2172. * @val: value
  2173. *
  2174. * Return: QDF_STATUS
  2175. */
  2176. static
  2177. QDF_STATUS dp_txrx_set_vdev_param_be(struct dp_soc *soc,
  2178. struct dp_vdev *vdev,
  2179. enum cdp_vdev_param_type param,
  2180. cdp_config_param_type val)
  2181. {
  2182. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  2183. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  2184. switch (param) {
  2185. case CDP_TX_ENCAP_TYPE:
  2186. case CDP_UPDATE_DSCP_TO_TID_MAP:
  2187. case CDP_UPDATE_TDLS_FLAGS:
  2188. dp_tx_update_bank_profile(be_soc, be_vdev);
  2189. break;
  2190. case CDP_ENABLE_CIPHER:
  2191. if (vdev->tx_encap_type == htt_cmn_pkt_type_raw)
  2192. dp_tx_update_bank_profile(be_soc, be_vdev);
  2193. break;
  2194. case CDP_SET_MCAST_VDEV:
  2195. dp_txrx_set_mlo_mcast_primary_vdev_param_be(vdev, val);
  2196. break;
  2197. case CDP_RESET_MLO_MCAST_VDEV:
  2198. dp_txrx_reset_mlo_mcast_primary_vdev_param_be(vdev, val);
  2199. break;
  2200. default:
  2201. dp_warn("invalid param %d", param);
  2202. break;
  2203. }
  2204. return QDF_STATUS_SUCCESS;
  2205. }
  2206. #ifdef WLAN_FEATURE_11BE_MLO
  2207. #ifdef DP_USE_REDUCED_PEER_ID_FIELD_WIDTH
  2208. static inline void
  2209. dp_soc_max_peer_id_set(struct dp_soc *soc)
  2210. {
  2211. soc->peer_id_shift = dp_log2_ceil(soc->max_peers);
  2212. soc->peer_id_mask = (1 << soc->peer_id_shift) - 1;
  2213. /*
  2214. * Double the peers since we use ML indication bit
  2215. * alongwith peer_id to find peers.
  2216. */
  2217. soc->max_peer_id = 1 << (soc->peer_id_shift + 1);
  2218. }
  2219. #else
  2220. static inline void
  2221. dp_soc_max_peer_id_set(struct dp_soc *soc)
  2222. {
  2223. soc->max_peer_id =
  2224. (1 << (HTT_RX_PEER_META_DATA_V1_ML_PEER_VALID_S + 1)) - 1;
  2225. }
  2226. #endif /* DP_USE_REDUCED_PEER_ID_FIELD_WIDTH */
  2227. #else
  2228. static inline void
  2229. dp_soc_max_peer_id_set(struct dp_soc *soc)
  2230. {
  2231. soc->max_peer_id = soc->max_peers;
  2232. }
  2233. #endif /* WLAN_FEATURE_11BE_MLO */
  2234. static void dp_peer_map_detach_be(struct dp_soc *soc)
  2235. {
  2236. if (soc->host_ast_db_enable)
  2237. dp_peer_ast_hash_detach(soc);
  2238. }
  2239. static QDF_STATUS dp_peer_map_attach_be(struct dp_soc *soc)
  2240. {
  2241. QDF_STATUS status;
  2242. if (soc->host_ast_db_enable) {
  2243. status = dp_peer_ast_hash_attach(soc);
  2244. if (QDF_IS_STATUS_ERROR(status))
  2245. return status;
  2246. }
  2247. dp_soc_max_peer_id_set(soc);
  2248. return QDF_STATUS_SUCCESS;
  2249. }
  2250. #ifdef WLAN_FEATURE_11BE_MLO
  2251. #ifdef WLAN_MCAST_MLO
  2252. static inline void
  2253. dp_initialize_arch_ops_be_mcast_mlo(struct dp_arch_ops *arch_ops)
  2254. {
  2255. arch_ops->dp_tx_mcast_handler = dp_tx_mlo_mcast_handler_be;
  2256. arch_ops->dp_rx_mcast_handler = dp_rx_mlo_igmp_handler;
  2257. arch_ops->dp_tx_is_mcast_primary = dp_tx_mlo_is_mcast_primary_be;
  2258. }
  2259. #else /* WLAN_MCAST_MLO */
  2260. static inline void
  2261. dp_initialize_arch_ops_be_mcast_mlo(struct dp_arch_ops *arch_ops)
  2262. {
  2263. }
  2264. #endif /* WLAN_MCAST_MLO */
  2265. #ifdef WLAN_MLO_MULTI_CHIP
  2266. static inline void
  2267. dp_initialize_arch_ops_be_mlo_multi_chip(struct dp_arch_ops *arch_ops)
  2268. {
  2269. arch_ops->dp_partner_chips_map = dp_mlo_partner_chips_map;
  2270. arch_ops->dp_partner_chips_unmap = dp_mlo_partner_chips_unmap;
  2271. arch_ops->dp_soc_get_by_idle_bm_id = dp_soc_get_by_idle_bm_id;
  2272. }
  2273. #else
  2274. static inline void
  2275. dp_initialize_arch_ops_be_mlo_multi_chip(struct dp_arch_ops *arch_ops)
  2276. {
  2277. }
  2278. #endif
  2279. static inline void
  2280. dp_initialize_arch_ops_be_mlo(struct dp_arch_ops *arch_ops)
  2281. {
  2282. dp_initialize_arch_ops_be_mcast_mlo(arch_ops);
  2283. dp_initialize_arch_ops_be_mlo_multi_chip(arch_ops);
  2284. arch_ops->mlo_peer_find_hash_detach =
  2285. dp_mlo_peer_find_hash_detach_wrapper;
  2286. arch_ops->mlo_peer_find_hash_attach =
  2287. dp_mlo_peer_find_hash_attach_wrapper;
  2288. arch_ops->mlo_peer_find_hash_add = dp_mlo_peer_find_hash_add_be;
  2289. arch_ops->mlo_peer_find_hash_remove = dp_mlo_peer_find_hash_remove_be;
  2290. arch_ops->mlo_peer_find_hash_find = dp_mlo_peer_find_hash_find_be;
  2291. arch_ops->get_hw_link_id = dp_get_hw_link_id_be;
  2292. }
  2293. #else /* WLAN_FEATURE_11BE_MLO */
  2294. static inline void
  2295. dp_initialize_arch_ops_be_mlo(struct dp_arch_ops *arch_ops)
  2296. {
  2297. }
  2298. #endif /* WLAN_FEATURE_11BE_MLO */
  2299. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP)
  2300. #define DP_LMAC_PEER_ID_MSB_LEGACY 2
  2301. #define DP_LMAC_PEER_ID_MSB_MLO 3
  2302. static void dp_peer_get_reo_hash_be(struct dp_vdev *vdev,
  2303. struct cdp_peer_setup_info *setup_info,
  2304. enum cdp_host_reo_dest_ring *reo_dest,
  2305. bool *hash_based,
  2306. uint8_t *lmac_peer_id_msb)
  2307. {
  2308. struct dp_soc *soc = vdev->pdev->soc;
  2309. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  2310. if (!be_soc->mlo_enabled)
  2311. return dp_vdev_get_default_reo_hash(vdev, reo_dest,
  2312. hash_based);
  2313. *hash_based = wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx);
  2314. *reo_dest = vdev->pdev->reo_dest;
  2315. /* Not a ML link peer use non-mlo */
  2316. if (!setup_info) {
  2317. *lmac_peer_id_msb = DP_LMAC_PEER_ID_MSB_LEGACY;
  2318. return;
  2319. }
  2320. /* For STA ML VAP we do not have num links info at this point
  2321. * use MLO case always
  2322. */
  2323. if (vdev->opmode == wlan_op_mode_sta) {
  2324. *lmac_peer_id_msb = DP_LMAC_PEER_ID_MSB_MLO;
  2325. return;
  2326. }
  2327. /* For AP ML VAP consider the peer as ML only it associates with
  2328. * multiple links
  2329. */
  2330. if (setup_info->num_links == 1) {
  2331. *lmac_peer_id_msb = DP_LMAC_PEER_ID_MSB_LEGACY;
  2332. return;
  2333. }
  2334. *lmac_peer_id_msb = DP_LMAC_PEER_ID_MSB_MLO;
  2335. }
  2336. static bool dp_reo_remap_config_be(struct dp_soc *soc,
  2337. uint32_t *remap0,
  2338. uint32_t *remap1,
  2339. uint32_t *remap2)
  2340. {
  2341. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  2342. uint32_t reo_config = wlan_cfg_get_reo_rings_mapping(soc->wlan_cfg_ctx);
  2343. uint32_t reo_mlo_config =
  2344. wlan_cfg_mlo_rx_ring_map_get(soc->wlan_cfg_ctx);
  2345. if (!be_soc->mlo_enabled)
  2346. return dp_reo_remap_config(soc, remap0, remap1, remap2);
  2347. *remap0 = hal_reo_ix_remap_value_get_be(soc->hal_soc, reo_mlo_config);
  2348. *remap1 = hal_reo_ix_remap_value_get_be(soc->hal_soc, reo_config);
  2349. *remap2 = hal_reo_ix_remap_value_get_be(soc->hal_soc, reo_mlo_config);
  2350. return true;
  2351. }
  2352. #else
  2353. static void dp_peer_get_reo_hash_be(struct dp_vdev *vdev,
  2354. struct cdp_peer_setup_info *setup_info,
  2355. enum cdp_host_reo_dest_ring *reo_dest,
  2356. bool *hash_based,
  2357. uint8_t *lmac_peer_id_msb)
  2358. {
  2359. dp_vdev_get_default_reo_hash(vdev, reo_dest, hash_based);
  2360. }
  2361. static bool dp_reo_remap_config_be(struct dp_soc *soc,
  2362. uint32_t *remap0,
  2363. uint32_t *remap1,
  2364. uint32_t *remap2)
  2365. {
  2366. return dp_reo_remap_config(soc, remap0, remap1, remap2);
  2367. }
  2368. #endif
  2369. #ifdef CONFIG_MLO_SINGLE_DEV
  2370. static inline
  2371. void dp_initialize_arch_ops_be_single_dev(struct dp_arch_ops *arch_ops)
  2372. {
  2373. arch_ops->dp_tx_mlo_mcast_send = dp_tx_mlo_mcast_send_be;
  2374. }
  2375. #else
  2376. static inline
  2377. void dp_initialize_arch_ops_be_single_dev(struct dp_arch_ops *arch_ops)
  2378. {
  2379. }
  2380. #endif
  2381. #ifdef IPA_OFFLOAD
  2382. static int8_t dp_ipa_get_bank_id_be(struct dp_soc *soc)
  2383. {
  2384. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  2385. return be_soc->ipa_bank_id;
  2386. }
  2387. #ifdef QCA_IPA_LL_TX_FLOW_CONTROL
  2388. static void dp_ipa_get_wdi_version_be(uint8_t *wdi_ver)
  2389. {
  2390. *wdi_ver = IPA_WDI_4;
  2391. }
  2392. #else
  2393. static inline void dp_ipa_get_wdi_version_be(uint8_t *wdi_ver)
  2394. {
  2395. }
  2396. #endif
  2397. static inline void dp_initialize_arch_ops_be_ipa(struct dp_arch_ops *arch_ops)
  2398. {
  2399. arch_ops->ipa_get_bank_id = dp_ipa_get_bank_id_be;
  2400. arch_ops->ipa_get_wdi_ver = dp_ipa_get_wdi_version_be;
  2401. }
  2402. #else /* !IPA_OFFLOAD */
  2403. static inline void dp_initialize_arch_ops_be_ipa(struct dp_arch_ops *arch_ops)
  2404. {
  2405. }
  2406. #endif /* IPA_OFFLOAD */
  2407. void dp_initialize_arch_ops_be(struct dp_arch_ops *arch_ops)
  2408. {
  2409. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  2410. arch_ops->tx_hw_enqueue = dp_tx_hw_enqueue_be;
  2411. arch_ops->dp_rx_process = dp_rx_process_be;
  2412. arch_ops->dp_tx_send_fast = dp_tx_fast_send_be;
  2413. arch_ops->tx_comp_get_params_from_hal_desc =
  2414. dp_tx_comp_get_params_from_hal_desc_be;
  2415. arch_ops->dp_tx_process_htt_completion =
  2416. dp_tx_process_htt_completion_be;
  2417. arch_ops->dp_tx_desc_pool_alloc = dp_tx_desc_pool_alloc_be;
  2418. arch_ops->dp_tx_desc_pool_free = dp_tx_desc_pool_free_be;
  2419. arch_ops->dp_tx_desc_pool_init = dp_tx_desc_pool_init_be;
  2420. arch_ops->dp_tx_desc_pool_deinit = dp_tx_desc_pool_deinit_be;
  2421. arch_ops->dp_rx_desc_pool_init = dp_rx_desc_pool_init_be;
  2422. arch_ops->dp_rx_desc_pool_deinit = dp_rx_desc_pool_deinit_be;
  2423. arch_ops->dp_wbm_get_rx_desc_from_hal_desc =
  2424. dp_wbm_get_rx_desc_from_hal_desc_be;
  2425. arch_ops->dp_tx_compute_hw_delay = dp_tx_compute_tx_delay_be;
  2426. arch_ops->dp_rx_chain_msdus = dp_rx_chain_msdus_be;
  2427. arch_ops->dp_rx_wbm_err_reap_desc = dp_rx_wbm_err_reap_desc_be;
  2428. arch_ops->dp_rx_null_q_desc_handle = dp_rx_null_q_desc_handle_be;
  2429. #endif
  2430. arch_ops->txrx_get_context_size = dp_get_context_size_be;
  2431. #ifdef WIFI_MONITOR_SUPPORT
  2432. arch_ops->txrx_get_mon_context_size = dp_mon_get_context_size_be;
  2433. #endif
  2434. arch_ops->dp_rx_desc_cookie_2_va =
  2435. dp_rx_desc_cookie_2_va_be;
  2436. arch_ops->dp_rx_intrabss_mcast_handler =
  2437. dp_rx_intrabss_mcast_handler_be;
  2438. arch_ops->dp_rx_word_mask_subscribe = dp_rx_word_mask_subscribe_be;
  2439. arch_ops->txrx_soc_attach = dp_soc_attach_be;
  2440. arch_ops->txrx_soc_detach = dp_soc_detach_be;
  2441. arch_ops->txrx_soc_init = dp_soc_init_be;
  2442. arch_ops->txrx_soc_deinit = dp_soc_deinit_be_wrapper;
  2443. arch_ops->txrx_soc_srng_alloc = dp_soc_srng_alloc_be;
  2444. arch_ops->txrx_soc_srng_init = dp_soc_srng_init_be;
  2445. arch_ops->txrx_soc_srng_deinit = dp_soc_srng_deinit_be;
  2446. arch_ops->txrx_soc_srng_free = dp_soc_srng_free_be;
  2447. arch_ops->txrx_pdev_attach = dp_pdev_attach_be;
  2448. arch_ops->txrx_pdev_detach = dp_pdev_detach_be;
  2449. arch_ops->txrx_vdev_attach = dp_vdev_attach_be;
  2450. arch_ops->txrx_vdev_detach = dp_vdev_detach_be;
  2451. arch_ops->txrx_peer_setup = dp_peer_setup_be;
  2452. arch_ops->txrx_peer_map_attach = dp_peer_map_attach_be;
  2453. arch_ops->txrx_peer_map_detach = dp_peer_map_detach_be;
  2454. arch_ops->dp_rxdma_ring_sel_cfg = dp_rxdma_ring_sel_cfg_be;
  2455. arch_ops->dp_rx_peer_metadata_peer_id_get =
  2456. dp_rx_peer_metadata_peer_id_get_be;
  2457. arch_ops->soc_cfg_attach = dp_soc_cfg_attach_be;
  2458. arch_ops->tx_implicit_rbm_set = dp_tx_implicit_rbm_set_be;
  2459. arch_ops->txrx_set_vdev_param = dp_txrx_set_vdev_param_be;
  2460. dp_initialize_arch_ops_be_mlo(arch_ops);
  2461. #ifdef WLAN_MLO_MULTI_CHIP
  2462. arch_ops->dp_get_soc_by_chip_id = dp_get_soc_by_chip_id_be;
  2463. arch_ops->dp_mlo_print_ptnr_info = dp_mlo_debug_print_ptnr_info;
  2464. #endif
  2465. arch_ops->dp_soc_get_num_soc = dp_soc_get_num_soc_be;
  2466. arch_ops->dp_peer_rx_reorder_queue_setup =
  2467. dp_peer_rx_reorder_queue_setup_be;
  2468. arch_ops->dp_rx_peer_set_link_id = dp_rx_set_link_id_be;
  2469. arch_ops->txrx_print_peer_stats = dp_print_peer_txrx_stats_be;
  2470. #if defined(DP_UMAC_HW_HARD_RESET) && defined(DP_UMAC_HW_RESET_SUPPORT)
  2471. arch_ops->dp_bank_reconfig = dp_bank_reconfig_be;
  2472. arch_ops->dp_reconfig_tx_vdev_mcast_ctrl =
  2473. dp_reconfig_tx_vdev_mcast_ctrl_be;
  2474. arch_ops->dp_cc_reg_cfg_init = dp_cc_reg_cfg_init;
  2475. #endif
  2476. #ifdef WLAN_SUPPORT_PPEDS
  2477. arch_ops->ppeds_handle_attached = dp_ppeds_handle_attached;
  2478. arch_ops->dp_txrx_ppeds_rings_status = dp_ppeds_rings_status;
  2479. arch_ops->txrx_soc_ppeds_start = dp_ppeds_start_soc_be;
  2480. arch_ops->txrx_soc_ppeds_stop = dp_ppeds_stop_soc_be;
  2481. arch_ops->dp_register_ppeds_interrupts = dp_register_ppeds_interrupts;
  2482. arch_ops->dp_free_ppeds_interrupts = dp_free_ppeds_interrupts;
  2483. arch_ops->dp_tx_ppeds_inuse_desc = dp_ppeds_inuse_desc;
  2484. arch_ops->dp_ppeds_clear_stats = dp_ppeds_clear_stats;
  2485. arch_ops->dp_txrx_ppeds_rings_stats = dp_ppeds_rings_stats;
  2486. arch_ops->dp_txrx_ppeds_clear_rings_stats = dp_ppeds_clear_rings_stats;
  2487. arch_ops->dp_tx_ppeds_cfg_astidx_cache_mapping =
  2488. dp_tx_ppeds_cfg_astidx_cache_mapping;
  2489. #ifdef DP_UMAC_HW_RESET_SUPPORT
  2490. arch_ops->txrx_soc_ppeds_interrupt_stop = dp_ppeds_interrupt_stop_be;
  2491. arch_ops->txrx_soc_ppeds_interrupt_start = dp_ppeds_interrupt_start_be;
  2492. arch_ops->txrx_soc_ppeds_service_status_update =
  2493. dp_ppeds_service_status_update_be;
  2494. arch_ops->txrx_soc_ppeds_enabled_check = dp_ppeds_is_enabled_on_soc;
  2495. arch_ops->txrx_soc_ppeds_txdesc_pool_reset =
  2496. dp_ppeds_tx_desc_pool_reset;
  2497. #endif
  2498. #endif
  2499. dp_init_near_full_arch_ops_be(arch_ops);
  2500. arch_ops->get_reo_qdesc_addr = dp_rx_get_reo_qdesc_addr_be;
  2501. arch_ops->get_rx_hash_key = dp_get_rx_hash_key_be;
  2502. arch_ops->dp_set_rx_fst = dp_set_rx_fst_be;
  2503. arch_ops->dp_get_rx_fst = dp_get_rx_fst_be;
  2504. arch_ops->dp_rx_fst_deref = dp_rx_fst_release_ref_be;
  2505. arch_ops->dp_rx_fst_ref = dp_rx_fst_get_ref_be;
  2506. arch_ops->print_mlo_ast_stats = dp_print_mlo_ast_stats_be;
  2507. arch_ops->peer_get_reo_hash = dp_peer_get_reo_hash_be;
  2508. arch_ops->reo_remap_config = dp_reo_remap_config_be;
  2509. arch_ops->txrx_get_vdev_mcast_param = dp_txrx_get_vdev_mcast_param_be;
  2510. arch_ops->txrx_srng_init = dp_srng_init_be;
  2511. arch_ops->dp_get_vdev_stats_for_unmap_peer =
  2512. dp_get_vdev_stats_for_unmap_peer_be;
  2513. #ifdef WLAN_MLO_MULTI_CHIP
  2514. arch_ops->dp_get_interface_stats = dp_get_interface_stats_be;
  2515. #endif
  2516. #if defined(DP_POWER_SAVE) || defined(FEATURE_RUNTIME_PM)
  2517. arch_ops->dp_update_ring_hptp = dp_update_ring_hptp;
  2518. #endif
  2519. arch_ops->dp_flush_tx_ring = dp_flush_tcl_ring;
  2520. dp_initialize_arch_ops_be_ipa(arch_ops);
  2521. dp_initialize_arch_ops_be_single_dev(arch_ops);
  2522. dp_initialize_arch_ops_be_fisa(arch_ops);
  2523. }
  2524. #ifdef QCA_SUPPORT_PRIMARY_LINK_MIGRATE
  2525. static void
  2526. dp_primary_link_migration(struct dp_soc *soc, void *cb_ctxt,
  2527. union hal_reo_status *reo_status)
  2528. {
  2529. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  2530. struct dp_mlo_ctxt *dp_mlo = be_soc->ml_ctxt;
  2531. struct dp_soc *pr_soc = NULL;
  2532. struct dp_peer_info *pr_peer_info = (struct dp_peer_info *)cb_ctxt;
  2533. struct dp_peer *new_primary_peer = NULL;
  2534. struct dp_peer *mld_peer = NULL;
  2535. uint8_t primary_vdev_id;
  2536. struct cdp_txrx_peer_params_update params = {0};
  2537. uint8_t tid;
  2538. uint8_t is_wds = 0;
  2539. uint16_t hw_peer_id;
  2540. uint16_t ast_hash;
  2541. pr_soc = dp_mlo_get_soc_ref_by_chip_id(dp_mlo, pr_peer_info->chip_id);
  2542. if (!pr_soc) {
  2543. dp_htt_err("Invalid soc");
  2544. qdf_mem_free(pr_peer_info);
  2545. return;
  2546. }
  2547. new_primary_peer = pr_soc->peer_id_to_obj_map[
  2548. pr_peer_info->primary_peer_id];
  2549. if (!new_primary_peer) {
  2550. dp_htt_err("New primary peer is NULL");
  2551. qdf_mem_free(pr_peer_info);
  2552. return;
  2553. }
  2554. mld_peer = DP_GET_MLD_PEER_FROM_PEER(new_primary_peer);
  2555. if (!mld_peer) {
  2556. dp_htt_err("MLD peer is NULL");
  2557. qdf_mem_free(pr_peer_info);
  2558. return;
  2559. }
  2560. new_primary_peer->primary_link = 1;
  2561. hw_peer_id = pr_peer_info->hw_peer_id;
  2562. ast_hash = pr_peer_info->ast_hash;
  2563. /* Add ast enteries for new primary peer */
  2564. if (pr_soc->ast_offload_support && pr_soc->host_ast_db_enable) {
  2565. dp_peer_host_add_map_ast(pr_soc, mld_peer->peer_id, mld_peer->mac_addr.raw,
  2566. hw_peer_id, new_primary_peer->vdev->vdev_id,
  2567. ast_hash, is_wds);
  2568. }
  2569. /*
  2570. * Check if reo_qref_table_en is set and if
  2571. * rx_tid qdesc for tid 0 is already setup and perform
  2572. * qref write to LUT for Tid 0 and 16.
  2573. *
  2574. */
  2575. if (hal_reo_shared_qaddr_is_enable(pr_soc->hal_soc) &&
  2576. mld_peer->rx_tid[0].hw_qdesc_vaddr_unaligned) {
  2577. for (tid = 0; tid < DP_MAX_TIDS; tid++)
  2578. hal_reo_shared_qaddr_write(pr_soc->hal_soc,
  2579. mld_peer->peer_id,
  2580. tid,
  2581. mld_peer->rx_tid[tid].hw_qdesc_paddr);
  2582. }
  2583. if (pr_soc && pr_soc->cdp_soc.ol_ops->update_primary_link)
  2584. pr_soc->cdp_soc.ol_ops->update_primary_link(pr_soc->ctrl_psoc,
  2585. new_primary_peer->mac_addr.raw);
  2586. primary_vdev_id = new_primary_peer->vdev->vdev_id;
  2587. dp_vdev_unref_delete(soc, mld_peer->vdev, DP_MOD_ID_CHILD);
  2588. mld_peer->vdev = dp_vdev_get_ref_by_id(pr_soc, primary_vdev_id,
  2589. DP_MOD_ID_CHILD);
  2590. mld_peer->txrx_peer->vdev = mld_peer->vdev;
  2591. params.vdev_id = new_primary_peer->vdev->vdev_id;
  2592. params.peer_mac = mld_peer->mac_addr.raw;
  2593. params.chip_id = pr_peer_info->chip_id;
  2594. params.pdev_id = new_primary_peer->vdev->pdev->pdev_id;
  2595. if (new_primary_peer->vdev->opmode == wlan_op_mode_sta) {
  2596. dp_wdi_event_handler(
  2597. WDI_EVENT_STA_PRIMARY_UMAC_UPDATE,
  2598. pr_soc, (void *)&params,
  2599. new_primary_peer->peer_id,
  2600. WDI_NO_VAL, params.pdev_id);
  2601. } else {
  2602. dp_wdi_event_handler(
  2603. WDI_EVENT_PEER_PRIMARY_UMAC_UPDATE,
  2604. pr_soc, (void *)&params,
  2605. new_primary_peer->peer_id,
  2606. WDI_NO_VAL, params.pdev_id);
  2607. }
  2608. qdf_mem_free(pr_peer_info);
  2609. }
  2610. #ifdef WLAN_SUPPORT_PPEDS
  2611. static QDF_STATUS dp_get_ppe_info_for_vap(struct dp_soc *pr_soc,
  2612. struct dp_peer *pr_peer,
  2613. uint16_t *src_info)
  2614. {
  2615. struct dp_soc_be *be_soc_mld = NULL;
  2616. struct cdp_ds_vp_params vp_params = {0};
  2617. struct dp_ppe_vp_profile *ppe_vp_profile;
  2618. QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
  2619. struct cdp_soc_t *cdp_soc = &pr_soc->cdp_soc;
  2620. /*
  2621. * Extract the VP profile from the VAP
  2622. */
  2623. if (!cdp_soc->ol_ops->get_ppeds_profile_info_for_vap) {
  2624. dp_err("%pK: Register get ppeds profile info first", cdp_soc);
  2625. return QDF_STATUS_E_NULL_VALUE;
  2626. }
  2627. /*
  2628. * Check if PPE DS routing is enabled on the associated vap.
  2629. */
  2630. qdf_status = cdp_soc->ol_ops->get_ppeds_profile_info_for_vap(
  2631. pr_soc->ctrl_psoc,
  2632. pr_peer->vdev->vdev_id,
  2633. &vp_params);
  2634. if (QDF_IS_STATUS_ERROR(qdf_status)) {
  2635. dp_err("Could not find ppeds profile info");
  2636. return QDF_STATUS_E_NULL_VALUE;
  2637. }
  2638. /* Check if PPE DS routing is enabled on
  2639. * the associated vap.
  2640. */
  2641. if (vp_params.ppe_vp_type != PPE_VP_USER_TYPE_DS)
  2642. return qdf_status;
  2643. be_soc_mld = dp_get_be_soc_from_dp_soc(pr_soc);
  2644. ppe_vp_profile = &be_soc_mld->ppe_vp_profile[
  2645. vp_params.ppe_vp_profile_idx];
  2646. *src_info = ppe_vp_profile->vp_num;
  2647. return qdf_status;
  2648. }
  2649. #else
  2650. static QDF_STATUS dp_get_ppe_info_for_vap(struct dp_soc *pr_soc,
  2651. struct dp_peer *pr_peer,
  2652. uint16_t *src_info)
  2653. {
  2654. return QDF_STATUS_E_NOSUPPORT;
  2655. }
  2656. #endif
  2657. QDF_STATUS dp_htt_reo_migration(struct dp_soc *soc, uint16_t peer_id,
  2658. uint16_t ml_peer_id, uint16_t vdev_id,
  2659. uint8_t pdev_id, uint8_t chip_id)
  2660. {
  2661. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  2662. struct dp_mlo_ctxt *dp_mlo = be_soc->ml_ctxt;
  2663. uint16_t mld_peer_id = dp_gen_ml_peer_id(soc, ml_peer_id);
  2664. struct dp_soc *pr_soc = NULL;
  2665. struct dp_soc *current_pr_soc = NULL;
  2666. struct hal_reo_cmd_params params;
  2667. struct dp_rx_tid *rx_tid;
  2668. struct dp_peer *pr_peer = NULL;
  2669. struct dp_peer *mld_peer = NULL;
  2670. struct dp_soc *mld_soc = NULL;
  2671. struct dp_peer *current_pr_peer = NULL;
  2672. struct dp_peer_info *peer_info;
  2673. struct dp_vdev_be *be_vdev;
  2674. uint16_t src_info = 0;
  2675. QDF_STATUS status;
  2676. struct dp_ast_entry *ast_entry;
  2677. uint16_t hw_peer_id;
  2678. uint16_t ast_hash;
  2679. if (!dp_mlo) {
  2680. dp_htt_err("Invalid dp_mlo ctxt");
  2681. return QDF_STATUS_E_FAILURE;
  2682. }
  2683. pr_soc = dp_mlo_get_soc_ref_by_chip_id(dp_mlo, chip_id);
  2684. if (!pr_soc) {
  2685. dp_htt_err("Invalid soc");
  2686. return QDF_STATUS_E_FAILURE;
  2687. }
  2688. pr_peer = pr_soc->peer_id_to_obj_map[peer_id];
  2689. if (!pr_peer || !(IS_MLO_DP_LINK_PEER(pr_peer))) {
  2690. dp_htt_err("Invalid peer");
  2691. return QDF_STATUS_E_FAILURE;
  2692. }
  2693. mld_peer = DP_GET_MLD_PEER_FROM_PEER(pr_peer);
  2694. if (!mld_peer || (mld_peer->peer_id != mld_peer_id)) {
  2695. dp_htt_err("Invalid mld peer");
  2696. return QDF_STATUS_E_FAILURE;
  2697. }
  2698. be_vdev = dp_get_be_vdev_from_dp_vdev(pr_peer->vdev);
  2699. if (!be_vdev) {
  2700. dp_htt_err("Invalid be vdev");
  2701. return QDF_STATUS_E_FAILURE;
  2702. }
  2703. mld_soc = mld_peer->vdev->pdev->soc;
  2704. status = dp_get_ppe_info_for_vap(pr_soc, pr_peer, &src_info);
  2705. if (status == QDF_STATUS_E_NULL_VALUE) {
  2706. dp_htt_err("Invalid ppe info for the vdev");
  2707. return QDF_STATUS_E_FAILURE;
  2708. }
  2709. current_pr_peer = dp_get_primary_link_peer_by_id(
  2710. pr_soc,
  2711. mld_peer->peer_id,
  2712. DP_MOD_ID_HTT);
  2713. /* Making existing primary peer as non primary */
  2714. if (current_pr_peer) {
  2715. current_pr_peer->primary_link = 0;
  2716. dp_peer_unref_delete(current_pr_peer, DP_MOD_ID_HTT);
  2717. }
  2718. current_pr_soc = mld_peer->vdev->pdev->soc;
  2719. dp_peer_rx_reo_shared_qaddr_delete(current_pr_soc, mld_peer);
  2720. /* delete ast entry for current primary peer */
  2721. qdf_spin_lock_bh(&current_pr_soc->ast_lock);
  2722. ast_entry = dp_peer_ast_hash_find_soc(current_pr_soc, mld_peer->mac_addr.raw);
  2723. if (!ast_entry) {
  2724. dp_htt_err("Invalid ast entry");
  2725. qdf_spin_unlock_bh(&current_pr_soc->ast_lock);
  2726. return QDF_STATUS_E_FAILURE;
  2727. }
  2728. hw_peer_id = ast_entry->ast_idx;
  2729. ast_hash = ast_entry->ast_hash_value;
  2730. dp_peer_unlink_ast_entry(current_pr_soc, ast_entry, mld_peer);
  2731. if (ast_entry->is_mapped)
  2732. current_pr_soc->ast_table[ast_entry->ast_idx] = NULL;
  2733. dp_peer_free_ast_entry(current_pr_soc, ast_entry);
  2734. mld_peer->self_ast_entry = NULL;
  2735. qdf_spin_unlock_bh(&current_pr_soc->ast_lock);
  2736. peer_info = qdf_mem_malloc(sizeof(struct dp_peer_info));
  2737. if (!peer_info) {
  2738. dp_htt_err("Malloc failed");
  2739. return QDF_STATUS_E_FAILURE;
  2740. }
  2741. peer_info->primary_peer_id = peer_id;
  2742. peer_info->chip_id = chip_id;
  2743. peer_info->hw_peer_id = hw_peer_id;
  2744. peer_info->ast_hash = ast_hash;
  2745. qdf_mem_zero(&params, sizeof(params));
  2746. rx_tid = &mld_peer->rx_tid[0];
  2747. params.std.need_status = 1;
  2748. params.std.addr_lo = rx_tid->hw_qdesc_paddr & 0xffffffff;
  2749. params.std.addr_hi = (uint64_t)(rx_tid->hw_qdesc_paddr) >> 32;
  2750. params.u.fl_cache_params.flush_no_inval = 0;
  2751. params.u.fl_cache_params.flush_entire_cache = 1;
  2752. status = dp_reo_send_cmd(current_pr_soc, CMD_FLUSH_CACHE, &params,
  2753. dp_primary_link_migration,
  2754. (void *)peer_info);
  2755. if (status != QDF_STATUS_SUCCESS) {
  2756. dp_htt_err("Reo flush failed");
  2757. qdf_mem_free(peer_info);
  2758. dp_h2t_ptqm_migration_msg_send(pr_soc, vdev_id, pdev_id,
  2759. chip_id, peer_id, ml_peer_id,
  2760. src_info, QDF_STATUS_E_FAILURE);
  2761. }
  2762. qdf_mem_zero(&params, sizeof(params));
  2763. params.std.need_status = 0;
  2764. params.std.addr_lo = rx_tid->hw_qdesc_paddr & 0xffffffff;
  2765. params.std.addr_hi = (uint64_t)(rx_tid->hw_qdesc_paddr) >> 32;
  2766. params.u.unblk_cache_params.type = UNBLOCK_CACHE;
  2767. dp_reo_send_cmd(current_pr_soc, CMD_UNBLOCK_CACHE, &params, NULL, NULL);
  2768. dp_h2t_ptqm_migration_msg_send(pr_soc, vdev_id, pdev_id,
  2769. chip_id, peer_id, ml_peer_id,
  2770. src_info, QDF_STATUS_SUCCESS);
  2771. return QDF_STATUS_SUCCESS;
  2772. }
  2773. #endif